; -------------------------------------------------------------------------------- ; @Title: RCARE2 On-Chip Peripherals ; @Props: Released ; @Author: ASK, PBU, GAJ, KKW ; @Changelog: 2015-05-13 PBU ; @Manufacturer: RENESAS - Renesas Technology, Corp. ; @Doc: 2014-06-24_R-Car_E2_Hardware_Manual_Ver0-2.pdf ; @Core: Cortex-A7MPCore ; @Copyright: (C) 1989-2017 Lauterbach GmbH, licensed for use with TRACE32(R) only ; -------------------------------------------------------------------------------- ; $Id: perrcare2.per 14376 2022-02-24 11:15:06Z kwisniewski $ ; ; ; KNOWN PROBLEMS: ; FDP1 - Missing addresses for FD1_CTL_CLKCTRL,FD1_CTL_IRQFSET ; SDHI - No description for registers. ; 3D graphic engine - no documentation for PowerVR Series5 SGX540 config 16. 8. tree "Core Registers (Cortex-A7MPCore)" AUTOINDENT.PUSH AUTOINDENT.OFF ; -------------------------------------------------------------------------------- ; Identification registers ; -------------------------------------------------------------------------------- width 10. tree "ID Registers" group.long c15:0x0++0x0 line.long 0x0 "MIDR,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,Reserved,Physical" bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x100++0x0 line.long 0x0 "CTR,Cache Type Register" bitfld.long 0x0 29.--31. " FORMAT ,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..." bitfld.long 0x0 24.--27. " CWG ,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 20.--23. " ERG ,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." textline " " bitfld.long 0x0 16.--19. " DMINLINE ,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..." bitfld.long 0x0 14.--15. " L1POLICY ,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..." bitfld.long 0x0 0.--3. " IMINLINE ,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,?..." endif rgroup.long c15:0x300++0x0 line.long 0x0 "TLBTR,TLB Type Register" bitfld.long 0x0 0. " NU ,Unified or Separate TLBs" "Unified,?..." rgroup.long c15:0x500++0x0 line.long 0x0 "MPIDR,Multiprocessor Affinity Register" bitfld.long 0x00 31. " MPERF ,Multiprocessing Extensions register format" "Not supported,Supported" bitfld.long 0x00 30. " U ,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor" bitfld.long 0x00 24. " MT ,Lowest level of affinity consist of logical processors" "Not implemented,Implemented" textline " " bitfld.long 0x00 8.--11. " CLUSTERID ,Value read in CLUSTERID configuration pins" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--1. " CPUID ,Value depends on the number of configured CPUs" "1,2,3,4" rgroup.long c15:0x400++0x0 line.long 0x0 "MIDR2,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c15:0x600++0x0 line.long 0x0 "REVIDR,Revision ID Register" rgroup.long c15:0x700++0x0 line.long 0x0 "MIDR3,Main ID Register" hexmask.long.byte 0x0 24.--31. 0x1 " IMPL ,Implementer code" bitfld.long 0x0 20.--23. " VAR ,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16.--19. " ARCH , Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7" textline " " hexmask.long.word 0x0 4.--15. 1. " PART ,Primary Part Number" bitfld.long 0x0 0.--3. " REV ,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Supported,PXN,64-bit,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0410++0x00 line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0" bitfld.long 0x00 28.--31. " IS ,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..." bitfld.long 0x00 24.--27. " FCSE ,Fast Context Switch Memory Mappings Support" "Not supported,?..." bitfld.long 0x00 20.--23. " AR ,Auxiliary Register Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TCM ,TCM and Associated DMA Support" "Not supported,?..." bitfld.long 0x00 12.--15. " SL ,Shareability levels" "Reserved,Implemented 2 levels,?..." bitfld.long 0x00 8.--11. " OSS ,Outer Shareable Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " PMSA ,Physical Memory System Architecture (PMSA) Support" "Not supported,?..." bitfld.long 0x00 0.--3. " VMSA ,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0510++0x00 line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1" bitfld.long 0x00 28.--31. " BTB ,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,Required,?..." bitfld.long 0x00 24.--27. " L1TCO ,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 20.--23. " L1UCMO ,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 16.--19. " L1HCMO ,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 12.--15. " L1UCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " L1HCLMOSW ,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " L1UCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " L1HCLMOMVA ,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..." endif rgroup.long c15:0x0610++0x00 line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2" bitfld.long 0x00 28.--31. " HAF ,Hardware Access Flag Support" "Not supported,?..." bitfld.long 0x00 24.--27. " WFI ,Wait for Interrupt Stalling Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " MBF ,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " UTLBMO ,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " HTLBMO ,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 8.--11. " HL1CMRO ,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " HL1BPCRO ,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." bitfld.long 0x00 0.--3. " HL1FPCRO ,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..." rgroup.long c15:0x0710++0x00 line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3" bitfld.long 0x00 28.--31. " SS ,Supersection support" "Supported,?..." bitfld.long 0x00 24.--27. " PMS ,Physical memory size supported by processor caches" "Reserved,Reserved,40-bit,?..." bitfld.long 0x00 20.--23. " CW ,Coherent walk" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " MB ,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " BPM ,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 4.--7. " HCMOSW ,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " HCMOMVA ,Invalidate Cache MVA Support" "Reserved,Supported,?..." if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Not supported,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x0020++0x00 line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0" bitfld.long 0x00 24.--27. " DIVI ,Divide Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " DEBI ,Debug Instructions Support" "Reserved,BKPT,?..." bitfld.long 0x00 16.--19. " CI ,Coprocessor Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 12.--15. " CBI ,Combined Compare and Branch Instructions Support" "Reserved,CBNZ/CBZ,?..." bitfld.long 0x00 8.--11. " BI ,Bitfield Instructions Support" "Reserved,BFC/BFI/SBFX/UBFX,?..." bitfld.long 0x00 4.--7. " BCI ,Bit Counting Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " SI ,Swap Instructions Support" "Supported,?..." endif rgroup.long c15:0x0120++0x00 line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1" bitfld.long 0x00 28.--31. " JI ,Jazelle Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " INTI ,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 20.--23. " IMMI ,Immediate Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " ITEI ,If Then Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " EXTI ,Extend Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " EARI ,Exception A and R Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " EXIN ,Exception in ARM Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " ENDI ,Endian Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0220++0x00 line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2" bitfld.long 0x00 28.--31. " RI ,Reversal Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSRI ,PSR Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " UMI ,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " SMI ,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 12.--15. " MI ,Multiply Instructions Support" "Reserved,Reserved,MUL/MLA/MLS,?..." bitfld.long 0x00 8.--11. " II ,Multi-Access Interruptible Instructions Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " MHI ,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,PLD/PLI/PLWD,?..." bitfld.long 0x00 0.--3. " LSI ,Load and Store Instructions Support" "Reserved,LDRD/STRD,?..." rgroup.long c15:0x0320++0x00 line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3" bitfld.long 0x00 28.--31. " TEEEI ,Thumb-EE Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " NOPI ,True NOP Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 20.--23. " TCI ,Thumb Copy Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 16.--19. " TBI ,Table Branch Instructions Support" "Reserved,TBB/TBH,?..." bitfld.long 0x00 12.--15. " SPI ,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..." bitfld.long 0x00 8.--11. " SVCI ,SVC Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " SIMDI ,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " SI ,Saturate Instructions Support" "Reserved,Supported,?..." rgroup.long c15:0x0420++0x00 line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4" bitfld.long 0x00 28.--31. " SWP_FRAC ,Memory System Locking Support" "Reserved,Supported,?..." bitfld.long 0x00 24.--27. " PSR_M_I ,PSR_M Instructions Support" "Not supported,?..." bitfld.long 0x00 20.--23. " SPRI ,Synchronization Primitive instructions" "Supported,?..." textline " " bitfld.long 0x00 16.--19. " BI ,Barrier Instructions Support" "Reserved,DMB/DSB/ISB,?..." bitfld.long 0x00 12.--15. " SMCI ,SMC Instructions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " WBI ,Write-Back Instructions Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 4.--7. " WSI ,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..." bitfld.long 0x00 0.--3. " UI ,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..." rgroup.long c15:0x0010++0x00 line.long 0x00 "ID_PFR0,Processor Feature Register 0" bitfld.long 0x00 12.--15. " STATE3 ,Thumb Execution Environment (Thumb-EE) Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " STATE2 ,Support for Jazelle extension" "Not supported,?..." bitfld.long 0x00 4.--7. " STATE1 ,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..." textline " " bitfld.long 0x00 0.--3. " STATE0 ,ARM Instruction Set Support" "Reserved,Supported,?..." rgroup.long c15:0x0110++0x00 line.long 0x00 "ID_PFR1,Processor Feature Register 1" bitfld.long 0x00 16.--19. " GT ,Generic Timer Support" "Reserved,Supported,?..." bitfld.long 0x00 12.--15. " VE ,Virtualization Extensions Support" "Reserved,Supported,?..." bitfld.long 0x00 8.--11. " MPM ,Microcontroller Programmer's Model Support" "Not supported,?..." textline " " bitfld.long 0x00 4.--7. " SE ,Security Extensions Architecture v1 Support" "Reserved,Supported,?..." bitfld.long 0x00 0.--3. " PM ,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..." rgroup.long c15:0x0210++0x00 line.long 0x00 "ID_DFR0,Debug Feature Register 0" bitfld.long 0x00 24.--27. " PMM ,Performance Monitor Model Support" "Reserved,Reserved,ID_DFR0,?..." bitfld.long 0x00 20.--23. " MDM_MM ,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..." bitfld.long 0x00 16.--19. " TM_MM ,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..." textline " " bitfld.long 0x00 12.--15. " CTM_CB ,Coprocessor-Based Trace Debug Model Support" "Not supported,?..." bitfld.long 0x00 8.--11. " CDM_MM ,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1,?..." bitfld.long 0x00 4.--7. " SDM_CB ,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." textline " " bitfld.long 0x00 0.--3. " CDM_CB ,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,ARMv7.1/CP14,?..." if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 15. " [15] ,Instruction architecturally executed, condition code check pass, unaligned load or store" "Not implemented,Implemented" textline " " bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed, immediate branch" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed, condition code check pass, software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" textline " " bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 7. " [7] ,Instruction architecturally executed, condition code check pass, store" "Not implemented,Implemented" textline " " bitfld.long 0x00 6. " [6] ,Instruction architecturally executed, condition code check pass, load" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 31. " PMCEID0[31] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 30. " [30] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 29. " [29] ,Level 1 data memory access" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Level 1 data memory access" "Not implemented,Implemented" textline " " bitfld.long 0x00 27. " [27] ,Branches or other change in program flow that could have been predicted by the branch prediction resources of the processor" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Branch mispredicted or not predicted" "Not implemented,Implemented" bitfld.long 0x00 25. " [25] ,Unaligned access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Unaligned access" "Not implemented,Implemented" textline " " bitfld.long 0x00 23. " [23] ,Branch speculatively executed - Procedure return" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Branch speculatively executed - Immediate branch" "Not implemented,Implemented" bitfld.long 0x00 21. " [21] ,Instruction speculatively executed - Software change of the PC" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Write to translation table register (TTBR0 or TTBR1)" "Not implemented,Implemented" textline " " bitfld.long 0x00 19. " [19] ,Change to ContextID retired" "Not implemented,Implemented" bitfld.long 0x00 18. " [18] ,Exception return architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 17. " [17] ,Exception taken. Counts the number of exceptions architecturally taken" "Not implemented,Implemented" bitfld.long 0x00 16. " [16] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 15. " [15] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 13. " [13] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 12. " [12] ,Instruction architecturally executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Store instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 8. " [8] ,Store instruction speculatively executed" "Not implemented,Implemented" textline " " bitfld.long 0x00 7. " [7] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 6. " [6] ,Load instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Data read or write operation that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 4. " [4] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" textline " " bitfld.long 0x00 3. " [3] ,Data read or write operation that causes a cache access at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 2. " [2] ,Data read or write operation that causes a refill at (at least) the lowest level of data or unified cache" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Instruction fetch that causes a TLB refill at (at least) the lowest level of TLB" "Not implemented,Implemented" bitfld.long 0x00 0. " [0] ,Instruction fetch that causes a refill at (at least) the lowest level of instruction or unified cache" "Not implemented,Implemented" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x6C9++0x0 line.long 0x00 "PMCEID0,Common Event Identification Register 0" bitfld.long 0x00 29. " PMCEID0[29] ,Bus cycle" "Not implemented,Implemented" bitfld.long 0x00 28. " [28] ,Instruction architecturally executed. Condition code check pass, write to TTBR" "Not implemented,Implemented" bitfld.long 0x00 27. " [27] ,Instruction speculatively executed" "Not implemented,Implemented" bitfld.long 0x00 26. " [26] ,Local memory error" "Not implemented,Implemented" textline " " bitfld.long 0x00 25. " [25] ,Bus access" "Not implemented,Implemented" bitfld.long 0x00 24. " [24] ,Level 2 data cache write-back" "Not implemented,Implemented" bitfld.long 0x00 23. " [23] ,Level 2 data cache refill" "Not implemented,Implemented" bitfld.long 0x00 22. " [22] ,Level 2 data cache access" "Not implemented,Implemented" textline " " bitfld.long 0x00 21. " [21] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 20. " [20] ,Level 1 instruction cache access" "Not implemented,Implemented" bitfld.long 0x00 19. " [19] ,Data memory access" "Not implemented,Implemented" bitfld.long 0x00 14. " [14] ,Instruction architecturally executed, condition code check pass, procedure return" "Not implemented,Implemented" textline " " bitfld.long 0x00 11. " [11] ,Instruction architecturally executed, condition code check pass, write to CONTEXTIDR" "Not implemented,Implemented" bitfld.long 0x00 10. " [10] ,Instruction architecturally executed, condition code check pass, exception return" "Not implemented,Implemented" bitfld.long 0x00 9. " [9] ,Exception taken" "Not implemented,Implemented" bitfld.long 0x00 5. " [5] ,Level 1 data TLB refill" "Not implemented,Implemented" textline " " bitfld.long 0x00 2. " [2] ,Level 1 instruction TLB refill" "Not implemented,Implemented" bitfld.long 0x00 1. " [1] ,Level 1 instruction cache refill" "Not implemented,Implemented" endif tree.end width 12. tree "System Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" textline " " bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" bitfld.long 0x00 3. " ASSE ,ACE STREX Signalling Enable" "Disabled,Enabled" bitfld.long 0x00 2. " L2PF ,Enable L2 prefetch" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " L1PF ,Enable L1 prefetch" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 31. " SDEH ,Snoop-delayed exclusive handling" "Normal,Modified" bitfld.long 0x00 30. " FMCEA ,Force main clock processor enable active" "Not prevented,Prevented" bitfld.long 0x00 29. " FNVCEA ,Force NEON/VFP clock enable active" "Not prevented,Prevented" textline " " bitfld.long 0x00 27.--28. " WSNAT ,Write streaming no-allocate threshold" "12th,128th,512th,Disabled" bitfld.long 0x00 25.--26. " WSNL1AT ,Write streaming no L1-allocate threshold" "14th,64th,128th,Disabled" bitfld.long 0x00 24. " NCSE ,Non-cacheable streaming enhancement" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " FIORRTTSSAW ,Forces in-order requests to the same set and way" "Not forced,Forced" bitfld.long 0x00 22. " FIOLI ,Force in-order load issue" "Not forced,Forced" bitfld.long 0x00 21. " DL2TLBP ,Disabled L2 TLB prefetching" "No,Yes" textline " " bitfld.long 0x00 20. " DL2TBWIPAPAC ,Disable L2 TBW IPA PA cache" "No,Yes" bitfld.long 0x00 19. " DL2TBWS1WC ,Disable L2 TBW Stage 1 walk cache" "No,Yes" bitfld.long 0x00 18. " DL2TBWS1L2PAC ,Disable L2 TBW stage 1 L2 PA cache" "No,Yes" textline " " bitfld.long 0x00 17. " DL2TLBPO ,Disable L2 TLB Performance Optimization" "No,Yes" bitfld.long 0x00 16. " EFSOADLR ,Enables full Strongly-ordered and Device load replay" "Disabled,Enabled" bitfld.long 0x00 15. " FIIBEU ,Force in-order issue in branch execution unit" "Not forced,Forced" textline " " bitfld.long 0x00 14. " FLOIGCDPC ,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Limited" bitfld.long 0x00 13. " FACP14WCP15 ,Flush after CP14 and CP15 writes" "Normal,Flushed" bitfld.long 0x00 12. " FPCP14CP15 ,Force push of CP14 and CP15 registers" "Not forced,Pushed" textline " " bitfld.long 0x00 11. " FOISEG ,Force one instruction to start and end a group" "Not forced,Forced" bitfld.long 0x00 10. " FSAEIG ,Force serialization after each instruction group" "Not forced,Forced" bitfld.long 0x00 9. " DFRO ,Disable flag renaming optimization" "No,Yes" textline " " bitfld.long 0x00 8. " EWFIIANOPI ,Executes WFI instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 7. " EWFEIANOPI ,Executes WFE instructions as NOP instructions" "Disabled,Enabled" bitfld.long 0x00 6. " SMP ,Broadcast of cache and TLB maintenance operations enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " EPLDIANOP ,Execute PLD and PLDW instructions as a NOP instruction" "Disabled,Enabled" bitfld.long 0x00 4. " DIP ,Disable indirect predictor" "No,Yes" bitfld.long 0x00 3. " DMBTB ,Disable micro-BTB" "No,Yes" textline " " bitfld.long 0x00 2. " LOLBDPF ,Limits to one loop buffer detect per flush" "Normal,Limited" bitfld.long 0x00 1. " DLB ,Disable loop buffer" "No,Yes" bitfld.long 0x00 0. " EIBTB ,Enable invalidate of BTB" "Disabled,Enabled" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x101++0x0 line.long 0x0 "ACTLR,Auxiliary Control Register" bitfld.long 0x00 28. " DBDI ,Disable branch dual issue" "No,Yes" bitfld.long 0x00 15. " DDVM ,Disable Distributed Virtual Memory (DVM) transactions" "No,Yes" bitfld.long 0x00 13.--14. " L1PCTL ,L1 Data prefetch control" "Disabled,1 pre-fetch,2 pre-fetches,3 pre-fetches" textline " " bitfld.long 0x00 12. " L1RADIS ,L1 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 11. " L2RADIS ,L2 Data Cache read-allocate mode disable" "No,Yes" bitfld.long 0x00 10. " DODMBS ,Disable optimised data memory barrier behaviour" "No,Yes" textline " " bitfld.long 0x00 6. " SMP ,Enables coherent requests to the processor" "Disabled,Enabled" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x140F++0x00 line.long 0x0 "ACTLR2,Auxiliary Control Register 2" bitfld.long 0x00 31. " ECRCG ,Enable CPU regional clock gates" "Disabled,Enabled" bitfld.long 0x00 0. " EDCCADCCI ,Execute data cache clean as data cache clean/invalidate" "Disabled,Enabled" textline " " else hgroup.long c15:0x140F++0x00 hide.long 0x0 "ACTLR2,Auxiliary Control Register 2" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x201++0x00 line.long 0x0 "CPACR,Coprocessor Access Control Register" bitfld.long 0x0 31. " ASEDIS ,Disable Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x0 30. " D32DIS ,Disable use of registers D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x0 22.--23. " CP11 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" textline " " bitfld.long 0x0 20.--21. " CP10 ,Coprocessor access control" "Denied,Privileged,Reserved,Full" endif group.long c15:0x11++0x0 line.long 0x0 "SCR,Secure Configuration Register" bitfld.long 0x00 9. " SIF ,Secure Instruction Fetch" "Permitted,Not permitted" bitfld.long 0x00 8. " HCE ,Hyp Call enable" "Undefined,Enabled" bitfld.long 0x00 7. " SCD ,Secure Monitor Call disable" "No,Yes" textline " " bitfld.long 0x00 5. " AW ,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 4. " FW ,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed" bitfld.long 0x00 3. " EA ,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor" textline " " bitfld.long 0x00 2. " FIQ ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor" bitfld.long 0x00 1. " IRQ ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor" bitfld.long 0x00 0. " NS ,Secure mode " "Secure,Non-secure" group.long c15:0x0111++0x00 line.long 0x00 "SDER,Secure Debug Enable Register" bitfld.long 0x00 1. " SUNIDEN ,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted" bitfld.long 0x00 0. " SUIDEN ,Invasive Secure User Debug Enable bit" "Denied,Permitted" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 17. " NS_L2ERR ,L2 internal asynchronous error and AXI asynchronous error writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" textline " " bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0211++0x00 line.long 0x00 "NSACR,Non-Secure Access Control Register" bitfld.long 0x00 18. " NS_SMP ,Determines if the SMP bit of the Auxiliary Control Register is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 17. " NS_L2ERR ,Determines if the L2 Extended Control Register(L2ECTLR), is writeable in Non-secure state" "Non-writeable,Writeable" bitfld.long 0x00 16. " NS_ACTLR_PF_WRITE ,Determines if the ACTLR.L1PF and ACTLR.L2PF registers are writeable in Non-secure state" "Non-writeable,Writeable" textline " " bitfld.long 0x00 15. " NSASEDIS ,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes" bitfld.long 0x00 14. " NSD32DIS ,Disable the Non-secure use of D16-D31 of the VFP register file" "No,Yes" bitfld.long 0x00 11. " CP11 ,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted" textline " " bitfld.long 0x00 10. " CP10 ,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted" endif group.long c15:0x000C++0x00 line.long 0x00 "VBAR,Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " VBADDR ,Vector Base Address" group.long c15:0x010C++0x00 line.long 0x00 "MVBAR,Monitor Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " MVBADDR ,Monitor Vector Base Address" textline " " rgroup.long c15:0x001C++0x00 line.long 0x00 "ISR,Interrupt Status Register" bitfld.long 0x00 8. " A ,External abort pending flag" "Not pending,Pending" bitfld.long 0x00 7. " I ,Interrupt pending flag" "Not pending,Pending" bitfld.long 0x00 6. " F ,Fast interrupt pending flag" "Not pending,Pending" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 1. " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" else hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x1609))&0x3)==0x3) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 30. " PRM3 ,Disable processor 3 retention" "No,Yes" bitfld.long 0x00 28.--29. " PPS3 ,Processor 3 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" textline " " bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 7. " CPSMP[3] ,Copy of the ACTLR.SMP for processor 3" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x2) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 26. " PRM2 ,Disable processor 2 retention" "No,Yes" bitfld.long 0x00 24.--25. " PPS2 ,Processor 2 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" textline " " bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" textline " " bitfld.long 0x00 6. " CPSMP[2] ,Copy of the ACTLR.SMP for processor 2" "Disabled,Enabled" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x1) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 22. " PRM1 ,Disable processor 1 retention" "No,Yes" bitfld.long 0x00 20.--21. " PPS1 ,Processor 1 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" textline " " bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 5. " CPSMP[1] ,Copy of the ACTLR.SMP for processor 1" "Disabled,Enabled" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " elif (((d.l(c15:0x1609))&0x3)==0x0) group.long c15:0x1609++0x00 line.long 0x00 "SCUCTLR,SCU Control Register" bitfld.long 0x00 18. " PRM0 ,Disable processor 0 retention" "No,Yes" bitfld.long 0x00 16.--17. " PPS0 ,Processor 0 power status" "Normal,Not present,Retention,Powerdown" bitfld.long 0x00 4. " CPSMP[0] ,Copy of the ACTLR.SMP for processor 0" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " NP ,Number of processors" "1,2,3,4" textline " " endif group.long c15:0x410F++0x00 line.long 0x00 "FILASTARTR,Peripheral port start address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_START_ADDR ,Start address of the peripheral port physical memory region" bitfld.long 0x00 0. " FILT_EN ,FLT_START_ADDR and FLT_END_ADDR are valid" "Invalid,Valid" group.long c15:0x420F++0x00 line.long 0x00 "FILAENDR,Peripheral port end address register" hexmask.long.tbyte 0x00 12.--31. 0x10 " FLT_END_ADDR ,End address of the peripheral port physical memory region" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") hgroup.long c15:0x1609++0x00 hide.long 0x00 "SCUCTLR,SCU Control Register" hgroup.long c15:0x410F++0x00 hide.long 0x00 "FILASTARTR,Peripheral port start address register" hgroup.long c15:0x420F++0x00 hide.long 0x00 "FILAENDR,Peripheral port end address register" endif tree.end width 12. tree "Memory Management Unit" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x0001++0x0 line.long 0x0 "SCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Alignment Fault Check enable" "Disabled,Enabled" bitfld.long 0x0 0. " M ,Address translation enable bit" "Disabled,Enabled" textline " " elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1++0x0 line.long 0x0 "SCTLR,Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 29. " AFE ,Access Flag Enable" "Disabled,Enabled" bitfld.long 0x0 28. " TRE ,TEX remap enable" "Disabled,Enabled" textline " " bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 20. " UWXN ,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced" bitfld.long 0x0 19. " WXN ,Write permission implies PL1 Execute Never" "Not forced,Forced" textline " " bitfld.long 0x0 13. " V ,Base Location of Exception Registers" "0x00000000,0xFFFF0000" bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 11. " Z ,Branch Prediction Enable" "Disabled,Enabled" textline " " bitfld.long 0x0 10. " SW ,SWP/SWPB Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,MMU or Protection Unit" "Disabled,Enabled" textline " " endif if (((d.l(c15:0x0002))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0002))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0002++0x00 line.long 0x00 "TTBR0,Translation Table Base Register 0" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB0_ADDR ,Translation table base 0 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x10020++0x01 line.quad 0x00 "TTBR0,Translation Table Base Register 0" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0102))&0x2)==0x2)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 5. " NOS ,Not Outer Shareable bit" "Outer,Inner" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0102))&0x2)==0x0)&&(((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0102++0x00 line.long 0x00 "TTBR1,Translation Table Base Register 1" hexmask.long.tbyte 0x00 14.--31. 0x40 " TTB1_ADDR ,Translation table base 1 address" bitfld.long 0x00 3.--4. " RGN ,Region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 2. " IMP ,Implementation defined" "Low,High" textline " " bitfld.long 0x00 1. " S ,Shareable bit" "Non-shareable,Shareable" bitfld.long 0x00 0. 6. " IRGN ,Inner region bits for Multiprocessing Extensions" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" elif (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.quad c15:0x11020++0x01 line.quad 0x00 "TTBR1,Translation Table Base Register 1" hexmask.quad.byte 0x00 48.--55. 1. " ASID ,ASID for the translation table base address" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" endif if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 5. " PD1 ,Translation table walk Disable bit for TTBR1" "No,Yes" bitfld.long 0x00 4. " PD0 ,Translation table walk Disable bit for TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " N ,Indicate the width of the base address held in TTBR0" "16KB,8KB,4KB,2KB,1KB,512 bytes,256 bytes,128 bytes" else group.long c15:0x0202++0x00 line.long 0x00 "TTBCR,Translation Table Base Control Register" bitfld.long 0x00 31. " EAE ,Extended Address Enable" "32-bit,40-bit" bitfld.long 0x00 30. " IMP ,IMPLEMENTATION DEFINED" "Low,High" bitfld.long 0x00 28.--29. " SH1 ,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 26.--27. " ORGN1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 24.--25. " IRGN1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 23. " EPD1 ,Translation table walk disable for translations using TTBR1" "No,Yes" textline " " bitfld.long 0x00 22. " A1 ,Selects whether TTBR0 or TTBR1 defines the ASID" "TTBR0,TTBR1" bitfld.long 0x00 16.--18. " T1SZ ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using TTBR0" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable" textline " " bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" bitfld.long 0x00 7. " EPD0 ,Translation table walk disable for translations using TTBR0" "No,Yes" textline " " bitfld.long 0x00 0.--2. " T0SZ ,The Size offset of the TTBR0 addressed memory region" "0,1,2,3,4,5,6,7" endif textline " " group.long c15:0x0003++0x00 line.long 0x00 "DACR,Domain Access Control Register" bitfld.long 0x0 30.--31. " D15 ,Domain Access 15" "Denied,Client,Reserved,Manager" bitfld.long 0x0 28.--29. " D14 ,Domain Access 14" "Denied,Client,Reserved,Manager" bitfld.long 0x0 26.--27. " D13 ,Domain Access 13" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 24.--25. " D12 ,Domain Access 12" "Denied,Client,Reserved,Manager" bitfld.long 0x0 22.--23. " D11 ,Domain Access 11" "Denied,Client,Reserved,Manager" bitfld.long 0x0 20.--21. " D10 ,Domain Access 10" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 18.--19. " D9 ,Domain Access 9" "Denied,Client,Reserved,Manager" bitfld.long 0x0 16.--17. " D8 ,Domain Access 8" "Denied,Client,Reserved,Manager" bitfld.long 0x0 14.--15. " D7 ,Domain Access 7" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 12.--13. " D6 ,Domain Access 6" "Denied,Client,Reserved,Manager" bitfld.long 0x0 10.--11. " D5 ,Domain Access 5" "Denied,Client,Reserved,Manager" bitfld.long 0x0 8.--9. " D4 ,Domain Access 4" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 6.--7. " D3 ,Domain Access 3" "Denied,Client,Reserved,Manager" bitfld.long 0x0 4.--5. " D2 ,Domain Access 2" "Denied,Client,Reserved,Manager" bitfld.long 0x0 2.--3. " D1 ,Domain Access 1" "Denied,Client,Reserved,Manager" textline " " bitfld.long 0x0 0.--1. " D0 ,Domain Access 0" "Denied,Client,Reserved,Manager" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Lockdown Abort,Reserved,Reserved,Reserved,Reserved,Reserved,Coprocessor Abort,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Fault Status" "Reserved,Alignment fault,Reserved,Reserved,Instruction cache maintenance fault,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort/First level,Permission fault/First level,Synchronous external abort/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk/First level,Reserved,Synchronous parity error on translation table walk/Second level,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Instruction,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/synchronous external,Permission/section,L2/synchronous external,Permission/page,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x00000000) group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 4.--7. " DOMAIN ,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15" bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." else group.long c15:0x0005++0x00 line.long 0x00 "DFSR,Data Fault Status Register" bitfld.long 0x00 13. " CM ,Cache maintenance fault" "Not aborted,Aborted" bitfld.long 0x00 12. " EXT ,External Abort Qualifier" "DECERR,SLVERR" bitfld.long 0x00 11. " WNR ,Access Caused an Abort Type" "Read,Write" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." endif endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x0015++0x00 line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" else hgroup.long c15:0x0015++0x00 hide.long 0x00 "ADFSR,Auxiliary Data Fault Status Register" endif group.long c15:0x0006++0x00 line.long 0x00 "DFAR,Data Fault Address Register" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access flag fault/First level,Access flag fault/Second level,Access flag fault/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/First level,Synchronous external abort on translation table walk/Second level,Synchronous external abort on translation table walk/Third level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/First level,Synchronous parity error on memory access on translation table walk/Second level,Synchronous parity error on memory access on translation table walk/Third level,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug event,Access flag fault/First level,Reserved,Translation fault/First level,Access flag fault/Second level,Translation fault/Second level,Non-translation/synchronous external abort,Domain fault/First level,Reserved,Domain fault/Second level,Synchronous external abort on translation table walk/First level,Permission fault/First level,Synchronous external abort on translation table walk/Second level,Permission fault/Second level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access,Reserved,Reserved,Synchronous parity error on translation table walk,Reserved,Synchronous parity error on translation table walk,Reserved" endif elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") if (((d.l(c15:0x0202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--5. " STATUS ,Generated Exception Type" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/First level,Translation fault/Second level,Translation fault/Third level,Reserved,Access fault flag/First level,Access fault flag/Second level,Access fault flag/Third level,Reserved,Permission fault/First level,Permission fault/Second level,Permission fault/Third level,Synchronous external abort,Reserved,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Reserved,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Non-translation/synchronous external,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,?..." endif elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--5. " STATUS ,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Reserved,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Alignment fault,Debug event,?..." else group.long c15:0x0105++0x00 line.long 0x00 "IFSR,Instruction Fault Status Register" bitfld.long 0x00 12. " EXT ,External Abort Type" "DECERR,SLVERR" bitfld.long 0x00 9. " LPAE ,Large physical address extension" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--3. 10. " FS ,Generated Exception Type" "Reserved,Alignment,Debug,Access/section,Reserved,Translation/section,Access/page,Translation/page,Reserved,Domain/section,Reserved,Domain/page,L1/external,Permission/section,L2/external,Permission/page,TLB,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external,?..." endif endif group.long c15:0x0206++0x00 line.long 0x00 "IFAR,Instruction Fault Address Register" if (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x0) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" hexmask.quad.byte 0x00 56.--63. 1. " ATTR ,Memory attributes for the returned PA" hexmask.quad 0x00 12.--39. 0x1000 " PA ,Physical Address" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.quad 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.quad 0x00 7.--8. " SH ,Shareability attribute" "Non-shareable,Unpredictable,Outer Shareable,Inner Shareable" bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x80000000&&((d.q(c15:0x0047))&0x1)==0x1) group.quad c15:0x0047++0x01 line.quad 0x00 "PAR,Physical Address Register" bitfld.quad 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.quad 0x00 9. " FSTAGE ,Translation stage at which the translation aborted" "Stage 1,Stage 2" bitfld.quad 0x00 8. " S2WLK ,Stage 2 fault during a stage 1 translation table walk" "Not occurred,Occurred" textline " " bitfld.quad 0x00 1.--6. " FS ,Fault status field" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Asynchronous external abort,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access, Asynchronous parity error on memory access,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st lvl,Synchronous parity error on memory access on translation table walk/2nd lvl,Synchronous parity error on memory access on translation table walk/3rd lvl,Reserved,Alignment fault,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Domain fault/1st lvl,Domain fault/2nd lvl,Reserved" textline " " bitfld.quad 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x0) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" hexmask.long.tbyte 0x00 12.--31. 0x1000 " PA ,Physical Address" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" bitfld.long 0x00 10. " NOS ,Not Outer Shareable attribute" "Outer shareable,Not outer shareable" textline " " bitfld.long 0x00 9. " NS ,Non-secure" "Secure,Non-secure" bitfld.long 0x00 7. " SH ,Shareability attribute" "Non-shareable,Shareable" bitfld.long 0x00 4.--6. " INNER ,Inner memory attributes" "Non-cacheable,Strongly-ordered,-,Device,-,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate" textline " " bitfld.long 0x00 2.--3. " OUTER ,Outer memory attributes" "Non-cacheable,Write-Back Write-Allocate,Write-Through no Write-Allocate,Write-Back no Write-Allocate" bitfld.long 0x00 1. " SS ,Supersection" "Not a Supersection,Supersection" bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " elif (((d.l(c15:0x202))&0x80000000)==0x00&&((d.q(c15:0x0047))&0x1)==0x1) group.long c15:0x0047++0x00 line.long 0x00 "PAR,Physical Address Register" bitfld.long 0x00 11. " LPAE ,Long-descriptor translation table format use" "Not used,Used" textline " " bitfld.long 0x00 1.--6. " FS ,Fault status" "Reserved,Alignment fault,Debug event,Access flag fault/1st lvl,Fault on instruction cache maintenance,Translation fault/1st lvl,Access flag fault/2nd lvl,Translation fault/2nd lvl,Synchronous external abort,Domain fault/1st lvl,Reserved,Domain fault/2nd lvl,Synchronous external abort on translation table walk/1st lvl,Permission fault/1st lvl,Synchronous external abort on translation table walk/2nd lvl,Permission fault/2nd lvl,TLB conflict abort,Reserved,Reserved,Reserved,Reserved,Reserved,Asynchronous external abort,Reserved,Asynchronous parity error on memory access,Synchronous parity error on memory access,,,Synchronous parity error on translation table walk/1st lvl,Reserved,Synchronous parity error on translation table walk/2nd lvl,Reserved,?..." textline " " bitfld.long 0x00 0. " F ,Conversion completed successfully" "Successful,Unsuccessful" textline " " endif if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x002A++0x00 line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x012A++0x00 line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x003A++0x00 line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x013A++0x00 line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x003A++0x00 hide.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x013A++0x00 hide.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1" endif else group.long c15:0x002A++0x0 line.long 0x00 "PRRR,Primary Region Remap Register" bitfld.long 0x00 31. " NOS7 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 30. " NOS6 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 29. " NOS5 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS4 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 27. " NOS3 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 26. " NOS2 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS1 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 24. " NOS0 ,Outer Shareable property mapping for memory attributes" "Outer,Inner" bitfld.long 0x00 19. " NS1 ,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped" textline " " bitfld.long 0x00 18. " NS0 ,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped" bitfld.long 0x00 17. " DS1 ,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped" bitfld.long 0x00 16. " DS0 ,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped" textline " " bitfld.long 0x00 14.--15. " TR7 ,{TEX[0] C B} = b111 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 12.--13. " TR6 ,{TEX[0] C B} = b110 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 10.--11. " TR5 ,{TEX[0] C B} = b101 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 8.--9. " TR4 ,{TEX[0] C B} = b100 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 6.--7. " TR3 ,{TEX[0] C B} = b011 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 4.--5. " TR2 ,{TEX[0] C B} = b010 Remap" "Strongly ordered,Device,Normal,UNP" textline " " bitfld.long 0x00 2.--3. " TR1 ,{TEX[0] C B} = b001 Remap" "Strongly ordered,Device,Normal,UNP" bitfld.long 0x00 0.--1. " TR0 ,{TEX[0] C B} = b000 Remap" "Strongly ordered,Device,Normal,UNP" group.long c15:0x012A++0x0 line.long 0x00 "NMRR,Normal Memory Remap Register" bitfld.long 0x00 30.--31. " OR7 ,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 28.--29. " OR6 ,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 26.--27. " OR5 ,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 24.--25. " OR4 ,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 22.--23. " OR3 ,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 20.--21. " OR2 ,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 18.--19. " OR1 ,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 16.--17. " OR0 ,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 14.--15. " IR7 ,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 12.--13. " IR6 ,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 10.--11. " IR5 ,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 8.--9. " IR4 ,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 6.--7. " IR3 ,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 4.--5. " IR2 ,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" bitfld.long 0x00 2.--3. " IR1 ,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " bitfld.long 0x00 0.--1. " IR0 ,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through no allocate,Write-back no allocate" textline " " endif if (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x400F++0x00 line.long 0x00 "CBAR,Configuration Base Address Register" hexmask.long.tbyte 0x00 15.--31. 0x80 " PERIPHBASE[31:15] ,Periphbase[31:15]" hexmask.long.byte 0x00 0.--7. 1. " PERIPHBASE[39:32] ,Periphbase[39:32]" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") hgroup.long c15:0x400F++0x00 hide.long 0x00 "CBAR,Configuration Base Address Register" endif textline " " if (((d.l(c15:0x202))&0x80000000)==0x80000000) group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" else group.long c15:0x10d++0x00 line.long 0x0 "CONTEXTIDR,Context ID Register" hexmask.long.tbyte 0x00 8.--31. 1. " PROCID ,Process identifier" hexmask.long.byte 0x00 0.--7. 1. " ASID ,Address space identifier" endif group.long c15:0x020D++0x00 line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register" group.long c15:0x030D++0x00 line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register" group.long c15:0x040D++0x00 line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register" group.long c15:0x420D++0x00 line.long 0x00 "HTPIDR,Hyp Software Thread ID Register" tree.end width 15. tree "Virtualization Extensions" group.long c15:0x4000++0x00 line.long 0x0 "VPIDR,Virtualization Processor ID Register" group.long c15:0x4500++0x00 line.long 0x0 "VMPIDR,Virtualization Multiprocessor ID Register" group.long c15:0x4001++0x00 line.long 0x00 "HSCTLR,System Control Register" bitfld.long 0x0 30. " TE ,Thumb exception enable" "ARM,Thumb" bitfld.long 0x0 25. " EE ,Exception endianness" "Little,Big" bitfld.long 0x0 19. " WXN ,Write permission implies XN" "Not forced,Forced" textline " " bitfld.long 0x0 12. " I ,Instruction Cache Enable" "Disabled,Enabled" bitfld.long 0x0 2. " C ,Enable unified cache or data cache" "Disabled,Enabled" bitfld.long 0x0 1. " A ,Strict Alignment" "Disabled,Enabled" textline " " bitfld.long 0x0 0. " M ,Enable address translation" "Disabled,Enabled" group.long c15:0x4011++0x00 line.long 0x00 "HCR,Hyp Configuration Register" bitfld.long 0x00 27. " TGE ,Trap General Exceptions" "Disabled,Enabled" bitfld.long 0x00 26. " TVM ,Trap Virtual Memory Controls" "Disabled,Enabled" bitfld.long 0x00 25. " TTLB ,Trap TLB maintenance instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " TPU ,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled" bitfld.long 0x00 23. " TPC ,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled" bitfld.long 0x00 22. " TSW ,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " TAC ,Trap Auxiliary Control Register Accesses" "Disabled,Enabled" bitfld.long 0x00 20. " TIDCP ,Trap Lockdown" "Disabled,Enabled" bitfld.long 0x00 19. " TSC ,Trap SMC" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " TID3 ,Trap ID Group 3" "Disabled,Enabled" bitfld.long 0x00 17. " TID2 ,Trap ID Group 2" "Disabled,Enabled" bitfld.long 0x00 16. " TID1 ,Trap ID Group 1" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " TID0 ,Trap ID Group 0" "Disabled,Enabled" bitfld.long 0x00 14. " TWE ,Trap WFE" "Disabled,Enabled" bitfld.long 0x00 13. " TWI ,Trap WFI" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " DC ,Default Cacheable" "Disabled,Enabled" bitfld.long 0x00 10.--11. " BSU ,Barrier Shareability Upgrade" "No effect,Inner,Outer,Full system" bitfld.long 0x00 9. " FB ,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " VA ,Virtual External Asynchronous Abort" "Not aborted,Aborted" bitfld.long 0x00 7. " VI ,Virtual IRQ interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VF ,Virtual FIQ interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " AMO ,A-bit Mask Override" "No override,Override" bitfld.long 0x00 4. " IMO ,I-bit Mask Override" "No override,Override" bitfld.long 0x00 3. " FMO ,F-bit Mask Override" "No override,Override" textline " " bitfld.long 0x00 2. " PTW ,Protected Table Walk" "Disabled,Enabled" bitfld.long 0x00 1. " SWIO ,Set/Way Invalidation Override" "No override,Override" bitfld.long 0x00 0. " VM ,Second Stage of Translation Enable" "Disabled,Enabled" group.long c15:0x4111++0x00 line.long 0x00 "HDCR,Hyp Debug Control Register" bitfld.long 0x00 11. " TDRA ,Trap Debug ROM Access" "No effect,Valid" bitfld.long 0x00 10. " TDOSA ,Trap Debug OS-related register Access" "No effect,Valid" bitfld.long 0x00 9. " TDA ,Trap Debug Access" "No effect,Valid" textline " " bitfld.long 0x00 8. " TDE ,Trap Debug Exceptions" "No effect,Valid" bitfld.long 0x00 7. " HPME ,Hypervisor Performance Monitors Enable" "Disabled,Enabled" bitfld.long 0x00 6. " TPM ,Trap Performance Monitors accesses" "No effect,Valid" textline " " bitfld.long 0x00 5. " TPMCR ,Trap Performance Monitor Control Register accesses" "No effect,Valid" bitfld.long 0x00 0.--4. " HPMN ,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long c15:0x4211++0x00 line.long 0x00 "HCPTR,Hyp Coprocessor Trap Register" bitfld.long 0x0 31. " TCPAC ,Trap Coprocessor Access Control" "Not trapped,Trapped" bitfld.long 0x0 15. " TASE ,Trap Advanced SIMD extensions" "Not trapped,Trapped" bitfld.long 0x0 11. " TCP11 ,Trap coprocessor 11" "Not trapped,Trapped" textline " " bitfld.long 0x0 10. " TCP10 ,Trap coprocessor 10" "Not trapped,Trapped" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4311++0x00 line.long 0x00 "HSTR,Hyp System Trap Register" bitfld.long 0x00 17. " TJDBX ,Trap Jazelle-DBX" "Disabled,Enabled" bitfld.long 0x00 16. " TTEE ,Trap ThumbEE" "Disabled,Enabled" bitfld.long 0x00 15. " T15 ,Trap to Hyp mode Non-secure priv 15" "Not trapped,Trapped" textline " " bitfld.long 0x00 13. " T13 ,Trap to Hyp mode Non-secure priv 13" "Not trapped,Trapped" bitfld.long 0x00 12. " T12 ,Trap to Hyp mode Non-secure priv 12" "Not trapped,Trapped" bitfld.long 0x00 11. " T11 ,Trap to Hyp mode Non-secure priv 11" "Not trapped,Trapped" textline " " bitfld.long 0x00 10. " T10 ,Trap to Hyp mode Non-secure priv 10" "Not trapped,Trapped" bitfld.long 0x00 9. " T9 ,Trap to Hyp mode Non-secure priv 9" "Not trapped,Trapped" bitfld.long 0x00 8. " T8 ,Trap to Hyp mode Non-secure priv 8" "Not trapped,Trapped" textline " " bitfld.long 0x00 7. " T7 ,Trap to Hyp mode Non-secure priv 7" "Not trapped,Trapped" bitfld.long 0x00 6. " T6 ,Trap to Hyp mode Non-secure priv 6" "Not trapped,Trapped" bitfld.long 0x00 5. " T5 ,Trap to Hyp mode Non-secure priv 5" "Not trapped,Trapped" textline " " bitfld.long 0x00 3. " T3 ,Trap to Hyp mode Non-secure priv 3" "Not trapped,Trapped" bitfld.long 0x00 2. " T2 ,Trap to Hyp mode Non-secure priv 2" "Not trapped,Trapped" bitfld.long 0x00 1. " T1 ,Trap to Hyp mode Non-secure priv 1" "Not trapped,Trapped" textline " " bitfld.long 0x00 0. " T0 ,Trap to Hyp mode Non-secure priv 0" "Not trapped,Trapped" group.quad c15:0x14020++0x01 line.quad 0x00 "HTTBR,Hyp Translation Table Base Register" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4202++0x00 line.long 0x00 "HTCR,Hyp Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using HTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using HTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" group.quad c15:0x16020++0x01 line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register" hexmask.quad.byte 0x00 48.--55. 1. " VMID ,VMID for the translation table" hexmask.quad 0x00 0.--39. 1. " BADDR ,Translation table base address" group.long c15:0x4212++0x00 line.long 0x00 "VTCR,Virtualization Translation Control Register" bitfld.long 0x00 12.--13. " SH0 ,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable" bitfld.long 0x00 10.--11. " ORGN0 ,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 8.--9. " IRGN0 ,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable" textline " " bitfld.long 0x00 6.--7. " SL0 ,Starting Level for VTCR addressed region" "Second level,First level,Reserved,Reserved" bitfld.long 0x00 4. " S ,Sign extension bit" "0,1" bitfld.long 0x00 0.--3. " T0SZ ,The Size offset(four-bit signed integer) of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x4015++0x00 line.long 0x00 "HADFSR,Hyp Auxiliary Data Fault Status Syndrome Register" bitfld.long 0x00 31. " VALID ,L1 or L2 ECC double bit error indicator" "No error,Error" hexmask.long.byte 0x00 24.--30. 1. " RAMID ,RAM identifier" bitfld.long 0x00 23. " L2E ,L2 Error" "No error,Error" textline " " bitfld.long 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" endif group.long c15:0x4006++0x00 line.long 0x00 "HDFAR,Hyp Data Fault Address Register" group.long c15:0x4025++0x00 line.long 0x00 "HSR,Hyp Syndrome Register" bitfld.long 0x00 26.--31. " EC ,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to CP15,Trapped MCRR/MRRC to CP15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hyp mode Instruction Abort,Executing within Hyp mode Instruction Abort,Reserved,Reserved,Entry into Hyp mode Data Abort,Executing within Hyp mode Data Abort,?..." textline " " bitfld.long 0x00 25. " IL ,Instruction length" "16-bit,32-bit" hexmask.long 0x00 0.--24. 1. " ISS ,Instruction specific syndrome" group.long c15:0x4206++0x00 line.long 0x00 "HIFAR,Hyp Instruction Fault Address Register" group.long c15:0x4406++0x00 line.long 0x00 "HPFAR,Hyp IPA Fault Address Register" hexmask.long 0x00 4.--31. 1. " FIPA ,Faulting IPA bits" textline " " hgroup.long c15:0x407++0x00 hide.long 0x00 "NOP,No Operation Register" in wgroup.long c15:0x17++0x00 line.long 0x00 "ICIALLUIS,Invalidate All Instruction Caches To PoU Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x617++0x00 line.long 0x00 "BPIALLIS,Invalidate Entire Branch Predictor Array Inner Shareable Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x57++0x00 line.long 0x00 "ICIALLU,Invalidate Entire Instruction Cache Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x157++0x00 line.long 0x00 "ICIMVAU,Invalidate Instruction Cache Line by VA to Point-of-Unification Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x457++0x00 line.long 0x00 "CP15ISB,Instruction Synchronization Barrier Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x657++0x00 line.long 0x00 "BPIALL,Invalidate Entire Branch Predictor Array (NOP) Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x757++0x00 line.long 0x00 "BPIMVA,Invalidate MVA From Branch Predictors Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.word 0x00 5.--15. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x167++0x00 line.long 0x00 "DCIMVAC,Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x267++0x00 line.long 0x00 "DCISW,Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x0087++0x00 line.long 0x00 "ATS1CPR,Stage 1 current state PL1 read" wgroup.long c15:0x0187++0x00 line.long 0x00 "ATS1CPW,Stage 1 current state PL1 write" wgroup.long c15:0x0287++0x00 line.long 0x00 "ATS1CUR,Stage 1 current state unprivileged (PL0) read" wgroup.long c15:0x0387++0x00 line.long 0x00 "ATS1CUW,Stage 1 current state unprivileged (PL0) write" wgroup.long c15:0x0487++0x00 line.long 0x00 "ATS12NSOPR,Stages 1 and 2 Non-secure PL1 read" wgroup.long c15:0x0587++0x00 line.long 0x00 "ATS12NSOPW,Stages 1 and 2 Non-secure PL1 write" wgroup.long c15:0x0687++0x00 line.long 0x00 "ATS12NSOUR,Stages 1 and 2 Non-secure unprivileged (PL0) read" wgroup.long c15:0x0787++0x00 line.long 0x00 "ATS12NSOUW,Stages 1 and 2 Non-secure unprivileged (PL0) write" wgroup.long c15:0x1a7++0x00 line.long 0x00 "DCCMVAC,Clean Data Cache Line to PoC by VA Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x2a7++0x00 line.long 0x00 "DCCSW,Clean Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" bitfld.long 0x00 1.--3. " LEVEL ,Cache level" "0,1,2,3,4,5,6,7" wgroup.long c15:0x4a7++0x00 line.long 0x00 "CP15DSB,Data Synchronization Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x5a7++0x00 line.long 0x00 "CP15DMB,Data Memory Barrier Register" hexmask.long 0x00 5.--31. 0x20 " ADDRESS ,Address to invalidate or clean" wgroup.long c15:0x1b7++0x00 line.long 0x00 "DCCMVAU,Clean Data Or Unified Cache Line By VA To PoU Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x1e7++0x00 line.long 0x00 "DCCIMVAC,Clean and Invalidate Data Cache Line by VA to PoC Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x2e7++0x00 line.long 0x00 "DCCISW,Clean and Invalidate Data Cache Line by Set/Way Register" bitfld.long 0x00 30.--31. " WAY ,Cache way to invalidate or clean" "0,1,2,3" hexmask.long.byte 0x00 5.--10. 1. " SET ,Cache set to invalidate or clean" wgroup.long c15:0x4087++0x00 line.long 0x00 "ATS1HR,Address Translate Stage 1 Hyp mode Read" wgroup.long c15:0x4187++0x00 line.long 0x00 "ATS1HW,Address Translate Stage 1 Hyp mode Write" wgroup.long c15:0x0038++0x00 line.long 0x00 "TLBIALLIS,Invalidate entire TLB Inner Shareable" wgroup.long c15:0x0138++0x00 line.long 0x00 "TLBIMVAIS,Invalidate unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x0238++0x00 line.long 0x00 "TLBIASIDIS,Invalidate unified TLB byASID match Inner Shareable" wgroup.long c15:0x0338++0x00 line.long 0x00 "TLBIMVAAIS,Invalidate unified TLB by MVA all ASID Inner Shareable" wgroup.long c15:0x0058++0x00 line.long 0x00 "ITLBIALL,Invalidate instruction TLB" wgroup.long c15:0x0158++0x00 line.long 0x00 "ITLBIMVA,Invalidate instruction TLB entry by MVA" wgroup.long c15:0x0258++0x00 line.long 0x00 "ITLBIASID,Invalidate instruction TLB by ASID match" wgroup.long c15:0x0068++0x00 line.long 0x00 "DTLBIALL,Invalidate data TLB" wgroup.long c15:0x0168++0x00 line.long 0x00 "DTLBIMVA,Invalidate data TLB entry by MVA" wgroup.long c15:0x0268++0x00 line.long 0x00 "DTLBIASID,Invalidate data TLB by ASID match" wgroup.long c15:0x0078++0x00 line.long 0x00 "TLBIALL,Invalidate unified TLB" wgroup.long c15:0x0178++0x00 line.long 0x00 "TLBIMVA,Invalidate unified TLB entry by MVA" wgroup.long c15:0x0278++0x00 line.long 0x00 "TLBIASID,Invalidate unified TLB byASID match" wgroup.long c15:0x0378++0x00 line.long 0x00 "TLBIMVAA,Invalidate unified TLB by MVA all ASID" wgroup.long c15:0x4038++0x00 line.long 0x00 "TLBIALLHIS,Invalidate entire Hyp unified TLB Inner Shareable" wgroup.long c15:0x4138++0x00 line.long 0x00 "TLBIMVAHIS,Invalidate Hyp unified TLB entry by MVA Inner Shareable" wgroup.long c15:0x4438++0x00 line.long 0x00 "TLBIALLNSNHIS,Invalidate entire Non-secure Non-Hyp unified TLB Inner Shareable" wgroup.long c15:0x4078++0x00 line.long 0x00 "TLBIALLH,Invalidate entire Hyp unified TLB" wgroup.long c15:0x4178++0x00 line.long 0x00 "TLBIMVAH,Invalidate Hyp unified TLB entry by MVA" wgroup.long c15:0x4478++0x00 line.long 0x00 "TLBIALLNSNH,Invalidate entire Non-secure Non-Hyp unified TLB" group.long c15:0x402A++0x00 line.long 0x00 "HMAIR0,Hyp Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x412A++0x00 line.long 0x00 "HMAIR1,Hyp Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x403A++0x00 line.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR3 ,Attribute 3" hexmask.long.byte 0x00 16.--23. 1. " ATTR2 ,Attribute 2" hexmask.long.byte 0x00 8.--15. 1. " ATTR1 ,Attribute 1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR0 ,Attribute 0" group.long c15:0x413A++0x00 line.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR7 ,Attribute 7" hexmask.long.byte 0x00 16.--23. 1. " ATTR6 ,Attribute 6" hexmask.long.byte 0x00 8.--15. 1. " ATTR5 ,Attribute 5" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR4 ,Attribute 4" else hgroup.long c15:0x403A++0x00 hide.long 0x00 "HAMAIR0,Hyp Auxiliary Memory Attribute Indirection Register 0" hgroup.long c15:0x413A++0x00 hide.long 0x00 "HAMAIR1,Hyp Auxiliary Memory Attribute Indirection Register 1" endif group.long c15:0x400C++0x00 line.long 0x00 "HVBAR,Hyp Vector Base Address Register" hexmask.long 0x00 5.--31. 0x20 " HVBADDR ,Hyp Vector Base Address" tree.end width 12. tree "Cache Control and Configuration" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." bitfld.long 0x00 18.--20. " CTYPE7 ,Cache type for levels 7" "No cache,?..." textline " " bitfld.long 0x00 15.--17. " CTYPE6 ,Cache type for levels 6" "No cache,?..." bitfld.long 0x00 12.--14. " CTYPE5 ,Cache type for levels 5" "No cache,?..." bitfld.long 0x00 9.--11. " CTYPE4 ,Cache type for levels 4" "No cache,?..." bitfld.long 0x00 6.--8. " CTYPE3 ,Cache type for levels 3" "No cache,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1100++0x0 line.long 0x0 "CLIDR,Cache Level ID Register" bitfld.long 0x00 27.--29. " LOUU ,Level of Unification Uniprocessor" "Reserved,Level 2,?..." bitfld.long 0x00 24.--26. " LOC ,Level of Coherency" "Reserved,Reserved,Level 3,?..." bitfld.long 0x00 21.--23. " LOUIS ,Level of Unification Inner Shareable" "Reserved,Level 2,?..." textline " " bitfld.long 0x00 3.--5. " CTYPE2 ,Cache type for levels 2" "Not implemented,Reserved,Reserved,Reserved,Unified,?..." bitfld.long 0x00 0.--2. " CTYPE1 ,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..." endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " SETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,Reserved,16 words,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x1000++0x0 line.long 0x0 "CCSIDR,Current Cache Size ID Register" bitfld.long 0x00 31. " WT ,Write-Through" "Not Supported,Supported" bitfld.long 0x00 30. " WB ,Write-Back" "Not Supported,Supported" bitfld.long 0x00 29. " RA ,Read-Allocate" "Not Supported,Supported" textline " " bitfld.long 0x00 28. " WA ,Write-Allocate" "Not Supported,Supported" hexmask.long.word 0x00 13.--27. 1. " NUMSETS ,Number of Sets" hexmask.long.word 0x00 3.--12. 1. " ASSOC ,Associativity" textline " " bitfld.long 0x00 0.--2. " LSIZE ,Line Size" "Reserved,8 words,16 words,?..." endif group.long c15:0x2000++0x0 line.long 0x0 "CSSELR,Cache Size Selection Register" bitfld.long 0x00 1.--3. " LEVEL ,Cache level of required cache" "Level 1,Level 2,?..." bitfld.long 0x00 0. " IND ,Instruction/Not Data" "Data/Unified,Instruction" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c15:0x10EF++0x00 line.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" bitfld.long 0x00 1.--2. " LEVEL ,Cache level" "L1,L2,Reserved,Reserved" else hgroup.long c15:0x10EF++0x00 hide.long 0x00 "DCCIALL,Data Cache Clean and Invalidate All Register" endif tree "Level 1 memory system" width 10. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x000F++0x00 line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register" group.long c15:0x010F++0x00 line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register" group.long c15:0x020F++0x00 line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register" group.long c15:0x001F++0x00 line.long 0x00 "DL1DATA0,Data L1 Data 0 Register" group.long c15:0x011F++0x00 line.long 0x00 "DL1DATA1,Data L1 Data 1 Register" group.long c15:0x021F++0x00 line.long 0x00 "DL1DATA2,Data L1 Data 2 Register" group.long c15:0x031F++0x00 line.long 0x00 "DL1DATA3,Data L1 Data 3 Register" wgroup.long c15:0x004F++0x00 line.long 0x00 "RAMINDEX,RAM Index Register" hexmask.long.byte 0x00 24.--31. 1. " RAMID ,RAM identifier" bitfld.long 0x00 18.--21. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.tbyte 0x00 0.--17. 1. " IND ,Index" textline " " group.quad c15:0x100F0++0x01 line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--22. " B/W ,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.tbyte 0x00 6.--29. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CWDO ,Cache word data offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 31. " CW ,Cache Way" "Low,High" hexmask.long 0x00 5.--30. 1. " SI ,Set index" bitfld.long 0x00 2.--4. " CDEO ,Cache data element offset" "0,1,2,3,4,5,6,7" wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 31. " TLB_WAY ,TLB Way" "Low,High" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c15:0x300F++0x0 line.long 0x00 "CDBGDR0,Data Register 0" bitfld.long 0x00 31. " PMOESID ,Partial MOESI state / Dirty" "Low,High" bitfld.long 0x00 30. " POMA ,Partial Outer memory attribute" "Low,High" bitfld.long 0x00 29. " PMOESIE ,Partial MOESI state / Exclusive" "Low,High" textline " " bitfld.long 0x00 28. " PMOESIV ,Partial MOESI state / Valid" "Low,High" bitfld.long 0x00 27. " NS ,Non-Secure state" "Low,High" hexmask.long 0x00 0.--26. 1. " TA ,Tag Address" rgroup.long c15:0x310F++0x0 line.long 0x00 "CDBGDR1,Data Register 1" bitfld.long 0x00 0. " PMOESID ,Partial MOESI state / Globally shared" "Low,High" rgroup.long c15:0x320F++0x0 line.long 0x00 "CDBGDR2,Data Register 2" wgroup.long c15:0x302F++0x0 line.long 0x00 "CDBGDCT,Data Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" wgroup.long c15:0x312F++0x0 line.long 0x00 "CDBGICT,Instruction Cache Tag Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long 0x00 6.--30. 1. " SI ,Set index" wgroup.long c15:0x304F++0x0 line.long 0x00 "CDBGDCD,Data Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" if (((d.l(c15:0x1000))&0xFFFE000)==0x1DE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--12. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x1) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.byte 0x00 6.--13. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FE000&&((d.l(c15:0x2000))&0x3)==0x2) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--15. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--16. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x7FE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--17. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0xFFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--18. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x1FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--19. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" elif (((d.l(c15:0x1000))&0xFFFE000)==0x3FFE000) wgroup.long c15:0x314F++0x0 line.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" bitfld.long 0x00 30.--31. " CW ,Cache Way" "0,1,2,3" hexmask.long.word 0x00 6.--20. 1. " SI ,Set index" bitfld.long 0x00 3.--5. " CDDO ,Cache doubleword data offset" "0,1,2,3,4,5,6,7" else hgroup.long c15:0x314F++0x0 hide.long 0x00 "CDBGICD,Instruction Cache Data Read Operation Register" endif if (((d.l(c15:0x324F))&0x100)==0x100) wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" else wgroup.long c15:0x324F++0x0 line.long 0x00 "CDBGTD,TLB Data Read Operation Register" bitfld.long 0x00 30.--31. " TLB_WAY ,TLB Way" "0,1,2,3" bitfld.long 0x00 8. " TYPE ,Type" "RAM0,RAM1" hexmask.long.byte 0x00 0.--7. 1. " TLB_IND ,TLB index" endif endif tree.end tree "Level 2 memory system" width 11. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" textline " " bitfld.long 0x00 21. " ECCPE ,ECC and parity enable" "Disabled,Enabled" bitfld.long 0x00 12. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 10.--11. " DRAMSLICE ,Data RAM slice" "0,1,2,Invalid" textline " " bitfld.long 0x00 9. " TRAMS ,L2 Tag RAM setup" "0 cycle,1 cycle" bitfld.long 0x00 6.--8. " TRAML ,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles" bitfld.long 0x00 5. " DRAMS ,L2 Data RAM setup" "0 cycle,1 cycle" textline " " bitfld.long 0x00 0.--2. " DRAML ,L2 Data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" bitfld.long 0x00 24.--25. " NCPU ,Number of CPU" "1,2,3,4" bitfld.long 0x00 23. " IE ,Interrupt Controller" "Not present,Present" bitfld.long 0x00 0. " DRAML ,L2 data RAM latency" "2 cycles,3 cycles" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1209++0x0 line.long 0x00 "L2CTLR,L2 Control Register" rbitfld.long 0x00 31. " L2RSTDISABLE ,L2 hardware reset disable pin monitor" "No,Yes" bitfld.long 0x00 27.--30. " IWINC ,Controls index incrementation method" "1.,1.,3.,7.,15.,31.,63.,127.,255.,511.,1023.,2047.,4095.,8191.,8191.,8191." rbitfld.long 0x00 24.--25. " NCPU , Number of CPU" "1,2,3,4" bitfld.long 0x00 20. " SFEN , Snoop Filter Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " L2ECCD ,L2 ECC Disable" "No,Yes" bitfld.long 0x00 18. " L2CD ,L2 cache disable" "No,Yes" bitfld.long 0x00 15.--17. " TRAMSL ,Tag RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 12.--14. " TRAMRL ,Tag RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" textline " " bitfld.long 0x00 9.--11. " TRAMWL ,Tag RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 6.--8. " DRAMSL ,Data RAM setup latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 3.--5. " DRAMRL ,Data RAM read latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" bitfld.long 0x00 0.--2. " DRAMWL ,Data RAM write latency" "1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " L2INTASYNCERR ,L2 internal asynchronous error" "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" group.long c15:0x100F++0x00 line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register" bitfld.long 0x00 28. " FL2TBCEA ,Forces L2 tag bank clock enable active" "Not forced,Forced" bitfld.long 0x00 27. " FL2LCEA ,Forces L2 logic clock enable active" "Not forced,Forced" bitfld.long 0x00 26. " EL2GTRCG ,Enables L2 GIC and Timer regional clock gates" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ERTSI ,Enables replay threshold single issue" "Disabled,Enabled" bitfld.long 0x00 15. " ECWRM ,Enable CPU WFI retention mode" "Disabled,Enabled" bitfld.long 0x00 14. " EUCE ,Enables UniqueClean evictions with data" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " DSCDT ,Disables SharedClean data transfers" "No,Yes" bitfld.long 0x00 12. " DWCWBE ,Disable multiple outstanding WriteClean/WriteBack/Evicts using the same AWID" "No,Yes" bitfld.long 0x00 11. " DDSB ,Disables DSB with no DVM synchronization" "No,Yes" textline " " bitfld.long 0x00 10. " DNSDAR ,Disables non-secure debug array read" "No,Yes" bitfld.long 0x00 9. " EPF ,Enable use of Prefetch bit in L2 cache replacement algorithm" "Disabled,Enabled" bitfld.long 0x00 8. " DDVMCMOMB ,Disables Distributed Virtual Memory (DVM) transactions and cache maintenance operation message broadcast" "No,Yes" textline " " bitfld.long 0x00 7. " EHDT ,Enables hazard detect timeout" "Disabled,Enabled" bitfld.long 0x00 6. " DSTFM ,Disables shared transactions from master" "No,Yes" bitfld.long 0x00 4. " DWUAWLUTFM ,Disables WriteUnique and WriteLineUnique transactions from master" "No,Yes" textline " " bitfld.long 0x00 3. " DCEPTE ,Disables clean/evict push to external" "No,Yes" bitfld.long 0x00 2. " LTORPTB ,Limit to one request per tag bank" "Disabled,Enabled" bitfld.long 0x00 1. " EARTT ,Enable arbitration replay threshold timeout" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DPF ,Disable prefetch forwarding" "No,Yes" group.long c15:0x130F++0x00 line.long 0x00 "L2PFR,L2 Prefetch Control Register" bitfld.long 0x00 12. " DDTOLSPR ,Disable dynamic throttling of load/store prefetch requests" "No,Yes" bitfld.long 0x00 11. " EPRFRUT ,Enable prefetch request from ReadUnique transactions" "Disabled,Enabled" bitfld.long 0x00 10. " DTWDAP ,Disable table walk descriptor access prefetch" "No,Yes" textline " " bitfld.long 0x00 7.--8. " L2IFPD ,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines" bitfld.long 0x00 4.--5. " L2LSDPD ,L2 load/store data prefetch distance" "0 lines,2 lines,4 lines,8 lines" textline " " group.quad c15:0x110F0++0x01 line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" bitfld.quad 0x00 63. " FATAL ,Fatal bit" "0,1" hexmask.quad.byte 0x00 40.--47. 1. " OEC ,Other error count" hexmask.quad.byte 0x00 32.--39. 1. " REC ,Repeat error count" bitfld.quad 0x00 31. " VALID ,Valid bit" "Not valid,Valid" textline " " hexmask.quad.byte 0x00 24.--30. 1. " RAMID ,RAM Identifier" bitfld.quad 0x00 18.--21. " C/W ,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..." hexmask.quad.tbyte 0x00 0.--17. 1. " IND ,Index" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" hgroup.quad c15:0x110F0++0x01 hide.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c15:0x1309++0x0 line.long 0x00 "L2ECTLR,L2 Extended Control Register" bitfld.long 0x00 30. " ECCUNERR ,ECC uncorrectable error " "No error,Error" bitfld.long 0x00 29. " AXIASYNCERR ,AXI asynchronous error" "No error,Error" bitfld.long 0x00 0. " L2DRC ,Disable L2 retention" "No,Yes" rgroup.long c15:0x1609++0x00 line.long 0x00 "L2MRERRSR,L2 Memory Error Syndrome Register" bitfld.long 0x00 31. " FATAL ,Fatal bit" "0,1" bitfld.long 0x00 25.--30. " OEC ,Other error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 19.--24. " REC ,Repeat error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.word 0x00 6.--18. 1. " ERRLIND ,Index Error Location" textline " " bitfld.long 0x00 2.--5. " ERRLWAY ,Way Error Location" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 1. " RAMID ,RAM Identifier" "TAG,DATA" bitfld.long 0x00 0. " VALID ,Valid bit" "Not valid,Valid" endif tree.end tree.end width 12. tree "System Performance Monitor" group.long c15:0xc9++0x00 line.long 0x0 "PMCR,Performance Monitor Control Register" hexmask.long.byte 0x00 24.--31. 1. " IMP ,Implementer code" hexmask.long.byte 0x00 16.--23. 1. " IDCODE ,Identification code" bitfld.long 0x00 11.--15. " N ,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" textline " " bitfld.long 0x00 5. " DP ,Disable CCNT when prohibited" "No,Yes" bitfld.long 0x00 4. " X ,Export Enable" "Disabled,Enabled" bitfld.long 0x00 3. " D ,Clock Divider" "Every cycle,64th cycle" textline " " bitfld.long 0x00 2. " C ,Clock Counter Reset" "No reset,Reset" bitfld.long 0x00 1. " P ,Performance Counter Reset" "No reset,Reset" bitfld.long 0x00 0. " E ,All Counters Enable" "Disabled,Enabled" group.long c15:0x1c9++0x00 line.long 0x00 "PMNCNTENSET,Count Enable Set Register " bitfld.long 0x00 5. " P5 ,Event Counter 5 enable bit" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter 4 enable bit" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,Event Counter 3 enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,Event Counter 2 enable bit" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter 1 enable bit" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter 0 enable bit" "Disabled,Enabled" group.long c15:0x2c9++0x00 line.long 0x00 "PMCNTENCLR,Count Enable Clear Register" eventfld.long 0x00 5. " P5 ,Event Counter 5 clear bit" "Disabled,Enabled" eventfld.long 0x00 4. " P4 ,Event Counter 4 clear bit" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Event Counter 3 clear bit" "Disabled,Enabled" textline " " eventfld.long 0x00 2. " P2 ,Event Counter 2 clear bit" "Disabled,Enabled" eventfld.long 0x00 1. " P1 ,Event Counter 1 clear bit" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Event Counter 0 clear bit" "Disabled,Enabled" group.long c15:0x3c9++0x00 line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register" eventfld.long 0x00 5. " P5 ,PMN5 overflow" "No overflow,Overflow" eventfld.long 0x00 4. " P4 ,PMN4 overflow" "No overflow,Overflow" eventfld.long 0x00 3. " P3 ,PMN3 overflow" "No overflow,Overflow" textline " " eventfld.long 0x00 2. " P2 ,PMN2 overflow" "No overflow,Overflow" eventfld.long 0x00 1. " P1 ,PMN1 overflow" "No overflow,Overflow" eventfld.long 0x00 0. " P0 ,PMN0 overflow" "No overflow,Overflow" group.long c15:0x4c9++0x00 line.long 0x00 "PMSWINC,Performance Monitor Software Increment" bitfld.long 0x00 5. " P5 ,Increment PMN5" "No action,Increment" bitfld.long 0x00 4. " P4 ,Increment PMN4" "No action,Increment" bitfld.long 0x00 3. " P3 ,Increment PMN3" "No action,Increment" textline " " bitfld.long 0x00 2. " P2 ,Increment PMN2" "No action,Increment" bitfld.long 0x00 1. " P1 ,Increment PMN1" "No action,Increment" bitfld.long 0x00 0. " P0 ,Increment PMN0" "No action,Increment" group.long c15:0x5c9++0x00 line.long 0x00 "PMSELR,Performance Monitor Select Register" bitfld.long 0x00 0.--4. " SEL ,Current event counter select" "0,1,2,3,4,5,?..." group.long c15:0xd9++0x00 line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register" group.long c15:0x1d9++0x00 line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register" bitfld.long 0x00 31. " P ,Execution at PL1 events counting disable" "No,Yes" bitfld.long 0x00 30. " U ,Execution at PL0 events counting disable" "No,Yes" bitfld.long 0x00 29. " NSK ,Execution in Non-secure state at PL1 events counting disable" "No,Yes" bitfld.long 0x00 28. " NSU ,Execution in Non-secure state at PL0 events counting disable" "No,Yes" textline " " bitfld.long 0x00 27. " NSH ,Execution in Non-secure state at PL2 events counting enable" "Disabled,Enabled" hexmask.long.byte 0x00 0.--7. 1. " EVTCOUNT ,Event to count" group.long c15:0x2d9++0x00 line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register" group.long c15:0xe9++0x00 line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register" bitfld.long 0x00 0. " EN ,User mode access enable" "Disabled,Enabled" group.long c15:0x1e9++0x00 line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set" bitfld.long 0x00 5. " P5 ,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " P3 ,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " P2 ,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled" group.long c15:0x2e9++0x00 line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear" eventfld.long 0x00 5. " P5 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " P4 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 3. " P3 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 2. " P2 ,Overflow Interrupt Clear" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " P1 ,Overflow Interrupt Clear" "Disabled,Enabled" eventfld.long 0x00 0. " P0 ,Overflow Interrupt Clear" "Disabled,Enabled" group.long c15:0x3e9++0x00 line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register" bitfld.long 0x00 31. " C ,PMCCNTR overflow bit" "Not overflowed,Overflowed" bitfld.long 0x00 30. " P30 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 29. " P29 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 28. " P28 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " P27 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 26. " P26 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 25. " P25 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 24. " P24 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " P23 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 22. " P22 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 21. " P21 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 20. " P20 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " P19 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 18. " P18 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 17. " P17 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 16. " P16 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " P15 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 14. " P14 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 13. " P13 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 12. " P12 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " P11 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 10. " P10 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 9. " P9 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 8. " P8 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " P7 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 6. " P6 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 5. " P5 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 4. " P4 ,Event Counter Overflow" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " P3 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 2. " P2 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 1. " P1 ,Event Counter Overflow" "Disabled,Enabled" bitfld.long 0x00 0. " P0 ,Event Counter Overflow" "Disabled,Enabled" tree.end width 12. tree "System Timer Register" group.long c15:0x000E++0x00 line.long 0x00 "CNTFRQ,Counter Frequency Register" group.long c15:0x001E++0x00 line.long 0x00 "CNTKCTL,Timer PL1 Control Register" bitfld.long 0x00 9. " PL0PTEN ,Controls whether the physical timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 8. " PL0VTEN ,Controls whether the virtual timer registers are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" bitfld.long 0x00 1. " PL0VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline " " bitfld.long 0x00 0. " PL0PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" textline "" group.quad c15:0x100E0++0x01 line.quad 0x00 "CNTPCT,Counter Physical Count Register" group.quad c15:0x120E0++0x01 line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register" group.long c15:0x002E++0x00 line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Timer Value Register" group.long c15:0x012E++0x00 line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" textline "" group.quad c15:0x110E0++0x01 line.quad 0x00 "CNTVCT,Counter Virtual Count Register" group.quad c15:0x130E0++0x01 line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register" group.long c15:0x003E++0x00 line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register" group.long c15:0x013E++0x00 line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" group.quad c15:0x140E0++0x01 line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register" textline "" group.long c15:0x401E++0x00 line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register" bitfld.long 0x00 4.--7. " EVNTI ,Selects which bit of CNTPCTis the trigger for the event stream generated from the physical counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 3. " EVNTDIR ,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0" bitfld.long 0x00 2. " EVNTEN ,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " PL1VCTEN ,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" bitfld.long 0x00 0. " PL1PCTEN ,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from PL0 modes" "Not accessible,Accessible" group.quad c15:0x160E0++0x01 line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register" group.long c15:0x402E++0x00 line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register" group.long c15:0x412E++0x00 line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register" bitfld.long 0x00 2. " ISTATUS ,The status of the timer interrupt" "No interrupt,Interrupt" bitfld.long 0x00 1. " IMASK ,Timer interrupt mask bit" "Not masked,Masked" bitfld.long 0x00 0. " ENABLE ,Enables the timer" "Disabled,Enabled" tree.end width 11. width 15. tree "Debug Registers" rgroup.long c14:0.++0x0 line.long 0x0 "DBGDIDR,Debug ID Register" bitfld.long 0x0 28.--31. " WRP ,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 24.--27. " BRP ,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" bitfld.long 0x0 20.--23. " CTX_CMP ,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16" textline " " hexmask.long.byte 0x0 16.--19. 1. " VERSION ,Debug Architecture Version" bitfld.long 0x0 15. " DEVID ,Debug Device ID" "Low,High" bitfld.long 0x0 14. " NSUHD ,Secure User halting debug-mode" "Supported,Not supported" textline " " bitfld.long 0x0 13. " PCSR ,PC Sample register implemented" "Not implemented,Implemented" bitfld.long 0x0 12. " SE ,Security Extensions implemented" "Not implemented,Implemented" hexmask.long.byte 0x0 4.--7. 1. " VARIANT ,Implementation-defined Variant Number" textline " " hexmask.long.byte 0x0 0.--3. 1. " REVISION ,Implementation-defined Revision Number" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") wgroup.long c14:6.++0x0 line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." rbitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" rbitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " rbitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else rgroup.long c14:1.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (Internal View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,PIPEADV Processor Idle flag" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC access mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" rbitfld.long 0x00 18. " NS ,Non-secure state status" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "No exception,Exception" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif wgroup.long c14:5.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit/Receive Register (Internal View)" endif group.long c14:0x7++0x0 line.long 0x00 "DBGVCR,Debug Vector Catch register" bitfld.long 0x00 31. " NSF ,FIQ vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 30. " NSI ,IRG vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 28. " NSD ,Data Abort vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " NSP ,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 26. " NSS ,SVC vector catch in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 25. " NSU ,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " NSHF ,FIQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 22. " NSHI ,IRQ interrupt exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 21. " NSHE ,Hyp Trap or Hyp mode entry exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " NSHD ,Data Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 19. " NSHP ,Prefetch Abort, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 18. " NSHC ,Hypervisor Call. from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " NSHU ,Undefined Instruction, from Hyp mode exception vector catch enable in Non-secure state" "Disabled,Enabled" bitfld.long 0x00 15. " MF ,FIQ vector catch enable, in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 14. " MI ,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " MD ,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 11. " MP ,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled" bitfld.long 0x00 10. " MS ,SMC vector catch enable in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " SF ,FIQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 6. " SI ,IRQ vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 4. " SD ,Data Abort vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " SP ,Prefetch Abort vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 2. " SS ,SVC vector catch in Secure state" "Disabled,Enabled" bitfld.long 0x00 1. " SU ,Undefined instruction vector catch in Secure state" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " R ,Reset vector catch enable" "Disabled,Enabled" group.long c14:9.++0x0 line.long 0x00 "DBGECR,Debug Event Catch Register" bitfld.long 0x00 0. " OSUC ,OS Unlock Catch" "Disabled,Enabled" group.long c14:32.++0x0 line.long 0x00 "DBGDTRRX,Debug Receive Register (External View)" wgroup.long c14:33.++0x0 line.long 0x00 "DBGITR,Debug Instruction Transfer Register" rgroup.long c14:33.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,Reserved,Thumb" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault Status" "Not caused,Caused" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" bitfld.long 0x00 25. " PIPEADC ,PIPEADV Processor Idle flag" "Not idle,Idle" bitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not completed,Completed" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Abort" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " bitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "No,Yes" bitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "No,Yes" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "No,Yes" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "No,Yes" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " DBGNOPWRDWN ,Debug no power-down" "Low,High" textline " " bitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" bitfld.long 0x00 7. " ADABORT ,Asynchronous data abort" "Not aborted,Aborted" bitfld.long 0x00 6. " SDABORT ,Synchronous data abort" "Not aborted,Aborted" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." bitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" bitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" elif (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c14:195.))&0x1)==0x1) group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" bitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" bitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" bitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " bitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " bitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" else group.long c14:34.++0x0 line.long 0x00 "DBGDSCR,Debug Status and Control Register (External View)" rbitfld.long 0x00 30. " RXFULL ,DBGDTRRX Register full" "Empty,Full" rbitfld.long 0x00 29. " TXFULL ,DBGDTRTX Register full" "Empty,Full" rbitfld.long 0x00 27. " RXFULL_L ,Latched RXFULL bit" "Not latched,Latched" textline " " rbitfld.long 0x00 26. " TXFULL_L ,Latched TXFULL bit" "Not latched,Latched" rbitfld.long 0x00 25. " PIPEADV ,Sticky Pipeline Advance bit" "Not idle,Idle" rbitfld.long 0x00 24. " INSTRCOMPL_L ,Latched instruction complete" "Not complete,Complete" textline " " bitfld.long 0x00 20.--21. " EXTDCCMODE ,External DCC acces mode field" "Non-blocking,Stall,Fast,?..." bitfld.long 0x00 19. " ADADISCARD ,Asynchronous Data Aborts Discarded bit" "Normal,Discarded" bitfld.long 0x00 18. " NS ,Non-secure status bit" "Secure,Non-secure" textline " " rbitfld.long 0x00 17. " SPNIDDIS ,Secure Privileged Non-Invasive Debug Disable" "Enabled,Disabled" rbitfld.long 0x00 16. " SPIDDIS ,Secure Privileged Invasive Debug Disable" "Enabled,Disabled" bitfld.long 0x00 15. " MDBGEN ,Monitor debug-mode enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " HDBGEN ,Halting debug-mode" "Disabled,Enabled" bitfld.long 0x00 13. " ITREN ,Execute ARM instruction enable" "Disabled,Enabled" bitfld.long 0x00 12. " UDCCDIS ,User mode access to Communications Channel disable" "Enabled,Disabled" textline " " rbitfld.long 0x00 11. " INTDIS ,Interrupt disable" "Enabled,Disabled" bitfld.long 0x00 10. " DBGACK ,Force debug acknowledge" "Normal,Forced" bitfld.long 0x00 9. " FS ,Fault status" "Low,High" textline " " rbitfld.long 0x00 8. " UND_L ,Sticky undefined bit" "Not occurred,Occurred" rbitfld.long 0x00 7. " ADABORT_L ,Sticky Asynchronous Abort" "Not occurred,Occurred" rbitfld.long 0x00 6. " SDABORT_L ,Sticky Synchronous Data Abort" "Not occurred,Occurred" textline " " bitfld.long 0x00 2.--5. " MOE ,Method of debug entry field" "Halt Request,Breakpoint,Asynchronous Watchpoint,BKPT Instruction,External Debug Request,Vector Catch,Reserved,Reserved,OS Unlock Catch,Reserved,Synchronous Watchpoint,?..." rbitfld.long 0x00 1. " RESTARTED ,Processor restarted" "Pending,Exited" rbitfld.long 0x00 0. " HALTED ,Processor halted" "Non-debug,Debug" endif endif wgroup.long c14:35.++0x0 line.long 0x00 "DBGDTRTX,Debug Transmit Register (External View)" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" bitfld.long 0x00 1. " RRQ ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HRQ ,Halt request" "No effect,Halt" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") wgroup.long c14:36.++0x0 line.long 0x00 "DBGDRCR,Debug Run Control Register" bitfld.long 0x00 4. " CBRRQ ,CBRRQ" "Low,High" bitfld.long 0x00 3. " CSPA ,Clear Sticky Pipeline Advance bit" "No effect,Clear" bitfld.long 0x00 2. " CSE ,Clear Sticky Exceptions bits" "No effect,Clear" textline " " bitfld.long 0x00 1. " RR ,Restart request" "No effect,Restart" bitfld.long 0x00 0. " HR ,Halt request" "No effect,Halt" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" bitfld.long 0x00 2. " DECRR ,Debug extend core reset request" "No request,Request" bitfld.long 0x00 1. " DPDO ,Debug power-down override" "Disabled,Enabled" bitfld.long 0x00 0. " DCSC ,Debug clock stop control" "Stopped,Running" textline " " elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:37.++0x0 line.long 0x00 "DBGEACR,Debug External Auxiliary Control Register" bitfld.long 0x00 3. " CDRS ,Core debug reset status" "No reset,Reset" endif rgroup.long c14:40.++0x0 line.long 0x00 "DBGPCSR,Program Counter Sampling Register" hexmask.long 0x00 2.--31. 1. " PCS ,Program Counter sample value" bitfld.long 0x00 0.--1. " T ,Meaning of PC sample value" "ARM,Thumb,?..." rgroup.long c14:41.++0x0 line.long 0x00 "DBGCIDSR,DBGCIDSR" if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,Virtualization ID Sampling Register" bitfld.long 0x00 31. " NS ,NS state sample" "Secure,Non-secure" bitfld.long 0x00 30. " H ,Hyp mode sample" "Not associated,Associated" hexmask.long.byte 0x00 0.--7. 1. " VMID ,VMID sample" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:42.++0x0 line.long 0x00 "DBGVIDSR,DBGVIDSR" endif width 15. if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITOCTRL,Debug Integration Output Control Register" bitfld.long 0x00 3. " NPMUIRQ ,Drives the nPMUIRQ output" "Low,High" bitfld.long 0x00 2. " CTI_PMUIRQ ,Drives the internal signal equivalent to PMUIRQ that goes from the Performance Monitor Unit (PMU) to the Cross Trigger Interface (CTI)" "Low,High" bitfld.long 0x00 1. " CTI_DBGRESTARTED ,Drives the internal signal that goes from the Debug unit to the CTI to acknowledge success of a debug restart command" "Low,High" bitfld.long 0x00 0. " CTI_DBGTRIGGER ,Drives the internal signal equivalent to DBGTRIGGER that goes from the Debug unit to the CTI" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " wgroup.long c14:958.++0x0 line.long 0x00 "DBGITMISCOUT,Integration Miscellaneous Signals Output Register" bitfld.long 0x00 9. " DBGRESTARTED ,Value of the DBGRESTARTED output pin" "Low,High" bitfld.long 0x00 4. " PMUIRQ ,Value of PMUIRQ output pin" "Low,High" bitfld.long 0x00 0. " DBGACK ,Value of the DBGACK output pin" "Low,High" endif if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE") rgroup.long c14:959.++0x0 line.long 0x00 "DBGITISR,Debug Integration Input Status Register" bitfld.long 0x00 3. " DBGSWENABLE ,Reads the state of the DBGSWENABLE input" "Low,High" bitfld.long 0x00 2. " CTI_DBGRESTART ,CTI debug restart" "Low,High" bitfld.long 0x00 1. " CTI_EDBGRQ ,CTI debug request" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Reads the state of the EDBGRQ input" "Low,High" elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") textline " " rgroup.long c14:959.++0x0 line.long 0x00 "DBGITMISCIN,Integration Miscellaneous Signals Input Register" bitfld.long 0x00 2. " NFIQ ,Read value of nFIQ input pin" "Low,High" bitfld.long 0x00 1. " NIRQ ,Read value of nIRQ input pin" "Low,High" bitfld.long 0x00 0. " EDBGRQ ,Read value of EDBGRQ input pin" "Low,High" endif if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") if (((d.l(c15:0x202))&0x80000000)==0x80000000) rgroup.quad c14:128.++0x1 line.quad 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.quad 0x0 12.--39. 0x1000 " ROMADDR ,ROM physical address" bitfld.quad 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.quad c14:256.++0x1 line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.quad 0x0 12.--39. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.quad 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" else rgroup.long c14:128.++0x0 line.long 0x0 "DBGDRAR,Debug ROM Address Register" hexmask.long 0x0 12.--31. 0x1000 " ROMADDR ,ROM physical address" bitfld.long 0x0 0.--1. " VALID ,ROM table address valid" "Not valid,Reserved,Reserved,Valid" rgroup.long c14:256.++0x0 line.long 0x0 "DBGDSAR,Debug Self Address Offset Register" hexmask.long 0x0 12.--31. 0x1000 " SELFOFFSET ,Debug bus self-address offset value" bitfld.long 0x0 0.--1. " VALID ,Debug self address offset valid" "Not valid,Reserved,Reserved,Valid" endif group.long c14:195.++0x00 line.long 0x00 "DBGOSDLR,OS Double Lock Register" bitfld.long 0x00 0. " DLK ,OS Double Lock control bit" "Unlocked,Locked" else hgroup.quad c14:128.++0x1 hide.quad 0x0 "DBGDRAR,Debug ROM Address Register" hgroup.quad c14:256.++0x1 hide.quad 0x0 "DBGDSAR,Debug Self Address Offset Register" hgroup.long c14:195.++0x00 hide.long 0x00 "DBGOSDLR,OS Double Lock Register" endif wgroup.long c14:192.++0x00 line.long 0x00 "DBGOSLAR,Operating System Lock Access Register" rgroup.long c14:193.++0x00 line.long 0x00 "DBGOSLSR,Operating System Lock Status Register" bitfld.long 0x00 1. " OSLK ,Status of the OS Lock" "Not locked,Locked" bitfld.long 0x00 0. 3. " OSLM ,OS Lock Model implemented Bit" "Reserved,Reserved,W/o DBGOSSRR,?..." group.long c14:196.++0x00 line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register" bitfld.long 0x00 3. " COREPURQ ,Core Power Up Request" "Low,High" bitfld.long 0x00 2. " HCWR ,Hold Core Warm Reset" "No reset,Reset" bitfld.long 0x00 1. " CWRR ,Core Warm Reset Request" "Not requested,Requested" textline " " bitfld.long 0x00 0. " CORENPDRQ ,Core No Power down Request" "Low,High" rgroup.long c14:197.++0x0 line.long 0x00 "DBGPRSR,Device Power-down and Reset Status Register" bitfld.long 0x00 6. " DLK ,OS Double Lock status" "Low,High" bitfld.long 0x00 5. " OSLK ,OS Lock status" "Low,High" bitfld.long 0x00 4. " HALTED ,Halted" "Low,High" textline " " bitfld.long 0x00 3. " SR ,Sticky Reset Status" "Low,High" bitfld.long 0x00 2. " RS ,Reset Status" "Low,High" bitfld.long 0x00 1. " SPD ,Sticky Power-down Status" "Low,High" textline " " bitfld.long 0x00 0. " PU ,Power-up Status" "Low,High" tree "Processor ID registers" rgroup.long c14:(832.+0.)++0x00 line.long 0x00 "PIDR0,Processor ID register 0" rgroup.long c14:(832.+1.)++0x00 line.long 0x00 "PIDR1,Processor ID register 1" rgroup.long c14:(832.+2.)++0x00 line.long 0x00 "PIDR2,Processor ID register 2" rgroup.long c14:(832.+3.)++0x00 line.long 0x00 "PIDR3,Processor ID register 3" rgroup.long c14:(832.+4.)++0x00 line.long 0x00 "PIDR4,Processor ID register 4" rgroup.long c14:(832.+5.)++0x00 line.long 0x00 "PIDR5,Processor ID register 5" rgroup.long c14:(832.+6.)++0x00 line.long 0x00 "PIDR6,Processor ID register 6" rgroup.long c14:(832.+7.)++0x00 line.long 0x00 "PIDR7,Processor ID register 7" rgroup.long c14:(832.+8.)++0x00 line.long 0x00 "PIDR8,Processor ID register 8" rgroup.long c14:(832.+9.)++0x00 line.long 0x00 "PIDR9,Processor ID register 9" rgroup.long c14:(832.+10.)++0x00 line.long 0x00 "PIDR10,Processor ID register 10" rgroup.long c14:(832.+11.)++0x00 line.long 0x00 "PIDR11,Processor ID register 11" rgroup.long c14:(832.+12.)++0x00 line.long 0x00 "PIDR12,Processor ID register 12" rgroup.long c14:(832.+13.)++0x00 line.long 0x00 "PIDR13,Processor ID register 13" rgroup.long c14:(832.+14.)++0x00 line.long 0x00 "PIDR14,Processor ID register 14" rgroup.long c14:(832.+15.)++0x00 line.long 0x00 "PIDR15,Processor ID register 15" rgroup.long c14:(832.+16.)++0x00 line.long 0x00 "PIDR16,Processor ID register 16" rgroup.long c14:(832.+17.)++0x00 line.long 0x00 "PIDR17,Processor ID register 17" rgroup.long c14:(832.+18.)++0x00 line.long 0x00 "PIDR18,Processor ID register 18" rgroup.long c14:(832.+19.)++0x00 line.long 0x00 "PIDR19,Processor ID register 19" rgroup.long c14:(832.+20.)++0x00 line.long 0x00 "PIDR20,Processor ID register 20" rgroup.long c14:(832.+21.)++0x00 line.long 0x00 "PIDR21,Processor ID register 21" rgroup.long c14:(832.+22.)++0x00 line.long 0x00 "PIDR22,Processor ID register 22" rgroup.long c14:(832.+23.)++0x00 line.long 0x00 "PIDR23,Processor ID register 23" rgroup.long c14:(832.+24.)++0x00 line.long 0x00 "PIDR24,Processor ID register 24" rgroup.long c14:(832.+25.)++0x00 line.long 0x00 "PIDR25,Processor ID register 25" rgroup.long c14:(832.+26.)++0x00 line.long 0x00 "PIDR26,Processor ID register 26" rgroup.long c14:(832.+27.)++0x00 line.long 0x00 "PIDR27,Processor ID register 27" rgroup.long c14:(832.+28.)++0x00 line.long 0x00 "PIDR28,Processor ID register 28" rgroup.long c14:(832.+29.)++0x00 line.long 0x00 "PIDR29,Processor ID register 29" rgroup.long c14:(832.+30.)++0x00 line.long 0x00 "PIDR30,Processor ID register 30" rgroup.long c14:(832.+31.)++0x00 line.long 0x00 "PIDR31,Processor ID register 31" rgroup.long c14:(832.+32.)++0x00 line.long 0x00 "PIDR32,Processor ID register 32" rgroup.long c14:(832.+33.)++0x00 line.long 0x00 "PIDR33,Processor ID register 33" rgroup.long c14:(832.+34.)++0x00 line.long 0x00 "PIDR34,Processor ID register 34" rgroup.long c14:(832.+35.)++0x00 line.long 0x00 "PIDR35,Processor ID register 35" rgroup.long c14:(832.+36.)++0x00 line.long 0x00 "PIDR36,Processor ID register 36" rgroup.long c14:(832.+37.)++0x00 line.long 0x00 "PIDR37,Processor ID register 37" rgroup.long c14:(832.+38.)++0x00 line.long 0x00 "PIDR38,Processor ID register 38" rgroup.long c14:(832.+39.)++0x00 line.long 0x00 "PIDR39,Processor ID register 39" rgroup.long c14:(832.+40.)++0x00 line.long 0x00 "PIDR40,Processor ID register 40" rgroup.long c14:(832.+41.)++0x00 line.long 0x00 "PIDR41,Processor ID register 41" rgroup.long c14:(832.+42.)++0x00 line.long 0x00 "PIDR42,Processor ID register 42" rgroup.long c14:(832.+43.)++0x00 line.long 0x00 "PIDR43,Processor ID register 43" rgroup.long c14:(832.+44.)++0x00 line.long 0x00 "PIDR44,Processor ID register 44" rgroup.long c14:(832.+45.)++0x00 line.long 0x00 "PIDR45,Processor ID register 45" rgroup.long c14:(832.+46.)++0x00 line.long 0x00 "PIDR46,Processor ID register 46" rgroup.long c14:(832.+47.)++0x00 line.long 0x00 "PIDR47,Processor ID register 47" rgroup.long c14:(832.+48.)++0x00 line.long 0x00 "PIDR48,Processor ID register 48" rgroup.long c14:(832.+49.)++0x00 line.long 0x00 "PIDR49,Processor ID register 49" rgroup.long c14:(832.+50.)++0x00 line.long 0x00 "PIDR50,Processor ID register 50" rgroup.long c14:(832.+51.)++0x00 line.long 0x00 "PIDR51,Processor ID register 51" rgroup.long c14:(832.+52.)++0x00 line.long 0x00 "PIDR52,Processor ID register 52" rgroup.long c14:(832.+53.)++0x00 line.long 0x00 "PIDR53,Processor ID register 53" rgroup.long c14:(832.+54.)++0x00 line.long 0x00 "PIDR54,Processor ID register 54" rgroup.long c14:(832.+55.)++0x00 line.long 0x00 "PIDR55,Processor ID register 55" rgroup.long c14:(832.+56.)++0x00 line.long 0x00 "PIDR56,Processor ID register 56" rgroup.long c14:(832.+57.)++0x00 line.long 0x00 "PIDR57,Processor ID register 57" rgroup.long c14:(832.+58.)++0x00 line.long 0x00 "PIDR58,Processor ID register 58" rgroup.long c14:(832.+59.)++0x00 line.long 0x00 "PIDR59,Processor ID register 59" rgroup.long c14:(832.+60.)++0x00 line.long 0x00 "PIDR60,Processor ID register 60" rgroup.long c14:(832.+61.)++0x00 line.long 0x00 "PIDR61,Processor ID register 61" rgroup.long c14:(832.+62.)++0x00 line.long 0x00 "PIDR62,Processor ID register 62" rgroup.long c14:(832.+63.)++0x00 line.long 0x00 "PIDR63,Processor ID register 63" tree.end tree "Coresight Management Registers" group.long c14:960.++0x0 line.long 0x00 "DBGITCTRL,Debug Integration Mode Control Register" bitfld.long 0x00 0. " IME ,Integration Mode Enable" "Disabled,Enabled" group.long c14:1000.++0x0 line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Set" "Not set,Set" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Set" "Not set,Set" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Set" "Not set,Set" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Set" "Not set,Set" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Set" "Not set,Set" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Set" "Not set,Set" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Set" "Not set,Set" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Set" "Not set,Set" group.long c14:1001.++0x0 line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register" bitfld.long 0x0 7. " CT7 ,Claim Tag 7 Clear" "Not cleared,Cleared" bitfld.long 0x0 6. " CT6 ,Claim Tag 6 Clear" "Not cleared,Cleared" bitfld.long 0x0 5. " CT5 ,Claim Tag 5 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 4. " CT4 ,Claim Tag 4 Clear" "Not cleared,Cleared" bitfld.long 0x0 3. " CT3 ,Claim Tag 3 Clear" "Not cleared,Cleared" bitfld.long 0x0 2. " CT2 ,Claim Tag 2 Clear" "Not cleared,Cleared" textline " " bitfld.long 0x0 1. " CT1 ,Claim Tag 1 Clear" "Not cleared,Cleared" bitfld.long 0x0 0. " CT0 ,Claim Tag 0 Clear" "Not cleared,Cleared" wgroup.long c14:1004.++0x00 line.long 0x00 "DBGLAR,Lock Access Register" rgroup.long c14:1005.++0x00 line.long 0x00 "DBGLSR,Lock Status Register" bitfld.long 0x00 2. " NTT ,Not 32-bit access" "32-bit,Not 32-bit" bitfld.long 0x00 1. " SLK ,Software Lock status" "Not locked,Locked" bitfld.long 0x00 0. " SLI ,Software Lock Implemented" "Not implemented,Implemented" textline " " rgroup.long c14:1006.++0x0 line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register" bitfld.long 0x00 7. " SNI ,Secure non-invasive debug features implementation" "No effect,Implemented" bitfld.long 0x00 6. " SNE ,Secure non-invasive debug enable (DBGEN OR NIDEN) AND (SPIDEN OR SPNIDEN)" "Disabled,Enabled" bitfld.long 0x00 5. " SI ,Secure invasive debug features implementation" "No effect,Implemented" textline " " bitfld.long 0x00 4. " SE ,Secure invasive debug enable (DBGEN AND SPIDEN)" "Disabled,Enabled" bitfld.long 0x00 3. " NSNI ,Non-secure non-invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 2. " NSNE ,Non-secure non-invasive debug enable (DBGEN OR NIDEN)" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " NSI ,Non-secure invasive debug features implementation" "Not implemented,Implemented" bitfld.long 0x00 0. " NSE ,Non-secure invasive debug enable (DBGEN)" "Disabled,Enabled" textline " " if (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Depends on instr set state,No offset,?..." elif (corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") rgroup.long c14:1009.++0x0 line.long 0x0 "DBGDEVID1,Debug Device ID Register 1" bitfld.long 0x00 0.--3. " PCSROFFSET ,Defines the offset applied to DBGPCSR samples" "Reserved,No offset,?..." endif textline " " rgroup.long c14:1010.++0x0 line.long 0x0 "DBGDEVID0,Debug Device ID Register 0" bitfld.long 0x0 24.--27. " AR ,Debug External Auxiliary Control Register support status" "Reserved,Supported,?..." bitfld.long 0x0 20.--23. " DL ,Support for Debug OS Double Lock Register" "Reserved,Supported,?..." bitfld.long 0x0 16.--19. " VE ,Specifies implementation of Virtualization Extension" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 12.--15. " VC ,Form of the vector catch event implemented" "Implemented,?..." bitfld.long 0x0 8.--11. " BPAM ,Level of support for Immediate Virtual Address matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented" bitfld.long 0x0 4.--7. " WPAM ,Level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..." textline " " bitfld.long 0x0 0.--3. " PCS ,Level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..." textline " " rgroup.long c14:1011.++0x00 line.long 0x00 "DBGDEVTYPE,Debug Device Type Register" bitfld.long 0x00 4.--7. " T ,Sub type" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " C ,Main class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long c14:1016.++0x00 line.long 0x00 "DBGPID0,Debug Peripheral ID 0" hexmask.long.byte 0x00 0.--7. 1. " PN[7:0] ,Part Number [7:0]" rgroup.long c14:1017.++0x00 line.long 0x00 "DBGPID1,Debug Peripheral ID 1" hexmask.long.byte 0x00 4.--7. 1. " JEPID[3:0] ,JEP Identity Code[3:0]" hexmask.long.byte 0x00 0.--3. 1. " PN[11:8] ,Part Number [11:8]" rgroup.long c14:1018.++0x00 line.long 0x00 "DBGPID2,Debug Peripheral ID 2" hexmask.long.byte 0x00 4.--7. 1. " REV ,Revision" bitfld.long 0x00 3. " UJEPCODE ,Uses JEP Code" "Disabled,Enabled" hexmask.long.byte 0x00 0.--2. 1. " JEPID[6:4] ,JEP Identity Code[6:4]" rgroup.long c14:1019.++0x00 line.long 0x00 "DBGPID3,Debug Peripheral ID 3" hexmask.long.byte 0x00 4.--7. 1. " REVAND ,Manufacturing revision" hexmask.long.byte 0x00 0.--3. 1. " CM ,Customer modified" rgroup.long c14:1012.++0x00 line.long 0x00 "DBGPID4,Debug Peripheral ID 4" hexmask.long.byte 0x00 4.--7. 1. " 4KB_COUNT ,4KB count" hexmask.long.byte 0x00 0.--3. 1. " JEP106_CONT_CODE ,JEP 106 Continuation code" rgroup.long c14:1020.++0x00 line.long 0x00 "DBGCID0,Debug Component ID 0" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 0" rgroup.long c14:1021.++0x00 line.long 0x00 "DBGCID1,Debug Component ID 1" hexmask.long.byte 0x00 4.--7. 1. " CC ,Component class" hexmask.long.byte 0x00 0.--3. 1. " PREAMBLE ,Preamble byte 1" rgroup.long c14:1022.++0x00 line.long 0x00 "DBGCID2,Debug Component ID 2" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 2" rgroup.long c14:1023.++0x00 line.long 0x00 "DBGCID3,Debug Component ID 3" hexmask.long.byte 0x00 0.--7. 1. " PREAMBLE ,Preamble byte 3" tree.end tree.end width 10. tree "Breakpoint Registers" if ((d.l(c14:80.+0.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+0.)++0x0 line.long 0x00 "DBGBVR0,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+0.)++0x0 line.long 0x00 "DBGBCR0,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+1.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+1.)++0x0 line.long 0x00 "DBGBVR1,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+1.)++0x0 line.long 0x00 "DBGBCR1,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+2.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+2.)++0x0 line.long 0x00 "DBGBVR2,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+2.)++0x0 line.long 0x00 "DBGBCR2,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+3.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+3.)++0x0 line.long 0x00 "DBGBVR3,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+3.)++0x0 line.long 0x00 "DBGBCR3,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+4.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+4.)++0x0 line.long 0x00 "DBGBVR4,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+4.)++0x0 line.long 0x00 "DBGBCR4,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" if ((d.l(c14:80.+5.)&0x500000)==(0x500000||0x400000||0x100000||0x0)) group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Address comparison)" hexmask.long 0x00 2.--31. 0x4 " INSTADDR ,Address value for comparison. Bits 2-31" else group.long c14:(64.+5.)++0x0 line.long 0x00 "DBGBVR5,Breakpoint Value Register(Context matching)" endif group.long c14:(80.+5.)++0x0 line.long 0x00 "DBGBCR5,Breakpoint Control Register" bitfld.long 0x00 20.--23. " BT ,Breakpoint Type. Match - m / Mismatch - mm" "Unlinked instr addr m,Linked instr addr m,Unlinked Context ID m,Linked Context ID m,Unlinked instr addr mm,Linked instr addr mm,Reserved,Reserved,Unlinked VMID m,Linked VMID m,Unlinked VMID/Context ID m,Linked VMID/Context ID m,?..." bitfld.long 0x00 16.--19. " LBN ,Linked Breakpoint Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 14.--15. " SSC ,Security state control" "Both,Non-secure,Secure,Non-secure" textline " " bitfld.long 0x00 13. " HMC ,Hyp mode control bit" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x00 1.--2. " PMC ,Privileged mode control" "User/System/Supervisor/Hyp,PL1/Hyp,User only,Any mode" bitfld.long 0x00 0. " E ,Breakpoint enable" "Disabled,Enabled" group.long c14:148.++0x0 line.long 0x00 "DBGBXVR0,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" group.long c14:149.++0x0 line.long 0x00 "DBGBXVR1,Debug Breakpoint Extended Value Register" hexmask.long.byte 0x00 0.--7. 1. " VMID , VMID value" tree.end width 10. tree "Watchpoint Control Registers" group.long c14:(96.+0.)++0x00 line.long 0x00 "DBGWVR0,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+0.)++0x00 line.long 0x00 "DBGWCR0,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+1.)++0x00 line.long 0x00 "DBGWVR1,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+1.)++0x00 line.long 0x00 "DBGWCR1,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+2.)++0x00 line.long 0x00 "DBGWVR2,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+2.)++0x00 line.long 0x00 "DBGWCR2,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif group.long c14:(96.+3.)++0x00 line.long 0x00 "DBGWVR3,Watchpoint Value Register" hexmask.long 0x00 2.--31. 0x4 " DA ,Data address" if (corename()=="CORTEXA17"||corename()=="CORTEXA17MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " Mask ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Unlinked data addr match,Linked data addr match" bitfld.long 0x0 16.--19. " LBN ,Linked breakpoint number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,Non-secure" bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "0,1" bitfld.long 0x0 8. " BAS ,Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Hyp,Privileged,Unprivileged,Any" bitfld.long 0x0 0. " E ,Watchpoint enable" "Disabled,Enabled" elif (corename()=="CORTEXA15"||corename()=="CORTEXA15MPCORE"||corename()=="CORTEXA7"||corename()=="CORTEXA7MPCORE") group.long c14:(112.+3.)++0x00 line.long 0x00 "DBGWCR3,Watchpoint Control Register" bitfld.long 0x0 24.--28. " MASK ,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF" bitfld.long 0x0 20. " WT ,Watchpoint Type" "Disabled,Enabled" bitfld.long 0x0 16.--19. " LBN ,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15" textline " " bitfld.long 0x0 14.--15. " SSC ,Secure state control" "Both,Non-secure,Secure,?..." bitfld.long 0x0 13. " HMC ,Hyp Mode Control" "Disabled,Enabled" bitfld.long 0x0 12. " BAS ,Byte 7 address select" "0,1" bitfld.long 0x0 11. ",Byte 6 address select" "0,1" bitfld.long 0x0 10. ",Byte 5 address select" "0,1" bitfld.long 0x0 9. ",Byte 4 address select" "0,1" bitfld.long 0x0 8. ",Byte 3 address select" "0,1" bitfld.long 0x0 7. ",Byte 2 address select" "0,1" bitfld.long 0x0 6. ",Byte 1 address select" "0,1" bitfld.long 0x0 5. ",Byte 0 address select" "0,1" textline " " bitfld.long 0x0 3.--4. " LSC ,Load/Store access control" "Reserved,Load,Store,Any" bitfld.long 0x0 1.--2. " PAC ,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses" textline " " bitfld.long 0x0 0. " WE ,Watchpoint enable" "Disabled,Enabled" endif tree.end width 0xb tree.open "Interrupt Controller (GIC-400)" width 17. width 17. base ad:0xf1001000 tree "Distributor Interface" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0xf1001000) group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)" bitfld.long 0x00 1. " ENABLEGRP1 ,Global Interrupt Enable Group 1" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Global Interrupt Enable Group 1" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif else group.long 0x0000++0x03 line.long 0x00 "GICD_CTLR,Distributor Control Register" bitfld.long 0x00 0. " ENABLE ,Global enable for forwarding pending interrupts from the Distributor to the CPU interfaces" "Disabled,Enabled" endif if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 11.--15. " LSPI ,Locable Shared Peripheral Interrupts" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 10. " SECURITYEXTN ,Indicate whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" else rgroup.long 0x0004++0x03 line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register" bitfld.long 0x00 10. " SECURITYEXTN ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented" textline " " bitfld.long 0x00 5.--7. " CPUNUMBER ,Indicates the number of implemented CPU interfaces" "1,2,3,4,?..." bitfld.long 0x00 0.--4. " ITLN ,Indicates the number of interrupts that the interrupt controller supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Up to 1020" endif rgroup.long 0x0008++0x03 line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register" bitfld.long 0x00 24.--31. " PRODID ,Indicates the product ID" "PL390,PL390,GIC400,GIC400,?..." bitfld.long 0x00 16.--19. " VAR ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 12.--15. " REV ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" sif CPU.FEATURE(hypervisor)||CPU.FEATURE(secure) width 17. tree "Group/Security Registers" if PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0080) group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0 (Secure),Group 1 (Non-secure)" else group.long 0x0080++0x03 line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)" bitfld.long 0x00 31. " GSB31 ,Group Status Bit 31" "Group 0,Group 1" bitfld.long 0x00 30. " GSB30 ,Group Status Bit 30" "Group 0,Group 1" bitfld.long 0x00 29. " GSB29 ,Group Status Bit 29" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB28 ,Group Status Bit 28" "Group 0,Group 1" bitfld.long 0x00 27. " GSB27 ,Group Status Bit 27" "Group 0,Group 1" bitfld.long 0x00 26. " GSB26 ,Group Status Bit 26" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB25 ,Group Status Bit 25" "Group 0,Group 1" bitfld.long 0x00 24. " GSB24 ,Group Status Bit 24" "Group 0,Group 1" bitfld.long 0x00 23. " GSB23 ,Group Status Bit 23" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB22 ,Group Status Bit 22" "Group 0,Group 1" bitfld.long 0x00 21. " GSB21 ,Group Status Bit 21" "Group 0,Group 1" bitfld.long 0x00 20. " GSB20 ,Group Status Bit 20" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB19 ,Group Status Bit 19" "Group 0,Group 1" bitfld.long 0x00 18. " GSB18 ,Group Status Bit 18" "Group 0,Group 1" bitfld.long 0x00 17. " GSB17 ,Group Status Bit 17" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB16 ,Group Status Bit 16" "Group 0,Group 1" bitfld.long 0x00 15. " GSB15 ,Group Status Bit 15" "Group 0,Group 1" bitfld.long 0x00 14. " GSB14 ,Group Status Bit 14" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB13 ,Group Status Bit 13" "Group 0,Group 1" bitfld.long 0x00 12. " GSB12 ,Group Status Bit 12" "Group 0,Group 1" bitfld.long 0x00 11. " GSB11 ,Group Status Bit 11" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB10 ,Group Status Bit 10" "Group 0,Group 1" bitfld.long 0x00 9. " GSB9 ,Group Status Bit 9" "Group 0,Group 1" bitfld.long 0x00 8. " GSB8 ,Group Status Bit 8" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB7 ,Group Status Bit 7" "Group 0,Group 1" bitfld.long 0x00 6. " GSB6 ,Group Status Bit 6" "Group 0,Group 1" bitfld.long 0x00 5. " GSB5 ,Group Status Bit 5" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB4 ,Group Status Bit 4" "Group 0,Group 1" bitfld.long 0x00 3. " GSB3 ,Group Status Bit 3" "Group 0,Group 1" bitfld.long 0x00 2. " GSB2 ,Group Status Bit 2" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB1 ,Group Status Bit 1" "Group 0,Group 1" bitfld.long 0x00 0. " GSB0 ,Group Status Bit 0" "Group 0,Group 1" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0084)) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Secure Access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1 (Non-secure access)" bitfld.long 0x00 31. " GSB63 ,Group Status Bit 63" "Group 0,Group 1" bitfld.long 0x00 30. " GSB62 ,Group Status Bit 62" "Group 0,Group 1" bitfld.long 0x00 29. " GSB61 ,Group Status Bit 61" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB60 ,Group Status Bit 60" "Group 0,Group 1" bitfld.long 0x00 27. " GSB59 ,Group Status Bit 59" "Group 0,Group 1" bitfld.long 0x00 26. " GSB58 ,Group Status Bit 58" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB57 ,Group Status Bit 57" "Group 0,Group 1" bitfld.long 0x00 24. " GSB56 ,Group Status Bit 56" "Group 0,Group 1" bitfld.long 0x00 23. " GSB55 ,Group Status Bit 55" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB54 ,Group Status Bit 54" "Group 0,Group 1" bitfld.long 0x00 21. " GSB53 ,Group Status Bit 53" "Group 0,Group 1" bitfld.long 0x00 20. " GSB52 ,Group Status Bit 52" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB51 ,Group Status Bit 51" "Group 0,Group 1" bitfld.long 0x00 18. " GSB50 ,Group Status Bit 50" "Group 0,Group 1" bitfld.long 0x00 17. " GSB49 ,Group Status Bit 49" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB48 ,Group Status Bit 48" "Group 0,Group 1" bitfld.long 0x00 15. " GSB47 ,Group Status Bit 47" "Group 0,Group 1" bitfld.long 0x00 14. " GSB46 ,Group Status Bit 46" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB45 ,Group Status Bit 45" "Group 0,Group 1" bitfld.long 0x00 12. " GSB44 ,Group Status Bit 44" "Group 0,Group 1" bitfld.long 0x00 11. " GSB43 ,Group Status Bit 43" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB42 ,Group Status Bit 42" "Group 0,Group 1" bitfld.long 0x00 9. " GSB41 ,Group Status Bit 41" "Group 0,Group 1" bitfld.long 0x00 8. " GSB40 ,Group Status Bit 40" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB39 ,Group Status Bit 39" "Group 0,Group 1" bitfld.long 0x00 6. " GSB38 ,Group Status Bit 38" "Group 0,Group 1" bitfld.long 0x00 5. " GSB37 ,Group Status Bit 37" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB36 ,Group Status Bit 36" "Group 0,Group 1" bitfld.long 0x00 3. " GSB35 ,Group Status Bit 35" "Group 0,Group 1" bitfld.long 0x00 2. " GSB34 ,Group Status Bit 34" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB33 ,Group Status Bit 33" "Group 0,Group 1" bitfld.long 0x00 0. " GSB32 ,Group Status Bit 32" "Group 0,Group 1" else rgroup.long 0x0084++0x03 line.long 0x0 "GICD_IGROUPR1,Interrupt Group Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0088)) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2 (Non-secure access)" bitfld.long 0x00 31. " GSB95 ,Group Status Bit 95" "Group 0,Group 1" bitfld.long 0x00 30. " GSB94 ,Group Status Bit 94" "Group 0,Group 1" bitfld.long 0x00 29. " GSB93 ,Group Status Bit 93" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB92 ,Group Status Bit 92" "Group 0,Group 1" bitfld.long 0x00 27. " GSB91 ,Group Status Bit 91" "Group 0,Group 1" bitfld.long 0x00 26. " GSB90 ,Group Status Bit 90" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB89 ,Group Status Bit 89" "Group 0,Group 1" bitfld.long 0x00 24. " GSB88 ,Group Status Bit 88" "Group 0,Group 1" bitfld.long 0x00 23. " GSB87 ,Group Status Bit 87" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB86 ,Group Status Bit 86" "Group 0,Group 1" bitfld.long 0x00 21. " GSB85 ,Group Status Bit 85" "Group 0,Group 1" bitfld.long 0x00 20. " GSB84 ,Group Status Bit 84" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB83 ,Group Status Bit 83" "Group 0,Group 1" bitfld.long 0x00 18. " GSB82 ,Group Status Bit 82" "Group 0,Group 1" bitfld.long 0x00 17. " GSB81 ,Group Status Bit 81" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB80 ,Group Status Bit 80" "Group 0,Group 1" bitfld.long 0x00 15. " GSB79 ,Group Status Bit 79" "Group 0,Group 1" bitfld.long 0x00 14. " GSB78 ,Group Status Bit 78" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB77 ,Group Status Bit 77" "Group 0,Group 1" bitfld.long 0x00 12. " GSB76 ,Group Status Bit 76" "Group 0,Group 1" bitfld.long 0x00 11. " GSB75 ,Group Status Bit 75" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB74 ,Group Status Bit 74" "Group 0,Group 1" bitfld.long 0x00 9. " GSB73 ,Group Status Bit 73" "Group 0,Group 1" bitfld.long 0x00 8. " GSB72 ,Group Status Bit 72" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB71 ,Group Status Bit 71" "Group 0,Group 1" bitfld.long 0x00 6. " GSB70 ,Group Status Bit 70" "Group 0,Group 1" bitfld.long 0x00 5. " GSB69 ,Group Status Bit 69" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB68 ,Group Status Bit 68" "Group 0,Group 1" bitfld.long 0x00 3. " GSB67 ,Group Status Bit 67" "Group 0,Group 1" bitfld.long 0x00 2. " GSB66 ,Group Status Bit 66" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB65 ,Group Status Bit 65" "Group 0,Group 1" bitfld.long 0x00 0. " GSB64 ,Group Status Bit 64" "Group 0,Group 1" else rgroup.long 0x0088++0x03 line.long 0x0 "GICD_IGROUPR2,Interrupt Group Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x008C)) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3 (Non-secure access)" bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1" bitfld.long 0x00 30. " GSB126 ,Group Status Bit 126" "Group 0,Group 1" bitfld.long 0x00 29. " GSB125 ,Group Status Bit 125" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1" bitfld.long 0x00 27. " GSB123 ,Group Status Bit 123" "Group 0,Group 1" bitfld.long 0x00 26. " GSB122 ,Group Status Bit 122" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1" bitfld.long 0x00 24. " GSB120 ,Group Status Bit 120" "Group 0,Group 1" bitfld.long 0x00 23. " GSB119 ,Group Status Bit 119" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1" bitfld.long 0x00 21. " GSB117 ,Group Status Bit 117" "Group 0,Group 1" bitfld.long 0x00 20. " GSB116 ,Group Status Bit 116" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1" bitfld.long 0x00 18. " GSB114 ,Group Status Bit 114" "Group 0,Group 1" bitfld.long 0x00 17. " GSB113 ,Group Status Bit 113" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1" bitfld.long 0x00 15. " GSB111 ,Group Status Bit 111" "Group 0,Group 1" bitfld.long 0x00 14. " GSB110 ,Group Status Bit 110" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1" bitfld.long 0x00 12. " GSB108 ,Group Status Bit 108" "Group 0,Group 1" bitfld.long 0x00 11. " GSB107 ,Group Status Bit 107" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1" bitfld.long 0x00 9. " GSB105 ,Group Status Bit 105" "Group 0,Group 1" bitfld.long 0x00 8. " GSB104 ,Group Status Bit 104" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1" bitfld.long 0x00 6. " GSB102 ,Group Status Bit 102" "Group 0,Group 1" bitfld.long 0x00 5. " GSB101 ,Group Status Bit 101" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1" bitfld.long 0x00 3. " GSB99 ,Group Status Bit 99" "Group 0,Group 1" bitfld.long 0x00 2. " GSB98 ,Group Status Bit 98" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB97 ,Group Status Bit 97" "Group 0,Group 1" bitfld.long 0x00 0. " GSB96 ,Group Status Bit 96" "Group 0,Group 1" else rgroup.long 0x008C++0x03 line.long 0x0 "GICD_IGROUPR3,Interrupt Group Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0090)) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4 (Non-secure access)" bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1" bitfld.long 0x00 30. " GSB158 ,Group Status Bit 158" "Group 0,Group 1" bitfld.long 0x00 29. " GSB157 ,Group Status Bit 157" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1" bitfld.long 0x00 27. " GSB155 ,Group Status Bit 155" "Group 0,Group 1" bitfld.long 0x00 26. " GSB154 ,Group Status Bit 154" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1" bitfld.long 0x00 24. " GSB152 ,Group Status Bit 152" "Group 0,Group 1" bitfld.long 0x00 23. " GSB151 ,Group Status Bit 151" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1" bitfld.long 0x00 21. " GSB149 ,Group Status Bit 149" "Group 0,Group 1" bitfld.long 0x00 20. " GSB148 ,Group Status Bit 148" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1" bitfld.long 0x00 18. " GSB146 ,Group Status Bit 146" "Group 0,Group 1" bitfld.long 0x00 17. " GSB145 ,Group Status Bit 145" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1" bitfld.long 0x00 15. " GSB143 ,Group Status Bit 143" "Group 0,Group 1" bitfld.long 0x00 14. " GSB142 ,Group Status Bit 142" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1" bitfld.long 0x00 12. " GSB140 ,Group Status Bit 140" "Group 0,Group 1" bitfld.long 0x00 11. " GSB139 ,Group Status Bit 139" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1" bitfld.long 0x00 9. " GSB137 ,Group Status Bit 137" "Group 0,Group 1" bitfld.long 0x00 8. " GSB136 ,Group Status Bit 136" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1" bitfld.long 0x00 6. " GSB134 ,Group Status Bit 134" "Group 0,Group 1" bitfld.long 0x00 5. " GSB133 ,Group Status Bit 133" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1" bitfld.long 0x00 3. " GSB131 ,Group Status Bit 131" "Group 0,Group 1" bitfld.long 0x00 2. " GSB130 ,Group Status Bit 130" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1" bitfld.long 0x00 0. " GSB128 ,Group Status Bit 128" "Group 0,Group 1" else rgroup.long 0x0090++0x03 line.long 0x0 "GICD_IGROUPR4,Interrupt Group Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0094)) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5 (Non-secure access)" bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1" bitfld.long 0x00 30. " GSB190 ,Group Status Bit 190" "Group 0,Group 1" bitfld.long 0x00 29. " GSB189 ,Group Status Bit 189" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1" bitfld.long 0x00 27. " GSB187 ,Group Status Bit 187" "Group 0,Group 1" bitfld.long 0x00 26. " GSB186 ,Group Status Bit 186" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1" bitfld.long 0x00 24. " GSB184 ,Group Status Bit 184" "Group 0,Group 1" bitfld.long 0x00 23. " GSB183 ,Group Status Bit 183" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1" bitfld.long 0x00 21. " GSB181 ,Group Status Bit 181" "Group 0,Group 1" bitfld.long 0x00 20. " GSB180 ,Group Status Bit 180" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1" bitfld.long 0x00 18. " GSB178 ,Group Status Bit 178" "Group 0,Group 1" bitfld.long 0x00 17. " GSB177 ,Group Status Bit 177" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1" bitfld.long 0x00 15. " GSB175 ,Group Status Bit 175" "Group 0,Group 1" bitfld.long 0x00 14. " GSB174 ,Group Status Bit 174" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1" bitfld.long 0x00 12. " GSB172 ,Group Status Bit 172" "Group 0,Group 1" bitfld.long 0x00 11. " GSB171 ,Group Status Bit 171" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1" bitfld.long 0x00 9. " GSB169 ,Group Status Bit 169" "Group 0,Group 1" bitfld.long 0x00 8. " GSB168 ,Group Status Bit 168" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1" bitfld.long 0x00 6. " GSB166 ,Group Status Bit 166" "Group 0,Group 1" bitfld.long 0x00 5. " GSB165 ,Group Status Bit 165" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1" bitfld.long 0x00 3. " GSB163 ,Group Status Bit 163" "Group 0,Group 1" bitfld.long 0x00 2. " GSB162 ,Group Status Bit 162" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1" bitfld.long 0x00 0. " GSB160 ,Group Status Bit 160" "Group 0,Group 1" else rgroup.long 0x0094++0x03 line.long 0x0 "GICD_IGROUPR5,Interrupt Group Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x0098)) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6 (Non-secure access)" bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1" bitfld.long 0x00 30. " GSB222 ,Group Status Bit 222" "Group 0,Group 1" bitfld.long 0x00 29. " GSB221 ,Group Status Bit 221" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1" bitfld.long 0x00 27. " GSB219 ,Group Status Bit 219" "Group 0,Group 1" bitfld.long 0x00 26. " GSB218 ,Group Status Bit 218" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1" bitfld.long 0x00 24. " GSB216 ,Group Status Bit 216" "Group 0,Group 1" bitfld.long 0x00 23. " GSB215 ,Group Status Bit 215" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1" bitfld.long 0x00 21. " GSB213 ,Group Status Bit 213" "Group 0,Group 1" bitfld.long 0x00 20. " GSB212 ,Group Status Bit 212" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1" bitfld.long 0x00 18. " GSB210 ,Group Status Bit 210" "Group 0,Group 1" bitfld.long 0x00 17. " GSB209 ,Group Status Bit 209" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1" bitfld.long 0x00 15. " GSB207 ,Group Status Bit 207" "Group 0,Group 1" bitfld.long 0x00 14. " GSB206 ,Group Status Bit 206" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1" bitfld.long 0x00 12. " GSB204 ,Group Status Bit 204" "Group 0,Group 1" bitfld.long 0x00 11. " GSB203 ,Group Status Bit 203" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1" bitfld.long 0x00 9. " GSB201 ,Group Status Bit 201" "Group 0,Group 1" bitfld.long 0x00 8. " GSB200 ,Group Status Bit 200" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1" bitfld.long 0x00 6. " GSB198 ,Group Status Bit 198" "Group 0,Group 1" bitfld.long 0x00 5. " GSB197 ,Group Status Bit 197" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1" bitfld.long 0x00 3. " GSB195 ,Group Status Bit 195" "Group 0,Group 1" bitfld.long 0x00 2. " GSB194 ,Group Status Bit 194" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1" bitfld.long 0x00 0. " GSB192 ,Group Status Bit 192" "Group 0,Group 1" else rgroup.long 0x0098++0x03 line.long 0x0 "GICD_IGROUPR6,Interrupt Group Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x009C)) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7 (Non-secure access)" bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1" bitfld.long 0x00 30. " GSB254 ,Group Status Bit 254" "Group 0,Group 1" bitfld.long 0x00 29. " GSB253 ,Group Status Bit 253" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1" bitfld.long 0x00 27. " GSB251 ,Group Status Bit 251" "Group 0,Group 1" bitfld.long 0x00 26. " GSB250 ,Group Status Bit 250" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1" bitfld.long 0x00 24. " GSB248 ,Group Status Bit 248" "Group 0,Group 1" bitfld.long 0x00 23. " GSB247 ,Group Status Bit 247" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1" bitfld.long 0x00 21. " GSB245 ,Group Status Bit 245" "Group 0,Group 1" bitfld.long 0x00 20. " GSB244 ,Group Status Bit 244" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1" bitfld.long 0x00 18. " GSB242 ,Group Status Bit 242" "Group 0,Group 1" bitfld.long 0x00 17. " GSB241 ,Group Status Bit 241" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1" bitfld.long 0x00 15. " GSB239 ,Group Status Bit 239" "Group 0,Group 1" bitfld.long 0x00 14. " GSB238 ,Group Status Bit 238" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1" bitfld.long 0x00 12. " GSB236 ,Group Status Bit 236" "Group 0,Group 1" bitfld.long 0x00 11. " GSB235 ,Group Status Bit 235" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1" bitfld.long 0x00 9. " GSB233 ,Group Status Bit 233" "Group 0,Group 1" bitfld.long 0x00 8. " GSB232 ,Group Status Bit 232" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1" bitfld.long 0x00 6. " GSB230 ,Group Status Bit 230" "Group 0,Group 1" bitfld.long 0x00 5. " GSB229 ,Group Status Bit 229" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1" bitfld.long 0x00 3. " GSB227 ,Group Status Bit 227" "Group 0,Group 1" bitfld.long 0x00 2. " GSB226 ,Group Status Bit 226" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1" bitfld.long 0x00 0. " GSB224 ,Group Status Bit 224" "Group 0,Group 1" else rgroup.long 0x009C++0x03 line.long 0x0 "GICD_IGROUPR7,Interrupt Group Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00A0)) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8 (Non-secure access)" bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1" bitfld.long 0x00 30. " GSB286 ,Group Status Bit 286" "Group 0,Group 1" bitfld.long 0x00 29. " GSB285 ,Group Status Bit 285" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1" bitfld.long 0x00 27. " GSB283 ,Group Status Bit 283" "Group 0,Group 1" bitfld.long 0x00 26. " GSB282 ,Group Status Bit 282" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1" bitfld.long 0x00 24. " GSB280 ,Group Status Bit 280" "Group 0,Group 1" bitfld.long 0x00 23. " GSB279 ,Group Status Bit 279" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1" bitfld.long 0x00 21. " GSB277 ,Group Status Bit 277" "Group 0,Group 1" bitfld.long 0x00 20. " GSB276 ,Group Status Bit 276" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1" bitfld.long 0x00 18. " GSB274 ,Group Status Bit 274" "Group 0,Group 1" bitfld.long 0x00 17. " GSB273 ,Group Status Bit 273" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1" bitfld.long 0x00 15. " GSB271 ,Group Status Bit 271" "Group 0,Group 1" bitfld.long 0x00 14. " GSB270 ,Group Status Bit 270" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1" bitfld.long 0x00 12. " GSB268 ,Group Status Bit 268" "Group 0,Group 1" bitfld.long 0x00 11. " GSB267 ,Group Status Bit 267" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1" bitfld.long 0x00 9. " GSB265 ,Group Status Bit 265" "Group 0,Group 1" bitfld.long 0x00 8. " GSB264 ,Group Status Bit 264" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1" bitfld.long 0x00 6. " GSB262 ,Group Status Bit 262" "Group 0,Group 1" bitfld.long 0x00 5. " GSB261 ,Group Status Bit 261" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1" bitfld.long 0x00 3. " GSB259 ,Group Status Bit 259" "Group 0,Group 1" bitfld.long 0x00 2. " GSB258 ,Group Status Bit 258" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1" bitfld.long 0x00 0. " GSB256 ,Group Status Bit 256" "Group 0,Group 1" else rgroup.long 0x00A0++0x03 line.long 0x0 "GICD_IGROUPR8,Interrupt Group Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00A4)) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9 (Non-secure access)" bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1" bitfld.long 0x00 30. " GSB318 ,Group Status Bit 318" "Group 0,Group 1" bitfld.long 0x00 29. " GSB317 ,Group Status Bit 317" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1" bitfld.long 0x00 27. " GSB315 ,Group Status Bit 315" "Group 0,Group 1" bitfld.long 0x00 26. " GSB314 ,Group Status Bit 314" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1" bitfld.long 0x00 24. " GSB312 ,Group Status Bit 312" "Group 0,Group 1" bitfld.long 0x00 23. " GSB311 ,Group Status Bit 311" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1" bitfld.long 0x00 21. " GSB309 ,Group Status Bit 309" "Group 0,Group 1" bitfld.long 0x00 20. " GSB308 ,Group Status Bit 308" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1" bitfld.long 0x00 18. " GSB306 ,Group Status Bit 306" "Group 0,Group 1" bitfld.long 0x00 17. " GSB305 ,Group Status Bit 305" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1" bitfld.long 0x00 15. " GSB303 ,Group Status Bit 303" "Group 0,Group 1" bitfld.long 0x00 14. " GSB302 ,Group Status Bit 302" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1" bitfld.long 0x00 12. " GSB300 ,Group Status Bit 300" "Group 0,Group 1" bitfld.long 0x00 11. " GSB299 ,Group Status Bit 299" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1" bitfld.long 0x00 9. " GSB297 ,Group Status Bit 297" "Group 0,Group 1" bitfld.long 0x00 8. " GSB296 ,Group Status Bit 296" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1" bitfld.long 0x00 6. " GSB294 ,Group Status Bit 294" "Group 0,Group 1" bitfld.long 0x00 5. " GSB293 ,Group Status Bit 293" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1" bitfld.long 0x00 3. " GSB291 ,Group Status Bit 291" "Group 0,Group 1" bitfld.long 0x00 2. " GSB290 ,Group Status Bit 290" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1" bitfld.long 0x00 0. " GSB288 ,Group Status Bit 288" "Group 0,Group 1" else rgroup.long 0x00A4++0x03 line.long 0x0 "GICD_IGROUPR9,Interrupt Group Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00A8)) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Non-secure access)" bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1" bitfld.long 0x00 30. " GSB350 ,Group Status Bit 350" "Group 0,Group 1" bitfld.long 0x00 29. " GSB349 ,Group Status Bit 349" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1" bitfld.long 0x00 27. " GSB347 ,Group Status Bit 347" "Group 0,Group 1" bitfld.long 0x00 26. " GSB346 ,Group Status Bit 346" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1" bitfld.long 0x00 24. " GSB344 ,Group Status Bit 344" "Group 0,Group 1" bitfld.long 0x00 23. " GSB343 ,Group Status Bit 343" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1" bitfld.long 0x00 21. " GSB341 ,Group Status Bit 341" "Group 0,Group 1" bitfld.long 0x00 20. " GSB340 ,Group Status Bit 340" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1" bitfld.long 0x00 18. " GSB338 ,Group Status Bit 338" "Group 0,Group 1" bitfld.long 0x00 17. " GSB337 ,Group Status Bit 337" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1" bitfld.long 0x00 15. " GSB335 ,Group Status Bit 335" "Group 0,Group 1" bitfld.long 0x00 14. " GSB334 ,Group Status Bit 334" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1" bitfld.long 0x00 12. " GSB332 ,Group Status Bit 332" "Group 0,Group 1" bitfld.long 0x00 11. " GSB331 ,Group Status Bit 331" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1" bitfld.long 0x00 9. " GSB329 ,Group Status Bit 329" "Group 0,Group 1" bitfld.long 0x00 8. " GSB328 ,Group Status Bit 328" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1" bitfld.long 0x00 6. " GSB326 ,Group Status Bit 326" "Group 0,Group 1" bitfld.long 0x00 5. " GSB325 ,Group Status Bit 325" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1" bitfld.long 0x00 3. " GSB323 ,Group Status Bit 323" "Group 0,Group 1" bitfld.long 0x00 2. " GSB322 ,Group Status Bit 322" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1" bitfld.long 0x00 0. " GSB320 ,Group Status Bit 320" "Group 0,Group 1" else rgroup.long 0x00A8++0x03 line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00AC)) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Non-secure access)" bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1" bitfld.long 0x00 30. " GSB382 ,Group Status Bit 382" "Group 0,Group 1" bitfld.long 0x00 29. " GSB381 ,Group Status Bit 381" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1" bitfld.long 0x00 27. " GSB379 ,Group Status Bit 379" "Group 0,Group 1" bitfld.long 0x00 26. " GSB378 ,Group Status Bit 378" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1" bitfld.long 0x00 24. " GSB376 ,Group Status Bit 376" "Group 0,Group 1" bitfld.long 0x00 23. " GSB375 ,Group Status Bit 375" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1" bitfld.long 0x00 21. " GSB373 ,Group Status Bit 373" "Group 0,Group 1" bitfld.long 0x00 20. " GSB372 ,Group Status Bit 372" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1" bitfld.long 0x00 18. " GSB370 ,Group Status Bit 370" "Group 0,Group 1" bitfld.long 0x00 17. " GSB369 ,Group Status Bit 369" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1" bitfld.long 0x00 15. " GSB367 ,Group Status Bit 367" "Group 0,Group 1" bitfld.long 0x00 14. " GSB366 ,Group Status Bit 366" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1" bitfld.long 0x00 12. " GSB364 ,Group Status Bit 364" "Group 0,Group 1" bitfld.long 0x00 11. " GSB363 ,Group Status Bit 363" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1" bitfld.long 0x00 9. " GSB361 ,Group Status Bit 361" "Group 0,Group 1" bitfld.long 0x00 8. " GSB360 ,Group Status Bit 360" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1" bitfld.long 0x00 6. " GSB358 ,Group Status Bit 358" "Group 0,Group 1" bitfld.long 0x00 5. " GSB357 ,Group Status Bit 357" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1" bitfld.long 0x00 3. " GSB355 ,Group Status Bit 355" "Group 0,Group 1" bitfld.long 0x00 2. " GSB354 ,Group Status Bit 354" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1" bitfld.long 0x00 0. " GSB352 ,Group Status Bit 352" "Group 0,Group 1" else rgroup.long 0x00AC++0x03 line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00B0)) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Non-secure access)" bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1" bitfld.long 0x00 30. " GSB414 ,Group Status Bit 414" "Group 0,Group 1" bitfld.long 0x00 29. " GSB413 ,Group Status Bit 413" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1" bitfld.long 0x00 27. " GSB411 ,Group Status Bit 411" "Group 0,Group 1" bitfld.long 0x00 26. " GSB410 ,Group Status Bit 410" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1" bitfld.long 0x00 24. " GSB408 ,Group Status Bit 408" "Group 0,Group 1" bitfld.long 0x00 23. " GSB407 ,Group Status Bit 407" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1" bitfld.long 0x00 21. " GSB405 ,Group Status Bit 405" "Group 0,Group 1" bitfld.long 0x00 20. " GSB404 ,Group Status Bit 404" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1" bitfld.long 0x00 18. " GSB402 ,Group Status Bit 402" "Group 0,Group 1" bitfld.long 0x00 17. " GSB401 ,Group Status Bit 401" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1" bitfld.long 0x00 15. " GSB399 ,Group Status Bit 399" "Group 0,Group 1" bitfld.long 0x00 14. " GSB398 ,Group Status Bit 398" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1" bitfld.long 0x00 12. " GSB396 ,Group Status Bit 396" "Group 0,Group 1" bitfld.long 0x00 11. " GSB395 ,Group Status Bit 395" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1" bitfld.long 0x00 9. " GSB393 ,Group Status Bit 393" "Group 0,Group 1" bitfld.long 0x00 8. " GSB392 ,Group Status Bit 392" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1" bitfld.long 0x00 6. " GSB390 ,Group Status Bit 390" "Group 0,Group 1" bitfld.long 0x00 5. " GSB389 ,Group Status Bit 389" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1" bitfld.long 0x00 3. " GSB387 ,Group Status Bit 387" "Group 0,Group 1" bitfld.long 0x00 2. " GSB386 ,Group Status Bit 386" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1" bitfld.long 0x00 0. " GSB384 ,Group Status Bit 384" "Group 0,Group 1" else rgroup.long 0x00B0++0x03 line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00B4)) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Non-secure access)" bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1" bitfld.long 0x00 30. " GSB446 ,Group Status Bit 446" "Group 0,Group 1" bitfld.long 0x00 29. " GSB445 ,Group Status Bit 445" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1" bitfld.long 0x00 27. " GSB443 ,Group Status Bit 443" "Group 0,Group 1" bitfld.long 0x00 26. " GSB442 ,Group Status Bit 442" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1" bitfld.long 0x00 24. " GSB440 ,Group Status Bit 440" "Group 0,Group 1" bitfld.long 0x00 23. " GSB439 ,Group Status Bit 439" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1" bitfld.long 0x00 21. " GSB437 ,Group Status Bit 437" "Group 0,Group 1" bitfld.long 0x00 20. " GSB436 ,Group Status Bit 436" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1" bitfld.long 0x00 18. " GSB434 ,Group Status Bit 434" "Group 0,Group 1" bitfld.long 0x00 17. " GSB433 ,Group Status Bit 433" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1" bitfld.long 0x00 15. " GSB431 ,Group Status Bit 431" "Group 0,Group 1" bitfld.long 0x00 14. " GSB430 ,Group Status Bit 430" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1" bitfld.long 0x00 12. " GSB428 ,Group Status Bit 428" "Group 0,Group 1" bitfld.long 0x00 11. " GSB427 ,Group Status Bit 427" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1" bitfld.long 0x00 9. " GSB425 ,Group Status Bit 425" "Group 0,Group 1" bitfld.long 0x00 8. " GSB424 ,Group Status Bit 424" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1" bitfld.long 0x00 6. " GSB422 ,Group Status Bit 422" "Group 0,Group 1" bitfld.long 0x00 5. " GSB421 ,Group Status Bit 421" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1" bitfld.long 0x00 3. " GSB419 ,Group Status Bit 419" "Group 0,Group 1" bitfld.long 0x00 2. " GSB418 ,Group Status Bit 418" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1" bitfld.long 0x00 0. " GSB416 ,Group Status Bit 416" "Group 0,Group 1" else rgroup.long 0x00B4++0x03 line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00B8)) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Non-secure access)" bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1" bitfld.long 0x00 30. " GSB478 ,Group Status Bit 478" "Group 0,Group 1" bitfld.long 0x00 29. " GSB477 ,Group Status Bit 477" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1" bitfld.long 0x00 27. " GSB475 ,Group Status Bit 475" "Group 0,Group 1" bitfld.long 0x00 26. " GSB474 ,Group Status Bit 474" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1" bitfld.long 0x00 24. " GSB472 ,Group Status Bit 472" "Group 0,Group 1" bitfld.long 0x00 23. " GSB471 ,Group Status Bit 471" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1" bitfld.long 0x00 21. " GSB469 ,Group Status Bit 469" "Group 0,Group 1" bitfld.long 0x00 20. " GSB468 ,Group Status Bit 468" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1" bitfld.long 0x00 18. " GSB466 ,Group Status Bit 466" "Group 0,Group 1" bitfld.long 0x00 17. " GSB465 ,Group Status Bit 465" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1" bitfld.long 0x00 15. " GSB463 ,Group Status Bit 463" "Group 0,Group 1" bitfld.long 0x00 14. " GSB462 ,Group Status Bit 462" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1" bitfld.long 0x00 12. " GSB460 ,Group Status Bit 460" "Group 0,Group 1" bitfld.long 0x00 11. " GSB459 ,Group Status Bit 459" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1" bitfld.long 0x00 9. " GSB457 ,Group Status Bit 457" "Group 0,Group 1" bitfld.long 0x00 8. " GSB456 ,Group Status Bit 456" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1" bitfld.long 0x00 6. " GSB454 ,Group Status Bit 454" "Group 0,Group 1" bitfld.long 0x00 5. " GSB453 ,Group Status Bit 453" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1" bitfld.long 0x00 3. " GSB451 ,Group Status Bit 451" "Group 0,Group 1" bitfld.long 0x00 2. " GSB450 ,Group Status Bit 450" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1" bitfld.long 0x00 0. " GSB448 ,Group Status Bit 448" "Group 0,Group 1" else rgroup.long 0x00B8++0x03 line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00BC)) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Non-secure access)" bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1" bitfld.long 0x00 30. " GSB510 ,Group Status Bit 510" "Group 0,Group 1" bitfld.long 0x00 29. " GSB509 ,Group Status Bit 509" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1" bitfld.long 0x00 27. " GSB507 ,Group Status Bit 507" "Group 0,Group 1" bitfld.long 0x00 26. " GSB506 ,Group Status Bit 506" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1" bitfld.long 0x00 24. " GSB504 ,Group Status Bit 504" "Group 0,Group 1" bitfld.long 0x00 23. " GSB503 ,Group Status Bit 503" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1" bitfld.long 0x00 21. " GSB501 ,Group Status Bit 501" "Group 0,Group 1" bitfld.long 0x00 20. " GSB500 ,Group Status Bit 500" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1" bitfld.long 0x00 18. " GSB498 ,Group Status Bit 498" "Group 0,Group 1" bitfld.long 0x00 17. " GSB497 ,Group Status Bit 497" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1" bitfld.long 0x00 15. " GSB495 ,Group Status Bit 495" "Group 0,Group 1" bitfld.long 0x00 14. " GSB494 ,Group Status Bit 494" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1" bitfld.long 0x00 12. " GSB492 ,Group Status Bit 492" "Group 0,Group 1" bitfld.long 0x00 11. " GSB491 ,Group Status Bit 491" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1" bitfld.long 0x00 9. " GSB489 ,Group Status Bit 489" "Group 0,Group 1" bitfld.long 0x00 8. " GSB488 ,Group Status Bit 488" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1" bitfld.long 0x00 6. " GSB486 ,Group Status Bit 486" "Group 0,Group 1" bitfld.long 0x00 5. " GSB485 ,Group Status Bit 485" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1" bitfld.long 0x00 3. " GSB483 ,Group Status Bit 483" "Group 0,Group 1" bitfld.long 0x00 2. " GSB482 ,Group Status Bit 482" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1" bitfld.long 0x00 0. " GSB480 ,Group Status Bit 480" "Group 0,Group 1" else rgroup.long 0x00BC++0x03 line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00C0)) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Non-secure access)" bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1" bitfld.long 0x00 30. " GSB542 ,Group Status Bit 542" "Group 0,Group 1" bitfld.long 0x00 29. " GSB541 ,Group Status Bit 541" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1" bitfld.long 0x00 27. " GSB539 ,Group Status Bit 539" "Group 0,Group 1" bitfld.long 0x00 26. " GSB538 ,Group Status Bit 538" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1" bitfld.long 0x00 24. " GSB536 ,Group Status Bit 536" "Group 0,Group 1" bitfld.long 0x00 23. " GSB535 ,Group Status Bit 535" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1" bitfld.long 0x00 21. " GSB533 ,Group Status Bit 533" "Group 0,Group 1" bitfld.long 0x00 20. " GSB532 ,Group Status Bit 532" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1" bitfld.long 0x00 18. " GSB530 ,Group Status Bit 530" "Group 0,Group 1" bitfld.long 0x00 17. " GSB529 ,Group Status Bit 529" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1" bitfld.long 0x00 15. " GSB527 ,Group Status Bit 527" "Group 0,Group 1" bitfld.long 0x00 14. " GSB526 ,Group Status Bit 526" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1" bitfld.long 0x00 12. " GSB524 ,Group Status Bit 524" "Group 0,Group 1" bitfld.long 0x00 11. " GSB523 ,Group Status Bit 523" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1" bitfld.long 0x00 9. " GSB521 ,Group Status Bit 521" "Group 0,Group 1" bitfld.long 0x00 8. " GSB520 ,Group Status Bit 520" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1" bitfld.long 0x00 6. " GSB518 ,Group Status Bit 518" "Group 0,Group 1" bitfld.long 0x00 5. " GSB517 ,Group Status Bit 517" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1" bitfld.long 0x00 3. " GSB515 ,Group Status Bit 515" "Group 0,Group 1" bitfld.long 0x00 2. " GSB514 ,Group Status Bit 514" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1" bitfld.long 0x00 0. " GSB512 ,Group Status Bit 512" "Group 0,Group 1" else rgroup.long 0x00C0++0x03 line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00C4)) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Non-secure access)" bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1" bitfld.long 0x00 30. " GSB574 ,Group Status Bit 574" "Group 0,Group 1" bitfld.long 0x00 29. " GSB573 ,Group Status Bit 573" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1" bitfld.long 0x00 27. " GSB571 ,Group Status Bit 571" "Group 0,Group 1" bitfld.long 0x00 26. " GSB570 ,Group Status Bit 570" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1" bitfld.long 0x00 24. " GSB568 ,Group Status Bit 568" "Group 0,Group 1" bitfld.long 0x00 23. " GSB567 ,Group Status Bit 567" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1" bitfld.long 0x00 21. " GSB565 ,Group Status Bit 565" "Group 0,Group 1" bitfld.long 0x00 20. " GSB564 ,Group Status Bit 564" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1" bitfld.long 0x00 18. " GSB562 ,Group Status Bit 562" "Group 0,Group 1" bitfld.long 0x00 17. " GSB561 ,Group Status Bit 561" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1" bitfld.long 0x00 15. " GSB559 ,Group Status Bit 559" "Group 0,Group 1" bitfld.long 0x00 14. " GSB558 ,Group Status Bit 558" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1" bitfld.long 0x00 12. " GSB556 ,Group Status Bit 556" "Group 0,Group 1" bitfld.long 0x00 11. " GSB555 ,Group Status Bit 555" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1" bitfld.long 0x00 9. " GSB553 ,Group Status Bit 553" "Group 0,Group 1" bitfld.long 0x00 8. " GSB552 ,Group Status Bit 552" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1" bitfld.long 0x00 6. " GSB550 ,Group Status Bit 550" "Group 0,Group 1" bitfld.long 0x00 5. " GSB549 ,Group Status Bit 549" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1" bitfld.long 0x00 3. " GSB547 ,Group Status Bit 547" "Group 0,Group 1" bitfld.long 0x00 2. " GSB546 ,Group Status Bit 546" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1" bitfld.long 0x00 0. " GSB544 ,Group Status Bit 544" "Group 0,Group 1" else rgroup.long 0x00C4++0x03 line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00C8)) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Non-secure access)" bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1" bitfld.long 0x00 30. " GSB606 ,Group Status Bit 606" "Group 0,Group 1" bitfld.long 0x00 29. " GSB605 ,Group Status Bit 605" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1" bitfld.long 0x00 27. " GSB603 ,Group Status Bit 603" "Group 0,Group 1" bitfld.long 0x00 26. " GSB602 ,Group Status Bit 602" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1" bitfld.long 0x00 24. " GSB600 ,Group Status Bit 600" "Group 0,Group 1" bitfld.long 0x00 23. " GSB599 ,Group Status Bit 599" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1" bitfld.long 0x00 21. " GSB597 ,Group Status Bit 597" "Group 0,Group 1" bitfld.long 0x00 20. " GSB596 ,Group Status Bit 596" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1" bitfld.long 0x00 18. " GSB594 ,Group Status Bit 594" "Group 0,Group 1" bitfld.long 0x00 17. " GSB593 ,Group Status Bit 593" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1" bitfld.long 0x00 15. " GSB591 ,Group Status Bit 591" "Group 0,Group 1" bitfld.long 0x00 14. " GSB590 ,Group Status Bit 590" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1" bitfld.long 0x00 12. " GSB588 ,Group Status Bit 588" "Group 0,Group 1" bitfld.long 0x00 11. " GSB587 ,Group Status Bit 587" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1" bitfld.long 0x00 9. " GSB585 ,Group Status Bit 585" "Group 0,Group 1" bitfld.long 0x00 8. " GSB584 ,Group Status Bit 584" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1" bitfld.long 0x00 6. " GSB582 ,Group Status Bit 582" "Group 0,Group 1" bitfld.long 0x00 5. " GSB581 ,Group Status Bit 581" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1" bitfld.long 0x00 3. " GSB579 ,Group Status Bit 579" "Group 0,Group 1" bitfld.long 0x00 2. " GSB578 ,Group Status Bit 578" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1" bitfld.long 0x00 0. " GSB576 ,Group Status Bit 576" "Group 0,Group 1" else rgroup.long 0x00C8++0x03 line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00CC)) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Non-secure access)" bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1" bitfld.long 0x00 30. " GSB638 ,Group Status Bit 638" "Group 0,Group 1" bitfld.long 0x00 29. " GSB637 ,Group Status Bit 637" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1" bitfld.long 0x00 27. " GSB635 ,Group Status Bit 635" "Group 0,Group 1" bitfld.long 0x00 26. " GSB634 ,Group Status Bit 634" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1" bitfld.long 0x00 24. " GSB632 ,Group Status Bit 632" "Group 0,Group 1" bitfld.long 0x00 23. " GSB631 ,Group Status Bit 631" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1" bitfld.long 0x00 21. " GSB629 ,Group Status Bit 629" "Group 0,Group 1" bitfld.long 0x00 20. " GSB628 ,Group Status Bit 628" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1" bitfld.long 0x00 18. " GSB626 ,Group Status Bit 626" "Group 0,Group 1" bitfld.long 0x00 17. " GSB625 ,Group Status Bit 625" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1" bitfld.long 0x00 15. " GSB623 ,Group Status Bit 623" "Group 0,Group 1" bitfld.long 0x00 14. " GSB622 ,Group Status Bit 622" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1" bitfld.long 0x00 12. " GSB620 ,Group Status Bit 620" "Group 0,Group 1" bitfld.long 0x00 11. " GSB619 ,Group Status Bit 619" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1" bitfld.long 0x00 9. " GSB617 ,Group Status Bit 617" "Group 0,Group 1" bitfld.long 0x00 8. " GSB616 ,Group Status Bit 616" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1" bitfld.long 0x00 6. " GSB614 ,Group Status Bit 614" "Group 0,Group 1" bitfld.long 0x00 5. " GSB613 ,Group Status Bit 613" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1" bitfld.long 0x00 3. " GSB611 ,Group Status Bit 611" "Group 0,Group 1" bitfld.long 0x00 2. " GSB610 ,Group Status Bit 610" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1" bitfld.long 0x00 0. " GSB608 ,Group Status Bit 608" "Group 0,Group 1" else rgroup.long 0x00CC++0x03 line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00D0)) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Non-secure access)" bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1" bitfld.long 0x00 30. " GSB670 ,Group Status Bit 670" "Group 0,Group 1" bitfld.long 0x00 29. " GSB669 ,Group Status Bit 669" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1" bitfld.long 0x00 27. " GSB667 ,Group Status Bit 667" "Group 0,Group 1" bitfld.long 0x00 26. " GSB666 ,Group Status Bit 666" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1" bitfld.long 0x00 24. " GSB664 ,Group Status Bit 664" "Group 0,Group 1" bitfld.long 0x00 23. " GSB663 ,Group Status Bit 663" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1" bitfld.long 0x00 21. " GSB661 ,Group Status Bit 661" "Group 0,Group 1" bitfld.long 0x00 20. " GSB660 ,Group Status Bit 660" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1" bitfld.long 0x00 18. " GSB658 ,Group Status Bit 658" "Group 0,Group 1" bitfld.long 0x00 17. " GSB657 ,Group Status Bit 657" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1" bitfld.long 0x00 15. " GSB655 ,Group Status Bit 655" "Group 0,Group 1" bitfld.long 0x00 14. " GSB654 ,Group Status Bit 654" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1" bitfld.long 0x00 12. " GSB652 ,Group Status Bit 652" "Group 0,Group 1" bitfld.long 0x00 11. " GSB651 ,Group Status Bit 651" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1" bitfld.long 0x00 9. " GSB649 ,Group Status Bit 649" "Group 0,Group 1" bitfld.long 0x00 8. " GSB648 ,Group Status Bit 648" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1" bitfld.long 0x00 6. " GSB646 ,Group Status Bit 646" "Group 0,Group 1" bitfld.long 0x00 5. " GSB645 ,Group Status Bit 645" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1" bitfld.long 0x00 3. " GSB643 ,Group Status Bit 643" "Group 0,Group 1" bitfld.long 0x00 2. " GSB642 ,Group Status Bit 642" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1" bitfld.long 0x00 0. " GSB640 ,Group Status Bit 640" "Group 0,Group 1" else rgroup.long 0x00D0++0x03 line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00D4)) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Non-secure access)" bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1" bitfld.long 0x00 30. " GSB702 ,Group Status Bit 702" "Group 0,Group 1" bitfld.long 0x00 29. " GSB701 ,Group Status Bit 701" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1" bitfld.long 0x00 27. " GSB699 ,Group Status Bit 699" "Group 0,Group 1" bitfld.long 0x00 26. " GSB698 ,Group Status Bit 698" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1" bitfld.long 0x00 24. " GSB696 ,Group Status Bit 696" "Group 0,Group 1" bitfld.long 0x00 23. " GSB695 ,Group Status Bit 695" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1" bitfld.long 0x00 21. " GSB693 ,Group Status Bit 693" "Group 0,Group 1" bitfld.long 0x00 20. " GSB692 ,Group Status Bit 692" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1" bitfld.long 0x00 18. " GSB690 ,Group Status Bit 690" "Group 0,Group 1" bitfld.long 0x00 17. " GSB689 ,Group Status Bit 689" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1" bitfld.long 0x00 15. " GSB687 ,Group Status Bit 687" "Group 0,Group 1" bitfld.long 0x00 14. " GSB686 ,Group Status Bit 686" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1" bitfld.long 0x00 12. " GSB684 ,Group Status Bit 684" "Group 0,Group 1" bitfld.long 0x00 11. " GSB683 ,Group Status Bit 683" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1" bitfld.long 0x00 9. " GSB681 ,Group Status Bit 681" "Group 0,Group 1" bitfld.long 0x00 8. " GSB680 ,Group Status Bit 680" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1" bitfld.long 0x00 6. " GSB678 ,Group Status Bit 678" "Group 0,Group 1" bitfld.long 0x00 5. " GSB677 ,Group Status Bit 677" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1" bitfld.long 0x00 3. " GSB675 ,Group Status Bit 675" "Group 0,Group 1" bitfld.long 0x00 2. " GSB674 ,Group Status Bit 674" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1" bitfld.long 0x00 0. " GSB672 ,Group Status Bit 672" "Group 0,Group 1" else rgroup.long 0x00D4++0x03 line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00D8)) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Non-secure access)" bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1" bitfld.long 0x00 30. " GSB734 ,Group Status Bit 734" "Group 0,Group 1" bitfld.long 0x00 29. " GSB733 ,Group Status Bit 733" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1" bitfld.long 0x00 27. " GSB731 ,Group Status Bit 731" "Group 0,Group 1" bitfld.long 0x00 26. " GSB730 ,Group Status Bit 730" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1" bitfld.long 0x00 24. " GSB728 ,Group Status Bit 728" "Group 0,Group 1" bitfld.long 0x00 23. " GSB727 ,Group Status Bit 727" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1" bitfld.long 0x00 21. " GSB725 ,Group Status Bit 725" "Group 0,Group 1" bitfld.long 0x00 20. " GSB724 ,Group Status Bit 724" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1" bitfld.long 0x00 18. " GSB722 ,Group Status Bit 722" "Group 0,Group 1" bitfld.long 0x00 17. " GSB721 ,Group Status Bit 721" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1" bitfld.long 0x00 15. " GSB719 ,Group Status Bit 719" "Group 0,Group 1" bitfld.long 0x00 14. " GSB718 ,Group Status Bit 718" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1" bitfld.long 0x00 12. " GSB716 ,Group Status Bit 716" "Group 0,Group 1" bitfld.long 0x00 11. " GSB715 ,Group Status Bit 715" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1" bitfld.long 0x00 9. " GSB713 ,Group Status Bit 713" "Group 0,Group 1" bitfld.long 0x00 8. " GSB712 ,Group Status Bit 712" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1" bitfld.long 0x00 6. " GSB710 ,Group Status Bit 710" "Group 0,Group 1" bitfld.long 0x00 5. " GSB709 ,Group Status Bit 709" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1" bitfld.long 0x00 3. " GSB707 ,Group Status Bit 707" "Group 0,Group 1" bitfld.long 0x00 2. " GSB706 ,Group Status Bit 706" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1" bitfld.long 0x00 0. " GSB704 ,Group Status Bit 704" "Group 0,Group 1" else rgroup.long 0x00D8++0x03 line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00DC)) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Non-secure access)" bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1" bitfld.long 0x00 30. " GSB766 ,Group Status Bit 766" "Group 0,Group 1" bitfld.long 0x00 29. " GSB765 ,Group Status Bit 765" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1" bitfld.long 0x00 27. " GSB763 ,Group Status Bit 763" "Group 0,Group 1" bitfld.long 0x00 26. " GSB762 ,Group Status Bit 762" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1" bitfld.long 0x00 24. " GSB760 ,Group Status Bit 760" "Group 0,Group 1" bitfld.long 0x00 23. " GSB759 ,Group Status Bit 759" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1" bitfld.long 0x00 21. " GSB757 ,Group Status Bit 757" "Group 0,Group 1" bitfld.long 0x00 20. " GSB756 ,Group Status Bit 756" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1" bitfld.long 0x00 18. " GSB754 ,Group Status Bit 754" "Group 0,Group 1" bitfld.long 0x00 17. " GSB753 ,Group Status Bit 753" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1" bitfld.long 0x00 15. " GSB751 ,Group Status Bit 751" "Group 0,Group 1" bitfld.long 0x00 14. " GSB750 ,Group Status Bit 750" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1" bitfld.long 0x00 12. " GSB748 ,Group Status Bit 748" "Group 0,Group 1" bitfld.long 0x00 11. " GSB747 ,Group Status Bit 747" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1" bitfld.long 0x00 9. " GSB745 ,Group Status Bit 745" "Group 0,Group 1" bitfld.long 0x00 8. " GSB744 ,Group Status Bit 744" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1" bitfld.long 0x00 6. " GSB742 ,Group Status Bit 742" "Group 0,Group 1" bitfld.long 0x00 5. " GSB741 ,Group Status Bit 741" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1" bitfld.long 0x00 3. " GSB739 ,Group Status Bit 739" "Group 0,Group 1" bitfld.long 0x00 2. " GSB738 ,Group Status Bit 738" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1" bitfld.long 0x00 0. " GSB736 ,Group Status Bit 736" "Group 0,Group 1" else rgroup.long 0x00DC++0x03 line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00E0)) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0x00E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Non-secure access)" bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1" bitfld.long 0x00 30. " GSB798 ,Group Status Bit 798" "Group 0,Group 1" bitfld.long 0x00 29. " GSB797 ,Group Status Bit 797" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1" bitfld.long 0x00 27. " GSB795 ,Group Status Bit 795" "Group 0,Group 1" bitfld.long 0x00 26. " GSB794 ,Group Status Bit 794" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1" bitfld.long 0x00 24. " GSB792 ,Group Status Bit 792" "Group 0,Group 1" bitfld.long 0x00 23. " GSB791 ,Group Status Bit 791" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1" bitfld.long 0x00 21. " GSB789 ,Group Status Bit 789" "Group 0,Group 1" bitfld.long 0x00 20. " GSB788 ,Group Status Bit 788" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1" bitfld.long 0x00 18. " GSB786 ,Group Status Bit 786" "Group 0,Group 1" bitfld.long 0x00 17. " GSB785 ,Group Status Bit 785" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1" bitfld.long 0x00 15. " GSB783 ,Group Status Bit 783" "Group 0,Group 1" bitfld.long 0x00 14. " GSB782 ,Group Status Bit 782" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1" bitfld.long 0x00 12. " GSB780 ,Group Status Bit 780" "Group 0,Group 1" bitfld.long 0x00 11. " GSB779 ,Group Status Bit 779" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1" bitfld.long 0x00 9. " GSB777 ,Group Status Bit 777" "Group 0,Group 1" bitfld.long 0x00 8. " GSB776 ,Group Status Bit 776" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1" bitfld.long 0x00 6. " GSB774 ,Group Status Bit 774" "Group 0,Group 1" bitfld.long 0x00 5. " GSB773 ,Group Status Bit 773" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1" bitfld.long 0x00 3. " GSB771 ,Group Status Bit 771" "Group 0,Group 1" bitfld.long 0x00 2. " GSB770 ,Group Status Bit 770" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1" bitfld.long 0x00 0. " GSB768 ,Group Status Bit 768" "Group 0,Group 1" else rgroup.long 0x0E0++0x03 line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00E4)) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Non-secure access)" bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1" bitfld.long 0x00 30. " GSB830 ,Group Status Bit 830" "Group 0,Group 1" bitfld.long 0x00 29. " GSB829 ,Group Status Bit 829" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1" bitfld.long 0x00 27. " GSB827 ,Group Status Bit 827" "Group 0,Group 1" bitfld.long 0x00 26. " GSB826 ,Group Status Bit 826" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1" bitfld.long 0x00 24. " GSB824 ,Group Status Bit 824" "Group 0,Group 1" bitfld.long 0x00 23. " GSB823 ,Group Status Bit 823" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1" bitfld.long 0x00 21. " GSB821 ,Group Status Bit 821" "Group 0,Group 1" bitfld.long 0x00 20. " GSB820 ,Group Status Bit 820" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1" bitfld.long 0x00 18. " GSB818 ,Group Status Bit 818" "Group 0,Group 1" bitfld.long 0x00 17. " GSB817 ,Group Status Bit 817" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1" bitfld.long 0x00 15. " GSB815 ,Group Status Bit 815" "Group 0,Group 1" bitfld.long 0x00 14. " GSB814 ,Group Status Bit 814" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1" bitfld.long 0x00 12. " GSB812 ,Group Status Bit 812" "Group 0,Group 1" bitfld.long 0x00 11. " GSB811 ,Group Status Bit 811" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1" bitfld.long 0x00 9. " GSB809 ,Group Status Bit 809" "Group 0,Group 1" bitfld.long 0x00 8. " GSB808 ,Group Status Bit 808" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1" bitfld.long 0x00 6. " GSB806 ,Group Status Bit 806" "Group 0,Group 1" bitfld.long 0x00 5. " GSB805 ,Group Status Bit 805" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1" bitfld.long 0x00 3. " GSB803 ,Group Status Bit 803" "Group 0,Group 1" bitfld.long 0x00 2. " GSB802 ,Group Status Bit 802" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1" bitfld.long 0x00 0. " GSB800 ,Group Status Bit 800" "Group 0,Group 1" else rgroup.long 0x00E4++0x03 line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00E8)) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Non-secure access)" bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1" bitfld.long 0x00 30. " GSB862 ,Group Status Bit 862" "Group 0,Group 1" bitfld.long 0x00 29. " GSB861 ,Group Status Bit 861" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1" bitfld.long 0x00 27. " GSB859 ,Group Status Bit 859" "Group 0,Group 1" bitfld.long 0x00 26. " GSB858 ,Group Status Bit 858" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1" bitfld.long 0x00 24. " GSB856 ,Group Status Bit 856" "Group 0,Group 1" bitfld.long 0x00 23. " GSB855 ,Group Status Bit 855" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1" bitfld.long 0x00 21. " GSB853 ,Group Status Bit 853" "Group 0,Group 1" bitfld.long 0x00 20. " GSB852 ,Group Status Bit 852" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1" bitfld.long 0x00 18. " GSB850 ,Group Status Bit 850" "Group 0,Group 1" bitfld.long 0x00 17. " GSB849 ,Group Status Bit 849" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1" bitfld.long 0x00 15. " GSB847 ,Group Status Bit 847" "Group 0,Group 1" bitfld.long 0x00 14. " GSB846 ,Group Status Bit 846" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1" bitfld.long 0x00 12. " GSB844 ,Group Status Bit 844" "Group 0,Group 1" bitfld.long 0x00 11. " GSB843 ,Group Status Bit 843" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1" bitfld.long 0x00 9. " GSB841 ,Group Status Bit 841" "Group 0,Group 1" bitfld.long 0x00 8. " GSB840 ,Group Status Bit 840" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1" bitfld.long 0x00 6. " GSB838 ,Group Status Bit 838" "Group 0,Group 1" bitfld.long 0x00 5. " GSB837 ,Group Status Bit 837" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1" bitfld.long 0x00 3. " GSB835 ,Group Status Bit 835" "Group 0,Group 1" bitfld.long 0x00 2. " GSB834 ,Group Status Bit 834" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1" bitfld.long 0x00 0. " GSB832 ,Group Status Bit 832" "Group 0,Group 1" else rgroup.long 0x00E8++0x03 line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00EC)) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Non-Secure access)" bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1" bitfld.long 0x00 30. " GSB894 ,Group Status Bit 894" "Group 0,Group 1" bitfld.long 0x00 29. " GSB893 ,Group Status Bit 893" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1" bitfld.long 0x00 27. " GSB891 ,Group Status Bit 891" "Group 0,Group 1" bitfld.long 0x00 26. " GSB890 ,Group Status Bit 890" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1" bitfld.long 0x00 24. " GSB888 ,Group Status Bit 888" "Group 0,Group 1" bitfld.long 0x00 23. " GSB887 ,Group Status Bit 887" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1" bitfld.long 0x00 21. " GSB885 ,Group Status Bit 885" "Group 0,Group 1" bitfld.long 0x00 20. " GSB884 ,Group Status Bit 884" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1" bitfld.long 0x00 18. " GSB882 ,Group Status Bit 882" "Group 0,Group 1" bitfld.long 0x00 17. " GSB881 ,Group Status Bit 881" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1" bitfld.long 0x00 15. " GSB879 ,Group Status Bit 879" "Group 0,Group 1" bitfld.long 0x00 14. " GSB878 ,Group Status Bit 878" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1" bitfld.long 0x00 12. " GSB876 ,Group Status Bit 876" "Group 0,Group 1" bitfld.long 0x00 11. " GSB875 ,Group Status Bit 875" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1" bitfld.long 0x00 9. " GSB873 ,Group Status Bit 873" "Group 0,Group 1" bitfld.long 0x00 8. " GSB872 ,Group Status Bit 872" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1" bitfld.long 0x00 6. " GSB870 ,Group Status Bit 870" "Group 0,Group 1" bitfld.long 0x00 5. " GSB869 ,Group Status Bit 869" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1" bitfld.long 0x00 3. " GSB867 ,Group Status Bit 867" "Group 0,Group 1" bitfld.long 0x00 2. " GSB866 ,Group Status Bit 866" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1" bitfld.long 0x00 0. " GSB864 ,Group Status Bit 864" "Group 0,Group 1" else rgroup.long 0x00EC++0x03 line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00F0)) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0x00F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Non-secure access)" bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1" bitfld.long 0x00 30. " GSB926 ,Group Status Bit 926" "Group 0,Group 1" bitfld.long 0x00 29. " GSB925 ,Group Status Bit 925" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1" bitfld.long 0x00 27. " GSB923 ,Group Status Bit 923" "Group 0,Group 1" bitfld.long 0x00 26. " GSB922 ,Group Status Bit 922" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1" bitfld.long 0x00 24. " GSB920 ,Group Status Bit 920" "Group 0,Group 1" bitfld.long 0x00 23. " GSB919 ,Group Status Bit 919" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1" bitfld.long 0x00 21. " GSB917 ,Group Status Bit 917" "Group 0,Group 1" bitfld.long 0x00 20. " GSB916 ,Group Status Bit 916" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1" bitfld.long 0x00 18. " GSB914 ,Group Status Bit 914" "Group 0,Group 1" bitfld.long 0x00 17. " GSB913 ,Group Status Bit 913" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1" bitfld.long 0x00 15. " GSB911 ,Group Status Bit 911" "Group 0,Group 1" bitfld.long 0x00 14. " GSB910 ,Group Status Bit 910" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1" bitfld.long 0x00 12. " GSB908 ,Group Status Bit 908" "Group 0,Group 1" bitfld.long 0x00 11. " GSB907 ,Group Status Bit 907" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1" bitfld.long 0x00 9. " GSB905 ,Group Status Bit 905" "Group 0,Group 1" bitfld.long 0x00 8. " GSB904 ,Group Status Bit 904" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1" bitfld.long 0x00 6. " GSB902 ,Group Status Bit 902" "Group 0,Group 1" bitfld.long 0x00 5. " GSB901 ,Group Status Bit 901" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1" bitfld.long 0x00 3. " GSB899 ,Group Status Bit 899" "Group 0,Group 1" bitfld.long 0x00 2. " GSB898 ,Group Status Bit 898" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1" bitfld.long 0x00 0. " GSB896 ,Group Status Bit 896" "Group 0,Group 1" else rgroup.long 0x0F0++0x03 line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00F4)) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Non-secure access)" bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1" bitfld.long 0x00 30. " GSB958 ,Group Status Bit 958" "Group 0,Group 1" bitfld.long 0x00 29. " GSB957 ,Group Status Bit 957" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1" bitfld.long 0x00 27. " GSB955 ,Group Status Bit 955" "Group 0,Group 1" bitfld.long 0x00 26. " GSB954 ,Group Status Bit 954" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1" bitfld.long 0x00 24. " GSB952 ,Group Status Bit 952" "Group 0,Group 1" bitfld.long 0x00 23. " GSB951 ,Group Status Bit 951" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1" bitfld.long 0x00 21. " GSB949 ,Group Status Bit 949" "Group 0,Group 1" bitfld.long 0x00 20. " GSB948 ,Group Status Bit 948" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1" bitfld.long 0x00 18. " GSB946 ,Group Status Bit 946" "Group 0,Group 1" bitfld.long 0x00 17. " GSB945 ,Group Status Bit 945" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1" bitfld.long 0x00 15. " GSB943 ,Group Status Bit 943" "Group 0,Group 1" bitfld.long 0x00 14. " GSB942 ,Group Status Bit 942" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1" bitfld.long 0x00 12. " GSB940 ,Group Status Bit 940" "Group 0,Group 1" bitfld.long 0x00 11. " GSB939 ,Group Status Bit 939" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1" bitfld.long 0x00 9. " GSB937 ,Group Status Bit 937" "Group 0,Group 1" bitfld.long 0x00 8. " GSB936 ,Group Status Bit 936" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1" bitfld.long 0x00 6. " GSB934 ,Group Status Bit 934" "Group 0,Group 1" bitfld.long 0x00 5. " GSB933 ,Group Status Bit 933" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1" bitfld.long 0x00 3. " GSB931 ,Group Status Bit 931" "Group 0,Group 1" bitfld.long 0x00 2. " GSB930 ,Group Status Bit 930" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1" bitfld.long 0x00 0. " GSB928 ,Group Status Bit 928" "Group 0,Group 1" else rgroup.long 0x00F4++0x03 line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00F8)) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Non-secure access)" bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1" bitfld.long 0x00 30. " GSB990 ,Group Status Bit 990" "Group 0,Group 1" bitfld.long 0x00 29. " GSB989 ,Group Status Bit 989" "Group 0,Group 1" textline " " bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1" bitfld.long 0x00 27. " GSB987 ,Group Status Bit 987" "Group 0,Group 1" bitfld.long 0x00 26. " GSB986 ,Group Status Bit 986" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1" bitfld.long 0x00 24. " GSB984 ,Group Status Bit 984" "Group 0,Group 1" bitfld.long 0x00 23. " GSB983 ,Group Status Bit 983" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1" bitfld.long 0x00 21. " GSB981 ,Group Status Bit 981" "Group 0,Group 1" bitfld.long 0x00 20. " GSB980 ,Group Status Bit 980" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1" bitfld.long 0x00 18. " GSB978 ,Group Status Bit 978" "Group 0,Group 1" bitfld.long 0x00 17. " GSB977 ,Group Status Bit 977" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1" bitfld.long 0x00 15. " GSB975 ,Group Status Bit 975" "Group 0,Group 1" bitfld.long 0x00 14. " GSB974 ,Group Status Bit 974" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1" bitfld.long 0x00 12. " GSB972 ,Group Status Bit 972" "Group 0,Group 1" bitfld.long 0x00 11. " GSB971 ,Group Status Bit 971" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1" bitfld.long 0x00 9. " GSB969 ,Group Status Bit 969" "Group 0,Group 1" bitfld.long 0x00 8. " GSB968 ,Group Status Bit 968" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1" bitfld.long 0x00 6. " GSB966 ,Group Status Bit 966" "Group 0,Group 1" bitfld.long 0x00 5. " GSB965 ,Group Status Bit 965" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1" bitfld.long 0x00 3. " GSB963 ,Group Status Bit 963" "Group 0,Group 1" bitfld.long 0x00 2. " GSB962 ,Group Status Bit 962" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1" bitfld.long 0x00 0. " GSB960 ,Group Status Bit 960" "Group 0,Group 1" else rgroup.long 0x00F8++0x03 line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F)&&(PER.ADDRESS.isSECUREEX(ad:0xf1001000+0x00FC)) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0 (Secure),Group 1 (Non-secure)" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0 (Secure),Group 1 (Non-secure)" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0 (Secure),Group 1 (Non-secure)" elif (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F) group.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31 (Non-secure access)" bitfld.long 0x00 27. " GSB1019 ,Group Status Bit 1019" "Group 0,Group 1" bitfld.long 0x00 26. " GSB1018 ,Group Status Bit 1018" "Group 0,Group 1" textline " " bitfld.long 0x00 25. " GSB1017 ,Group Status Bit 1017" "Group 0,Group 1" bitfld.long 0x00 24. " GSB1016 ,Group Status Bit 1016" "Group 0,Group 1" bitfld.long 0x00 23. " GSB1015 ,Group Status Bit 1015" "Group 0,Group 1" textline " " bitfld.long 0x00 22. " GSB1014 ,Group Status Bit 1014" "Group 0,Group 1" bitfld.long 0x00 21. " GSB1013 ,Group Status Bit 1013" "Group 0,Group 1" bitfld.long 0x00 20. " GSB1012 ,Group Status Bit 1012" "Group 0,Group 1" textline " " bitfld.long 0x00 19. " GSB1011 ,Group Status Bit 1011" "Group 0,Group 1" bitfld.long 0x00 18. " GSB1010 ,Group Status Bit 1010" "Group 0,Group 1" bitfld.long 0x00 17. " GSB1009 ,Group Status Bit 1009" "Group 0,Group 1" textline " " bitfld.long 0x00 16. " GSB1008 ,Group Status Bit 1008" "Group 0,Group 1" bitfld.long 0x00 15. " GSB1007 ,Group Status Bit 1007" "Group 0,Group 1" bitfld.long 0x00 14. " GSB1006 ,Group Status Bit 1006" "Group 0,Group 1" textline " " bitfld.long 0x00 13. " GSB1005 ,Group Status Bit 1005" "Group 0,Group 1" bitfld.long 0x00 12. " GSB1004 ,Group Status Bit 1004" "Group 0,Group 1" bitfld.long 0x00 11. " GSB1003 ,Group Status Bit 1003" "Group 0,Group 1" textline " " bitfld.long 0x00 10. " GSB1002 ,Group Status Bit 1002" "Group 0,Group 1" bitfld.long 0x00 9. " GSB1001 ,Group Status Bit 1001" "Group 0,Group 1" bitfld.long 0x00 8. " GSB1000 ,Group Status Bit 1000" "Group 0,Group 1" textline " " bitfld.long 0x00 7. " GSB999 ,Group Status Bit 999" "Group 0,Group 1" bitfld.long 0x00 6. " GSB998 ,Group Status Bit 998" "Group 0,Group 1" bitfld.long 0x00 5. " GSB997 ,Group Status Bit 997" "Group 0,Group 1" textline " " bitfld.long 0x00 4. " GSB996 ,Group Status Bit 996" "Group 0,Group 1" bitfld.long 0x00 3. " GSB995 ,Group Status Bit 995" "Group 0,Group 1" bitfld.long 0x00 2. " GSB994 ,Group Status Bit 994" "Group 0,Group 1" textline " " bitfld.long 0x00 1. " GSB993 ,Group Status Bit 993" "Group 0,Group 1" bitfld.long 0x00 0. " GSB992 ,Group Status Bit 992" "Group 0,Group 1" else rgroup.long 0x00FC++0x03 line.long 0x0 "GICD_IGROUPR31,Interrupt Group Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end endif width 24. tree "Set/Clear Enable Registers" group.long 0x0100++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31 ,Set/Clear Enable Bit 31" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB30 ,Set/Clear Enable Bit 30" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB29 ,Set/Clear Enable Bit 29" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28 ,Set/Clear Enable Bit 28" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB27 ,Set/Clear Enable Bit 27" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB26 ,Set/Clear Enable Bit 26" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25 ,Set/Clear Enable Bit 25" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB24 ,Set/Clear Enable Bit 24" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB23 ,Set/Clear Enable Bit 23" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22 ,Set/Clear Enable Bit 22" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB21 ,Set/Clear Enable Bit 21" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB20 ,Set/Clear Enable Bit 20" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19 ,Set/Clear Enable Bit 19" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB18 ,Set/Clear Enable Bit 18" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB17 ,Set/Clear Enable Bit 17" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16 ,Set/Clear Enable Bit 16" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB15 ,Set/Clear Enable Bit 15" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB14 ,Set/Clear Enable Bit 14" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13 ,Set/Clear Enable Bit 13" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB12 ,Set/Clear Enable Bit 12" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB11 ,Set/Clear Enable Bit 11" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10 ,Set/Clear Enable Bit 10" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB9 ,Set/Clear Enable Bit 9" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB8 ,Set/Clear Enable Bit 8" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7 ,Set/Clear Enable Bit 7" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB6 ,Set/Clear Enable Bit 6" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB5 ,Set/Clear Enable Bit 5" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4 ,Set/Clear Enable Bit 4" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB3 ,Set/Clear Enable Bit 3" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB2 ,Set/Clear Enable Bit 2" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1 ,Set/Clear Enable Bit 1" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB0 ,Set/Clear Enable Bit 0" "Disabled,Enabled" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63 ,Set/Clear Enable Bit 63" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB62 ,Set/Clear Enable Bit 62" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB61 ,Set/Clear Enable Bit 61" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60 ,Set/Clear Enable Bit 60" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB59 ,Set/Clear Enable Bit 59" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB58 ,Set/Clear Enable Bit 58" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57 ,Set/Clear Enable Bit 57" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB56 ,Set/Clear Enable Bit 56" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB55 ,Set/Clear Enable Bit 55" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54 ,Set/Clear Enable Bit 54" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB53 ,Set/Clear Enable Bit 53" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB52 ,Set/Clear Enable Bit 52" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51 ,Set/Clear Enable Bit 51" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB50 ,Set/Clear Enable Bit 50" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB49 ,Set/Clear Enable Bit 49" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48 ,Set/Clear Enable Bit 48" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB47 ,Set/Clear Enable Bit 47" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB46 ,Set/Clear Enable Bit 46" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45 ,Set/Clear Enable Bit 45" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB44 ,Set/Clear Enable Bit 44" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB43 ,Set/Clear Enable Bit 43" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42 ,Set/Clear Enable Bit 42" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB41 ,Set/Clear Enable Bit 41" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB40 ,Set/Clear Enable Bit 40" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39 ,Set/Clear Enable Bit 39" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB38 ,Set/Clear Enable Bit 38" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB37 ,Set/Clear Enable Bit 37" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36 ,Set/Clear Enable Bit 36" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB35 ,Set/Clear Enable Bit 35" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB34 ,Set/Clear Enable Bit 34" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33 ,Set/Clear Enable Bit 33" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB32 ,Set/Clear Enable Bit 32" "Disabled,Enabled" else rgroup.long 0x0104++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95 ,Set/Clear Enable Bit 95" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB94 ,Set/Clear Enable Bit 94" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB93 ,Set/Clear Enable Bit 93" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92 ,Set/Clear Enable Bit 92" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB91 ,Set/Clear Enable Bit 91" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB90 ,Set/Clear Enable Bit 90" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89 ,Set/Clear Enable Bit 89" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB88 ,Set/Clear Enable Bit 88" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB87 ,Set/Clear Enable Bit 87" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86 ,Set/Clear Enable Bit 86" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB85 ,Set/Clear Enable Bit 85" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB84 ,Set/Clear Enable Bit 84" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83 ,Set/Clear Enable Bit 83" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB82 ,Set/Clear Enable Bit 82" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB81 ,Set/Clear Enable Bit 81" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80 ,Set/Clear Enable Bit 80" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB79 ,Set/Clear Enable Bit 79" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB78 ,Set/Clear Enable Bit 78" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77 ,Set/Clear Enable Bit 77" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB76 ,Set/Clear Enable Bit 76" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB75 ,Set/Clear Enable Bit 75" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74 ,Set/Clear Enable Bit 74" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB73 ,Set/Clear Enable Bit 73" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB72 ,Set/Clear Enable Bit 72" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71 ,Set/Clear Enable Bit 71" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB70 ,Set/Clear Enable Bit 70" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB69 ,Set/Clear Enable Bit 69" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68 ,Set/Clear Enable Bit 68" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB67 ,Set/Clear Enable Bit 67" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB66 ,Set/Clear Enable Bit 66" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65 ,Set/Clear Enable Bit 65" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB64 ,Set/Clear Enable Bit 64" "Disabled,Enabled" else rgroup.long 0x0108++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127 ,Set/Clear Enable Bit 127" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB126 ,Set/Clear Enable Bit 126" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB125 ,Set/Clear Enable Bit 125" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124 ,Set/Clear Enable Bit 124" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB123 ,Set/Clear Enable Bit 123" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB122 ,Set/Clear Enable Bit 122" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121 ,Set/Clear Enable Bit 121" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB120 ,Set/Clear Enable Bit 120" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB119 ,Set/Clear Enable Bit 119" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118 ,Set/Clear Enable Bit 118" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB117 ,Set/Clear Enable Bit 117" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB116 ,Set/Clear Enable Bit 116" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115 ,Set/Clear Enable Bit 115" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB114 ,Set/Clear Enable Bit 114" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB113 ,Set/Clear Enable Bit 113" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112 ,Set/Clear Enable Bit 112" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB111 ,Set/Clear Enable Bit 111" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB110 ,Set/Clear Enable Bit 110" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109 ,Set/Clear Enable Bit 109" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB108 ,Set/Clear Enable Bit 108" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB107 ,Set/Clear Enable Bit 107" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106 ,Set/Clear Enable Bit 106" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB105 ,Set/Clear Enable Bit 105" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB104 ,Set/Clear Enable Bit 104" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103 ,Set/Clear Enable Bit 103" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB102 ,Set/Clear Enable Bit 102" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB101 ,Set/Clear Enable Bit 101" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100 ,Set/Clear Enable Bit 100" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB99 ,Set/Clear Enable Bit 99" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB98 ,Set/Clear Enable Bit 98" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97 ,Set/Clear Enable Bit 97" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB96 ,Set/Clear Enable Bit 96" "Disabled,Enabled" else rgroup.long 0x010C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159 ,Set/Clear Enable Bit 159" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB158 ,Set/Clear Enable Bit 158" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB157 ,Set/Clear Enable Bit 157" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156 ,Set/Clear Enable Bit 156" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB155 ,Set/Clear Enable Bit 155" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB154 ,Set/Clear Enable Bit 154" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153 ,Set/Clear Enable Bit 153" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB152 ,Set/Clear Enable Bit 152" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB151 ,Set/Clear Enable Bit 151" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150 ,Set/Clear Enable Bit 150" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB149 ,Set/Clear Enable Bit 149" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB148 ,Set/Clear Enable Bit 148" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147 ,Set/Clear Enable Bit 147" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB146 ,Set/Clear Enable Bit 146" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB145 ,Set/Clear Enable Bit 145" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144 ,Set/Clear Enable Bit 144" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB143 ,Set/Clear Enable Bit 143" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB142 ,Set/Clear Enable Bit 142" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141 ,Set/Clear Enable Bit 141" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB140 ,Set/Clear Enable Bit 140" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB139 ,Set/Clear Enable Bit 139" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138 ,Set/Clear Enable Bit 138" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB137 ,Set/Clear Enable Bit 137" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB136 ,Set/Clear Enable Bit 136" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135 ,Set/Clear Enable Bit 135" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB134 ,Set/Clear Enable Bit 134" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB133 ,Set/Clear Enable Bit 133" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132 ,Set/Clear Enable Bit 132" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB131 ,Set/Clear Enable Bit 131" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB130 ,Set/Clear Enable Bit 130" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129 ,Set/Clear Enable Bit 129" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB128 ,Set/Clear Enable Bit 128" "Disabled,Enabled" else rgroup.long 0x0110++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191 ,Set/Clear Enable Bit 191" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB190 ,Set/Clear Enable Bit 190" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB189 ,Set/Clear Enable Bit 189" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188 ,Set/Clear Enable Bit 188" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB187 ,Set/Clear Enable Bit 187" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB186 ,Set/Clear Enable Bit 186" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185 ,Set/Clear Enable Bit 185" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB184 ,Set/Clear Enable Bit 184" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB183 ,Set/Clear Enable Bit 183" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182 ,Set/Clear Enable Bit 182" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB181 ,Set/Clear Enable Bit 181" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB180 ,Set/Clear Enable Bit 180" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179 ,Set/Clear Enable Bit 179" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB178 ,Set/Clear Enable Bit 178" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB177 ,Set/Clear Enable Bit 177" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176 ,Set/Clear Enable Bit 176" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB175 ,Set/Clear Enable Bit 175" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB174 ,Set/Clear Enable Bit 174" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173 ,Set/Clear Enable Bit 173" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB172 ,Set/Clear Enable Bit 172" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB171 ,Set/Clear Enable Bit 171" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170 ,Set/Clear Enable Bit 170" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB169 ,Set/Clear Enable Bit 169" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB168 ,Set/Clear Enable Bit 168" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167 ,Set/Clear Enable Bit 167" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB166 ,Set/Clear Enable Bit 166" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB165 ,Set/Clear Enable Bit 165" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164 ,Set/Clear Enable Bit 164" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB163 ,Set/Clear Enable Bit 163" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB162 ,Set/Clear Enable Bit 162" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161 ,Set/Clear Enable Bit 161" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB160 ,Set/Clear Enable Bit 160" "Disabled,Enabled" else rgroup.long 0x0114++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223 ,Set/Clear Enable Bit 223" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB222 ,Set/Clear Enable Bit 222" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB221 ,Set/Clear Enable Bit 221" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220 ,Set/Clear Enable Bit 220" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB219 ,Set/Clear Enable Bit 219" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB218 ,Set/Clear Enable Bit 218" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217 ,Set/Clear Enable Bit 217" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB216 ,Set/Clear Enable Bit 216" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB215 ,Set/Clear Enable Bit 215" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214 ,Set/Clear Enable Bit 214" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB213 ,Set/Clear Enable Bit 213" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB212 ,Set/Clear Enable Bit 212" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211 ,Set/Clear Enable Bit 211" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB210 ,Set/Clear Enable Bit 210" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB209 ,Set/Clear Enable Bit 209" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208 ,Set/Clear Enable Bit 208" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB207 ,Set/Clear Enable Bit 207" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB206 ,Set/Clear Enable Bit 206" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205 ,Set/Clear Enable Bit 205" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB204 ,Set/Clear Enable Bit 204" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB203 ,Set/Clear Enable Bit 203" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202 ,Set/Clear Enable Bit 202" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB201 ,Set/Clear Enable Bit 201" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB200 ,Set/Clear Enable Bit 200" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199 ,Set/Clear Enable Bit 199" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB198 ,Set/Clear Enable Bit 198" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB197 ,Set/Clear Enable Bit 197" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196 ,Set/Clear Enable Bit 196" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB195 ,Set/Clear Enable Bit 195" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB194 ,Set/Clear Enable Bit 194" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193 ,Set/Clear Enable Bit 193" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB192 ,Set/Clear Enable Bit 192" "Disabled,Enabled" else rgroup.long 0x0118++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255 ,Set/Clear Enable Bit 255" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB254 ,Set/Clear Enable Bit 254" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB253 ,Set/Clear Enable Bit 253" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252 ,Set/Clear Enable Bit 252" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB251 ,Set/Clear Enable Bit 251" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB250 ,Set/Clear Enable Bit 250" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249 ,Set/Clear Enable Bit 249" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB248 ,Set/Clear Enable Bit 248" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB247 ,Set/Clear Enable Bit 247" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246 ,Set/Clear Enable Bit 246" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB245 ,Set/Clear Enable Bit 245" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB244 ,Set/Clear Enable Bit 244" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243 ,Set/Clear Enable Bit 243" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB242 ,Set/Clear Enable Bit 242" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB241 ,Set/Clear Enable Bit 241" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240 ,Set/Clear Enable Bit 240" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB239 ,Set/Clear Enable Bit 239" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB238 ,Set/Clear Enable Bit 238" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237 ,Set/Clear Enable Bit 237" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB236 ,Set/Clear Enable Bit 236" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB235 ,Set/Clear Enable Bit 235" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234 ,Set/Clear Enable Bit 234" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB233 ,Set/Clear Enable Bit 233" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB232 ,Set/Clear Enable Bit 232" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231 ,Set/Clear Enable Bit 231" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB230 ,Set/Clear Enable Bit 230" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB229 ,Set/Clear Enable Bit 229" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228 ,Set/Clear Enable Bit 228" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB227 ,Set/Clear Enable Bit 227" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB226 ,Set/Clear Enable Bit 226" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225 ,Set/Clear Enable Bit 225" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB224 ,Set/Clear Enable Bit 224" "Disabled,Enabled" else rgroup.long 0x011C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287 ,Set/Clear Enable Bit 287" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB286 ,Set/Clear Enable Bit 286" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB285 ,Set/Clear Enable Bit 285" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284 ,Set/Clear Enable Bit 284" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB283 ,Set/Clear Enable Bit 283" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB282 ,Set/Clear Enable Bit 282" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281 ,Set/Clear Enable Bit 281" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB280 ,Set/Clear Enable Bit 280" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB279 ,Set/Clear Enable Bit 279" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278 ,Set/Clear Enable Bit 278" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB277 ,Set/Clear Enable Bit 277" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB276 ,Set/Clear Enable Bit 276" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275 ,Set/Clear Enable Bit 275" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB274 ,Set/Clear Enable Bit 274" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB273 ,Set/Clear Enable Bit 273" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272 ,Set/Clear Enable Bit 272" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB271 ,Set/Clear Enable Bit 271" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB270 ,Set/Clear Enable Bit 270" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269 ,Set/Clear Enable Bit 269" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB268 ,Set/Clear Enable Bit 268" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB267 ,Set/Clear Enable Bit 267" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266 ,Set/Clear Enable Bit 266" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB265 ,Set/Clear Enable Bit 265" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB264 ,Set/Clear Enable Bit 264" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263 ,Set/Clear Enable Bit 263" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB262 ,Set/Clear Enable Bit 262" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB261 ,Set/Clear Enable Bit 261" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260 ,Set/Clear Enable Bit 260" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB259 ,Set/Clear Enable Bit 259" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB258 ,Set/Clear Enable Bit 258" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257 ,Set/Clear Enable Bit 257" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB256 ,Set/Clear Enable Bit 256" "Disabled,Enabled" else rgroup.long 0x0120++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319 ,Set/Clear Enable Bit 319" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB318 ,Set/Clear Enable Bit 318" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB317 ,Set/Clear Enable Bit 317" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316 ,Set/Clear Enable Bit 316" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB315 ,Set/Clear Enable Bit 315" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB314 ,Set/Clear Enable Bit 314" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313 ,Set/Clear Enable Bit 313" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB312 ,Set/Clear Enable Bit 312" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB311 ,Set/Clear Enable Bit 311" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310 ,Set/Clear Enable Bit 310" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB309 ,Set/Clear Enable Bit 309" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB308 ,Set/Clear Enable Bit 308" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307 ,Set/Clear Enable Bit 307" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB306 ,Set/Clear Enable Bit 306" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB305 ,Set/Clear Enable Bit 305" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304 ,Set/Clear Enable Bit 304" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB303 ,Set/Clear Enable Bit 303" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB302 ,Set/Clear Enable Bit 302" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301 ,Set/Clear Enable Bit 301" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB300 ,Set/Clear Enable Bit 300" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB299 ,Set/Clear Enable Bit 299" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298 ,Set/Clear Enable Bit 298" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB297 ,Set/Clear Enable Bit 297" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB296 ,Set/Clear Enable Bit 296" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295 ,Set/Clear Enable Bit 295" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB294 ,Set/Clear Enable Bit 294" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB293 ,Set/Clear Enable Bit 293" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292 ,Set/Clear Enable Bit 292" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB291 ,Set/Clear Enable Bit 291" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB290 ,Set/Clear Enable Bit 290" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289 ,Set/Clear Enable Bit 289" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB288 ,Set/Clear Enable Bit 288" "Disabled,Enabled" else rgroup.long 0x0124++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351 ,Set/Clear Enable Bit 351" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB350 ,Set/Clear Enable Bit 350" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB349 ,Set/Clear Enable Bit 349" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348 ,Set/Clear Enable Bit 348" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB347 ,Set/Clear Enable Bit 347" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB346 ,Set/Clear Enable Bit 346" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345 ,Set/Clear Enable Bit 345" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB344 ,Set/Clear Enable Bit 344" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB343 ,Set/Clear Enable Bit 343" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342 ,Set/Clear Enable Bit 342" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB341 ,Set/Clear Enable Bit 341" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB340 ,Set/Clear Enable Bit 340" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339 ,Set/Clear Enable Bit 339" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB338 ,Set/Clear Enable Bit 338" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB337 ,Set/Clear Enable Bit 337" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336 ,Set/Clear Enable Bit 336" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB335 ,Set/Clear Enable Bit 335" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB334 ,Set/Clear Enable Bit 334" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333 ,Set/Clear Enable Bit 333" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB332 ,Set/Clear Enable Bit 332" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB331 ,Set/Clear Enable Bit 331" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330 ,Set/Clear Enable Bit 330" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB329 ,Set/Clear Enable Bit 329" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB328 ,Set/Clear Enable Bit 328" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327 ,Set/Clear Enable Bit 327" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB326 ,Set/Clear Enable Bit 326" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB325 ,Set/Clear Enable Bit 325" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324 ,Set/Clear Enable Bit 324" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB323 ,Set/Clear Enable Bit 323" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB322 ,Set/Clear Enable Bit 322" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321 ,Set/Clear Enable Bit 321" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB320 ,Set/Clear Enable Bit 320" "Disabled,Enabled" else rgroup.long 0x0128++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383 ,Set/Clear Enable Bit 383" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB382 ,Set/Clear Enable Bit 382" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB381 ,Set/Clear Enable Bit 381" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380 ,Set/Clear Enable Bit 380" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB379 ,Set/Clear Enable Bit 379" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB378 ,Set/Clear Enable Bit 378" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377 ,Set/Clear Enable Bit 377" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB376 ,Set/Clear Enable Bit 376" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB375 ,Set/Clear Enable Bit 375" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374 ,Set/Clear Enable Bit 374" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB373 ,Set/Clear Enable Bit 373" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB372 ,Set/Clear Enable Bit 372" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371 ,Set/Clear Enable Bit 371" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB370 ,Set/Clear Enable Bit 370" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB369 ,Set/Clear Enable Bit 369" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368 ,Set/Clear Enable Bit 368" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB367 ,Set/Clear Enable Bit 367" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB366 ,Set/Clear Enable Bit 366" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365 ,Set/Clear Enable Bit 365" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB364 ,Set/Clear Enable Bit 364" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB363 ,Set/Clear Enable Bit 363" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362 ,Set/Clear Enable Bit 362" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB361 ,Set/Clear Enable Bit 361" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB360 ,Set/Clear Enable Bit 360" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359 ,Set/Clear Enable Bit 359" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB358 ,Set/Clear Enable Bit 358" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB357 ,Set/Clear Enable Bit 357" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356 ,Set/Clear Enable Bit 356" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB355 ,Set/Clear Enable Bit 355" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB354 ,Set/Clear Enable Bit 354" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353 ,Set/Clear Enable Bit 353" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB352 ,Set/Clear Enable Bit 352" "Disabled,Enabled" else rgroup.long 0x012C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415 ,Set/Clear Enable Bit 415" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB414 ,Set/Clear Enable Bit 414" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB413 ,Set/Clear Enable Bit 413" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412 ,Set/Clear Enable Bit 412" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB411 ,Set/Clear Enable Bit 411" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB410 ,Set/Clear Enable Bit 410" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409 ,Set/Clear Enable Bit 409" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB408 ,Set/Clear Enable Bit 408" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB407 ,Set/Clear Enable Bit 407" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406 ,Set/Clear Enable Bit 406" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB405 ,Set/Clear Enable Bit 405" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB404 ,Set/Clear Enable Bit 404" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403 ,Set/Clear Enable Bit 403" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB402 ,Set/Clear Enable Bit 402" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB401 ,Set/Clear Enable Bit 401" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400 ,Set/Clear Enable Bit 400" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB399 ,Set/Clear Enable Bit 399" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB398 ,Set/Clear Enable Bit 398" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397 ,Set/Clear Enable Bit 397" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB396 ,Set/Clear Enable Bit 396" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB395 ,Set/Clear Enable Bit 395" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394 ,Set/Clear Enable Bit 394" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB393 ,Set/Clear Enable Bit 393" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB392 ,Set/Clear Enable Bit 392" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391 ,Set/Clear Enable Bit 391" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB390 ,Set/Clear Enable Bit 390" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB389 ,Set/Clear Enable Bit 389" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388 ,Set/Clear Enable Bit 388" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB387 ,Set/Clear Enable Bit 387" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB386 ,Set/Clear Enable Bit 386" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385 ,Set/Clear Enable Bit 385" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB384 ,Set/Clear Enable Bit 384" "Disabled,Enabled" else rgroup.long 0x0130++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447 ,Set/Clear Enable Bit 447" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB446 ,Set/Clear Enable Bit 446" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB445 ,Set/Clear Enable Bit 445" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444 ,Set/Clear Enable Bit 444" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB443 ,Set/Clear Enable Bit 443" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB442 ,Set/Clear Enable Bit 442" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441 ,Set/Clear Enable Bit 441" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB440 ,Set/Clear Enable Bit 440" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB439 ,Set/Clear Enable Bit 439" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438 ,Set/Clear Enable Bit 438" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB437 ,Set/Clear Enable Bit 437" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB436 ,Set/Clear Enable Bit 436" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435 ,Set/Clear Enable Bit 435" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB434 ,Set/Clear Enable Bit 434" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB433 ,Set/Clear Enable Bit 433" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432 ,Set/Clear Enable Bit 432" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB431 ,Set/Clear Enable Bit 431" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB430 ,Set/Clear Enable Bit 430" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429 ,Set/Clear Enable Bit 429" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB428 ,Set/Clear Enable Bit 428" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB427 ,Set/Clear Enable Bit 427" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426 ,Set/Clear Enable Bit 426" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB425 ,Set/Clear Enable Bit 425" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB424 ,Set/Clear Enable Bit 424" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423 ,Set/Clear Enable Bit 423" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB422 ,Set/Clear Enable Bit 422" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB421 ,Set/Clear Enable Bit 421" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420 ,Set/Clear Enable Bit 420" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB419 ,Set/Clear Enable Bit 419" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB418 ,Set/Clear Enable Bit 418" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417 ,Set/Clear Enable Bit 417" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB416 ,Set/Clear Enable Bit 416" "Disabled,Enabled" else rgroup.long 0x0134++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479 ,Set/Clear Enable Bit 479" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB478 ,Set/Clear Enable Bit 478" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB477 ,Set/Clear Enable Bit 477" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476 ,Set/Clear Enable Bit 476" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB475 ,Set/Clear Enable Bit 475" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB474 ,Set/Clear Enable Bit 474" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473 ,Set/Clear Enable Bit 473" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB472 ,Set/Clear Enable Bit 472" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB471 ,Set/Clear Enable Bit 471" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470 ,Set/Clear Enable Bit 470" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB469 ,Set/Clear Enable Bit 469" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB468 ,Set/Clear Enable Bit 468" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467 ,Set/Clear Enable Bit 467" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB466 ,Set/Clear Enable Bit 466" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB465 ,Set/Clear Enable Bit 465" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464 ,Set/Clear Enable Bit 464" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB463 ,Set/Clear Enable Bit 463" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB462 ,Set/Clear Enable Bit 462" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461 ,Set/Clear Enable Bit 461" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB460 ,Set/Clear Enable Bit 460" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB459 ,Set/Clear Enable Bit 459" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458 ,Set/Clear Enable Bit 458" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB457 ,Set/Clear Enable Bit 457" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB456 ,Set/Clear Enable Bit 456" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455 ,Set/Clear Enable Bit 455" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB454 ,Set/Clear Enable Bit 454" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB453 ,Set/Clear Enable Bit 453" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452 ,Set/Clear Enable Bit 452" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB451 ,Set/Clear Enable Bit 451" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB450 ,Set/Clear Enable Bit 450" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449 ,Set/Clear Enable Bit 449" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB448 ,Set/Clear Enable Bit 448" "Disabled,Enabled" else rgroup.long 0x0138++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511 ,Set/Clear Enable Bit 511" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB510 ,Set/Clear Enable Bit 510" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB509 ,Set/Clear Enable Bit 509" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508 ,Set/Clear Enable Bit 508" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB507 ,Set/Clear Enable Bit 507" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB506 ,Set/Clear Enable Bit 506" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505 ,Set/Clear Enable Bit 505" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB504 ,Set/Clear Enable Bit 504" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB503 ,Set/Clear Enable Bit 503" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502 ,Set/Clear Enable Bit 502" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB501 ,Set/Clear Enable Bit 501" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB500 ,Set/Clear Enable Bit 500" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499 ,Set/Clear Enable Bit 499" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB498 ,Set/Clear Enable Bit 498" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB497 ,Set/Clear Enable Bit 497" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496 ,Set/Clear Enable Bit 496" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB495 ,Set/Clear Enable Bit 495" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB494 ,Set/Clear Enable Bit 494" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493 ,Set/Clear Enable Bit 493" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB492 ,Set/Clear Enable Bit 492" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB491 ,Set/Clear Enable Bit 491" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490 ,Set/Clear Enable Bit 490" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB489 ,Set/Clear Enable Bit 489" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB488 ,Set/Clear Enable Bit 488" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487 ,Set/Clear Enable Bit 487" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB486 ,Set/Clear Enable Bit 486" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB485 ,Set/Clear Enable Bit 485" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484 ,Set/Clear Enable Bit 484" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB483 ,Set/Clear Enable Bit 483" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB482 ,Set/Clear Enable Bit 482" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481 ,Set/Clear Enable Bit 481" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB480 ,Set/Clear Enable Bit 480" "Disabled,Enabled" else rgroup.long 0x013C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543 ,Set/Clear Enable Bit 543" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB542 ,Set/Clear Enable Bit 542" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB541 ,Set/Clear Enable Bit 541" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540 ,Set/Clear Enable Bit 540" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB539 ,Set/Clear Enable Bit 539" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB538 ,Set/Clear Enable Bit 538" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537 ,Set/Clear Enable Bit 537" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB536 ,Set/Clear Enable Bit 536" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB535 ,Set/Clear Enable Bit 535" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534 ,Set/Clear Enable Bit 534" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB533 ,Set/Clear Enable Bit 533" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB532 ,Set/Clear Enable Bit 532" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531 ,Set/Clear Enable Bit 531" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB530 ,Set/Clear Enable Bit 530" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB529 ,Set/Clear Enable Bit 529" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528 ,Set/Clear Enable Bit 528" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB527 ,Set/Clear Enable Bit 527" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB526 ,Set/Clear Enable Bit 526" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525 ,Set/Clear Enable Bit 525" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB524 ,Set/Clear Enable Bit 524" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB523 ,Set/Clear Enable Bit 523" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522 ,Set/Clear Enable Bit 522" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB521 ,Set/Clear Enable Bit 521" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB520 ,Set/Clear Enable Bit 520" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519 ,Set/Clear Enable Bit 519" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB518 ,Set/Clear Enable Bit 518" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB517 ,Set/Clear Enable Bit 517" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516 ,Set/Clear Enable Bit 516" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB515 ,Set/Clear Enable Bit 515" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB514 ,Set/Clear Enable Bit 514" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513 ,Set/Clear Enable Bit 513" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB512 ,Set/Clear Enable Bit 512" "Disabled,Enabled" else rgroup.long 0x0140++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575 ,Set/Clear Enable Bit 575" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB574 ,Set/Clear Enable Bit 574" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB573 ,Set/Clear Enable Bit 573" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572 ,Set/Clear Enable Bit 572" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB571 ,Set/Clear Enable Bit 571" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB570 ,Set/Clear Enable Bit 570" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569 ,Set/Clear Enable Bit 569" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB568 ,Set/Clear Enable Bit 568" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB567 ,Set/Clear Enable Bit 567" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566 ,Set/Clear Enable Bit 566" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB565 ,Set/Clear Enable Bit 565" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB564 ,Set/Clear Enable Bit 564" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563 ,Set/Clear Enable Bit 563" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB562 ,Set/Clear Enable Bit 562" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB561 ,Set/Clear Enable Bit 561" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560 ,Set/Clear Enable Bit 560" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB559 ,Set/Clear Enable Bit 559" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB558 ,Set/Clear Enable Bit 558" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557 ,Set/Clear Enable Bit 557" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB556 ,Set/Clear Enable Bit 556" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB555 ,Set/Clear Enable Bit 555" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554 ,Set/Clear Enable Bit 554" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB553 ,Set/Clear Enable Bit 553" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB552 ,Set/Clear Enable Bit 552" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551 ,Set/Clear Enable Bit 551" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB550 ,Set/Clear Enable Bit 550" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB549 ,Set/Clear Enable Bit 549" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548 ,Set/Clear Enable Bit 548" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB547 ,Set/Clear Enable Bit 547" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB546 ,Set/Clear Enable Bit 546" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545 ,Set/Clear Enable Bit 545" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB544 ,Set/Clear Enable Bit 544" "Disabled,Enabled" else rgroup.long 0x0144++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607 ,Set/Clear Enable Bit 607" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB606 ,Set/Clear Enable Bit 606" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB605 ,Set/Clear Enable Bit 605" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604 ,Set/Clear Enable Bit 604" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB603 ,Set/Clear Enable Bit 603" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB602 ,Set/Clear Enable Bit 602" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601 ,Set/Clear Enable Bit 601" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB600 ,Set/Clear Enable Bit 600" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB599 ,Set/Clear Enable Bit 599" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598 ,Set/Clear Enable Bit 598" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB597 ,Set/Clear Enable Bit 597" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB596 ,Set/Clear Enable Bit 596" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595 ,Set/Clear Enable Bit 595" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB594 ,Set/Clear Enable Bit 594" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB593 ,Set/Clear Enable Bit 593" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592 ,Set/Clear Enable Bit 592" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB591 ,Set/Clear Enable Bit 591" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB590 ,Set/Clear Enable Bit 590" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589 ,Set/Clear Enable Bit 589" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB588 ,Set/Clear Enable Bit 588" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB587 ,Set/Clear Enable Bit 587" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586 ,Set/Clear Enable Bit 586" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB585 ,Set/Clear Enable Bit 585" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB584 ,Set/Clear Enable Bit 584" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583 ,Set/Clear Enable Bit 583" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB582 ,Set/Clear Enable Bit 582" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB581 ,Set/Clear Enable Bit 581" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580 ,Set/Clear Enable Bit 580" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB579 ,Set/Clear Enable Bit 579" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB578 ,Set/Clear Enable Bit 578" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577 ,Set/Clear Enable Bit 577" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB576 ,Set/Clear Enable Bit 576" "Disabled,Enabled" else rgroup.long 0x0148++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639 ,Set/Clear Enable Bit 639" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB638 ,Set/Clear Enable Bit 638" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB637 ,Set/Clear Enable Bit 637" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636 ,Set/Clear Enable Bit 636" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB635 ,Set/Clear Enable Bit 635" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB634 ,Set/Clear Enable Bit 634" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633 ,Set/Clear Enable Bit 633" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB632 ,Set/Clear Enable Bit 632" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB631 ,Set/Clear Enable Bit 631" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630 ,Set/Clear Enable Bit 630" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB629 ,Set/Clear Enable Bit 629" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB628 ,Set/Clear Enable Bit 628" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627 ,Set/Clear Enable Bit 627" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB626 ,Set/Clear Enable Bit 626" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB625 ,Set/Clear Enable Bit 625" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624 ,Set/Clear Enable Bit 624" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB623 ,Set/Clear Enable Bit 623" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB622 ,Set/Clear Enable Bit 622" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621 ,Set/Clear Enable Bit 621" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB620 ,Set/Clear Enable Bit 620" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB619 ,Set/Clear Enable Bit 619" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618 ,Set/Clear Enable Bit 618" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB617 ,Set/Clear Enable Bit 617" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB616 ,Set/Clear Enable Bit 616" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615 ,Set/Clear Enable Bit 615" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB614 ,Set/Clear Enable Bit 614" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB613 ,Set/Clear Enable Bit 613" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612 ,Set/Clear Enable Bit 612" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB611 ,Set/Clear Enable Bit 611" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB610 ,Set/Clear Enable Bit 610" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609 ,Set/Clear Enable Bit 609" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB608 ,Set/Clear Enable Bit 608" "Disabled,Enabled" else rgroup.long 0x014C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671 ,Set/Clear Enable Bit 671" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB670 ,Set/Clear Enable Bit 670" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB669 ,Set/Clear Enable Bit 669" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668 ,Set/Clear Enable Bit 668" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB667 ,Set/Clear Enable Bit 667" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB666 ,Set/Clear Enable Bit 666" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665 ,Set/Clear Enable Bit 665" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB664 ,Set/Clear Enable Bit 664" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB663 ,Set/Clear Enable Bit 663" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662 ,Set/Clear Enable Bit 662" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB661 ,Set/Clear Enable Bit 661" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB660 ,Set/Clear Enable Bit 660" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659 ,Set/Clear Enable Bit 659" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB658 ,Set/Clear Enable Bit 658" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB657 ,Set/Clear Enable Bit 657" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656 ,Set/Clear Enable Bit 656" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB655 ,Set/Clear Enable Bit 655" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB654 ,Set/Clear Enable Bit 654" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653 ,Set/Clear Enable Bit 653" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB652 ,Set/Clear Enable Bit 652" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB651 ,Set/Clear Enable Bit 651" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650 ,Set/Clear Enable Bit 650" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB649 ,Set/Clear Enable Bit 649" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB648 ,Set/Clear Enable Bit 648" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647 ,Set/Clear Enable Bit 647" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB646 ,Set/Clear Enable Bit 646" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB645 ,Set/Clear Enable Bit 645" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644 ,Set/Clear Enable Bit 644" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB643 ,Set/Clear Enable Bit 643" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB642 ,Set/Clear Enable Bit 642" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641 ,Set/Clear Enable Bit 641" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB640 ,Set/Clear Enable Bit 640" "Disabled,Enabled" else rgroup.long 0x0150++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703 ,Set/Clear Enable Bit 703" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB702 ,Set/Clear Enable Bit 702" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB701 ,Set/Clear Enable Bit 701" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700 ,Set/Clear Enable Bit 700" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB699 ,Set/Clear Enable Bit 699" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB698 ,Set/Clear Enable Bit 698" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697 ,Set/Clear Enable Bit 697" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB696 ,Set/Clear Enable Bit 696" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB695 ,Set/Clear Enable Bit 695" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694 ,Set/Clear Enable Bit 694" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB693 ,Set/Clear Enable Bit 693" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB692 ,Set/Clear Enable Bit 692" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691 ,Set/Clear Enable Bit 691" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB690 ,Set/Clear Enable Bit 690" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB689 ,Set/Clear Enable Bit 689" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688 ,Set/Clear Enable Bit 688" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB687 ,Set/Clear Enable Bit 687" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB686 ,Set/Clear Enable Bit 686" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685 ,Set/Clear Enable Bit 685" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB684 ,Set/Clear Enable Bit 684" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB683 ,Set/Clear Enable Bit 683" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682 ,Set/Clear Enable Bit 682" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB681 ,Set/Clear Enable Bit 681" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB680 ,Set/Clear Enable Bit 680" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679 ,Set/Clear Enable Bit 679" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB678 ,Set/Clear Enable Bit 678" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB677 ,Set/Clear Enable Bit 677" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676 ,Set/Clear Enable Bit 676" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB675 ,Set/Clear Enable Bit 675" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB674 ,Set/Clear Enable Bit 674" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673 ,Set/Clear Enable Bit 673" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB672 ,Set/Clear Enable Bit 672" "Disabled,Enabled" else rgroup.long 0x0154++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735 ,Set/Clear Enable Bit 735" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB734 ,Set/Clear Enable Bit 734" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB733 ,Set/Clear Enable Bit 733" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732 ,Set/Clear Enable Bit 732" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB731 ,Set/Clear Enable Bit 731" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB730 ,Set/Clear Enable Bit 730" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729 ,Set/Clear Enable Bit 729" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB728 ,Set/Clear Enable Bit 728" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB727 ,Set/Clear Enable Bit 727" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726 ,Set/Clear Enable Bit 726" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB725 ,Set/Clear Enable Bit 725" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB724 ,Set/Clear Enable Bit 724" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723 ,Set/Clear Enable Bit 723" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB722 ,Set/Clear Enable Bit 722" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB721 ,Set/Clear Enable Bit 721" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720 ,Set/Clear Enable Bit 720" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB719 ,Set/Clear Enable Bit 719" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB718 ,Set/Clear Enable Bit 718" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717 ,Set/Clear Enable Bit 717" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB716 ,Set/Clear Enable Bit 716" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB715 ,Set/Clear Enable Bit 715" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714 ,Set/Clear Enable Bit 714" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB713 ,Set/Clear Enable Bit 713" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB712 ,Set/Clear Enable Bit 712" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711 ,Set/Clear Enable Bit 711" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB710 ,Set/Clear Enable Bit 710" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB709 ,Set/Clear Enable Bit 709" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708 ,Set/Clear Enable Bit 708" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB707 ,Set/Clear Enable Bit 707" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB706 ,Set/Clear Enable Bit 706" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705 ,Set/Clear Enable Bit 705" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB704 ,Set/Clear Enable Bit 704" "Disabled,Enabled" else rgroup.long 0x0158++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767 ,Set/Clear Enable Bit 767" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB766 ,Set/Clear Enable Bit 766" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB765 ,Set/Clear Enable Bit 765" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764 ,Set/Clear Enable Bit 764" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB763 ,Set/Clear Enable Bit 763" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB762 ,Set/Clear Enable Bit 762" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761 ,Set/Clear Enable Bit 761" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB760 ,Set/Clear Enable Bit 760" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB759 ,Set/Clear Enable Bit 759" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758 ,Set/Clear Enable Bit 758" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB757 ,Set/Clear Enable Bit 757" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB756 ,Set/Clear Enable Bit 756" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755 ,Set/Clear Enable Bit 755" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB754 ,Set/Clear Enable Bit 754" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB753 ,Set/Clear Enable Bit 753" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752 ,Set/Clear Enable Bit 752" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB751 ,Set/Clear Enable Bit 751" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB750 ,Set/Clear Enable Bit 750" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749 ,Set/Clear Enable Bit 749" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB748 ,Set/Clear Enable Bit 748" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB747 ,Set/Clear Enable Bit 747" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746 ,Set/Clear Enable Bit 746" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB745 ,Set/Clear Enable Bit 745" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB744 ,Set/Clear Enable Bit 744" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743 ,Set/Clear Enable Bit 743" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB742 ,Set/Clear Enable Bit 742" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB741 ,Set/Clear Enable Bit 741" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740 ,Set/Clear Enable Bit 740" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB739 ,Set/Clear Enable Bit 739" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB738 ,Set/Clear Enable Bit 738" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737 ,Set/Clear Enable Bit 737" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB736 ,Set/Clear Enable Bit 736" "Disabled,Enabled" else rgroup.long 0x015C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799 ,Set/Clear Enable Bit 799" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB798 ,Set/Clear Enable Bit 798" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB797 ,Set/Clear Enable Bit 797" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796 ,Set/Clear Enable Bit 796" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB795 ,Set/Clear Enable Bit 795" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB794 ,Set/Clear Enable Bit 794" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793 ,Set/Clear Enable Bit 793" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB792 ,Set/Clear Enable Bit 792" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB791 ,Set/Clear Enable Bit 791" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790 ,Set/Clear Enable Bit 790" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB789 ,Set/Clear Enable Bit 789" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB788 ,Set/Clear Enable Bit 788" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787 ,Set/Clear Enable Bit 787" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB786 ,Set/Clear Enable Bit 786" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB785 ,Set/Clear Enable Bit 785" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784 ,Set/Clear Enable Bit 784" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB783 ,Set/Clear Enable Bit 783" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB782 ,Set/Clear Enable Bit 782" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781 ,Set/Clear Enable Bit 781" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB780 ,Set/Clear Enable Bit 780" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB779 ,Set/Clear Enable Bit 779" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778 ,Set/Clear Enable Bit 778" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB777 ,Set/Clear Enable Bit 777" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB776 ,Set/Clear Enable Bit 776" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775 ,Set/Clear Enable Bit 775" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB774 ,Set/Clear Enable Bit 774" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB773 ,Set/Clear Enable Bit 773" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772 ,Set/Clear Enable Bit 772" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB771 ,Set/Clear Enable Bit 771" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB770 ,Set/Clear Enable Bit 770" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769 ,Set/Clear Enable Bit 769" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB768 ,Set/Clear Enable Bit 768" "Disabled,Enabled" else rgroup.long 0x0160++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831 ,Set/Clear Enable Bit 831" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB830 ,Set/Clear Enable Bit 830" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB829 ,Set/Clear Enable Bit 829" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828 ,Set/Clear Enable Bit 828" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB827 ,Set/Clear Enable Bit 827" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB826 ,Set/Clear Enable Bit 826" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825 ,Set/Clear Enable Bit 825" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB824 ,Set/Clear Enable Bit 824" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB823 ,Set/Clear Enable Bit 823" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822 ,Set/Clear Enable Bit 822" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB821 ,Set/Clear Enable Bit 821" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB820 ,Set/Clear Enable Bit 820" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819 ,Set/Clear Enable Bit 819" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB818 ,Set/Clear Enable Bit 818" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB817 ,Set/Clear Enable Bit 817" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816 ,Set/Clear Enable Bit 816" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB815 ,Set/Clear Enable Bit 815" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB814 ,Set/Clear Enable Bit 814" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813 ,Set/Clear Enable Bit 813" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB812 ,Set/Clear Enable Bit 812" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB811 ,Set/Clear Enable Bit 811" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810 ,Set/Clear Enable Bit 810" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB809 ,Set/Clear Enable Bit 809" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB808 ,Set/Clear Enable Bit 808" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807 ,Set/Clear Enable Bit 807" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB806 ,Set/Clear Enable Bit 806" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB805 ,Set/Clear Enable Bit 805" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804 ,Set/Clear Enable Bit 804" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB803 ,Set/Clear Enable Bit 803" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB802 ,Set/Clear Enable Bit 802" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801 ,Set/Clear Enable Bit 801" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB800 ,Set/Clear Enable Bit 800" "Disabled,Enabled" else rgroup.long 0x0164++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863 ,Set/Clear Enable Bit 863" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB862 ,Set/Clear Enable Bit 862" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB861 ,Set/Clear Enable Bit 861" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860 ,Set/Clear Enable Bit 860" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB859 ,Set/Clear Enable Bit 859" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB858 ,Set/Clear Enable Bit 858" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857 ,Set/Clear Enable Bit 857" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB856 ,Set/Clear Enable Bit 856" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB855 ,Set/Clear Enable Bit 855" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854 ,Set/Clear Enable Bit 854" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB853 ,Set/Clear Enable Bit 853" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB852 ,Set/Clear Enable Bit 852" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851 ,Set/Clear Enable Bit 851" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB850 ,Set/Clear Enable Bit 850" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB849 ,Set/Clear Enable Bit 849" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848 ,Set/Clear Enable Bit 848" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB847 ,Set/Clear Enable Bit 847" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB846 ,Set/Clear Enable Bit 846" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845 ,Set/Clear Enable Bit 845" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB844 ,Set/Clear Enable Bit 844" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB843 ,Set/Clear Enable Bit 843" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842 ,Set/Clear Enable Bit 842" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB841 ,Set/Clear Enable Bit 841" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB840 ,Set/Clear Enable Bit 840" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839 ,Set/Clear Enable Bit 839" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB838 ,Set/Clear Enable Bit 838" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB837 ,Set/Clear Enable Bit 837" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836 ,Set/Clear Enable Bit 836" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB835 ,Set/Clear Enable Bit 835" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB834 ,Set/Clear Enable Bit 834" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833 ,Set/Clear Enable Bit 833" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB832 ,Set/Clear Enable Bit 832" "Disabled,Enabled" else rgroup.long 0x0168++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895 ,Set/Clear Enable Bit 895" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB894 ,Set/Clear Enable Bit 894" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB893 ,Set/Clear Enable Bit 893" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892 ,Set/Clear Enable Bit 892" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB891 ,Set/Clear Enable Bit 891" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB890 ,Set/Clear Enable Bit 890" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889 ,Set/Clear Enable Bit 889" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB888 ,Set/Clear Enable Bit 888" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB887 ,Set/Clear Enable Bit 887" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886 ,Set/Clear Enable Bit 886" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB885 ,Set/Clear Enable Bit 885" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB884 ,Set/Clear Enable Bit 884" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883 ,Set/Clear Enable Bit 883" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB882 ,Set/Clear Enable Bit 882" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB881 ,Set/Clear Enable Bit 881" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880 ,Set/Clear Enable Bit 880" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB879 ,Set/Clear Enable Bit 879" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB878 ,Set/Clear Enable Bit 878" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877 ,Set/Clear Enable Bit 877" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB876 ,Set/Clear Enable Bit 876" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB875 ,Set/Clear Enable Bit 875" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874 ,Set/Clear Enable Bit 874" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB873 ,Set/Clear Enable Bit 873" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB872 ,Set/Clear Enable Bit 872" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871 ,Set/Clear Enable Bit 871" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB870 ,Set/Clear Enable Bit 870" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB869 ,Set/Clear Enable Bit 869" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868 ,Set/Clear Enable Bit 868" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB867 ,Set/Clear Enable Bit 867" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB866 ,Set/Clear Enable Bit 866" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865 ,Set/Clear Enable Bit 865" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB864 ,Set/Clear Enable Bit 864" "Disabled,Enabled" else rgroup.long 0x016C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927 ,Set/Clear Enable Bit 927" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB926 ,Set/Clear Enable Bit 926" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB925 ,Set/Clear Enable Bit 925" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924 ,Set/Clear Enable Bit 924" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB923 ,Set/Clear Enable Bit 923" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB922 ,Set/Clear Enable Bit 922" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921 ,Set/Clear Enable Bit 921" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB920 ,Set/Clear Enable Bit 920" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB919 ,Set/Clear Enable Bit 919" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918 ,Set/Clear Enable Bit 918" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB917 ,Set/Clear Enable Bit 917" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB916 ,Set/Clear Enable Bit 916" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915 ,Set/Clear Enable Bit 915" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB914 ,Set/Clear Enable Bit 914" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB913 ,Set/Clear Enable Bit 913" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912 ,Set/Clear Enable Bit 912" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB911 ,Set/Clear Enable Bit 911" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB910 ,Set/Clear Enable Bit 910" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909 ,Set/Clear Enable Bit 909" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB908 ,Set/Clear Enable Bit 908" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB907 ,Set/Clear Enable Bit 907" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906 ,Set/Clear Enable Bit 906" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB905 ,Set/Clear Enable Bit 905" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB904 ,Set/Clear Enable Bit 904" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903 ,Set/Clear Enable Bit 903" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB902 ,Set/Clear Enable Bit 902" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB901 ,Set/Clear Enable Bit 901" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900 ,Set/Clear Enable Bit 900" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB899 ,Set/Clear Enable Bit 899" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB898 ,Set/Clear Enable Bit 898" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897 ,Set/Clear Enable Bit 897" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB896 ,Set/Clear Enable Bit 896" "Disabled,Enabled" else rgroup.long 0x0170++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959 ,Set/Clear Enable Bit 959" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB958 ,Set/Clear Enable Bit 958" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB957 ,Set/Clear Enable Bit 957" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956 ,Set/Clear Enable Bit 956" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB955 ,Set/Clear Enable Bit 955" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB954 ,Set/Clear Enable Bit 954" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953 ,Set/Clear Enable Bit 953" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB952 ,Set/Clear Enable Bit 952" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB951 ,Set/Clear Enable Bit 951" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950 ,Set/Clear Enable Bit 950" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB949 ,Set/Clear Enable Bit 949" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB948 ,Set/Clear Enable Bit 948" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947 ,Set/Clear Enable Bit 947" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB946 ,Set/Clear Enable Bit 946" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB945 ,Set/Clear Enable Bit 945" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944 ,Set/Clear Enable Bit 944" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB943 ,Set/Clear Enable Bit 943" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB942 ,Set/Clear Enable Bit 942" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941 ,Set/Clear Enable Bit 941" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB940 ,Set/Clear Enable Bit 940" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB939 ,Set/Clear Enable Bit 939" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938 ,Set/Clear Enable Bit 938" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB937 ,Set/Clear Enable Bit 937" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB936 ,Set/Clear Enable Bit 936" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935 ,Set/Clear Enable Bit 935" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB934 ,Set/Clear Enable Bit 934" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB933 ,Set/Clear Enable Bit 933" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932 ,Set/Clear Enable Bit 932" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB931 ,Set/Clear Enable Bit 931" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB930 ,Set/Clear Enable Bit 930" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929 ,Set/Clear Enable Bit 929" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB928 ,Set/Clear Enable Bit 928" "Disabled,Enabled" else rgroup.long 0x0174++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991 ,Set/Clear Enable Bit 991" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRENB990 ,Set/Clear Enable Bit 990" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRENB989 ,Set/Clear Enable Bit 989" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988 ,Set/Clear Enable Bit 988" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB987 ,Set/Clear Enable Bit 987" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB986 ,Set/Clear Enable Bit 986" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985 ,Set/Clear Enable Bit 985" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB984 ,Set/Clear Enable Bit 984" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB983 ,Set/Clear Enable Bit 983" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982 ,Set/Clear Enable Bit 982" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB981 ,Set/Clear Enable Bit 981" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB980 ,Set/Clear Enable Bit 980" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979 ,Set/Clear Enable Bit 979" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB978 ,Set/Clear Enable Bit 978" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB977 ,Set/Clear Enable Bit 977" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976 ,Set/Clear Enable Bit 976" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB975 ,Set/Clear Enable Bit 975" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB974 ,Set/Clear Enable Bit 974" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973 ,Set/Clear Enable Bit 973" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB972 ,Set/Clear Enable Bit 972" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB971 ,Set/Clear Enable Bit 971" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970 ,Set/Clear Enable Bit 970" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB969 ,Set/Clear Enable Bit 969" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB968 ,Set/Clear Enable Bit 968" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967 ,Set/Clear Enable Bit 967" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB966 ,Set/Clear Enable Bit 966" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB965 ,Set/Clear Enable Bit 965" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964 ,Set/Clear Enable Bit 964" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB963 ,Set/Clear Enable Bit 963" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB962 ,Set/Clear Enable Bit 962" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961 ,Set/Clear Enable Bit 961" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB960 ,Set/Clear Enable Bit 960" "Disabled,Enabled" else rgroup.long 0x0178++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F) group.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRENB1019 ,Set/Clear Enable Bit 1019" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRENB1018 ,Set/Clear Enable Bit 1018" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB1017 ,Set/Clear Enable Bit 1017" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRENB1016 ,Set/Clear Enable Bit 1016" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRENB1015 ,Set/Clear Enable Bit 1015" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB1014 ,Set/Clear Enable Bit 1014" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRENB1013 ,Set/Clear Enable Bit 1013" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRENB1012 ,Set/Clear Enable Bit 1012" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB1011 ,Set/Clear Enable Bit 1011" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRENB1010 ,Set/Clear Enable Bit 1010" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRENB1009 ,Set/Clear Enable Bit 1009" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB1008 ,Set/Clear Enable Bit 1008" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRENB1007 ,Set/Clear Enable Bit 1007" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRENB1006 ,Set/Clear Enable Bit 1006" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB1005 ,Set/Clear Enable Bit 1005" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRENB1004 ,Set/Clear Enable Bit 1004" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRENB1003 ,Set/Clear Enable Bit 1003" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB1002 ,Set/Clear Enable Bit 1002" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRENB1001 ,Set/Clear Enable Bit 1001" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRENB1000 ,Set/Clear Enable Bit 1000" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB999 ,Set/Clear Enable Bit 999" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRENB998 ,Set/Clear Enable Bit 998" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRENB997 ,Set/Clear Enable Bit 997" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB996 ,Set/Clear Enable Bit 996" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRENB995 ,Set/Clear Enable Bit 995" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRENB994 ,Set/Clear Enable Bit 994" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB993 ,Set/Clear Enable Bit 993" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRENB992 ,Set/Clear Enable Bit 992" "Disabled,Enabled" else rgroup.long 0x017C++0x03 line.long 0x0 "GICD_SET/CLR_ENABLER31,Interrupt Set/Clear Enable Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 22. tree "Set/Clear Pending Registers" group.long 0x0200++0x03 line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31 ,Set/Clear Pending Bit 31" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND30 ,Set/Clear Pending Bit 30" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND29 ,Set/Clear Pending Bit 29" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28 ,Set/Clear Pending Bit 28" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND27 ,Set/Clear Pending Bit 27" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND26 ,Set/Clear Pending Bit 26" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25 ,Set/Clear Pending Bit 25" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND24 ,Set/Clear Pending Bit 24" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND23 ,Set/Clear Pending Bit 23" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22 ,Set/Clear Pending Bit 22" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND21 ,Set/Clear Pending Bit 21" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND20 ,Set/Clear Pending Bit 20" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19 ,Set/Clear Pending Bit 19" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND18 ,Set/Clear Pending Bit 18" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND17 ,Set/Clear Pending Bit 17" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16 ,Set/Clear Pending Bit 16" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND15 ,Set/Clear Pending Bit 15" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND14 ,Set/Clear Pending Bit 14" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13 ,Set/Clear Pending Bit 13" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND12 ,Set/Clear Pending Bit 12" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND11 ,Set/Clear Pending Bit 11" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10 ,Set/Clear Pending Bit 10" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND9 ,Set/Clear Pending Bit 9" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND8 ,Set/Clear Pending Bit 8" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7 ,Set/Clear Pending Bit 7" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND6 ,Set/Clear Pending Bit 6" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND5 ,Set/Clear Pending Bit 5" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4 ,Set/Clear Pending Bit 4" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND3 ,Set/Clear Pending Bit 3" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND2 ,Set/Clear Pending Bit 2" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1 ,Set/Clear Pending Bit 1" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND0 ,Set/Clear Pending Bit 0" "Not pending,Pending" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63 ,Set/Clear Pending Bit 63" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND62 ,Set/Clear Pending Bit 62" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND61 ,Set/Clear Pending Bit 61" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60 ,Set/Clear Pending Bit 60" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND59 ,Set/Clear Pending Bit 59" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND58 ,Set/Clear Pending Bit 58" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57 ,Set/Clear Pending Bit 57" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND56 ,Set/Clear Pending Bit 56" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND55 ,Set/Clear Pending Bit 55" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54 ,Set/Clear Pending Bit 54" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND53 ,Set/Clear Pending Bit 53" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND52 ,Set/Clear Pending Bit 52" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51 ,Set/Clear Pending Bit 51" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND50 ,Set/Clear Pending Bit 50" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND49 ,Set/Clear Pending Bit 49" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48 ,Set/Clear Pending Bit 48" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND47 ,Set/Clear Pending Bit 47" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND46 ,Set/Clear Pending Bit 46" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45 ,Set/Clear Pending Bit 45" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND44 ,Set/Clear Pending Bit 44" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND43 ,Set/Clear Pending Bit 43" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42 ,Set/Clear Pending Bit 42" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND41 ,Set/Clear Pending Bit 41" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND40 ,Set/Clear Pending Bit 40" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39 ,Set/Clear Pending Bit 39" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND38 ,Set/Clear Pending Bit 38" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND37 ,Set/Clear Pending Bit 37" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36 ,Set/Clear Pending Bit 36" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND35 ,Set/Clear Pending Bit 35" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND34 ,Set/Clear Pending Bit 34" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33 ,Set/Clear Pending Bit 33" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND32 ,Set/Clear Pending Bit 32" "Not pending,Pending" else rgroup.long 0x0204++0x03 line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95 ,Set/Clear Pending Bit 95" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND94 ,Set/Clear Pending Bit 94" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND93 ,Set/Clear Pending Bit 93" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92 ,Set/Clear Pending Bit 92" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND91 ,Set/Clear Pending Bit 91" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND90 ,Set/Clear Pending Bit 90" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89 ,Set/Clear Pending Bit 89" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND88 ,Set/Clear Pending Bit 88" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND87 ,Set/Clear Pending Bit 87" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86 ,Set/Clear Pending Bit 86" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND85 ,Set/Clear Pending Bit 85" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND84 ,Set/Clear Pending Bit 84" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83 ,Set/Clear Pending Bit 83" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND82 ,Set/Clear Pending Bit 82" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND81 ,Set/Clear Pending Bit 81" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80 ,Set/Clear Pending Bit 80" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND79 ,Set/Clear Pending Bit 79" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND78 ,Set/Clear Pending Bit 78" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77 ,Set/Clear Pending Bit 77" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND76 ,Set/Clear Pending Bit 76" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND75 ,Set/Clear Pending Bit 75" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74 ,Set/Clear Pending Bit 74" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND73 ,Set/Clear Pending Bit 73" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND72 ,Set/Clear Pending Bit 72" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71 ,Set/Clear Pending Bit 71" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND70 ,Set/Clear Pending Bit 70" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND69 ,Set/Clear Pending Bit 69" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68 ,Set/Clear Pending Bit 68" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND67 ,Set/Clear Pending Bit 67" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND66 ,Set/Clear Pending Bit 66" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65 ,Set/Clear Pending Bit 65" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND64 ,Set/Clear Pending Bit 64" "Not pending,Pending" else rgroup.long 0x0208++0x03 line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127 ,Set/Clear Pending Bit 127" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND126 ,Set/Clear Pending Bit 126" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND125 ,Set/Clear Pending Bit 125" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124 ,Set/Clear Pending Bit 124" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND123 ,Set/Clear Pending Bit 123" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND122 ,Set/Clear Pending Bit 122" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121 ,Set/Clear Pending Bit 121" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND120 ,Set/Clear Pending Bit 120" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND119 ,Set/Clear Pending Bit 119" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118 ,Set/Clear Pending Bit 118" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND117 ,Set/Clear Pending Bit 117" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND116 ,Set/Clear Pending Bit 116" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115 ,Set/Clear Pending Bit 115" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND114 ,Set/Clear Pending Bit 114" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND113 ,Set/Clear Pending Bit 113" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112 ,Set/Clear Pending Bit 112" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND111 ,Set/Clear Pending Bit 111" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND110 ,Set/Clear Pending Bit 110" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109 ,Set/Clear Pending Bit 109" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND108 ,Set/Clear Pending Bit 108" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND107 ,Set/Clear Pending Bit 107" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106 ,Set/Clear Pending Bit 106" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND105 ,Set/Clear Pending Bit 105" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND104 ,Set/Clear Pending Bit 104" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103 ,Set/Clear Pending Bit 103" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND102 ,Set/Clear Pending Bit 102" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND101 ,Set/Clear Pending Bit 101" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100 ,Set/Clear Pending Bit 100" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND99 ,Set/Clear Pending Bit 99" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND98 ,Set/Clear Pending Bit 98" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97 ,Set/Clear Pending Bit 97" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND96 ,Set/Clear Pending Bit 96" "Not pending,Pending" else rgroup.long 0x020C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159 ,Set/Clear Pending Bit 159" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND158 ,Set/Clear Pending Bit 158" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND157 ,Set/Clear Pending Bit 157" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156 ,Set/Clear Pending Bit 156" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND155 ,Set/Clear Pending Bit 155" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND154 ,Set/Clear Pending Bit 154" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153 ,Set/Clear Pending Bit 153" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND152 ,Set/Clear Pending Bit 152" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND151 ,Set/Clear Pending Bit 151" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150 ,Set/Clear Pending Bit 150" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND149 ,Set/Clear Pending Bit 149" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND148 ,Set/Clear Pending Bit 148" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147 ,Set/Clear Pending Bit 147" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND146 ,Set/Clear Pending Bit 146" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND145 ,Set/Clear Pending Bit 145" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144 ,Set/Clear Pending Bit 144" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND143 ,Set/Clear Pending Bit 143" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND142 ,Set/Clear Pending Bit 142" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141 ,Set/Clear Pending Bit 141" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND140 ,Set/Clear Pending Bit 140" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND139 ,Set/Clear Pending Bit 139" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138 ,Set/Clear Pending Bit 138" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND137 ,Set/Clear Pending Bit 137" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND136 ,Set/Clear Pending Bit 136" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135 ,Set/Clear Pending Bit 135" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND134 ,Set/Clear Pending Bit 134" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND133 ,Set/Clear Pending Bit 133" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132 ,Set/Clear Pending Bit 132" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND131 ,Set/Clear Pending Bit 131" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND130 ,Set/Clear Pending Bit 130" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129 ,Set/Clear Pending Bit 129" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND128 ,Set/Clear Pending Bit 128" "Not pending,Pending" else rgroup.long 0x0210++0x03 line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191 ,Set/Clear Pending Bit 191" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND190 ,Set/Clear Pending Bit 190" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND189 ,Set/Clear Pending Bit 189" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188 ,Set/Clear Pending Bit 188" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND187 ,Set/Clear Pending Bit 187" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND186 ,Set/Clear Pending Bit 186" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185 ,Set/Clear Pending Bit 185" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND184 ,Set/Clear Pending Bit 184" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND183 ,Set/Clear Pending Bit 183" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182 ,Set/Clear Pending Bit 182" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND181 ,Set/Clear Pending Bit 181" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND180 ,Set/Clear Pending Bit 180" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179 ,Set/Clear Pending Bit 179" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND178 ,Set/Clear Pending Bit 178" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND177 ,Set/Clear Pending Bit 177" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176 ,Set/Clear Pending Bit 176" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND175 ,Set/Clear Pending Bit 175" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND174 ,Set/Clear Pending Bit 174" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173 ,Set/Clear Pending Bit 173" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND172 ,Set/Clear Pending Bit 172" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND171 ,Set/Clear Pending Bit 171" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170 ,Set/Clear Pending Bit 170" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND169 ,Set/Clear Pending Bit 169" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND168 ,Set/Clear Pending Bit 168" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167 ,Set/Clear Pending Bit 167" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND166 ,Set/Clear Pending Bit 166" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND165 ,Set/Clear Pending Bit 165" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164 ,Set/Clear Pending Bit 164" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND163 ,Set/Clear Pending Bit 163" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND162 ,Set/Clear Pending Bit 162" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161 ,Set/Clear Pending Bit 161" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND160 ,Set/Clear Pending Bit 160" "Not pending,Pending" else rgroup.long 0x0214++0x03 line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223 ,Set/Clear Pending Bit 223" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND222 ,Set/Clear Pending Bit 222" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND221 ,Set/Clear Pending Bit 221" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220 ,Set/Clear Pending Bit 220" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND219 ,Set/Clear Pending Bit 219" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND218 ,Set/Clear Pending Bit 218" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217 ,Set/Clear Pending Bit 217" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND216 ,Set/Clear Pending Bit 216" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND215 ,Set/Clear Pending Bit 215" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214 ,Set/Clear Pending Bit 214" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND213 ,Set/Clear Pending Bit 213" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND212 ,Set/Clear Pending Bit 212" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211 ,Set/Clear Pending Bit 211" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND210 ,Set/Clear Pending Bit 210" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND209 ,Set/Clear Pending Bit 209" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208 ,Set/Clear Pending Bit 208" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND207 ,Set/Clear Pending Bit 207" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND206 ,Set/Clear Pending Bit 206" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205 ,Set/Clear Pending Bit 205" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND204 ,Set/Clear Pending Bit 204" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND203 ,Set/Clear Pending Bit 203" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202 ,Set/Clear Pending Bit 202" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND201 ,Set/Clear Pending Bit 201" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND200 ,Set/Clear Pending Bit 200" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199 ,Set/Clear Pending Bit 199" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND198 ,Set/Clear Pending Bit 198" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND197 ,Set/Clear Pending Bit 197" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196 ,Set/Clear Pending Bit 196" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND195 ,Set/Clear Pending Bit 195" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND194 ,Set/Clear Pending Bit 194" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193 ,Set/Clear Pending Bit 193" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND192 ,Set/Clear Pending Bit 192" "Not pending,Pending" else rgroup.long 0x0218++0x03 line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255 ,Set/Clear Pending Bit 255" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND254 ,Set/Clear Pending Bit 254" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND253 ,Set/Clear Pending Bit 253" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252 ,Set/Clear Pending Bit 252" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND251 ,Set/Clear Pending Bit 251" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND250 ,Set/Clear Pending Bit 250" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249 ,Set/Clear Pending Bit 249" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND248 ,Set/Clear Pending Bit 248" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND247 ,Set/Clear Pending Bit 247" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246 ,Set/Clear Pending Bit 246" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND245 ,Set/Clear Pending Bit 245" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND244 ,Set/Clear Pending Bit 244" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243 ,Set/Clear Pending Bit 243" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND242 ,Set/Clear Pending Bit 242" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND241 ,Set/Clear Pending Bit 241" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240 ,Set/Clear Pending Bit 240" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND239 ,Set/Clear Pending Bit 239" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND238 ,Set/Clear Pending Bit 238" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237 ,Set/Clear Pending Bit 237" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND236 ,Set/Clear Pending Bit 236" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND235 ,Set/Clear Pending Bit 235" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234 ,Set/Clear Pending Bit 234" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND233 ,Set/Clear Pending Bit 233" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND232 ,Set/Clear Pending Bit 232" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231 ,Set/Clear Pending Bit 231" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND230 ,Set/Clear Pending Bit 230" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND229 ,Set/Clear Pending Bit 229" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228 ,Set/Clear Pending Bit 228" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND227 ,Set/Clear Pending Bit 227" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND226 ,Set/Clear Pending Bit 226" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225 ,Set/Clear Pending Bit 225" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND224 ,Set/Clear Pending Bit 224" "Not pending,Pending" else rgroup.long 0x021C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287 ,Set/Clear Pending Bit 287" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND286 ,Set/Clear Pending Bit 286" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND285 ,Set/Clear Pending Bit 285" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284 ,Set/Clear Pending Bit 284" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND283 ,Set/Clear Pending Bit 283" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND282 ,Set/Clear Pending Bit 282" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281 ,Set/Clear Pending Bit 281" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND280 ,Set/Clear Pending Bit 280" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND279 ,Set/Clear Pending Bit 279" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278 ,Set/Clear Pending Bit 278" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND277 ,Set/Clear Pending Bit 277" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND276 ,Set/Clear Pending Bit 276" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275 ,Set/Clear Pending Bit 275" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND274 ,Set/Clear Pending Bit 274" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND273 ,Set/Clear Pending Bit 273" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272 ,Set/Clear Pending Bit 272" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND271 ,Set/Clear Pending Bit 271" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND270 ,Set/Clear Pending Bit 270" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269 ,Set/Clear Pending Bit 269" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND268 ,Set/Clear Pending Bit 268" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND267 ,Set/Clear Pending Bit 267" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266 ,Set/Clear Pending Bit 266" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND265 ,Set/Clear Pending Bit 265" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND264 ,Set/Clear Pending Bit 264" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263 ,Set/Clear Pending Bit 263" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND262 ,Set/Clear Pending Bit 262" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND261 ,Set/Clear Pending Bit 261" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260 ,Set/Clear Pending Bit 260" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND259 ,Set/Clear Pending Bit 259" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND258 ,Set/Clear Pending Bit 258" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257 ,Set/Clear Pending Bit 257" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND256 ,Set/Clear Pending Bit 256" "Not pending,Pending" else rgroup.long 0x0220++0x03 line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319 ,Set/Clear Pending Bit 319" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND318 ,Set/Clear Pending Bit 318" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND317 ,Set/Clear Pending Bit 317" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316 ,Set/Clear Pending Bit 316" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND315 ,Set/Clear Pending Bit 315" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND314 ,Set/Clear Pending Bit 314" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313 ,Set/Clear Pending Bit 313" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND312 ,Set/Clear Pending Bit 312" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND311 ,Set/Clear Pending Bit 311" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310 ,Set/Clear Pending Bit 310" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND309 ,Set/Clear Pending Bit 309" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND308 ,Set/Clear Pending Bit 308" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307 ,Set/Clear Pending Bit 307" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND306 ,Set/Clear Pending Bit 306" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND305 ,Set/Clear Pending Bit 305" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304 ,Set/Clear Pending Bit 304" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND303 ,Set/Clear Pending Bit 303" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND302 ,Set/Clear Pending Bit 302" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301 ,Set/Clear Pending Bit 301" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND300 ,Set/Clear Pending Bit 300" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND299 ,Set/Clear Pending Bit 299" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298 ,Set/Clear Pending Bit 298" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND297 ,Set/Clear Pending Bit 297" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND296 ,Set/Clear Pending Bit 296" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295 ,Set/Clear Pending Bit 295" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND294 ,Set/Clear Pending Bit 294" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND293 ,Set/Clear Pending Bit 293" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292 ,Set/Clear Pending Bit 292" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND291 ,Set/Clear Pending Bit 291" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND290 ,Set/Clear Pending Bit 290" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289 ,Set/Clear Pending Bit 289" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND288 ,Set/Clear Pending Bit 288" "Not pending,Pending" else rgroup.long 0x0224++0x03 line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351 ,Set/Clear Pending Bit 351" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND350 ,Set/Clear Pending Bit 350" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND349 ,Set/Clear Pending Bit 349" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348 ,Set/Clear Pending Bit 348" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND347 ,Set/Clear Pending Bit 347" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND346 ,Set/Clear Pending Bit 346" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345 ,Set/Clear Pending Bit 345" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND344 ,Set/Clear Pending Bit 344" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND343 ,Set/Clear Pending Bit 343" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342 ,Set/Clear Pending Bit 342" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND341 ,Set/Clear Pending Bit 341" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND340 ,Set/Clear Pending Bit 340" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339 ,Set/Clear Pending Bit 339" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND338 ,Set/Clear Pending Bit 338" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND337 ,Set/Clear Pending Bit 337" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336 ,Set/Clear Pending Bit 336" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND335 ,Set/Clear Pending Bit 335" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND334 ,Set/Clear Pending Bit 334" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333 ,Set/Clear Pending Bit 333" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND332 ,Set/Clear Pending Bit 332" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND331 ,Set/Clear Pending Bit 331" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330 ,Set/Clear Pending Bit 330" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND329 ,Set/Clear Pending Bit 329" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND328 ,Set/Clear Pending Bit 328" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327 ,Set/Clear Pending Bit 327" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND326 ,Set/Clear Pending Bit 326" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND325 ,Set/Clear Pending Bit 325" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324 ,Set/Clear Pending Bit 324" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND323 ,Set/Clear Pending Bit 323" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND322 ,Set/Clear Pending Bit 322" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321 ,Set/Clear Pending Bit 321" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND320 ,Set/Clear Pending Bit 320" "Not pending,Pending" else rgroup.long 0x0228++0x03 line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383 ,Set/Clear Pending Bit 383" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND382 ,Set/Clear Pending Bit 382" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND381 ,Set/Clear Pending Bit 381" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380 ,Set/Clear Pending Bit 380" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND379 ,Set/Clear Pending Bit 379" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND378 ,Set/Clear Pending Bit 378" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377 ,Set/Clear Pending Bit 377" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND376 ,Set/Clear Pending Bit 376" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND375 ,Set/Clear Pending Bit 375" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374 ,Set/Clear Pending Bit 374" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND373 ,Set/Clear Pending Bit 373" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND372 ,Set/Clear Pending Bit 372" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371 ,Set/Clear Pending Bit 371" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND370 ,Set/Clear Pending Bit 370" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND369 ,Set/Clear Pending Bit 369" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368 ,Set/Clear Pending Bit 368" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND367 ,Set/Clear Pending Bit 367" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND366 ,Set/Clear Pending Bit 366" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365 ,Set/Clear Pending Bit 365" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND364 ,Set/Clear Pending Bit 364" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND363 ,Set/Clear Pending Bit 363" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362 ,Set/Clear Pending Bit 362" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND361 ,Set/Clear Pending Bit 361" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND360 ,Set/Clear Pending Bit 360" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359 ,Set/Clear Pending Bit 359" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND358 ,Set/Clear Pending Bit 358" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND357 ,Set/Clear Pending Bit 357" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356 ,Set/Clear Pending Bit 356" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND355 ,Set/Clear Pending Bit 355" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND354 ,Set/Clear Pending Bit 354" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353 ,Set/Clear Pending Bit 353" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND352 ,Set/Clear Pending Bit 352" "Not pending,Pending" else rgroup.long 0x022C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415 ,Set/Clear Pending Bit 415" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND414 ,Set/Clear Pending Bit 414" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND413 ,Set/Clear Pending Bit 413" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412 ,Set/Clear Pending Bit 412" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND411 ,Set/Clear Pending Bit 411" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND410 ,Set/Clear Pending Bit 410" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409 ,Set/Clear Pending Bit 409" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND408 ,Set/Clear Pending Bit 408" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND407 ,Set/Clear Pending Bit 407" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406 ,Set/Clear Pending Bit 406" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND405 ,Set/Clear Pending Bit 405" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND404 ,Set/Clear Pending Bit 404" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403 ,Set/Clear Pending Bit 403" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND402 ,Set/Clear Pending Bit 402" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND401 ,Set/Clear Pending Bit 401" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400 ,Set/Clear Pending Bit 400" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND399 ,Set/Clear Pending Bit 399" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND398 ,Set/Clear Pending Bit 398" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397 ,Set/Clear Pending Bit 397" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND396 ,Set/Clear Pending Bit 396" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND395 ,Set/Clear Pending Bit 395" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394 ,Set/Clear Pending Bit 394" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND393 ,Set/Clear Pending Bit 393" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND392 ,Set/Clear Pending Bit 392" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391 ,Set/Clear Pending Bit 391" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND390 ,Set/Clear Pending Bit 390" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND389 ,Set/Clear Pending Bit 389" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388 ,Set/Clear Pending Bit 388" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND387 ,Set/Clear Pending Bit 387" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND386 ,Set/Clear Pending Bit 386" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385 ,Set/Clear Pending Bit 385" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND384 ,Set/Clear Pending Bit 384" "Not pending,Pending" else rgroup.long 0x0230++0x03 line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447 ,Set/Clear Pending Bit 447" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND446 ,Set/Clear Pending Bit 446" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND445 ,Set/Clear Pending Bit 445" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444 ,Set/Clear Pending Bit 444" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND443 ,Set/Clear Pending Bit 443" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND442 ,Set/Clear Pending Bit 442" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441 ,Set/Clear Pending Bit 441" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND440 ,Set/Clear Pending Bit 440" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND439 ,Set/Clear Pending Bit 439" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438 ,Set/Clear Pending Bit 438" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND437 ,Set/Clear Pending Bit 437" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND436 ,Set/Clear Pending Bit 436" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435 ,Set/Clear Pending Bit 435" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND434 ,Set/Clear Pending Bit 434" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND433 ,Set/Clear Pending Bit 433" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432 ,Set/Clear Pending Bit 432" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND431 ,Set/Clear Pending Bit 431" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND430 ,Set/Clear Pending Bit 430" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429 ,Set/Clear Pending Bit 429" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND428 ,Set/Clear Pending Bit 428" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND427 ,Set/Clear Pending Bit 427" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426 ,Set/Clear Pending Bit 426" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND425 ,Set/Clear Pending Bit 425" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND424 ,Set/Clear Pending Bit 424" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423 ,Set/Clear Pending Bit 423" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND422 ,Set/Clear Pending Bit 422" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND421 ,Set/Clear Pending Bit 421" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420 ,Set/Clear Pending Bit 420" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND419 ,Set/Clear Pending Bit 419" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND418 ,Set/Clear Pending Bit 418" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417 ,Set/Clear Pending Bit 417" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND416 ,Set/Clear Pending Bit 416" "Not pending,Pending" else rgroup.long 0x0234++0x03 line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479 ,Set/Clear Pending Bit 479" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND478 ,Set/Clear Pending Bit 478" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND477 ,Set/Clear Pending Bit 477" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476 ,Set/Clear Pending Bit 476" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND475 ,Set/Clear Pending Bit 475" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND474 ,Set/Clear Pending Bit 474" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473 ,Set/Clear Pending Bit 473" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND472 ,Set/Clear Pending Bit 472" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND471 ,Set/Clear Pending Bit 471" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470 ,Set/Clear Pending Bit 470" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND469 ,Set/Clear Pending Bit 469" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND468 ,Set/Clear Pending Bit 468" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467 ,Set/Clear Pending Bit 467" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND466 ,Set/Clear Pending Bit 466" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND465 ,Set/Clear Pending Bit 465" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464 ,Set/Clear Pending Bit 464" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND463 ,Set/Clear Pending Bit 463" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND462 ,Set/Clear Pending Bit 462" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461 ,Set/Clear Pending Bit 461" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND460 ,Set/Clear Pending Bit 460" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND459 ,Set/Clear Pending Bit 459" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458 ,Set/Clear Pending Bit 458" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND457 ,Set/Clear Pending Bit 457" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND456 ,Set/Clear Pending Bit 456" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455 ,Set/Clear Pending Bit 455" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND454 ,Set/Clear Pending Bit 454" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND453 ,Set/Clear Pending Bit 453" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452 ,Set/Clear Pending Bit 452" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND451 ,Set/Clear Pending Bit 451" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND450 ,Set/Clear Pending Bit 450" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449 ,Set/Clear Pending Bit 449" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND448 ,Set/Clear Pending Bit 448" "Not pending,Pending" else rgroup.long 0x0238++0x03 line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511 ,Set/Clear Pending Bit 511" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND510 ,Set/Clear Pending Bit 510" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND509 ,Set/Clear Pending Bit 509" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508 ,Set/Clear Pending Bit 508" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND507 ,Set/Clear Pending Bit 507" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND506 ,Set/Clear Pending Bit 506" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505 ,Set/Clear Pending Bit 505" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND504 ,Set/Clear Pending Bit 504" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND503 ,Set/Clear Pending Bit 503" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502 ,Set/Clear Pending Bit 502" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND501 ,Set/Clear Pending Bit 501" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND500 ,Set/Clear Pending Bit 500" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499 ,Set/Clear Pending Bit 499" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND498 ,Set/Clear Pending Bit 498" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND497 ,Set/Clear Pending Bit 497" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496 ,Set/Clear Pending Bit 496" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND495 ,Set/Clear Pending Bit 495" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND494 ,Set/Clear Pending Bit 494" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493 ,Set/Clear Pending Bit 493" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND492 ,Set/Clear Pending Bit 492" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND491 ,Set/Clear Pending Bit 491" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490 ,Set/Clear Pending Bit 490" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND489 ,Set/Clear Pending Bit 489" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND488 ,Set/Clear Pending Bit 488" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487 ,Set/Clear Pending Bit 487" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND486 ,Set/Clear Pending Bit 486" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND485 ,Set/Clear Pending Bit 485" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484 ,Set/Clear Pending Bit 484" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND483 ,Set/Clear Pending Bit 483" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND482 ,Set/Clear Pending Bit 482" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481 ,Set/Clear Pending Bit 481" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND480 ,Set/Clear Pending Bit 480" "Not pending,Pending" else rgroup.long 0x023C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543 ,Set/Clear Pending Bit 543" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND542 ,Set/Clear Pending Bit 542" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND541 ,Set/Clear Pending Bit 541" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540 ,Set/Clear Pending Bit 540" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND539 ,Set/Clear Pending Bit 539" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND538 ,Set/Clear Pending Bit 538" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537 ,Set/Clear Pending Bit 537" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND536 ,Set/Clear Pending Bit 536" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND535 ,Set/Clear Pending Bit 535" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534 ,Set/Clear Pending Bit 534" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND533 ,Set/Clear Pending Bit 533" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND532 ,Set/Clear Pending Bit 532" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531 ,Set/Clear Pending Bit 531" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND530 ,Set/Clear Pending Bit 530" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND529 ,Set/Clear Pending Bit 529" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528 ,Set/Clear Pending Bit 528" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND527 ,Set/Clear Pending Bit 527" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND526 ,Set/Clear Pending Bit 526" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525 ,Set/Clear Pending Bit 525" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND524 ,Set/Clear Pending Bit 524" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND523 ,Set/Clear Pending Bit 523" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522 ,Set/Clear Pending Bit 522" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND521 ,Set/Clear Pending Bit 521" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND520 ,Set/Clear Pending Bit 520" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519 ,Set/Clear Pending Bit 519" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND518 ,Set/Clear Pending Bit 518" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND517 ,Set/Clear Pending Bit 517" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516 ,Set/Clear Pending Bit 516" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND515 ,Set/Clear Pending Bit 515" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND514 ,Set/Clear Pending Bit 514" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513 ,Set/Clear Pending Bit 513" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND512 ,Set/Clear Pending Bit 512" "Not pending,Pending" else rgroup.long 0x0240++0x03 line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575 ,Set/Clear Pending Bit 575" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND574 ,Set/Clear Pending Bit 574" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND573 ,Set/Clear Pending Bit 573" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572 ,Set/Clear Pending Bit 572" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND571 ,Set/Clear Pending Bit 571" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND570 ,Set/Clear Pending Bit 570" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569 ,Set/Clear Pending Bit 569" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND568 ,Set/Clear Pending Bit 568" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND567 ,Set/Clear Pending Bit 567" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566 ,Set/Clear Pending Bit 566" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND565 ,Set/Clear Pending Bit 565" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND564 ,Set/Clear Pending Bit 564" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563 ,Set/Clear Pending Bit 563" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND562 ,Set/Clear Pending Bit 562" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND561 ,Set/Clear Pending Bit 561" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560 ,Set/Clear Pending Bit 560" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND559 ,Set/Clear Pending Bit 559" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND558 ,Set/Clear Pending Bit 558" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557 ,Set/Clear Pending Bit 557" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND556 ,Set/Clear Pending Bit 556" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND555 ,Set/Clear Pending Bit 555" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554 ,Set/Clear Pending Bit 554" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND553 ,Set/Clear Pending Bit 553" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND552 ,Set/Clear Pending Bit 552" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551 ,Set/Clear Pending Bit 551" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND550 ,Set/Clear Pending Bit 550" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND549 ,Set/Clear Pending Bit 549" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548 ,Set/Clear Pending Bit 548" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND547 ,Set/Clear Pending Bit 547" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND546 ,Set/Clear Pending Bit 546" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545 ,Set/Clear Pending Bit 545" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND544 ,Set/Clear Pending Bit 544" "Not pending,Pending" else rgroup.long 0x0244++0x03 line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607 ,Set/Clear Pending Bit 607" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND606 ,Set/Clear Pending Bit 606" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND605 ,Set/Clear Pending Bit 605" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604 ,Set/Clear Pending Bit 604" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND603 ,Set/Clear Pending Bit 603" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND602 ,Set/Clear Pending Bit 602" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601 ,Set/Clear Pending Bit 601" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND600 ,Set/Clear Pending Bit 600" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND599 ,Set/Clear Pending Bit 599" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598 ,Set/Clear Pending Bit 598" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND597 ,Set/Clear Pending Bit 597" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND596 ,Set/Clear Pending Bit 596" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595 ,Set/Clear Pending Bit 595" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND594 ,Set/Clear Pending Bit 594" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND593 ,Set/Clear Pending Bit 593" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592 ,Set/Clear Pending Bit 592" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND591 ,Set/Clear Pending Bit 591" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND590 ,Set/Clear Pending Bit 590" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589 ,Set/Clear Pending Bit 589" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND588 ,Set/Clear Pending Bit 588" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND587 ,Set/Clear Pending Bit 587" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586 ,Set/Clear Pending Bit 586" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND585 ,Set/Clear Pending Bit 585" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND584 ,Set/Clear Pending Bit 584" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583 ,Set/Clear Pending Bit 583" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND582 ,Set/Clear Pending Bit 582" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND581 ,Set/Clear Pending Bit 581" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580 ,Set/Clear Pending Bit 580" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND579 ,Set/Clear Pending Bit 579" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND578 ,Set/Clear Pending Bit 578" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577 ,Set/Clear Pending Bit 577" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND576 ,Set/Clear Pending Bit 576" "Not pending,Pending" else rgroup.long 0x0248++0x03 line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639 ,Set/Clear Pending Bit 639" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND638 ,Set/Clear Pending Bit 638" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND637 ,Set/Clear Pending Bit 637" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636 ,Set/Clear Pending Bit 636" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND635 ,Set/Clear Pending Bit 635" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND634 ,Set/Clear Pending Bit 634" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633 ,Set/Clear Pending Bit 633" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND632 ,Set/Clear Pending Bit 632" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND631 ,Set/Clear Pending Bit 631" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630 ,Set/Clear Pending Bit 630" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND629 ,Set/Clear Pending Bit 629" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND628 ,Set/Clear Pending Bit 628" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627 ,Set/Clear Pending Bit 627" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND626 ,Set/Clear Pending Bit 626" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND625 ,Set/Clear Pending Bit 625" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624 ,Set/Clear Pending Bit 624" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND623 ,Set/Clear Pending Bit 623" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND622 ,Set/Clear Pending Bit 622" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621 ,Set/Clear Pending Bit 621" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND620 ,Set/Clear Pending Bit 620" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND619 ,Set/Clear Pending Bit 619" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618 ,Set/Clear Pending Bit 618" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND617 ,Set/Clear Pending Bit 617" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND616 ,Set/Clear Pending Bit 616" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615 ,Set/Clear Pending Bit 615" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND614 ,Set/Clear Pending Bit 614" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND613 ,Set/Clear Pending Bit 613" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612 ,Set/Clear Pending Bit 612" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND611 ,Set/Clear Pending Bit 611" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND610 ,Set/Clear Pending Bit 610" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609 ,Set/Clear Pending Bit 609" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND608 ,Set/Clear Pending Bit 608" "Not pending,Pending" else rgroup.long 0x024C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671 ,Set/Clear Pending Bit 671" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND670 ,Set/Clear Pending Bit 670" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND669 ,Set/Clear Pending Bit 669" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668 ,Set/Clear Pending Bit 668" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND667 ,Set/Clear Pending Bit 667" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND666 ,Set/Clear Pending Bit 666" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665 ,Set/Clear Pending Bit 665" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND664 ,Set/Clear Pending Bit 664" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND663 ,Set/Clear Pending Bit 663" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662 ,Set/Clear Pending Bit 662" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND661 ,Set/Clear Pending Bit 661" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND660 ,Set/Clear Pending Bit 660" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659 ,Set/Clear Pending Bit 659" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND658 ,Set/Clear Pending Bit 658" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND657 ,Set/Clear Pending Bit 657" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656 ,Set/Clear Pending Bit 656" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND655 ,Set/Clear Pending Bit 655" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND654 ,Set/Clear Pending Bit 654" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653 ,Set/Clear Pending Bit 653" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND652 ,Set/Clear Pending Bit 652" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND651 ,Set/Clear Pending Bit 651" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650 ,Set/Clear Pending Bit 650" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND649 ,Set/Clear Pending Bit 649" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND648 ,Set/Clear Pending Bit 648" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647 ,Set/Clear Pending Bit 647" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND646 ,Set/Clear Pending Bit 646" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND645 ,Set/Clear Pending Bit 645" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644 ,Set/Clear Pending Bit 644" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND643 ,Set/Clear Pending Bit 643" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND642 ,Set/Clear Pending Bit 642" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641 ,Set/Clear Pending Bit 641" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND640 ,Set/Clear Pending Bit 640" "Not pending,Pending" else rgroup.long 0x0250++0x03 line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703 ,Set/Clear Pending Bit 703" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND702 ,Set/Clear Pending Bit 702" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND701 ,Set/Clear Pending Bit 701" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700 ,Set/Clear Pending Bit 700" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND699 ,Set/Clear Pending Bit 699" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND698 ,Set/Clear Pending Bit 698" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697 ,Set/Clear Pending Bit 697" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND696 ,Set/Clear Pending Bit 696" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND695 ,Set/Clear Pending Bit 695" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694 ,Set/Clear Pending Bit 694" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND693 ,Set/Clear Pending Bit 693" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND692 ,Set/Clear Pending Bit 692" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691 ,Set/Clear Pending Bit 691" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND690 ,Set/Clear Pending Bit 690" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND689 ,Set/Clear Pending Bit 689" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688 ,Set/Clear Pending Bit 688" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND687 ,Set/Clear Pending Bit 687" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND686 ,Set/Clear Pending Bit 686" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685 ,Set/Clear Pending Bit 685" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND684 ,Set/Clear Pending Bit 684" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND683 ,Set/Clear Pending Bit 683" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682 ,Set/Clear Pending Bit 682" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND681 ,Set/Clear Pending Bit 681" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND680 ,Set/Clear Pending Bit 680" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679 ,Set/Clear Pending Bit 679" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND678 ,Set/Clear Pending Bit 678" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND677 ,Set/Clear Pending Bit 677" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676 ,Set/Clear Pending Bit 676" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND675 ,Set/Clear Pending Bit 675" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND674 ,Set/Clear Pending Bit 674" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673 ,Set/Clear Pending Bit 673" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND672 ,Set/Clear Pending Bit 672" "Not pending,Pending" else rgroup.long 0x0254++0x03 line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735 ,Set/Clear Pending Bit 735" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND734 ,Set/Clear Pending Bit 734" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND733 ,Set/Clear Pending Bit 733" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732 ,Set/Clear Pending Bit 732" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND731 ,Set/Clear Pending Bit 731" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND730 ,Set/Clear Pending Bit 730" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729 ,Set/Clear Pending Bit 729" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND728 ,Set/Clear Pending Bit 728" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND727 ,Set/Clear Pending Bit 727" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726 ,Set/Clear Pending Bit 726" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND725 ,Set/Clear Pending Bit 725" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND724 ,Set/Clear Pending Bit 724" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723 ,Set/Clear Pending Bit 723" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND722 ,Set/Clear Pending Bit 722" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND721 ,Set/Clear Pending Bit 721" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720 ,Set/Clear Pending Bit 720" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND719 ,Set/Clear Pending Bit 719" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND718 ,Set/Clear Pending Bit 718" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717 ,Set/Clear Pending Bit 717" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND716 ,Set/Clear Pending Bit 716" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND715 ,Set/Clear Pending Bit 715" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714 ,Set/Clear Pending Bit 714" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND713 ,Set/Clear Pending Bit 713" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND712 ,Set/Clear Pending Bit 712" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711 ,Set/Clear Pending Bit 711" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND710 ,Set/Clear Pending Bit 710" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND709 ,Set/Clear Pending Bit 709" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708 ,Set/Clear Pending Bit 708" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND707 ,Set/Clear Pending Bit 707" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND706 ,Set/Clear Pending Bit 706" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705 ,Set/Clear Pending Bit 705" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND704 ,Set/Clear Pending Bit 704" "Not pending,Pending" else rgroup.long 0x0258++0x03 line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767 ,Set/Clear Pending Bit 767" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND766 ,Set/Clear Pending Bit 766" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND765 ,Set/Clear Pending Bit 765" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764 ,Set/Clear Pending Bit 764" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND763 ,Set/Clear Pending Bit 763" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND762 ,Set/Clear Pending Bit 762" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761 ,Set/Clear Pending Bit 761" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND760 ,Set/Clear Pending Bit 760" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND759 ,Set/Clear Pending Bit 759" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758 ,Set/Clear Pending Bit 758" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND757 ,Set/Clear Pending Bit 757" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND756 ,Set/Clear Pending Bit 756" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755 ,Set/Clear Pending Bit 755" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND754 ,Set/Clear Pending Bit 754" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND753 ,Set/Clear Pending Bit 753" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752 ,Set/Clear Pending Bit 752" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND751 ,Set/Clear Pending Bit 751" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND750 ,Set/Clear Pending Bit 750" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749 ,Set/Clear Pending Bit 749" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND748 ,Set/Clear Pending Bit 748" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND747 ,Set/Clear Pending Bit 747" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746 ,Set/Clear Pending Bit 746" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND745 ,Set/Clear Pending Bit 745" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND744 ,Set/Clear Pending Bit 744" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743 ,Set/Clear Pending Bit 743" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND742 ,Set/Clear Pending Bit 742" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND741 ,Set/Clear Pending Bit 741" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740 ,Set/Clear Pending Bit 740" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND739 ,Set/Clear Pending Bit 739" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND738 ,Set/Clear Pending Bit 738" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737 ,Set/Clear Pending Bit 737" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND736 ,Set/Clear Pending Bit 736" "Not pending,Pending" else rgroup.long 0x025C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799 ,Set/Clear Pending Bit 799" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND798 ,Set/Clear Pending Bit 798" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND797 ,Set/Clear Pending Bit 797" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796 ,Set/Clear Pending Bit 796" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND795 ,Set/Clear Pending Bit 795" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND794 ,Set/Clear Pending Bit 794" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793 ,Set/Clear Pending Bit 793" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND792 ,Set/Clear Pending Bit 792" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND791 ,Set/Clear Pending Bit 791" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790 ,Set/Clear Pending Bit 790" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND789 ,Set/Clear Pending Bit 789" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND788 ,Set/Clear Pending Bit 788" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787 ,Set/Clear Pending Bit 787" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND786 ,Set/Clear Pending Bit 786" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND785 ,Set/Clear Pending Bit 785" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784 ,Set/Clear Pending Bit 784" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND783 ,Set/Clear Pending Bit 783" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND782 ,Set/Clear Pending Bit 782" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781 ,Set/Clear Pending Bit 781" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND780 ,Set/Clear Pending Bit 780" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND779 ,Set/Clear Pending Bit 779" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778 ,Set/Clear Pending Bit 778" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND777 ,Set/Clear Pending Bit 777" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND776 ,Set/Clear Pending Bit 776" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775 ,Set/Clear Pending Bit 775" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND774 ,Set/Clear Pending Bit 774" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND773 ,Set/Clear Pending Bit 773" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772 ,Set/Clear Pending Bit 772" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND771 ,Set/Clear Pending Bit 771" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND770 ,Set/Clear Pending Bit 770" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769 ,Set/Clear Pending Bit 769" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND768 ,Set/Clear Pending Bit 768" "Not pending,Pending" else rgroup.long 0x0260++0x03 line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831 ,Set/Clear Pending Bit 831" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND830 ,Set/Clear Pending Bit 830" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND829 ,Set/Clear Pending Bit 829" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828 ,Set/Clear Pending Bit 828" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND827 ,Set/Clear Pending Bit 827" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND826 ,Set/Clear Pending Bit 826" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825 ,Set/Clear Pending Bit 825" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND824 ,Set/Clear Pending Bit 824" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND823 ,Set/Clear Pending Bit 823" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822 ,Set/Clear Pending Bit 822" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND821 ,Set/Clear Pending Bit 821" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND820 ,Set/Clear Pending Bit 820" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819 ,Set/Clear Pending Bit 819" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND818 ,Set/Clear Pending Bit 818" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND817 ,Set/Clear Pending Bit 817" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816 ,Set/Clear Pending Bit 816" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND815 ,Set/Clear Pending Bit 815" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND814 ,Set/Clear Pending Bit 814" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813 ,Set/Clear Pending Bit 813" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND812 ,Set/Clear Pending Bit 812" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND811 ,Set/Clear Pending Bit 811" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810 ,Set/Clear Pending Bit 810" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND809 ,Set/Clear Pending Bit 809" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND808 ,Set/Clear Pending Bit 808" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807 ,Set/Clear Pending Bit 807" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND806 ,Set/Clear Pending Bit 806" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND805 ,Set/Clear Pending Bit 805" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804 ,Set/Clear Pending Bit 804" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND803 ,Set/Clear Pending Bit 803" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND802 ,Set/Clear Pending Bit 802" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801 ,Set/Clear Pending Bit 801" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND800 ,Set/Clear Pending Bit 800" "Not pending,Pending" else rgroup.long 0x0264++0x03 line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863 ,Set/Clear Pending Bit 863" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND862 ,Set/Clear Pending Bit 862" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND861 ,Set/Clear Pending Bit 861" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860 ,Set/Clear Pending Bit 860" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND859 ,Set/Clear Pending Bit 859" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND858 ,Set/Clear Pending Bit 858" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857 ,Set/Clear Pending Bit 857" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND856 ,Set/Clear Pending Bit 856" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND855 ,Set/Clear Pending Bit 855" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854 ,Set/Clear Pending Bit 854" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND853 ,Set/Clear Pending Bit 853" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND852 ,Set/Clear Pending Bit 852" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851 ,Set/Clear Pending Bit 851" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND850 ,Set/Clear Pending Bit 850" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND849 ,Set/Clear Pending Bit 849" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848 ,Set/Clear Pending Bit 848" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND847 ,Set/Clear Pending Bit 847" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND846 ,Set/Clear Pending Bit 846" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845 ,Set/Clear Pending Bit 845" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND844 ,Set/Clear Pending Bit 844" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND843 ,Set/Clear Pending Bit 843" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842 ,Set/Clear Pending Bit 842" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND841 ,Set/Clear Pending Bit 841" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND840 ,Set/Clear Pending Bit 840" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839 ,Set/Clear Pending Bit 839" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND838 ,Set/Clear Pending Bit 838" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND837 ,Set/Clear Pending Bit 837" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836 ,Set/Clear Pending Bit 836" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND835 ,Set/Clear Pending Bit 835" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND834 ,Set/Clear Pending Bit 834" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833 ,Set/Clear Pending Bit 833" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND832 ,Set/Clear Pending Bit 832" "Not pending,Pending" else rgroup.long 0x0268++0x03 line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895 ,Set/Clear Pending Bit 895" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND894 ,Set/Clear Pending Bit 894" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND893 ,Set/Clear Pending Bit 893" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892 ,Set/Clear Pending Bit 892" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND891 ,Set/Clear Pending Bit 891" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND890 ,Set/Clear Pending Bit 890" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889 ,Set/Clear Pending Bit 889" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND888 ,Set/Clear Pending Bit 888" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND887 ,Set/Clear Pending Bit 887" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886 ,Set/Clear Pending Bit 886" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND885 ,Set/Clear Pending Bit 885" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND884 ,Set/Clear Pending Bit 884" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883 ,Set/Clear Pending Bit 883" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND882 ,Set/Clear Pending Bit 882" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND881 ,Set/Clear Pending Bit 881" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880 ,Set/Clear Pending Bit 880" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND879 ,Set/Clear Pending Bit 879" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND878 ,Set/Clear Pending Bit 878" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877 ,Set/Clear Pending Bit 877" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND876 ,Set/Clear Pending Bit 876" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND875 ,Set/Clear Pending Bit 875" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874 ,Set/Clear Pending Bit 874" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND873 ,Set/Clear Pending Bit 873" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND872 ,Set/Clear Pending Bit 872" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871 ,Set/Clear Pending Bit 871" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND870 ,Set/Clear Pending Bit 870" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND869 ,Set/Clear Pending Bit 869" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868 ,Set/Clear Pending Bit 868" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND867 ,Set/Clear Pending Bit 867" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND866 ,Set/Clear Pending Bit 866" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865 ,Set/Clear Pending Bit 865" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND864 ,Set/Clear Pending Bit 864" "Not pending,Pending" else rgroup.long 0x026C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927 ,Set/Clear Pending Bit 927" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND926 ,Set/Clear Pending Bit 926" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND925 ,Set/Clear Pending Bit 925" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924 ,Set/Clear Pending Bit 924" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND923 ,Set/Clear Pending Bit 923" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND922 ,Set/Clear Pending Bit 922" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921 ,Set/Clear Pending Bit 921" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND920 ,Set/Clear Pending Bit 920" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND919 ,Set/Clear Pending Bit 919" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918 ,Set/Clear Pending Bit 918" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND917 ,Set/Clear Pending Bit 917" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND916 ,Set/Clear Pending Bit 916" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915 ,Set/Clear Pending Bit 915" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND914 ,Set/Clear Pending Bit 914" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND913 ,Set/Clear Pending Bit 913" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912 ,Set/Clear Pending Bit 912" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND911 ,Set/Clear Pending Bit 911" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND910 ,Set/Clear Pending Bit 910" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909 ,Set/Clear Pending Bit 909" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND908 ,Set/Clear Pending Bit 908" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND907 ,Set/Clear Pending Bit 907" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906 ,Set/Clear Pending Bit 906" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND905 ,Set/Clear Pending Bit 905" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND904 ,Set/Clear Pending Bit 904" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903 ,Set/Clear Pending Bit 903" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND902 ,Set/Clear Pending Bit 902" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND901 ,Set/Clear Pending Bit 901" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900 ,Set/Clear Pending Bit 900" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND899 ,Set/Clear Pending Bit 899" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND898 ,Set/Clear Pending Bit 898" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897 ,Set/Clear Pending Bit 897" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND896 ,Set/Clear Pending Bit 896" "Not pending,Pending" else rgroup.long 0x0270++0x03 line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959 ,Set/Clear Pending Bit 959" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND958 ,Set/Clear Pending Bit 958" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND957 ,Set/Clear Pending Bit 957" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956 ,Set/Clear Pending Bit 956" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND955 ,Set/Clear Pending Bit 955" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND954 ,Set/Clear Pending Bit 954" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953 ,Set/Clear Pending Bit 953" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND952 ,Set/Clear Pending Bit 952" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND951 ,Set/Clear Pending Bit 951" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950 ,Set/Clear Pending Bit 950" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND949 ,Set/Clear Pending Bit 949" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND948 ,Set/Clear Pending Bit 948" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947 ,Set/Clear Pending Bit 947" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND946 ,Set/Clear Pending Bit 946" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND945 ,Set/Clear Pending Bit 945" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944 ,Set/Clear Pending Bit 944" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND943 ,Set/Clear Pending Bit 943" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND942 ,Set/Clear Pending Bit 942" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941 ,Set/Clear Pending Bit 941" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND940 ,Set/Clear Pending Bit 940" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND939 ,Set/Clear Pending Bit 939" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938 ,Set/Clear Pending Bit 938" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND937 ,Set/Clear Pending Bit 937" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND936 ,Set/Clear Pending Bit 936" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935 ,Set/Clear Pending Bit 935" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND934 ,Set/Clear Pending Bit 934" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND933 ,Set/Clear Pending Bit 933" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932 ,Set/Clear Pending Bit 932" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND931 ,Set/Clear Pending Bit 931" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND930 ,Set/Clear Pending Bit 930" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929 ,Set/Clear Pending Bit 929" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND928 ,Set/Clear Pending Bit 928" "Not pending,Pending" else rgroup.long 0x0274++0x03 line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991 ,Set/Clear Pending Bit 991" "Not pending,Pending" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRPEND990 ,Set/Clear Pending Bit 990" "Not pending,Pending" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRPEND989 ,Set/Clear Pending Bit 989" "Not pending,Pending" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988 ,Set/Clear Pending Bit 988" "Not pending,Pending" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND987 ,Set/Clear Pending Bit 987" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND986 ,Set/Clear Pending Bit 986" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985 ,Set/Clear Pending Bit 985" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND984 ,Set/Clear Pending Bit 984" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND983 ,Set/Clear Pending Bit 983" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982 ,Set/Clear Pending Bit 982" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND981 ,Set/Clear Pending Bit 981" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND980 ,Set/Clear Pending Bit 980" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979 ,Set/Clear Pending Bit 979" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND978 ,Set/Clear Pending Bit 978" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND977 ,Set/Clear Pending Bit 977" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976 ,Set/Clear Pending Bit 976" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND975 ,Set/Clear Pending Bit 975" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND974 ,Set/Clear Pending Bit 974" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973 ,Set/Clear Pending Bit 973" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND972 ,Set/Clear Pending Bit 972" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND971 ,Set/Clear Pending Bit 971" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970 ,Set/Clear Pending Bit 970" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND969 ,Set/Clear Pending Bit 969" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND968 ,Set/Clear Pending Bit 968" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967 ,Set/Clear Pending Bit 967" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND966 ,Set/Clear Pending Bit 966" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND965 ,Set/Clear Pending Bit 965" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964 ,Set/Clear Pending Bit 964" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND963 ,Set/Clear Pending Bit 963" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND962 ,Set/Clear Pending Bit 962" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961 ,Set/Clear Pending Bit 961" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND960 ,Set/Clear Pending Bit 960" "Not pending,Pending" else rgroup.long 0x0278++0x03 line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F) group.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRPEND1019 ,Set/Clear Pending Bit 1019" "Not pending,Pending" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRPEND1018 ,Set/Clear Pending Bit 1018" "Not pending,Pending" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND1017 ,Set/Clear Pending Bit 1017" "Not pending,Pending" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRPEND1016 ,Set/Clear Pending Bit 1016" "Not pending,Pending" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRPEND1015 ,Set/Clear Pending Bit 1015" "Not pending,Pending" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND1014 ,Set/Clear Pending Bit 1014" "Not pending,Pending" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRPEND1013 ,Set/Clear Pending Bit 1013" "Not pending,Pending" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRPEND1012 ,Set/Clear Pending Bit 1012" "Not pending,Pending" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND1011 ,Set/Clear Pending Bit 1011" "Not pending,Pending" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRPEND1010 ,Set/Clear Pending Bit 1010" "Not pending,Pending" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRPEND1009 ,Set/Clear Pending Bit 1009" "Not pending,Pending" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND1008 ,Set/Clear Pending Bit 1008" "Not pending,Pending" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRPEND1007 ,Set/Clear Pending Bit 1007" "Not pending,Pending" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRPEND1006 ,Set/Clear Pending Bit 1006" "Not pending,Pending" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND1005 ,Set/Clear Pending Bit 1005" "Not pending,Pending" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRPEND1004 ,Set/Clear Pending Bit 1004" "Not pending,Pending" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRPEND1003 ,Set/Clear Pending Bit 1003" "Not pending,Pending" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND1002 ,Set/Clear Pending Bit 1002" "Not pending,Pending" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRPEND1001 ,Set/Clear Pending Bit 1001" "Not pending,Pending" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRPEND1000 ,Set/Clear Pending Bit 1000" "Not pending,Pending" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND999 ,Set/Clear Pending Bit 999" "Not pending,Pending" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRPEND998 ,Set/Clear Pending Bit 998" "Not pending,Pending" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRPEND997 ,Set/Clear Pending Bit 997" "Not pending,Pending" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND996 ,Set/Clear Pending Bit 996" "Not pending,Pending" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRPEND995 ,Set/Clear Pending Bit 995" "Not pending,Pending" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRPEND994 ,Set/Clear Pending Bit 994" "Not pending,Pending" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND993 ,Set/Clear Pending Bit 993" "Not pending,Pending" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRPEND992 ,Set/Clear Pending Bit 992" "Not pending,Pending" else rgroup.long 0x027C++0x03 line.long 0x0 "GICD_SET/CLR_PENDR31,Interrupt Set/Clear Pending Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 24. tree "Set/Clear Active Registers" if (((per.l(ad:0xf1001000+0x08))&0xFF000000)==(0x0000000||0x1000000)) rgroup.long 0x0300++0x03 line.long 0x0 "GICD_ICDABR0,Active Status Register 0" bitfld.long 0x00 31. " ASB31 ,Active Status Bit 31" "Not active,Active" bitfld.long 0x00 30. " ASB30 ,Active Status Bit 30" "Not active,Active" bitfld.long 0x00 29. " ASB29 ,Active Status Bit 29" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB28 ,Active Status Bit 28" "Not active,Active" bitfld.long 0x00 27. " ASB27 ,Active Status Bit 27" "Not active,Active" bitfld.long 0x00 26. " ASB26 ,Active Status Bit 26" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB25 ,Active Status Bit 25" "Not active,Active" bitfld.long 0x00 24. " ASB24 ,Active Status Bit 24" "Not active,Active" bitfld.long 0x00 23. " ASB23 ,Active Status Bit 23" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB22 ,Active Status Bit 22" "Not active,Active" bitfld.long 0x00 21. " ASB21 ,Active Status Bit 21" "Not active,Active" bitfld.long 0x00 20. " ASB20 ,Active Status Bit 20" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB19 ,Active Status Bit 19" "Not active,Active" bitfld.long 0x00 18. " ASB18 ,Active Status Bit 18" "Not active,Active" bitfld.long 0x00 17. " ASB17 ,Active Status Bit 17" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB16 ,Active Status Bit 16" "Not active,Active" bitfld.long 0x00 15. " ASB15 ,Active Status Bit 15" "Not active,Active" bitfld.long 0x00 14. " ASB14 ,Active Status Bit 14" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB13 ,Active Status Bit 13" "Not active,Active" bitfld.long 0x00 12. " ASB12 ,Active Status Bit 12" "Not active,Active" bitfld.long 0x00 11. " ASB11 ,Active Status Bit 11" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB10 ,Active Status Bit 10" "Not active,Active" bitfld.long 0x00 9. " ASB9 ,Active Status Bit 9" "Not active,Active" bitfld.long 0x00 8. " ASB8 ,Active Status Bit 8" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB7 ,Active Status Bit 7" "Not active,Active" bitfld.long 0x00 6. " ASB6 ,Active Status Bit 6" "Not active,Active" bitfld.long 0x00 5. " ASB5 ,Active Status Bit 5" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB4 ,Active Status Bit 4" "Not active,Active" bitfld.long 0x00 3. " ASB3 ,Active Status Bit 3" "Not active,Active" bitfld.long 0x00 2. " ASB2 ,Active Status Bit 2" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB1 ,Active Status Bit 1" "Not active,Active" bitfld.long 0x00 0. " ASB0 ,Active Status Bit 0" "Not active,Active" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" bitfld.long 0x00 31. " ASB63 ,Active Status Bit 63" "Not active,Active" bitfld.long 0x00 30. " ASB62 ,Active Status Bit 62" "Not active,Active" bitfld.long 0x00 29. " ASB61 ,Active Status Bit 61" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB60 ,Active Status Bit 60" "Not active,Active" bitfld.long 0x00 27. " ASB59 ,Active Status Bit 59" "Not active,Active" bitfld.long 0x00 26. " ASB58 ,Active Status Bit 58" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB57 ,Active Status Bit 57" "Not active,Active" bitfld.long 0x00 24. " ASB56 ,Active Status Bit 56" "Not active,Active" bitfld.long 0x00 23. " ASB55 ,Active Status Bit 55" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB54 ,Active Status Bit 54" "Not active,Active" bitfld.long 0x00 21. " ASB53 ,Active Status Bit 53" "Not active,Active" bitfld.long 0x00 20. " ASB52 ,Active Status Bit 52" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB51 ,Active Status Bit 51" "Not active,Active" bitfld.long 0x00 18. " ASB50 ,Active Status Bit 50" "Not active,Active" bitfld.long 0x00 17. " ASB49 ,Active Status Bit 49" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB48 ,Active Status Bit 48" "Not active,Active" bitfld.long 0x00 15. " ASB47 ,Active Status Bit 47" "Not active,Active" bitfld.long 0x00 14. " ASB46 ,Active Status Bit 46" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB45 ,Active Status Bit 45" "Not active,Active" bitfld.long 0x00 12. " ASB44 ,Active Status Bit 44" "Not active,Active" bitfld.long 0x00 11. " ASB43 ,Active Status Bit 43" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB42 ,Active Status Bit 42" "Not active,Active" bitfld.long 0x00 9. " ASB41 ,Active Status Bit 41" "Not active,Active" bitfld.long 0x00 8. " ASB40 ,Active Status Bit 40" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB39 ,Active Status Bit 39" "Not active,Active" bitfld.long 0x00 6. " ASB38 ,Active Status Bit 38" "Not active,Active" bitfld.long 0x00 5. " ASB37 ,Active Status Bit 37" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB36 ,Active Status Bit 36" "Not active,Active" bitfld.long 0x00 3. " ASB35 ,Active Status Bit 35" "Not active,Active" bitfld.long 0x00 2. " ASB34 ,Active Status Bit 34" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB33 ,Active Status Bit 33" "Not active,Active" bitfld.long 0x00 0. " ASB32 ,Active Status Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_ICDABR1,Active Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" bitfld.long 0x00 31. " ASB95 ,Active Status Bit 95" "Not active,Active" bitfld.long 0x00 30. " ASB94 ,Active Status Bit 94" "Not active,Active" bitfld.long 0x00 29. " ASB93 ,Active Status Bit 93" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB92 ,Active Status Bit 92" "Not active,Active" bitfld.long 0x00 27. " ASB91 ,Active Status Bit 91" "Not active,Active" bitfld.long 0x00 26. " ASB90 ,Active Status Bit 90" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB89 ,Active Status Bit 89" "Not active,Active" bitfld.long 0x00 24. " ASB88 ,Active Status Bit 88" "Not active,Active" bitfld.long 0x00 23. " ASB87 ,Active Status Bit 87" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB86 ,Active Status Bit 86" "Not active,Active" bitfld.long 0x00 21. " ASB85 ,Active Status Bit 85" "Not active,Active" bitfld.long 0x00 20. " ASB84 ,Active Status Bit 84" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB83 ,Active Status Bit 83" "Not active,Active" bitfld.long 0x00 18. " ASB82 ,Active Status Bit 82" "Not active,Active" bitfld.long 0x00 17. " ASB81 ,Active Status Bit 81" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB80 ,Active Status Bit 80" "Not active,Active" bitfld.long 0x00 15. " ASB79 ,Active Status Bit 79" "Not active,Active" bitfld.long 0x00 14. " ASB78 ,Active Status Bit 78" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB77 ,Active Status Bit 77" "Not active,Active" bitfld.long 0x00 12. " ASB76 ,Active Status Bit 76" "Not active,Active" bitfld.long 0x00 11. " ASB75 ,Active Status Bit 75" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB74 ,Active Status Bit 74" "Not active,Active" bitfld.long 0x00 9. " ASB73 ,Active Status Bit 73" "Not active,Active" bitfld.long 0x00 8. " ASB72 ,Active Status Bit 72" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB71 ,Active Status Bit 71" "Not active,Active" bitfld.long 0x00 6. " ASB70 ,Active Status Bit 70" "Not active,Active" bitfld.long 0x00 5. " ASB69 ,Active Status Bit 69" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB68 ,Active Status Bit 68" "Not active,Active" bitfld.long 0x00 3. " ASB67 ,Active Status Bit 67" "Not active,Active" bitfld.long 0x00 2. " ASB66 ,Active Status Bit 66" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB65 ,Active Status Bit 65" "Not active,Active" bitfld.long 0x00 0. " ASB64 ,Active Status Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_ICDABR2,Active Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" bitfld.long 0x00 31. " ASB127 ,Active Status Bit 127" "Not active,Active" bitfld.long 0x00 30. " ASB126 ,Active Status Bit 126" "Not active,Active" bitfld.long 0x00 29. " ASB125 ,Active Status Bit 125" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB124 ,Active Status Bit 124" "Not active,Active" bitfld.long 0x00 27. " ASB123 ,Active Status Bit 123" "Not active,Active" bitfld.long 0x00 26. " ASB122 ,Active Status Bit 122" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB121 ,Active Status Bit 121" "Not active,Active" bitfld.long 0x00 24. " ASB120 ,Active Status Bit 120" "Not active,Active" bitfld.long 0x00 23. " ASB119 ,Active Status Bit 119" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB118 ,Active Status Bit 118" "Not active,Active" bitfld.long 0x00 21. " ASB117 ,Active Status Bit 117" "Not active,Active" bitfld.long 0x00 20. " ASB116 ,Active Status Bit 116" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB115 ,Active Status Bit 115" "Not active,Active" bitfld.long 0x00 18. " ASB114 ,Active Status Bit 114" "Not active,Active" bitfld.long 0x00 17. " ASB113 ,Active Status Bit 113" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB112 ,Active Status Bit 112" "Not active,Active" bitfld.long 0x00 15. " ASB111 ,Active Status Bit 111" "Not active,Active" bitfld.long 0x00 14. " ASB110 ,Active Status Bit 110" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB109 ,Active Status Bit 109" "Not active,Active" bitfld.long 0x00 12. " ASB108 ,Active Status Bit 108" "Not active,Active" bitfld.long 0x00 11. " ASB107 ,Active Status Bit 107" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB106 ,Active Status Bit 106" "Not active,Active" bitfld.long 0x00 9. " ASB105 ,Active Status Bit 105" "Not active,Active" bitfld.long 0x00 8. " ASB104 ,Active Status Bit 104" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB103 ,Active Status Bit 103" "Not active,Active" bitfld.long 0x00 6. " ASB102 ,Active Status Bit 102" "Not active,Active" bitfld.long 0x00 5. " ASB101 ,Active Status Bit 101" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB100 ,Active Status Bit 100" "Not active,Active" bitfld.long 0x00 3. " ASB99 ,Active Status Bit 99" "Not active,Active" bitfld.long 0x00 2. " ASB98 ,Active Status Bit 98" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB97 ,Active Status Bit 97" "Not active,Active" bitfld.long 0x00 0. " ASB96 ,Active Status Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_ICDABR3,Active Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" bitfld.long 0x00 31. " ASB159 ,Active Status Bit 159" "Not active,Active" bitfld.long 0x00 30. " ASB158 ,Active Status Bit 158" "Not active,Active" bitfld.long 0x00 29. " ASB157 ,Active Status Bit 157" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB156 ,Active Status Bit 156" "Not active,Active" bitfld.long 0x00 27. " ASB155 ,Active Status Bit 155" "Not active,Active" bitfld.long 0x00 26. " ASB154 ,Active Status Bit 154" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB153 ,Active Status Bit 153" "Not active,Active" bitfld.long 0x00 24. " ASB152 ,Active Status Bit 152" "Not active,Active" bitfld.long 0x00 23. " ASB151 ,Active Status Bit 151" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB150 ,Active Status Bit 150" "Not active,Active" bitfld.long 0x00 21. " ASB149 ,Active Status Bit 149" "Not active,Active" bitfld.long 0x00 20. " ASB148 ,Active Status Bit 148" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB147 ,Active Status Bit 147" "Not active,Active" bitfld.long 0x00 18. " ASB146 ,Active Status Bit 146" "Not active,Active" bitfld.long 0x00 17. " ASB145 ,Active Status Bit 145" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB144 ,Active Status Bit 144" "Not active,Active" bitfld.long 0x00 15. " ASB143 ,Active Status Bit 143" "Not active,Active" bitfld.long 0x00 14. " ASB142 ,Active Status Bit 142" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB141 ,Active Status Bit 141" "Not active,Active" bitfld.long 0x00 12. " ASB140 ,Active Status Bit 140" "Not active,Active" bitfld.long 0x00 11. " ASB139 ,Active Status Bit 139" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB138 ,Active Status Bit 138" "Not active,Active" bitfld.long 0x00 9. " ASB137 ,Active Status Bit 137" "Not active,Active" bitfld.long 0x00 8. " ASB136 ,Active Status Bit 136" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB135 ,Active Status Bit 135" "Not active,Active" bitfld.long 0x00 6. " ASB134 ,Active Status Bit 134" "Not active,Active" bitfld.long 0x00 5. " ASB133 ,Active Status Bit 133" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB132 ,Active Status Bit 132" "Not active,Active" bitfld.long 0x00 3. " ASB131 ,Active Status Bit 131" "Not active,Active" bitfld.long 0x00 2. " ASB130 ,Active Status Bit 130" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB129 ,Active Status Bit 129" "Not active,Active" bitfld.long 0x00 0. " ASB128 ,Active Status Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_ICDABR4,Active Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" bitfld.long 0x00 31. " ASB191 ,Active Status Bit 191" "Not active,Active" bitfld.long 0x00 30. " ASB190 ,Active Status Bit 190" "Not active,Active" bitfld.long 0x00 29. " ASB189 ,Active Status Bit 189" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB188 ,Active Status Bit 188" "Not active,Active" bitfld.long 0x00 27. " ASB187 ,Active Status Bit 187" "Not active,Active" bitfld.long 0x00 26. " ASB186 ,Active Status Bit 186" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB185 ,Active Status Bit 185" "Not active,Active" bitfld.long 0x00 24. " ASB184 ,Active Status Bit 184" "Not active,Active" bitfld.long 0x00 23. " ASB183 ,Active Status Bit 183" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB182 ,Active Status Bit 182" "Not active,Active" bitfld.long 0x00 21. " ASB181 ,Active Status Bit 181" "Not active,Active" bitfld.long 0x00 20. " ASB180 ,Active Status Bit 180" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB179 ,Active Status Bit 179" "Not active,Active" bitfld.long 0x00 18. " ASB178 ,Active Status Bit 178" "Not active,Active" bitfld.long 0x00 17. " ASB177 ,Active Status Bit 177" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB176 ,Active Status Bit 176" "Not active,Active" bitfld.long 0x00 15. " ASB175 ,Active Status Bit 175" "Not active,Active" bitfld.long 0x00 14. " ASB174 ,Active Status Bit 174" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB173 ,Active Status Bit 173" "Not active,Active" bitfld.long 0x00 12. " ASB172 ,Active Status Bit 172" "Not active,Active" bitfld.long 0x00 11. " ASB171 ,Active Status Bit 171" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB170 ,Active Status Bit 170" "Not active,Active" bitfld.long 0x00 9. " ASB169 ,Active Status Bit 169" "Not active,Active" bitfld.long 0x00 8. " ASB168 ,Active Status Bit 168" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB167 ,Active Status Bit 167" "Not active,Active" bitfld.long 0x00 6. " ASB166 ,Active Status Bit 166" "Not active,Active" bitfld.long 0x00 5. " ASB165 ,Active Status Bit 165" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB164 ,Active Status Bit 164" "Not active,Active" bitfld.long 0x00 3. " ASB163 ,Active Status Bit 163" "Not active,Active" bitfld.long 0x00 2. " ASB162 ,Active Status Bit 162" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB161 ,Active Status Bit 161" "Not active,Active" bitfld.long 0x00 0. " ASB160 ,Active Status Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_ICDABR5,Active Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" bitfld.long 0x00 31. " ASB223 ,Active Status Bit 223" "Not active,Active" bitfld.long 0x00 30. " ASB222 ,Active Status Bit 222" "Not active,Active" bitfld.long 0x00 29. " ASB221 ,Active Status Bit 221" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB220 ,Active Status Bit 220" "Not active,Active" bitfld.long 0x00 27. " ASB219 ,Active Status Bit 219" "Not active,Active" bitfld.long 0x00 26. " ASB218 ,Active Status Bit 218" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB217 ,Active Status Bit 217" "Not active,Active" bitfld.long 0x00 24. " ASB216 ,Active Status Bit 216" "Not active,Active" bitfld.long 0x00 23. " ASB215 ,Active Status Bit 215" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB214 ,Active Status Bit 214" "Not active,Active" bitfld.long 0x00 21. " ASB213 ,Active Status Bit 213" "Not active,Active" bitfld.long 0x00 20. " ASB212 ,Active Status Bit 212" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB211 ,Active Status Bit 211" "Not active,Active" bitfld.long 0x00 18. " ASB210 ,Active Status Bit 210" "Not active,Active" bitfld.long 0x00 17. " ASB209 ,Active Status Bit 209" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB208 ,Active Status Bit 208" "Not active,Active" bitfld.long 0x00 15. " ASB207 ,Active Status Bit 207" "Not active,Active" bitfld.long 0x00 14. " ASB206 ,Active Status Bit 206" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB205 ,Active Status Bit 205" "Not active,Active" bitfld.long 0x00 12. " ASB204 ,Active Status Bit 204" "Not active,Active" bitfld.long 0x00 11. " ASB203 ,Active Status Bit 203" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB202 ,Active Status Bit 202" "Not active,Active" bitfld.long 0x00 9. " ASB201 ,Active Status Bit 201" "Not active,Active" bitfld.long 0x00 8. " ASB200 ,Active Status Bit 200" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB199 ,Active Status Bit 199" "Not active,Active" bitfld.long 0x00 6. " ASB198 ,Active Status Bit 198" "Not active,Active" bitfld.long 0x00 5. " ASB197 ,Active Status Bit 197" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB196 ,Active Status Bit 196" "Not active,Active" bitfld.long 0x00 3. " ASB195 ,Active Status Bit 195" "Not active,Active" bitfld.long 0x00 2. " ASB194 ,Active Status Bit 194" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB193 ,Active Status Bit 193" "Not active,Active" bitfld.long 0x00 0. " ASB192 ,Active Status Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_ICDABR6,Active Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" bitfld.long 0x00 31. " ASB255 ,Active Status Bit 255" "Not active,Active" bitfld.long 0x00 30. " ASB254 ,Active Status Bit 254" "Not active,Active" bitfld.long 0x00 29. " ASB253 ,Active Status Bit 253" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB252 ,Active Status Bit 252" "Not active,Active" bitfld.long 0x00 27. " ASB251 ,Active Status Bit 251" "Not active,Active" bitfld.long 0x00 26. " ASB250 ,Active Status Bit 250" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB249 ,Active Status Bit 249" "Not active,Active" bitfld.long 0x00 24. " ASB248 ,Active Status Bit 248" "Not active,Active" bitfld.long 0x00 23. " ASB247 ,Active Status Bit 247" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB246 ,Active Status Bit 246" "Not active,Active" bitfld.long 0x00 21. " ASB245 ,Active Status Bit 245" "Not active,Active" bitfld.long 0x00 20. " ASB244 ,Active Status Bit 244" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB243 ,Active Status Bit 243" "Not active,Active" bitfld.long 0x00 18. " ASB242 ,Active Status Bit 242" "Not active,Active" bitfld.long 0x00 17. " ASB241 ,Active Status Bit 241" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB240 ,Active Status Bit 240" "Not active,Active" bitfld.long 0x00 15. " ASB239 ,Active Status Bit 239" "Not active,Active" bitfld.long 0x00 14. " ASB238 ,Active Status Bit 238" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB237 ,Active Status Bit 237" "Not active,Active" bitfld.long 0x00 12. " ASB236 ,Active Status Bit 236" "Not active,Active" bitfld.long 0x00 11. " ASB235 ,Active Status Bit 235" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB234 ,Active Status Bit 234" "Not active,Active" bitfld.long 0x00 9. " ASB233 ,Active Status Bit 233" "Not active,Active" bitfld.long 0x00 8. " ASB232 ,Active Status Bit 232" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB231 ,Active Status Bit 231" "Not active,Active" bitfld.long 0x00 6. " ASB230 ,Active Status Bit 230" "Not active,Active" bitfld.long 0x00 5. " ASB229 ,Active Status Bit 229" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB228 ,Active Status Bit 228" "Not active,Active" bitfld.long 0x00 3. " ASB227 ,Active Status Bit 227" "Not active,Active" bitfld.long 0x00 2. " ASB226 ,Active Status Bit 226" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB225 ,Active Status Bit 225" "Not active,Active" bitfld.long 0x00 0. " ASB224 ,Active Status Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_ICDABR7,Active Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" bitfld.long 0x00 31. " ASB287 ,Active Status Bit 287" "Not active,Active" bitfld.long 0x00 30. " ASB286 ,Active Status Bit 286" "Not active,Active" bitfld.long 0x00 29. " ASB285 ,Active Status Bit 285" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB284 ,Active Status Bit 284" "Not active,Active" bitfld.long 0x00 27. " ASB283 ,Active Status Bit 283" "Not active,Active" bitfld.long 0x00 26. " ASB282 ,Active Status Bit 282" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB281 ,Active Status Bit 281" "Not active,Active" bitfld.long 0x00 24. " ASB280 ,Active Status Bit 280" "Not active,Active" bitfld.long 0x00 23. " ASB279 ,Active Status Bit 279" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB278 ,Active Status Bit 278" "Not active,Active" bitfld.long 0x00 21. " ASB277 ,Active Status Bit 277" "Not active,Active" bitfld.long 0x00 20. " ASB276 ,Active Status Bit 276" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB275 ,Active Status Bit 275" "Not active,Active" bitfld.long 0x00 18. " ASB274 ,Active Status Bit 274" "Not active,Active" bitfld.long 0x00 17. " ASB273 ,Active Status Bit 273" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB272 ,Active Status Bit 272" "Not active,Active" bitfld.long 0x00 15. " ASB271 ,Active Status Bit 271" "Not active,Active" bitfld.long 0x00 14. " ASB270 ,Active Status Bit 270" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB269 ,Active Status Bit 269" "Not active,Active" bitfld.long 0x00 12. " ASB268 ,Active Status Bit 268" "Not active,Active" bitfld.long 0x00 11. " ASB267 ,Active Status Bit 267" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB266 ,Active Status Bit 266" "Not active,Active" bitfld.long 0x00 9. " ASB265 ,Active Status Bit 265" "Not active,Active" bitfld.long 0x00 8. " ASB264 ,Active Status Bit 264" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB263 ,Active Status Bit 263" "Not active,Active" bitfld.long 0x00 6. " ASB262 ,Active Status Bit 262" "Not active,Active" bitfld.long 0x00 5. " ASB261 ,Active Status Bit 261" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB260 ,Active Status Bit 260" "Not active,Active" bitfld.long 0x00 3. " ASB259 ,Active Status Bit 259" "Not active,Active" bitfld.long 0x00 2. " ASB258 ,Active Status Bit 258" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB257 ,Active Status Bit 257" "Not active,Active" bitfld.long 0x00 0. " ASB256 ,Active Status Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_ICDABR8,Active Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" bitfld.long 0x00 31. " ASB319 ,Active Status Bit 319" "Not active,Active" bitfld.long 0x00 30. " ASB318 ,Active Status Bit 318" "Not active,Active" bitfld.long 0x00 29. " ASB317 ,Active Status Bit 317" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB316 ,Active Status Bit 316" "Not active,Active" bitfld.long 0x00 27. " ASB315 ,Active Status Bit 315" "Not active,Active" bitfld.long 0x00 26. " ASB314 ,Active Status Bit 314" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB313 ,Active Status Bit 313" "Not active,Active" bitfld.long 0x00 24. " ASB312 ,Active Status Bit 312" "Not active,Active" bitfld.long 0x00 23. " ASB311 ,Active Status Bit 311" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB310 ,Active Status Bit 310" "Not active,Active" bitfld.long 0x00 21. " ASB309 ,Active Status Bit 309" "Not active,Active" bitfld.long 0x00 20. " ASB308 ,Active Status Bit 308" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB307 ,Active Status Bit 307" "Not active,Active" bitfld.long 0x00 18. " ASB306 ,Active Status Bit 306" "Not active,Active" bitfld.long 0x00 17. " ASB305 ,Active Status Bit 305" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB304 ,Active Status Bit 304" "Not active,Active" bitfld.long 0x00 15. " ASB303 ,Active Status Bit 303" "Not active,Active" bitfld.long 0x00 14. " ASB302 ,Active Status Bit 302" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB301 ,Active Status Bit 301" "Not active,Active" bitfld.long 0x00 12. " ASB300 ,Active Status Bit 300" "Not active,Active" bitfld.long 0x00 11. " ASB299 ,Active Status Bit 299" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB298 ,Active Status Bit 298" "Not active,Active" bitfld.long 0x00 9. " ASB297 ,Active Status Bit 297" "Not active,Active" bitfld.long 0x00 8. " ASB296 ,Active Status Bit 296" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB295 ,Active Status Bit 295" "Not active,Active" bitfld.long 0x00 6. " ASB294 ,Active Status Bit 294" "Not active,Active" bitfld.long 0x00 5. " ASB293 ,Active Status Bit 293" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB292 ,Active Status Bit 292" "Not active,Active" bitfld.long 0x00 3. " ASB291 ,Active Status Bit 291" "Not active,Active" bitfld.long 0x00 2. " ASB290 ,Active Status Bit 290" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB289 ,Active Status Bit 289" "Not active,Active" bitfld.long 0x00 0. " ASB288 ,Active Status Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_ICDABR9,Active Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" bitfld.long 0x00 31. " ASB351 ,Active Status Bit 351" "Not active,Active" bitfld.long 0x00 30. " ASB350 ,Active Status Bit 350" "Not active,Active" bitfld.long 0x00 29. " ASB349 ,Active Status Bit 349" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB348 ,Active Status Bit 348" "Not active,Active" bitfld.long 0x00 27. " ASB347 ,Active Status Bit 347" "Not active,Active" bitfld.long 0x00 26. " ASB346 ,Active Status Bit 346" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB345 ,Active Status Bit 345" "Not active,Active" bitfld.long 0x00 24. " ASB344 ,Active Status Bit 344" "Not active,Active" bitfld.long 0x00 23. " ASB343 ,Active Status Bit 343" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB342 ,Active Status Bit 342" "Not active,Active" bitfld.long 0x00 21. " ASB341 ,Active Status Bit 341" "Not active,Active" bitfld.long 0x00 20. " ASB340 ,Active Status Bit 340" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB339 ,Active Status Bit 339" "Not active,Active" bitfld.long 0x00 18. " ASB338 ,Active Status Bit 338" "Not active,Active" bitfld.long 0x00 17. " ASB337 ,Active Status Bit 337" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB336 ,Active Status Bit 336" "Not active,Active" bitfld.long 0x00 15. " ASB335 ,Active Status Bit 335" "Not active,Active" bitfld.long 0x00 14. " ASB334 ,Active Status Bit 334" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB333 ,Active Status Bit 333" "Not active,Active" bitfld.long 0x00 12. " ASB332 ,Active Status Bit 332" "Not active,Active" bitfld.long 0x00 11. " ASB331 ,Active Status Bit 331" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB330 ,Active Status Bit 330" "Not active,Active" bitfld.long 0x00 9. " ASB329 ,Active Status Bit 329" "Not active,Active" bitfld.long 0x00 8. " ASB328 ,Active Status Bit 328" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB327 ,Active Status Bit 327" "Not active,Active" bitfld.long 0x00 6. " ASB326 ,Active Status Bit 326" "Not active,Active" bitfld.long 0x00 5. " ASB325 ,Active Status Bit 325" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB324 ,Active Status Bit 324" "Not active,Active" bitfld.long 0x00 3. " ASB323 ,Active Status Bit 323" "Not active,Active" bitfld.long 0x00 2. " ASB322 ,Active Status Bit 322" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB321 ,Active Status Bit 321" "Not active,Active" bitfld.long 0x00 0. " ASB320 ,Active Status Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_ICDABR10,Active Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" bitfld.long 0x00 31. " ASB383 ,Active Status Bit 383" "Not active,Active" bitfld.long 0x00 30. " ASB382 ,Active Status Bit 382" "Not active,Active" bitfld.long 0x00 29. " ASB381 ,Active Status Bit 381" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB380 ,Active Status Bit 380" "Not active,Active" bitfld.long 0x00 27. " ASB379 ,Active Status Bit 379" "Not active,Active" bitfld.long 0x00 26. " ASB378 ,Active Status Bit 378" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB377 ,Active Status Bit 377" "Not active,Active" bitfld.long 0x00 24. " ASB376 ,Active Status Bit 376" "Not active,Active" bitfld.long 0x00 23. " ASB375 ,Active Status Bit 375" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB374 ,Active Status Bit 374" "Not active,Active" bitfld.long 0x00 21. " ASB373 ,Active Status Bit 373" "Not active,Active" bitfld.long 0x00 20. " ASB372 ,Active Status Bit 372" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB371 ,Active Status Bit 371" "Not active,Active" bitfld.long 0x00 18. " ASB370 ,Active Status Bit 370" "Not active,Active" bitfld.long 0x00 17. " ASB369 ,Active Status Bit 369" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB368 ,Active Status Bit 368" "Not active,Active" bitfld.long 0x00 15. " ASB367 ,Active Status Bit 367" "Not active,Active" bitfld.long 0x00 14. " ASB366 ,Active Status Bit 366" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB365 ,Active Status Bit 365" "Not active,Active" bitfld.long 0x00 12. " ASB364 ,Active Status Bit 364" "Not active,Active" bitfld.long 0x00 11. " ASB363 ,Active Status Bit 363" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB362 ,Active Status Bit 362" "Not active,Active" bitfld.long 0x00 9. " ASB361 ,Active Status Bit 361" "Not active,Active" bitfld.long 0x00 8. " ASB360 ,Active Status Bit 360" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB359 ,Active Status Bit 359" "Not active,Active" bitfld.long 0x00 6. " ASB358 ,Active Status Bit 358" "Not active,Active" bitfld.long 0x00 5. " ASB357 ,Active Status Bit 357" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB356 ,Active Status Bit 356" "Not active,Active" bitfld.long 0x00 3. " ASB355 ,Active Status Bit 355" "Not active,Active" bitfld.long 0x00 2. " ASB354 ,Active Status Bit 354" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB353 ,Active Status Bit 353" "Not active,Active" bitfld.long 0x00 0. " ASB352 ,Active Status Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_ICDABR11,Active Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" bitfld.long 0x00 31. " ASB415 ,Active Status Bit 415" "Not active,Active" bitfld.long 0x00 30. " ASB414 ,Active Status Bit 414" "Not active,Active" bitfld.long 0x00 29. " ASB413 ,Active Status Bit 413" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB412 ,Active Status Bit 412" "Not active,Active" bitfld.long 0x00 27. " ASB411 ,Active Status Bit 411" "Not active,Active" bitfld.long 0x00 26. " ASB410 ,Active Status Bit 410" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB409 ,Active Status Bit 409" "Not active,Active" bitfld.long 0x00 24. " ASB408 ,Active Status Bit 408" "Not active,Active" bitfld.long 0x00 23. " ASB407 ,Active Status Bit 407" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB406 ,Active Status Bit 406" "Not active,Active" bitfld.long 0x00 21. " ASB405 ,Active Status Bit 405" "Not active,Active" bitfld.long 0x00 20. " ASB404 ,Active Status Bit 404" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB403 ,Active Status Bit 403" "Not active,Active" bitfld.long 0x00 18. " ASB402 ,Active Status Bit 402" "Not active,Active" bitfld.long 0x00 17. " ASB401 ,Active Status Bit 401" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB400 ,Active Status Bit 400" "Not active,Active" bitfld.long 0x00 15. " ASB399 ,Active Status Bit 399" "Not active,Active" bitfld.long 0x00 14. " ASB398 ,Active Status Bit 398" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB397 ,Active Status Bit 397" "Not active,Active" bitfld.long 0x00 12. " ASB396 ,Active Status Bit 396" "Not active,Active" bitfld.long 0x00 11. " ASB395 ,Active Status Bit 395" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB394 ,Active Status Bit 394" "Not active,Active" bitfld.long 0x00 9. " ASB393 ,Active Status Bit 393" "Not active,Active" bitfld.long 0x00 8. " ASB392 ,Active Status Bit 392" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB391 ,Active Status Bit 391" "Not active,Active" bitfld.long 0x00 6. " ASB390 ,Active Status Bit 390" "Not active,Active" bitfld.long 0x00 5. " ASB389 ,Active Status Bit 389" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB388 ,Active Status Bit 388" "Not active,Active" bitfld.long 0x00 3. " ASB387 ,Active Status Bit 387" "Not active,Active" bitfld.long 0x00 2. " ASB386 ,Active Status Bit 386" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB385 ,Active Status Bit 385" "Not active,Active" bitfld.long 0x00 0. " ASB384 ,Active Status Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_ICDABR12,Active Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" bitfld.long 0x00 31. " ASB447 ,Active Status Bit 447" "Not active,Active" bitfld.long 0x00 30. " ASB446 ,Active Status Bit 446" "Not active,Active" bitfld.long 0x00 29. " ASB445 ,Active Status Bit 445" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB444 ,Active Status Bit 444" "Not active,Active" bitfld.long 0x00 27. " ASB443 ,Active Status Bit 443" "Not active,Active" bitfld.long 0x00 26. " ASB442 ,Active Status Bit 442" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB441 ,Active Status Bit 441" "Not active,Active" bitfld.long 0x00 24. " ASB440 ,Active Status Bit 440" "Not active,Active" bitfld.long 0x00 23. " ASB439 ,Active Status Bit 439" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB438 ,Active Status Bit 438" "Not active,Active" bitfld.long 0x00 21. " ASB437 ,Active Status Bit 437" "Not active,Active" bitfld.long 0x00 20. " ASB436 ,Active Status Bit 436" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB435 ,Active Status Bit 435" "Not active,Active" bitfld.long 0x00 18. " ASB434 ,Active Status Bit 434" "Not active,Active" bitfld.long 0x00 17. " ASB433 ,Active Status Bit 433" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB432 ,Active Status Bit 432" "Not active,Active" bitfld.long 0x00 15. " ASB431 ,Active Status Bit 431" "Not active,Active" bitfld.long 0x00 14. " ASB430 ,Active Status Bit 430" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB429 ,Active Status Bit 429" "Not active,Active" bitfld.long 0x00 12. " ASB428 ,Active Status Bit 428" "Not active,Active" bitfld.long 0x00 11. " ASB427 ,Active Status Bit 427" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB426 ,Active Status Bit 426" "Not active,Active" bitfld.long 0x00 9. " ASB425 ,Active Status Bit 425" "Not active,Active" bitfld.long 0x00 8. " ASB424 ,Active Status Bit 424" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB423 ,Active Status Bit 423" "Not active,Active" bitfld.long 0x00 6. " ASB422 ,Active Status Bit 422" "Not active,Active" bitfld.long 0x00 5. " ASB421 ,Active Status Bit 421" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB420 ,Active Status Bit 420" "Not active,Active" bitfld.long 0x00 3. " ASB419 ,Active Status Bit 419" "Not active,Active" bitfld.long 0x00 2. " ASB418 ,Active Status Bit 418" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB417 ,Active Status Bit 417" "Not active,Active" bitfld.long 0x00 0. " ASB416 ,Active Status Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_ICDABR13,Active Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" bitfld.long 0x00 31. " ASB479 ,Active Status Bit 479" "Not active,Active" bitfld.long 0x00 30. " ASB478 ,Active Status Bit 478" "Not active,Active" bitfld.long 0x00 29. " ASB477 ,Active Status Bit 477" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB476 ,Active Status Bit 476" "Not active,Active" bitfld.long 0x00 27. " ASB475 ,Active Status Bit 475" "Not active,Active" bitfld.long 0x00 26. " ASB474 ,Active Status Bit 474" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB473 ,Active Status Bit 473" "Not active,Active" bitfld.long 0x00 24. " ASB472 ,Active Status Bit 472" "Not active,Active" bitfld.long 0x00 23. " ASB471 ,Active Status Bit 471" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB470 ,Active Status Bit 470" "Not active,Active" bitfld.long 0x00 21. " ASB469 ,Active Status Bit 469" "Not active,Active" bitfld.long 0x00 20. " ASB468 ,Active Status Bit 468" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB467 ,Active Status Bit 467" "Not active,Active" bitfld.long 0x00 18. " ASB466 ,Active Status Bit 466" "Not active,Active" bitfld.long 0x00 17. " ASB465 ,Active Status Bit 465" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB464 ,Active Status Bit 464" "Not active,Active" bitfld.long 0x00 15. " ASB463 ,Active Status Bit 463" "Not active,Active" bitfld.long 0x00 14. " ASB462 ,Active Status Bit 462" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB461 ,Active Status Bit 461" "Not active,Active" bitfld.long 0x00 12. " ASB460 ,Active Status Bit 460" "Not active,Active" bitfld.long 0x00 11. " ASB459 ,Active Status Bit 459" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB458 ,Active Status Bit 458" "Not active,Active" bitfld.long 0x00 9. " ASB457 ,Active Status Bit 457" "Not active,Active" bitfld.long 0x00 8. " ASB456 ,Active Status Bit 456" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB455 ,Active Status Bit 455" "Not active,Active" bitfld.long 0x00 6. " ASB454 ,Active Status Bit 454" "Not active,Active" bitfld.long 0x00 5. " ASB453 ,Active Status Bit 453" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB452 ,Active Status Bit 452" "Not active,Active" bitfld.long 0x00 3. " ASB451 ,Active Status Bit 451" "Not active,Active" bitfld.long 0x00 2. " ASB450 ,Active Status Bit 450" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB449 ,Active Status Bit 449" "Not active,Active" bitfld.long 0x00 0. " ASB448 ,Active Status Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_ICDABR14,Active Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" bitfld.long 0x00 31. " ASB511 ,Active Status Bit 511" "Not active,Active" bitfld.long 0x00 30. " ASB510 ,Active Status Bit 510" "Not active,Active" bitfld.long 0x00 29. " ASB509 ,Active Status Bit 509" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB508 ,Active Status Bit 508" "Not active,Active" bitfld.long 0x00 27. " ASB507 ,Active Status Bit 507" "Not active,Active" bitfld.long 0x00 26. " ASB506 ,Active Status Bit 506" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB505 ,Active Status Bit 505" "Not active,Active" bitfld.long 0x00 24. " ASB504 ,Active Status Bit 504" "Not active,Active" bitfld.long 0x00 23. " ASB503 ,Active Status Bit 503" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB502 ,Active Status Bit 502" "Not active,Active" bitfld.long 0x00 21. " ASB501 ,Active Status Bit 501" "Not active,Active" bitfld.long 0x00 20. " ASB500 ,Active Status Bit 500" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB499 ,Active Status Bit 499" "Not active,Active" bitfld.long 0x00 18. " ASB498 ,Active Status Bit 498" "Not active,Active" bitfld.long 0x00 17. " ASB497 ,Active Status Bit 497" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB496 ,Active Status Bit 496" "Not active,Active" bitfld.long 0x00 15. " ASB495 ,Active Status Bit 495" "Not active,Active" bitfld.long 0x00 14. " ASB494 ,Active Status Bit 494" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB493 ,Active Status Bit 493" "Not active,Active" bitfld.long 0x00 12. " ASB492 ,Active Status Bit 492" "Not active,Active" bitfld.long 0x00 11. " ASB491 ,Active Status Bit 491" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB490 ,Active Status Bit 490" "Not active,Active" bitfld.long 0x00 9. " ASB489 ,Active Status Bit 489" "Not active,Active" bitfld.long 0x00 8. " ASB488 ,Active Status Bit 488" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB487 ,Active Status Bit 487" "Not active,Active" bitfld.long 0x00 6. " ASB486 ,Active Status Bit 486" "Not active,Active" bitfld.long 0x00 5. " ASB485 ,Active Status Bit 485" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB484 ,Active Status Bit 484" "Not active,Active" bitfld.long 0x00 3. " ASB483 ,Active Status Bit 483" "Not active,Active" bitfld.long 0x00 2. " ASB482 ,Active Status Bit 482" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB481 ,Active Status Bit 481" "Not active,Active" bitfld.long 0x00 0. " ASB480 ,Active Status Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_ICDABR15,Active Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" bitfld.long 0x00 31. " ASB543 ,Active Status Bit 543" "Not active,Active" bitfld.long 0x00 30. " ASB542 ,Active Status Bit 542" "Not active,Active" bitfld.long 0x00 29. " ASB541 ,Active Status Bit 541" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB540 ,Active Status Bit 540" "Not active,Active" bitfld.long 0x00 27. " ASB539 ,Active Status Bit 539" "Not active,Active" bitfld.long 0x00 26. " ASB538 ,Active Status Bit 538" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB537 ,Active Status Bit 537" "Not active,Active" bitfld.long 0x00 24. " ASB536 ,Active Status Bit 536" "Not active,Active" bitfld.long 0x00 23. " ASB535 ,Active Status Bit 535" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB534 ,Active Status Bit 534" "Not active,Active" bitfld.long 0x00 21. " ASB533 ,Active Status Bit 533" "Not active,Active" bitfld.long 0x00 20. " ASB532 ,Active Status Bit 532" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB531 ,Active Status Bit 531" "Not active,Active" bitfld.long 0x00 18. " ASB530 ,Active Status Bit 530" "Not active,Active" bitfld.long 0x00 17. " ASB529 ,Active Status Bit 529" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB528 ,Active Status Bit 528" "Not active,Active" bitfld.long 0x00 15. " ASB527 ,Active Status Bit 527" "Not active,Active" bitfld.long 0x00 14. " ASB526 ,Active Status Bit 526" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB525 ,Active Status Bit 525" "Not active,Active" bitfld.long 0x00 12. " ASB524 ,Active Status Bit 524" "Not active,Active" bitfld.long 0x00 11. " ASB523 ,Active Status Bit 523" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB522 ,Active Status Bit 522" "Not active,Active" bitfld.long 0x00 9. " ASB521 ,Active Status Bit 521" "Not active,Active" bitfld.long 0x00 8. " ASB520 ,Active Status Bit 520" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB519 ,Active Status Bit 519" "Not active,Active" bitfld.long 0x00 6. " ASB518 ,Active Status Bit 518" "Not active,Active" bitfld.long 0x00 5. " ASB517 ,Active Status Bit 517" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB516 ,Active Status Bit 516" "Not active,Active" bitfld.long 0x00 3. " ASB515 ,Active Status Bit 515" "Not active,Active" bitfld.long 0x00 2. " ASB514 ,Active Status Bit 514" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB513 ,Active Status Bit 513" "Not active,Active" bitfld.long 0x00 0. " ASB512 ,Active Status Bit 512" "Not active,Active" else rgroup.long 0x0340++0x03 line.long 0x0 "GICD_ICDABR16,Active Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" bitfld.long 0x00 31. " ASB575 ,Active Status Bit 575" "Not active,Active" bitfld.long 0x00 30. " ASB574 ,Active Status Bit 574" "Not active,Active" bitfld.long 0x00 29. " ASB573 ,Active Status Bit 573" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB572 ,Active Status Bit 572" "Not active,Active" bitfld.long 0x00 27. " ASB571 ,Active Status Bit 571" "Not active,Active" bitfld.long 0x00 26. " ASB570 ,Active Status Bit 570" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB569 ,Active Status Bit 569" "Not active,Active" bitfld.long 0x00 24. " ASB568 ,Active Status Bit 568" "Not active,Active" bitfld.long 0x00 23. " ASB567 ,Active Status Bit 567" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB566 ,Active Status Bit 566" "Not active,Active" bitfld.long 0x00 21. " ASB565 ,Active Status Bit 565" "Not active,Active" bitfld.long 0x00 20. " ASB564 ,Active Status Bit 564" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB563 ,Active Status Bit 563" "Not active,Active" bitfld.long 0x00 18. " ASB562 ,Active Status Bit 562" "Not active,Active" bitfld.long 0x00 17. " ASB561 ,Active Status Bit 561" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB560 ,Active Status Bit 560" "Not active,Active" bitfld.long 0x00 15. " ASB559 ,Active Status Bit 559" "Not active,Active" bitfld.long 0x00 14. " ASB558 ,Active Status Bit 558" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB557 ,Active Status Bit 557" "Not active,Active" bitfld.long 0x00 12. " ASB556 ,Active Status Bit 556" "Not active,Active" bitfld.long 0x00 11. " ASB555 ,Active Status Bit 555" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB554 ,Active Status Bit 554" "Not active,Active" bitfld.long 0x00 9. " ASB553 ,Active Status Bit 553" "Not active,Active" bitfld.long 0x00 8. " ASB552 ,Active Status Bit 552" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB551 ,Active Status Bit 551" "Not active,Active" bitfld.long 0x00 6. " ASB550 ,Active Status Bit 550" "Not active,Active" bitfld.long 0x00 5. " ASB549 ,Active Status Bit 549" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB548 ,Active Status Bit 548" "Not active,Active" bitfld.long 0x00 3. " ASB547 ,Active Status Bit 547" "Not active,Active" bitfld.long 0x00 2. " ASB546 ,Active Status Bit 546" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB545 ,Active Status Bit 545" "Not active,Active" bitfld.long 0x00 0. " ASB544 ,Active Status Bit 544" "Not active,Active" else rgroup.long 0x0344++0x03 line.long 0x0 "GICD_ICDABR17,Active Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" bitfld.long 0x00 31. " ASB607 ,Active Status Bit 607" "Not active,Active" bitfld.long 0x00 30. " ASB606 ,Active Status Bit 606" "Not active,Active" bitfld.long 0x00 29. " ASB605 ,Active Status Bit 605" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB604 ,Active Status Bit 604" "Not active,Active" bitfld.long 0x00 27. " ASB603 ,Active Status Bit 603" "Not active,Active" bitfld.long 0x00 26. " ASB602 ,Active Status Bit 602" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB601 ,Active Status Bit 601" "Not active,Active" bitfld.long 0x00 24. " ASB600 ,Active Status Bit 600" "Not active,Active" bitfld.long 0x00 23. " ASB599 ,Active Status Bit 599" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB598 ,Active Status Bit 598" "Not active,Active" bitfld.long 0x00 21. " ASB597 ,Active Status Bit 597" "Not active,Active" bitfld.long 0x00 20. " ASB596 ,Active Status Bit 596" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB595 ,Active Status Bit 595" "Not active,Active" bitfld.long 0x00 18. " ASB594 ,Active Status Bit 594" "Not active,Active" bitfld.long 0x00 17. " ASB593 ,Active Status Bit 593" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB592 ,Active Status Bit 592" "Not active,Active" bitfld.long 0x00 15. " ASB591 ,Active Status Bit 591" "Not active,Active" bitfld.long 0x00 14. " ASB590 ,Active Status Bit 590" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB589 ,Active Status Bit 589" "Not active,Active" bitfld.long 0x00 12. " ASB588 ,Active Status Bit 588" "Not active,Active" bitfld.long 0x00 11. " ASB587 ,Active Status Bit 587" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB586 ,Active Status Bit 586" "Not active,Active" bitfld.long 0x00 9. " ASB585 ,Active Status Bit 585" "Not active,Active" bitfld.long 0x00 8. " ASB584 ,Active Status Bit 584" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB583 ,Active Status Bit 583" "Not active,Active" bitfld.long 0x00 6. " ASB582 ,Active Status Bit 582" "Not active,Active" bitfld.long 0x00 5. " ASB581 ,Active Status Bit 581" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB580 ,Active Status Bit 580" "Not active,Active" bitfld.long 0x00 3. " ASB579 ,Active Status Bit 579" "Not active,Active" bitfld.long 0x00 2. " ASB578 ,Active Status Bit 578" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB577 ,Active Status Bit 577" "Not active,Active" bitfld.long 0x00 0. " ASB576 ,Active Status Bit 576" "Not active,Active" else rgroup.long 0x0348++0x03 line.long 0x0 "GICD_ICDABR18,Active Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" bitfld.long 0x00 31. " ASB639 ,Active Status Bit 639" "Not active,Active" bitfld.long 0x00 30. " ASB638 ,Active Status Bit 638" "Not active,Active" bitfld.long 0x00 29. " ASB637 ,Active Status Bit 637" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB636 ,Active Status Bit 636" "Not active,Active" bitfld.long 0x00 27. " ASB635 ,Active Status Bit 635" "Not active,Active" bitfld.long 0x00 26. " ASB634 ,Active Status Bit 634" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB633 ,Active Status Bit 633" "Not active,Active" bitfld.long 0x00 24. " ASB632 ,Active Status Bit 632" "Not active,Active" bitfld.long 0x00 23. " ASB631 ,Active Status Bit 631" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB630 ,Active Status Bit 630" "Not active,Active" bitfld.long 0x00 21. " ASB629 ,Active Status Bit 629" "Not active,Active" bitfld.long 0x00 20. " ASB628 ,Active Status Bit 628" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB627 ,Active Status Bit 627" "Not active,Active" bitfld.long 0x00 18. " ASB626 ,Active Status Bit 626" "Not active,Active" bitfld.long 0x00 17. " ASB625 ,Active Status Bit 625" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB624 ,Active Status Bit 624" "Not active,Active" bitfld.long 0x00 15. " ASB623 ,Active Status Bit 623" "Not active,Active" bitfld.long 0x00 14. " ASB622 ,Active Status Bit 622" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB621 ,Active Status Bit 621" "Not active,Active" bitfld.long 0x00 12. " ASB620 ,Active Status Bit 620" "Not active,Active" bitfld.long 0x00 11. " ASB619 ,Active Status Bit 619" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB618 ,Active Status Bit 618" "Not active,Active" bitfld.long 0x00 9. " ASB617 ,Active Status Bit 617" "Not active,Active" bitfld.long 0x00 8. " ASB616 ,Active Status Bit 616" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB615 ,Active Status Bit 615" "Not active,Active" bitfld.long 0x00 6. " ASB614 ,Active Status Bit 614" "Not active,Active" bitfld.long 0x00 5. " ASB613 ,Active Status Bit 613" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB612 ,Active Status Bit 612" "Not active,Active" bitfld.long 0x00 3. " ASB611 ,Active Status Bit 611" "Not active,Active" bitfld.long 0x00 2. " ASB610 ,Active Status Bit 610" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB609 ,Active Status Bit 609" "Not active,Active" bitfld.long 0x00 0. " ASB608 ,Active Status Bit 608" "Not active,Active" else rgroup.long 0x034C++0x03 line.long 0x0 "GICD_ICDABR19,Active Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" bitfld.long 0x00 31. " ASB671 ,Active Status Bit 671" "Not active,Active" bitfld.long 0x00 30. " ASB670 ,Active Status Bit 670" "Not active,Active" bitfld.long 0x00 29. " ASB669 ,Active Status Bit 669" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB668 ,Active Status Bit 668" "Not active,Active" bitfld.long 0x00 27. " ASB667 ,Active Status Bit 667" "Not active,Active" bitfld.long 0x00 26. " ASB666 ,Active Status Bit 666" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB665 ,Active Status Bit 665" "Not active,Active" bitfld.long 0x00 24. " ASB664 ,Active Status Bit 664" "Not active,Active" bitfld.long 0x00 23. " ASB663 ,Active Status Bit 663" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB662 ,Active Status Bit 662" "Not active,Active" bitfld.long 0x00 21. " ASB661 ,Active Status Bit 661" "Not active,Active" bitfld.long 0x00 20. " ASB660 ,Active Status Bit 660" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB659 ,Active Status Bit 659" "Not active,Active" bitfld.long 0x00 18. " ASB658 ,Active Status Bit 658" "Not active,Active" bitfld.long 0x00 17. " ASB657 ,Active Status Bit 657" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB656 ,Active Status Bit 656" "Not active,Active" bitfld.long 0x00 15. " ASB655 ,Active Status Bit 655" "Not active,Active" bitfld.long 0x00 14. " ASB654 ,Active Status Bit 654" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB653 ,Active Status Bit 653" "Not active,Active" bitfld.long 0x00 12. " ASB652 ,Active Status Bit 652" "Not active,Active" bitfld.long 0x00 11. " ASB651 ,Active Status Bit 651" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB650 ,Active Status Bit 650" "Not active,Active" bitfld.long 0x00 9. " ASB649 ,Active Status Bit 649" "Not active,Active" bitfld.long 0x00 8. " ASB648 ,Active Status Bit 648" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB647 ,Active Status Bit 647" "Not active,Active" bitfld.long 0x00 6. " ASB646 ,Active Status Bit 646" "Not active,Active" bitfld.long 0x00 5. " ASB645 ,Active Status Bit 645" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB644 ,Active Status Bit 644" "Not active,Active" bitfld.long 0x00 3. " ASB643 ,Active Status Bit 643" "Not active,Active" bitfld.long 0x00 2. " ASB642 ,Active Status Bit 642" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB641 ,Active Status Bit 641" "Not active,Active" bitfld.long 0x00 0. " ASB640 ,Active Status Bit 640" "Not active,Active" else rgroup.long 0x0350++0x03 line.long 0x0 "GICD_ICDABR20,Active Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" bitfld.long 0x00 31. " ASB703 ,Active Status Bit 703" "Not active,Active" bitfld.long 0x00 30. " ASB702 ,Active Status Bit 702" "Not active,Active" bitfld.long 0x00 29. " ASB701 ,Active Status Bit 701" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB700 ,Active Status Bit 700" "Not active,Active" bitfld.long 0x00 27. " ASB699 ,Active Status Bit 699" "Not active,Active" bitfld.long 0x00 26. " ASB698 ,Active Status Bit 698" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB697 ,Active Status Bit 697" "Not active,Active" bitfld.long 0x00 24. " ASB696 ,Active Status Bit 696" "Not active,Active" bitfld.long 0x00 23. " ASB695 ,Active Status Bit 695" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB694 ,Active Status Bit 694" "Not active,Active" bitfld.long 0x00 21. " ASB693 ,Active Status Bit 693" "Not active,Active" bitfld.long 0x00 20. " ASB692 ,Active Status Bit 692" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB691 ,Active Status Bit 691" "Not active,Active" bitfld.long 0x00 18. " ASB690 ,Active Status Bit 690" "Not active,Active" bitfld.long 0x00 17. " ASB689 ,Active Status Bit 689" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB688 ,Active Status Bit 688" "Not active,Active" bitfld.long 0x00 15. " ASB687 ,Active Status Bit 687" "Not active,Active" bitfld.long 0x00 14. " ASB686 ,Active Status Bit 686" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB685 ,Active Status Bit 685" "Not active,Active" bitfld.long 0x00 12. " ASB684 ,Active Status Bit 684" "Not active,Active" bitfld.long 0x00 11. " ASB683 ,Active Status Bit 683" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB682 ,Active Status Bit 682" "Not active,Active" bitfld.long 0x00 9. " ASB681 ,Active Status Bit 681" "Not active,Active" bitfld.long 0x00 8. " ASB680 ,Active Status Bit 680" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB679 ,Active Status Bit 679" "Not active,Active" bitfld.long 0x00 6. " ASB678 ,Active Status Bit 678" "Not active,Active" bitfld.long 0x00 5. " ASB677 ,Active Status Bit 677" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB676 ,Active Status Bit 676" "Not active,Active" bitfld.long 0x00 3. " ASB675 ,Active Status Bit 675" "Not active,Active" bitfld.long 0x00 2. " ASB674 ,Active Status Bit 674" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB673 ,Active Status Bit 673" "Not active,Active" bitfld.long 0x00 0. " ASB672 ,Active Status Bit 672" "Not active,Active" else rgroup.long 0x0354++0x03 line.long 0x0 "GICD_ICDABR21,Active Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" bitfld.long 0x00 31. " ASB735 ,Active Status Bit 735" "Not active,Active" bitfld.long 0x00 30. " ASB734 ,Active Status Bit 734" "Not active,Active" bitfld.long 0x00 29. " ASB733 ,Active Status Bit 733" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB732 ,Active Status Bit 732" "Not active,Active" bitfld.long 0x00 27. " ASB731 ,Active Status Bit 731" "Not active,Active" bitfld.long 0x00 26. " ASB730 ,Active Status Bit 730" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB729 ,Active Status Bit 729" "Not active,Active" bitfld.long 0x00 24. " ASB728 ,Active Status Bit 728" "Not active,Active" bitfld.long 0x00 23. " ASB727 ,Active Status Bit 727" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB726 ,Active Status Bit 726" "Not active,Active" bitfld.long 0x00 21. " ASB725 ,Active Status Bit 725" "Not active,Active" bitfld.long 0x00 20. " ASB724 ,Active Status Bit 724" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB723 ,Active Status Bit 723" "Not active,Active" bitfld.long 0x00 18. " ASB722 ,Active Status Bit 722" "Not active,Active" bitfld.long 0x00 17. " ASB721 ,Active Status Bit 721" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB720 ,Active Status Bit 720" "Not active,Active" bitfld.long 0x00 15. " ASB719 ,Active Status Bit 719" "Not active,Active" bitfld.long 0x00 14. " ASB718 ,Active Status Bit 718" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB717 ,Active Status Bit 717" "Not active,Active" bitfld.long 0x00 12. " ASB716 ,Active Status Bit 716" "Not active,Active" bitfld.long 0x00 11. " ASB715 ,Active Status Bit 715" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB714 ,Active Status Bit 714" "Not active,Active" bitfld.long 0x00 9. " ASB713 ,Active Status Bit 713" "Not active,Active" bitfld.long 0x00 8. " ASB712 ,Active Status Bit 712" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB711 ,Active Status Bit 711" "Not active,Active" bitfld.long 0x00 6. " ASB710 ,Active Status Bit 710" "Not active,Active" bitfld.long 0x00 5. " ASB709 ,Active Status Bit 709" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB708 ,Active Status Bit 708" "Not active,Active" bitfld.long 0x00 3. " ASB707 ,Active Status Bit 707" "Not active,Active" bitfld.long 0x00 2. " ASB706 ,Active Status Bit 706" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB705 ,Active Status Bit 705" "Not active,Active" bitfld.long 0x00 0. " ASB704 ,Active Status Bit 704" "Not active,Active" else rgroup.long 0x0358++0x03 line.long 0x0 "GICD_ICDABR22,Active Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" bitfld.long 0x00 31. " ASB767 ,Active Status Bit 767" "Not active,Active" bitfld.long 0x00 30. " ASB766 ,Active Status Bit 766" "Not active,Active" bitfld.long 0x00 29. " ASB765 ,Active Status Bit 765" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB764 ,Active Status Bit 764" "Not active,Active" bitfld.long 0x00 27. " ASB763 ,Active Status Bit 763" "Not active,Active" bitfld.long 0x00 26. " ASB762 ,Active Status Bit 762" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB761 ,Active Status Bit 761" "Not active,Active" bitfld.long 0x00 24. " ASB760 ,Active Status Bit 760" "Not active,Active" bitfld.long 0x00 23. " ASB759 ,Active Status Bit 759" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB758 ,Active Status Bit 758" "Not active,Active" bitfld.long 0x00 21. " ASB757 ,Active Status Bit 757" "Not active,Active" bitfld.long 0x00 20. " ASB756 ,Active Status Bit 756" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB755 ,Active Status Bit 755" "Not active,Active" bitfld.long 0x00 18. " ASB754 ,Active Status Bit 754" "Not active,Active" bitfld.long 0x00 17. " ASB753 ,Active Status Bit 753" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB752 ,Active Status Bit 752" "Not active,Active" bitfld.long 0x00 15. " ASB751 ,Active Status Bit 751" "Not active,Active" bitfld.long 0x00 14. " ASB750 ,Active Status Bit 750" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB749 ,Active Status Bit 749" "Not active,Active" bitfld.long 0x00 12. " ASB748 ,Active Status Bit 748" "Not active,Active" bitfld.long 0x00 11. " ASB747 ,Active Status Bit 747" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB746 ,Active Status Bit 746" "Not active,Active" bitfld.long 0x00 9. " ASB745 ,Active Status Bit 745" "Not active,Active" bitfld.long 0x00 8. " ASB744 ,Active Status Bit 744" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB743 ,Active Status Bit 743" "Not active,Active" bitfld.long 0x00 6. " ASB742 ,Active Status Bit 742" "Not active,Active" bitfld.long 0x00 5. " ASB741 ,Active Status Bit 741" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB740 ,Active Status Bit 740" "Not active,Active" bitfld.long 0x00 3. " ASB739 ,Active Status Bit 739" "Not active,Active" bitfld.long 0x00 2. " ASB738 ,Active Status Bit 738" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB737 ,Active Status Bit 737" "Not active,Active" bitfld.long 0x00 0. " ASB736 ,Active Status Bit 736" "Not active,Active" else rgroup.long 0x035C++0x03 line.long 0x0 "GICD_ICDABR23,Active Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" bitfld.long 0x00 31. " ASB799 ,Active Status Bit 799" "Not active,Active" bitfld.long 0x00 30. " ASB798 ,Active Status Bit 798" "Not active,Active" bitfld.long 0x00 29. " ASB797 ,Active Status Bit 797" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB796 ,Active Status Bit 796" "Not active,Active" bitfld.long 0x00 27. " ASB795 ,Active Status Bit 795" "Not active,Active" bitfld.long 0x00 26. " ASB794 ,Active Status Bit 794" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB793 ,Active Status Bit 793" "Not active,Active" bitfld.long 0x00 24. " ASB792 ,Active Status Bit 792" "Not active,Active" bitfld.long 0x00 23. " ASB791 ,Active Status Bit 791" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB790 ,Active Status Bit 790" "Not active,Active" bitfld.long 0x00 21. " ASB789 ,Active Status Bit 789" "Not active,Active" bitfld.long 0x00 20. " ASB788 ,Active Status Bit 788" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB787 ,Active Status Bit 787" "Not active,Active" bitfld.long 0x00 18. " ASB786 ,Active Status Bit 786" "Not active,Active" bitfld.long 0x00 17. " ASB785 ,Active Status Bit 785" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB784 ,Active Status Bit 784" "Not active,Active" bitfld.long 0x00 15. " ASB783 ,Active Status Bit 783" "Not active,Active" bitfld.long 0x00 14. " ASB782 ,Active Status Bit 782" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB781 ,Active Status Bit 781" "Not active,Active" bitfld.long 0x00 12. " ASB780 ,Active Status Bit 780" "Not active,Active" bitfld.long 0x00 11. " ASB779 ,Active Status Bit 779" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB778 ,Active Status Bit 778" "Not active,Active" bitfld.long 0x00 9. " ASB777 ,Active Status Bit 777" "Not active,Active" bitfld.long 0x00 8. " ASB776 ,Active Status Bit 776" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB775 ,Active Status Bit 775" "Not active,Active" bitfld.long 0x00 6. " ASB774 ,Active Status Bit 774" "Not active,Active" bitfld.long 0x00 5. " ASB773 ,Active Status Bit 773" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB772 ,Active Status Bit 772" "Not active,Active" bitfld.long 0x00 3. " ASB771 ,Active Status Bit 771" "Not active,Active" bitfld.long 0x00 2. " ASB770 ,Active Status Bit 770" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB769 ,Active Status Bit 769" "Not active,Active" bitfld.long 0x00 0. " ASB768 ,Active Status Bit 768" "Not active,Active" else rgroup.long 0x0360++0x03 line.long 0x0 "GICD_ICDABR24,Active Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" bitfld.long 0x00 31. " ASB831 ,Active Status Bit 831" "Not active,Active" bitfld.long 0x00 30. " ASB830 ,Active Status Bit 830" "Not active,Active" bitfld.long 0x00 29. " ASB829 ,Active Status Bit 829" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB828 ,Active Status Bit 828" "Not active,Active" bitfld.long 0x00 27. " ASB827 ,Active Status Bit 827" "Not active,Active" bitfld.long 0x00 26. " ASB826 ,Active Status Bit 826" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB825 ,Active Status Bit 825" "Not active,Active" bitfld.long 0x00 24. " ASB824 ,Active Status Bit 824" "Not active,Active" bitfld.long 0x00 23. " ASB823 ,Active Status Bit 823" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB822 ,Active Status Bit 822" "Not active,Active" bitfld.long 0x00 21. " ASB821 ,Active Status Bit 821" "Not active,Active" bitfld.long 0x00 20. " ASB820 ,Active Status Bit 820" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB819 ,Active Status Bit 819" "Not active,Active" bitfld.long 0x00 18. " ASB818 ,Active Status Bit 818" "Not active,Active" bitfld.long 0x00 17. " ASB817 ,Active Status Bit 817" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB816 ,Active Status Bit 816" "Not active,Active" bitfld.long 0x00 15. " ASB815 ,Active Status Bit 815" "Not active,Active" bitfld.long 0x00 14. " ASB814 ,Active Status Bit 814" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB813 ,Active Status Bit 813" "Not active,Active" bitfld.long 0x00 12. " ASB812 ,Active Status Bit 812" "Not active,Active" bitfld.long 0x00 11. " ASB811 ,Active Status Bit 811" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB810 ,Active Status Bit 810" "Not active,Active" bitfld.long 0x00 9. " ASB809 ,Active Status Bit 809" "Not active,Active" bitfld.long 0x00 8. " ASB808 ,Active Status Bit 808" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB807 ,Active Status Bit 807" "Not active,Active" bitfld.long 0x00 6. " ASB806 ,Active Status Bit 806" "Not active,Active" bitfld.long 0x00 5. " ASB805 ,Active Status Bit 805" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB804 ,Active Status Bit 804" "Not active,Active" bitfld.long 0x00 3. " ASB803 ,Active Status Bit 803" "Not active,Active" bitfld.long 0x00 2. " ASB802 ,Active Status Bit 802" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB801 ,Active Status Bit 801" "Not active,Active" bitfld.long 0x00 0. " ASB800 ,Active Status Bit 800" "Not active,Active" else rgroup.long 0x0364++0x03 line.long 0x0 "GICD_ICDABR25,Active Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" bitfld.long 0x00 31. " ASB863 ,Active Status Bit 863" "Not active,Active" bitfld.long 0x00 30. " ASB862 ,Active Status Bit 862" "Not active,Active" bitfld.long 0x00 29. " ASB861 ,Active Status Bit 861" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB860 ,Active Status Bit 860" "Not active,Active" bitfld.long 0x00 27. " ASB859 ,Active Status Bit 859" "Not active,Active" bitfld.long 0x00 26. " ASB858 ,Active Status Bit 858" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB857 ,Active Status Bit 857" "Not active,Active" bitfld.long 0x00 24. " ASB856 ,Active Status Bit 856" "Not active,Active" bitfld.long 0x00 23. " ASB855 ,Active Status Bit 855" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB854 ,Active Status Bit 854" "Not active,Active" bitfld.long 0x00 21. " ASB853 ,Active Status Bit 853" "Not active,Active" bitfld.long 0x00 20. " ASB852 ,Active Status Bit 852" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB851 ,Active Status Bit 851" "Not active,Active" bitfld.long 0x00 18. " ASB850 ,Active Status Bit 850" "Not active,Active" bitfld.long 0x00 17. " ASB849 ,Active Status Bit 849" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB848 ,Active Status Bit 848" "Not active,Active" bitfld.long 0x00 15. " ASB847 ,Active Status Bit 847" "Not active,Active" bitfld.long 0x00 14. " ASB846 ,Active Status Bit 846" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB845 ,Active Status Bit 845" "Not active,Active" bitfld.long 0x00 12. " ASB844 ,Active Status Bit 844" "Not active,Active" bitfld.long 0x00 11. " ASB843 ,Active Status Bit 843" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB842 ,Active Status Bit 842" "Not active,Active" bitfld.long 0x00 9. " ASB841 ,Active Status Bit 841" "Not active,Active" bitfld.long 0x00 8. " ASB840 ,Active Status Bit 840" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB839 ,Active Status Bit 839" "Not active,Active" bitfld.long 0x00 6. " ASB838 ,Active Status Bit 838" "Not active,Active" bitfld.long 0x00 5. " ASB837 ,Active Status Bit 837" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB836 ,Active Status Bit 836" "Not active,Active" bitfld.long 0x00 3. " ASB835 ,Active Status Bit 835" "Not active,Active" bitfld.long 0x00 2. " ASB834 ,Active Status Bit 834" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB833 ,Active Status Bit 833" "Not active,Active" bitfld.long 0x00 0. " ASB832 ,Active Status Bit 832" "Not active,Active" else rgroup.long 0x0368++0x03 line.long 0x0 "GICD_ICDABR26,Active Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" bitfld.long 0x00 31. " ASB895 ,Active Status Bit 895" "Not active,Active" bitfld.long 0x00 30. " ASB894 ,Active Status Bit 894" "Not active,Active" bitfld.long 0x00 29. " ASB893 ,Active Status Bit 893" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB892 ,Active Status Bit 892" "Not active,Active" bitfld.long 0x00 27. " ASB891 ,Active Status Bit 891" "Not active,Active" bitfld.long 0x00 26. " ASB890 ,Active Status Bit 890" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB889 ,Active Status Bit 889" "Not active,Active" bitfld.long 0x00 24. " ASB888 ,Active Status Bit 888" "Not active,Active" bitfld.long 0x00 23. " ASB887 ,Active Status Bit 887" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB886 ,Active Status Bit 886" "Not active,Active" bitfld.long 0x00 21. " ASB885 ,Active Status Bit 885" "Not active,Active" bitfld.long 0x00 20. " ASB884 ,Active Status Bit 884" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB883 ,Active Status Bit 883" "Not active,Active" bitfld.long 0x00 18. " ASB882 ,Active Status Bit 882" "Not active,Active" bitfld.long 0x00 17. " ASB881 ,Active Status Bit 881" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB880 ,Active Status Bit 880" "Not active,Active" bitfld.long 0x00 15. " ASB879 ,Active Status Bit 879" "Not active,Active" bitfld.long 0x00 14. " ASB878 ,Active Status Bit 878" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB877 ,Active Status Bit 877" "Not active,Active" bitfld.long 0x00 12. " ASB876 ,Active Status Bit 876" "Not active,Active" bitfld.long 0x00 11. " ASB875 ,Active Status Bit 875" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB874 ,Active Status Bit 874" "Not active,Active" bitfld.long 0x00 9. " ASB873 ,Active Status Bit 873" "Not active,Active" bitfld.long 0x00 8. " ASB872 ,Active Status Bit 872" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB871 ,Active Status Bit 871" "Not active,Active" bitfld.long 0x00 6. " ASB870 ,Active Status Bit 870" "Not active,Active" bitfld.long 0x00 5. " ASB869 ,Active Status Bit 869" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB868 ,Active Status Bit 868" "Not active,Active" bitfld.long 0x00 3. " ASB867 ,Active Status Bit 867" "Not active,Active" bitfld.long 0x00 2. " ASB866 ,Active Status Bit 866" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB865 ,Active Status Bit 865" "Not active,Active" bitfld.long 0x00 0. " ASB864 ,Active Status Bit 864" "Not active,Active" else rgroup.long 0x036C++0x03 line.long 0x0 "GICD_ICDABR27,Active Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" bitfld.long 0x00 31. " ASB927 ,Active Status Bit 927" "Not active,Active" bitfld.long 0x00 30. " ASB926 ,Active Status Bit 926" "Not active,Active" bitfld.long 0x00 29. " ASB925 ,Active Status Bit 925" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB924 ,Active Status Bit 924" "Not active,Active" bitfld.long 0x00 27. " ASB923 ,Active Status Bit 923" "Not active,Active" bitfld.long 0x00 26. " ASB922 ,Active Status Bit 922" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB921 ,Active Status Bit 921" "Not active,Active" bitfld.long 0x00 24. " ASB920 ,Active Status Bit 920" "Not active,Active" bitfld.long 0x00 23. " ASB919 ,Active Status Bit 919" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB918 ,Active Status Bit 918" "Not active,Active" bitfld.long 0x00 21. " ASB917 ,Active Status Bit 917" "Not active,Active" bitfld.long 0x00 20. " ASB916 ,Active Status Bit 916" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB915 ,Active Status Bit 915" "Not active,Active" bitfld.long 0x00 18. " ASB914 ,Active Status Bit 914" "Not active,Active" bitfld.long 0x00 17. " ASB913 ,Active Status Bit 913" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB912 ,Active Status Bit 912" "Not active,Active" bitfld.long 0x00 15. " ASB911 ,Active Status Bit 911" "Not active,Active" bitfld.long 0x00 14. " ASB910 ,Active Status Bit 910" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB909 ,Active Status Bit 909" "Not active,Active" bitfld.long 0x00 12. " ASB908 ,Active Status Bit 908" "Not active,Active" bitfld.long 0x00 11. " ASB907 ,Active Status Bit 907" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB906 ,Active Status Bit 906" "Not active,Active" bitfld.long 0x00 9. " ASB905 ,Active Status Bit 905" "Not active,Active" bitfld.long 0x00 8. " ASB904 ,Active Status Bit 904" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB903 ,Active Status Bit 903" "Not active,Active" bitfld.long 0x00 6. " ASB902 ,Active Status Bit 902" "Not active,Active" bitfld.long 0x00 5. " ASB901 ,Active Status Bit 901" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB900 ,Active Status Bit 900" "Not active,Active" bitfld.long 0x00 3. " ASB899 ,Active Status Bit 899" "Not active,Active" bitfld.long 0x00 2. " ASB898 ,Active Status Bit 898" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB897 ,Active Status Bit 897" "Not active,Active" bitfld.long 0x00 0. " ASB896 ,Active Status Bit 896" "Not active,Active" else rgroup.long 0x0370++0x03 line.long 0x0 "GICD_ICDABR28,Active Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" bitfld.long 0x00 31. " ASB959 ,Active Status Bit 959" "Not active,Active" bitfld.long 0x00 30. " ASB958 ,Active Status Bit 958" "Not active,Active" bitfld.long 0x00 29. " ASB957 ,Active Status Bit 957" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB956 ,Active Status Bit 956" "Not active,Active" bitfld.long 0x00 27. " ASB955 ,Active Status Bit 955" "Not active,Active" bitfld.long 0x00 26. " ASB954 ,Active Status Bit 954" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB953 ,Active Status Bit 953" "Not active,Active" bitfld.long 0x00 24. " ASB952 ,Active Status Bit 952" "Not active,Active" bitfld.long 0x00 23. " ASB951 ,Active Status Bit 951" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB950 ,Active Status Bit 950" "Not active,Active" bitfld.long 0x00 21. " ASB949 ,Active Status Bit 949" "Not active,Active" bitfld.long 0x00 20. " ASB948 ,Active Status Bit 948" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB947 ,Active Status Bit 947" "Not active,Active" bitfld.long 0x00 18. " ASB946 ,Active Status Bit 946" "Not active,Active" bitfld.long 0x00 17. " ASB945 ,Active Status Bit 945" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB944 ,Active Status Bit 944" "Not active,Active" bitfld.long 0x00 15. " ASB943 ,Active Status Bit 943" "Not active,Active" bitfld.long 0x00 14. " ASB942 ,Active Status Bit 942" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB941 ,Active Status Bit 941" "Not active,Active" bitfld.long 0x00 12. " ASB940 ,Active Status Bit 940" "Not active,Active" bitfld.long 0x00 11. " ASB939 ,Active Status Bit 939" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB938 ,Active Status Bit 938" "Not active,Active" bitfld.long 0x00 9. " ASB937 ,Active Status Bit 937" "Not active,Active" bitfld.long 0x00 8. " ASB936 ,Active Status Bit 936" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB935 ,Active Status Bit 935" "Not active,Active" bitfld.long 0x00 6. " ASB934 ,Active Status Bit 934" "Not active,Active" bitfld.long 0x00 5. " ASB933 ,Active Status Bit 933" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB932 ,Active Status Bit 932" "Not active,Active" bitfld.long 0x00 3. " ASB931 ,Active Status Bit 931" "Not active,Active" bitfld.long 0x00 2. " ASB930 ,Active Status Bit 930" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB929 ,Active Status Bit 929" "Not active,Active" bitfld.long 0x00 0. " ASB928 ,Active Status Bit 928" "Not active,Active" else rgroup.long 0x0374++0x03 line.long 0x0 "GICD_ICDABR29,Active Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" bitfld.long 0x00 31. " ASB991 ,Active Status Bit 991" "Not active,Active" bitfld.long 0x00 30. " ASB990 ,Active Status Bit 990" "Not active,Active" bitfld.long 0x00 29. " ASB989 ,Active Status Bit 989" "Not active,Active" textline " " bitfld.long 0x00 28. " ASB988 ,Active Status Bit 988" "Not active,Active" bitfld.long 0x00 27. " ASB987 ,Active Status Bit 987" "Not active,Active" bitfld.long 0x00 26. " ASB986 ,Active Status Bit 986" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB985 ,Active Status Bit 985" "Not active,Active" bitfld.long 0x00 24. " ASB984 ,Active Status Bit 984" "Not active,Active" bitfld.long 0x00 23. " ASB983 ,Active Status Bit 983" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB982 ,Active Status Bit 982" "Not active,Active" bitfld.long 0x00 21. " ASB981 ,Active Status Bit 981" "Not active,Active" bitfld.long 0x00 20. " ASB980 ,Active Status Bit 980" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB979 ,Active Status Bit 979" "Not active,Active" bitfld.long 0x00 18. " ASB978 ,Active Status Bit 978" "Not active,Active" bitfld.long 0x00 17. " ASB977 ,Active Status Bit 977" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB976 ,Active Status Bit 976" "Not active,Active" bitfld.long 0x00 15. " ASB975 ,Active Status Bit 975" "Not active,Active" bitfld.long 0x00 14. " ASB974 ,Active Status Bit 974" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB973 ,Active Status Bit 973" "Not active,Active" bitfld.long 0x00 12. " ASB972 ,Active Status Bit 972" "Not active,Active" bitfld.long 0x00 11. " ASB971 ,Active Status Bit 971" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB970 ,Active Status Bit 970" "Not active,Active" bitfld.long 0x00 9. " ASB969 ,Active Status Bit 969" "Not active,Active" bitfld.long 0x00 8. " ASB968 ,Active Status Bit 968" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB967 ,Active Status Bit 967" "Not active,Active" bitfld.long 0x00 6. " ASB966 ,Active Status Bit 966" "Not active,Active" bitfld.long 0x00 5. " ASB965 ,Active Status Bit 965" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB964 ,Active Status Bit 964" "Not active,Active" bitfld.long 0x00 3. " ASB963 ,Active Status Bit 963" "Not active,Active" bitfld.long 0x00 2. " ASB962 ,Active Status Bit 962" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB961 ,Active Status Bit 961" "Not active,Active" bitfld.long 0x00 0. " ASB960 ,Active Status Bit 960" "Not active,Active" else rgroup.long 0x0378++0x03 line.long 0x0 "GICD_ICDABR30,Active Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)==0x1F) rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" bitfld.long 0x00 27. " ASB1019 ,Active Status Bit 1019" "Not active,Active" bitfld.long 0x00 26. " ASB1018 ,Active Status Bit 1018" "Not active,Active" textline " " bitfld.long 0x00 25. " ASB1017 ,Active Status Bit 1017" "Not active,Active" bitfld.long 0x00 24. " ASB1016 ,Active Status Bit 1016" "Not active,Active" bitfld.long 0x00 23. " ASB1015 ,Active Status Bit 1015" "Not active,Active" textline " " bitfld.long 0x00 22. " ASB1014 ,Active Status Bit 1014" "Not active,Active" bitfld.long 0x00 21. " ASB1013 ,Active Status Bit 1013" "Not active,Active" bitfld.long 0x00 20. " ASB1012 ,Active Status Bit 1012" "Not active,Active" textline " " bitfld.long 0x00 19. " ASB1011 ,Active Status Bit 1011" "Not active,Active" bitfld.long 0x00 18. " ASB1010 ,Active Status Bit 1010" "Not active,Active" bitfld.long 0x00 17. " ASB1009 ,Active Status Bit 1009" "Not active,Active" textline " " bitfld.long 0x00 16. " ASB1008 ,Active Status Bit 1008" "Not active,Active" bitfld.long 0x00 15. " ASB1007 ,Active Status Bit 1007" "Not active,Active" bitfld.long 0x00 14. " ASB1006 ,Active Status Bit 1006" "Not active,Active" textline " " bitfld.long 0x00 13. " ASB1005 ,Active Status Bit 1005" "Not active,Active" bitfld.long 0x00 12. " ASB1004 ,Active Status Bit 1004" "Not active,Active" bitfld.long 0x00 11. " ASB1003 ,Active Status Bit 1003" "Not active,Active" textline " " bitfld.long 0x00 10. " ASB1002 ,Active Status Bit 1002" "Not active,Active" bitfld.long 0x00 9. " ASB1001 ,Active Status Bit 1001" "Not active,Active" bitfld.long 0x00 8. " ASB1000 ,Active Status Bit 1000" "Not active,Active" textline " " bitfld.long 0x00 7. " ASB999 ,Active Status Bit 999" "Not active,Active" bitfld.long 0x00 6. " ASB998 ,Active Status Bit 998" "Not active,Active" bitfld.long 0x00 5. " ASB997 ,Active Status Bit 997" "Not active,Active" textline " " bitfld.long 0x00 4. " ASB996 ,Active Status Bit 996" "Not active,Active" bitfld.long 0x00 3. " ASB995 ,Active Status Bit 995" "Not active,Active" bitfld.long 0x00 2. " ASB994 ,Active Status Bit 994" "Not active,Active" textline " " bitfld.long 0x00 1. " ASB993 ,Active Status Bit 993" "Not active,Active" bitfld.long 0x00 0. " ASB992 ,Active Status Bit 992" "Not active,Active" else rgroup.long 0x037C++0x03 line.long 0x0 "GICD_ICDABR31,Active Status Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif else group.long 0x0300++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE9 ,Set/Clear Active Bit 9" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE8 ,Set/Clear Active Bit 8" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7 ,Set/Clear Active Bit 7" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE6 ,Set/Clear Active Bit 6" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE5 ,Set/Clear Active Bit 5" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4 ,Set/Clear Active Bit 4" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE3 ,Set/Clear Active Bit 3" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE2 ,Set/Clear Active Bit 2" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1 ,Set/Clear Active Bit 1" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE0 ,Set/Clear Active Bit 0" "Not active,Active" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63 ,Set/Clear Active Bit 63" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE62 ,Set/Clear Active Bit 62" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE61 ,Set/Clear Active Bit 61" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60 ,Set/Clear Active Bit 60" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE59 ,Set/Clear Active Bit 59" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE58 ,Set/Clear Active Bit 58" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57 ,Set/Clear Active Bit 57" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE56 ,Set/Clear Active Bit 56" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE55 ,Set/Clear Active Bit 55" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54 ,Set/Clear Active Bit 54" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE53 ,Set/Clear Active Bit 53" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE52 ,Set/Clear Active Bit 52" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51 ,Set/Clear Active Bit 51" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE50 ,Set/Clear Active Bit 50" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE49 ,Set/Clear Active Bit 49" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48 ,Set/Clear Active Bit 48" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE47 ,Set/Clear Active Bit 47" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE46 ,Set/Clear Active Bit 46" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45 ,Set/Clear Active Bit 45" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE44 ,Set/Clear Active Bit 44" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE43 ,Set/Clear Active Bit 43" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42 ,Set/Clear Active Bit 42" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE41 ,Set/Clear Active Bit 41" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE40 ,Set/Clear Active Bit 40" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39 ,Set/Clear Active Bit 39" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE38 ,Set/Clear Active Bit 38" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE37 ,Set/Clear Active Bit 37" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36 ,Set/Clear Active Bit 36" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE35 ,Set/Clear Active Bit 35" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE34 ,Set/Clear Active Bit 34" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33 ,Set/Clear Active Bit 33" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE32 ,Set/Clear Active Bit 32" "Not active,Active" else rgroup.long 0x0304++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95 ,Set/Clear Active Bit 95" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE94 ,Set/Clear Active Bit 94" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE93 ,Set/Clear Active Bit 93" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92 ,Set/Clear Active Bit 92" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE91 ,Set/Clear Active Bit 91" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE90 ,Set/Clear Active Bit 90" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89 ,Set/Clear Active Bit 89" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE88 ,Set/Clear Active Bit 88" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE87 ,Set/Clear Active Bit 87" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86 ,Set/Clear Active Bit 86" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE85 ,Set/Clear Active Bit 85" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE84 ,Set/Clear Active Bit 84" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83 ,Set/Clear Active Bit 83" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE82 ,Set/Clear Active Bit 82" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE81 ,Set/Clear Active Bit 81" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80 ,Set/Clear Active Bit 80" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE79 ,Set/Clear Active Bit 79" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE78 ,Set/Clear Active Bit 78" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77 ,Set/Clear Active Bit 77" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE76 ,Set/Clear Active Bit 76" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE75 ,Set/Clear Active Bit 75" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74 ,Set/Clear Active Bit 74" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE73 ,Set/Clear Active Bit 73" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE72 ,Set/Clear Active Bit 72" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71 ,Set/Clear Active Bit 71" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE70 ,Set/Clear Active Bit 70" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE69 ,Set/Clear Active Bit 69" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68 ,Set/Clear Active Bit 68" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE67 ,Set/Clear Active Bit 67" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE66 ,Set/Clear Active Bit 66" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65 ,Set/Clear Active Bit 65" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE64 ,Set/Clear Active Bit 64" "Not active,Active" else rgroup.long 0x0308++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE99 ,Set/Clear Active Bit 99" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE98 ,Set/Clear Active Bit 98" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97 ,Set/Clear Active Bit 97" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE96 ,Set/Clear Active Bit 96" "Not active,Active" else rgroup.long 0x030C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active" else rgroup.long 0x0310++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active" else rgroup.long 0x0314++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active" else rgroup.long 0x0318++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active" else rgroup.long 0x031C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active" else rgroup.long 0x0320++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active" else rgroup.long 0x0324++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active" else rgroup.long 0x0328++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active" else rgroup.long 0x032C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active" else rgroup.long 0x0330++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active" else rgroup.long 0x0334++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active" else rgroup.long 0x0338++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active" setclrfld.long 0x00 30. 0x00 30. 0x80 30. " SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active" setclrfld.long 0x00 29. 0x00 29. 0x80 29. " SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active" textline " " setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active" setclrfld.long 0x00 27. 0x00 27. 0x80 27. " SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active" setclrfld.long 0x00 26. 0x00 26. 0x80 26. " SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active" textline " " setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active" setclrfld.long 0x00 24. 0x00 24. 0x80 24. " SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active" setclrfld.long 0x00 23. 0x00 23. 0x80 23. " SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active" textline " " setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active" setclrfld.long 0x00 21. 0x00 21. 0x80 21. " SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active" setclrfld.long 0x00 20. 0x00 20. 0x80 20. " SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active" textline " " setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active" setclrfld.long 0x00 18. 0x00 18. 0x80 18. " SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active" setclrfld.long 0x00 17. 0x00 17. 0x80 17. " SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active" textline " " setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active" setclrfld.long 0x00 15. 0x00 15. 0x80 15. " SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active" setclrfld.long 0x00 14. 0x00 14. 0x80 14. " SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active" textline " " setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active" setclrfld.long 0x00 12. 0x00 12. 0x80 12. " SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active" setclrfld.long 0x00 11. 0x00 11. 0x80 11. " SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active" textline " " setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active" setclrfld.long 0x00 9. 0x00 9. 0x80 9. " SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active" setclrfld.long 0x00 8. 0x00 8. 0x80 8. " SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active" textline " " setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active" setclrfld.long 0x00 6. 0x00 6. 0x80 6. " SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active" setclrfld.long 0x00 5. 0x00 5. 0x80 5. " SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active" textline " " setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active" setclrfld.long 0x00 3. 0x00 3. 0x80 3. " SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active" setclrfld.long 0x00 2. 0x00 2. 0x80 2. " SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active" textline " " setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active" setclrfld.long 0x00 0. 0x00 0. 0x80 0. " SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active" else rgroup.long 0x033C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif rgroup.long 0x0340++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0344++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0348++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x034C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0350++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0354++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0358++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x035C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0360++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0364++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0368++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x036C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0370++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0374++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x0378++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " rgroup.long 0x037C++0x03 line.long 0x0 "GICD_SET/CLR_ACTIVER31,Interrupt Set/Clear Active Register 31" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end tree "Priority Registers" group.long 0x400++0x03 line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0" hexmask.long.byte 0x00 24.--31. 1. " INTID3 ,Interrupt ID3 Priority/Priority Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " INTID2 ,Interrupt ID2 Priority/Priority Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " INTID1 ,Interrupt ID1 Priority/Priority Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " INTID0 ,Interrupt ID0 Priority/Priority Byte Offset 0 " group.long 0x404++0x03 line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1" hexmask.long.byte 0x00 24.--31. 1. " INTID7 ,Interrupt ID7 Priority/Priority Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " INTID6 ,Interrupt ID6 Priority/Priority Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " INTID5 ,Interrupt ID5 Priority/Priority Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " INTID4 ,Interrupt ID4 Priority/Priority Byte Offset 4 " group.long 0x408++0x03 line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2" hexmask.long.byte 0x00 24.--31. 1. " INTID11 ,Interrupt ID11 Priority/Priority Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " INTID10 ,Interrupt ID10 Priority/Priority Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " INTID9 ,Interrupt ID9 Priority/Priority Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " INTID8 ,Interrupt ID8 Priority/Priority Byte Offset 8 " group.long 0x40C++0x03 line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3" hexmask.long.byte 0x00 24.--31. 1. " INTID15 ,Interrupt ID15 Priority/Priority Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " INTID14 ,Interrupt ID14 Priority/Priority Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " INTID13 ,Interrupt ID13 Priority/Priority Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " INTID12 ,Interrupt ID12 Priority/Priority Byte Offset 12 " group.long 0x410++0x03 line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4" hexmask.long.byte 0x00 24.--31. 1. " INTID19 ,Interrupt ID19 Priority/Priority Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " INTID18 ,Interrupt ID18 Priority/Priority Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " INTID17 ,Interrupt ID17 Priority/Priority Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " INTID16 ,Interrupt ID16 Priority/Priority Byte Offset 16 " group.long 0x414++0x03 line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5" hexmask.long.byte 0x00 24.--31. 1. " INTID23 ,Interrupt ID23 Priority/Priority Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " INTID22 ,Interrupt ID22 Priority/Priority Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " INTID21 ,Interrupt ID21 Priority/Priority Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " INTID20 ,Interrupt ID20 Priority/Priority Byte Offset 20 " group.long 0x418++0x03 line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6" hexmask.long.byte 0x00 24.--31. 1. " INTID27 ,Interrupt ID27 Priority/Priority Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " INTID26 ,Interrupt ID26 Priority/Priority Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " INTID25 ,Interrupt ID25 Priority/Priority Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " INTID24 ,Interrupt ID24 Priority/Priority Byte Offset 24 " group.long 0x41C++0x03 line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7" hexmask.long.byte 0x00 24.--31. 1. " INTID31 ,Interrupt ID31 Priority/Priority Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " INTID30 ,Interrupt ID30 Priority/Priority Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " INTID29 ,Interrupt ID29 Priority/Priority Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " INTID28 ,Interrupt ID28 Priority/Priority Byte Offset 28 " if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" hexmask.long.byte 0x00 24.--31. 1. " INTID35 ,Interrupt ID35 Priority/Priority Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " INTID34 ,Interrupt ID34 Priority/Priority Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " INTID33 ,Interrupt ID33 Priority/Priority Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " INTID32 ,Interrupt ID32 Priority/Priority Byte Offset 32 " group.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" hexmask.long.byte 0x00 24.--31. 1. " INTID39 ,Interrupt ID39 Priority/Priority Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " INTID38 ,Interrupt ID38 Priority/Priority Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " INTID37 ,Interrupt ID37 Priority/Priority Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " INTID36 ,Interrupt ID36 Priority/Priority Byte Offset 36 " group.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" hexmask.long.byte 0x00 24.--31. 1. " INTID43 ,Interrupt ID43 Priority/Priority Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " INTID42 ,Interrupt ID42 Priority/Priority Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " INTID41 ,Interrupt ID41 Priority/Priority Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " INTID40 ,Interrupt ID40 Priority/Priority Byte Offset 40 " group.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" hexmask.long.byte 0x00 24.--31. 1. " INTID47 ,Interrupt ID47 Priority/Priority Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " INTID46 ,Interrupt ID46 Priority/Priority Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " INTID45 ,Interrupt ID45 Priority/Priority Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " INTID44 ,Interrupt ID44 Priority/Priority Byte Offset 44 " group.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" hexmask.long.byte 0x00 24.--31. 1. " INTID51 ,Interrupt ID51 Priority/Priority Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " INTID50 ,Interrupt ID50 Priority/Priority Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " INTID49 ,Interrupt ID49 Priority/Priority Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " INTID48 ,Interrupt ID48 Priority/Priority Byte Offset 48 " group.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" hexmask.long.byte 0x00 24.--31. 1. " INTID55 ,Interrupt ID55 Priority/Priority Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " INTID54 ,Interrupt ID54 Priority/Priority Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " INTID53 ,Interrupt ID53 Priority/Priority Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " INTID52 ,Interrupt ID52 Priority/Priority Byte Offset 52 " group.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" hexmask.long.byte 0x00 24.--31. 1. " INTID59 ,Interrupt ID59 Priority/Priority Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " INTID58 ,Interrupt ID58 Priority/Priority Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " INTID57 ,Interrupt ID57 Priority/Priority Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " INTID56 ,Interrupt ID56 Priority/Priority Byte Offset 56 " group.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" hexmask.long.byte 0x00 24.--31. 1. " INTID63 ,Interrupt ID63 Priority/Priority Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " INTID62 ,Interrupt ID62 Priority/Priority Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " INTID61 ,Interrupt ID61 Priority/Priority Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " INTID60 ,Interrupt ID60 Priority/Priority Byte Offset 60 " else rgroup.long 0x420++0x03 line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8" rgroup.long 0x424++0x03 line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9" rgroup.long 0x428++0x03 line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10" rgroup.long 0x42C++0x03 line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11" rgroup.long 0x430++0x03 line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12" rgroup.long 0x434++0x03 line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13" rgroup.long 0x438++0x03 line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14" rgroup.long 0x43C++0x03 line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" hexmask.long.byte 0x00 24.--31. 1. " INTID67 ,Interrupt ID67 Priority/Priority Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " INTID66 ,Interrupt ID66 Priority/Priority Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " INTID65 ,Interrupt ID65 Priority/Priority Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " INTID64 ,Interrupt ID64 Priority/Priority Byte Offset 64 " group.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" hexmask.long.byte 0x00 24.--31. 1. " INTID71 ,Interrupt ID71 Priority/Priority Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " INTID70 ,Interrupt ID70 Priority/Priority Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " INTID69 ,Interrupt ID69 Priority/Priority Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " INTID68 ,Interrupt ID68 Priority/Priority Byte Offset 68 " group.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" hexmask.long.byte 0x00 24.--31. 1. " INTID75 ,Interrupt ID75 Priority/Priority Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " INTID74 ,Interrupt ID74 Priority/Priority Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " INTID73 ,Interrupt ID73 Priority/Priority Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " INTID72 ,Interrupt ID72 Priority/Priority Byte Offset 72 " group.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" hexmask.long.byte 0x00 24.--31. 1. " INTID79 ,Interrupt ID79 Priority/Priority Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " INTID78 ,Interrupt ID78 Priority/Priority Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " INTID77 ,Interrupt ID77 Priority/Priority Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " INTID76 ,Interrupt ID76 Priority/Priority Byte Offset 76 " group.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" hexmask.long.byte 0x00 24.--31. 1. " INTID83 ,Interrupt ID83 Priority/Priority Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " INTID82 ,Interrupt ID82 Priority/Priority Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " INTID81 ,Interrupt ID81 Priority/Priority Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " INTID80 ,Interrupt ID80 Priority/Priority Byte Offset 80 " group.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" hexmask.long.byte 0x00 24.--31. 1. " INTID87 ,Interrupt ID87 Priority/Priority Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " INTID86 ,Interrupt ID86 Priority/Priority Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " INTID85 ,Interrupt ID85 Priority/Priority Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " INTID84 ,Interrupt ID84 Priority/Priority Byte Offset 84 " group.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" hexmask.long.byte 0x00 24.--31. 1. " INTID91 ,Interrupt ID91 Priority/Priority Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " INTID90 ,Interrupt ID90 Priority/Priority Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " INTID89 ,Interrupt ID89 Priority/Priority Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " INTID88 ,Interrupt ID88 Priority/Priority Byte Offset 88 " group.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" hexmask.long.byte 0x00 24.--31. 1. " INTID95 ,Interrupt ID95 Priority/Priority Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " INTID94 ,Interrupt ID94 Priority/Priority Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " INTID93 ,Interrupt ID93 Priority/Priority Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " INTID92 ,Interrupt ID92 Priority/Priority Byte Offset 92 " else rgroup.long 0x440++0x03 line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16" rgroup.long 0x444++0x03 line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17" rgroup.long 0x448++0x03 line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18" rgroup.long 0x44C++0x03 line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19" rgroup.long 0x450++0x03 line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20" rgroup.long 0x454++0x03 line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21" rgroup.long 0x458++0x03 line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22" rgroup.long 0x45C++0x03 line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" hexmask.long.byte 0x00 24.--31. 1. " INTID99 ,Interrupt ID99 Priority/Priority Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " INTID98 ,Interrupt ID98 Priority/Priority Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " INTID97 ,Interrupt ID97 Priority/Priority Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " INTID96 ,Interrupt ID96 Priority/Priority Byte Offset 96 " group.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" hexmask.long.byte 0x00 24.--31. 1. " INTID103 ,Interrupt ID103 Priority/Priority Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " INTID102 ,Interrupt ID102 Priority/Priority Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " INTID101 ,Interrupt ID101 Priority/Priority Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " INTID100 ,Interrupt ID100 Priority/Priority Byte Offset 100 " group.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" hexmask.long.byte 0x00 24.--31. 1. " INTID107 ,Interrupt ID107 Priority/Priority Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " INTID106 ,Interrupt ID106 Priority/Priority Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " INTID105 ,Interrupt ID105 Priority/Priority Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " INTID104 ,Interrupt ID104 Priority/Priority Byte Offset 104 " group.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" hexmask.long.byte 0x00 24.--31. 1. " INTID111 ,Interrupt ID111 Priority/Priority Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " INTID110 ,Interrupt ID110 Priority/Priority Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " INTID109 ,Interrupt ID109 Priority/Priority Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " INTID108 ,Interrupt ID108 Priority/Priority Byte Offset 108 " group.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" hexmask.long.byte 0x00 24.--31. 1. " INTID115 ,Interrupt ID115 Priority/Priority Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " INTID114 ,Interrupt ID114 Priority/Priority Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " INTID113 ,Interrupt ID113 Priority/Priority Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " INTID112 ,Interrupt ID112 Priority/Priority Byte Offset 112 " group.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" hexmask.long.byte 0x00 24.--31. 1. " INTID119 ,Interrupt ID119 Priority/Priority Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " INTID118 ,Interrupt ID118 Priority/Priority Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " INTID117 ,Interrupt ID117 Priority/Priority Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " INTID116 ,Interrupt ID116 Priority/Priority Byte Offset 116 " group.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" hexmask.long.byte 0x00 24.--31. 1. " INTID123 ,Interrupt ID123 Priority/Priority Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " INTID122 ,Interrupt ID122 Priority/Priority Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " INTID121 ,Interrupt ID121 Priority/Priority Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " INTID120 ,Interrupt ID120 Priority/Priority Byte Offset 120 " group.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" hexmask.long.byte 0x00 24.--31. 1. " INTID127 ,Interrupt ID127 Priority/Priority Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " INTID126 ,Interrupt ID126 Priority/Priority Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " INTID125 ,Interrupt ID125 Priority/Priority Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " INTID124 ,Interrupt ID124 Priority/Priority Byte Offset 124 " else rgroup.long 0x460++0x03 line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24" rgroup.long 0x464++0x03 line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25" rgroup.long 0x468++0x03 line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26" rgroup.long 0x46C++0x03 line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27" rgroup.long 0x470++0x03 line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28" rgroup.long 0x474++0x03 line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29" rgroup.long 0x478++0x03 line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30" rgroup.long 0x47C++0x03 line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" hexmask.long.byte 0x00 24.--31. 1. " INTID131 ,Interrupt ID131 Priority/Priority Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " INTID130 ,Interrupt ID130 Priority/Priority Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " INTID129 ,Interrupt ID129 Priority/Priority Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " INTID128 ,Interrupt ID128 Priority/Priority Byte Offset 128 " group.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" hexmask.long.byte 0x00 24.--31. 1. " INTID135 ,Interrupt ID135 Priority/Priority Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " INTID134 ,Interrupt ID134 Priority/Priority Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " INTID133 ,Interrupt ID133 Priority/Priority Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " INTID132 ,Interrupt ID132 Priority/Priority Byte Offset 132 " group.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" hexmask.long.byte 0x00 24.--31. 1. " INTID139 ,Interrupt ID139 Priority/Priority Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " INTID138 ,Interrupt ID138 Priority/Priority Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " INTID137 ,Interrupt ID137 Priority/Priority Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " INTID136 ,Interrupt ID136 Priority/Priority Byte Offset 136 " group.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" hexmask.long.byte 0x00 24.--31. 1. " INTID143 ,Interrupt ID143 Priority/Priority Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " INTID142 ,Interrupt ID142 Priority/Priority Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " INTID141 ,Interrupt ID141 Priority/Priority Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " INTID140 ,Interrupt ID140 Priority/Priority Byte Offset 140 " group.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" hexmask.long.byte 0x00 24.--31. 1. " INTID147 ,Interrupt ID147 Priority/Priority Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " INTID146 ,Interrupt ID146 Priority/Priority Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " INTID145 ,Interrupt ID145 Priority/Priority Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " INTID144 ,Interrupt ID144 Priority/Priority Byte Offset 144 " group.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" hexmask.long.byte 0x00 24.--31. 1. " INTID151 ,Interrupt ID151 Priority/Priority Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " INTID150 ,Interrupt ID150 Priority/Priority Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " INTID149 ,Interrupt ID149 Priority/Priority Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " INTID148 ,Interrupt ID148 Priority/Priority Byte Offset 148 " group.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" hexmask.long.byte 0x00 24.--31. 1. " INTID155 ,Interrupt ID155 Priority/Priority Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " INTID154 ,Interrupt ID154 Priority/Priority Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " INTID153 ,Interrupt ID153 Priority/Priority Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " INTID152 ,Interrupt ID152 Priority/Priority Byte Offset 152 " group.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" hexmask.long.byte 0x00 24.--31. 1. " INTID159 ,Interrupt ID159 Priority/Priority Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " INTID158 ,Interrupt ID158 Priority/Priority Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " INTID157 ,Interrupt ID157 Priority/Priority Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " INTID156 ,Interrupt ID156 Priority/Priority Byte Offset 156 " else rgroup.long 0x480++0x03 line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32" rgroup.long 0x484++0x03 line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33" rgroup.long 0x488++0x03 line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34" rgroup.long 0x48C++0x03 line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35" rgroup.long 0x490++0x03 line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36" rgroup.long 0x494++0x03 line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37" rgroup.long 0x498++0x03 line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38" rgroup.long 0x49C++0x03 line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" hexmask.long.byte 0x00 24.--31. 1. " INTID163 ,Interrupt ID163 Priority/Priority Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " INTID162 ,Interrupt ID162 Priority/Priority Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " INTID161 ,Interrupt ID161 Priority/Priority Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " INTID160 ,Interrupt ID160 Priority/Priority Byte Offset 160 " group.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" hexmask.long.byte 0x00 24.--31. 1. " INTID167 ,Interrupt ID167 Priority/Priority Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " INTID166 ,Interrupt ID166 Priority/Priority Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " INTID165 ,Interrupt ID165 Priority/Priority Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " INTID164 ,Interrupt ID164 Priority/Priority Byte Offset 164 " group.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" hexmask.long.byte 0x00 24.--31. 1. " INTID171 ,Interrupt ID171 Priority/Priority Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " INTID170 ,Interrupt ID170 Priority/Priority Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " INTID169 ,Interrupt ID169 Priority/Priority Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " INTID168 ,Interrupt ID168 Priority/Priority Byte Offset 168 " group.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" hexmask.long.byte 0x00 24.--31. 1. " INTID175 ,Interrupt ID175 Priority/Priority Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " INTID174 ,Interrupt ID174 Priority/Priority Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " INTID173 ,Interrupt ID173 Priority/Priority Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " INTID172 ,Interrupt ID172 Priority/Priority Byte Offset 172 " group.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" hexmask.long.byte 0x00 24.--31. 1. " INTID179 ,Interrupt ID179 Priority/Priority Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " INTID178 ,Interrupt ID178 Priority/Priority Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " INTID177 ,Interrupt ID177 Priority/Priority Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " INTID176 ,Interrupt ID176 Priority/Priority Byte Offset 176 " group.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" hexmask.long.byte 0x00 24.--31. 1. " INTID183 ,Interrupt ID183 Priority/Priority Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " INTID182 ,Interrupt ID182 Priority/Priority Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " INTID181 ,Interrupt ID181 Priority/Priority Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " INTID180 ,Interrupt ID180 Priority/Priority Byte Offset 180 " group.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" hexmask.long.byte 0x00 24.--31. 1. " INTID187 ,Interrupt ID187 Priority/Priority Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " INTID186 ,Interrupt ID186 Priority/Priority Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " INTID185 ,Interrupt ID185 Priority/Priority Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " INTID184 ,Interrupt ID184 Priority/Priority Byte Offset 184 " group.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" hexmask.long.byte 0x00 24.--31. 1. " INTID191 ,Interrupt ID191 Priority/Priority Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " INTID190 ,Interrupt ID190 Priority/Priority Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " INTID189 ,Interrupt ID189 Priority/Priority Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " INTID188 ,Interrupt ID188 Priority/Priority Byte Offset 188 " else rgroup.long 0x4A0++0x03 line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40" rgroup.long 0x4A4++0x03 line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41" rgroup.long 0x4A8++0x03 line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42" rgroup.long 0x4AC++0x03 line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43" rgroup.long 0x4B0++0x03 line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44" rgroup.long 0x4B4++0x03 line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45" rgroup.long 0x4B8++0x03 line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46" rgroup.long 0x4BC++0x03 line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" hexmask.long.byte 0x00 24.--31. 1. " INTID195 ,Interrupt ID195 Priority/Priority Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " INTID194 ,Interrupt ID194 Priority/Priority Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " INTID193 ,Interrupt ID193 Priority/Priority Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " INTID192 ,Interrupt ID192 Priority/Priority Byte Offset 192 " group.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" hexmask.long.byte 0x00 24.--31. 1. " INTID199 ,Interrupt ID199 Priority/Priority Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " INTID198 ,Interrupt ID198 Priority/Priority Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " INTID197 ,Interrupt ID197 Priority/Priority Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " INTID196 ,Interrupt ID196 Priority/Priority Byte Offset 196 " group.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" hexmask.long.byte 0x00 24.--31. 1. " INTID203 ,Interrupt ID203 Priority/Priority Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " INTID202 ,Interrupt ID202 Priority/Priority Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " INTID201 ,Interrupt ID201 Priority/Priority Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " INTID200 ,Interrupt ID200 Priority/Priority Byte Offset 200 " group.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" hexmask.long.byte 0x00 24.--31. 1. " INTID207 ,Interrupt ID207 Priority/Priority Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " INTID206 ,Interrupt ID206 Priority/Priority Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " INTID205 ,Interrupt ID205 Priority/Priority Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " INTID204 ,Interrupt ID204 Priority/Priority Byte Offset 204 " group.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" hexmask.long.byte 0x00 24.--31. 1. " INTID211 ,Interrupt ID211 Priority/Priority Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " INTID210 ,Interrupt ID210 Priority/Priority Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " INTID209 ,Interrupt ID209 Priority/Priority Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " INTID208 ,Interrupt ID208 Priority/Priority Byte Offset 208 " group.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" hexmask.long.byte 0x00 24.--31. 1. " INTID215 ,Interrupt ID215 Priority/Priority Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " INTID214 ,Interrupt ID214 Priority/Priority Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " INTID213 ,Interrupt ID213 Priority/Priority Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " INTID212 ,Interrupt ID212 Priority/Priority Byte Offset 212 " group.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" hexmask.long.byte 0x00 24.--31. 1. " INTID219 ,Interrupt ID219 Priority/Priority Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " INTID218 ,Interrupt ID218 Priority/Priority Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " INTID217 ,Interrupt ID217 Priority/Priority Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " INTID216 ,Interrupt ID216 Priority/Priority Byte Offset 216 " group.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" hexmask.long.byte 0x00 24.--31. 1. " INTID223 ,Interrupt ID223 Priority/Priority Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " INTID222 ,Interrupt ID222 Priority/Priority Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " INTID221 ,Interrupt ID221 Priority/Priority Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " INTID220 ,Interrupt ID220 Priority/Priority Byte Offset 220 " else rgroup.long 0x4C0++0x03 line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48" rgroup.long 0x4C4++0x03 line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49" rgroup.long 0x4C8++0x03 line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50" rgroup.long 0x4CC++0x03 line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51" rgroup.long 0x4D0++0x03 line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52" rgroup.long 0x4D4++0x03 line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53" rgroup.long 0x4D8++0x03 line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54" rgroup.long 0x4DC++0x03 line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" hexmask.long.byte 0x00 24.--31. 1. " INTID227 ,Interrupt ID227 Priority/Priority Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " INTID226 ,Interrupt ID226 Priority/Priority Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " INTID225 ,Interrupt ID225 Priority/Priority Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " INTID224 ,Interrupt ID224 Priority/Priority Byte Offset 224 " group.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" hexmask.long.byte 0x00 24.--31. 1. " INTID231 ,Interrupt ID231 Priority/Priority Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " INTID230 ,Interrupt ID230 Priority/Priority Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " INTID229 ,Interrupt ID229 Priority/Priority Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " INTID228 ,Interrupt ID228 Priority/Priority Byte Offset 228 " group.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" hexmask.long.byte 0x00 24.--31. 1. " INTID235 ,Interrupt ID235 Priority/Priority Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " INTID234 ,Interrupt ID234 Priority/Priority Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " INTID233 ,Interrupt ID233 Priority/Priority Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " INTID232 ,Interrupt ID232 Priority/Priority Byte Offset 232 " group.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" hexmask.long.byte 0x00 24.--31. 1. " INTID239 ,Interrupt ID239 Priority/Priority Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " INTID238 ,Interrupt ID238 Priority/Priority Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " INTID237 ,Interrupt ID237 Priority/Priority Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " INTID236 ,Interrupt ID236 Priority/Priority Byte Offset 236 " group.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" hexmask.long.byte 0x00 24.--31. 1. " INTID243 ,Interrupt ID243 Priority/Priority Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " INTID242 ,Interrupt ID242 Priority/Priority Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " INTID241 ,Interrupt ID241 Priority/Priority Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " INTID240 ,Interrupt ID240 Priority/Priority Byte Offset 240 " group.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" hexmask.long.byte 0x00 24.--31. 1. " INTID247 ,Interrupt ID247 Priority/Priority Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " INTID246 ,Interrupt ID246 Priority/Priority Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " INTID245 ,Interrupt ID245 Priority/Priority Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " INTID244 ,Interrupt ID244 Priority/Priority Byte Offset 244 " group.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" hexmask.long.byte 0x00 24.--31. 1. " INTID251 ,Interrupt ID251 Priority/Priority Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " INTID250 ,Interrupt ID250 Priority/Priority Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " INTID249 ,Interrupt ID249 Priority/Priority Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " INTID248 ,Interrupt ID248 Priority/Priority Byte Offset 248 " group.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" hexmask.long.byte 0x00 24.--31. 1. " INTID255 ,Interrupt ID255 Priority/Priority Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " INTID254 ,Interrupt ID254 Priority/Priority Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " INTID253 ,Interrupt ID253 Priority/Priority Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " INTID252 ,Interrupt ID252 Priority/Priority Byte Offset 252 " else rgroup.long 0x4E0++0x03 line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56" rgroup.long 0x4E4++0x03 line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57" rgroup.long 0x4E8++0x03 line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58" rgroup.long 0x4EC++0x03 line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59" rgroup.long 0x4F0++0x03 line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60" rgroup.long 0x4F4++0x03 line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61" rgroup.long 0x4F8++0x03 line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62" rgroup.long 0x4FC++0x03 line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" hexmask.long.byte 0x00 24.--31. 1. " INTID259 ,Interrupt ID259 Priority/Priority Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " INTID258 ,Interrupt ID258 Priority/Priority Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " INTID257 ,Interrupt ID257 Priority/Priority Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " INTID256 ,Interrupt ID256 Priority/Priority Byte Offset 256 " group.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" hexmask.long.byte 0x00 24.--31. 1. " INTID263 ,Interrupt ID263 Priority/Priority Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " INTID262 ,Interrupt ID262 Priority/Priority Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " INTID261 ,Interrupt ID261 Priority/Priority Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " INTID260 ,Interrupt ID260 Priority/Priority Byte Offset 260 " group.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" hexmask.long.byte 0x00 24.--31. 1. " INTID267 ,Interrupt ID267 Priority/Priority Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " INTID266 ,Interrupt ID266 Priority/Priority Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " INTID265 ,Interrupt ID265 Priority/Priority Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " INTID264 ,Interrupt ID264 Priority/Priority Byte Offset 264 " group.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" hexmask.long.byte 0x00 24.--31. 1. " INTID271 ,Interrupt ID271 Priority/Priority Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " INTID270 ,Interrupt ID270 Priority/Priority Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " INTID269 ,Interrupt ID269 Priority/Priority Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " INTID268 ,Interrupt ID268 Priority/Priority Byte Offset 268 " group.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" hexmask.long.byte 0x00 24.--31. 1. " INTID275 ,Interrupt ID275 Priority/Priority Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " INTID274 ,Interrupt ID274 Priority/Priority Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " INTID273 ,Interrupt ID273 Priority/Priority Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " INTID272 ,Interrupt ID272 Priority/Priority Byte Offset 272 " group.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" hexmask.long.byte 0x00 24.--31. 1. " INTID279 ,Interrupt ID279 Priority/Priority Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " INTID278 ,Interrupt ID278 Priority/Priority Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " INTID277 ,Interrupt ID277 Priority/Priority Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " INTID276 ,Interrupt ID276 Priority/Priority Byte Offset 276 " group.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" hexmask.long.byte 0x00 24.--31. 1. " INTID283 ,Interrupt ID283 Priority/Priority Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " INTID282 ,Interrupt ID282 Priority/Priority Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " INTID281 ,Interrupt ID281 Priority/Priority Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " INTID280 ,Interrupt ID280 Priority/Priority Byte Offset 280 " group.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" hexmask.long.byte 0x00 24.--31. 1. " INTID287 ,Interrupt ID287 Priority/Priority Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " INTID286 ,Interrupt ID286 Priority/Priority Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " INTID285 ,Interrupt ID285 Priority/Priority Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " INTID284 ,Interrupt ID284 Priority/Priority Byte Offset 284 " else rgroup.long 0x500++0x03 line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64" rgroup.long 0x504++0x03 line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65" rgroup.long 0x508++0x03 line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66" rgroup.long 0x50C++0x03 line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67" rgroup.long 0x510++0x03 line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68" rgroup.long 0x514++0x03 line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69" rgroup.long 0x518++0x03 line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70" rgroup.long 0x51C++0x03 line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" hexmask.long.byte 0x00 24.--31. 1. " INTID291 ,Interrupt ID291 Priority/Priority Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " INTID290 ,Interrupt ID290 Priority/Priority Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " INTID289 ,Interrupt ID289 Priority/Priority Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " INTID288 ,Interrupt ID288 Priority/Priority Byte Offset 288 " group.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" hexmask.long.byte 0x00 24.--31. 1. " INTID295 ,Interrupt ID295 Priority/Priority Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " INTID294 ,Interrupt ID294 Priority/Priority Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " INTID293 ,Interrupt ID293 Priority/Priority Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " INTID292 ,Interrupt ID292 Priority/Priority Byte Offset 292 " group.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" hexmask.long.byte 0x00 24.--31. 1. " INTID299 ,Interrupt ID299 Priority/Priority Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " INTID298 ,Interrupt ID298 Priority/Priority Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " INTID297 ,Interrupt ID297 Priority/Priority Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " INTID296 ,Interrupt ID296 Priority/Priority Byte Offset 296 " group.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" hexmask.long.byte 0x00 24.--31. 1. " INTID303 ,Interrupt ID303 Priority/Priority Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " INTID302 ,Interrupt ID302 Priority/Priority Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " INTID301 ,Interrupt ID301 Priority/Priority Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " INTID300 ,Interrupt ID300 Priority/Priority Byte Offset 300 " group.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" hexmask.long.byte 0x00 24.--31. 1. " INTID307 ,Interrupt ID307 Priority/Priority Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " INTID306 ,Interrupt ID306 Priority/Priority Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " INTID305 ,Interrupt ID305 Priority/Priority Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " INTID304 ,Interrupt ID304 Priority/Priority Byte Offset 304 " group.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" hexmask.long.byte 0x00 24.--31. 1. " INTID311 ,Interrupt ID311 Priority/Priority Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " INTID310 ,Interrupt ID310 Priority/Priority Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " INTID309 ,Interrupt ID309 Priority/Priority Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " INTID308 ,Interrupt ID308 Priority/Priority Byte Offset 308 " group.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" hexmask.long.byte 0x00 24.--31. 1. " INTID315 ,Interrupt ID315 Priority/Priority Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " INTID314 ,Interrupt ID314 Priority/Priority Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " INTID313 ,Interrupt ID313 Priority/Priority Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " INTID312 ,Interrupt ID312 Priority/Priority Byte Offset 312 " group.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" hexmask.long.byte 0x00 24.--31. 1. " INTID319 ,Interrupt ID319 Priority/Priority Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " INTID318 ,Interrupt ID318 Priority/Priority Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " INTID317 ,Interrupt ID317 Priority/Priority Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " INTID316 ,Interrupt ID316 Priority/Priority Byte Offset 316 " else rgroup.long 0x520++0x03 line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72" rgroup.long 0x524++0x03 line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73" rgroup.long 0x528++0x03 line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74" rgroup.long 0x52C++0x03 line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75" rgroup.long 0x530++0x03 line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76" rgroup.long 0x534++0x03 line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77" rgroup.long 0x538++0x03 line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78" rgroup.long 0x53C++0x03 line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" hexmask.long.byte 0x00 24.--31. 1. " INTID323 ,Interrupt ID323 Priority/Priority Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " INTID322 ,Interrupt ID322 Priority/Priority Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " INTID321 ,Interrupt ID321 Priority/Priority Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " INTID320 ,Interrupt ID320 Priority/Priority Byte Offset 320 " group.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" hexmask.long.byte 0x00 24.--31. 1. " INTID327 ,Interrupt ID327 Priority/Priority Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " INTID326 ,Interrupt ID326 Priority/Priority Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " INTID325 ,Interrupt ID325 Priority/Priority Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " INTID324 ,Interrupt ID324 Priority/Priority Byte Offset 324 " group.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" hexmask.long.byte 0x00 24.--31. 1. " INTID331 ,Interrupt ID331 Priority/Priority Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " INTID330 ,Interrupt ID330 Priority/Priority Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " INTID329 ,Interrupt ID329 Priority/Priority Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " INTID328 ,Interrupt ID328 Priority/Priority Byte Offset 328 " group.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" hexmask.long.byte 0x00 24.--31. 1. " INTID335 ,Interrupt ID335 Priority/Priority Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " INTID334 ,Interrupt ID334 Priority/Priority Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " INTID333 ,Interrupt ID333 Priority/Priority Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " INTID332 ,Interrupt ID332 Priority/Priority Byte Offset 332 " group.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" hexmask.long.byte 0x00 24.--31. 1. " INTID339 ,Interrupt ID339 Priority/Priority Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " INTID338 ,Interrupt ID338 Priority/Priority Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " INTID337 ,Interrupt ID337 Priority/Priority Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " INTID336 ,Interrupt ID336 Priority/Priority Byte Offset 336 " group.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" hexmask.long.byte 0x00 24.--31. 1. " INTID343 ,Interrupt ID343 Priority/Priority Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " INTID342 ,Interrupt ID342 Priority/Priority Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " INTID341 ,Interrupt ID341 Priority/Priority Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " INTID340 ,Interrupt ID340 Priority/Priority Byte Offset 340 " group.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" hexmask.long.byte 0x00 24.--31. 1. " INTID347 ,Interrupt ID347 Priority/Priority Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " INTID346 ,Interrupt ID346 Priority/Priority Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " INTID345 ,Interrupt ID345 Priority/Priority Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " INTID344 ,Interrupt ID344 Priority/Priority Byte Offset 344 " group.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" hexmask.long.byte 0x00 24.--31. 1. " INTID351 ,Interrupt ID351 Priority/Priority Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " INTID350 ,Interrupt ID350 Priority/Priority Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " INTID349 ,Interrupt ID349 Priority/Priority Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " INTID348 ,Interrupt ID348 Priority/Priority Byte Offset 348 " else rgroup.long 0x540++0x03 line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80" rgroup.long 0x544++0x03 line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81" rgroup.long 0x548++0x03 line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82" rgroup.long 0x54C++0x03 line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83" rgroup.long 0x550++0x03 line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84" rgroup.long 0x554++0x03 line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85" rgroup.long 0x558++0x03 line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86" rgroup.long 0x55C++0x03 line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" hexmask.long.byte 0x00 24.--31. 1. " INTID355 ,Interrupt ID355 Priority/Priority Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " INTID354 ,Interrupt ID354 Priority/Priority Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " INTID353 ,Interrupt ID353 Priority/Priority Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " INTID352 ,Interrupt ID352 Priority/Priority Byte Offset 352 " group.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" hexmask.long.byte 0x00 24.--31. 1. " INTID359 ,Interrupt ID359 Priority/Priority Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " INTID358 ,Interrupt ID358 Priority/Priority Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " INTID357 ,Interrupt ID357 Priority/Priority Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " INTID356 ,Interrupt ID356 Priority/Priority Byte Offset 356 " group.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" hexmask.long.byte 0x00 24.--31. 1. " INTID363 ,Interrupt ID363 Priority/Priority Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " INTID362 ,Interrupt ID362 Priority/Priority Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " INTID361 ,Interrupt ID361 Priority/Priority Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " INTID360 ,Interrupt ID360 Priority/Priority Byte Offset 360 " group.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" hexmask.long.byte 0x00 24.--31. 1. " INTID367 ,Interrupt ID367 Priority/Priority Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " INTID366 ,Interrupt ID366 Priority/Priority Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " INTID365 ,Interrupt ID365 Priority/Priority Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " INTID364 ,Interrupt ID364 Priority/Priority Byte Offset 364 " group.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" hexmask.long.byte 0x00 24.--31. 1. " INTID371 ,Interrupt ID371 Priority/Priority Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " INTID370 ,Interrupt ID370 Priority/Priority Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " INTID369 ,Interrupt ID369 Priority/Priority Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " INTID368 ,Interrupt ID368 Priority/Priority Byte Offset 368 " group.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" hexmask.long.byte 0x00 24.--31. 1. " INTID375 ,Interrupt ID375 Priority/Priority Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " INTID374 ,Interrupt ID374 Priority/Priority Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " INTID373 ,Interrupt ID373 Priority/Priority Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " INTID372 ,Interrupt ID372 Priority/Priority Byte Offset 372 " group.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" hexmask.long.byte 0x00 24.--31. 1. " INTID379 ,Interrupt ID379 Priority/Priority Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " INTID378 ,Interrupt ID378 Priority/Priority Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " INTID377 ,Interrupt ID377 Priority/Priority Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " INTID376 ,Interrupt ID376 Priority/Priority Byte Offset 376 " group.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" hexmask.long.byte 0x00 24.--31. 1. " INTID383 ,Interrupt ID383 Priority/Priority Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " INTID382 ,Interrupt ID382 Priority/Priority Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " INTID381 ,Interrupt ID381 Priority/Priority Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " INTID380 ,Interrupt ID380 Priority/Priority Byte Offset 380 " else rgroup.long 0x560++0x03 line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88" rgroup.long 0x564++0x03 line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89" rgroup.long 0x568++0x03 line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90" rgroup.long 0x56C++0x03 line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91" rgroup.long 0x570++0x03 line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92" rgroup.long 0x574++0x03 line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93" rgroup.long 0x578++0x03 line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94" rgroup.long 0x57C++0x03 line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" hexmask.long.byte 0x00 24.--31. 1. " INTID387 ,Interrupt ID387 Priority/Priority Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " INTID386 ,Interrupt ID386 Priority/Priority Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " INTID385 ,Interrupt ID385 Priority/Priority Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " INTID384 ,Interrupt ID384 Priority/Priority Byte Offset 384 " group.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" hexmask.long.byte 0x00 24.--31. 1. " INTID391 ,Interrupt ID391 Priority/Priority Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " INTID390 ,Interrupt ID390 Priority/Priority Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " INTID389 ,Interrupt ID389 Priority/Priority Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " INTID388 ,Interrupt ID388 Priority/Priority Byte Offset 388 " group.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" hexmask.long.byte 0x00 24.--31. 1. " INTID395 ,Interrupt ID395 Priority/Priority Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " INTID394 ,Interrupt ID394 Priority/Priority Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " INTID393 ,Interrupt ID393 Priority/Priority Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " INTID392 ,Interrupt ID392 Priority/Priority Byte Offset 392 " group.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" hexmask.long.byte 0x00 24.--31. 1. " INTID399 ,Interrupt ID399 Priority/Priority Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " INTID398 ,Interrupt ID398 Priority/Priority Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " INTID397 ,Interrupt ID397 Priority/Priority Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " INTID396 ,Interrupt ID396 Priority/Priority Byte Offset 396 " group.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" hexmask.long.byte 0x00 24.--31. 1. " INTID403 ,Interrupt ID403 Priority/Priority Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " INTID402 ,Interrupt ID402 Priority/Priority Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " INTID401 ,Interrupt ID401 Priority/Priority Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " INTID400 ,Interrupt ID400 Priority/Priority Byte Offset 400 " group.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" hexmask.long.byte 0x00 24.--31. 1. " INTID407 ,Interrupt ID407 Priority/Priority Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " INTID406 ,Interrupt ID406 Priority/Priority Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " INTID405 ,Interrupt ID405 Priority/Priority Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " INTID404 ,Interrupt ID404 Priority/Priority Byte Offset 404 " group.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" hexmask.long.byte 0x00 24.--31. 1. " INTID411 ,Interrupt ID411 Priority/Priority Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " INTID410 ,Interrupt ID410 Priority/Priority Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " INTID409 ,Interrupt ID409 Priority/Priority Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " INTID408 ,Interrupt ID408 Priority/Priority Byte Offset 408 " group.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" hexmask.long.byte 0x00 24.--31. 1. " INTID415 ,Interrupt ID415 Priority/Priority Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " INTID414 ,Interrupt ID414 Priority/Priority Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " INTID413 ,Interrupt ID413 Priority/Priority Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " INTID412 ,Interrupt ID412 Priority/Priority Byte Offset 412 " else rgroup.long 0x580++0x03 line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96" rgroup.long 0x584++0x03 line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97" rgroup.long 0x588++0x03 line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98" rgroup.long 0x58C++0x03 line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99" rgroup.long 0x590++0x03 line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100" rgroup.long 0x594++0x03 line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101" rgroup.long 0x598++0x03 line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102" rgroup.long 0x59C++0x03 line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" hexmask.long.byte 0x00 24.--31. 1. " INTID419 ,Interrupt ID419 Priority/Priority Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " INTID418 ,Interrupt ID418 Priority/Priority Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " INTID417 ,Interrupt ID417 Priority/Priority Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " INTID416 ,Interrupt ID416 Priority/Priority Byte Offset 416 " group.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" hexmask.long.byte 0x00 24.--31. 1. " INTID423 ,Interrupt ID423 Priority/Priority Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " INTID422 ,Interrupt ID422 Priority/Priority Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " INTID421 ,Interrupt ID421 Priority/Priority Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " INTID420 ,Interrupt ID420 Priority/Priority Byte Offset 420 " group.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" hexmask.long.byte 0x00 24.--31. 1. " INTID427 ,Interrupt ID427 Priority/Priority Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " INTID426 ,Interrupt ID426 Priority/Priority Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " INTID425 ,Interrupt ID425 Priority/Priority Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " INTID424 ,Interrupt ID424 Priority/Priority Byte Offset 424 " group.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" hexmask.long.byte 0x00 24.--31. 1. " INTID431 ,Interrupt ID431 Priority/Priority Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " INTID430 ,Interrupt ID430 Priority/Priority Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " INTID429 ,Interrupt ID429 Priority/Priority Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " INTID428 ,Interrupt ID428 Priority/Priority Byte Offset 428 " group.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" hexmask.long.byte 0x00 24.--31. 1. " INTID435 ,Interrupt ID435 Priority/Priority Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " INTID434 ,Interrupt ID434 Priority/Priority Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " INTID433 ,Interrupt ID433 Priority/Priority Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " INTID432 ,Interrupt ID432 Priority/Priority Byte Offset 432 " group.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" hexmask.long.byte 0x00 24.--31. 1. " INTID439 ,Interrupt ID439 Priority/Priority Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " INTID438 ,Interrupt ID438 Priority/Priority Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " INTID437 ,Interrupt ID437 Priority/Priority Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " INTID436 ,Interrupt ID436 Priority/Priority Byte Offset 436 " group.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" hexmask.long.byte 0x00 24.--31. 1. " INTID443 ,Interrupt ID443 Priority/Priority Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " INTID442 ,Interrupt ID442 Priority/Priority Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " INTID441 ,Interrupt ID441 Priority/Priority Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " INTID440 ,Interrupt ID440 Priority/Priority Byte Offset 440 " group.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" hexmask.long.byte 0x00 24.--31. 1. " INTID447 ,Interrupt ID447 Priority/Priority Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " INTID446 ,Interrupt ID446 Priority/Priority Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " INTID445 ,Interrupt ID445 Priority/Priority Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " INTID444 ,Interrupt ID444 Priority/Priority Byte Offset 444 " else rgroup.long 0x5A0++0x03 line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104" rgroup.long 0x5A4++0x03 line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105" rgroup.long 0x5A8++0x03 line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106" rgroup.long 0x5AC++0x03 line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107" rgroup.long 0x5B0++0x03 line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108" rgroup.long 0x5B4++0x03 line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109" rgroup.long 0x5B8++0x03 line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110" rgroup.long 0x5BC++0x03 line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" hexmask.long.byte 0x00 24.--31. 1. " INTID451 ,Interrupt ID451 Priority/Priority Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " INTID450 ,Interrupt ID450 Priority/Priority Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " INTID449 ,Interrupt ID449 Priority/Priority Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " INTID448 ,Interrupt ID448 Priority/Priority Byte Offset 448 " group.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" hexmask.long.byte 0x00 24.--31. 1. " INTID455 ,Interrupt ID455 Priority/Priority Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " INTID454 ,Interrupt ID454 Priority/Priority Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " INTID453 ,Interrupt ID453 Priority/Priority Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " INTID452 ,Interrupt ID452 Priority/Priority Byte Offset 452 " group.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" hexmask.long.byte 0x00 24.--31. 1. " INTID459 ,Interrupt ID459 Priority/Priority Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " INTID458 ,Interrupt ID458 Priority/Priority Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " INTID457 ,Interrupt ID457 Priority/Priority Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " INTID456 ,Interrupt ID456 Priority/Priority Byte Offset 456 " group.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" hexmask.long.byte 0x00 24.--31. 1. " INTID463 ,Interrupt ID463 Priority/Priority Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " INTID462 ,Interrupt ID462 Priority/Priority Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " INTID461 ,Interrupt ID461 Priority/Priority Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " INTID460 ,Interrupt ID460 Priority/Priority Byte Offset 460 " group.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" hexmask.long.byte 0x00 24.--31. 1. " INTID467 ,Interrupt ID467 Priority/Priority Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " INTID466 ,Interrupt ID466 Priority/Priority Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " INTID465 ,Interrupt ID465 Priority/Priority Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " INTID464 ,Interrupt ID464 Priority/Priority Byte Offset 464 " group.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" hexmask.long.byte 0x00 24.--31. 1. " INTID471 ,Interrupt ID471 Priority/Priority Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " INTID470 ,Interrupt ID470 Priority/Priority Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " INTID469 ,Interrupt ID469 Priority/Priority Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " INTID468 ,Interrupt ID468 Priority/Priority Byte Offset 468 " group.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" hexmask.long.byte 0x00 24.--31. 1. " INTID475 ,Interrupt ID475 Priority/Priority Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " INTID474 ,Interrupt ID474 Priority/Priority Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " INTID473 ,Interrupt ID473 Priority/Priority Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " INTID472 ,Interrupt ID472 Priority/Priority Byte Offset 472 " group.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" hexmask.long.byte 0x00 24.--31. 1. " INTID479 ,Interrupt ID479 Priority/Priority Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " INTID478 ,Interrupt ID478 Priority/Priority Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " INTID477 ,Interrupt ID477 Priority/Priority Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " INTID476 ,Interrupt ID476 Priority/Priority Byte Offset 476 " else rgroup.long 0x5C0++0x03 line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112" rgroup.long 0x5C4++0x03 line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113" rgroup.long 0x5C8++0x03 line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114" rgroup.long 0x5CC++0x03 line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115" rgroup.long 0x5D0++0x03 line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116" rgroup.long 0x5D4++0x03 line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117" rgroup.long 0x5D8++0x03 line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118" rgroup.long 0x5DC++0x03 line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" hexmask.long.byte 0x00 24.--31. 1. " INTID483 ,Interrupt ID483 Priority/Priority Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " INTID482 ,Interrupt ID482 Priority/Priority Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " INTID481 ,Interrupt ID481 Priority/Priority Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " INTID480 ,Interrupt ID480 Priority/Priority Byte Offset 480 " group.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" hexmask.long.byte 0x00 24.--31. 1. " INTID487 ,Interrupt ID487 Priority/Priority Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " INTID486 ,Interrupt ID486 Priority/Priority Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " INTID485 ,Interrupt ID485 Priority/Priority Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " INTID484 ,Interrupt ID484 Priority/Priority Byte Offset 484 " group.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" hexmask.long.byte 0x00 24.--31. 1. " INTID491 ,Interrupt ID491 Priority/Priority Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " INTID490 ,Interrupt ID490 Priority/Priority Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " INTID489 ,Interrupt ID489 Priority/Priority Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " INTID488 ,Interrupt ID488 Priority/Priority Byte Offset 488 " group.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" hexmask.long.byte 0x00 24.--31. 1. " INTID495 ,Interrupt ID495 Priority/Priority Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " INTID494 ,Interrupt ID494 Priority/Priority Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " INTID493 ,Interrupt ID493 Priority/Priority Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " INTID492 ,Interrupt ID492 Priority/Priority Byte Offset 492 " group.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" hexmask.long.byte 0x00 24.--31. 1. " INTID499 ,Interrupt ID499 Priority/Priority Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " INTID498 ,Interrupt ID498 Priority/Priority Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " INTID497 ,Interrupt ID497 Priority/Priority Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " INTID496 ,Interrupt ID496 Priority/Priority Byte Offset 496 " group.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" hexmask.long.byte 0x00 24.--31. 1. " INTID503 ,Interrupt ID503 Priority/Priority Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " INTID502 ,Interrupt ID502 Priority/Priority Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " INTID501 ,Interrupt ID501 Priority/Priority Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " INTID500 ,Interrupt ID500 Priority/Priority Byte Offset 500 " group.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" hexmask.long.byte 0x00 24.--31. 1. " INTID507 ,Interrupt ID507 Priority/Priority Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " INTID506 ,Interrupt ID506 Priority/Priority Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " INTID505 ,Interrupt ID505 Priority/Priority Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " INTID504 ,Interrupt ID504 Priority/Priority Byte Offset 504 " group.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" hexmask.long.byte 0x00 24.--31. 1. " INTID511 ,Interrupt ID511 Priority/Priority Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " INTID510 ,Interrupt ID510 Priority/Priority Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " INTID509 ,Interrupt ID509 Priority/Priority Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " INTID508 ,Interrupt ID508 Priority/Priority Byte Offset 508 " else rgroup.long 0x5E0++0x03 line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120" rgroup.long 0x5E4++0x03 line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121" rgroup.long 0x5E8++0x03 line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122" rgroup.long 0x5EC++0x03 line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123" rgroup.long 0x5F0++0x03 line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124" rgroup.long 0x5F4++0x03 line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125" rgroup.long 0x5F8++0x03 line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126" rgroup.long 0x5FC++0x03 line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" hexmask.long.byte 0x00 24.--31. 1. " INTID515 ,Interrupt ID515 Priority/Priority Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " INTID514 ,Interrupt ID514 Priority/Priority Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " INTID513 ,Interrupt ID513 Priority/Priority Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " INTID512 ,Interrupt ID512 Priority/Priority Byte Offset 512 " group.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" hexmask.long.byte 0x00 24.--31. 1. " INTID519 ,Interrupt ID519 Priority/Priority Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " INTID518 ,Interrupt ID518 Priority/Priority Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " INTID517 ,Interrupt ID517 Priority/Priority Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " INTID516 ,Interrupt ID516 Priority/Priority Byte Offset 516 " group.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" hexmask.long.byte 0x00 24.--31. 1. " INTID523 ,Interrupt ID523 Priority/Priority Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " INTID522 ,Interrupt ID522 Priority/Priority Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " INTID521 ,Interrupt ID521 Priority/Priority Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " INTID520 ,Interrupt ID520 Priority/Priority Byte Offset 520 " group.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" hexmask.long.byte 0x00 24.--31. 1. " INTID527 ,Interrupt ID527 Priority/Priority Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " INTID526 ,Interrupt ID526 Priority/Priority Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " INTID525 ,Interrupt ID525 Priority/Priority Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " INTID524 ,Interrupt ID524 Priority/Priority Byte Offset 524 " group.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" hexmask.long.byte 0x00 24.--31. 1. " INTID531 ,Interrupt ID531 Priority/Priority Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " INTID530 ,Interrupt ID530 Priority/Priority Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " INTID529 ,Interrupt ID529 Priority/Priority Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " INTID528 ,Interrupt ID528 Priority/Priority Byte Offset 528 " group.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" hexmask.long.byte 0x00 24.--31. 1. " INTID535 ,Interrupt ID535 Priority/Priority Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " INTID534 ,Interrupt ID534 Priority/Priority Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " INTID533 ,Interrupt ID533 Priority/Priority Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " INTID532 ,Interrupt ID532 Priority/Priority Byte Offset 532 " group.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" hexmask.long.byte 0x00 24.--31. 1. " INTID539 ,Interrupt ID539 Priority/Priority Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " INTID538 ,Interrupt ID538 Priority/Priority Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " INTID537 ,Interrupt ID537 Priority/Priority Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " INTID536 ,Interrupt ID536 Priority/Priority Byte Offset 536 " group.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" hexmask.long.byte 0x00 24.--31. 1. " INTID543 ,Interrupt ID543 Priority/Priority Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " INTID542 ,Interrupt ID542 Priority/Priority Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " INTID541 ,Interrupt ID541 Priority/Priority Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " INTID540 ,Interrupt ID540 Priority/Priority Byte Offset 540 " else rgroup.long 0x600++0x03 line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128" rgroup.long 0x604++0x03 line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129" rgroup.long 0x608++0x03 line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130" rgroup.long 0x60C++0x03 line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131" rgroup.long 0x610++0x03 line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132" rgroup.long 0x614++0x03 line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133" rgroup.long 0x618++0x03 line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134" rgroup.long 0x61C++0x03 line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" hexmask.long.byte 0x00 24.--31. 1. " INTID547 ,Interrupt ID547 Priority/Priority Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " INTID546 ,Interrupt ID546 Priority/Priority Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " INTID545 ,Interrupt ID545 Priority/Priority Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " INTID544 ,Interrupt ID544 Priority/Priority Byte Offset 544 " group.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" hexmask.long.byte 0x00 24.--31. 1. " INTID551 ,Interrupt ID551 Priority/Priority Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " INTID550 ,Interrupt ID550 Priority/Priority Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " INTID549 ,Interrupt ID549 Priority/Priority Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " INTID548 ,Interrupt ID548 Priority/Priority Byte Offset 548 " group.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" hexmask.long.byte 0x00 24.--31. 1. " INTID555 ,Interrupt ID555 Priority/Priority Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " INTID554 ,Interrupt ID554 Priority/Priority Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " INTID553 ,Interrupt ID553 Priority/Priority Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " INTID552 ,Interrupt ID552 Priority/Priority Byte Offset 552 " group.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" hexmask.long.byte 0x00 24.--31. 1. " INTID559 ,Interrupt ID559 Priority/Priority Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " INTID558 ,Interrupt ID558 Priority/Priority Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " INTID557 ,Interrupt ID557 Priority/Priority Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " INTID556 ,Interrupt ID556 Priority/Priority Byte Offset 556 " group.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" hexmask.long.byte 0x00 24.--31. 1. " INTID563 ,Interrupt ID563 Priority/Priority Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " INTID562 ,Interrupt ID562 Priority/Priority Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " INTID561 ,Interrupt ID561 Priority/Priority Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " INTID560 ,Interrupt ID560 Priority/Priority Byte Offset 560 " group.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" hexmask.long.byte 0x00 24.--31. 1. " INTID567 ,Interrupt ID567 Priority/Priority Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " INTID566 ,Interrupt ID566 Priority/Priority Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " INTID565 ,Interrupt ID565 Priority/Priority Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " INTID564 ,Interrupt ID564 Priority/Priority Byte Offset 564 " group.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" hexmask.long.byte 0x00 24.--31. 1. " INTID571 ,Interrupt ID571 Priority/Priority Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " INTID570 ,Interrupt ID570 Priority/Priority Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " INTID569 ,Interrupt ID569 Priority/Priority Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " INTID568 ,Interrupt ID568 Priority/Priority Byte Offset 568 " group.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" hexmask.long.byte 0x00 24.--31. 1. " INTID575 ,Interrupt ID575 Priority/Priority Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " INTID574 ,Interrupt ID574 Priority/Priority Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " INTID573 ,Interrupt ID573 Priority/Priority Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " INTID572 ,Interrupt ID572 Priority/Priority Byte Offset 572 " else rgroup.long 0x620++0x03 line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136" rgroup.long 0x624++0x03 line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137" rgroup.long 0x628++0x03 line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138" rgroup.long 0x62C++0x03 line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139" rgroup.long 0x630++0x03 line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140" rgroup.long 0x634++0x03 line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141" rgroup.long 0x638++0x03 line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142" rgroup.long 0x63C++0x03 line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" hexmask.long.byte 0x00 24.--31. 1. " INTID579 ,Interrupt ID579 Priority/Priority Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " INTID578 ,Interrupt ID578 Priority/Priority Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " INTID577 ,Interrupt ID577 Priority/Priority Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " INTID576 ,Interrupt ID576 Priority/Priority Byte Offset 576 " group.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" hexmask.long.byte 0x00 24.--31. 1. " INTID583 ,Interrupt ID583 Priority/Priority Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " INTID582 ,Interrupt ID582 Priority/Priority Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " INTID581 ,Interrupt ID581 Priority/Priority Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " INTID580 ,Interrupt ID580 Priority/Priority Byte Offset 580 " group.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" hexmask.long.byte 0x00 24.--31. 1. " INTID587 ,Interrupt ID587 Priority/Priority Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " INTID586 ,Interrupt ID586 Priority/Priority Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " INTID585 ,Interrupt ID585 Priority/Priority Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " INTID584 ,Interrupt ID584 Priority/Priority Byte Offset 584 " group.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" hexmask.long.byte 0x00 24.--31. 1. " INTID591 ,Interrupt ID591 Priority/Priority Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " INTID590 ,Interrupt ID590 Priority/Priority Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " INTID589 ,Interrupt ID589 Priority/Priority Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " INTID588 ,Interrupt ID588 Priority/Priority Byte Offset 588 " group.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" hexmask.long.byte 0x00 24.--31. 1. " INTID595 ,Interrupt ID595 Priority/Priority Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " INTID594 ,Interrupt ID594 Priority/Priority Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " INTID593 ,Interrupt ID593 Priority/Priority Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " INTID592 ,Interrupt ID592 Priority/Priority Byte Offset 592 " group.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" hexmask.long.byte 0x00 24.--31. 1. " INTID599 ,Interrupt ID599 Priority/Priority Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " INTID598 ,Interrupt ID598 Priority/Priority Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " INTID597 ,Interrupt ID597 Priority/Priority Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " INTID596 ,Interrupt ID596 Priority/Priority Byte Offset 596 " group.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" hexmask.long.byte 0x00 24.--31. 1. " INTID603 ,Interrupt ID603 Priority/Priority Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " INTID602 ,Interrupt ID602 Priority/Priority Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " INTID601 ,Interrupt ID601 Priority/Priority Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " INTID600 ,Interrupt ID600 Priority/Priority Byte Offset 600 " group.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" hexmask.long.byte 0x00 24.--31. 1. " INTID607 ,Interrupt ID607 Priority/Priority Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " INTID606 ,Interrupt ID606 Priority/Priority Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " INTID605 ,Interrupt ID605 Priority/Priority Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " INTID604 ,Interrupt ID604 Priority/Priority Byte Offset 604 " else rgroup.long 0x640++0x03 line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144" rgroup.long 0x644++0x03 line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145" rgroup.long 0x648++0x03 line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146" rgroup.long 0x64C++0x03 line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147" rgroup.long 0x650++0x03 line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148" rgroup.long 0x654++0x03 line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149" rgroup.long 0x658++0x03 line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150" rgroup.long 0x65C++0x03 line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" hexmask.long.byte 0x00 24.--31. 1. " INTID611 ,Interrupt ID611 Priority/Priority Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " INTID610 ,Interrupt ID610 Priority/Priority Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " INTID609 ,Interrupt ID609 Priority/Priority Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " INTID608 ,Interrupt ID608 Priority/Priority Byte Offset 608 " group.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" hexmask.long.byte 0x00 24.--31. 1. " INTID615 ,Interrupt ID615 Priority/Priority Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " INTID614 ,Interrupt ID614 Priority/Priority Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " INTID613 ,Interrupt ID613 Priority/Priority Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " INTID612 ,Interrupt ID612 Priority/Priority Byte Offset 612 " group.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" hexmask.long.byte 0x00 24.--31. 1. " INTID619 ,Interrupt ID619 Priority/Priority Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " INTID618 ,Interrupt ID618 Priority/Priority Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " INTID617 ,Interrupt ID617 Priority/Priority Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " INTID616 ,Interrupt ID616 Priority/Priority Byte Offset 616 " group.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" hexmask.long.byte 0x00 24.--31. 1. " INTID623 ,Interrupt ID623 Priority/Priority Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " INTID622 ,Interrupt ID622 Priority/Priority Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " INTID621 ,Interrupt ID621 Priority/Priority Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " INTID620 ,Interrupt ID620 Priority/Priority Byte Offset 620 " group.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" hexmask.long.byte 0x00 24.--31. 1. " INTID627 ,Interrupt ID627 Priority/Priority Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " INTID626 ,Interrupt ID626 Priority/Priority Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " INTID625 ,Interrupt ID625 Priority/Priority Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " INTID624 ,Interrupt ID624 Priority/Priority Byte Offset 624 " group.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" hexmask.long.byte 0x00 24.--31. 1. " INTID631 ,Interrupt ID631 Priority/Priority Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " INTID630 ,Interrupt ID630 Priority/Priority Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " INTID629 ,Interrupt ID629 Priority/Priority Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " INTID628 ,Interrupt ID628 Priority/Priority Byte Offset 628 " group.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" hexmask.long.byte 0x00 24.--31. 1. " INTID635 ,Interrupt ID635 Priority/Priority Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " INTID634 ,Interrupt ID634 Priority/Priority Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " INTID633 ,Interrupt ID633 Priority/Priority Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " INTID632 ,Interrupt ID632 Priority/Priority Byte Offset 632 " group.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" hexmask.long.byte 0x00 24.--31. 1. " INTID639 ,Interrupt ID639 Priority/Priority Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " INTID638 ,Interrupt ID638 Priority/Priority Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " INTID637 ,Interrupt ID637 Priority/Priority Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " INTID636 ,Interrupt ID636 Priority/Priority Byte Offset 636 " else rgroup.long 0x660++0x03 line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152" rgroup.long 0x664++0x03 line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153" rgroup.long 0x668++0x03 line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154" rgroup.long 0x66C++0x03 line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155" rgroup.long 0x670++0x03 line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156" rgroup.long 0x674++0x03 line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157" rgroup.long 0x678++0x03 line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158" rgroup.long 0x67C++0x03 line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" hexmask.long.byte 0x00 24.--31. 1. " INTID643 ,Interrupt ID643 Priority/Priority Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " INTID642 ,Interrupt ID642 Priority/Priority Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " INTID641 ,Interrupt ID641 Priority/Priority Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " INTID640 ,Interrupt ID640 Priority/Priority Byte Offset 640 " group.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" hexmask.long.byte 0x00 24.--31. 1. " INTID647 ,Interrupt ID647 Priority/Priority Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " INTID646 ,Interrupt ID646 Priority/Priority Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " INTID645 ,Interrupt ID645 Priority/Priority Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " INTID644 ,Interrupt ID644 Priority/Priority Byte Offset 644 " group.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" hexmask.long.byte 0x00 24.--31. 1. " INTID651 ,Interrupt ID651 Priority/Priority Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " INTID650 ,Interrupt ID650 Priority/Priority Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " INTID649 ,Interrupt ID649 Priority/Priority Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " INTID648 ,Interrupt ID648 Priority/Priority Byte Offset 648 " group.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" hexmask.long.byte 0x00 24.--31. 1. " INTID655 ,Interrupt ID655 Priority/Priority Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " INTID654 ,Interrupt ID654 Priority/Priority Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " INTID653 ,Interrupt ID653 Priority/Priority Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " INTID652 ,Interrupt ID652 Priority/Priority Byte Offset 652 " group.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" hexmask.long.byte 0x00 24.--31. 1. " INTID659 ,Interrupt ID659 Priority/Priority Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " INTID658 ,Interrupt ID658 Priority/Priority Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " INTID657 ,Interrupt ID657 Priority/Priority Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " INTID656 ,Interrupt ID656 Priority/Priority Byte Offset 656 " group.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" hexmask.long.byte 0x00 24.--31. 1. " INTID663 ,Interrupt ID663 Priority/Priority Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " INTID662 ,Interrupt ID662 Priority/Priority Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " INTID661 ,Interrupt ID661 Priority/Priority Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " INTID660 ,Interrupt ID660 Priority/Priority Byte Offset 660 " group.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" hexmask.long.byte 0x00 24.--31. 1. " INTID667 ,Interrupt ID667 Priority/Priority Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " INTID666 ,Interrupt ID666 Priority/Priority Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " INTID665 ,Interrupt ID665 Priority/Priority Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " INTID664 ,Interrupt ID664 Priority/Priority Byte Offset 664 " group.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" hexmask.long.byte 0x00 24.--31. 1. " INTID671 ,Interrupt ID671 Priority/Priority Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " INTID670 ,Interrupt ID670 Priority/Priority Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " INTID669 ,Interrupt ID669 Priority/Priority Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " INTID668 ,Interrupt ID668 Priority/Priority Byte Offset 668 " else rgroup.long 0x680++0x03 line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160" rgroup.long 0x684++0x03 line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161" rgroup.long 0x688++0x03 line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162" rgroup.long 0x68C++0x03 line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163" rgroup.long 0x690++0x03 line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164" rgroup.long 0x694++0x03 line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165" rgroup.long 0x698++0x03 line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166" rgroup.long 0x69C++0x03 line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" hexmask.long.byte 0x00 24.--31. 1. " INTID675 ,Interrupt ID675 Priority/Priority Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " INTID674 ,Interrupt ID674 Priority/Priority Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " INTID673 ,Interrupt ID673 Priority/Priority Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " INTID672 ,Interrupt ID672 Priority/Priority Byte Offset 672 " group.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" hexmask.long.byte 0x00 24.--31. 1. " INTID679 ,Interrupt ID679 Priority/Priority Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " INTID678 ,Interrupt ID678 Priority/Priority Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " INTID677 ,Interrupt ID677 Priority/Priority Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " INTID676 ,Interrupt ID676 Priority/Priority Byte Offset 676 " group.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" hexmask.long.byte 0x00 24.--31. 1. " INTID683 ,Interrupt ID683 Priority/Priority Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " INTID682 ,Interrupt ID682 Priority/Priority Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " INTID681 ,Interrupt ID681 Priority/Priority Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " INTID680 ,Interrupt ID680 Priority/Priority Byte Offset 680 " group.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" hexmask.long.byte 0x00 24.--31. 1. " INTID687 ,Interrupt ID687 Priority/Priority Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " INTID686 ,Interrupt ID686 Priority/Priority Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " INTID685 ,Interrupt ID685 Priority/Priority Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " INTID684 ,Interrupt ID684 Priority/Priority Byte Offset 684 " group.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" hexmask.long.byte 0x00 24.--31. 1. " INTID691 ,Interrupt ID691 Priority/Priority Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " INTID690 ,Interrupt ID690 Priority/Priority Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " INTID689 ,Interrupt ID689 Priority/Priority Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " INTID688 ,Interrupt ID688 Priority/Priority Byte Offset 688 " group.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" hexmask.long.byte 0x00 24.--31. 1. " INTID695 ,Interrupt ID695 Priority/Priority Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " INTID694 ,Interrupt ID694 Priority/Priority Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " INTID693 ,Interrupt ID693 Priority/Priority Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " INTID692 ,Interrupt ID692 Priority/Priority Byte Offset 692 " group.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" hexmask.long.byte 0x00 24.--31. 1. " INTID699 ,Interrupt ID699 Priority/Priority Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " INTID698 ,Interrupt ID698 Priority/Priority Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " INTID697 ,Interrupt ID697 Priority/Priority Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " INTID696 ,Interrupt ID696 Priority/Priority Byte Offset 696 " group.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" hexmask.long.byte 0x00 24.--31. 1. " INTID703 ,Interrupt ID703 Priority/Priority Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " INTID702 ,Interrupt ID702 Priority/Priority Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " INTID701 ,Interrupt ID701 Priority/Priority Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " INTID700 ,Interrupt ID700 Priority/Priority Byte Offset 700 " else rgroup.long 0x6A0++0x03 line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168" rgroup.long 0x6A4++0x03 line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169" rgroup.long 0x6A8++0x03 line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170" rgroup.long 0x6AC++0x03 line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171" rgroup.long 0x6B0++0x03 line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172" rgroup.long 0x6B4++0x03 line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173" rgroup.long 0x6B8++0x03 line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174" rgroup.long 0x6BC++0x03 line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" hexmask.long.byte 0x00 24.--31. 1. " INTID707 ,Interrupt ID707 Priority/Priority Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " INTID706 ,Interrupt ID706 Priority/Priority Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " INTID705 ,Interrupt ID705 Priority/Priority Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " INTID704 ,Interrupt ID704 Priority/Priority Byte Offset 704 " group.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" hexmask.long.byte 0x00 24.--31. 1. " INTID711 ,Interrupt ID711 Priority/Priority Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " INTID710 ,Interrupt ID710 Priority/Priority Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " INTID709 ,Interrupt ID709 Priority/Priority Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " INTID708 ,Interrupt ID708 Priority/Priority Byte Offset 708 " group.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" hexmask.long.byte 0x00 24.--31. 1. " INTID715 ,Interrupt ID715 Priority/Priority Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " INTID714 ,Interrupt ID714 Priority/Priority Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " INTID713 ,Interrupt ID713 Priority/Priority Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " INTID712 ,Interrupt ID712 Priority/Priority Byte Offset 712 " group.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" hexmask.long.byte 0x00 24.--31. 1. " INTID719 ,Interrupt ID719 Priority/Priority Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " INTID718 ,Interrupt ID718 Priority/Priority Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " INTID717 ,Interrupt ID717 Priority/Priority Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " INTID716 ,Interrupt ID716 Priority/Priority Byte Offset 716 " group.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" hexmask.long.byte 0x00 24.--31. 1. " INTID723 ,Interrupt ID723 Priority/Priority Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " INTID722 ,Interrupt ID722 Priority/Priority Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " INTID721 ,Interrupt ID721 Priority/Priority Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " INTID720 ,Interrupt ID720 Priority/Priority Byte Offset 720 " group.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" hexmask.long.byte 0x00 24.--31. 1. " INTID727 ,Interrupt ID727 Priority/Priority Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " INTID726 ,Interrupt ID726 Priority/Priority Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " INTID725 ,Interrupt ID725 Priority/Priority Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " INTID724 ,Interrupt ID724 Priority/Priority Byte Offset 724 " group.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" hexmask.long.byte 0x00 24.--31. 1. " INTID731 ,Interrupt ID731 Priority/Priority Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " INTID730 ,Interrupt ID730 Priority/Priority Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " INTID729 ,Interrupt ID729 Priority/Priority Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " INTID728 ,Interrupt ID728 Priority/Priority Byte Offset 728 " group.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" hexmask.long.byte 0x00 24.--31. 1. " INTID735 ,Interrupt ID735 Priority/Priority Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " INTID734 ,Interrupt ID734 Priority/Priority Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " INTID733 ,Interrupt ID733 Priority/Priority Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " INTID732 ,Interrupt ID732 Priority/Priority Byte Offset 732 " else rgroup.long 0x6C0++0x03 line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176" rgroup.long 0x6C4++0x03 line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177" rgroup.long 0x6C8++0x03 line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178" rgroup.long 0x6CC++0x03 line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179" rgroup.long 0x6D0++0x03 line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180" rgroup.long 0x6D4++0x03 line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181" rgroup.long 0x6D8++0x03 line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182" rgroup.long 0x6DC++0x03 line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" hexmask.long.byte 0x00 24.--31. 1. " INTID739 ,Interrupt ID739 Priority/Priority Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " INTID738 ,Interrupt ID738 Priority/Priority Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " INTID737 ,Interrupt ID737 Priority/Priority Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " INTID736 ,Interrupt ID736 Priority/Priority Byte Offset 736 " group.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" hexmask.long.byte 0x00 24.--31. 1. " INTID743 ,Interrupt ID743 Priority/Priority Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " INTID742 ,Interrupt ID742 Priority/Priority Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " INTID741 ,Interrupt ID741 Priority/Priority Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " INTID740 ,Interrupt ID740 Priority/Priority Byte Offset 740 " group.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" hexmask.long.byte 0x00 24.--31. 1. " INTID747 ,Interrupt ID747 Priority/Priority Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " INTID746 ,Interrupt ID746 Priority/Priority Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " INTID745 ,Interrupt ID745 Priority/Priority Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " INTID744 ,Interrupt ID744 Priority/Priority Byte Offset 744 " group.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" hexmask.long.byte 0x00 24.--31. 1. " INTID751 ,Interrupt ID751 Priority/Priority Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " INTID750 ,Interrupt ID750 Priority/Priority Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " INTID749 ,Interrupt ID749 Priority/Priority Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " INTID748 ,Interrupt ID748 Priority/Priority Byte Offset 748 " group.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" hexmask.long.byte 0x00 24.--31. 1. " INTID755 ,Interrupt ID755 Priority/Priority Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " INTID754 ,Interrupt ID754 Priority/Priority Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " INTID753 ,Interrupt ID753 Priority/Priority Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " INTID752 ,Interrupt ID752 Priority/Priority Byte Offset 752 " group.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" hexmask.long.byte 0x00 24.--31. 1. " INTID759 ,Interrupt ID759 Priority/Priority Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " INTID758 ,Interrupt ID758 Priority/Priority Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " INTID757 ,Interrupt ID757 Priority/Priority Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " INTID756 ,Interrupt ID756 Priority/Priority Byte Offset 756 " group.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" hexmask.long.byte 0x00 24.--31. 1. " INTID763 ,Interrupt ID763 Priority/Priority Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " INTID762 ,Interrupt ID762 Priority/Priority Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " INTID761 ,Interrupt ID761 Priority/Priority Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " INTID760 ,Interrupt ID760 Priority/Priority Byte Offset 760 " group.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" hexmask.long.byte 0x00 24.--31. 1. " INTID767 ,Interrupt ID767 Priority/Priority Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " INTID766 ,Interrupt ID766 Priority/Priority Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " INTID765 ,Interrupt ID765 Priority/Priority Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " INTID764 ,Interrupt ID764 Priority/Priority Byte Offset 764 " else rgroup.long 0x6E0++0x03 line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184" rgroup.long 0x6E4++0x03 line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185" rgroup.long 0x6E8++0x03 line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186" rgroup.long 0x6EC++0x03 line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187" rgroup.long 0x6F0++0x03 line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188" rgroup.long 0x6F4++0x03 line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189" rgroup.long 0x6F8++0x03 line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190" rgroup.long 0x6FC++0x03 line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" hexmask.long.byte 0x00 24.--31. 1. " INTID771 ,Interrupt ID771 Priority/Priority Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " INTID770 ,Interrupt ID770 Priority/Priority Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " INTID769 ,Interrupt ID769 Priority/Priority Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " INTID768 ,Interrupt ID768 Priority/Priority Byte Offset 768 " group.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" hexmask.long.byte 0x00 24.--31. 1. " INTID775 ,Interrupt ID775 Priority/Priority Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " INTID774 ,Interrupt ID774 Priority/Priority Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " INTID773 ,Interrupt ID773 Priority/Priority Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " INTID772 ,Interrupt ID772 Priority/Priority Byte Offset 772 " group.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" hexmask.long.byte 0x00 24.--31. 1. " INTID779 ,Interrupt ID779 Priority/Priority Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " INTID778 ,Interrupt ID778 Priority/Priority Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " INTID777 ,Interrupt ID777 Priority/Priority Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " INTID776 ,Interrupt ID776 Priority/Priority Byte Offset 776 " group.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" hexmask.long.byte 0x00 24.--31. 1. " INTID783 ,Interrupt ID783 Priority/Priority Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " INTID782 ,Interrupt ID782 Priority/Priority Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " INTID781 ,Interrupt ID781 Priority/Priority Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " INTID780 ,Interrupt ID780 Priority/Priority Byte Offset 780 " group.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" hexmask.long.byte 0x00 24.--31. 1. " INTID787 ,Interrupt ID787 Priority/Priority Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " INTID786 ,Interrupt ID786 Priority/Priority Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " INTID785 ,Interrupt ID785 Priority/Priority Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " INTID784 ,Interrupt ID784 Priority/Priority Byte Offset 784 " group.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" hexmask.long.byte 0x00 24.--31. 1. " INTID791 ,Interrupt ID791 Priority/Priority Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " INTID790 ,Interrupt ID790 Priority/Priority Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " INTID789 ,Interrupt ID789 Priority/Priority Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " INTID788 ,Interrupt ID788 Priority/Priority Byte Offset 788 " group.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" hexmask.long.byte 0x00 24.--31. 1. " INTID795 ,Interrupt ID795 Priority/Priority Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " INTID794 ,Interrupt ID794 Priority/Priority Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " INTID793 ,Interrupt ID793 Priority/Priority Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " INTID792 ,Interrupt ID792 Priority/Priority Byte Offset 792 " group.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" hexmask.long.byte 0x00 24.--31. 1. " INTID799 ,Interrupt ID799 Priority/Priority Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " INTID798 ,Interrupt ID798 Priority/Priority Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " INTID797 ,Interrupt ID797 Priority/Priority Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " INTID796 ,Interrupt ID796 Priority/Priority Byte Offset 796 " else rgroup.long 0x700++0x03 line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192" rgroup.long 0x704++0x03 line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193" rgroup.long 0x708++0x03 line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194" rgroup.long 0x70C++0x03 line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195" rgroup.long 0x710++0x03 line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196" rgroup.long 0x714++0x03 line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197" rgroup.long 0x718++0x03 line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198" rgroup.long 0x71C++0x03 line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" hexmask.long.byte 0x00 24.--31. 1. " INTID803 ,Interrupt ID803 Priority/Priority Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " INTID802 ,Interrupt ID802 Priority/Priority Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " INTID801 ,Interrupt ID801 Priority/Priority Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " INTID800 ,Interrupt ID800 Priority/Priority Byte Offset 800 " group.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" hexmask.long.byte 0x00 24.--31. 1. " INTID807 ,Interrupt ID807 Priority/Priority Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " INTID806 ,Interrupt ID806 Priority/Priority Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " INTID805 ,Interrupt ID805 Priority/Priority Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " INTID804 ,Interrupt ID804 Priority/Priority Byte Offset 804 " group.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" hexmask.long.byte 0x00 24.--31. 1. " INTID811 ,Interrupt ID811 Priority/Priority Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " INTID810 ,Interrupt ID810 Priority/Priority Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " INTID809 ,Interrupt ID809 Priority/Priority Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " INTID808 ,Interrupt ID808 Priority/Priority Byte Offset 808 " group.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" hexmask.long.byte 0x00 24.--31. 1. " INTID815 ,Interrupt ID815 Priority/Priority Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " INTID814 ,Interrupt ID814 Priority/Priority Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " INTID813 ,Interrupt ID813 Priority/Priority Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " INTID812 ,Interrupt ID812 Priority/Priority Byte Offset 812 " group.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" hexmask.long.byte 0x00 24.--31. 1. " INTID819 ,Interrupt ID819 Priority/Priority Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " INTID818 ,Interrupt ID818 Priority/Priority Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " INTID817 ,Interrupt ID817 Priority/Priority Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " INTID816 ,Interrupt ID816 Priority/Priority Byte Offset 816 " group.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" hexmask.long.byte 0x00 24.--31. 1. " INTID823 ,Interrupt ID823 Priority/Priority Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " INTID822 ,Interrupt ID822 Priority/Priority Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " INTID821 ,Interrupt ID821 Priority/Priority Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " INTID820 ,Interrupt ID820 Priority/Priority Byte Offset 820 " group.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" hexmask.long.byte 0x00 24.--31. 1. " INTID827 ,Interrupt ID827 Priority/Priority Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " INTID826 ,Interrupt ID826 Priority/Priority Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " INTID825 ,Interrupt ID825 Priority/Priority Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " INTID824 ,Interrupt ID824 Priority/Priority Byte Offset 824 " group.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" hexmask.long.byte 0x00 24.--31. 1. " INTID831 ,Interrupt ID831 Priority/Priority Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " INTID830 ,Interrupt ID830 Priority/Priority Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " INTID829 ,Interrupt ID829 Priority/Priority Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " INTID828 ,Interrupt ID828 Priority/Priority Byte Offset 828 " else rgroup.long 0x720++0x03 line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200" rgroup.long 0x724++0x03 line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201" rgroup.long 0x728++0x03 line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202" rgroup.long 0x72C++0x03 line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203" rgroup.long 0x730++0x03 line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204" rgroup.long 0x734++0x03 line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205" rgroup.long 0x738++0x03 line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206" rgroup.long 0x73C++0x03 line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" hexmask.long.byte 0x00 24.--31. 1. " INTID835 ,Interrupt ID835 Priority/Priority Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " INTID834 ,Interrupt ID834 Priority/Priority Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " INTID833 ,Interrupt ID833 Priority/Priority Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " INTID832 ,Interrupt ID832 Priority/Priority Byte Offset 832 " group.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" hexmask.long.byte 0x00 24.--31. 1. " INTID839 ,Interrupt ID839 Priority/Priority Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " INTID838 ,Interrupt ID838 Priority/Priority Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " INTID837 ,Interrupt ID837 Priority/Priority Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " INTID836 ,Interrupt ID836 Priority/Priority Byte Offset 836 " group.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" hexmask.long.byte 0x00 24.--31. 1. " INTID843 ,Interrupt ID843 Priority/Priority Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " INTID842 ,Interrupt ID842 Priority/Priority Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " INTID841 ,Interrupt ID841 Priority/Priority Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " INTID840 ,Interrupt ID840 Priority/Priority Byte Offset 840 " group.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" hexmask.long.byte 0x00 24.--31. 1. " INTID847 ,Interrupt ID847 Priority/Priority Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " INTID846 ,Interrupt ID846 Priority/Priority Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " INTID845 ,Interrupt ID845 Priority/Priority Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " INTID844 ,Interrupt ID844 Priority/Priority Byte Offset 844 " group.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" hexmask.long.byte 0x00 24.--31. 1. " INTID851 ,Interrupt ID851 Priority/Priority Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " INTID850 ,Interrupt ID850 Priority/Priority Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " INTID849 ,Interrupt ID849 Priority/Priority Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " INTID848 ,Interrupt ID848 Priority/Priority Byte Offset 848 " group.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" hexmask.long.byte 0x00 24.--31. 1. " INTID855 ,Interrupt ID855 Priority/Priority Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " INTID854 ,Interrupt ID854 Priority/Priority Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " INTID853 ,Interrupt ID853 Priority/Priority Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " INTID852 ,Interrupt ID852 Priority/Priority Byte Offset 852 " group.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" hexmask.long.byte 0x00 24.--31. 1. " INTID859 ,Interrupt ID859 Priority/Priority Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " INTID858 ,Interrupt ID858 Priority/Priority Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " INTID857 ,Interrupt ID857 Priority/Priority Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " INTID856 ,Interrupt ID856 Priority/Priority Byte Offset 856 " group.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" hexmask.long.byte 0x00 24.--31. 1. " INTID863 ,Interrupt ID863 Priority/Priority Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " INTID862 ,Interrupt ID862 Priority/Priority Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " INTID861 ,Interrupt ID861 Priority/Priority Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " INTID860 ,Interrupt ID860 Priority/Priority Byte Offset 860 " else rgroup.long 0x740++0x03 line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208" rgroup.long 0x744++0x03 line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209" rgroup.long 0x748++0x03 line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210" rgroup.long 0x74C++0x03 line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211" rgroup.long 0x750++0x03 line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212" rgroup.long 0x754++0x03 line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213" rgroup.long 0x758++0x03 line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214" rgroup.long 0x75C++0x03 line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" hexmask.long.byte 0x00 24.--31. 1. " INTID867 ,Interrupt ID867 Priority/Priority Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " INTID866 ,Interrupt ID866 Priority/Priority Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " INTID865 ,Interrupt ID865 Priority/Priority Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " INTID864 ,Interrupt ID864 Priority/Priority Byte Offset 864 " group.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" hexmask.long.byte 0x00 24.--31. 1. " INTID871 ,Interrupt ID871 Priority/Priority Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " INTID870 ,Interrupt ID870 Priority/Priority Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " INTID869 ,Interrupt ID869 Priority/Priority Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " INTID868 ,Interrupt ID868 Priority/Priority Byte Offset 868 " group.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" hexmask.long.byte 0x00 24.--31. 1. " INTID875 ,Interrupt ID875 Priority/Priority Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " INTID874 ,Interrupt ID874 Priority/Priority Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " INTID873 ,Interrupt ID873 Priority/Priority Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " INTID872 ,Interrupt ID872 Priority/Priority Byte Offset 872 " group.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" hexmask.long.byte 0x00 24.--31. 1. " INTID879 ,Interrupt ID879 Priority/Priority Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " INTID878 ,Interrupt ID878 Priority/Priority Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " INTID877 ,Interrupt ID877 Priority/Priority Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " INTID876 ,Interrupt ID876 Priority/Priority Byte Offset 876 " group.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" hexmask.long.byte 0x00 24.--31. 1. " INTID883 ,Interrupt ID883 Priority/Priority Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " INTID882 ,Interrupt ID882 Priority/Priority Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " INTID881 ,Interrupt ID881 Priority/Priority Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " INTID880 ,Interrupt ID880 Priority/Priority Byte Offset 880 " group.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" hexmask.long.byte 0x00 24.--31. 1. " INTID887 ,Interrupt ID887 Priority/Priority Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " INTID886 ,Interrupt ID886 Priority/Priority Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " INTID885 ,Interrupt ID885 Priority/Priority Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " INTID884 ,Interrupt ID884 Priority/Priority Byte Offset 884 " group.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" hexmask.long.byte 0x00 24.--31. 1. " INTID891 ,Interrupt ID891 Priority/Priority Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " INTID890 ,Interrupt ID890 Priority/Priority Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " INTID889 ,Interrupt ID889 Priority/Priority Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " INTID888 ,Interrupt ID888 Priority/Priority Byte Offset 888 " group.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" hexmask.long.byte 0x00 24.--31. 1. " INTID895 ,Interrupt ID895 Priority/Priority Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " INTID894 ,Interrupt ID894 Priority/Priority Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " INTID893 ,Interrupt ID893 Priority/Priority Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " INTID892 ,Interrupt ID892 Priority/Priority Byte Offset 892 " else rgroup.long 0x760++0x03 line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216" rgroup.long 0x764++0x03 line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217" rgroup.long 0x768++0x03 line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218" rgroup.long 0x76C++0x03 line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219" rgroup.long 0x770++0x03 line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220" rgroup.long 0x774++0x03 line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221" rgroup.long 0x778++0x03 line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222" rgroup.long 0x77C++0x03 line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" hexmask.long.byte 0x00 24.--31. 1. " INTID899 ,Interrupt ID899 Priority/Priority Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " INTID898 ,Interrupt ID898 Priority/Priority Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " INTID897 ,Interrupt ID897 Priority/Priority Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " INTID896 ,Interrupt ID896 Priority/Priority Byte Offset 896 " group.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" hexmask.long.byte 0x00 24.--31. 1. " INTID903 ,Interrupt ID903 Priority/Priority Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " INTID902 ,Interrupt ID902 Priority/Priority Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " INTID901 ,Interrupt ID901 Priority/Priority Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " INTID900 ,Interrupt ID900 Priority/Priority Byte Offset 900 " group.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" hexmask.long.byte 0x00 24.--31. 1. " INTID907 ,Interrupt ID907 Priority/Priority Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " INTID906 ,Interrupt ID906 Priority/Priority Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " INTID905 ,Interrupt ID905 Priority/Priority Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " INTID904 ,Interrupt ID904 Priority/Priority Byte Offset 904 " group.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" hexmask.long.byte 0x00 24.--31. 1. " INTID911 ,Interrupt ID911 Priority/Priority Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " INTID910 ,Interrupt ID910 Priority/Priority Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " INTID909 ,Interrupt ID909 Priority/Priority Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " INTID908 ,Interrupt ID908 Priority/Priority Byte Offset 908 " group.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" hexmask.long.byte 0x00 24.--31. 1. " INTID915 ,Interrupt ID915 Priority/Priority Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " INTID914 ,Interrupt ID914 Priority/Priority Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " INTID913 ,Interrupt ID913 Priority/Priority Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " INTID912 ,Interrupt ID912 Priority/Priority Byte Offset 912 " group.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" hexmask.long.byte 0x00 24.--31. 1. " INTID919 ,Interrupt ID919 Priority/Priority Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " INTID918 ,Interrupt ID918 Priority/Priority Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " INTID917 ,Interrupt ID917 Priority/Priority Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " INTID916 ,Interrupt ID916 Priority/Priority Byte Offset 916 " group.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" hexmask.long.byte 0x00 24.--31. 1. " INTID923 ,Interrupt ID923 Priority/Priority Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " INTID922 ,Interrupt ID922 Priority/Priority Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " INTID921 ,Interrupt ID921 Priority/Priority Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " INTID920 ,Interrupt ID920 Priority/Priority Byte Offset 920 " group.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" hexmask.long.byte 0x00 24.--31. 1. " INTID927 ,Interrupt ID927 Priority/Priority Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " INTID926 ,Interrupt ID926 Priority/Priority Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " INTID925 ,Interrupt ID925 Priority/Priority Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " INTID924 ,Interrupt ID924 Priority/Priority Byte Offset 924 " else rgroup.long 0x780++0x03 line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224" rgroup.long 0x784++0x03 line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225" rgroup.long 0x788++0x03 line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226" rgroup.long 0x78C++0x03 line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227" rgroup.long 0x790++0x03 line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228" rgroup.long 0x794++0x03 line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229" rgroup.long 0x798++0x03 line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230" rgroup.long 0x79C++0x03 line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" hexmask.long.byte 0x00 24.--31. 1. " INTID931 ,Interrupt ID931 Priority/Priority Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " INTID930 ,Interrupt ID930 Priority/Priority Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " INTID929 ,Interrupt ID929 Priority/Priority Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " INTID928 ,Interrupt ID928 Priority/Priority Byte Offset 928 " group.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" hexmask.long.byte 0x00 24.--31. 1. " INTID935 ,Interrupt ID935 Priority/Priority Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " INTID934 ,Interrupt ID934 Priority/Priority Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " INTID933 ,Interrupt ID933 Priority/Priority Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " INTID932 ,Interrupt ID932 Priority/Priority Byte Offset 932 " group.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" hexmask.long.byte 0x00 24.--31. 1. " INTID939 ,Interrupt ID939 Priority/Priority Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " INTID938 ,Interrupt ID938 Priority/Priority Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " INTID937 ,Interrupt ID937 Priority/Priority Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " INTID936 ,Interrupt ID936 Priority/Priority Byte Offset 936 " group.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" hexmask.long.byte 0x00 24.--31. 1. " INTID943 ,Interrupt ID943 Priority/Priority Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " INTID942 ,Interrupt ID942 Priority/Priority Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " INTID941 ,Interrupt ID941 Priority/Priority Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " INTID940 ,Interrupt ID940 Priority/Priority Byte Offset 940 " group.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" hexmask.long.byte 0x00 24.--31. 1. " INTID947 ,Interrupt ID947 Priority/Priority Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " INTID946 ,Interrupt ID946 Priority/Priority Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " INTID945 ,Interrupt ID945 Priority/Priority Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " INTID944 ,Interrupt ID944 Priority/Priority Byte Offset 944 " group.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" hexmask.long.byte 0x00 24.--31. 1. " INTID951 ,Interrupt ID951 Priority/Priority Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " INTID950 ,Interrupt ID950 Priority/Priority Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " INTID949 ,Interrupt ID949 Priority/Priority Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " INTID948 ,Interrupt ID948 Priority/Priority Byte Offset 948 " group.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" hexmask.long.byte 0x00 24.--31. 1. " INTID955 ,Interrupt ID955 Priority/Priority Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " INTID954 ,Interrupt ID954 Priority/Priority Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " INTID953 ,Interrupt ID953 Priority/Priority Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " INTID952 ,Interrupt ID952 Priority/Priority Byte Offset 952 " group.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" hexmask.long.byte 0x00 24.--31. 1. " INTID959 ,Interrupt ID959 Priority/Priority Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " INTID958 ,Interrupt ID958 Priority/Priority Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " INTID957 ,Interrupt ID957 Priority/Priority Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " INTID956 ,Interrupt ID956 Priority/Priority Byte Offset 956 " else rgroup.long 0x7A0++0x03 line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232" rgroup.long 0x7A4++0x03 line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233" rgroup.long 0x7A8++0x03 line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234" rgroup.long 0x7AC++0x03 line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235" rgroup.long 0x7B0++0x03 line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236" rgroup.long 0x7B4++0x03 line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237" rgroup.long 0x7B8++0x03 line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238" rgroup.long 0x7BC++0x03 line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" hexmask.long.byte 0x00 24.--31. 1. " INTID963 ,Interrupt ID963 Priority/Priority Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " INTID962 ,Interrupt ID962 Priority/Priority Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " INTID961 ,Interrupt ID961 Priority/Priority Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " INTID960 ,Interrupt ID960 Priority/Priority Byte Offset 960 " group.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" hexmask.long.byte 0x00 24.--31. 1. " INTID967 ,Interrupt ID967 Priority/Priority Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " INTID966 ,Interrupt ID966 Priority/Priority Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " INTID965 ,Interrupt ID965 Priority/Priority Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " INTID964 ,Interrupt ID964 Priority/Priority Byte Offset 964 " group.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" hexmask.long.byte 0x00 24.--31. 1. " INTID971 ,Interrupt ID971 Priority/Priority Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " INTID970 ,Interrupt ID970 Priority/Priority Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " INTID969 ,Interrupt ID969 Priority/Priority Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " INTID968 ,Interrupt ID968 Priority/Priority Byte Offset 968 " group.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" hexmask.long.byte 0x00 24.--31. 1. " INTID975 ,Interrupt ID975 Priority/Priority Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " INTID974 ,Interrupt ID974 Priority/Priority Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " INTID973 ,Interrupt ID973 Priority/Priority Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " INTID972 ,Interrupt ID972 Priority/Priority Byte Offset 972 " group.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" hexmask.long.byte 0x00 24.--31. 1. " INTID979 ,Interrupt ID979 Priority/Priority Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " INTID978 ,Interrupt ID978 Priority/Priority Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " INTID977 ,Interrupt ID977 Priority/Priority Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " INTID976 ,Interrupt ID976 Priority/Priority Byte Offset 976 " group.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" hexmask.long.byte 0x00 24.--31. 1. " INTID983 ,Interrupt ID983 Priority/Priority Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " INTID982 ,Interrupt ID982 Priority/Priority Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " INTID981 ,Interrupt ID981 Priority/Priority Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " INTID980 ,Interrupt ID980 Priority/Priority Byte Offset 980 " group.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" hexmask.long.byte 0x00 24.--31. 1. " INTID987 ,Interrupt ID987 Priority/Priority Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " INTID986 ,Interrupt ID986 Priority/Priority Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " INTID985 ,Interrupt ID985 Priority/Priority Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " INTID984 ,Interrupt ID984 Priority/Priority Byte Offset 984 " group.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" hexmask.long.byte 0x00 24.--31. 1. " INTID991 ,Interrupt ID991 Priority/Priority Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " INTID990 ,Interrupt ID990 Priority/Priority Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " INTID989 ,Interrupt ID989 Priority/Priority Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " INTID988 ,Interrupt ID988 Priority/Priority Byte Offset 988 " else rgroup.long 0x7C0++0x03 line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240" rgroup.long 0x7C4++0x03 line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241" rgroup.long 0x7C8++0x03 line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242" rgroup.long 0x7CC++0x03 line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243" rgroup.long 0x7D0++0x03 line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244" rgroup.long 0x7D4++0x03 line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245" rgroup.long 0x7D8++0x03 line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246" rgroup.long 0x7DC++0x03 line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1F) group.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" hexmask.long.byte 0x00 24.--31. 1. " INTID995 ,Interrupt ID995 Priority/Priority Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " INTID994 ,Interrupt ID994 Priority/Priority Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " INTID993 ,Interrupt ID993 Priority/Priority Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " INTID992 ,Interrupt ID992 Priority/Priority Byte Offset 992 " group.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" hexmask.long.byte 0x00 24.--31. 1. " INTID999 ,Interrupt ID999 Priority/Priority Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " INTID998 ,Interrupt ID998 Priority/Priority Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " INTID997 ,Interrupt ID997 Priority/Priority Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " INTID996 ,Interrupt ID996 Priority/Priority Byte Offset 996 " group.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" hexmask.long.byte 0x00 24.--31. 1. " INTID1003 ,Interrupt ID1003 Priority/Priority Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " INTID1002 ,Interrupt ID1002 Priority/Priority Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " INTID1001 ,Interrupt ID1001 Priority/Priority Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " INTID1000 ,Interrupt ID1000 Priority/Priority Byte Offset 1000" group.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" hexmask.long.byte 0x00 24.--31. 1. " INTID1007 ,Interrupt ID1007 Priority/Priority Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " INTID1006 ,Interrupt ID1006 Priority/Priority Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " INTID1005 ,Interrupt ID1005 Priority/Priority Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " INTID1004 ,Interrupt ID1004 Priority/Priority Byte Offset 1004" group.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" hexmask.long.byte 0x00 24.--31. 1. " INTID1011 ,Interrupt ID1011 Priority/Priority Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " INTID1010 ,Interrupt ID1010 Priority/Priority Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " INTID1009 ,Interrupt ID1009 Priority/Priority Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " INTID1008 ,Interrupt ID1008 Priority/Priority Byte Offset 1008" group.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" hexmask.long.byte 0x00 24.--31. 1. " INTID1015 ,Interrupt ID1015 Priority/Priority Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " INTID1014 ,Interrupt ID1014 Priority/Priority Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " INTID1013 ,Interrupt ID1013 Priority/Priority Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " INTID1012 ,Interrupt ID1012 Priority/Priority Byte Offset 1012" group.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" hexmask.long.byte 0x00 24.--31. 1. " INTID1019 ,Interrupt ID1019 Priority/Priority Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " INTID1018 ,Interrupt ID1018 Priority/Priority Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " INTID1017 ,Interrupt ID1017 Priority/Priority Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " INTID1016 ,Interrupt ID1016 Priority/Priority Byte Offset 1016" else rgroup.long 0x7E0++0x03 line.long 0x00 "GICD_IPRIORITYR248,Interrupt Priority Register 248" rgroup.long 0x7E4++0x03 line.long 0x00 "GICD_IPRIORITYR249,Interrupt Priority Register 249" rgroup.long 0x7E8++0x03 line.long 0x00 "GICD_IPRIORITYR250,Interrupt Priority Register 250" rgroup.long 0x7EC++0x03 line.long 0x00 "GICD_IPRIORITYR251,Interrupt Priority Register 251" rgroup.long 0x7F0++0x03 line.long 0x00 "GICD_IPRIORITYR252,Interrupt Priority Register 252" rgroup.long 0x7F4++0x03 line.long 0x00 "GICD_IPRIORITYR253,Interrupt Priority Register 253" rgroup.long 0x7F8++0x03 line.long 0x00 "GICD_IPRIORITYR254,Interrupt Priority Register 254" endif tree.end width 19. tree "Processor Targets Registers" if (((per.l(ad:0xf1001000+0x04))&0x000000E0)>0x1) rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO3 ,CPU Targets Byte Offset 3 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO2 ,CPU Targets Byte Offset 2 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1 ,CPU Targets Byte Offset 1 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO0 ,CPU Targets Byte Offset 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO7 ,CPU Targets Byte Offset 7 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO6 ,CPU Targets Byte Offset 6 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO5 ,CPU Targets Byte Offset 5 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO4 ,CPU Targets Byte Offset 4 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO11 ,CPU Targets Byte Offset 11 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO10 ,CPU Targets Byte Offset 10 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO9 ,CPU Targets Byte Offset 9 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO8 ,CPU Targets Byte Offset 8 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO15 ,CPU Targets Byte Offset 15 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO14 ,CPU Targets Byte Offset 14 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO13 ,CPU Targets Byte Offset 13 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO12 ,CPU Targets Byte Offset 12 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO19 ,CPU Targets Byte Offset 19 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO18 ,CPU Targets Byte Offset 18 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO17 ,CPU Targets Byte Offset 17 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO16 ,CPU Targets Byte Offset 16 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO23 ,CPU Targets Byte Offset 23 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO22 ,CPU Targets Byte Offset 22 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO21 ,CPU Targets Byte Offset 21 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO20 ,CPU Targets Byte Offset 20 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO27 ,CPU Targets Byte Offset 27 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO26 ,CPU Targets Byte Offset 26 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO25 ,CPU Targets Byte Offset 25 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO24 ,CPU Targets Byte Offset 24 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO31 ,CPU Targets Byte Offset 31 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO30 ,CPU Targets Byte Offset 30 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO29 ,CPU Targets Byte Offset 29 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO28 ,CPU Targets Byte Offset 28 " if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) group.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35 ,CPU Targets Byte Offset 35 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO34 ,CPU Targets Byte Offset 34 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO33 ,CPU Targets Byte Offset 33 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO32 ,CPU Targets Byte Offset 32 " group.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39 ,CPU Targets Byte Offset 39 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO38 ,CPU Targets Byte Offset 38 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO37 ,CPU Targets Byte Offset 37 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO36 ,CPU Targets Byte Offset 36 " group.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43 ,CPU Targets Byte Offset 43 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO42 ,CPU Targets Byte Offset 42 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO41 ,CPU Targets Byte Offset 41 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO40 ,CPU Targets Byte Offset 40 " group.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47 ,CPU Targets Byte Offset 47 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO46 ,CPU Targets Byte Offset 46 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO45 ,CPU Targets Byte Offset 45 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO44 ,CPU Targets Byte Offset 44 " group.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51 ,CPU Targets Byte Offset 51 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO50 ,CPU Targets Byte Offset 50 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO49 ,CPU Targets Byte Offset 49 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO48 ,CPU Targets Byte Offset 48 " group.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55 ,CPU Targets Byte Offset 55 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO54 ,CPU Targets Byte Offset 54 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO53 ,CPU Targets Byte Offset 53 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO52 ,CPU Targets Byte Offset 52 " group.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59 ,CPU Targets Byte Offset 59 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO58 ,CPU Targets Byte Offset 58 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO57 ,CPU Targets Byte Offset 57 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO56 ,CPU Targets Byte Offset 56 " group.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63 ,CPU Targets Byte Offset 63 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO62 ,CPU Targets Byte Offset 62 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO61 ,CPU Targets Byte Offset 61 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO60 ,CPU Targets Byte Offset 60 " else rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8" rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9" rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10" rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11" rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12" rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13" rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14" rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) group.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67 ,CPU Targets Byte Offset 67 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO66 ,CPU Targets Byte Offset 66 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO65 ,CPU Targets Byte Offset 65 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO64 ,CPU Targets Byte Offset 64 " group.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71 ,CPU Targets Byte Offset 71 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO70 ,CPU Targets Byte Offset 70 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO69 ,CPU Targets Byte Offset 69 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO68 ,CPU Targets Byte Offset 68 " group.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75 ,CPU Targets Byte Offset 75 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO74 ,CPU Targets Byte Offset 74 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO73 ,CPU Targets Byte Offset 73 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO72 ,CPU Targets Byte Offset 72 " group.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79 ,CPU Targets Byte Offset 79 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO78 ,CPU Targets Byte Offset 78 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO77 ,CPU Targets Byte Offset 77 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO76 ,CPU Targets Byte Offset 76 " group.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83 ,CPU Targets Byte Offset 83 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO82 ,CPU Targets Byte Offset 82 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO81 ,CPU Targets Byte Offset 81 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO80 ,CPU Targets Byte Offset 80 " group.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87 ,CPU Targets Byte Offset 87 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO86 ,CPU Targets Byte Offset 86 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO85 ,CPU Targets Byte Offset 85 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO84 ,CPU Targets Byte Offset 84 " group.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91 ,CPU Targets Byte Offset 91 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO90 ,CPU Targets Byte Offset 90 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO89 ,CPU Targets Byte Offset 89 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO88 ,CPU Targets Byte Offset 88 " group.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95 ,CPU Targets Byte Offset 95 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO94 ,CPU Targets Byte Offset 94 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO93 ,CPU Targets Byte Offset 93 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO92 ,CPU Targets Byte Offset 92 " else rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16" rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17" rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18" rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19" rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20" rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21" rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22" rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) group.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99 ,CPU Targets Byte Offset 99 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO98 ,CPU Targets Byte Offset 98 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO97 ,CPU Targets Byte Offset 97 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO96 ,CPU Targets Byte Offset 96 " group.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103 ,CPU Targets Byte Offset 103 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO102 ,CPU Targets Byte Offset 102 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO101 ,CPU Targets Byte Offset 101 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO100 ,CPU Targets Byte Offset 100 " group.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107 ,CPU Targets Byte Offset 107 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO106 ,CPU Targets Byte Offset 106 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO105 ,CPU Targets Byte Offset 105 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO104 ,CPU Targets Byte Offset 104 " group.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111 ,CPU Targets Byte Offset 111 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO110 ,CPU Targets Byte Offset 110 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO109 ,CPU Targets Byte Offset 109 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO108 ,CPU Targets Byte Offset 108 " group.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115 ,CPU Targets Byte Offset 115 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO114 ,CPU Targets Byte Offset 114 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO113 ,CPU Targets Byte Offset 113 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO112 ,CPU Targets Byte Offset 112 " group.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119 ,CPU Targets Byte Offset 119 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO118 ,CPU Targets Byte Offset 118 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO117 ,CPU Targets Byte Offset 117 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO116 ,CPU Targets Byte Offset 116 " group.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123 ,CPU Targets Byte Offset 123 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO122 ,CPU Targets Byte Offset 122 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO121 ,CPU Targets Byte Offset 121 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO120 ,CPU Targets Byte Offset 120 " group.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127 ,CPU Targets Byte Offset 127 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO126 ,CPU Targets Byte Offset 126 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO125 ,CPU Targets Byte Offset 125 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO124 ,CPU Targets Byte Offset 124 " else rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24" rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25" rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26" rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27" rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28" rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29" rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30" rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) group.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131 ,CPU Targets Byte Offset 131 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO130 ,CPU Targets Byte Offset 130 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO129 ,CPU Targets Byte Offset 129 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO128 ,CPU Targets Byte Offset 128 " group.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135 ,CPU Targets Byte Offset 135 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO134 ,CPU Targets Byte Offset 134 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO133 ,CPU Targets Byte Offset 133 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO132 ,CPU Targets Byte Offset 132 " group.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139 ,CPU Targets Byte Offset 139 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO138 ,CPU Targets Byte Offset 138 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO137 ,CPU Targets Byte Offset 137 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO136 ,CPU Targets Byte Offset 136 " group.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143 ,CPU Targets Byte Offset 143 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO142 ,CPU Targets Byte Offset 142 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO141 ,CPU Targets Byte Offset 141 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO140 ,CPU Targets Byte Offset 140 " group.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147 ,CPU Targets Byte Offset 147 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO146 ,CPU Targets Byte Offset 146 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO145 ,CPU Targets Byte Offset 145 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO144 ,CPU Targets Byte Offset 144 " group.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151 ,CPU Targets Byte Offset 151 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO150 ,CPU Targets Byte Offset 150 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO149 ,CPU Targets Byte Offset 149 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO148 ,CPU Targets Byte Offset 148 " group.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155 ,CPU Targets Byte Offset 155 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO154 ,CPU Targets Byte Offset 154 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO153 ,CPU Targets Byte Offset 153 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO152 ,CPU Targets Byte Offset 152 " group.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159 ,CPU Targets Byte Offset 159 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO158 ,CPU Targets Byte Offset 158 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO157 ,CPU Targets Byte Offset 157 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO156 ,CPU Targets Byte Offset 156 " else rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32" rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33" rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34" rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35" rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36" rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37" rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38" rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) group.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163 ,CPU Targets Byte Offset 163 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO162 ,CPU Targets Byte Offset 162 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO161 ,CPU Targets Byte Offset 161 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO160 ,CPU Targets Byte Offset 160 " group.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167 ,CPU Targets Byte Offset 167 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO166 ,CPU Targets Byte Offset 166 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO165 ,CPU Targets Byte Offset 165 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO164 ,CPU Targets Byte Offset 164 " group.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171 ,CPU Targets Byte Offset 171 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO170 ,CPU Targets Byte Offset 170 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO169 ,CPU Targets Byte Offset 169 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO168 ,CPU Targets Byte Offset 168 " group.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175 ,CPU Targets Byte Offset 175 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO174 ,CPU Targets Byte Offset 174 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO173 ,CPU Targets Byte Offset 173 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO172 ,CPU Targets Byte Offset 172 " group.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179 ,CPU Targets Byte Offset 179 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO178 ,CPU Targets Byte Offset 178 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO177 ,CPU Targets Byte Offset 177 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO176 ,CPU Targets Byte Offset 176 " group.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183 ,CPU Targets Byte Offset 183 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO182 ,CPU Targets Byte Offset 182 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO181 ,CPU Targets Byte Offset 181 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO180 ,CPU Targets Byte Offset 180 " group.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187 ,CPU Targets Byte Offset 187 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO186 ,CPU Targets Byte Offset 186 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO185 ,CPU Targets Byte Offset 185 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO184 ,CPU Targets Byte Offset 184 " group.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191 ,CPU Targets Byte Offset 191 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO190 ,CPU Targets Byte Offset 190 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO189 ,CPU Targets Byte Offset 189 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO188 ,CPU Targets Byte Offset 188 " else rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40" rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41" rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42" rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43" rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44" rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45" rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46" rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) group.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195 ,CPU Targets Byte Offset 195 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO194 ,CPU Targets Byte Offset 194 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO193 ,CPU Targets Byte Offset 193 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO192 ,CPU Targets Byte Offset 192 " group.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199 ,CPU Targets Byte Offset 199 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO198 ,CPU Targets Byte Offset 198 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO197 ,CPU Targets Byte Offset 197 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO196 ,CPU Targets Byte Offset 196 " group.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203 ,CPU Targets Byte Offset 203 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO202 ,CPU Targets Byte Offset 202 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO201 ,CPU Targets Byte Offset 201 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO200 ,CPU Targets Byte Offset 200 " group.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207 ,CPU Targets Byte Offset 207 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO206 ,CPU Targets Byte Offset 206 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO205 ,CPU Targets Byte Offset 205 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO204 ,CPU Targets Byte Offset 204 " group.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211 ,CPU Targets Byte Offset 211 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO210 ,CPU Targets Byte Offset 210 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO209 ,CPU Targets Byte Offset 209 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO208 ,CPU Targets Byte Offset 208 " group.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215 ,CPU Targets Byte Offset 215 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO214 ,CPU Targets Byte Offset 214 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO213 ,CPU Targets Byte Offset 213 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO212 ,CPU Targets Byte Offset 212 " group.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219 ,CPU Targets Byte Offset 219 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO218 ,CPU Targets Byte Offset 218 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO217 ,CPU Targets Byte Offset 217 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO216 ,CPU Targets Byte Offset 216 " group.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223 ,CPU Targets Byte Offset 223 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO222 ,CPU Targets Byte Offset 222 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO221 ,CPU Targets Byte Offset 221 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO220 ,CPU Targets Byte Offset 220 " else rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48" rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49" rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50" rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51" rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52" rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53" rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54" rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) group.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227 ,CPU Targets Byte Offset 227 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO226 ,CPU Targets Byte Offset 226 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO225 ,CPU Targets Byte Offset 225 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO224 ,CPU Targets Byte Offset 224 " group.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231 ,CPU Targets Byte Offset 231 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO230 ,CPU Targets Byte Offset 230 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO229 ,CPU Targets Byte Offset 229 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO228 ,CPU Targets Byte Offset 228 " group.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235 ,CPU Targets Byte Offset 235 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO234 ,CPU Targets Byte Offset 234 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO233 ,CPU Targets Byte Offset 233 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO232 ,CPU Targets Byte Offset 232 " group.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239 ,CPU Targets Byte Offset 239 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO238 ,CPU Targets Byte Offset 238 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO237 ,CPU Targets Byte Offset 237 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO236 ,CPU Targets Byte Offset 236 " group.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243 ,CPU Targets Byte Offset 243 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO242 ,CPU Targets Byte Offset 242 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO241 ,CPU Targets Byte Offset 241 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO240 ,CPU Targets Byte Offset 240 " group.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247 ,CPU Targets Byte Offset 247 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO246 ,CPU Targets Byte Offset 246 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO245 ,CPU Targets Byte Offset 245 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO244 ,CPU Targets Byte Offset 244 " group.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251 ,CPU Targets Byte Offset 251 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO250 ,CPU Targets Byte Offset 250 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO249 ,CPU Targets Byte Offset 249 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO248 ,CPU Targets Byte Offset 248 " group.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255 ,CPU Targets Byte Offset 255 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO254 ,CPU Targets Byte Offset 254 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO253 ,CPU Targets Byte Offset 253 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO252 ,CPU Targets Byte Offset 252 " else rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56" rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57" rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58" rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59" rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60" rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61" rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62" rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) group.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259 ,CPU Targets Byte Offset 259 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO258 ,CPU Targets Byte Offset 258 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO257 ,CPU Targets Byte Offset 257 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO256 ,CPU Targets Byte Offset 256 " group.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263 ,CPU Targets Byte Offset 263 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO262 ,CPU Targets Byte Offset 262 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO261 ,CPU Targets Byte Offset 261 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO260 ,CPU Targets Byte Offset 260 " group.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267 ,CPU Targets Byte Offset 267 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO266 ,CPU Targets Byte Offset 266 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO265 ,CPU Targets Byte Offset 265 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO264 ,CPU Targets Byte Offset 264 " group.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271 ,CPU Targets Byte Offset 271 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO270 ,CPU Targets Byte Offset 270 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO269 ,CPU Targets Byte Offset 269 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO268 ,CPU Targets Byte Offset 268 " group.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275 ,CPU Targets Byte Offset 275 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO274 ,CPU Targets Byte Offset 274 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO273 ,CPU Targets Byte Offset 273 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO272 ,CPU Targets Byte Offset 272 " group.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279 ,CPU Targets Byte Offset 279 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO278 ,CPU Targets Byte Offset 278 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO277 ,CPU Targets Byte Offset 277 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO276 ,CPU Targets Byte Offset 276 " group.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283 ,CPU Targets Byte Offset 283 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO282 ,CPU Targets Byte Offset 282 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO281 ,CPU Targets Byte Offset 281 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO280 ,CPU Targets Byte Offset 280 " group.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287 ,CPU Targets Byte Offset 287 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO286 ,CPU Targets Byte Offset 286 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO285 ,CPU Targets Byte Offset 285 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO284 ,CPU Targets Byte Offset 284 " else rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64" rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65" rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66" rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67" rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68" rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69" rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70" rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) group.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291 ,CPU Targets Byte Offset 291 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO290 ,CPU Targets Byte Offset 290 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO289 ,CPU Targets Byte Offset 289 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO288 ,CPU Targets Byte Offset 288 " group.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295 ,CPU Targets Byte Offset 295 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO294 ,CPU Targets Byte Offset 294 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO293 ,CPU Targets Byte Offset 293 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO292 ,CPU Targets Byte Offset 292 " group.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299 ,CPU Targets Byte Offset 299 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO298 ,CPU Targets Byte Offset 298 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO297 ,CPU Targets Byte Offset 297 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO296 ,CPU Targets Byte Offset 296 " group.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303 ,CPU Targets Byte Offset 303 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO302 ,CPU Targets Byte Offset 302 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO301 ,CPU Targets Byte Offset 301 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO300 ,CPU Targets Byte Offset 300 " group.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307 ,CPU Targets Byte Offset 307 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO306 ,CPU Targets Byte Offset 306 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO305 ,CPU Targets Byte Offset 305 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO304 ,CPU Targets Byte Offset 304 " group.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311 ,CPU Targets Byte Offset 311 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO310 ,CPU Targets Byte Offset 310 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO309 ,CPU Targets Byte Offset 309 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO308 ,CPU Targets Byte Offset 308 " group.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315 ,CPU Targets Byte Offset 315 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO314 ,CPU Targets Byte Offset 314 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO313 ,CPU Targets Byte Offset 313 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO312 ,CPU Targets Byte Offset 312 " group.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319 ,CPU Targets Byte Offset 319 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO318 ,CPU Targets Byte Offset 318 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO317 ,CPU Targets Byte Offset 317 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO316 ,CPU Targets Byte Offset 316 " else rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72" rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73" rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74" rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75" rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76" rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77" rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78" rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) group.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323 ,CPU Targets Byte Offset 323 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO322 ,CPU Targets Byte Offset 322 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO321 ,CPU Targets Byte Offset 321 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO320 ,CPU Targets Byte Offset 320 " group.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327 ,CPU Targets Byte Offset 327 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO326 ,CPU Targets Byte Offset 326 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO325 ,CPU Targets Byte Offset 325 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO324 ,CPU Targets Byte Offset 324 " group.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331 ,CPU Targets Byte Offset 331 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO330 ,CPU Targets Byte Offset 330 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO329 ,CPU Targets Byte Offset 329 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO328 ,CPU Targets Byte Offset 328 " group.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335 ,CPU Targets Byte Offset 335 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO334 ,CPU Targets Byte Offset 334 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO333 ,CPU Targets Byte Offset 333 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO332 ,CPU Targets Byte Offset 332 " group.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339 ,CPU Targets Byte Offset 339 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO338 ,CPU Targets Byte Offset 338 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO337 ,CPU Targets Byte Offset 337 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO336 ,CPU Targets Byte Offset 336 " group.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343 ,CPU Targets Byte Offset 343 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO342 ,CPU Targets Byte Offset 342 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO341 ,CPU Targets Byte Offset 341 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO340 ,CPU Targets Byte Offset 340 " group.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347 ,CPU Targets Byte Offset 347 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO346 ,CPU Targets Byte Offset 346 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO345 ,CPU Targets Byte Offset 345 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO344 ,CPU Targets Byte Offset 344 " group.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351 ,CPU Targets Byte Offset 351 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO350 ,CPU Targets Byte Offset 350 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO349 ,CPU Targets Byte Offset 349 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO348 ,CPU Targets Byte Offset 348 " else rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80" rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81" rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82" rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83" rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84" rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85" rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86" rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) group.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355 ,CPU Targets Byte Offset 355 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO354 ,CPU Targets Byte Offset 354 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO353 ,CPU Targets Byte Offset 353 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO352 ,CPU Targets Byte Offset 352 " group.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359 ,CPU Targets Byte Offset 359 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO358 ,CPU Targets Byte Offset 358 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO357 ,CPU Targets Byte Offset 357 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO356 ,CPU Targets Byte Offset 356 " group.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363 ,CPU Targets Byte Offset 363 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO362 ,CPU Targets Byte Offset 362 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO361 ,CPU Targets Byte Offset 361 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO360 ,CPU Targets Byte Offset 360 " group.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367 ,CPU Targets Byte Offset 367 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO366 ,CPU Targets Byte Offset 366 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO365 ,CPU Targets Byte Offset 365 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO364 ,CPU Targets Byte Offset 364 " group.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371 ,CPU Targets Byte Offset 371 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO370 ,CPU Targets Byte Offset 370 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO369 ,CPU Targets Byte Offset 369 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO368 ,CPU Targets Byte Offset 368 " group.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375 ,CPU Targets Byte Offset 375 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO374 ,CPU Targets Byte Offset 374 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO373 ,CPU Targets Byte Offset 373 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO372 ,CPU Targets Byte Offset 372 " group.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379 ,CPU Targets Byte Offset 379 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO378 ,CPU Targets Byte Offset 378 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO377 ,CPU Targets Byte Offset 377 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO376 ,CPU Targets Byte Offset 376 " group.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383 ,CPU Targets Byte Offset 383 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO382 ,CPU Targets Byte Offset 382 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO381 ,CPU Targets Byte Offset 381 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO380 ,CPU Targets Byte Offset 380 " else rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88" rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89" rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90" rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91" rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92" rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93" rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94" rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) group.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387 ,CPU Targets Byte Offset 387 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO386 ,CPU Targets Byte Offset 386 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO385 ,CPU Targets Byte Offset 385 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO384 ,CPU Targets Byte Offset 384 " group.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391 ,CPU Targets Byte Offset 391 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO390 ,CPU Targets Byte Offset 390 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO389 ,CPU Targets Byte Offset 389 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO388 ,CPU Targets Byte Offset 388 " group.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395 ,CPU Targets Byte Offset 395 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO394 ,CPU Targets Byte Offset 394 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO393 ,CPU Targets Byte Offset 393 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO392 ,CPU Targets Byte Offset 392 " group.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399 ,CPU Targets Byte Offset 399 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO398 ,CPU Targets Byte Offset 398 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO397 ,CPU Targets Byte Offset 397 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO396 ,CPU Targets Byte Offset 396 " group.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403 ,CPU Targets Byte Offset 403 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO402 ,CPU Targets Byte Offset 402 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO401 ,CPU Targets Byte Offset 401 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO400 ,CPU Targets Byte Offset 400 " group.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407 ,CPU Targets Byte Offset 407 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO406 ,CPU Targets Byte Offset 406 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO405 ,CPU Targets Byte Offset 405 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO404 ,CPU Targets Byte Offset 404 " group.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411 ,CPU Targets Byte Offset 411 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO410 ,CPU Targets Byte Offset 410 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO409 ,CPU Targets Byte Offset 409 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO408 ,CPU Targets Byte Offset 408 " group.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415 ,CPU Targets Byte Offset 415 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO414 ,CPU Targets Byte Offset 414 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO413 ,CPU Targets Byte Offset 413 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO412 ,CPU Targets Byte Offset 412 " else rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96" rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97" rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98" rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99" rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) group.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419 ,CPU Targets Byte Offset 419 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO418 ,CPU Targets Byte Offset 418 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO417 ,CPU Targets Byte Offset 417 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO416 ,CPU Targets Byte Offset 416 " group.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423 ,CPU Targets Byte Offset 423 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO422 ,CPU Targets Byte Offset 422 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO421 ,CPU Targets Byte Offset 421 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO420 ,CPU Targets Byte Offset 420 " group.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427 ,CPU Targets Byte Offset 427 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO426 ,CPU Targets Byte Offset 426 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO425 ,CPU Targets Byte Offset 425 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO424 ,CPU Targets Byte Offset 424 " group.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431 ,CPU Targets Byte Offset 431 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO430 ,CPU Targets Byte Offset 430 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO429 ,CPU Targets Byte Offset 429 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO428 ,CPU Targets Byte Offset 428 " group.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435 ,CPU Targets Byte Offset 435 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO434 ,CPU Targets Byte Offset 434 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO433 ,CPU Targets Byte Offset 433 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO432 ,CPU Targets Byte Offset 432 " group.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439 ,CPU Targets Byte Offset 439 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO438 ,CPU Targets Byte Offset 438 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO437 ,CPU Targets Byte Offset 437 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO436 ,CPU Targets Byte Offset 436 " group.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443 ,CPU Targets Byte Offset 443 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO442 ,CPU Targets Byte Offset 442 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO441 ,CPU Targets Byte Offset 441 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO440 ,CPU Targets Byte Offset 440 " group.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447 ,CPU Targets Byte Offset 447 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO446 ,CPU Targets Byte Offset 446 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO445 ,CPU Targets Byte Offset 445 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO444 ,CPU Targets Byte Offset 444 " else rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) group.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451 ,CPU Targets Byte Offset 451 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO450 ,CPU Targets Byte Offset 450 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO449 ,CPU Targets Byte Offset 449 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO448 ,CPU Targets Byte Offset 448 " group.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455 ,CPU Targets Byte Offset 455 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO454 ,CPU Targets Byte Offset 454 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO453 ,CPU Targets Byte Offset 453 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO452 ,CPU Targets Byte Offset 452 " group.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459 ,CPU Targets Byte Offset 459 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO458 ,CPU Targets Byte Offset 458 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO457 ,CPU Targets Byte Offset 457 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO456 ,CPU Targets Byte Offset 456 " group.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463 ,CPU Targets Byte Offset 463 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO462 ,CPU Targets Byte Offset 462 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO461 ,CPU Targets Byte Offset 461 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO460 ,CPU Targets Byte Offset 460 " group.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467 ,CPU Targets Byte Offset 467 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO466 ,CPU Targets Byte Offset 466 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO465 ,CPU Targets Byte Offset 465 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO464 ,CPU Targets Byte Offset 464 " group.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471 ,CPU Targets Byte Offset 471 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO470 ,CPU Targets Byte Offset 470 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO469 ,CPU Targets Byte Offset 469 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO468 ,CPU Targets Byte Offset 468 " group.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475 ,CPU Targets Byte Offset 475 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO474 ,CPU Targets Byte Offset 474 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO473 ,CPU Targets Byte Offset 473 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO472 ,CPU Targets Byte Offset 472 " group.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479 ,CPU Targets Byte Offset 479 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO478 ,CPU Targets Byte Offset 478 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO477 ,CPU Targets Byte Offset 477 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO476 ,CPU Targets Byte Offset 476 " else rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) group.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483 ,CPU Targets Byte Offset 483 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO482 ,CPU Targets Byte Offset 482 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO481 ,CPU Targets Byte Offset 481 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO480 ,CPU Targets Byte Offset 480 " group.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487 ,CPU Targets Byte Offset 487 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO486 ,CPU Targets Byte Offset 486 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO485 ,CPU Targets Byte Offset 485 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO484 ,CPU Targets Byte Offset 484 " group.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491 ,CPU Targets Byte Offset 491 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO490 ,CPU Targets Byte Offset 490 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO489 ,CPU Targets Byte Offset 489 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO488 ,CPU Targets Byte Offset 488 " group.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495 ,CPU Targets Byte Offset 495 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO494 ,CPU Targets Byte Offset 494 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO493 ,CPU Targets Byte Offset 493 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO492 ,CPU Targets Byte Offset 492 " group.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499 ,CPU Targets Byte Offset 499 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO498 ,CPU Targets Byte Offset 498 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO497 ,CPU Targets Byte Offset 497 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO496 ,CPU Targets Byte Offset 496 " group.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503 ,CPU Targets Byte Offset 503 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO502 ,CPU Targets Byte Offset 502 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO501 ,CPU Targets Byte Offset 501 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO500 ,CPU Targets Byte Offset 500 " group.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507 ,CPU Targets Byte Offset 507 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO506 ,CPU Targets Byte Offset 506 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO505 ,CPU Targets Byte Offset 505 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO504 ,CPU Targets Byte Offset 504 " group.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511 ,CPU Targets Byte Offset 511 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO510 ,CPU Targets Byte Offset 510 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO509 ,CPU Targets Byte Offset 509 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO508 ,CPU Targets Byte Offset 508 " else rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515 ,CPU Targets Byte Offset 515 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO514 ,CPU Targets Byte Offset 514 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO513 ,CPU Targets Byte Offset 513 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO512 ,CPU Targets Byte Offset 512 " group.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519 ,CPU Targets Byte Offset 519 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO518 ,CPU Targets Byte Offset 518 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO517 ,CPU Targets Byte Offset 517 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO516 ,CPU Targets Byte Offset 516 " group.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523 ,CPU Targets Byte Offset 523 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO522 ,CPU Targets Byte Offset 522 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO521 ,CPU Targets Byte Offset 521 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO520 ,CPU Targets Byte Offset 520 " group.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527 ,CPU Targets Byte Offset 527 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO526 ,CPU Targets Byte Offset 526 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO525 ,CPU Targets Byte Offset 525 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO524 ,CPU Targets Byte Offset 524 " group.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531 ,CPU Targets Byte Offset 531 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO530 ,CPU Targets Byte Offset 530 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO529 ,CPU Targets Byte Offset 529 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO528 ,CPU Targets Byte Offset 528 " group.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535 ,CPU Targets Byte Offset 535 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO534 ,CPU Targets Byte Offset 534 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO533 ,CPU Targets Byte Offset 533 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO532 ,CPU Targets Byte Offset 532 " group.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539 ,CPU Targets Byte Offset 539 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO538 ,CPU Targets Byte Offset 538 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO537 ,CPU Targets Byte Offset 537 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO536 ,CPU Targets Byte Offset 536 " group.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543 ,CPU Targets Byte Offset 543 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO542 ,CPU Targets Byte Offset 542 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO541 ,CPU Targets Byte Offset 541 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO540 ,CPU Targets Byte Offset 540 " else rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547 ,CPU Targets Byte Offset 547 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO546 ,CPU Targets Byte Offset 546 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO545 ,CPU Targets Byte Offset 545 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO544 ,CPU Targets Byte Offset 544 " group.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551 ,CPU Targets Byte Offset 551 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO550 ,CPU Targets Byte Offset 550 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO549 ,CPU Targets Byte Offset 549 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO548 ,CPU Targets Byte Offset 548 " group.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555 ,CPU Targets Byte Offset 555 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO554 ,CPU Targets Byte Offset 554 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO553 ,CPU Targets Byte Offset 553 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO552 ,CPU Targets Byte Offset 552 " group.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559 ,CPU Targets Byte Offset 559 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO558 ,CPU Targets Byte Offset 558 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO557 ,CPU Targets Byte Offset 557 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO556 ,CPU Targets Byte Offset 556 " group.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563 ,CPU Targets Byte Offset 563 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO562 ,CPU Targets Byte Offset 562 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO561 ,CPU Targets Byte Offset 561 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO560 ,CPU Targets Byte Offset 560 " group.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567 ,CPU Targets Byte Offset 567 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO566 ,CPU Targets Byte Offset 566 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO565 ,CPU Targets Byte Offset 565 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO564 ,CPU Targets Byte Offset 564 " group.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571 ,CPU Targets Byte Offset 571 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO570 ,CPU Targets Byte Offset 570 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO569 ,CPU Targets Byte Offset 569 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO568 ,CPU Targets Byte Offset 568 " group.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575 ,CPU Targets Byte Offset 575 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO574 ,CPU Targets Byte Offset 574 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO573 ,CPU Targets Byte Offset 573 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO572 ,CPU Targets Byte Offset 572 " else rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579 ,CPU Targets Byte Offset 579 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO578 ,CPU Targets Byte Offset 578 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO577 ,CPU Targets Byte Offset 577 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO576 ,CPU Targets Byte Offset 576 " group.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583 ,CPU Targets Byte Offset 583 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO582 ,CPU Targets Byte Offset 582 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO581 ,CPU Targets Byte Offset 581 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO580 ,CPU Targets Byte Offset 580 " group.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587 ,CPU Targets Byte Offset 587 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO586 ,CPU Targets Byte Offset 586 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO585 ,CPU Targets Byte Offset 585 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO584 ,CPU Targets Byte Offset 584 " group.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591 ,CPU Targets Byte Offset 591 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO590 ,CPU Targets Byte Offset 590 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO589 ,CPU Targets Byte Offset 589 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO588 ,CPU Targets Byte Offset 588 " group.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595 ,CPU Targets Byte Offset 595 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO594 ,CPU Targets Byte Offset 594 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO593 ,CPU Targets Byte Offset 593 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO592 ,CPU Targets Byte Offset 592 " group.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599 ,CPU Targets Byte Offset 599 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO598 ,CPU Targets Byte Offset 598 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO597 ,CPU Targets Byte Offset 597 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO596 ,CPU Targets Byte Offset 596 " group.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603 ,CPU Targets Byte Offset 603 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO602 ,CPU Targets Byte Offset 602 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO601 ,CPU Targets Byte Offset 601 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO600 ,CPU Targets Byte Offset 600 " group.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607 ,CPU Targets Byte Offset 607 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO606 ,CPU Targets Byte Offset 606 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO605 ,CPU Targets Byte Offset 605 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO604 ,CPU Targets Byte Offset 604 " else rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611 ,CPU Targets Byte Offset 611 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO610 ,CPU Targets Byte Offset 610 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO609 ,CPU Targets Byte Offset 609 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO608 ,CPU Targets Byte Offset 608 " group.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615 ,CPU Targets Byte Offset 615 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO614 ,CPU Targets Byte Offset 614 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO613 ,CPU Targets Byte Offset 613 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO612 ,CPU Targets Byte Offset 612 " group.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619 ,CPU Targets Byte Offset 619 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO618 ,CPU Targets Byte Offset 618 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO617 ,CPU Targets Byte Offset 617 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO616 ,CPU Targets Byte Offset 616 " group.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623 ,CPU Targets Byte Offset 623 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO622 ,CPU Targets Byte Offset 622 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO621 ,CPU Targets Byte Offset 621 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO620 ,CPU Targets Byte Offset 620 " group.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627 ,CPU Targets Byte Offset 627 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO626 ,CPU Targets Byte Offset 626 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO625 ,CPU Targets Byte Offset 625 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO624 ,CPU Targets Byte Offset 624 " group.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631 ,CPU Targets Byte Offset 631 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO630 ,CPU Targets Byte Offset 630 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO629 ,CPU Targets Byte Offset 629 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO628 ,CPU Targets Byte Offset 628 " group.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635 ,CPU Targets Byte Offset 635 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO634 ,CPU Targets Byte Offset 634 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO633 ,CPU Targets Byte Offset 633 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO632 ,CPU Targets Byte Offset 632 " group.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639 ,CPU Targets Byte Offset 639 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO638 ,CPU Targets Byte Offset 638 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO637 ,CPU Targets Byte Offset 637 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO636 ,CPU Targets Byte Offset 636 " else rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643 ,CPU Targets Byte Offset 643 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO642 ,CPU Targets Byte Offset 642 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO641 ,CPU Targets Byte Offset 641 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO640 ,CPU Targets Byte Offset 640 " group.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647 ,CPU Targets Byte Offset 647 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO646 ,CPU Targets Byte Offset 646 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO645 ,CPU Targets Byte Offset 645 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO644 ,CPU Targets Byte Offset 644 " group.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651 ,CPU Targets Byte Offset 651 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO650 ,CPU Targets Byte Offset 650 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO649 ,CPU Targets Byte Offset 649 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO648 ,CPU Targets Byte Offset 648 " group.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655 ,CPU Targets Byte Offset 655 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO654 ,CPU Targets Byte Offset 654 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO653 ,CPU Targets Byte Offset 653 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO652 ,CPU Targets Byte Offset 652 " group.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659 ,CPU Targets Byte Offset 659 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO658 ,CPU Targets Byte Offset 658 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO657 ,CPU Targets Byte Offset 657 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO656 ,CPU Targets Byte Offset 656 " group.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663 ,CPU Targets Byte Offset 663 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO662 ,CPU Targets Byte Offset 662 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO661 ,CPU Targets Byte Offset 661 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO660 ,CPU Targets Byte Offset 660 " group.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667 ,CPU Targets Byte Offset 667 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO666 ,CPU Targets Byte Offset 666 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO665 ,CPU Targets Byte Offset 665 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO664 ,CPU Targets Byte Offset 664 " group.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671 ,CPU Targets Byte Offset 671 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO670 ,CPU Targets Byte Offset 670 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO669 ,CPU Targets Byte Offset 669 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO668 ,CPU Targets Byte Offset 668 " else rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675 ,CPU Targets Byte Offset 675 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO674 ,CPU Targets Byte Offset 674 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO673 ,CPU Targets Byte Offset 673 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO672 ,CPU Targets Byte Offset 672 " group.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679 ,CPU Targets Byte Offset 679 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO678 ,CPU Targets Byte Offset 678 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO677 ,CPU Targets Byte Offset 677 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO676 ,CPU Targets Byte Offset 676 " group.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683 ,CPU Targets Byte Offset 683 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO682 ,CPU Targets Byte Offset 682 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO681 ,CPU Targets Byte Offset 681 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO680 ,CPU Targets Byte Offset 680 " group.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687 ,CPU Targets Byte Offset 687 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO686 ,CPU Targets Byte Offset 686 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO685 ,CPU Targets Byte Offset 685 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO684 ,CPU Targets Byte Offset 684 " group.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691 ,CPU Targets Byte Offset 691 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO690 ,CPU Targets Byte Offset 690 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO689 ,CPU Targets Byte Offset 689 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO688 ,CPU Targets Byte Offset 688 " group.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695 ,CPU Targets Byte Offset 695 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO694 ,CPU Targets Byte Offset 694 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO693 ,CPU Targets Byte Offset 693 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO692 ,CPU Targets Byte Offset 692 " group.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699 ,CPU Targets Byte Offset 699 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO698 ,CPU Targets Byte Offset 698 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO697 ,CPU Targets Byte Offset 697 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO696 ,CPU Targets Byte Offset 696 " group.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703 ,CPU Targets Byte Offset 703 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO702 ,CPU Targets Byte Offset 702 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO701 ,CPU Targets Byte Offset 701 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO700 ,CPU Targets Byte Offset 700 " else rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707 ,CPU Targets Byte Offset 707 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO706 ,CPU Targets Byte Offset 706 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO705 ,CPU Targets Byte Offset 705 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO704 ,CPU Targets Byte Offset 704 " group.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711 ,CPU Targets Byte Offset 711 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO710 ,CPU Targets Byte Offset 710 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO709 ,CPU Targets Byte Offset 709 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO708 ,CPU Targets Byte Offset 708 " group.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715 ,CPU Targets Byte Offset 715 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO714 ,CPU Targets Byte Offset 714 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO713 ,CPU Targets Byte Offset 713 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO712 ,CPU Targets Byte Offset 712 " group.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719 ,CPU Targets Byte Offset 719 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO718 ,CPU Targets Byte Offset 718 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO717 ,CPU Targets Byte Offset 717 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO716 ,CPU Targets Byte Offset 716 " group.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723 ,CPU Targets Byte Offset 723 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO722 ,CPU Targets Byte Offset 722 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO721 ,CPU Targets Byte Offset 721 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO720 ,CPU Targets Byte Offset 720 " group.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727 ,CPU Targets Byte Offset 727 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO726 ,CPU Targets Byte Offset 726 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO725 ,CPU Targets Byte Offset 725 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO724 ,CPU Targets Byte Offset 724 " group.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731 ,CPU Targets Byte Offset 731 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO730 ,CPU Targets Byte Offset 730 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO729 ,CPU Targets Byte Offset 729 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO728 ,CPU Targets Byte Offset 728 " group.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735 ,CPU Targets Byte Offset 735 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO734 ,CPU Targets Byte Offset 734 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO733 ,CPU Targets Byte Offset 733 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO732 ,CPU Targets Byte Offset 732 " else rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739 ,CPU Targets Byte Offset 739 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO738 ,CPU Targets Byte Offset 738 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO737 ,CPU Targets Byte Offset 737 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO736 ,CPU Targets Byte Offset 736 " group.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743 ,CPU Targets Byte Offset 743 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO742 ,CPU Targets Byte Offset 742 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO741 ,CPU Targets Byte Offset 741 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO740 ,CPU Targets Byte Offset 740 " group.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747 ,CPU Targets Byte Offset 747 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO746 ,CPU Targets Byte Offset 746 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO745 ,CPU Targets Byte Offset 745 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO744 ,CPU Targets Byte Offset 744 " group.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751 ,CPU Targets Byte Offset 751 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO750 ,CPU Targets Byte Offset 750 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO749 ,CPU Targets Byte Offset 749 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO748 ,CPU Targets Byte Offset 748 " group.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755 ,CPU Targets Byte Offset 755 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO754 ,CPU Targets Byte Offset 754 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO753 ,CPU Targets Byte Offset 753 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO752 ,CPU Targets Byte Offset 752 " group.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759 ,CPU Targets Byte Offset 759 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO758 ,CPU Targets Byte Offset 758 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO757 ,CPU Targets Byte Offset 757 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO756 ,CPU Targets Byte Offset 756 " group.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763 ,CPU Targets Byte Offset 763 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO762 ,CPU Targets Byte Offset 762 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO761 ,CPU Targets Byte Offset 761 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO760 ,CPU Targets Byte Offset 760 " group.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767 ,CPU Targets Byte Offset 767 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO766 ,CPU Targets Byte Offset 766 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO765 ,CPU Targets Byte Offset 765 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO764 ,CPU Targets Byte Offset 764 " else rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771 ,CPU Targets Byte Offset 771 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO770 ,CPU Targets Byte Offset 770 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO769 ,CPU Targets Byte Offset 769 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO768 ,CPU Targets Byte Offset 768 " group.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775 ,CPU Targets Byte Offset 775 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO774 ,CPU Targets Byte Offset 774 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO773 ,CPU Targets Byte Offset 773 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO772 ,CPU Targets Byte Offset 772 " group.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779 ,CPU Targets Byte Offset 779 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO778 ,CPU Targets Byte Offset 778 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO777 ,CPU Targets Byte Offset 777 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO776 ,CPU Targets Byte Offset 776 " group.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783 ,CPU Targets Byte Offset 783 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO782 ,CPU Targets Byte Offset 782 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO781 ,CPU Targets Byte Offset 781 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO780 ,CPU Targets Byte Offset 780 " group.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787 ,CPU Targets Byte Offset 787 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO786 ,CPU Targets Byte Offset 786 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO785 ,CPU Targets Byte Offset 785 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO784 ,CPU Targets Byte Offset 784 " group.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791 ,CPU Targets Byte Offset 791 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO790 ,CPU Targets Byte Offset 790 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO789 ,CPU Targets Byte Offset 789 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO788 ,CPU Targets Byte Offset 788 " group.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795 ,CPU Targets Byte Offset 795 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO794 ,CPU Targets Byte Offset 794 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO793 ,CPU Targets Byte Offset 793 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO792 ,CPU Targets Byte Offset 792 " group.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799 ,CPU Targets Byte Offset 799 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO798 ,CPU Targets Byte Offset 798 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO797 ,CPU Targets Byte Offset 797 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO796 ,CPU Targets Byte Offset 796 " else rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803 ,CPU Targets Byte Offset 803 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO802 ,CPU Targets Byte Offset 802 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO801 ,CPU Targets Byte Offset 801 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO800 ,CPU Targets Byte Offset 800 " group.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807 ,CPU Targets Byte Offset 807 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO806 ,CPU Targets Byte Offset 806 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO805 ,CPU Targets Byte Offset 805 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO804 ,CPU Targets Byte Offset 804 " group.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811 ,CPU Targets Byte Offset 811 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO810 ,CPU Targets Byte Offset 810 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO809 ,CPU Targets Byte Offset 809 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO808 ,CPU Targets Byte Offset 808 " group.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815 ,CPU Targets Byte Offset 815 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO814 ,CPU Targets Byte Offset 814 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO813 ,CPU Targets Byte Offset 813 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO812 ,CPU Targets Byte Offset 812 " group.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819 ,CPU Targets Byte Offset 819 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO818 ,CPU Targets Byte Offset 818 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO817 ,CPU Targets Byte Offset 817 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO816 ,CPU Targets Byte Offset 816 " group.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823 ,CPU Targets Byte Offset 823 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO822 ,CPU Targets Byte Offset 822 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO821 ,CPU Targets Byte Offset 821 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO820 ,CPU Targets Byte Offset 820 " group.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827 ,CPU Targets Byte Offset 827 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO826 ,CPU Targets Byte Offset 826 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO825 ,CPU Targets Byte Offset 825 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO824 ,CPU Targets Byte Offset 824 " group.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831 ,CPU Targets Byte Offset 831 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO830 ,CPU Targets Byte Offset 830 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO829 ,CPU Targets Byte Offset 829 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO828 ,CPU Targets Byte Offset 828 " else rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835 ,CPU Targets Byte Offset 835 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO834 ,CPU Targets Byte Offset 834 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO833 ,CPU Targets Byte Offset 833 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO832 ,CPU Targets Byte Offset 832 " group.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839 ,CPU Targets Byte Offset 839 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO838 ,CPU Targets Byte Offset 838 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO837 ,CPU Targets Byte Offset 837 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO836 ,CPU Targets Byte Offset 836 " group.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843 ,CPU Targets Byte Offset 843 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO842 ,CPU Targets Byte Offset 842 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO841 ,CPU Targets Byte Offset 841 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO840 ,CPU Targets Byte Offset 840 " group.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847 ,CPU Targets Byte Offset 847 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO846 ,CPU Targets Byte Offset 846 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO845 ,CPU Targets Byte Offset 845 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO844 ,CPU Targets Byte Offset 844 " group.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851 ,CPU Targets Byte Offset 851 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO850 ,CPU Targets Byte Offset 850 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO849 ,CPU Targets Byte Offset 849 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO848 ,CPU Targets Byte Offset 848 " group.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855 ,CPU Targets Byte Offset 855 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO854 ,CPU Targets Byte Offset 854 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO853 ,CPU Targets Byte Offset 853 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO852 ,CPU Targets Byte Offset 852 " group.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859 ,CPU Targets Byte Offset 859 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO858 ,CPU Targets Byte Offset 858 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO857 ,CPU Targets Byte Offset 857 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO856 ,CPU Targets Byte Offset 856 " group.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863 ,CPU Targets Byte Offset 863 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO862 ,CPU Targets Byte Offset 862 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO861 ,CPU Targets Byte Offset 861 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO860 ,CPU Targets Byte Offset 860 " else rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867 ,CPU Targets Byte Offset 867 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO866 ,CPU Targets Byte Offset 866 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO865 ,CPU Targets Byte Offset 865 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO864 ,CPU Targets Byte Offset 864 " group.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871 ,CPU Targets Byte Offset 871 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO870 ,CPU Targets Byte Offset 870 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO869 ,CPU Targets Byte Offset 869 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO868 ,CPU Targets Byte Offset 868 " group.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875 ,CPU Targets Byte Offset 875 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO874 ,CPU Targets Byte Offset 874 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO873 ,CPU Targets Byte Offset 873 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO872 ,CPU Targets Byte Offset 872 " group.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879 ,CPU Targets Byte Offset 879 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO878 ,CPU Targets Byte Offset 878 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO877 ,CPU Targets Byte Offset 877 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO876 ,CPU Targets Byte Offset 876 " group.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883 ,CPU Targets Byte Offset 883 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO882 ,CPU Targets Byte Offset 882 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO881 ,CPU Targets Byte Offset 881 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO880 ,CPU Targets Byte Offset 880 " group.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887 ,CPU Targets Byte Offset 887 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO886 ,CPU Targets Byte Offset 886 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO885 ,CPU Targets Byte Offset 885 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO884 ,CPU Targets Byte Offset 884 " group.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891 ,CPU Targets Byte Offset 891 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO890 ,CPU Targets Byte Offset 890 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO889 ,CPU Targets Byte Offset 889 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO888 ,CPU Targets Byte Offset 888 " group.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895 ,CPU Targets Byte Offset 895 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO894 ,CPU Targets Byte Offset 894 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO893 ,CPU Targets Byte Offset 893 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO892 ,CPU Targets Byte Offset 892 " else rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899 ,CPU Targets Byte Offset 899 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO898 ,CPU Targets Byte Offset 898 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO897 ,CPU Targets Byte Offset 897 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO896 ,CPU Targets Byte Offset 896 " group.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903 ,CPU Targets Byte Offset 903 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO902 ,CPU Targets Byte Offset 902 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO901 ,CPU Targets Byte Offset 901 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO900 ,CPU Targets Byte Offset 900 " group.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907 ,CPU Targets Byte Offset 907 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO906 ,CPU Targets Byte Offset 906 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO905 ,CPU Targets Byte Offset 905 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO904 ,CPU Targets Byte Offset 904 " group.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911 ,CPU Targets Byte Offset 911 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO910 ,CPU Targets Byte Offset 910 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO909 ,CPU Targets Byte Offset 909 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO908 ,CPU Targets Byte Offset 908 " group.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915 ,CPU Targets Byte Offset 915 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO914 ,CPU Targets Byte Offset 914 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO913 ,CPU Targets Byte Offset 913 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO912 ,CPU Targets Byte Offset 912 " group.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919 ,CPU Targets Byte Offset 919 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO918 ,CPU Targets Byte Offset 918 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO917 ,CPU Targets Byte Offset 917 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO916 ,CPU Targets Byte Offset 916 " group.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923 ,CPU Targets Byte Offset 923 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO922 ,CPU Targets Byte Offset 922 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO921 ,CPU Targets Byte Offset 921 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO920 ,CPU Targets Byte Offset 920 " group.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927 ,CPU Targets Byte Offset 927 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO926 ,CPU Targets Byte Offset 926 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO925 ,CPU Targets Byte Offset 925 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO924 ,CPU Targets Byte Offset 924 " else rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931 ,CPU Targets Byte Offset 931 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO930 ,CPU Targets Byte Offset 930 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO929 ,CPU Targets Byte Offset 929 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO928 ,CPU Targets Byte Offset 928 " group.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935 ,CPU Targets Byte Offset 935 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO934 ,CPU Targets Byte Offset 934 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO933 ,CPU Targets Byte Offset 933 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO932 ,CPU Targets Byte Offset 932 " group.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939 ,CPU Targets Byte Offset 939 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO938 ,CPU Targets Byte Offset 938 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO937 ,CPU Targets Byte Offset 937 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO936 ,CPU Targets Byte Offset 936 " group.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943 ,CPU Targets Byte Offset 943 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO942 ,CPU Targets Byte Offset 942 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO941 ,CPU Targets Byte Offset 941 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO940 ,CPU Targets Byte Offset 940 " group.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947 ,CPU Targets Byte Offset 947 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO946 ,CPU Targets Byte Offset 946 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO945 ,CPU Targets Byte Offset 945 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO944 ,CPU Targets Byte Offset 944 " group.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951 ,CPU Targets Byte Offset 951 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO950 ,CPU Targets Byte Offset 950 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO949 ,CPU Targets Byte Offset 949 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO948 ,CPU Targets Byte Offset 948 " group.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955 ,CPU Targets Byte Offset 955 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO954 ,CPU Targets Byte Offset 954 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO953 ,CPU Targets Byte Offset 953 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO952 ,CPU Targets Byte Offset 952 " group.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959 ,CPU Targets Byte Offset 959 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO958 ,CPU Targets Byte Offset 958 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO957 ,CPU Targets Byte Offset 957 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO956 ,CPU Targets Byte Offset 956 " else rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963 ,CPU Targets Byte Offset 963 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO962 ,CPU Targets Byte Offset 962 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO961 ,CPU Targets Byte Offset 961 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO960 ,CPU Targets Byte Offset 960 " group.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967 ,CPU Targets Byte Offset 967 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO966 ,CPU Targets Byte Offset 966 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO965 ,CPU Targets Byte Offset 965 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO964 ,CPU Targets Byte Offset 964 " group.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971 ,CPU Targets Byte Offset 971 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO970 ,CPU Targets Byte Offset 970 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO969 ,CPU Targets Byte Offset 969 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO968 ,CPU Targets Byte Offset 968 " group.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975 ,CPU Targets Byte Offset 975 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO974 ,CPU Targets Byte Offset 974 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO973 ,CPU Targets Byte Offset 973 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO972 ,CPU Targets Byte Offset 972 " group.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979 ,CPU Targets Byte Offset 979 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO978 ,CPU Targets Byte Offset 978 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO977 ,CPU Targets Byte Offset 977 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO976 ,CPU Targets Byte Offset 976 " group.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983 ,CPU Targets Byte Offset 983 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO982 ,CPU Targets Byte Offset 982 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO981 ,CPU Targets Byte Offset 981 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO980 ,CPU Targets Byte Offset 980 " group.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987 ,CPU Targets Byte Offset 987 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO986 ,CPU Targets Byte Offset 986 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO985 ,CPU Targets Byte Offset 985 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO984 ,CPU Targets Byte Offset 984 " group.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991 ,CPU Targets Byte Offset 991 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO990 ,CPU Targets Byte Offset 990 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO989 ,CPU Targets Byte Offset 989 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO988 ,CPU Targets Byte Offset 988 " else rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1F) group.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO995 ,CPU Targets Byte Offset 995 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO994 ,CPU Targets Byte Offset 994 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO993 ,CPU Targets Byte Offset 993 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO992 ,CPU Targets Byte Offset 992 " group.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO999 ,CPU Targets Byte Offset 999 " hexmask.long.byte 0x00 16.--23. 1. " CPUTBO998 ,CPU Targets Byte Offset 998 " hexmask.long.byte 0x00 8.--15. 1. " CPUTBO997 ,CPU Targets Byte Offset 997 " hexmask.long.byte 0x00 0.--7. 1. " CPUTBO996 ,CPU Targets Byte Offset 996 " group.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1003 ,CPU Targets Byte Offset 1003" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1002 ,CPU Targets Byte Offset 1002" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1001 ,CPU Targets Byte Offset 1001" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1000 ,CPU Targets Byte Offset 1000" group.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1007 ,CPU Targets Byte Offset 1007" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1006 ,CPU Targets Byte Offset 1006" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1005 ,CPU Targets Byte Offset 1005" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1004 ,CPU Targets Byte Offset 1004" group.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1011 ,CPU Targets Byte Offset 1011" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1010 ,CPU Targets Byte Offset 1010" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1009 ,CPU Targets Byte Offset 1009" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1008 ,CPU Targets Byte Offset 1008" group.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1015 ,CPU Targets Byte Offset 1015" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1014 ,CPU Targets Byte Offset 1014" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1013 ,CPU Targets Byte Offset 1013" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1012 ,CPU Targets Byte Offset 1012" group.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" hexmask.long.byte 0x00 24.--31. 1. " CPUTBO1019 ,CPU Targets Byte Offset 1019" hexmask.long.byte 0x00 16.--23. 1. " CPUTBO1018 ,CPU Targets Byte Offset 1018" hexmask.long.byte 0x00 8.--15. 1. " CPUTBO1017 ,CPU Targets Byte Offset 1017" hexmask.long.byte 0x00 0.--7. 1. " CPUTBO1016 ,CPU Targets Byte Offset 1016" else rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif else rgroup.long 0x800++0x03 line.long 0x00 "GICD_ITARGETSR0 ,Interrupt Processor Targets Register 0 " rgroup.long 0x804++0x03 line.long 0x00 "GICD_ITARGETSR1 ,Interrupt Processor Targets Register 1 " rgroup.long 0x808++0x03 line.long 0x00 "GICD_ITARGETSR2 ,Interrupt Processor Targets Register 2 " rgroup.long 0x80C++0x03 line.long 0x00 "GICD_ITARGETSR3 ,Interrupt Processor Targets Register 3 " rgroup.long 0x810++0x03 line.long 0x00 "GICD_ITARGETSR4 ,Interrupt Processor Targets Register 4 " rgroup.long 0x814++0x03 line.long 0x00 "GICD_ITARGETSR5 ,Interrupt Processor Targets Register 5 " rgroup.long 0x818++0x03 line.long 0x00 "GICD_ITARGETSR6 ,Interrupt Processor Targets Register 6 " rgroup.long 0x81C++0x03 line.long 0x00 "GICD_ITARGETSR7 ,Interrupt Processor Targets Register 7 " rgroup.long 0x820++0x03 line.long 0x00 "GICD_ITARGETSR8 ,Interrupt Processor Targets Register 8 " rgroup.long 0x824++0x03 line.long 0x00 "GICD_ITARGETSR9 ,Interrupt Processor Targets Register 9 " rgroup.long 0x828++0x03 line.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 " rgroup.long 0x82C++0x03 line.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 " rgroup.long 0x830++0x03 line.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 " rgroup.long 0x834++0x03 line.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 " rgroup.long 0x838++0x03 line.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 " rgroup.long 0x83C++0x03 line.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 " rgroup.long 0x840++0x03 line.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 " rgroup.long 0x844++0x03 line.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 " rgroup.long 0x848++0x03 line.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 " rgroup.long 0x84C++0x03 line.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 " rgroup.long 0x850++0x03 line.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 " rgroup.long 0x854++0x03 line.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 " rgroup.long 0x858++0x03 line.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 " rgroup.long 0x85C++0x03 line.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 " rgroup.long 0x860++0x03 line.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 " rgroup.long 0x864++0x03 line.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 " rgroup.long 0x868++0x03 line.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 " rgroup.long 0x86C++0x03 line.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 " rgroup.long 0x870++0x03 line.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 " rgroup.long 0x874++0x03 line.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 " rgroup.long 0x878++0x03 line.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 " rgroup.long 0x87C++0x03 line.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 " rgroup.long 0x880++0x03 line.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 " rgroup.long 0x884++0x03 line.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 " rgroup.long 0x888++0x03 line.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 " rgroup.long 0x88C++0x03 line.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 " rgroup.long 0x890++0x03 line.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 " rgroup.long 0x894++0x03 line.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 " rgroup.long 0x898++0x03 line.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 " rgroup.long 0x89C++0x03 line.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 " rgroup.long 0x8A0++0x03 line.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 " rgroup.long 0x8A4++0x03 line.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 " rgroup.long 0x8A8++0x03 line.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 " rgroup.long 0x8AC++0x03 line.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 " rgroup.long 0x8B0++0x03 line.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 " rgroup.long 0x8B4++0x03 line.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 " rgroup.long 0x8B8++0x03 line.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 " rgroup.long 0x8BC++0x03 line.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 " rgroup.long 0x8C0++0x03 line.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 " rgroup.long 0x8C4++0x03 line.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 " rgroup.long 0x8C8++0x03 line.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 " rgroup.long 0x8CC++0x03 line.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 " rgroup.long 0x8D0++0x03 line.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 " rgroup.long 0x8D4++0x03 line.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 " rgroup.long 0x8D8++0x03 line.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 " rgroup.long 0x8DC++0x03 line.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 " rgroup.long 0x8E0++0x03 line.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 " rgroup.long 0x8E4++0x03 line.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 " rgroup.long 0x8E8++0x03 line.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 " rgroup.long 0x8EC++0x03 line.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 " rgroup.long 0x8F0++0x03 line.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 " rgroup.long 0x8F4++0x03 line.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 " rgroup.long 0x8F8++0x03 line.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 " rgroup.long 0x8FC++0x03 line.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 " rgroup.long 0x900++0x03 line.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 " rgroup.long 0x904++0x03 line.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 " rgroup.long 0x908++0x03 line.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 " rgroup.long 0x90C++0x03 line.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 " rgroup.long 0x910++0x03 line.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 " rgroup.long 0x914++0x03 line.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 " rgroup.long 0x918++0x03 line.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 " rgroup.long 0x91C++0x03 line.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 " rgroup.long 0x920++0x03 line.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 " rgroup.long 0x924++0x03 line.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 " rgroup.long 0x928++0x03 line.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 " rgroup.long 0x92C++0x03 line.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 " rgroup.long 0x930++0x03 line.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 " rgroup.long 0x934++0x03 line.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 " rgroup.long 0x938++0x03 line.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 " rgroup.long 0x93C++0x03 line.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 " rgroup.long 0x940++0x03 line.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 " rgroup.long 0x944++0x03 line.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 " rgroup.long 0x948++0x03 line.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 " rgroup.long 0x94C++0x03 line.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 " rgroup.long 0x950++0x03 line.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 " rgroup.long 0x954++0x03 line.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 " rgroup.long 0x958++0x03 line.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 " rgroup.long 0x95C++0x03 line.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 " rgroup.long 0x960++0x03 line.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 " rgroup.long 0x964++0x03 line.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 " rgroup.long 0x968++0x03 line.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 " rgroup.long 0x96C++0x03 line.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 " rgroup.long 0x970++0x03 line.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 " rgroup.long 0x974++0x03 line.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 " rgroup.long 0x978++0x03 line.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 " rgroup.long 0x97C++0x03 line.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 " rgroup.long 0x980++0x03 line.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 " rgroup.long 0x984++0x03 line.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 " rgroup.long 0x988++0x03 line.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 " rgroup.long 0x98C++0x03 line.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 " rgroup.long 0x990++0x03 line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100" rgroup.long 0x994++0x03 line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101" rgroup.long 0x998++0x03 line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102" rgroup.long 0x99C++0x03 line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103" rgroup.long 0x9A0++0x03 line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104" rgroup.long 0x9A4++0x03 line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105" rgroup.long 0x9A8++0x03 line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106" rgroup.long 0x9AC++0x03 line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107" rgroup.long 0x9B0++0x03 line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108" rgroup.long 0x9B4++0x03 line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109" rgroup.long 0x9B8++0x03 line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110" rgroup.long 0x9BC++0x03 line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111" rgroup.long 0x9C0++0x03 line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112" rgroup.long 0x9C4++0x03 line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113" rgroup.long 0x9C8++0x03 line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114" rgroup.long 0x9CC++0x03 line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115" rgroup.long 0x9D0++0x03 line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116" rgroup.long 0x9D4++0x03 line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117" rgroup.long 0x9D8++0x03 line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118" rgroup.long 0x9DC++0x03 line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119" rgroup.long 0x9E0++0x03 line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120" rgroup.long 0x9E4++0x03 line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121" rgroup.long 0x9E8++0x03 line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122" rgroup.long 0x9EC++0x03 line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123" rgroup.long 0x9F0++0x03 line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124" rgroup.long 0x9F4++0x03 line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125" rgroup.long 0x9F8++0x03 line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126" rgroup.long 0x9FC++0x03 line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127" rgroup.long 0xA00++0x03 line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128" rgroup.long 0xA04++0x03 line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129" rgroup.long 0xA08++0x03 line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130" rgroup.long 0xA0C++0x03 line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131" rgroup.long 0xA10++0x03 line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132" rgroup.long 0xA14++0x03 line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133" rgroup.long 0xA18++0x03 line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134" rgroup.long 0xA1C++0x03 line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135" rgroup.long 0xA20++0x03 line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136" rgroup.long 0xA24++0x03 line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137" rgroup.long 0xA28++0x03 line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138" rgroup.long 0xA2C++0x03 line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139" rgroup.long 0xA30++0x03 line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140" rgroup.long 0xA34++0x03 line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141" rgroup.long 0xA38++0x03 line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142" rgroup.long 0xA3C++0x03 line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143" rgroup.long 0xA40++0x03 line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144" rgroup.long 0xA44++0x03 line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145" rgroup.long 0xA48++0x03 line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146" rgroup.long 0xA4C++0x03 line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147" rgroup.long 0xA50++0x03 line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148" rgroup.long 0xA54++0x03 line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149" rgroup.long 0xA58++0x03 line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150" rgroup.long 0xA5C++0x03 line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151" rgroup.long 0xA60++0x03 line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152" rgroup.long 0xA64++0x03 line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153" rgroup.long 0xA68++0x03 line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154" rgroup.long 0xA6C++0x03 line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155" rgroup.long 0xA70++0x03 line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156" rgroup.long 0xA74++0x03 line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157" rgroup.long 0xA78++0x03 line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158" rgroup.long 0xA7C++0x03 line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159" rgroup.long 0xA80++0x03 line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160" rgroup.long 0xA84++0x03 line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161" rgroup.long 0xA88++0x03 line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162" rgroup.long 0xA8C++0x03 line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163" rgroup.long 0xA90++0x03 line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164" rgroup.long 0xA94++0x03 line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165" rgroup.long 0xA98++0x03 line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166" rgroup.long 0xA9C++0x03 line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167" rgroup.long 0xAA0++0x03 line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168" rgroup.long 0xAA4++0x03 line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169" rgroup.long 0xAA8++0x03 line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170" rgroup.long 0xAAC++0x03 line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171" rgroup.long 0xAB0++0x03 line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172" rgroup.long 0xAB4++0x03 line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173" rgroup.long 0xAB8++0x03 line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174" rgroup.long 0xABC++0x03 line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175" rgroup.long 0xAC0++0x03 line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176" rgroup.long 0xAC4++0x03 line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177" rgroup.long 0xAC8++0x03 line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178" rgroup.long 0xACC++0x03 line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179" rgroup.long 0xAD0++0x03 line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180" rgroup.long 0xAD4++0x03 line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181" rgroup.long 0xAD8++0x03 line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182" rgroup.long 0xADC++0x03 line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183" rgroup.long 0xAE0++0x03 line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184" rgroup.long 0xAE4++0x03 line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185" rgroup.long 0xAE8++0x03 line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186" rgroup.long 0xAEC++0x03 line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187" rgroup.long 0xAF0++0x03 line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188" rgroup.long 0xAF4++0x03 line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189" rgroup.long 0xAF8++0x03 line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190" rgroup.long 0xAFC++0x03 line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191" rgroup.long 0xB00++0x03 line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192" rgroup.long 0xB04++0x03 line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193" rgroup.long 0xB08++0x03 line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194" rgroup.long 0xB0C++0x03 line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195" rgroup.long 0xB10++0x03 line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196" rgroup.long 0xB14++0x03 line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197" rgroup.long 0xB18++0x03 line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198" rgroup.long 0xB1C++0x03 line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199" rgroup.long 0xB20++0x03 line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200" rgroup.long 0xB24++0x03 line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201" rgroup.long 0xB28++0x03 line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202" rgroup.long 0xB2C++0x03 line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203" rgroup.long 0xB30++0x03 line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204" rgroup.long 0xB34++0x03 line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205" rgroup.long 0xB38++0x03 line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206" rgroup.long 0xB3C++0x03 line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207" rgroup.long 0xB40++0x03 line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208" rgroup.long 0xB44++0x03 line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209" rgroup.long 0xB48++0x03 line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210" rgroup.long 0xB4C++0x03 line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211" rgroup.long 0xB50++0x03 line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212" rgroup.long 0xB54++0x03 line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213" rgroup.long 0xB58++0x03 line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214" rgroup.long 0xB5C++0x03 line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215" rgroup.long 0xB60++0x03 line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216" rgroup.long 0xB64++0x03 line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217" rgroup.long 0xB68++0x03 line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218" rgroup.long 0xB6C++0x03 line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219" rgroup.long 0xB70++0x03 line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220" rgroup.long 0xB74++0x03 line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221" rgroup.long 0xB78++0x03 line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222" rgroup.long 0xB7C++0x03 line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223" rgroup.long 0xB80++0x03 line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224" rgroup.long 0xB84++0x03 line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225" rgroup.long 0xB88++0x03 line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226" rgroup.long 0xB8C++0x03 line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227" rgroup.long 0xB90++0x03 line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228" rgroup.long 0xB94++0x03 line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229" rgroup.long 0xB98++0x03 line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230" rgroup.long 0xB9C++0x03 line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231" rgroup.long 0xBA0++0x03 line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232" rgroup.long 0xBA4++0x03 line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233" rgroup.long 0xBA8++0x03 line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234" rgroup.long 0xBAC++0x03 line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235" rgroup.long 0xBB0++0x03 line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236" rgroup.long 0xBB4++0x03 line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237" rgroup.long 0xBB8++0x03 line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238" rgroup.long 0xBBC++0x03 line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239" rgroup.long 0xBC0++0x03 line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240" rgroup.long 0xBC4++0x03 line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241" rgroup.long 0xBC8++0x03 line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242" rgroup.long 0xBCC++0x03 line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243" rgroup.long 0xBD0++0x03 line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244" rgroup.long 0xBD4++0x03 line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245" rgroup.long 0xBD8++0x03 line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246" rgroup.long 0xBDC++0x03 line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247" rgroup.long 0xBE0++0x03 line.long 0x00 "GICD_ITARGETSR248,Interrupt Processor Targets Register 248" rgroup.long 0xBE4++0x03 line.long 0x00 "GICD_ITARGETSR249,Interrupt Processor Targets Register 249" rgroup.long 0xBE8++0x03 line.long 0x00 "GICD_ITARGETSR250,Interrupt Processor Targets Register 250" rgroup.long 0xBEC++0x03 line.long 0x00 "GICD_ITARGETSR251,Interrupt Processor Targets Register 251" rgroup.long 0xBF0++0x03 line.long 0x00 "GICD_ITARGETSR252,Interrupt Processor Targets Register 252" rgroup.long 0xBF4++0x03 line.long 0x00 "GICD_ITARGETSR253,Interrupt Processor Targets Register 253" rgroup.long 0xBF8++0x03 line.long 0x00 "GICD_ITARGETSR254,Interrupt Processor Targets Register 254" endif tree.end width 14. tree "Configuration Registers" rgroup.long 0xC00++0x03 line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register" textline " " rgroup.long 0xC04++0x03 line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1) group.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC08++0x03 line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2" rgroup.long 0xC0C++0x03 line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x2) group.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC10++0x03 line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4" rgroup.long 0xC14++0x03 line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x3) group.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC18++0x03 line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6" rgroup.long 0xC1C++0x03 line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x4) group.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC20++0x03 line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8" rgroup.long 0xC24++0x03 line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x5) group.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC28++0x03 line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10" rgroup.long 0xC2C++0x03 line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x6) group.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC30++0x03 line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12" rgroup.long 0xC34++0x03 line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x7) group.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC38++0x03 line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14" rgroup.long 0xC3C++0x03 line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x8) group.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC40++0x03 line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16" rgroup.long 0xC44++0x03 line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x9) group.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC48++0x03 line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18" rgroup.long 0xC4C++0x03 line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xA) group.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC50++0x03 line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20" rgroup.long 0xC54++0x03 line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xB) group.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC58++0x03 line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22" rgroup.long 0xC5C++0x03 line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xC) group.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC60++0x03 line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24" rgroup.long 0xC64++0x03 line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xD) group.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC68++0x03 line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26" rgroup.long 0xC6C++0x03 line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xE) group.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC70++0x03 line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28" rgroup.long 0xC74++0x03 line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0xF) group.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC78++0x03 line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30" rgroup.long 0xC7C++0x03 line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) group.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC80++0x03 line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32" rgroup.long 0xC84++0x03 line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) group.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC88++0x03 line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34" rgroup.long 0xC8C++0x03 line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) group.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC90++0x03 line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36" rgroup.long 0xC94++0x03 line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) group.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xC98++0x03 line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38" rgroup.long 0xC9C++0x03 line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) group.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA0++0x03 line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40" rgroup.long 0xCA4++0x03 line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) group.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCA8++0x03 line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42" rgroup.long 0xCAC++0x03 line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) group.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB0++0x03 line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44" rgroup.long 0xCB4++0x03 line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) group.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCB8++0x03 line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46" rgroup.long 0xCBC++0x03 line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) group.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC0++0x03 line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48" rgroup.long 0xCC4++0x03 line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) group.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCC8++0x03 line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50" rgroup.long 0xCCC++0x03 line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) group.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD0++0x03 line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52" rgroup.long 0xCD4++0x03 line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) group.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCD8++0x03 line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54" rgroup.long 0xCDC++0x03 line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) group.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE0++0x03 line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56" rgroup.long 0xCE4++0x03 line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) group.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCE8++0x03 line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58" rgroup.long 0xCEC++0x03 line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) group.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF0++0x03 line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60" rgroup.long 0xCF4++0x03 line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61" endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1F) group.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" group.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15" "Level,Edge" bitfld.long 0x00 29. " ICF14 ,Interrupt Configuration 14" "Level,Edge" bitfld.long 0x00 27. " ICF13 ,Interrupt Configuration 13" "Level,Edge" textline " " bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12" "Level,Edge" bitfld.long 0x00 23. " ICF11 ,Interrupt Configuration 11" "Level,Edge" bitfld.long 0x00 21. " ICF10 ,Interrupt Configuration 10" "Level,Edge" textline " " bitfld.long 0x00 19. " ICF9 ,Interrupt Configuration 9" "Level,Edge" bitfld.long 0x00 17. " ICF8 ,Interrupt Configuration 8" "Level,Edge" bitfld.long 0x00 15. " ICF7 ,Interrupt Configuration 7" "Level,Edge" textline " " bitfld.long 0x00 13. " ICF6 ,Interrupt Configuration 6" "Level,Edge" bitfld.long 0x00 11. " ICF5 ,Interrupt Configuration 5" "Level,Edge" bitfld.long 0x00 9. " ICF4 ,Interrupt Configuration 4" "Level,Edge" textline " " bitfld.long 0x00 7. " ICF3 ,Interrupt Configuration 3" "Level,Edge" bitfld.long 0x00 5. " ICF2 ,Interrupt Configuration 2" "Level,Edge" bitfld.long 0x00 3. " ICF1 ,Interrupt Configuration 1" "Level,Edge" textline " " bitfld.long 0x00 1. " ICF0 ,Interrupt Configuration 0" "Level,Edge" else rgroup.long 0xCF8++0x03 line.long 0x00 "GICD_ICFGR62,Interrupt Configuration Register 62" rgroup.long 0xCFC++0x03 line.long 0x00 "GICD_ICFGR63,Interrupt Configuration Register 63" endif tree.end width 12. tree "Peripheral Interrupt Status Registers" rgroup.long 0x0D00++0x03 line.long 0x00 "GICD_PPISR,Private Peripheral Interrupt Status Register" bitfld.long 0x00 15. " PPI3S ,nIRQ pin status" "No interrupt,Interrupt" bitfld.long 0x00 14. " PPI2S ,Non-secure Physical Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 13. " PPI1S ,Secure Physical Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 12. " PPI0S ,nFIQ pin status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " PPI4S ,Virtual Timer event status" "No interrupt,Interrupt" bitfld.long 0x00 10. " PPI5S ,Hypervisor Timer event status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " PPI6S ,Virtual Maintenance Status" "No interrupt,Interrupt" textline " " width 22. if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x01) rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0" bitfld.long 0x00 31. " IRQS31 ,IRQS Status Bit 31" "Low,High" bitfld.long 0x00 30. " IRQS30 ,IRQS Status Bit 30" "Low,High" bitfld.long 0x00 29. " IRQS29 ,IRQS Status Bit 29" "Low,High" textline " " bitfld.long 0x00 28. " IRQS28 ,IRQS Status Bit 28" "Low,High" bitfld.long 0x00 27. " IRQS27 ,IRQS Status Bit 27" "Low,High" bitfld.long 0x00 26. " IRQS26 ,IRQS Status Bit 26" "Low,High" textline " " bitfld.long 0x00 25. " IRQS25 ,IRQS Status Bit 25" "Low,High" bitfld.long 0x00 24. " IRQS24 ,IRQS Status Bit 24" "Low,High" bitfld.long 0x00 23. " IRQS23 ,IRQS Status Bit 23" "Low,High" textline " " bitfld.long 0x00 22. " IRQS22 ,IRQS Status Bit 22" "Low,High" bitfld.long 0x00 21. " IRQS21 ,IRQS Status Bit 21" "Low,High" bitfld.long 0x00 20. " IRQS20 ,IRQS Status Bit 20" "Low,High" textline " " bitfld.long 0x00 19. " IRQS19 ,IRQS Status Bit 19" "Low,High" bitfld.long 0x00 18. " IRQS18 ,IRQS Status Bit 18" "Low,High" bitfld.long 0x00 17. " IRQS17 ,IRQS Status Bit 17" "Low,High" textline " " bitfld.long 0x00 16. " IRQS16 ,IRQS Status Bit 16" "Low,High" bitfld.long 0x00 15. " IRQS15 ,IRQS Status Bit 15" "Low,High" bitfld.long 0x00 14. " IRQS14 ,IRQS Status Bit 14" "Low,High" textline " " bitfld.long 0x00 13. " IRQS13 ,IRQS Status Bit 13" "Low,High" bitfld.long 0x00 12. " IRQS12 ,IRQS Status Bit 12" "Low,High" bitfld.long 0x00 11. " IRQS11 ,IRQS Status Bit 11" "Low,High" textline " " bitfld.long 0x00 10. " IRQS10 ,IRQS Status Bit 10" "Low,High" bitfld.long 0x00 9. " IRQS9 ,IRQS Status Bit 9" "Low,High" bitfld.long 0x00 8. " IRQS8 ,IRQS Status Bit 8" "Low,High" textline " " bitfld.long 0x00 7. " IRQS7 ,IRQS Status Bit 7" "Low,High" bitfld.long 0x00 6. " IRQS6 ,IRQS Status Bit 6" "Low,High" bitfld.long 0x00 5. " IRQS5 ,IRQS Status Bit 5" "Low,High" textline " " bitfld.long 0x00 4. " IRQS4 ,IRQS Status Bit 4" "Low,High" bitfld.long 0x00 3. " IRQS3 ,IRQS Status Bit 3" "Low,High" bitfld.long 0x00 2. " IRQS2 ,IRQS Status Bit 2" "Low,High" textline " " bitfld.long 0x00 1. " IRQS1 ,IRQS Status Bit 1" "Low,High" bitfld.long 0x00 0. " IRQS0 ,IRQS Status Bit 0" "Low,High" else rgroup.long 0x0D04++0x03 line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x02) rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" bitfld.long 0x00 31. " IRQS63 ,IRQS Status Bit 63" "Low,High" bitfld.long 0x00 30. " IRQS62 ,IRQS Status Bit 62" "Low,High" bitfld.long 0x00 29. " IRQS61 ,IRQS Status Bit 61" "Low,High" textline " " bitfld.long 0x00 28. " IRQS60 ,IRQS Status Bit 60" "Low,High" bitfld.long 0x00 27. " IRQS59 ,IRQS Status Bit 59" "Low,High" bitfld.long 0x00 26. " IRQS58 ,IRQS Status Bit 58" "Low,High" textline " " bitfld.long 0x00 25. " IRQS57 ,IRQS Status Bit 57" "Low,High" bitfld.long 0x00 24. " IRQS56 ,IRQS Status Bit 56" "Low,High" bitfld.long 0x00 23. " IRQS55 ,IRQS Status Bit 55" "Low,High" textline " " bitfld.long 0x00 22. " IRQS54 ,IRQS Status Bit 54" "Low,High" bitfld.long 0x00 21. " IRQS53 ,IRQS Status Bit 53" "Low,High" bitfld.long 0x00 20. " IRQS52 ,IRQS Status Bit 52" "Low,High" textline " " bitfld.long 0x00 19. " IRQS51 ,IRQS Status Bit 51" "Low,High" bitfld.long 0x00 18. " IRQS50 ,IRQS Status Bit 50" "Low,High" bitfld.long 0x00 17. " IRQS49 ,IRQS Status Bit 49" "Low,High" textline " " bitfld.long 0x00 16. " IRQS48 ,IRQS Status Bit 48" "Low,High" bitfld.long 0x00 15. " IRQS47 ,IRQS Status Bit 47" "Low,High" bitfld.long 0x00 14. " IRQS46 ,IRQS Status Bit 46" "Low,High" textline " " bitfld.long 0x00 13. " IRQS45 ,IRQS Status Bit 45" "Low,High" bitfld.long 0x00 12. " IRQS44 ,IRQS Status Bit 44" "Low,High" bitfld.long 0x00 11. " IRQS43 ,IRQS Status Bit 43" "Low,High" textline " " bitfld.long 0x00 10. " IRQS42 ,IRQS Status Bit 42" "Low,High" bitfld.long 0x00 9. " IRQS41 ,IRQS Status Bit 41" "Low,High" bitfld.long 0x00 8. " IRQS40 ,IRQS Status Bit 40" "Low,High" textline " " bitfld.long 0x00 7. " IRQS39 ,IRQS Status Bit 39" "Low,High" bitfld.long 0x00 6. " IRQS38 ,IRQS Status Bit 38" "Low,High" bitfld.long 0x00 5. " IRQS37 ,IRQS Status Bit 37" "Low,High" textline " " bitfld.long 0x00 4. " IRQS36 ,IRQS Status Bit 36" "Low,High" bitfld.long 0x00 3. " IRQS35 ,IRQS Status Bit 35" "Low,High" bitfld.long 0x00 2. " IRQS34 ,IRQS Status Bit 34" "Low,High" textline " " bitfld.long 0x00 1. " IRQS33 ,IRQS Status Bit 33" "Low,High" bitfld.long 0x00 0. " IRQS32 ,IRQS Status Bit 32" "Low,High" else rgroup.long 0x0D08++0x03 line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x03) rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" bitfld.long 0x00 31. " IRQS95 ,IRQS Status Bit 95" "Low,High" bitfld.long 0x00 30. " IRQS94 ,IRQS Status Bit 94" "Low,High" bitfld.long 0x00 29. " IRQS93 ,IRQS Status Bit 93" "Low,High" textline " " bitfld.long 0x00 28. " IRQS92 ,IRQS Status Bit 92" "Low,High" bitfld.long 0x00 27. " IRQS91 ,IRQS Status Bit 91" "Low,High" bitfld.long 0x00 26. " IRQS90 ,IRQS Status Bit 90" "Low,High" textline " " bitfld.long 0x00 25. " IRQS89 ,IRQS Status Bit 89" "Low,High" bitfld.long 0x00 24. " IRQS88 ,IRQS Status Bit 88" "Low,High" bitfld.long 0x00 23. " IRQS87 ,IRQS Status Bit 87" "Low,High" textline " " bitfld.long 0x00 22. " IRQS86 ,IRQS Status Bit 86" "Low,High" bitfld.long 0x00 21. " IRQS85 ,IRQS Status Bit 85" "Low,High" bitfld.long 0x00 20. " IRQS84 ,IRQS Status Bit 84" "Low,High" textline " " bitfld.long 0x00 19. " IRQS83 ,IRQS Status Bit 83" "Low,High" bitfld.long 0x00 18. " IRQS82 ,IRQS Status Bit 82" "Low,High" bitfld.long 0x00 17. " IRQS81 ,IRQS Status Bit 81" "Low,High" textline " " bitfld.long 0x00 16. " IRQS80 ,IRQS Status Bit 80" "Low,High" bitfld.long 0x00 15. " IRQS79 ,IRQS Status Bit 79" "Low,High" bitfld.long 0x00 14. " IRQS78 ,IRQS Status Bit 78" "Low,High" textline " " bitfld.long 0x00 13. " IRQS77 ,IRQS Status Bit 77" "Low,High" bitfld.long 0x00 12. " IRQS76 ,IRQS Status Bit 76" "Low,High" bitfld.long 0x00 11. " IRQS75 ,IRQS Status Bit 75" "Low,High" textline " " bitfld.long 0x00 10. " IRQS74 ,IRQS Status Bit 74" "Low,High" bitfld.long 0x00 9. " IRQS73 ,IRQS Status Bit 73" "Low,High" bitfld.long 0x00 8. " IRQS72 ,IRQS Status Bit 72" "Low,High" textline " " bitfld.long 0x00 7. " IRQS71 ,IRQS Status Bit 71" "Low,High" bitfld.long 0x00 6. " IRQS70 ,IRQS Status Bit 70" "Low,High" bitfld.long 0x00 5. " IRQS69 ,IRQS Status Bit 69" "Low,High" textline " " bitfld.long 0x00 4. " IRQS68 ,IRQS Status Bit 68" "Low,High" bitfld.long 0x00 3. " IRQS67 ,IRQS Status Bit 67" "Low,High" bitfld.long 0x00 2. " IRQS66 ,IRQS Status Bit 66" "Low,High" textline " " bitfld.long 0x00 1. " IRQS65 ,IRQS Status Bit 65" "Low,High" bitfld.long 0x00 0. " IRQS64 ,IRQS Status Bit 64" "Low,High" else rgroup.long 0x0D0C++0x03 line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x04) rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" bitfld.long 0x00 31. " IRQS127 ,IRQS Status Bit 127" "Low,High" bitfld.long 0x00 30. " IRQS126 ,IRQS Status Bit 126" "Low,High" bitfld.long 0x00 29. " IRQS125 ,IRQS Status Bit 125" "Low,High" textline " " bitfld.long 0x00 28. " IRQS124 ,IRQS Status Bit 124" "Low,High" bitfld.long 0x00 27. " IRQS123 ,IRQS Status Bit 123" "Low,High" bitfld.long 0x00 26. " IRQS122 ,IRQS Status Bit 122" "Low,High" textline " " bitfld.long 0x00 25. " IRQS121 ,IRQS Status Bit 121" "Low,High" bitfld.long 0x00 24. " IRQS120 ,IRQS Status Bit 120" "Low,High" bitfld.long 0x00 23. " IRQS119 ,IRQS Status Bit 119" "Low,High" textline " " bitfld.long 0x00 22. " IRQS118 ,IRQS Status Bit 118" "Low,High" bitfld.long 0x00 21. " IRQS117 ,IRQS Status Bit 117" "Low,High" bitfld.long 0x00 20. " IRQS116 ,IRQS Status Bit 116" "Low,High" textline " " bitfld.long 0x00 19. " IRQS115 ,IRQS Status Bit 115" "Low,High" bitfld.long 0x00 18. " IRQS114 ,IRQS Status Bit 114" "Low,High" bitfld.long 0x00 17. " IRQS113 ,IRQS Status Bit 113" "Low,High" textline " " bitfld.long 0x00 16. " IRQS112 ,IRQS Status Bit 112" "Low,High" bitfld.long 0x00 15. " IRQS111 ,IRQS Status Bit 111" "Low,High" bitfld.long 0x00 14. " IRQS110 ,IRQS Status Bit 110" "Low,High" textline " " bitfld.long 0x00 13. " IRQS109 ,IRQS Status Bit 109" "Low,High" bitfld.long 0x00 12. " IRQS108 ,IRQS Status Bit 108" "Low,High" bitfld.long 0x00 11. " IRQS107 ,IRQS Status Bit 107" "Low,High" textline " " bitfld.long 0x00 10. " IRQS106 ,IRQS Status Bit 106" "Low,High" bitfld.long 0x00 9. " IRQS105 ,IRQS Status Bit 105" "Low,High" bitfld.long 0x00 8. " IRQS104 ,IRQS Status Bit 104" "Low,High" textline " " bitfld.long 0x00 7. " IRQS103 ,IRQS Status Bit 103" "Low,High" bitfld.long 0x00 6. " IRQS102 ,IRQS Status Bit 102" "Low,High" bitfld.long 0x00 5. " IRQS101 ,IRQS Status Bit 101" "Low,High" textline " " bitfld.long 0x00 4. " IRQS100 ,IRQS Status Bit 100" "Low,High" bitfld.long 0x00 3. " IRQS99 ,IRQS Status Bit 99" "Low,High" bitfld.long 0x00 2. " IRQS98 ,IRQS Status Bit 98" "Low,High" textline " " bitfld.long 0x00 1. " IRQS97 ,IRQS Status Bit 97" "Low,High" bitfld.long 0x00 0. " IRQS96 ,IRQS Status Bit 96" "Low,High" else rgroup.long 0x0D10++0x03 line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x05) rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" bitfld.long 0x00 31. " IRQS159 ,IRQS Status Bit 159" "Low,High" bitfld.long 0x00 30. " IRQS158 ,IRQS Status Bit 158" "Low,High" bitfld.long 0x00 29. " IRQS157 ,IRQS Status Bit 157" "Low,High" textline " " bitfld.long 0x00 28. " IRQS156 ,IRQS Status Bit 156" "Low,High" bitfld.long 0x00 27. " IRQS155 ,IRQS Status Bit 155" "Low,High" bitfld.long 0x00 26. " IRQS154 ,IRQS Status Bit 154" "Low,High" textline " " bitfld.long 0x00 25. " IRQS153 ,IRQS Status Bit 153" "Low,High" bitfld.long 0x00 24. " IRQS152 ,IRQS Status Bit 152" "Low,High" bitfld.long 0x00 23. " IRQS151 ,IRQS Status Bit 151" "Low,High" textline " " bitfld.long 0x00 22. " IRQS150 ,IRQS Status Bit 150" "Low,High" bitfld.long 0x00 21. " IRQS149 ,IRQS Status Bit 149" "Low,High" bitfld.long 0x00 20. " IRQS148 ,IRQS Status Bit 148" "Low,High" textline " " bitfld.long 0x00 19. " IRQS147 ,IRQS Status Bit 147" "Low,High" bitfld.long 0x00 18. " IRQS146 ,IRQS Status Bit 146" "Low,High" bitfld.long 0x00 17. " IRQS145 ,IRQS Status Bit 145" "Low,High" textline " " bitfld.long 0x00 16. " IRQS144 ,IRQS Status Bit 144" "Low,High" bitfld.long 0x00 15. " IRQS143 ,IRQS Status Bit 143" "Low,High" bitfld.long 0x00 14. " IRQS142 ,IRQS Status Bit 142" "Low,High" textline " " bitfld.long 0x00 13. " IRQS141 ,IRQS Status Bit 141" "Low,High" bitfld.long 0x00 12. " IRQS140 ,IRQS Status Bit 140" "Low,High" bitfld.long 0x00 11. " IRQS139 ,IRQS Status Bit 139" "Low,High" textline " " bitfld.long 0x00 10. " IRQS138 ,IRQS Status Bit 138" "Low,High" bitfld.long 0x00 9. " IRQS137 ,IRQS Status Bit 137" "Low,High" bitfld.long 0x00 8. " IRQS136 ,IRQS Status Bit 136" "Low,High" textline " " bitfld.long 0x00 7. " IRQS135 ,IRQS Status Bit 135" "Low,High" bitfld.long 0x00 6. " IRQS134 ,IRQS Status Bit 134" "Low,High" bitfld.long 0x00 5. " IRQS133 ,IRQS Status Bit 133" "Low,High" textline " " bitfld.long 0x00 4. " IRQS132 ,IRQS Status Bit 132" "Low,High" bitfld.long 0x00 3. " IRQS131 ,IRQS Status Bit 131" "Low,High" bitfld.long 0x00 2. " IRQS130 ,IRQS Status Bit 130" "Low,High" textline " " bitfld.long 0x00 1. " IRQS129 ,IRQS Status Bit 129" "Low,High" bitfld.long 0x00 0. " IRQS128 ,IRQS Status Bit 128" "Low,High" else rgroup.long 0x0D14++0x03 line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x06) rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" bitfld.long 0x00 31. " IRQS191 ,IRQS Status Bit 191" "Low,High" bitfld.long 0x00 30. " IRQS190 ,IRQS Status Bit 190" "Low,High" bitfld.long 0x00 29. " IRQS189 ,IRQS Status Bit 189" "Low,High" textline " " bitfld.long 0x00 28. " IRQS188 ,IRQS Status Bit 188" "Low,High" bitfld.long 0x00 27. " IRQS187 ,IRQS Status Bit 187" "Low,High" bitfld.long 0x00 26. " IRQS186 ,IRQS Status Bit 186" "Low,High" textline " " bitfld.long 0x00 25. " IRQS185 ,IRQS Status Bit 185" "Low,High" bitfld.long 0x00 24. " IRQS184 ,IRQS Status Bit 184" "Low,High" bitfld.long 0x00 23. " IRQS183 ,IRQS Status Bit 183" "Low,High" textline " " bitfld.long 0x00 22. " IRQS182 ,IRQS Status Bit 182" "Low,High" bitfld.long 0x00 21. " IRQS181 ,IRQS Status Bit 181" "Low,High" bitfld.long 0x00 20. " IRQS180 ,IRQS Status Bit 180" "Low,High" textline " " bitfld.long 0x00 19. " IRQS179 ,IRQS Status Bit 179" "Low,High" bitfld.long 0x00 18. " IRQS178 ,IRQS Status Bit 178" "Low,High" bitfld.long 0x00 17. " IRQS177 ,IRQS Status Bit 177" "Low,High" textline " " bitfld.long 0x00 16. " IRQS176 ,IRQS Status Bit 176" "Low,High" bitfld.long 0x00 15. " IRQS175 ,IRQS Status Bit 175" "Low,High" bitfld.long 0x00 14. " IRQS174 ,IRQS Status Bit 174" "Low,High" textline " " bitfld.long 0x00 13. " IRQS173 ,IRQS Status Bit 173" "Low,High" bitfld.long 0x00 12. " IRQS172 ,IRQS Status Bit 172" "Low,High" bitfld.long 0x00 11. " IRQS171 ,IRQS Status Bit 171" "Low,High" textline " " bitfld.long 0x00 10. " IRQS170 ,IRQS Status Bit 170" "Low,High" bitfld.long 0x00 9. " IRQS169 ,IRQS Status Bit 169" "Low,High" bitfld.long 0x00 8. " IRQS168 ,IRQS Status Bit 168" "Low,High" textline " " bitfld.long 0x00 7. " IRQS167 ,IRQS Status Bit 167" "Low,High" bitfld.long 0x00 6. " IRQS166 ,IRQS Status Bit 166" "Low,High" bitfld.long 0x00 5. " IRQS165 ,IRQS Status Bit 165" "Low,High" textline " " bitfld.long 0x00 4. " IRQS164 ,IRQS Status Bit 164" "Low,High" bitfld.long 0x00 3. " IRQS163 ,IRQS Status Bit 163" "Low,High" bitfld.long 0x00 2. " IRQS162 ,IRQS Status Bit 162" "Low,High" textline " " bitfld.long 0x00 1. " IRQS161 ,IRQS Status Bit 161" "Low,High" bitfld.long 0x00 0. " IRQS160 ,IRQS Status Bit 160" "Low,High" else rgroup.long 0x0D18++0x03 line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x07) rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" bitfld.long 0x00 31. " IRQS223 ,IRQS Status Bit 223" "Low,High" bitfld.long 0x00 30. " IRQS222 ,IRQS Status Bit 222" "Low,High" bitfld.long 0x00 29. " IRQS221 ,IRQS Status Bit 221" "Low,High" textline " " bitfld.long 0x00 28. " IRQS220 ,IRQS Status Bit 220" "Low,High" bitfld.long 0x00 27. " IRQS219 ,IRQS Status Bit 219" "Low,High" bitfld.long 0x00 26. " IRQS218 ,IRQS Status Bit 218" "Low,High" textline " " bitfld.long 0x00 25. " IRQS217 ,IRQS Status Bit 217" "Low,High" bitfld.long 0x00 24. " IRQS216 ,IRQS Status Bit 216" "Low,High" bitfld.long 0x00 23. " IRQS215 ,IRQS Status Bit 215" "Low,High" textline " " bitfld.long 0x00 22. " IRQS214 ,IRQS Status Bit 214" "Low,High" bitfld.long 0x00 21. " IRQS213 ,IRQS Status Bit 213" "Low,High" bitfld.long 0x00 20. " IRQS212 ,IRQS Status Bit 212" "Low,High" textline " " bitfld.long 0x00 19. " IRQS211 ,IRQS Status Bit 211" "Low,High" bitfld.long 0x00 18. " IRQS210 ,IRQS Status Bit 210" "Low,High" bitfld.long 0x00 17. " IRQS209 ,IRQS Status Bit 209" "Low,High" textline " " bitfld.long 0x00 16. " IRQS208 ,IRQS Status Bit 208" "Low,High" bitfld.long 0x00 15. " IRQS207 ,IRQS Status Bit 207" "Low,High" bitfld.long 0x00 14. " IRQS206 ,IRQS Status Bit 206" "Low,High" textline " " bitfld.long 0x00 13. " IRQS205 ,IRQS Status Bit 205" "Low,High" bitfld.long 0x00 12. " IRQS204 ,IRQS Status Bit 204" "Low,High" bitfld.long 0x00 11. " IRQS203 ,IRQS Status Bit 203" "Low,High" textline " " bitfld.long 0x00 10. " IRQS202 ,IRQS Status Bit 202" "Low,High" bitfld.long 0x00 9. " IRQS201 ,IRQS Status Bit 201" "Low,High" bitfld.long 0x00 8. " IRQS200 ,IRQS Status Bit 200" "Low,High" textline " " bitfld.long 0x00 7. " IRQS199 ,IRQS Status Bit 199" "Low,High" bitfld.long 0x00 6. " IRQS198 ,IRQS Status Bit 198" "Low,High" bitfld.long 0x00 5. " IRQS197 ,IRQS Status Bit 197" "Low,High" textline " " bitfld.long 0x00 4. " IRQS196 ,IRQS Status Bit 196" "Low,High" bitfld.long 0x00 3. " IRQS195 ,IRQS Status Bit 195" "Low,High" bitfld.long 0x00 2. " IRQS194 ,IRQS Status Bit 194" "Low,High" textline " " bitfld.long 0x00 1. " IRQS193 ,IRQS Status Bit 193" "Low,High" bitfld.long 0x00 0. " IRQS192 ,IRQS Status Bit 192" "Low,High" else rgroup.long 0x0D1C++0x03 line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x08) rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" bitfld.long 0x00 31. " IRQS255 ,IRQS Status Bit 255" "Low,High" bitfld.long 0x00 30. " IRQS254 ,IRQS Status Bit 254" "Low,High" bitfld.long 0x00 29. " IRQS253 ,IRQS Status Bit 253" "Low,High" textline " " bitfld.long 0x00 28. " IRQS252 ,IRQS Status Bit 252" "Low,High" bitfld.long 0x00 27. " IRQS251 ,IRQS Status Bit 251" "Low,High" bitfld.long 0x00 26. " IRQS250 ,IRQS Status Bit 250" "Low,High" textline " " bitfld.long 0x00 25. " IRQS249 ,IRQS Status Bit 249" "Low,High" bitfld.long 0x00 24. " IRQS248 ,IRQS Status Bit 248" "Low,High" bitfld.long 0x00 23. " IRQS247 ,IRQS Status Bit 247" "Low,High" textline " " bitfld.long 0x00 22. " IRQS246 ,IRQS Status Bit 246" "Low,High" bitfld.long 0x00 21. " IRQS245 ,IRQS Status Bit 245" "Low,High" bitfld.long 0x00 20. " IRQS244 ,IRQS Status Bit 244" "Low,High" textline " " bitfld.long 0x00 19. " IRQS243 ,IRQS Status Bit 243" "Low,High" bitfld.long 0x00 18. " IRQS242 ,IRQS Status Bit 242" "Low,High" bitfld.long 0x00 17. " IRQS241 ,IRQS Status Bit 241" "Low,High" textline " " bitfld.long 0x00 16. " IRQS240 ,IRQS Status Bit 240" "Low,High" bitfld.long 0x00 15. " IRQS239 ,IRQS Status Bit 239" "Low,High" bitfld.long 0x00 14. " IRQS238 ,IRQS Status Bit 238" "Low,High" textline " " bitfld.long 0x00 13. " IRQS237 ,IRQS Status Bit 237" "Low,High" bitfld.long 0x00 12. " IRQS236 ,IRQS Status Bit 236" "Low,High" bitfld.long 0x00 11. " IRQS235 ,IRQS Status Bit 235" "Low,High" textline " " bitfld.long 0x00 10. " IRQS234 ,IRQS Status Bit 234" "Low,High" bitfld.long 0x00 9. " IRQS233 ,IRQS Status Bit 233" "Low,High" bitfld.long 0x00 8. " IRQS232 ,IRQS Status Bit 232" "Low,High" textline " " bitfld.long 0x00 7. " IRQS231 ,IRQS Status Bit 231" "Low,High" bitfld.long 0x00 6. " IRQS230 ,IRQS Status Bit 230" "Low,High" bitfld.long 0x00 5. " IRQS229 ,IRQS Status Bit 229" "Low,High" textline " " bitfld.long 0x00 4. " IRQS228 ,IRQS Status Bit 228" "Low,High" bitfld.long 0x00 3. " IRQS227 ,IRQS Status Bit 227" "Low,High" bitfld.long 0x00 2. " IRQS226 ,IRQS Status Bit 226" "Low,High" textline " " bitfld.long 0x00 1. " IRQS225 ,IRQS Status Bit 225" "Low,High" bitfld.long 0x00 0. " IRQS224 ,IRQS Status Bit 224" "Low,High" else rgroup.long 0x0D20++0x03 line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x09) rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" bitfld.long 0x00 31. " IRQS287 ,IRQS Status Bit 287" "Low,High" bitfld.long 0x00 30. " IRQS286 ,IRQS Status Bit 286" "Low,High" bitfld.long 0x00 29. " IRQS285 ,IRQS Status Bit 285" "Low,High" textline " " bitfld.long 0x00 28. " IRQS284 ,IRQS Status Bit 284" "Low,High" bitfld.long 0x00 27. " IRQS283 ,IRQS Status Bit 283" "Low,High" bitfld.long 0x00 26. " IRQS282 ,IRQS Status Bit 282" "Low,High" textline " " bitfld.long 0x00 25. " IRQS281 ,IRQS Status Bit 281" "Low,High" bitfld.long 0x00 24. " IRQS280 ,IRQS Status Bit 280" "Low,High" bitfld.long 0x00 23. " IRQS279 ,IRQS Status Bit 279" "Low,High" textline " " bitfld.long 0x00 22. " IRQS278 ,IRQS Status Bit 278" "Low,High" bitfld.long 0x00 21. " IRQS277 ,IRQS Status Bit 277" "Low,High" bitfld.long 0x00 20. " IRQS276 ,IRQS Status Bit 276" "Low,High" textline " " bitfld.long 0x00 19. " IRQS275 ,IRQS Status Bit 275" "Low,High" bitfld.long 0x00 18. " IRQS274 ,IRQS Status Bit 274" "Low,High" bitfld.long 0x00 17. " IRQS273 ,IRQS Status Bit 273" "Low,High" textline " " bitfld.long 0x00 16. " IRQS272 ,IRQS Status Bit 272" "Low,High" bitfld.long 0x00 15. " IRQS271 ,IRQS Status Bit 271" "Low,High" bitfld.long 0x00 14. " IRQS270 ,IRQS Status Bit 270" "Low,High" textline " " bitfld.long 0x00 13. " IRQS269 ,IRQS Status Bit 269" "Low,High" bitfld.long 0x00 12. " IRQS268 ,IRQS Status Bit 268" "Low,High" bitfld.long 0x00 11. " IRQS267 ,IRQS Status Bit 267" "Low,High" textline " " bitfld.long 0x00 10. " IRQS266 ,IRQS Status Bit 266" "Low,High" bitfld.long 0x00 9. " IRQS265 ,IRQS Status Bit 265" "Low,High" bitfld.long 0x00 8. " IRQS264 ,IRQS Status Bit 264" "Low,High" textline " " bitfld.long 0x00 7. " IRQS263 ,IRQS Status Bit 263" "Low,High" bitfld.long 0x00 6. " IRQS262 ,IRQS Status Bit 262" "Low,High" bitfld.long 0x00 5. " IRQS261 ,IRQS Status Bit 261" "Low,High" textline " " bitfld.long 0x00 4. " IRQS260 ,IRQS Status Bit 260" "Low,High" bitfld.long 0x00 3. " IRQS259 ,IRQS Status Bit 259" "Low,High" bitfld.long 0x00 2. " IRQS258 ,IRQS Status Bit 258" "Low,High" textline " " bitfld.long 0x00 1. " IRQS257 ,IRQS Status Bit 257" "Low,High" bitfld.long 0x00 0. " IRQS256 ,IRQS Status Bit 256" "Low,High" else rgroup.long 0x0D24++0x03 line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0A) rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" bitfld.long 0x00 31. " IRQS319 ,IRQS Status Bit 319" "Low,High" bitfld.long 0x00 30. " IRQS318 ,IRQS Status Bit 318" "Low,High" bitfld.long 0x00 29. " IRQS317 ,IRQS Status Bit 317" "Low,High" textline " " bitfld.long 0x00 28. " IRQS316 ,IRQS Status Bit 316" "Low,High" bitfld.long 0x00 27. " IRQS315 ,IRQS Status Bit 315" "Low,High" bitfld.long 0x00 26. " IRQS314 ,IRQS Status Bit 314" "Low,High" textline " " bitfld.long 0x00 25. " IRQS313 ,IRQS Status Bit 313" "Low,High" bitfld.long 0x00 24. " IRQS312 ,IRQS Status Bit 312" "Low,High" bitfld.long 0x00 23. " IRQS311 ,IRQS Status Bit 311" "Low,High" textline " " bitfld.long 0x00 22. " IRQS310 ,IRQS Status Bit 310" "Low,High" bitfld.long 0x00 21. " IRQS309 ,IRQS Status Bit 309" "Low,High" bitfld.long 0x00 20. " IRQS308 ,IRQS Status Bit 308" "Low,High" textline " " bitfld.long 0x00 19. " IRQS307 ,IRQS Status Bit 307" "Low,High" bitfld.long 0x00 18. " IRQS306 ,IRQS Status Bit 306" "Low,High" bitfld.long 0x00 17. " IRQS305 ,IRQS Status Bit 305" "Low,High" textline " " bitfld.long 0x00 16. " IRQS304 ,IRQS Status Bit 304" "Low,High" bitfld.long 0x00 15. " IRQS303 ,IRQS Status Bit 303" "Low,High" bitfld.long 0x00 14. " IRQS302 ,IRQS Status Bit 302" "Low,High" textline " " bitfld.long 0x00 13. " IRQS301 ,IRQS Status Bit 301" "Low,High" bitfld.long 0x00 12. " IRQS300 ,IRQS Status Bit 300" "Low,High" bitfld.long 0x00 11. " IRQS299 ,IRQS Status Bit 299" "Low,High" textline " " bitfld.long 0x00 10. " IRQS298 ,IRQS Status Bit 298" "Low,High" bitfld.long 0x00 9. " IRQS297 ,IRQS Status Bit 297" "Low,High" bitfld.long 0x00 8. " IRQS296 ,IRQS Status Bit 296" "Low,High" textline " " bitfld.long 0x00 7. " IRQS295 ,IRQS Status Bit 295" "Low,High" bitfld.long 0x00 6. " IRQS294 ,IRQS Status Bit 294" "Low,High" bitfld.long 0x00 5. " IRQS293 ,IRQS Status Bit 293" "Low,High" textline " " bitfld.long 0x00 4. " IRQS292 ,IRQS Status Bit 292" "Low,High" bitfld.long 0x00 3. " IRQS291 ,IRQS Status Bit 291" "Low,High" bitfld.long 0x00 2. " IRQS290 ,IRQS Status Bit 290" "Low,High" textline " " bitfld.long 0x00 1. " IRQS289 ,IRQS Status Bit 289" "Low,High" bitfld.long 0x00 0. " IRQS288 ,IRQS Status Bit 288" "Low,High" else rgroup.long 0x0D28++0x03 line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0B) rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" bitfld.long 0x00 31. " IRQS351 ,IRQS Status Bit 351" "Low,High" bitfld.long 0x00 30. " IRQS350 ,IRQS Status Bit 350" "Low,High" bitfld.long 0x00 29. " IRQS349 ,IRQS Status Bit 349" "Low,High" textline " " bitfld.long 0x00 28. " IRQS348 ,IRQS Status Bit 348" "Low,High" bitfld.long 0x00 27. " IRQS347 ,IRQS Status Bit 347" "Low,High" bitfld.long 0x00 26. " IRQS346 ,IRQS Status Bit 346" "Low,High" textline " " bitfld.long 0x00 25. " IRQS345 ,IRQS Status Bit 345" "Low,High" bitfld.long 0x00 24. " IRQS344 ,IRQS Status Bit 344" "Low,High" bitfld.long 0x00 23. " IRQS343 ,IRQS Status Bit 343" "Low,High" textline " " bitfld.long 0x00 22. " IRQS342 ,IRQS Status Bit 342" "Low,High" bitfld.long 0x00 21. " IRQS341 ,IRQS Status Bit 341" "Low,High" bitfld.long 0x00 20. " IRQS340 ,IRQS Status Bit 340" "Low,High" textline " " bitfld.long 0x00 19. " IRQS339 ,IRQS Status Bit 339" "Low,High" bitfld.long 0x00 18. " IRQS338 ,IRQS Status Bit 338" "Low,High" bitfld.long 0x00 17. " IRQS337 ,IRQS Status Bit 337" "Low,High" textline " " bitfld.long 0x00 16. " IRQS336 ,IRQS Status Bit 336" "Low,High" bitfld.long 0x00 15. " IRQS335 ,IRQS Status Bit 335" "Low,High" bitfld.long 0x00 14. " IRQS334 ,IRQS Status Bit 334" "Low,High" textline " " bitfld.long 0x00 13. " IRQS333 ,IRQS Status Bit 333" "Low,High" bitfld.long 0x00 12. " IRQS332 ,IRQS Status Bit 332" "Low,High" bitfld.long 0x00 11. " IRQS331 ,IRQS Status Bit 331" "Low,High" textline " " bitfld.long 0x00 10. " IRQS330 ,IRQS Status Bit 330" "Low,High" bitfld.long 0x00 9. " IRQS329 ,IRQS Status Bit 329" "Low,High" bitfld.long 0x00 8. " IRQS328 ,IRQS Status Bit 328" "Low,High" textline " " bitfld.long 0x00 7. " IRQS327 ,IRQS Status Bit 327" "Low,High" bitfld.long 0x00 6. " IRQS326 ,IRQS Status Bit 326" "Low,High" bitfld.long 0x00 5. " IRQS325 ,IRQS Status Bit 325" "Low,High" textline " " bitfld.long 0x00 4. " IRQS324 ,IRQS Status Bit 324" "Low,High" bitfld.long 0x00 3. " IRQS323 ,IRQS Status Bit 323" "Low,High" bitfld.long 0x00 2. " IRQS322 ,IRQS Status Bit 322" "Low,High" textline " " bitfld.long 0x00 1. " IRQS321 ,IRQS Status Bit 321" "Low,High" bitfld.long 0x00 0. " IRQS320 ,IRQS Status Bit 320" "Low,High" else rgroup.long 0x0D2C++0x03 line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0C) rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" bitfld.long 0x00 31. " IRQS383 ,IRQS Status Bit 383" "Low,High" bitfld.long 0x00 30. " IRQS382 ,IRQS Status Bit 382" "Low,High" bitfld.long 0x00 29. " IRQS381 ,IRQS Status Bit 381" "Low,High" textline " " bitfld.long 0x00 28. " IRQS380 ,IRQS Status Bit 380" "Low,High" bitfld.long 0x00 27. " IRQS379 ,IRQS Status Bit 379" "Low,High" bitfld.long 0x00 26. " IRQS378 ,IRQS Status Bit 378" "Low,High" textline " " bitfld.long 0x00 25. " IRQS377 ,IRQS Status Bit 377" "Low,High" bitfld.long 0x00 24. " IRQS376 ,IRQS Status Bit 376" "Low,High" bitfld.long 0x00 23. " IRQS375 ,IRQS Status Bit 375" "Low,High" textline " " bitfld.long 0x00 22. " IRQS374 ,IRQS Status Bit 374" "Low,High" bitfld.long 0x00 21. " IRQS373 ,IRQS Status Bit 373" "Low,High" bitfld.long 0x00 20. " IRQS372 ,IRQS Status Bit 372" "Low,High" textline " " bitfld.long 0x00 19. " IRQS371 ,IRQS Status Bit 371" "Low,High" bitfld.long 0x00 18. " IRQS370 ,IRQS Status Bit 370" "Low,High" bitfld.long 0x00 17. " IRQS369 ,IRQS Status Bit 369" "Low,High" textline " " bitfld.long 0x00 16. " IRQS368 ,IRQS Status Bit 368" "Low,High" bitfld.long 0x00 15. " IRQS367 ,IRQS Status Bit 367" "Low,High" bitfld.long 0x00 14. " IRQS366 ,IRQS Status Bit 366" "Low,High" textline " " bitfld.long 0x00 13. " IRQS365 ,IRQS Status Bit 365" "Low,High" bitfld.long 0x00 12. " IRQS364 ,IRQS Status Bit 364" "Low,High" bitfld.long 0x00 11. " IRQS363 ,IRQS Status Bit 363" "Low,High" textline " " bitfld.long 0x00 10. " IRQS362 ,IRQS Status Bit 362" "Low,High" bitfld.long 0x00 9. " IRQS361 ,IRQS Status Bit 361" "Low,High" bitfld.long 0x00 8. " IRQS360 ,IRQS Status Bit 360" "Low,High" textline " " bitfld.long 0x00 7. " IRQS359 ,IRQS Status Bit 359" "Low,High" bitfld.long 0x00 6. " IRQS358 ,IRQS Status Bit 358" "Low,High" bitfld.long 0x00 5. " IRQS357 ,IRQS Status Bit 357" "Low,High" textline " " bitfld.long 0x00 4. " IRQS356 ,IRQS Status Bit 356" "Low,High" bitfld.long 0x00 3. " IRQS355 ,IRQS Status Bit 355" "Low,High" bitfld.long 0x00 2. " IRQS354 ,IRQS Status Bit 354" "Low,High" textline " " bitfld.long 0x00 1. " IRQS353 ,IRQS Status Bit 353" "Low,High" bitfld.long 0x00 0. " IRQS352 ,IRQS Status Bit 352" "Low,High" else rgroup.long 0x0D30++0x03 line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0D) rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" bitfld.long 0x00 31. " IRQS415 ,IRQS Status Bit 415" "Low,High" bitfld.long 0x00 30. " IRQS414 ,IRQS Status Bit 414" "Low,High" bitfld.long 0x00 29. " IRQS413 ,IRQS Status Bit 413" "Low,High" textline " " bitfld.long 0x00 28. " IRQS412 ,IRQS Status Bit 412" "Low,High" bitfld.long 0x00 27. " IRQS411 ,IRQS Status Bit 411" "Low,High" bitfld.long 0x00 26. " IRQS410 ,IRQS Status Bit 410" "Low,High" textline " " bitfld.long 0x00 25. " IRQS409 ,IRQS Status Bit 409" "Low,High" bitfld.long 0x00 24. " IRQS408 ,IRQS Status Bit 408" "Low,High" bitfld.long 0x00 23. " IRQS407 ,IRQS Status Bit 407" "Low,High" textline " " bitfld.long 0x00 22. " IRQS406 ,IRQS Status Bit 406" "Low,High" bitfld.long 0x00 21. " IRQS405 ,IRQS Status Bit 405" "Low,High" bitfld.long 0x00 20. " IRQS404 ,IRQS Status Bit 404" "Low,High" textline " " bitfld.long 0x00 19. " IRQS403 ,IRQS Status Bit 403" "Low,High" bitfld.long 0x00 18. " IRQS402 ,IRQS Status Bit 402" "Low,High" bitfld.long 0x00 17. " IRQS401 ,IRQS Status Bit 401" "Low,High" textline " " bitfld.long 0x00 16. " IRQS400 ,IRQS Status Bit 400" "Low,High" bitfld.long 0x00 15. " IRQS399 ,IRQS Status Bit 399" "Low,High" bitfld.long 0x00 14. " IRQS398 ,IRQS Status Bit 398" "Low,High" textline " " bitfld.long 0x00 13. " IRQS397 ,IRQS Status Bit 397" "Low,High" bitfld.long 0x00 12. " IRQS396 ,IRQS Status Bit 396" "Low,High" bitfld.long 0x00 11. " IRQS395 ,IRQS Status Bit 395" "Low,High" textline " " bitfld.long 0x00 10. " IRQS394 ,IRQS Status Bit 394" "Low,High" bitfld.long 0x00 9. " IRQS393 ,IRQS Status Bit 393" "Low,High" bitfld.long 0x00 8. " IRQS392 ,IRQS Status Bit 392" "Low,High" textline " " bitfld.long 0x00 7. " IRQS391 ,IRQS Status Bit 391" "Low,High" bitfld.long 0x00 6. " IRQS390 ,IRQS Status Bit 390" "Low,High" bitfld.long 0x00 5. " IRQS389 ,IRQS Status Bit 389" "Low,High" textline " " bitfld.long 0x00 4. " IRQS388 ,IRQS Status Bit 388" "Low,High" bitfld.long 0x00 3. " IRQS387 ,IRQS Status Bit 387" "Low,High" bitfld.long 0x00 2. " IRQS386 ,IRQS Status Bit 386" "Low,High" textline " " bitfld.long 0x00 1. " IRQS385 ,IRQS Status Bit 385" "Low,High" bitfld.long 0x00 0. " IRQS384 ,IRQS Status Bit 384" "Low,High" else rgroup.long 0x0D34++0x03 line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0E) rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" bitfld.long 0x00 31. " IRQS447 ,IRQS Status Bit 447" "Low,High" bitfld.long 0x00 30. " IRQS446 ,IRQS Status Bit 446" "Low,High" bitfld.long 0x00 29. " IRQS445 ,IRQS Status Bit 445" "Low,High" textline " " bitfld.long 0x00 28. " IRQS444 ,IRQS Status Bit 444" "Low,High" bitfld.long 0x00 27. " IRQS443 ,IRQS Status Bit 443" "Low,High" bitfld.long 0x00 26. " IRQS442 ,IRQS Status Bit 442" "Low,High" textline " " bitfld.long 0x00 25. " IRQS441 ,IRQS Status Bit 441" "Low,High" bitfld.long 0x00 24. " IRQS440 ,IRQS Status Bit 440" "Low,High" bitfld.long 0x00 23. " IRQS439 ,IRQS Status Bit 439" "Low,High" textline " " bitfld.long 0x00 22. " IRQS438 ,IRQS Status Bit 438" "Low,High" bitfld.long 0x00 21. " IRQS437 ,IRQS Status Bit 437" "Low,High" bitfld.long 0x00 20. " IRQS436 ,IRQS Status Bit 436" "Low,High" textline " " bitfld.long 0x00 19. " IRQS435 ,IRQS Status Bit 435" "Low,High" bitfld.long 0x00 18. " IRQS434 ,IRQS Status Bit 434" "Low,High" bitfld.long 0x00 17. " IRQS433 ,IRQS Status Bit 433" "Low,High" textline " " bitfld.long 0x00 16. " IRQS432 ,IRQS Status Bit 432" "Low,High" bitfld.long 0x00 15. " IRQS431 ,IRQS Status Bit 431" "Low,High" bitfld.long 0x00 14. " IRQS430 ,IRQS Status Bit 430" "Low,High" textline " " bitfld.long 0x00 13. " IRQS429 ,IRQS Status Bit 429" "Low,High" bitfld.long 0x00 12. " IRQS428 ,IRQS Status Bit 428" "Low,High" bitfld.long 0x00 11. " IRQS427 ,IRQS Status Bit 427" "Low,High" textline " " bitfld.long 0x00 10. " IRQS426 ,IRQS Status Bit 426" "Low,High" bitfld.long 0x00 9. " IRQS425 ,IRQS Status Bit 425" "Low,High" bitfld.long 0x00 8. " IRQS424 ,IRQS Status Bit 424" "Low,High" textline " " bitfld.long 0x00 7. " IRQS423 ,IRQS Status Bit 423" "Low,High" bitfld.long 0x00 6. " IRQS422 ,IRQS Status Bit 422" "Low,High" bitfld.long 0x00 5. " IRQS421 ,IRQS Status Bit 421" "Low,High" textline " " bitfld.long 0x00 4. " IRQS420 ,IRQS Status Bit 420" "Low,High" bitfld.long 0x00 3. " IRQS419 ,IRQS Status Bit 419" "Low,High" bitfld.long 0x00 2. " IRQS418 ,IRQS Status Bit 418" "Low,High" textline " " bitfld.long 0x00 1. " IRQS417 ,IRQS Status Bit 417" "Low,High" bitfld.long 0x00 0. " IRQS416 ,IRQS Status Bit 416" "Low,High" else rgroup.long 0x0D38++0x03 line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x0F) rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" bitfld.long 0x00 31. " IRQS479 ,IRQS Status Bit 479" "Low,High" bitfld.long 0x00 30. " IRQS478 ,IRQS Status Bit 478" "Low,High" bitfld.long 0x00 29. " IRQS477 ,IRQS Status Bit 477" "Low,High" textline " " bitfld.long 0x00 28. " IRQS476 ,IRQS Status Bit 476" "Low,High" bitfld.long 0x00 27. " IRQS475 ,IRQS Status Bit 475" "Low,High" bitfld.long 0x00 26. " IRQS474 ,IRQS Status Bit 474" "Low,High" textline " " bitfld.long 0x00 25. " IRQS473 ,IRQS Status Bit 473" "Low,High" bitfld.long 0x00 24. " IRQS472 ,IRQS Status Bit 472" "Low,High" bitfld.long 0x00 23. " IRQS471 ,IRQS Status Bit 471" "Low,High" textline " " bitfld.long 0x00 22. " IRQS470 ,IRQS Status Bit 470" "Low,High" bitfld.long 0x00 21. " IRQS469 ,IRQS Status Bit 469" "Low,High" bitfld.long 0x00 20. " IRQS468 ,IRQS Status Bit 468" "Low,High" textline " " bitfld.long 0x00 19. " IRQS467 ,IRQS Status Bit 467" "Low,High" bitfld.long 0x00 18. " IRQS466 ,IRQS Status Bit 466" "Low,High" bitfld.long 0x00 17. " IRQS465 ,IRQS Status Bit 465" "Low,High" textline " " bitfld.long 0x00 16. " IRQS464 ,IRQS Status Bit 464" "Low,High" bitfld.long 0x00 15. " IRQS463 ,IRQS Status Bit 463" "Low,High" bitfld.long 0x00 14. " IRQS462 ,IRQS Status Bit 462" "Low,High" textline " " bitfld.long 0x00 13. " IRQS461 ,IRQS Status Bit 461" "Low,High" bitfld.long 0x00 12. " IRQS460 ,IRQS Status Bit 460" "Low,High" bitfld.long 0x00 11. " IRQS459 ,IRQS Status Bit 459" "Low,High" textline " " bitfld.long 0x00 10. " IRQS458 ,IRQS Status Bit 458" "Low,High" bitfld.long 0x00 9. " IRQS457 ,IRQS Status Bit 457" "Low,High" bitfld.long 0x00 8. " IRQS456 ,IRQS Status Bit 456" "Low,High" textline " " bitfld.long 0x00 7. " IRQS455 ,IRQS Status Bit 455" "Low,High" bitfld.long 0x00 6. " IRQS454 ,IRQS Status Bit 454" "Low,High" bitfld.long 0x00 5. " IRQS453 ,IRQS Status Bit 453" "Low,High" textline " " bitfld.long 0x00 4. " IRQS452 ,IRQS Status Bit 452" "Low,High" bitfld.long 0x00 3. " IRQS451 ,IRQS Status Bit 451" "Low,High" bitfld.long 0x00 2. " IRQS450 ,IRQS Status Bit 450" "Low,High" textline " " bitfld.long 0x00 1. " IRQS449 ,IRQS Status Bit 449" "Low,High" bitfld.long 0x00 0. " IRQS448 ,IRQS Status Bit 448" "Low,High" else rgroup.long 0x0D3C++0x03 line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x10) rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" bitfld.long 0x00 31. " IRQS511 ,IRQS Status Bit 511" "Low,High" bitfld.long 0x00 30. " IRQS510 ,IRQS Status Bit 510" "Low,High" bitfld.long 0x00 29. " IRQS509 ,IRQS Status Bit 509" "Low,High" textline " " bitfld.long 0x00 28. " IRQS508 ,IRQS Status Bit 508" "Low,High" bitfld.long 0x00 27. " IRQS507 ,IRQS Status Bit 507" "Low,High" bitfld.long 0x00 26. " IRQS506 ,IRQS Status Bit 506" "Low,High" textline " " bitfld.long 0x00 25. " IRQS505 ,IRQS Status Bit 505" "Low,High" bitfld.long 0x00 24. " IRQS504 ,IRQS Status Bit 504" "Low,High" bitfld.long 0x00 23. " IRQS503 ,IRQS Status Bit 503" "Low,High" textline " " bitfld.long 0x00 22. " IRQS502 ,IRQS Status Bit 502" "Low,High" bitfld.long 0x00 21. " IRQS501 ,IRQS Status Bit 501" "Low,High" bitfld.long 0x00 20. " IRQS500 ,IRQS Status Bit 500" "Low,High" textline " " bitfld.long 0x00 19. " IRQS499 ,IRQS Status Bit 499" "Low,High" bitfld.long 0x00 18. " IRQS498 ,IRQS Status Bit 498" "Low,High" bitfld.long 0x00 17. " IRQS497 ,IRQS Status Bit 497" "Low,High" textline " " bitfld.long 0x00 16. " IRQS496 ,IRQS Status Bit 496" "Low,High" bitfld.long 0x00 15. " IRQS495 ,IRQS Status Bit 495" "Low,High" bitfld.long 0x00 14. " IRQS494 ,IRQS Status Bit 494" "Low,High" textline " " bitfld.long 0x00 13. " IRQS493 ,IRQS Status Bit 493" "Low,High" bitfld.long 0x00 12. " IRQS492 ,IRQS Status Bit 492" "Low,High" bitfld.long 0x00 11. " IRQS491 ,IRQS Status Bit 491" "Low,High" textline " " bitfld.long 0x00 10. " IRQS490 ,IRQS Status Bit 490" "Low,High" bitfld.long 0x00 9. " IRQS489 ,IRQS Status Bit 489" "Low,High" bitfld.long 0x00 8. " IRQS488 ,IRQS Status Bit 488" "Low,High" textline " " bitfld.long 0x00 7. " IRQS487 ,IRQS Status Bit 487" "Low,High" bitfld.long 0x00 6. " IRQS486 ,IRQS Status Bit 486" "Low,High" bitfld.long 0x00 5. " IRQS485 ,IRQS Status Bit 485" "Low,High" textline " " bitfld.long 0x00 4. " IRQS484 ,IRQS Status Bit 484" "Low,High" bitfld.long 0x00 3. " IRQS483 ,IRQS Status Bit 483" "Low,High" bitfld.long 0x00 2. " IRQS482 ,IRQS Status Bit 482" "Low,High" textline " " bitfld.long 0x00 1. " IRQS481 ,IRQS Status Bit 481" "Low,High" bitfld.long 0x00 0. " IRQS480 ,IRQS Status Bit 480" "Low,High" else rgroup.long 0x0D40++0x03 line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x11) rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" bitfld.long 0x00 31. " IRQS543 ,IRQS Status Bit 543" "Low,High" bitfld.long 0x00 30. " IRQS542 ,IRQS Status Bit 542" "Low,High" bitfld.long 0x00 29. " IRQS541 ,IRQS Status Bit 541" "Low,High" textline " " bitfld.long 0x00 28. " IRQS540 ,IRQS Status Bit 540" "Low,High" bitfld.long 0x00 27. " IRQS539 ,IRQS Status Bit 539" "Low,High" bitfld.long 0x00 26. " IRQS538 ,IRQS Status Bit 538" "Low,High" textline " " bitfld.long 0x00 25. " IRQS537 ,IRQS Status Bit 537" "Low,High" bitfld.long 0x00 24. " IRQS536 ,IRQS Status Bit 536" "Low,High" bitfld.long 0x00 23. " IRQS535 ,IRQS Status Bit 535" "Low,High" textline " " bitfld.long 0x00 22. " IRQS534 ,IRQS Status Bit 534" "Low,High" bitfld.long 0x00 21. " IRQS533 ,IRQS Status Bit 533" "Low,High" bitfld.long 0x00 20. " IRQS532 ,IRQS Status Bit 532" "Low,High" textline " " bitfld.long 0x00 19. " IRQS531 ,IRQS Status Bit 531" "Low,High" bitfld.long 0x00 18. " IRQS530 ,IRQS Status Bit 530" "Low,High" bitfld.long 0x00 17. " IRQS529 ,IRQS Status Bit 529" "Low,High" textline " " bitfld.long 0x00 16. " IRQS528 ,IRQS Status Bit 528" "Low,High" bitfld.long 0x00 15. " IRQS527 ,IRQS Status Bit 527" "Low,High" bitfld.long 0x00 14. " IRQS526 ,IRQS Status Bit 526" "Low,High" textline " " bitfld.long 0x00 13. " IRQS525 ,IRQS Status Bit 525" "Low,High" bitfld.long 0x00 12. " IRQS524 ,IRQS Status Bit 524" "Low,High" bitfld.long 0x00 11. " IRQS523 ,IRQS Status Bit 523" "Low,High" textline " " bitfld.long 0x00 10. " IRQS522 ,IRQS Status Bit 522" "Low,High" bitfld.long 0x00 9. " IRQS521 ,IRQS Status Bit 521" "Low,High" bitfld.long 0x00 8. " IRQS520 ,IRQS Status Bit 520" "Low,High" textline " " bitfld.long 0x00 7. " IRQS519 ,IRQS Status Bit 519" "Low,High" bitfld.long 0x00 6. " IRQS518 ,IRQS Status Bit 518" "Low,High" bitfld.long 0x00 5. " IRQS517 ,IRQS Status Bit 517" "Low,High" textline " " bitfld.long 0x00 4. " IRQS516 ,IRQS Status Bit 516" "Low,High" bitfld.long 0x00 3. " IRQS515 ,IRQS Status Bit 515" "Low,High" bitfld.long 0x00 2. " IRQS514 ,IRQS Status Bit 514" "Low,High" textline " " bitfld.long 0x00 1. " IRQS513 ,IRQS Status Bit 513" "Low,High" bitfld.long 0x00 0. " IRQS512 ,IRQS Status Bit 512" "Low,High" else rgroup.long 0x0D44++0x03 line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x12) rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" bitfld.long 0x00 31. " IRQS575 ,IRQS Status Bit 575" "Low,High" bitfld.long 0x00 30. " IRQS574 ,IRQS Status Bit 574" "Low,High" bitfld.long 0x00 29. " IRQS573 ,IRQS Status Bit 573" "Low,High" textline " " bitfld.long 0x00 28. " IRQS572 ,IRQS Status Bit 572" "Low,High" bitfld.long 0x00 27. " IRQS571 ,IRQS Status Bit 571" "Low,High" bitfld.long 0x00 26. " IRQS570 ,IRQS Status Bit 570" "Low,High" textline " " bitfld.long 0x00 25. " IRQS569 ,IRQS Status Bit 569" "Low,High" bitfld.long 0x00 24. " IRQS568 ,IRQS Status Bit 568" "Low,High" bitfld.long 0x00 23. " IRQS567 ,IRQS Status Bit 567" "Low,High" textline " " bitfld.long 0x00 22. " IRQS566 ,IRQS Status Bit 566" "Low,High" bitfld.long 0x00 21. " IRQS565 ,IRQS Status Bit 565" "Low,High" bitfld.long 0x00 20. " IRQS564 ,IRQS Status Bit 564" "Low,High" textline " " bitfld.long 0x00 19. " IRQS563 ,IRQS Status Bit 563" "Low,High" bitfld.long 0x00 18. " IRQS562 ,IRQS Status Bit 562" "Low,High" bitfld.long 0x00 17. " IRQS561 ,IRQS Status Bit 561" "Low,High" textline " " bitfld.long 0x00 16. " IRQS560 ,IRQS Status Bit 560" "Low,High" bitfld.long 0x00 15. " IRQS559 ,IRQS Status Bit 559" "Low,High" bitfld.long 0x00 14. " IRQS558 ,IRQS Status Bit 558" "Low,High" textline " " bitfld.long 0x00 13. " IRQS557 ,IRQS Status Bit 557" "Low,High" bitfld.long 0x00 12. " IRQS556 ,IRQS Status Bit 556" "Low,High" bitfld.long 0x00 11. " IRQS555 ,IRQS Status Bit 555" "Low,High" textline " " bitfld.long 0x00 10. " IRQS554 ,IRQS Status Bit 554" "Low,High" bitfld.long 0x00 9. " IRQS553 ,IRQS Status Bit 553" "Low,High" bitfld.long 0x00 8. " IRQS552 ,IRQS Status Bit 552" "Low,High" textline " " bitfld.long 0x00 7. " IRQS551 ,IRQS Status Bit 551" "Low,High" bitfld.long 0x00 6. " IRQS550 ,IRQS Status Bit 550" "Low,High" bitfld.long 0x00 5. " IRQS549 ,IRQS Status Bit 549" "Low,High" textline " " bitfld.long 0x00 4. " IRQS548 ,IRQS Status Bit 548" "Low,High" bitfld.long 0x00 3. " IRQS547 ,IRQS Status Bit 547" "Low,High" bitfld.long 0x00 2. " IRQS546 ,IRQS Status Bit 546" "Low,High" textline " " bitfld.long 0x00 1. " IRQS545 ,IRQS Status Bit 545" "Low,High" bitfld.long 0x00 0. " IRQS544 ,IRQS Status Bit 544" "Low,High" else rgroup.long 0x0D48++0x03 line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x13) rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" bitfld.long 0x00 31. " IRQS607 ,IRQS Status Bit 607" "Low,High" bitfld.long 0x00 30. " IRQS606 ,IRQS Status Bit 606" "Low,High" bitfld.long 0x00 29. " IRQS605 ,IRQS Status Bit 605" "Low,High" textline " " bitfld.long 0x00 28. " IRQS604 ,IRQS Status Bit 604" "Low,High" bitfld.long 0x00 27. " IRQS603 ,IRQS Status Bit 603" "Low,High" bitfld.long 0x00 26. " IRQS602 ,IRQS Status Bit 602" "Low,High" textline " " bitfld.long 0x00 25. " IRQS601 ,IRQS Status Bit 601" "Low,High" bitfld.long 0x00 24. " IRQS600 ,IRQS Status Bit 600" "Low,High" bitfld.long 0x00 23. " IRQS599 ,IRQS Status Bit 599" "Low,High" textline " " bitfld.long 0x00 22. " IRQS598 ,IRQS Status Bit 598" "Low,High" bitfld.long 0x00 21. " IRQS597 ,IRQS Status Bit 597" "Low,High" bitfld.long 0x00 20. " IRQS596 ,IRQS Status Bit 596" "Low,High" textline " " bitfld.long 0x00 19. " IRQS595 ,IRQS Status Bit 595" "Low,High" bitfld.long 0x00 18. " IRQS594 ,IRQS Status Bit 594" "Low,High" bitfld.long 0x00 17. " IRQS593 ,IRQS Status Bit 593" "Low,High" textline " " bitfld.long 0x00 16. " IRQS592 ,IRQS Status Bit 592" "Low,High" bitfld.long 0x00 15. " IRQS591 ,IRQS Status Bit 591" "Low,High" bitfld.long 0x00 14. " IRQS590 ,IRQS Status Bit 590" "Low,High" textline " " bitfld.long 0x00 13. " IRQS589 ,IRQS Status Bit 589" "Low,High" bitfld.long 0x00 12. " IRQS588 ,IRQS Status Bit 588" "Low,High" bitfld.long 0x00 11. " IRQS587 ,IRQS Status Bit 587" "Low,High" textline " " bitfld.long 0x00 10. " IRQS586 ,IRQS Status Bit 586" "Low,High" bitfld.long 0x00 9. " IRQS585 ,IRQS Status Bit 585" "Low,High" bitfld.long 0x00 8. " IRQS584 ,IRQS Status Bit 584" "Low,High" textline " " bitfld.long 0x00 7. " IRQS583 ,IRQS Status Bit 583" "Low,High" bitfld.long 0x00 6. " IRQS582 ,IRQS Status Bit 582" "Low,High" bitfld.long 0x00 5. " IRQS581 ,IRQS Status Bit 581" "Low,High" textline " " bitfld.long 0x00 4. " IRQS580 ,IRQS Status Bit 580" "Low,High" bitfld.long 0x00 3. " IRQS579 ,IRQS Status Bit 579" "Low,High" bitfld.long 0x00 2. " IRQS578 ,IRQS Status Bit 578" "Low,High" textline " " bitfld.long 0x00 1. " IRQS577 ,IRQS Status Bit 577" "Low,High" bitfld.long 0x00 0. " IRQS576 ,IRQS Status Bit 576" "Low,High" else rgroup.long 0x0D4C++0x03 line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x14) rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" bitfld.long 0x00 31. " IRQS639 ,IRQS Status Bit 639" "Low,High" bitfld.long 0x00 30. " IRQS638 ,IRQS Status Bit 638" "Low,High" bitfld.long 0x00 29. " IRQS637 ,IRQS Status Bit 637" "Low,High" textline " " bitfld.long 0x00 28. " IRQS636 ,IRQS Status Bit 636" "Low,High" bitfld.long 0x00 27. " IRQS635 ,IRQS Status Bit 635" "Low,High" bitfld.long 0x00 26. " IRQS634 ,IRQS Status Bit 634" "Low,High" textline " " bitfld.long 0x00 25. " IRQS633 ,IRQS Status Bit 633" "Low,High" bitfld.long 0x00 24. " IRQS632 ,IRQS Status Bit 632" "Low,High" bitfld.long 0x00 23. " IRQS631 ,IRQS Status Bit 631" "Low,High" textline " " bitfld.long 0x00 22. " IRQS630 ,IRQS Status Bit 630" "Low,High" bitfld.long 0x00 21. " IRQS629 ,IRQS Status Bit 629" "Low,High" bitfld.long 0x00 20. " IRQS628 ,IRQS Status Bit 628" "Low,High" textline " " bitfld.long 0x00 19. " IRQS627 ,IRQS Status Bit 627" "Low,High" bitfld.long 0x00 18. " IRQS626 ,IRQS Status Bit 626" "Low,High" bitfld.long 0x00 17. " IRQS625 ,IRQS Status Bit 625" "Low,High" textline " " bitfld.long 0x00 16. " IRQS624 ,IRQS Status Bit 624" "Low,High" bitfld.long 0x00 15. " IRQS623 ,IRQS Status Bit 623" "Low,High" bitfld.long 0x00 14. " IRQS622 ,IRQS Status Bit 622" "Low,High" textline " " bitfld.long 0x00 13. " IRQS621 ,IRQS Status Bit 621" "Low,High" bitfld.long 0x00 12. " IRQS620 ,IRQS Status Bit 620" "Low,High" bitfld.long 0x00 11. " IRQS619 ,IRQS Status Bit 619" "Low,High" textline " " bitfld.long 0x00 10. " IRQS618 ,IRQS Status Bit 618" "Low,High" bitfld.long 0x00 9. " IRQS617 ,IRQS Status Bit 617" "Low,High" bitfld.long 0x00 8. " IRQS616 ,IRQS Status Bit 616" "Low,High" textline " " bitfld.long 0x00 7. " IRQS615 ,IRQS Status Bit 615" "Low,High" bitfld.long 0x00 6. " IRQS614 ,IRQS Status Bit 614" "Low,High" bitfld.long 0x00 5. " IRQS613 ,IRQS Status Bit 613" "Low,High" textline " " bitfld.long 0x00 4. " IRQS612 ,IRQS Status Bit 612" "Low,High" bitfld.long 0x00 3. " IRQS611 ,IRQS Status Bit 611" "Low,High" bitfld.long 0x00 2. " IRQS610 ,IRQS Status Bit 610" "Low,High" textline " " bitfld.long 0x00 1. " IRQS609 ,IRQS Status Bit 609" "Low,High" bitfld.long 0x00 0. " IRQS608 ,IRQS Status Bit 608" "Low,High" else rgroup.long 0x0D50++0x03 line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x15) rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" bitfld.long 0x00 31. " IRQS671 ,IRQS Status Bit 671" "Low,High" bitfld.long 0x00 30. " IRQS670 ,IRQS Status Bit 670" "Low,High" bitfld.long 0x00 29. " IRQS669 ,IRQS Status Bit 669" "Low,High" textline " " bitfld.long 0x00 28. " IRQS668 ,IRQS Status Bit 668" "Low,High" bitfld.long 0x00 27. " IRQS667 ,IRQS Status Bit 667" "Low,High" bitfld.long 0x00 26. " IRQS666 ,IRQS Status Bit 666" "Low,High" textline " " bitfld.long 0x00 25. " IRQS665 ,IRQS Status Bit 665" "Low,High" bitfld.long 0x00 24. " IRQS664 ,IRQS Status Bit 664" "Low,High" bitfld.long 0x00 23. " IRQS663 ,IRQS Status Bit 663" "Low,High" textline " " bitfld.long 0x00 22. " IRQS662 ,IRQS Status Bit 662" "Low,High" bitfld.long 0x00 21. " IRQS661 ,IRQS Status Bit 661" "Low,High" bitfld.long 0x00 20. " IRQS660 ,IRQS Status Bit 660" "Low,High" textline " " bitfld.long 0x00 19. " IRQS659 ,IRQS Status Bit 659" "Low,High" bitfld.long 0x00 18. " IRQS658 ,IRQS Status Bit 658" "Low,High" bitfld.long 0x00 17. " IRQS657 ,IRQS Status Bit 657" "Low,High" textline " " bitfld.long 0x00 16. " IRQS656 ,IRQS Status Bit 656" "Low,High" bitfld.long 0x00 15. " IRQS655 ,IRQS Status Bit 655" "Low,High" bitfld.long 0x00 14. " IRQS654 ,IRQS Status Bit 654" "Low,High" textline " " bitfld.long 0x00 13. " IRQS653 ,IRQS Status Bit 653" "Low,High" bitfld.long 0x00 12. " IRQS652 ,IRQS Status Bit 652" "Low,High" bitfld.long 0x00 11. " IRQS651 ,IRQS Status Bit 651" "Low,High" textline " " bitfld.long 0x00 10. " IRQS650 ,IRQS Status Bit 650" "Low,High" bitfld.long 0x00 9. " IRQS649 ,IRQS Status Bit 649" "Low,High" bitfld.long 0x00 8. " IRQS648 ,IRQS Status Bit 648" "Low,High" textline " " bitfld.long 0x00 7. " IRQS647 ,IRQS Status Bit 647" "Low,High" bitfld.long 0x00 6. " IRQS646 ,IRQS Status Bit 646" "Low,High" bitfld.long 0x00 5. " IRQS645 ,IRQS Status Bit 645" "Low,High" textline " " bitfld.long 0x00 4. " IRQS644 ,IRQS Status Bit 644" "Low,High" bitfld.long 0x00 3. " IRQS643 ,IRQS Status Bit 643" "Low,High" bitfld.long 0x00 2. " IRQS642 ,IRQS Status Bit 642" "Low,High" textline " " bitfld.long 0x00 1. " IRQS641 ,IRQS Status Bit 641" "Low,High" bitfld.long 0x00 0. " IRQS640 ,IRQS Status Bit 640" "Low,High" else rgroup.long 0x0D54++0x03 line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x16) rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" bitfld.long 0x00 31. " IRQS703 ,IRQS Status Bit 703" "Low,High" bitfld.long 0x00 30. " IRQS702 ,IRQS Status Bit 702" "Low,High" bitfld.long 0x00 29. " IRQS701 ,IRQS Status Bit 701" "Low,High" textline " " bitfld.long 0x00 28. " IRQS700 ,IRQS Status Bit 700" "Low,High" bitfld.long 0x00 27. " IRQS699 ,IRQS Status Bit 699" "Low,High" bitfld.long 0x00 26. " IRQS698 ,IRQS Status Bit 698" "Low,High" textline " " bitfld.long 0x00 25. " IRQS697 ,IRQS Status Bit 697" "Low,High" bitfld.long 0x00 24. " IRQS696 ,IRQS Status Bit 696" "Low,High" bitfld.long 0x00 23. " IRQS695 ,IRQS Status Bit 695" "Low,High" textline " " bitfld.long 0x00 22. " IRQS694 ,IRQS Status Bit 694" "Low,High" bitfld.long 0x00 21. " IRQS693 ,IRQS Status Bit 693" "Low,High" bitfld.long 0x00 20. " IRQS692 ,IRQS Status Bit 692" "Low,High" textline " " bitfld.long 0x00 19. " IRQS691 ,IRQS Status Bit 691" "Low,High" bitfld.long 0x00 18. " IRQS690 ,IRQS Status Bit 690" "Low,High" bitfld.long 0x00 17. " IRQS689 ,IRQS Status Bit 689" "Low,High" textline " " bitfld.long 0x00 16. " IRQS688 ,IRQS Status Bit 688" "Low,High" bitfld.long 0x00 15. " IRQS687 ,IRQS Status Bit 687" "Low,High" bitfld.long 0x00 14. " IRQS686 ,IRQS Status Bit 686" "Low,High" textline " " bitfld.long 0x00 13. " IRQS685 ,IRQS Status Bit 685" "Low,High" bitfld.long 0x00 12. " IRQS684 ,IRQS Status Bit 684" "Low,High" bitfld.long 0x00 11. " IRQS683 ,IRQS Status Bit 683" "Low,High" textline " " bitfld.long 0x00 10. " IRQS682 ,IRQS Status Bit 682" "Low,High" bitfld.long 0x00 9. " IRQS681 ,IRQS Status Bit 681" "Low,High" bitfld.long 0x00 8. " IRQS680 ,IRQS Status Bit 680" "Low,High" textline " " bitfld.long 0x00 7. " IRQS679 ,IRQS Status Bit 679" "Low,High" bitfld.long 0x00 6. " IRQS678 ,IRQS Status Bit 678" "Low,High" bitfld.long 0x00 5. " IRQS677 ,IRQS Status Bit 677" "Low,High" textline " " bitfld.long 0x00 4. " IRQS676 ,IRQS Status Bit 676" "Low,High" bitfld.long 0x00 3. " IRQS675 ,IRQS Status Bit 675" "Low,High" bitfld.long 0x00 2. " IRQS674 ,IRQS Status Bit 674" "Low,High" textline " " bitfld.long 0x00 1. " IRQS673 ,IRQS Status Bit 673" "Low,High" bitfld.long 0x00 0. " IRQS672 ,IRQS Status Bit 672" "Low,High" else rgroup.long 0x0D58++0x03 line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x17) rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" bitfld.long 0x00 31. " IRQS735 ,IRQS Status Bit 735" "Low,High" bitfld.long 0x00 30. " IRQS734 ,IRQS Status Bit 734" "Low,High" bitfld.long 0x00 29. " IRQS733 ,IRQS Status Bit 733" "Low,High" textline " " bitfld.long 0x00 28. " IRQS732 ,IRQS Status Bit 732" "Low,High" bitfld.long 0x00 27. " IRQS731 ,IRQS Status Bit 731" "Low,High" bitfld.long 0x00 26. " IRQS730 ,IRQS Status Bit 730" "Low,High" textline " " bitfld.long 0x00 25. " IRQS729 ,IRQS Status Bit 729" "Low,High" bitfld.long 0x00 24. " IRQS728 ,IRQS Status Bit 728" "Low,High" bitfld.long 0x00 23. " IRQS727 ,IRQS Status Bit 727" "Low,High" textline " " bitfld.long 0x00 22. " IRQS726 ,IRQS Status Bit 726" "Low,High" bitfld.long 0x00 21. " IRQS725 ,IRQS Status Bit 725" "Low,High" bitfld.long 0x00 20. " IRQS724 ,IRQS Status Bit 724" "Low,High" textline " " bitfld.long 0x00 19. " IRQS723 ,IRQS Status Bit 723" "Low,High" bitfld.long 0x00 18. " IRQS722 ,IRQS Status Bit 722" "Low,High" bitfld.long 0x00 17. " IRQS721 ,IRQS Status Bit 721" "Low,High" textline " " bitfld.long 0x00 16. " IRQS720 ,IRQS Status Bit 720" "Low,High" bitfld.long 0x00 15. " IRQS719 ,IRQS Status Bit 719" "Low,High" bitfld.long 0x00 14. " IRQS718 ,IRQS Status Bit 718" "Low,High" textline " " bitfld.long 0x00 13. " IRQS717 ,IRQS Status Bit 717" "Low,High" bitfld.long 0x00 12. " IRQS716 ,IRQS Status Bit 716" "Low,High" bitfld.long 0x00 11. " IRQS715 ,IRQS Status Bit 715" "Low,High" textline " " bitfld.long 0x00 10. " IRQS714 ,IRQS Status Bit 714" "Low,High" bitfld.long 0x00 9. " IRQS713 ,IRQS Status Bit 713" "Low,High" bitfld.long 0x00 8. " IRQS712 ,IRQS Status Bit 712" "Low,High" textline " " bitfld.long 0x00 7. " IRQS711 ,IRQS Status Bit 711" "Low,High" bitfld.long 0x00 6. " IRQS710 ,IRQS Status Bit 710" "Low,High" bitfld.long 0x00 5. " IRQS709 ,IRQS Status Bit 709" "Low,High" textline " " bitfld.long 0x00 4. " IRQS708 ,IRQS Status Bit 708" "Low,High" bitfld.long 0x00 3. " IRQS707 ,IRQS Status Bit 707" "Low,High" bitfld.long 0x00 2. " IRQS706 ,IRQS Status Bit 706" "Low,High" textline " " bitfld.long 0x00 1. " IRQS705 ,IRQS Status Bit 705" "Low,High" bitfld.long 0x00 0. " IRQS704 ,IRQS Status Bit 704" "Low,High" else rgroup.long 0x0D5C++0x03 line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x18) rgroup.long 0x060++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" bitfld.long 0x00 31. " IRQS767 ,IRQS Status Bit 767" "Low,High" bitfld.long 0x00 30. " IRQS766 ,IRQS Status Bit 766" "Low,High" bitfld.long 0x00 29. " IRQS765 ,IRQS Status Bit 765" "Low,High" textline " " bitfld.long 0x00 28. " IRQS764 ,IRQS Status Bit 764" "Low,High" bitfld.long 0x00 27. " IRQS763 ,IRQS Status Bit 763" "Low,High" bitfld.long 0x00 26. " IRQS762 ,IRQS Status Bit 762" "Low,High" textline " " bitfld.long 0x00 25. " IRQS761 ,IRQS Status Bit 761" "Low,High" bitfld.long 0x00 24. " IRQS760 ,IRQS Status Bit 760" "Low,High" bitfld.long 0x00 23. " IRQS759 ,IRQS Status Bit 759" "Low,High" textline " " bitfld.long 0x00 22. " IRQS758 ,IRQS Status Bit 758" "Low,High" bitfld.long 0x00 21. " IRQS757 ,IRQS Status Bit 757" "Low,High" bitfld.long 0x00 20. " IRQS756 ,IRQS Status Bit 756" "Low,High" textline " " bitfld.long 0x00 19. " IRQS755 ,IRQS Status Bit 755" "Low,High" bitfld.long 0x00 18. " IRQS754 ,IRQS Status Bit 754" "Low,High" bitfld.long 0x00 17. " IRQS753 ,IRQS Status Bit 753" "Low,High" textline " " bitfld.long 0x00 16. " IRQS752 ,IRQS Status Bit 752" "Low,High" bitfld.long 0x00 15. " IRQS751 ,IRQS Status Bit 751" "Low,High" bitfld.long 0x00 14. " IRQS750 ,IRQS Status Bit 750" "Low,High" textline " " bitfld.long 0x00 13. " IRQS749 ,IRQS Status Bit 749" "Low,High" bitfld.long 0x00 12. " IRQS748 ,IRQS Status Bit 748" "Low,High" bitfld.long 0x00 11. " IRQS747 ,IRQS Status Bit 747" "Low,High" textline " " bitfld.long 0x00 10. " IRQS746 ,IRQS Status Bit 746" "Low,High" bitfld.long 0x00 9. " IRQS745 ,IRQS Status Bit 745" "Low,High" bitfld.long 0x00 8. " IRQS744 ,IRQS Status Bit 744" "Low,High" textline " " bitfld.long 0x00 7. " IRQS743 ,IRQS Status Bit 743" "Low,High" bitfld.long 0x00 6. " IRQS742 ,IRQS Status Bit 742" "Low,High" bitfld.long 0x00 5. " IRQS741 ,IRQS Status Bit 741" "Low,High" textline " " bitfld.long 0x00 4. " IRQS740 ,IRQS Status Bit 740" "Low,High" bitfld.long 0x00 3. " IRQS739 ,IRQS Status Bit 739" "Low,High" bitfld.long 0x00 2. " IRQS738 ,IRQS Status Bit 738" "Low,High" textline " " bitfld.long 0x00 1. " IRQS737 ,IRQS Status Bit 737" "Low,High" bitfld.long 0x00 0. " IRQS736 ,IRQS Status Bit 736" "Low,High" else rgroup.long 0x0D60++0x03 line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x19) rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" bitfld.long 0x00 31. " IRQS799 ,IRQS Status Bit 799" "Low,High" bitfld.long 0x00 30. " IRQS798 ,IRQS Status Bit 798" "Low,High" bitfld.long 0x00 29. " IRQS797 ,IRQS Status Bit 797" "Low,High" textline " " bitfld.long 0x00 28. " IRQS796 ,IRQS Status Bit 796" "Low,High" bitfld.long 0x00 27. " IRQS795 ,IRQS Status Bit 795" "Low,High" bitfld.long 0x00 26. " IRQS794 ,IRQS Status Bit 794" "Low,High" textline " " bitfld.long 0x00 25. " IRQS793 ,IRQS Status Bit 793" "Low,High" bitfld.long 0x00 24. " IRQS792 ,IRQS Status Bit 792" "Low,High" bitfld.long 0x00 23. " IRQS791 ,IRQS Status Bit 791" "Low,High" textline " " bitfld.long 0x00 22. " IRQS790 ,IRQS Status Bit 790" "Low,High" bitfld.long 0x00 21. " IRQS789 ,IRQS Status Bit 789" "Low,High" bitfld.long 0x00 20. " IRQS788 ,IRQS Status Bit 788" "Low,High" textline " " bitfld.long 0x00 19. " IRQS787 ,IRQS Status Bit 787" "Low,High" bitfld.long 0x00 18. " IRQS786 ,IRQS Status Bit 786" "Low,High" bitfld.long 0x00 17. " IRQS785 ,IRQS Status Bit 785" "Low,High" textline " " bitfld.long 0x00 16. " IRQS784 ,IRQS Status Bit 784" "Low,High" bitfld.long 0x00 15. " IRQS783 ,IRQS Status Bit 783" "Low,High" bitfld.long 0x00 14. " IRQS782 ,IRQS Status Bit 782" "Low,High" textline " " bitfld.long 0x00 13. " IRQS781 ,IRQS Status Bit 781" "Low,High" bitfld.long 0x00 12. " IRQS780 ,IRQS Status Bit 780" "Low,High" bitfld.long 0x00 11. " IRQS779 ,IRQS Status Bit 779" "Low,High" textline " " bitfld.long 0x00 10. " IRQS778 ,IRQS Status Bit 778" "Low,High" bitfld.long 0x00 9. " IRQS777 ,IRQS Status Bit 777" "Low,High" bitfld.long 0x00 8. " IRQS776 ,IRQS Status Bit 776" "Low,High" textline " " bitfld.long 0x00 7. " IRQS775 ,IRQS Status Bit 775" "Low,High" bitfld.long 0x00 6. " IRQS774 ,IRQS Status Bit 774" "Low,High" bitfld.long 0x00 5. " IRQS773 ,IRQS Status Bit 773" "Low,High" textline " " bitfld.long 0x00 4. " IRQS772 ,IRQS Status Bit 772" "Low,High" bitfld.long 0x00 3. " IRQS771 ,IRQS Status Bit 771" "Low,High" bitfld.long 0x00 2. " IRQS770 ,IRQS Status Bit 770" "Low,High" textline " " bitfld.long 0x00 1. " IRQS769 ,IRQS Status Bit 769" "Low,High" bitfld.long 0x00 0. " IRQS768 ,IRQS Status Bit 768" "Low,High" else rgroup.long 0x0D64++0x03 line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1A) rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" bitfld.long 0x00 31. " IRQS831 ,IRQS Status Bit 831" "Low,High" bitfld.long 0x00 30. " IRQS830 ,IRQS Status Bit 830" "Low,High" bitfld.long 0x00 29. " IRQS829 ,IRQS Status Bit 829" "Low,High" textline " " bitfld.long 0x00 28. " IRQS828 ,IRQS Status Bit 828" "Low,High" bitfld.long 0x00 27. " IRQS827 ,IRQS Status Bit 827" "Low,High" bitfld.long 0x00 26. " IRQS826 ,IRQS Status Bit 826" "Low,High" textline " " bitfld.long 0x00 25. " IRQS825 ,IRQS Status Bit 825" "Low,High" bitfld.long 0x00 24. " IRQS824 ,IRQS Status Bit 824" "Low,High" bitfld.long 0x00 23. " IRQS823 ,IRQS Status Bit 823" "Low,High" textline " " bitfld.long 0x00 22. " IRQS822 ,IRQS Status Bit 822" "Low,High" bitfld.long 0x00 21. " IRQS821 ,IRQS Status Bit 821" "Low,High" bitfld.long 0x00 20. " IRQS820 ,IRQS Status Bit 820" "Low,High" textline " " bitfld.long 0x00 19. " IRQS819 ,IRQS Status Bit 819" "Low,High" bitfld.long 0x00 18. " IRQS818 ,IRQS Status Bit 818" "Low,High" bitfld.long 0x00 17. " IRQS817 ,IRQS Status Bit 817" "Low,High" textline " " bitfld.long 0x00 16. " IRQS816 ,IRQS Status Bit 816" "Low,High" bitfld.long 0x00 15. " IRQS815 ,IRQS Status Bit 815" "Low,High" bitfld.long 0x00 14. " IRQS814 ,IRQS Status Bit 814" "Low,High" textline " " bitfld.long 0x00 13. " IRQS813 ,IRQS Status Bit 813" "Low,High" bitfld.long 0x00 12. " IRQS812 ,IRQS Status Bit 812" "Low,High" bitfld.long 0x00 11. " IRQS811 ,IRQS Status Bit 811" "Low,High" textline " " bitfld.long 0x00 10. " IRQS810 ,IRQS Status Bit 810" "Low,High" bitfld.long 0x00 9. " IRQS809 ,IRQS Status Bit 809" "Low,High" bitfld.long 0x00 8. " IRQS808 ,IRQS Status Bit 808" "Low,High" textline " " bitfld.long 0x00 7. " IRQS807 ,IRQS Status Bit 807" "Low,High" bitfld.long 0x00 6. " IRQS806 ,IRQS Status Bit 806" "Low,High" bitfld.long 0x00 5. " IRQS805 ,IRQS Status Bit 805" "Low,High" textline " " bitfld.long 0x00 4. " IRQS804 ,IRQS Status Bit 804" "Low,High" bitfld.long 0x00 3. " IRQS803 ,IRQS Status Bit 803" "Low,High" bitfld.long 0x00 2. " IRQS802 ,IRQS Status Bit 802" "Low,High" textline " " bitfld.long 0x00 1. " IRQS801 ,IRQS Status Bit 801" "Low,High" bitfld.long 0x00 0. " IRQS800 ,IRQS Status Bit 800" "Low,High" else rgroup.long 0x0D68++0x03 line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1B) rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" bitfld.long 0x00 31. " IRQS863 ,IRQS Status Bit 863" "Low,High" bitfld.long 0x00 30. " IRQS862 ,IRQS Status Bit 862" "Low,High" bitfld.long 0x00 29. " IRQS861 ,IRQS Status Bit 861" "Low,High" textline " " bitfld.long 0x00 28. " IRQS860 ,IRQS Status Bit 860" "Low,High" bitfld.long 0x00 27. " IRQS859 ,IRQS Status Bit 859" "Low,High" bitfld.long 0x00 26. " IRQS858 ,IRQS Status Bit 858" "Low,High" textline " " bitfld.long 0x00 25. " IRQS857 ,IRQS Status Bit 857" "Low,High" bitfld.long 0x00 24. " IRQS856 ,IRQS Status Bit 856" "Low,High" bitfld.long 0x00 23. " IRQS855 ,IRQS Status Bit 855" "Low,High" textline " " bitfld.long 0x00 22. " IRQS854 ,IRQS Status Bit 854" "Low,High" bitfld.long 0x00 21. " IRQS853 ,IRQS Status Bit 853" "Low,High" bitfld.long 0x00 20. " IRQS852 ,IRQS Status Bit 852" "Low,High" textline " " bitfld.long 0x00 19. " IRQS851 ,IRQS Status Bit 851" "Low,High" bitfld.long 0x00 18. " IRQS850 ,IRQS Status Bit 850" "Low,High" bitfld.long 0x00 17. " IRQS849 ,IRQS Status Bit 849" "Low,High" textline " " bitfld.long 0x00 16. " IRQS848 ,IRQS Status Bit 848" "Low,High" bitfld.long 0x00 15. " IRQS847 ,IRQS Status Bit 847" "Low,High" bitfld.long 0x00 14. " IRQS846 ,IRQS Status Bit 846" "Low,High" textline " " bitfld.long 0x00 13. " IRQS845 ,IRQS Status Bit 845" "Low,High" bitfld.long 0x00 12. " IRQS844 ,IRQS Status Bit 844" "Low,High" bitfld.long 0x00 11. " IRQS843 ,IRQS Status Bit 843" "Low,High" textline " " bitfld.long 0x00 10. " IRQS842 ,IRQS Status Bit 842" "Low,High" bitfld.long 0x00 9. " IRQS841 ,IRQS Status Bit 841" "Low,High" bitfld.long 0x00 8. " IRQS840 ,IRQS Status Bit 840" "Low,High" textline " " bitfld.long 0x00 7. " IRQS839 ,IRQS Status Bit 839" "Low,High" bitfld.long 0x00 6. " IRQS838 ,IRQS Status Bit 838" "Low,High" bitfld.long 0x00 5. " IRQS837 ,IRQS Status Bit 837" "Low,High" textline " " bitfld.long 0x00 4. " IRQS836 ,IRQS Status Bit 836" "Low,High" bitfld.long 0x00 3. " IRQS835 ,IRQS Status Bit 835" "Low,High" bitfld.long 0x00 2. " IRQS834 ,IRQS Status Bit 834" "Low,High" textline " " bitfld.long 0x00 1. " IRQS833 ,IRQS Status Bit 833" "Low,High" bitfld.long 0x00 0. " IRQS832 ,IRQS Status Bit 832" "Low,High" else rgroup.long 0x0D6C++0x03 line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1C) rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" bitfld.long 0x00 31. " IRQS895 ,IRQS Status Bit 895" "Low,High" bitfld.long 0x00 30. " IRQS894 ,IRQS Status Bit 894" "Low,High" bitfld.long 0x00 29. " IRQS893 ,IRQS Status Bit 893" "Low,High" textline " " bitfld.long 0x00 28. " IRQS892 ,IRQS Status Bit 892" "Low,High" bitfld.long 0x00 27. " IRQS891 ,IRQS Status Bit 891" "Low,High" bitfld.long 0x00 26. " IRQS890 ,IRQS Status Bit 890" "Low,High" textline " " bitfld.long 0x00 25. " IRQS889 ,IRQS Status Bit 889" "Low,High" bitfld.long 0x00 24. " IRQS888 ,IRQS Status Bit 888" "Low,High" bitfld.long 0x00 23. " IRQS887 ,IRQS Status Bit 887" "Low,High" textline " " bitfld.long 0x00 22. " IRQS886 ,IRQS Status Bit 886" "Low,High" bitfld.long 0x00 21. " IRQS885 ,IRQS Status Bit 885" "Low,High" bitfld.long 0x00 20. " IRQS884 ,IRQS Status Bit 884" "Low,High" textline " " bitfld.long 0x00 19. " IRQS883 ,IRQS Status Bit 883" "Low,High" bitfld.long 0x00 18. " IRQS882 ,IRQS Status Bit 882" "Low,High" bitfld.long 0x00 17. " IRQS881 ,IRQS Status Bit 881" "Low,High" textline " " bitfld.long 0x00 16. " IRQS880 ,IRQS Status Bit 880" "Low,High" bitfld.long 0x00 15. " IRQS879 ,IRQS Status Bit 879" "Low,High" bitfld.long 0x00 14. " IRQS878 ,IRQS Status Bit 878" "Low,High" textline " " bitfld.long 0x00 13. " IRQS877 ,IRQS Status Bit 877" "Low,High" bitfld.long 0x00 12. " IRQS876 ,IRQS Status Bit 876" "Low,High" bitfld.long 0x00 11. " IRQS875 ,IRQS Status Bit 875" "Low,High" textline " " bitfld.long 0x00 10. " IRQS874 ,IRQS Status Bit 874" "Low,High" bitfld.long 0x00 9. " IRQS873 ,IRQS Status Bit 873" "Low,High" bitfld.long 0x00 8. " IRQS872 ,IRQS Status Bit 872" "Low,High" textline " " bitfld.long 0x00 7. " IRQS871 ,IRQS Status Bit 871" "Low,High" bitfld.long 0x00 6. " IRQS870 ,IRQS Status Bit 870" "Low,High" bitfld.long 0x00 5. " IRQS869 ,IRQS Status Bit 869" "Low,High" textline " " bitfld.long 0x00 4. " IRQS868 ,IRQS Status Bit 868" "Low,High" bitfld.long 0x00 3. " IRQS867 ,IRQS Status Bit 867" "Low,High" bitfld.long 0x00 2. " IRQS866 ,IRQS Status Bit 866" "Low,High" textline " " bitfld.long 0x00 1. " IRQS865 ,IRQS Status Bit 865" "Low,High" bitfld.long 0x00 0. " IRQS864 ,IRQS Status Bit 864" "Low,High" else rgroup.long 0x0D70++0x03 line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1D) rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" bitfld.long 0x00 31. " IRQS927 ,IRQS Status Bit 927" "Low,High" bitfld.long 0x00 30. " IRQS926 ,IRQS Status Bit 926" "Low,High" bitfld.long 0x00 29. " IRQS925 ,IRQS Status Bit 925" "Low,High" textline " " bitfld.long 0x00 28. " IRQS924 ,IRQS Status Bit 924" "Low,High" bitfld.long 0x00 27. " IRQS923 ,IRQS Status Bit 923" "Low,High" bitfld.long 0x00 26. " IRQS922 ,IRQS Status Bit 922" "Low,High" textline " " bitfld.long 0x00 25. " IRQS921 ,IRQS Status Bit 921" "Low,High" bitfld.long 0x00 24. " IRQS920 ,IRQS Status Bit 920" "Low,High" bitfld.long 0x00 23. " IRQS919 ,IRQS Status Bit 919" "Low,High" textline " " bitfld.long 0x00 22. " IRQS918 ,IRQS Status Bit 918" "Low,High" bitfld.long 0x00 21. " IRQS917 ,IRQS Status Bit 917" "Low,High" bitfld.long 0x00 20. " IRQS916 ,IRQS Status Bit 916" "Low,High" textline " " bitfld.long 0x00 19. " IRQS915 ,IRQS Status Bit 915" "Low,High" bitfld.long 0x00 18. " IRQS914 ,IRQS Status Bit 914" "Low,High" bitfld.long 0x00 17. " IRQS913 ,IRQS Status Bit 913" "Low,High" textline " " bitfld.long 0x00 16. " IRQS912 ,IRQS Status Bit 912" "Low,High" bitfld.long 0x00 15. " IRQS911 ,IRQS Status Bit 911" "Low,High" bitfld.long 0x00 14. " IRQS910 ,IRQS Status Bit 910" "Low,High" textline " " bitfld.long 0x00 13. " IRQS909 ,IRQS Status Bit 909" "Low,High" bitfld.long 0x00 12. " IRQS908 ,IRQS Status Bit 908" "Low,High" bitfld.long 0x00 11. " IRQS907 ,IRQS Status Bit 907" "Low,High" textline " " bitfld.long 0x00 10. " IRQS906 ,IRQS Status Bit 906" "Low,High" bitfld.long 0x00 9. " IRQS905 ,IRQS Status Bit 905" "Low,High" bitfld.long 0x00 8. " IRQS904 ,IRQS Status Bit 904" "Low,High" textline " " bitfld.long 0x00 7. " IRQS903 ,IRQS Status Bit 903" "Low,High" bitfld.long 0x00 6. " IRQS902 ,IRQS Status Bit 902" "Low,High" bitfld.long 0x00 5. " IRQS901 ,IRQS Status Bit 901" "Low,High" textline " " bitfld.long 0x00 4. " IRQS900 ,IRQS Status Bit 900" "Low,High" bitfld.long 0x00 3. " IRQS899 ,IRQS Status Bit 899" "Low,High" bitfld.long 0x00 2. " IRQS898 ,IRQS Status Bit 898" "Low,High" textline " " bitfld.long 0x00 1. " IRQS897 ,IRQS Status Bit 897" "Low,High" bitfld.long 0x00 0. " IRQS896 ,IRQS Status Bit 896" "Low,High" else rgroup.long 0x0D74++0x03 line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1E) rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" bitfld.long 0x00 31. " IRQS959 ,IRQS Status Bit 959" "Low,High" bitfld.long 0x00 30. " IRQS958 ,IRQS Status Bit 958" "Low,High" bitfld.long 0x00 29. " IRQS957 ,IRQS Status Bit 957" "Low,High" textline " " bitfld.long 0x00 28. " IRQS956 ,IRQS Status Bit 956" "Low,High" bitfld.long 0x00 27. " IRQS955 ,IRQS Status Bit 955" "Low,High" bitfld.long 0x00 26. " IRQS954 ,IRQS Status Bit 954" "Low,High" textline " " bitfld.long 0x00 25. " IRQS953 ,IRQS Status Bit 953" "Low,High" bitfld.long 0x00 24. " IRQS952 ,IRQS Status Bit 952" "Low,High" bitfld.long 0x00 23. " IRQS951 ,IRQS Status Bit 951" "Low,High" textline " " bitfld.long 0x00 22. " IRQS950 ,IRQS Status Bit 950" "Low,High" bitfld.long 0x00 21. " IRQS949 ,IRQS Status Bit 949" "Low,High" bitfld.long 0x00 20. " IRQS948 ,IRQS Status Bit 948" "Low,High" textline " " bitfld.long 0x00 19. " IRQS947 ,IRQS Status Bit 947" "Low,High" bitfld.long 0x00 18. " IRQS946 ,IRQS Status Bit 946" "Low,High" bitfld.long 0x00 17. " IRQS945 ,IRQS Status Bit 945" "Low,High" textline " " bitfld.long 0x00 16. " IRQS944 ,IRQS Status Bit 944" "Low,High" bitfld.long 0x00 15. " IRQS943 ,IRQS Status Bit 943" "Low,High" bitfld.long 0x00 14. " IRQS942 ,IRQS Status Bit 942" "Low,High" textline " " bitfld.long 0x00 13. " IRQS941 ,IRQS Status Bit 941" "Low,High" bitfld.long 0x00 12. " IRQS940 ,IRQS Status Bit 940" "Low,High" bitfld.long 0x00 11. " IRQS939 ,IRQS Status Bit 939" "Low,High" textline " " bitfld.long 0x00 10. " IRQS938 ,IRQS Status Bit 938" "Low,High" bitfld.long 0x00 9. " IRQS937 ,IRQS Status Bit 937" "Low,High" bitfld.long 0x00 8. " IRQS936 ,IRQS Status Bit 936" "Low,High" textline " " bitfld.long 0x00 7. " IRQS935 ,IRQS Status Bit 935" "Low,High" bitfld.long 0x00 6. " IRQS934 ,IRQS Status Bit 934" "Low,High" bitfld.long 0x00 5. " IRQS933 ,IRQS Status Bit 933" "Low,High" textline " " bitfld.long 0x00 4. " IRQS932 ,IRQS Status Bit 932" "Low,High" bitfld.long 0x00 3. " IRQS931 ,IRQS Status Bit 931" "Low,High" bitfld.long 0x00 2. " IRQS930 ,IRQS Status Bit 930" "Low,High" textline " " bitfld.long 0x00 1. " IRQS929 ,IRQS Status Bit 929" "Low,High" bitfld.long 0x00 0. " IRQS928 ,IRQS Status Bit 928" "Low,High" else rgroup.long 0x0D78++0x03 line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif if (((per.l(ad:0xf1001000+0x04))&0x0000001F)>=0x1F) rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" bitfld.long 0x00 27. " IRQS987 ,IRQS Status Bit 987" "Low,High" bitfld.long 0x00 26. " IRQS986 ,IRQS Status Bit 986" "Low,High" textline " " bitfld.long 0x00 25. " IRQS985 ,IRQS Status Bit 985" "Low,High" bitfld.long 0x00 24. " IRQS984 ,IRQS Status Bit 984" "Low,High" bitfld.long 0x00 23. " IRQS983 ,IRQS Status Bit 983" "Low,High" textline " " bitfld.long 0x00 22. " IRQS982 ,IRQS Status Bit 982" "Low,High" bitfld.long 0x00 21. " IRQS981 ,IRQS Status Bit 981" "Low,High" bitfld.long 0x00 20. " IRQS980 ,IRQS Status Bit 980" "Low,High" textline " " bitfld.long 0x00 19. " IRQS979 ,IRQS Status Bit 979" "Low,High" bitfld.long 0x00 18. " IRQS978 ,IRQS Status Bit 978" "Low,High" bitfld.long 0x00 17. " IRQS977 ,IRQS Status Bit 977" "Low,High" textline " " bitfld.long 0x00 16. " IRQS976 ,IRQS Status Bit 976" "Low,High" bitfld.long 0x00 15. " IRQS975 ,IRQS Status Bit 975" "Low,High" bitfld.long 0x00 14. " IRQS974 ,IRQS Status Bit 974" "Low,High" textline " " bitfld.long 0x00 13. " IRQS973 ,IRQS Status Bit 973" "Low,High" bitfld.long 0x00 12. " IRQS972 ,IRQS Status Bit 972" "Low,High" bitfld.long 0x00 11. " IRQS971 ,IRQS Status Bit 971" "Low,High" textline " " bitfld.long 0x00 10. " IRQS970 ,IRQS Status Bit 970" "Low,High" bitfld.long 0x00 9. " IRQS969 ,IRQS Status Bit 969" "Low,High" bitfld.long 0x00 8. " IRQS968 ,IRQS Status Bit 968" "Low,High" textline " " bitfld.long 0x00 7. " IRQS967 ,IRQS Status Bit 967" "Low,High" bitfld.long 0x00 6. " IRQS966 ,IRQS Status Bit 966" "Low,High" bitfld.long 0x00 5. " IRQS965 ,IRQS Status Bit 965" "Low,High" textline " " bitfld.long 0x00 4. " IRQS964 ,IRQS Status Bit 964" "Low,High" bitfld.long 0x00 3. " IRQS963 ,IRQS Status Bit 963" "Low,High" bitfld.long 0x00 2. " IRQS962 ,IRQS Status Bit 962" "Low,High" textline " " bitfld.long 0x00 1. " IRQS961 ,IRQS Status Bit 961" "Low,High" bitfld.long 0x00 0. " IRQS960 ,IRQS Status Bit 960" "Low,High" else rgroup.long 0x0D7C++0x03 line.long 0x0 "GICD_SPISR30,Shared Peripheral Interrupt Status Register 30" textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " textline " " endif tree.end width 25. tree "Software Generated Interrupt" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 15. " NSATT ,NSATT" "Secure,Non-secure" bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else wgroup.long 0x0F00++0x03 line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register" bitfld.long 0x00 24.--25. " TLF ,Target List Filter" "TargetList,All CPUs,Request CPU,?..." hexmask.long.byte 0x00 16.--23. 1. " CPUTL ,CPU Target List" textline " " bitfld.long 0x00 0.--3. " SGINTID ,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x0F20++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR0,SGI Set/Clear Pending Register 0" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI0 ,SGI0 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI1 ,SGI1 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI2 ,SGI2 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI3 ,SGI3 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F24++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR1,SGI Set/Clear Pending Register 1" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI4 ,SGI4 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI5 ,SGI5 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI6 ,SGI6 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI7 ,SGI7 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F28++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 2" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI8 ,SGI8 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI9 ,SGI9 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI10 ,SGI10 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI11 ,SGI11 Set/Clear Pending Bit" "Disabled,Enabled" group.long 0x0F2C++0x03 line.long 0x00 "GICD_SET/CLR_PENDSGIR2,SGI Set/Clear Pending Register 3" setclrfld.long 0x00 31. 0x00 31. -0x10 31. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 30. 0x00 30. -0x10 30. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 29. 0x00 29. -0x10 29. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 28. 0x00 28. -0x10 28. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 27. 0x00 27. -0x10 27. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 26. 0x00 26. -0x10 26. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 25. 0x00 25. -0x10 25. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 24. 0x00 24. -0x10 24. " SET/CLR_SGI12 ,SGI12 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 23. 0x00 23. -0x10 23. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 22. 0x00 22. -0x10 22. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 21. 0x00 21. -0x10 21. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 20. 0x00 20. -0x10 20. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 19. 0x00 19. -0x10 19. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 18. 0x00 18. -0x10 18. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 17. 0x00 17. -0x10 17. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 16. 0x00 16. -0x10 16. " SET/CLR_SGI13 ,SGI13 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 15. 0x00 15. -0x10 15. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 14. 0x00 14. -0x10 14. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 13. 0x00 13. -0x10 13. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 12. 0x00 12. -0x10 12. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 11. 0x00 11. -0x10 11. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 10. 0x00 10. -0x10 10. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 9. 0x00 9. -0x10 9. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 8. 0x00 8. -0x10 8. " SET/CLR_SGI14 ,SGI14 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 7. 0x00 7. -0x10 7. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 6. 0x00 6. -0x10 6. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 5. 0x00 5. -0x10 5. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 4. 0x00 4. -0x10 4. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 3. 0x00 3. -0x10 3. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 2. 0x00 2. -0x10 2. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x00 1. -0x10 1. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" setclrfld.long 0x00 0. 0x00 0. -0x10 0. " SET/CLR_SGI15 ,SGI15 Set/Clear Pending Bit" "Disabled,Enabled" tree.end width 12. tree "Peripheral/Component ID Registers" rgroup.byte 0x0FE0++0x00 line.byte 0x00 "GICD_PIDR0,Peripheral ID0 Register" hexmask.byte 0x00 0.--7. 1. " DEVID ,DevID field" rgroup.byte 0x0FE4++0x00 line.byte 0x00 "GICD_PIDR1,Peripheral ID1 Register" bitfld.byte 0x00 4.--7. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 0.--3. " DEVID ,DevID field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FE8++0x00 line.byte 0x00 "GICD_PIDR2,Peripheral ID2 Register" bitfld.byte 0x00 4.--7. " ARCHREV ,ArchRev field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.byte 0x00 3. " UJEPCODE ,UsesJEPcode field" "Low,High" bitfld.byte 0x00 0.--2. " ARCHID ,ArchID field" "0,1,2,3,4,5,6,7" rgroup.byte 0x0FEC++0x00 line.byte 0x00 "GICD_PIDR3,Peripheral ID3 Register" bitfld.byte 0x00 4.--7. " REVID ,Revision field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0x0FD0++0x00 line.byte 0x00 "GICD_PIDR4,Peripheral ID4 Register" bitfld.byte 0x00 0.--3. " CC ,ContinuationCode field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.byte 0xFD4++0x00 line.byte 0x00 "GICD_PIDR5,Peripheral ID5 Register" rgroup.byte 0xFD8++0x00 line.byte 0x00 "GICD_PIDR6,Peripheral ID6 Register" rgroup.byte 0xFDC++0x00 line.byte 0x00 "GICD_PIDR7,Peripheral ID7 Register" textline " " rgroup.byte 0xFF0++0x00 line.byte 0x00 "GICD_CIDR0,Component ID0 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF4++0x00 line.byte 0x00 "GICD_CIDR1,Component ID1 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFF8++0x00 line.byte 0x00 "GICD_CIDR2,Component ID2 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" rgroup.byte 0xFFC++0x00 line.byte 0x00 "GICD_CIDR3,Component ID3 Register" hexmask.byte 0x00 0.--7. 1. " FIXVAL ,ARM-defined fixed values for the preamble for component discovery" textline " " tree.end tree.end width 0x0B base ad:0xf1002000 width 17. tree "CPU Interface" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x0) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " else if PER.ADDRESS.isSECUREEX(ad:0xf1002000) group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Secure access)" bitfld.long 0x00 10. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 9. " EOIMODES ,Controls the behavior of accesses to GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 8. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 7. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 6. " IRQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP0 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 4. " CBPR ,Controls whether the GICC_BPR provides common control to Group 0 and Group 1 interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether the CPU interface signals Group 0 interrupts to a target processor using the FIQ or the IRQ signal" "IRQ,FIQ" bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" textline " " bitfld.long 0x00 1. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enable for the signaling of Group 0 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" else group.long 0x0000++0x03 line.long 0x00 "GICC_CTLR,CPU Interface Control Register (Non-secure access)" bitfld.long 0x00 9. " EOIMODENS ,Controls the behavior of Non-secure accesses to the GICC_EOIR and GICC_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 6. " IRQBYPDISGRP1 ,When the signaling of IRQs by the CPU interface is disabled this bit partly controls whether the bypass IRQ signal is signaled to the processor" "Signaled,Not signaled" bitfld.long 0x00 5. " FIQBYPDISGRP1 ,When the signaling of FIQs by the CPU interface is disabled this bit partly controls whether the bypass FIQ signal is signaled to the processor" "Signaled,Not signaled" textline " " bitfld.long 0x00 0. " ENABLEGRP1 ,Enable for the signaling of Group 1 interrupts by the CPU interface to the connected processor" "Disabled,Enabled" textline " " textline " " endif endif group.long 0x0004++0x03 line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) if PER.ADDRESS.isSECUREEX(ad:0xf1002000+0x0008) group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register (Non-secure access)" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif else group.long 0x0008++0x03 line.long 0x00 "GICC_BPR,Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,Reserved,[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" endif hgroup.long 0x000C++0x03 hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICC_EOIR,End Of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICC_RPR,Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICC_HPIR,Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) group.long 0x001C++0x03 line.long 0x00 "GICC_ABPR,Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" else hgroup.long 0x001C++0x03 hide.long 0x00 "GICC_ABPR,Aliased Binary Point Register" endif hgroup.long 0x0020++0x003 hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register" in if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) wgroup.long 0x0024++0x03 line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" else hgroup.long 0x0024++0x03 hide.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register" hgroup.long 0x0028++0x03 hide.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register" endif group.long 0x00D0++0x03 line.long 0x00 "GICC_APR0,Active Priorities Register" if (((per.l(ad:0xf1001000+0x04))&0x400)==0x400) group.long 0x00E0++0x03 line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" else hgroup.long 0x00E0++0x03 hide.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register" endif rgroup.long 0x00FC++0x03 line.long 0x00 "GICC_IIDR,CPU and Virtual CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv1,GICv2,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICC_DIR,Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end sif CPU.FEATURE(hypervisor) base ad:0xf1004000 width 12. tree "Virtual CPU Control Interface" group.long 0x0000++0x03 line.long 0x00 "GICH_HCR,Hypervisor Control Register" bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 7. " VGRP1DIE ,VM Disable Group 1 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " VGRP1EIE ,VM Enable Group 1 Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " VGRP0DIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " VGRP0EIE ,VM Disable Group 0 Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " NPIE ,No Pending Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LRENPIE ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " UIE ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " EN ,Enable" "Disabled,Enabled" rgroup.long 0x0004++0x03 line.long 0x00 "GICH_VTR,VGIC Type Register" bitfld.long 0x00 29.--31. " PRIBITS ,Number of priority bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRI levels,?..." textline " " bitfld.long 0x00 26.--28. " PREBITS ,Number of pre-emption bits" "Reserved,Reserved,Reserved,Reserved,5 bits 32 PRE levels,?..." textline " " bitfld.long 0x00 0.--5. " LISTREGS ,List regs number" "Reserved,Reserved,Reserved,4 lists,?..." group.long 0x008++0x03 line.long 0x00 "GICH_VMCR,Virtual Machine Control Register" bitfld.long 0x00 27.--31. " VMPRIMASK ,Alias of GICV_PMR.Priority" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 21.--23. " VMBP ,Alias of GICV_BPR.Binary point" "0,1,2,3,4,5,6,7" bitfld.long 0x00 18.--20. " VMABP ,Alias of GICV_ABPR.Binary point" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 9. " VEM ,Alias of GICV_CTLR.EOImode" "0,1" bitfld.long 0x00 4. " VMCBPR ,Alias of GICV_CTLR.CBPR" "0,1" bitfld.long 0x00 3. " VMFIQEN ,Alias of GICV_CTLR.FIQEn" "0,1" textline " " bitfld.long 0x00 2. " VMACKCTL ,Alias of GICV_CTLR.AckCtl" "0,1" bitfld.long 0x00 1. " VMGRP1EN ,Alias of GICV_CTLR.EnableGrp1" "0,1" bitfld.long 0x00 0. " VMGRP0EN ,Alias of GICV_CTLR.EnableGrp0" "0,1" rgroup.long 0x0010++0x03 line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register" bitfld.long 0x00 7. " VGRP1D ,Disabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 6. " VGRP1E ,Enabled Group 1 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 5. " VGRP0D ,Disabled Group 0 maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " VGRP0E ,Enabled Group 0 maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 3. " NP ,No Pending maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 2. " LRENP ,List Register Entry Not Present maintenance interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " U ,Underflow maintenance interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " EOI ,EOI maintenance interrupt" "No interrupt,Interrupt" rgroup.long 0x020++0x03 line.long 0x00 "GICH_EISR0,End of Interrupt Status Register" bitfld.long 0x00 3. " STATUS3 ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt" bitfld.long 0x00 2. " STATUS2 ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt" bitfld.long 0x00 1. " STATUS1 ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " STATUS0 ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt" rgroup.long 0x0030++0x03 line.long 0x00 "GICH_ELSR0,Empty List register Status Register" bitfld.long 0x00 3. " STATUS3 ,Emptiness status bit for List register 3" "Not empty,Empty" bitfld.long 0x00 2. " STATUS2 ,Emptiness status bit for List register 2" "Not empty,Empty" bitfld.long 0x00 1. " STATUS1 ,Emptiness status bit for List register 1" "Not empty,Empty" textline " " bitfld.long 0x00 0. " STATUS0 ,Emptiness status bit for List register 0" "Not empty,Empty" group.long 0x00F0++0x03 line.long 0x00 "GICH_APR0,Active Priorities Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" if (((per.l(ad:0xf1004000+0x100))&0x80000000)==0x80000000) group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x100++0x03 line.long 0x00 "GICH_LR0,List Register 0" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0xf1004000+0x104))&0x80000000)==0x80000000) group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x104++0x03 line.long 0x00 "GICH_LR1,List Register 1" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0xf1004000+0x108))&0x80000000)==0x80000000) group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x108++0x03 line.long 0x00 "GICH_LR2,List Register 2" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif if (((per.l(ad:0xf1004000+0x10C))&0x80000000)==0x80000000) group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" hexmask.long.word 0x00 10.--19. 1. " PHYSICALID ,Indicates the physical interrupt ID that the hypervisor forwards to the Distributor" hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" else group.long 0x10C++0x03 line.long 0x00 "GICH_LR3,List Register 3" bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware" bitfld.long 0x00 30. " GRP1 ,Indicates whether this virtual interrupt is a Group 1 virtual interrupt" "Group 0,Group 1" bitfld.long 0x00 28.--29. " STATE ,The state of the interrupt" "Invalid,Pending,Active,Pending and active" textline " " bitfld.long 0x00 23.--27. " PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 19. " EOI ,Indicates whether this interrupt triggers an EOI maintenance interrupt" "Not asserted,Asserted" bitfld.long 0x00 10.--12. " CPUID ,If the interrupt has the VirtualID for an SGI that is 0-15 this field shows the requesting CPU ID" "0,1,2,3,4,5,6,7" textline " " hexmask.long.word 0x00 0.--9. 1. " VIRTUALID ,This ID is returned to the Guest OS when the interrupt is acknowledged through the VM Interrupt Acknowledge register, GICV_IAR" endif tree.end base ad:0xf1006000 width 12. tree "Virtual CPU Interface" group.long 0x0000++0x03 line.long 0x00 "GICV_CTLR,Virtual Machine Control Register" bitfld.long 0x00 9. " EOIMODE ,Controls the behavior associated with the GICV_EOIR GICV_AEOIR and GICV_DIR registers" "Priority drop/Deactivate,Priority drop" bitfld.long 0x00 4. " CBPR ,Controls whether the GICV_BPR controls both Group 0 and Group 1 virtual interrupts" "BPR/ABPR split,BPR common" bitfld.long 0x00 3. " FIQEN ,Controls whether interrupts marked as Group 0 are presented as virtual FIQs" "IRQs,FIQs" textline " " bitfld.long 0x00 2. " ACKCTL ,Acknowledge Control" "ID 1022 interrupt,Corresponding interrupt" bitfld.long 0x00 1. " ENABLEGRP1 ,Enables the signaling of Group 1 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" bitfld.long 0x00 0. " ENABLEGRP0 ,Enables the signaling of Group 0 virtual interrupts by the virtual CPU interface to the virtual machine" "Disabled,Enabled" group.long 0x0004++0x03 line.long 0x00 "GICV_PMR,VM Priority Mask Register" bitfld.long 0x00 3.--7. " PRIORITY ,Priority mask level for CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x0008++0x03 line.long 0x00 "GICV_BPR,VM Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "Reserved,Reserved,[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x000C++0x03 hide.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register" in wgroup.long 0x0010++0x03 line.long 0x00 "GICV_EOIR,VM End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0014++0x03 line.long 0x00 "GICV_RPR,VM Running Priority Register" hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,The current running priority on the Virtual CPU interface" rgroup.long 0x0018++0x03 line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x001C++0x03 line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register" bitfld.long 0x00 0.--2. " BINARY_POINT ,The value of this field controls how the 8-bit interrupt priority field is split into a group priority field and subpriority field" "[7:1]/[0],[7:2]/[1:0],[7:3]/[2:0],[7:4]/[3:0],[7:5]/[4:0],[7:6]/[5:0],[7]/[6:0],-/[7:0]" hgroup.long 0x0020++0x03 hide.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register" in wgroup.long 0x0024++0x03 line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the write refers to an SGI this field contains the CPUID value from the corresponding GICC_IAR access" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " EOIINTID ,The Interrupt ID value from the corresponding GICC_IAR access" rgroup.long 0x0028++0x03 line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation if the PENDINTID field returns the ID of an SGI this field contains the CPUID value for that interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " PENDINTID ,The interrupt ID of the highest priority pending interrupt" group.long 0x00D0++0x03 line.long 0x00 "GICV_APR0,VM Active Priority Register" bitfld.long 0x00 31. " APB31 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 30. " APB30 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 29. " APB29 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 28. " APB28 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 27. " APB27 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 26. " APB26 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 25. " APB25 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 24. " APB24 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 23. " APB23 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 22. " APB22 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 21. " APB21 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 20. " APB20 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 19. " APB19 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 18. " APB18 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 17. " APB17 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 16. " APB16 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 15. " APB15 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 14. " APB14 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 13. " APB13 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 12. " APB12 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 11. " APB11 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 10. " APB10 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 9. " APB9 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 8. " APB8 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 7. " APB7 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 6. " APB6 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 5. " APB5 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 4. " APB4 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 3. " APB3 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 2. " APB2 ,Determines whether the corresponding preemption level is active" "Not active,Active" textline " " bitfld.long 0x00 1. " APB1 ,Determines whether the corresponding preemption level is active" "Not active,Active" bitfld.long 0x00 0. " APB0 ,Determines whether the corresponding preemption level is active" "Not active,Active" rgroup.long 0x00FC++0x03 line.long 0x00 "GICV_IIDR,VM CPU Interface Identification Register" hexmask.long.word 0x00 20.--31. 1. " PRODID ,Product ID" bitfld.long 0x00 16.--19. " ARCH_VER ,Identifies the architecture version of the GIC" "GICv1,GICv2,?..." textline " " bitfld.long 0x00 12.--15. " REV ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " IMP ,Implementer" wgroup.long 0x1000++0x03 line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register" bitfld.long 0x00 10.--12. " CPUID ,On a multiprocessor implementation this field identifies the processor that requested the interrupt" "0,1,2,3,4,5,6,7" hexmask.long.word 0x00 0.--9. 1. " INTID ,The interrupt ID" tree.end endif width 0x0B tree.end AUTOINDENT.POP tree.end tree "PFC (Pin Function Controller)" base ad:0xE6060000 width 6. group.long 0x00++0x03 line.long 0x00 "PMMR,LSI Multiplexed Pin Setting Mask Register" bitfld.long 0x00 31. " MPM_31 ,Multiplexed Pin Setting Mask 31" "Disabled,Enabled" bitfld.long 0x00 30. " MPM_30 ,Multiplexed Pin Setting Mask 30" "Disabled,Enabled" bitfld.long 0x00 29. " MPM_29 ,Multiplexed Pin Setting Mask 29" "Disabled,Enabled" bitfld.long 0x00 28. " MPM_28 ,Multiplexed Pin Setting Mask 28" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " MPM_27 ,Multiplexed Pin Setting Mask 27" "Disabled,Enabled" bitfld.long 0x00 26. " MPM_26 ,Multiplexed Pin Setting Mask 26" "Disabled,Enabled" bitfld.long 0x00 25. " MPM_25 ,Multiplexed Pin Setting Mask 25" "Disabled,Enabled" bitfld.long 0x00 24. " MPM_24 ,Multiplexed Pin Setting Mask 24" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " MPM_23 ,Multiplexed Pin Setting Mask 23" "Disabled,Enabled" bitfld.long 0x00 22. " MPM_22 ,Multiplexed Pin Setting Mask 22" "Disabled,Enabled" bitfld.long 0x00 21. " MPM_21 ,Multiplexed Pin Setting Mask 21" "Disabled,Enabled" bitfld.long 0x00 20. " MPM_20 ,Multiplexed Pin Setting Mask 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MPM_19 ,Multiplexed Pin Setting Mask 19" "Disabled,Enabled" bitfld.long 0x00 18. " MPM_18 ,Multiplexed Pin Setting Mask 18" "Disabled,Enabled" bitfld.long 0x00 17. " MPM_17 ,Multiplexed Pin Setting Mask 17" "Disabled,Enabled" bitfld.long 0x00 16. " MPM_16 ,Multiplexed Pin Setting Mask 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " MPM_15 ,Multiplexed Pin Setting Mask 15" "Disabled,Enabled" bitfld.long 0x00 14. " MPM_14 ,Multiplexed Pin Setting Mask 14" "Disabled,Enabled" bitfld.long 0x00 13. " MPM_13 ,Multiplexed Pin Setting Mask 13" "Disabled,Enabled" bitfld.long 0x00 12. " MPM_12 ,Multiplexed Pin Setting Mask 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " MPM_11 ,Multiplexed Pin Setting Mask 11" "Disabled,Enabled" bitfld.long 0x00 10. " MPM_10 ,Multiplexed Pin Setting Mask 10" "Disabled,Enabled" bitfld.long 0x00 9. " MPM_9 ,Multiplexed Pin Setting Mask 9" "Disabled,Enabled" bitfld.long 0x00 8. " MPM_8 ,Multiplexed Pin Setting Mask 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MPM_7 ,Multiplexed Pin Setting Mask 7" "Disabled,Enabled" bitfld.long 0x00 6. " MPM_6 ,Multiplexed Pin Setting Mask 6" "Disabled,Enabled" bitfld.long 0x00 5. " MPM_5 ,Multiplexed Pin Setting Mask 5" "Disabled,Enabled" bitfld.long 0x00 4. " MPM_4 ,Multiplexed Pin Setting Mask 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MPM_3 ,Multiplexed Pin Setting Mask 3" "Disabled,Enabled" bitfld.long 0x00 2. " MPM_2 ,Multiplexed Pin Setting Mask 2" "Disabled,Enabled" bitfld.long 0x00 1. " MPM_1 ,Multiplexed Pin Setting Mask 1" "Disabled,Enabled" bitfld.long 0x00 0. " MPM_0 ,Multiplexed Pin Setting Mask 0" "Disabled,Enabled" tree "GPSRn Registers" width 8. group.long 0x04++0x1B line.long 0x00 "GPSR_0,GPIO/Peripheral Function Select Register 0" bitfld.long 0x00 31. " GP_0[31] ,GPIO/Peripheral Function Select 31" "GP-0-31,IP2[17:16]" bitfld.long 0x00 30. " GP_0[30] ,GPIO/Peripheral Function Select 30" "GP-0-30,IP2[15:14]" bitfld.long 0x00 29. " GP_0[29] ,GPIO/Peripheral Function Select 29" "GP-0-29,IP2[13:12]" bitfld.long 0x00 28. " GP_0[28] ,GPIO/Peripheral Function Select 28" "GP-0-28,IP2[11:10]" textline " " bitfld.long 0x00 27. " GP_0[27] ,GPIO/Peripheral Function Select 27" "GP-0-27,IP2[9:8]" bitfld.long 0x00 26. " GP_0[26] ,GPIO/Peripheral Function Select 26" "GP-0-26,IP2[7:6]" bitfld.long 0x00 25. " GP_0[25] ,GPIO/Peripheral Function Select 25" "GP-0-25,IP2[5:4]" bitfld.long 0x00 24. " GP_0[24] ,GPIO/Peripheral Function Select 24" "GP-0-24,IP2[3:2]" textline " " bitfld.long 0x00 23. " GP_0[23] ,GPIO/Peripheral Function Select 23" "GP-0-23,IP2[1:0]" bitfld.long 0x00 22. " GP_0[22] ,GPIO/Peripheral Function Select 22" "GP-0-22,IP1[31:30]" bitfld.long 0x00 21. " GP_0[21] ,GPIO/Peripheral Function Select 21" "GP-0-21,IP1[29:28]" bitfld.long 0x00 20. " GP_0[20] ,GPIO/Peripheral Function Select 20" "GP-0-20,IP1[27]" textline " " bitfld.long 0x00 19. " GP_0[19] ,GPIO/Peripheral Function Select 19" "GP-0-19,IP1[26]" bitfld.long 0x00 18. " GP_0[18] ,GPIO/Peripheral Function Select 18" "GP-0-18,A2" bitfld.long 0x00 17. " GP_0[17] ,GPIO/Peripheral Function Select 17" "GP-0-17,IP1[24]" bitfld.long 0x00 16. " GP_0[16] ,GPIO/Peripheral Function Select 16" "GP-0-16,IP1[23:22]" textline " " bitfld.long 0x00 15. " GP_0[15] ,GPIO/Peripheral Function Select 15" "GP-0-15,IP1[21:20]" bitfld.long 0x00 14. " GP_0[14] ,GPIO/Peripheral Function Select 14" "GP-0-14,IP1[19:18]" bitfld.long 0x00 13. " GP_0[13] ,GPIO/Peripheral Function Select 13" "GP-0-13,IP1[17:15]" bitfld.long 0x00 12. " GP_0[12] ,GPIO/Peripheral Function Select 12" "GP-0-12,IP1[14:13]" textline " " bitfld.long 0x00 11. " GP_0[11] ,GPIO/Peripheral Function Select 11" "GP-0-11,IP1[12:11]" bitfld.long 0x00 10. " GP_0[10] ,GPIO/Peripheral Function Select 10" "GP-0-10,IP1[10:8]" bitfld.long 0x00 9. " GP_0[9] ,GPIO/Peripheral Function Select 9" "GP-0-9,IP1[7:6]" bitfld.long 0x00 8. " GP_0[8] ,GPIO/Peripheral Function Select 8" "GP-0-8,IP1[5:4]" textline " " bitfld.long 0x00 7. " GP_0[7] ,GPIO/Peripheral Function Select 7" "GP-0-7,IP1[3:2]" bitfld.long 0x00 6. " GP_0[6] ,GPIO/Peripheral Function Select 6" "GP-0-6,IP1[1:0]" bitfld.long 0x00 5. " GP_0[5] ,GPIO/Peripheral Function Select 5" "GP-0-5,IP0[31:30]" bitfld.long 0x00 4. " GP_0[4] ,GPIO/Peripheral Function Select 4" "GP-0-4,IP0[29:28]" textline " " bitfld.long 0x00 3. " GP_0[3] ,GPIO/Peripheral Function Select 3" "GP-0-3,IP0[27:26]" bitfld.long 0x00 2. " GP_0[2] ,GPIO/Peripheral Function Select 2" "GP-0-2,IP0[25]" bitfld.long 0x00 1. " GP_0[1] ,GPIO/Peripheral Function Select 1" "GP-0-1,IP0[24]" bitfld.long 0x00 0. " GP_0[0] ,GPIO/Peripheral Function Select 0" "GP-0-0,IP0[23:22]" line.long 0x04 "GPSR_1,GPIO/Peripheral Function Select Register 1" bitfld.long 0x04 25. " GP_1[25] ,GPIO/Peripheral Function Select 25" "GP-1-25,DACK0" bitfld.long 0x04 24. " GP_1[24] ,GPIO/Peripheral Function Select 24" "GP-1-24,IP7[31]" bitfld.long 0x04 23. " GP_1[23] ,GPIO/Peripheral Function Select 23" "GP-1-23,IP4[1:0]" bitfld.long 0x04 22. " GP_1[22] ,GPIO/Peripheral Function Select 22" "GP-1-22,WE1_N" textline " " bitfld.long 0x04 21. " GP_1[21] ,GPIO/Peripheral Function Select 21" "GP-1-21,WE0_N" bitfld.long 0x04 20. " GP_1[20] ,GPIO/Peripheral Function Select 20" "GP-1-20,IP3[31]" bitfld.long 0x04 19. " GP_1[19] ,GPIO/Peripheral Function Select 19" "GP-1-19,IP3[30]" bitfld.long 0x04 18. " GP_1[18] ,GPIO/Peripheral Function Select 18" "GP-1-18,IP3[29:27]" textline " " bitfld.long 0x04 17. " GP_1[17] ,GPIO/Peripheral Function Select 17" "GP-1-17,IP3[26:24]" bitfld.long 0x04 16. " GP_1[16] ,GPIO/Peripheral Function Select 16" "GP-1-16,IP3[23:21]" bitfld.long 0x04 15. " GP_1[15] ,GPIO/Peripheral Function Select 15" "GP-1-15,IP3[20:18]" bitfld.long 0x04 14. " GP_1[14] ,GPIO/Peripheral Function Select 14" "GP-1-14,IP3[17:15]" textline " " bitfld.long 0x04 13. " GP_1[13] ,GPIO/Peripheral Function Select 13" "GP-1-13,IP3[14:13]" bitfld.long 0x04 12. " GP_1[12] ,GPIO/Peripheral Function Select 12" "GP-1-12,IP3[12]" bitfld.long 0x04 11. " GP_1[11] ,GPIO/Peripheral Function Select 11" "GP-1-11,IP3[11]" bitfld.long 0x04 10. " GP_1[10] ,GPIO/Peripheral Function Select 10" "GP-1-10,IP3[10]" textline " " bitfld.long 0x04 9. " GP_1[9] ,GPIO/Peripheral Function Select 9" "GP-1-9,IP3[9:8]" bitfld.long 0x04 8. " GP_1[8] ,GPIO/Peripheral Function Select 8" "GP-1-8,IP3[7:6]" bitfld.long 0x04 7. " GP_1[7] ,GPIO/Peripheral Function Select 7" "GP-1-7,IP3[5:4]" bitfld.long 0x04 6. " GP_1[6] ,GPIO/Peripheral Function Select 6" "GP-1-6,IP3[3:2]" textline " " bitfld.long 0x04 5. " GP_1[5] ,GPIO/Peripheral Function Select 5" "GP-1-5,IP3[1:0]" bitfld.long 0x04 4. " GP_1[4] ,GPIO/Peripheral Function Select 4" "GP-1-4,IP2[31:30]" bitfld.long 0x04 3. " GP_1[3] ,GPIO/Peripheral Function Select 3" "GP-1-3,IP2[29:27]" bitfld.long 0x04 2. " GP_1[2] ,GPIO/Peripheral Function Select 2" "GP-1-2,IP2[26:24]" textline " " bitfld.long 0x04 1. " GP_1[1] ,GPIO/Peripheral Function Select 1" "GP-1-1,IP2[23:21]" bitfld.long 0x04 0. " GP_1[0] ,GPIO/Peripheral Function Select 0" "GP-1-0,IP2[20:18]" line.long 0x08 "GPSR_2,GPIO/Peripheral Function Select Register 2" bitfld.long 0x08 31. " GP_2[31] ,GPIO/Peripheral Function Select 31" "GP-2-31,IP14[18:16]" bitfld.long 0x08 30. " GP_2[30] ,GPIO/Peripheral Function Select 30" "GP-2-30,IP6[5:4]" bitfld.long 0x08 29. " GP_2[29] ,GPIO/Peripheral Function Select 29" "GP-2-29,IP6[3:2]" bitfld.long 0x08 28. " GP_2[28] ,GPIO/Peripheral Function Select 28" "GP-2-28,IP6[1:0]" textline " " bitfld.long 0x08 27. " GP_2[27] ,GPIO/Peripheral Function Select 27" "GP-2-27,IP5[31:30]" bitfld.long 0x08 26. " GP_2[26] ,GPIO/Peripheral Function Select 26" "GP-2-26,IP5[29:28]" bitfld.long 0x08 25. " GP_2[25] ,GPIO/Peripheral Function Select 25" "GP-2-25,IP5[27:26]" bitfld.long 0x08 24. " GP_2[24] ,GPIO/Peripheral Function Select 24" "GP-2-24,IP5[25:24]" textline " " bitfld.long 0x08 23. " GP_2[23] ,GPIO/Peripheral Function Select 23" "GP-2-23,IP5[23:22]" bitfld.long 0x08 22. " GP_2[22] ,GPIO/Peripheral Function Select 22" "GP-2-22,IP5[21:20]" bitfld.long 0x08 21. " GP_2[21] ,GPIO/Peripheral Function Select 21" "GP-2-21,IP5[19:18]" bitfld.long 0x08 20. " GP_2[20] ,GPIO/Peripheral Function Select 20" "GP-2-20,IP5[17:16]" textline " " bitfld.long 0x08 19. " GP_2[19] ,GPIO/Peripheral Function Select 19" "GP-2-19,IP5[15:14]" bitfld.long 0x08 18. " GP_2[18] ,GPIO/Peripheral Function Select 18" "GP-2-18,IP5[13:12]" bitfld.long 0x08 17. " GP_2[17] ,GPIO/Peripheral Function Select 17" "GP-2-17,IP5[11:9]" bitfld.long 0x08 16. " GP_2[16] ,GPIO/Peripheral Function Select 16" "GP-2-16,IP5[8:6]" textline " " bitfld.long 0x08 15. " GP_2[15] ,GPIO/Peripheral Function Select 15" "GP-2-15,IP5[5:4]" bitfld.long 0x08 14. " GP_2[14] ,GPIO/Peripheral Function Select 14" "GP-2-14,IP5[3:2]" bitfld.long 0x08 13. " GP_2[13] ,GPIO/Peripheral Function Select 13" "GP-2-13,IP5[1:0]" bitfld.long 0x08 12. " GP_2[12] ,GPIO/Peripheral Function Select 12" "GP-2-12,IP4[31:30]" textline " " bitfld.long 0x08 11. " GP_2[11] ,GPIO/Peripheral Function Select 11" "GP-2-11,IP4[29:28]" bitfld.long 0x08 10. " GP_2[10] ,GPIO/Peripheral Function Select 10" "GP-2-10,IP4[27:26]" bitfld.long 0x08 9. " GP_2[9] ,GPIO/Peripheral Function Select 9" "GP-2-9,IP4[25:23]" bitfld.long 0x08 8. " GP_2[8] ,GPIO/Peripheral Function Select 8" "GP-2-8,IP4[22:20]" textline " " bitfld.long 0x08 7. " GP_2[7] ,GPIO/Peripheral Function Select 7" "GP-2-7,IP4[19:18]" bitfld.long 0x08 6. " GP_2[6] ,GPIO/Peripheral Function Select 6" "GP-2-6,IP4[17:16]" bitfld.long 0x08 5. " GP_2[5] ,GPIO/Peripheral Function Select 5" "GP-2-5,IP4[15:14]" bitfld.long 0x08 4. " GP_2[4] ,GPIO/Peripheral Function Select 4" "GP-2-4,IP4[13:12]" textline " " bitfld.long 0x08 3. " GP_2[3] ,GPIO/Peripheral Function Select 3" "GP-2-3,IP4[11:10]" bitfld.long 0x08 2. " GP_2[2] ,GPIO/Peripheral Function Select 2" "GP-2-2,IP4[9:8]" bitfld.long 0x08 1. " GP_2[1] ,GPIO/Peripheral Function Select 1" "GP-2-1,IP4[7:5]" bitfld.long 0x08 0. " GP_2[0] ,GPIO/Peripheral Function Select 0" "GP-2-0,IP4[4:2]" line.long 0x0C "GPSR_3,GPIO/Peripheral Function Select Register 3" bitfld.long 0x0C 31. " GP_3[31] ,GPIO/Peripheral Function Select 31" "GP-3-31,IP8[22:20]" bitfld.long 0x0C 30. " GP_3[30] ,GPIO/Peripheral Function Select 30" "GP-3-30,IP8[19:17]" bitfld.long 0x0C 29. " GP_3[29] ,GPIO/Peripheral Function Select 29" "GP-3-29,IP8[16:15]" bitfld.long 0x0C 28. " GP_3[28] ,GPIO/Peripheral Function Select 28" "GP-3-28,IP8[14:12]" textline " " bitfld.long 0x0C 27. " GP_3[27] ,GPIO/Peripheral Function Select 27" "GP-3-27,IP8[11:9]" bitfld.long 0x0C 26. " GP_3[26] ,GPIO/Peripheral Function Select 26" "GP-3-26,IP8[8:6]" bitfld.long 0x0C 25. " GP_3[25] ,GPIO/Peripheral Function Select 25" "GP-3-25,IP8[5:3]" bitfld.long 0x0C 24. " GP_3[24] ,GPIO/Peripheral Function Select 24" "GP-3-24,IP8[2:0]" textline " " bitfld.long 0x0C 23. " GP_3[23] ,GPIO/Peripheral Function Select 23" "GP-3-23,IP7[29:27]" bitfld.long 0x0C 22. " GP_3[22] ,GPIO/Peripheral Function Select 22" "GP-3-22,IP7[26:24]" bitfld.long 0x0C 21. " GP_3[21] ,GPIO/Peripheral Function Select 21" "GP-3-21,IP7[23:21]" bitfld.long 0x0C 20. " GP_3[20] ,GPIO/Peripheral Function Select 20" "GP-3-20,IP7[20:18]" textline " " bitfld.long 0x0C 19. " GP_3[19] ,GPIO/Peripheral Function Select 19" "GP-3-19,IP7[17:15]" bitfld.long 0x0C 18. " GP_3[18] ,GPIO/Peripheral Function Select 18" "GP-3-18,IP7[14:12]" bitfld.long 0x0C 17. " GP_3[17] ,GPIO/Peripheral Function Select 17" "GP-3-17,IP7[11:9]" bitfld.long 0x0C 16. " GP_3[16] ,GPIO/Peripheral Function Select 16" "GP-3-16,IP7[8:6]" textline " " bitfld.long 0x0C 15. " GP_3[15] ,GPIO/Peripheral Function Select 15" "GP-3-15,IP7[5:3]" bitfld.long 0x0C 14. " GP_3[14] ,GPIO/Peripheral Function Select 14" "GP-3-14,IP7[2:0]" bitfld.long 0x0C 13. " GP_3[13] ,GPIO/Peripheral Function Select 13" "GP-3-13,IP6[31:29]" bitfld.long 0x0C 12. " GP_3[12] ,GPIO/Peripheral Function Select 12" "GP-3-12,IP6[28:26]" textline " " bitfld.long 0x0C 11. " GP_3[11] ,GPIO/Peripheral Function Select 11" "GP-3-11,IP6[25:23]" bitfld.long 0x0C 10. " GP_3[10] ,GPIO/Peripheral Function Select 10" "GP-3-10,IP6[22:20]" bitfld.long 0x0C 9. " GP_3[9] ,GPIO/Peripheral Function Select 9" "GP-3-9,IP6[19:17]" bitfld.long 0x0C 8. " GP_3[8] ,GPIO/Peripheral Function Select 8" "GP-3-8,IP6[16]" textline " " bitfld.long 0x0C 7. " GP_3[7] ,GPIO/Peripheral Function Select 7" "GP-3-7,IP6[15]" bitfld.long 0x0C 6. " GP_3[6] ,GPIO/Peripheral Function Select 6" "GP-3-6,IP6[14]" bitfld.long 0x0C 5. " GP_3[5] ,GPIO/Peripheral Function Select 5" "GP-3-5,IP6[13]" bitfld.long 0x0C 4. " GP_3[4] ,GPIO/Peripheral Function Select 4" "GP-3-4,IP6[12]" textline " " bitfld.long 0x0C 3. " GP_3[3] ,GPIO/Peripheral Function Select 3" "GP-3-3,IP6[11]" bitfld.long 0x0C 2. " GP_3[2] ,GPIO/Peripheral Function Select 2" "GP-3-2,IP6[10]" bitfld.long 0x0C 1. " GP_3[1] ,GPIO/Peripheral Function Select 1" "GP-3-1,IP6[9]" bitfld.long 0x0C 0. " GP_3[0] ,GPIO/Peripheral Function Select 0" "GP-3-0,IP6[8]" line.long 0x10 "GPSR_4,GPIO/Peripheral Function Select Register 4" bitfld.long 0x10 31. " GP_4[31] ,GPIO/Peripheral Function Select 31" "GP-4-31,IP11[17:16]" bitfld.long 0x10 30. " GP_4[30] ,GPIO/Peripheral Function Select 30" "GP-4-30,IP11[15:14]" bitfld.long 0x10 29. " GP_4[29] ,GPIO/Peripheral Function Select 29" "GP-4-29,IP11[13:11]" bitfld.long 0x10 28. " GP_4[28] ,GPIO/Peripheral Function Select 28" "GP-4-28,IP11[10:8]" textline " " bitfld.long 0x10 27. " GP_4[27] ,GPIO/Peripheral Function Select 27" "GP-4-27,IP11[7:6]" bitfld.long 0x10 26. " GP_4[26] ,GPIO/Peripheral Function Select 26" "GP-4-26,IP11[5:3]" bitfld.long 0x10 25. " GP_4[25] ,GPIO/Peripheral Function Select 25" "GP-4-25,IP11[2:0]" bitfld.long 0x10 24. " GP_4[24] ,GPIO/Peripheral Function Select 24" "GP-4-24,IP10[31:30]" textline " " bitfld.long 0x10 23. " GP_4[23] ,GPIO/Peripheral Function Select 23" "GP-4-23,IP10[29:27]" bitfld.long 0x10 22. " GP_4[22] ,GPIO/Peripheral Function Select 22" "GP-4-22,IP10[26:24]" bitfld.long 0x10 21. " GP_4[21] ,GPIO/Peripheral Function Select 21" "GP-4-21,IP10[23:21]" bitfld.long 0x10 20. " GP_4[20] ,GPIO/Peripheral Function Select 20" "GP-4-20,IP10[20:18]" textline " " bitfld.long 0x10 19. " GP_4[19] ,GPIO/Peripheral Function Select 19" "GP-4-19,IP10[17:15]" bitfld.long 0x10 18. " GP_4[18] ,GPIO/Peripheral Function Select 18" "GP-4-18,IP10[14:12]" bitfld.long 0x10 17. " GP_4[17] ,GPIO/Peripheral Function Select 17" "GP-4-17,IP10[11:9]" bitfld.long 0x10 16. " GP_4[16] ,GPIO/Peripheral Function Select 16" "GP-4-16,IP10[8:6]" textline " " bitfld.long 0x10 15. " GP_4[15] ,GPIO/Peripheral Function Select 15" "GP-4-15,IP10[5:3]" bitfld.long 0x10 14. " GP_4[14] ,GPIO/Peripheral Function Select 14" "GP-4-14,IP10[2:0]" bitfld.long 0x10 13. " GP_4[13] ,GPIO/Peripheral Function Select 13" "GP-4-13,IP9[30:28]" bitfld.long 0x10 12. " GP_4[12] ,GPIO/Peripheral Function Select 12" "GP-4-12,IP9[27:25]" textline " " bitfld.long 0x10 11. " GP_4[11] ,GPIO/Peripheral Function Select 11" "GP-4-11,IP9[24:22]" bitfld.long 0x10 10. " GP_4[10] ,GPIO/Peripheral Function Select 10" "GP-4-10,IP9[21:19]" bitfld.long 0x10 9. " GP_4[9] ,GPIO/Peripheral Function Select 9" "GP-4-9,IP9[18:17]" bitfld.long 0x10 8. " GP_4[8] ,GPIO/Peripheral Function Select 8" "GP-4-8,IP9[16:15]" textline " " bitfld.long 0x10 7. " GP_4[7] ,GPIO/Peripheral Function Select 7" "GP-4-7,IP9[14:12]" bitfld.long 0x10 6. " GP_4[6] ,GPIO/Peripheral Function Select 6" "GP-4-6,IP9[11:9]" bitfld.long 0x10 5. " GP_4[5] ,GPIO/Peripheral Function Select 5" "GP-4-5,IP9[8:6]" bitfld.long 0x10 4. " GP_4[4] ,GPIO/Peripheral Function Select 4" "GP-4-4,IP9[5:3]" textline " " bitfld.long 0x10 3. " GP_4[3] ,GPIO/Peripheral Function Select 3" "GP-4-3,IP9[2:0]" bitfld.long 0x10 2. " GP_4[2] ,GPIO/Peripheral Function Select 2" "GP-4-2,IP8[31:29]" bitfld.long 0x10 1. " GP_4[1] ,GPIO/Peripheral Function Select 1" "GP-4-1,IP8[28:26]" bitfld.long 0x10 0. " GP_4[0] ,GPIO/Peripheral Function Select 0" "GP-4-0,IP8[25:23]" line.long 0x14 "GPSR_5,GPIO/Peripheral Function Select Register 5" bitfld.long 0x14 27. " GP_5[27] ,GPIO/Peripheral Function Select 27" "GP-5-27,USB2_OVC" bitfld.long 0x14 26. " GP_5[26] ,GPIO/Peripheral Function Select 26" "GP-5-26,USB2_PWEN" bitfld.long 0x14 25. " GP_5[25] ,GPIO/Peripheral Function Select 25" "GP-5-25,USB0_OVC" bitfld.long 0x14 24. " GP_5[24] ,GPIO/Peripheral Function Select 24" "GP-5-24,USB0_PWEN" textline " " bitfld.long 0x14 23. " GP_5[23] ,GPIO/Peripheral Function Select 23" "GP-5-23,IP13[26:24]" bitfld.long 0x14 22. " GP_5[22] ,GPIO/Peripheral Function Select 22" "GP-5-22,IP13[23:21]" bitfld.long 0x14 21. " GP_5[21] ,GPIO/Peripheral Function Select 21" "GP-5-21,IP13[20:18]" bitfld.long 0x14 20. " GP_5[20] ,GPIO/Peripheral Function Select 20" "GP-5-20,IP13[17:15]" textline " " bitfld.long 0x14 19. " GP_5[19] ,GPIO/Peripheral Function Select 19" "GP-5-19,IP13[14:12]" bitfld.long 0x14 18. " GP_5[18] ,GPIO/Peripheral Function Select 18" "GP-5-18,IP13[11:9]" bitfld.long 0x14 17. " GP_5[17] ,GPIO/Peripheral Function Select 17" "GP-5-17,IP13[8:6]" bitfld.long 0x14 16. " GP_5[16] ,GPIO/Peripheral Function Select 16" "GP-5-16,IP13[5:3]" textline " " bitfld.long 0x14 15. " GP_5[15] ,GPIO/Peripheral Function Select 15" "GP-5-15,IP13[2:0]" bitfld.long 0x14 14. " GP_5[14] ,GPIO/Peripheral Function Select 14" "GP-5-14,IP12[29:27]" bitfld.long 0x14 13. " GP_5[13] ,GPIO/Peripheral Function Select 13" "GP-5-13,IP12[26:24]" bitfld.long 0x14 12. " GP_5[12] ,GPIO/Peripheral Function Select 12" "GP-5-12,IP12[23:21]" textline " " bitfld.long 0x14 11. " GP_5[11] ,GPIO/Peripheral Function Select 11" "GP-5-11,IP12[20:18]" bitfld.long 0x14 10. " GP_5[10] ,GPIO/Peripheral Function Select 10" "GP-5-10,IP12[17:15]" bitfld.long 0x14 9. " GP_5[9] ,GPIO/Peripheral Function Select 9" "GP-5-9,IP12[14:13]" bitfld.long 0x14 8. " GP_5[8] ,GPIO/Peripheral Function Select 8" "GP-5-8,IP12[12:11]" textline " " bitfld.long 0x14 7. " GP_5[7] ,GPIO/Peripheral Function Select 7" "GP-5-7,IP12[10:9]" bitfld.long 0x14 6. " GP_5[6] ,GPIO/Peripheral Function Select 6" "GP-5-6,IP12[8:6]" bitfld.long 0x14 5. " GP_5[5] ,GPIO/Peripheral Function Select 5" "GP-5-5,IP12[5:3]" bitfld.long 0x14 4. " GP_5[4] ,GPIO/Peripheral Function Select 4" "GP-5-4,IP12[2:0]" textline " " bitfld.long 0x14 3. " GP_5[3] ,GPIO/Peripheral Function Select 3" "GP-5-3,IP11[29:27]" bitfld.long 0x14 2. " GP_5[2] ,GPIO/Peripheral Function Select 2" "GP-5-2,IP11[26:24]" bitfld.long 0x14 1. " GP_5[1] ,GPIO/Peripheral Function Select 1" "GP-5-1,IP11[23:21]" bitfld.long 0x14 0. " GP_5[0] ,GPIO/Peripheral Function Select 0" "GP-5-0,IP11[20:18]" line.long 0x18 "GPSR_6,GPIO/Peripheral Function Select Register 6" bitfld.long 0x18 25. " GP_6[25] ,GPIO/Peripheral Function Select 25" "GP-6-25,IP0[21:20]" bitfld.long 0x18 24. " GP_6[24] ,GPIO/Peripheral Function Select 24" "GP-6-24,IP0[19:18]" bitfld.long 0x18 23. " GP_6[23] ,GPIO/Peripheral Function Select 23" "GP-6-23,IP0[17]" bitfld.long 0x18 22. " GP_6[22] ,GPIO/Peripheral Function Select 22" "GP-6-22,IP0[16]" textline " " bitfld.long 0x18 21. " GP_6[21] ,GPIO/Peripheral Function Select 21" "GP-6-21,IP0[15]" bitfld.long 0x18 20. " GP_6[20] ,GPIO/Peripheral Function Select 20" "GP-6-20,IP0[14]" bitfld.long 0x18 19. " GP_6[19] ,GPIO/Peripheral Function Select 19" "GP-6-19,IP0[13]" bitfld.long 0x18 18. " GP_6[18] ,GPIO/Peripheral Function Select 18" "GP-6-18,IP0[12]" textline " " bitfld.long 0x18 17. " GP_6[17] ,GPIO/Peripheral Function Select 17" "GP-6-17,IP0[11]" bitfld.long 0x18 16. " GP_6[16] ,GPIO/Peripheral Function Select 16" "GP-6-16,IP0[10]" bitfld.long 0x18 15. " GP_6[15] ,GPIO/Peripheral Function Select 15" "GP-6-15,IP0[9:8]" bitfld.long 0x18 14. " GP_6[14] ,GPIO/Peripheral Function Select 14" "GP-6-14,IP0[0]" textline " " bitfld.long 0x18 13. " GP_6[13] ,GPIO/Peripheral Function Select 13" "GP-6-13,SD1_DATA3" bitfld.long 0x18 12. " GP_6[12] ,GPIO/Peripheral Function Select 12" "GP-6-12,SD1_DATA2" bitfld.long 0x18 11. " GP_6[11] ,GPIO/Peripheral Function Select 11" "GP-6-11,SD1_DATA1" bitfld.long 0x18 10. " GP_6[10] ,GPIO/Peripheral Function Select 10" "GP-6-10,SD1_DATA0" textline " " bitfld.long 0x18 9. " GP_6[9] ,GPIO/Peripheral Function Select 9" "GP-6-9,SD1_CMD" bitfld.long 0x18 8. " GP_6[8] ,GPIO/Peripheral Function Select 8" "GP-6-8,SD1_CLK" bitfld.long 0x18 7. " GP_6[7] ,GPIO/Peripheral Function Select 7" "GP-6-7,SD0_WP" bitfld.long 0x18 6. " GP_6[6] ,GPIO/Peripheral Function Select 6" "GP-6-6,SD0_CD" textline " " bitfld.long 0x18 5. " GP_6[5] ,GPIO/Peripheral Function Select 5" "GP-6-5,SD0_DATA3" bitfld.long 0x18 4. " GP_6[4] ,GPIO/Peripheral Function Select 4" "GP-6-4,SD0_DATA2" bitfld.long 0x18 3. " GP_6[3] ,GPIO/Peripheral Function Select 3" "GP-6-3,SD0_DATA1" bitfld.long 0x18 2. " GP_6[2] ,GPIO/Peripheral Function Select 2" "GP-6-2,SD0_DATA0" textline " " bitfld.long 0x18 1. " GP_6[1] ,GPIO/Peripheral Function Select 1" "GP-6-1,SD0_CMD" bitfld.long 0x18 0. " GP_6[0] ,GPIO/Peripheral Function Select 0" "GP-6-0,SD0_CLK" tree.end tree "IPSR_n Registers" width 9. group.long 0x20++0x37 line.long 0x00 "IPSR_0,Peripheral Function Select Register 0" bitfld.long 0x00 30.--31. " IP_0[31:30] ,Peripheral Function Select" "D5,SCIF4_RXD_B,I2C0_SCL_D,?..." bitfld.long 0x00 28.--29. " IP_0[29:28] ,Peripheral Function Select" "D4,I2C3_SDA_B,SCIF5_TXD_B,?..." bitfld.long 0x00 26.--27. " IP_0[27:26] ,Peripheral Function Select" "D3,I2C3_SCL_B,SCIF5_RXD_B,?..." textline " " bitfld.long 0x00 25. " IP_0[25] ,Peripheral Function Select" "D2,SCIFA3_TXD_B" bitfld.long 0x00 24. " IP_0[24] ,Peripheral Function Select" "D1,SCIFA3_RXD_B" bitfld.long 0x00 22.--23. " IP_0[23:22] ,Peripheral Function Select" "D0,SCIFA3_SCK_B,IRQ4," textline " " bitfld.long 0x00 20.--21. " IP_0[21:20] ,Peripheral Function Select" "MMC_D7,SCIF0_TXD,I2C2_SDA_B,CAN1_TX" bitfld.long 0x00 18.--19. " IP_0[19:18] ,Peripheral Function Select" "MMC_D6,SCIF0_RXD,I2C2_SCL_B,CAN1_RX" bitfld.long 0x00 17. " IP_0[17] ,Peripheral Function Select" "MMC_D5,SD2_WP" textline " " bitfld.long 0x00 16. " IP_0[16] ,Peripheral Function Select" "MMC_D4,SD2_CD" bitfld.long 0x00 15. " IP_0[15] ,Peripheral Function Select" "MMC_D3,SD2_DATA3" bitfld.long 0x00 14. " IP_0[14] ,Peripheral Function Select" "MMC_D2,SD2_DATA2" textline " " bitfld.long 0x00 13. " IP_0[13] ,Peripheral Function Select" "MMC_D1,SD2_DATA1" bitfld.long 0x00 12. " IP_0[12] ,Peripheral Function Select" "MMC_D0,SD2_DATA0" bitfld.long 0x00 11. " IP_0[11] ,Peripheral Function Select" "MMC_CMD,SD2_CMD" textline " " bitfld.long 0x00 10. " IP_0[10] ,Peripheral Function Select" "MMC_CLK,SD2_CLK" bitfld.long 0x00 8.--9. " IP_0[9:8] ,Peripheral Function Select" "SD1_WP,IRQ7,CAN0_TX,?..." bitfld.long 0x00 0. " IP_0[0] ,Peripheral Function Select" "SD1_CD,CAN0_RX" line.long 0x04 "IPSR_1,Peripheral Function Select Register 1" bitfld.long 0x04 30.--31. " IP_1[31:30] ,Peripheral Function Select" "A6,SCIFB0_CTS_N,SCIFA4_RXD_B,TPUTO2_C" bitfld.long 0x04 28.--29. " IP_1[29:28] ,Peripheral Function Select" "A5,SCIFB0_RXD,PWM4_B,TPUTO3_C" bitfld.long 0x04 27. " IP_1[27] ,Peripheral Function Select" "A4,SCIFB0_TXD" textline " " bitfld.long 0x04 26. " IP_1[26] ,Peripheral Function Select" "A3,SCIFB0_SCK" bitfld.long 0x04 24. " IP_1[24] ,Peripheral Function Select" "A1,SCIFB1_TXD" bitfld.long 0x04 22.--23. " IP_1[23:22] ,Peripheral Function Select" "A0,SCIFB1_SCK,PWM3_B," textline " " bitfld.long 0x04 20.--21. " IP_1[21:20] ,Peripheral Function Select" "D15,SCIFA1_TXD,IIC0_SDA_B(I2C5)," bitfld.long 0x04 18.--19. " IP_1[19:18] ,Peripheral Function Select" "D14,SCIFA1_RXD,IIC0_SCL_B(I2C5)," bitfld.long 0x04 15.--17. " IP_1[17:15] ,Peripheral Function Select" "D13,SCIFA1_SCK,TANS1,PWM2_C,TCLK2_B,?..." textline " " bitfld.long 0x04 13.--14. " IP_1[14:13] ,Peripheral Function Select" "D12,HSCIF2_HRTS_N,SCIF1_TXD_C,I2C1_SDA_D" bitfld.long 0x04 11.--12. " IP_1[12:11] ,Peripheral Function Select" "D11,HSCIF2_HCTS_N,SCIF1_RXD_C,I2C1_SCL_D" bitfld.long 0x04 8.--10. " IP_1[10:8] ,Peripheral Function Select" "D10,HSCIF2_HSCK,SCIF1_SCK_C,IRQ6,PWM5_C,?..." textline " " bitfld.long 0x04 6.--7. " IP_1[7:6] ,Peripheral Function Select" "D9,HSCIF2_HTX,I2C1_SDA_B," bitfld.long 0x04 4.--5. " IP_1[5:4] ,Peripheral Function Select" "D8,HSCIF2_HRX,I2C1_SCL_B," bitfld.long 0x04 2.--3. " IP_1[3:2] ,Peripheral Function Select" "D7,IRQ3,TCLK1,PWM6_B" textline " " bitfld.long 0x04 0.--1. " IP_1[1:0] ,Peripheral Function Select" "D6,SCIF4_TXD_B,I2C0_SDA_D," line.long 0x08 "IPSR_2,Peripheral Function Select Register 2" bitfld.long 0x08 30.--31. " IP_2[31:30] ,Peripheral Function Select" "A20,SPCLK,MOUT1,?..." bitfld.long 0x08 27.--29. " IP_2[29:27] ,Peripheral Function Select" "A19,MSIOF2_SS2,PWM4,TPUTO2,MOUT0,?..." bitfld.long 0x08 24.--26. " IP_2[26:24] ,Peripheral Function Select" "A18,MSIOF2_SS1,SCIF4_TXD_E,CAN1_TX_B,AVB_AVTP_MATCH_B,?..." textline " " bitfld.long 0x08 21.--23. " IP_2[23:21] ,Peripheral Function Select" "A17,MSIOF2_SYNC,SCIF4_RXD_E,CAN1_RX_B,AVB_AVTP_CAPTURE_B,?..." bitfld.long 0x08 18.--20. " IP_2[20:18] ,Peripheral Function Select" "A16,MSIOF2_SCK,HSCIF0_HSCK_B,SPEEDIN,VSP,CAN_CLK_C,TPUTO2_B,?..." bitfld.long 0x08 16.--17. " IP_2[17:16] ,Peripheral Function Select" "A15,MSIOF2_TXD,HSCIF0_HTX_B,DACK1" textline " " bitfld.long 0x08 14.--15. " IP_2[15:14] ,Peripheral Function Select" "A14,MSIOF2_RXD,HSCIF0_HRX_B,DREQ1_N" bitfld.long 0x08 12.--13. " IP_2[13:12] ,Peripheral Function Select" "A13,MSIOF1_SS2,SCIFA5_TXD_B,?..." bitfld.long 0x08 10.--11. " IP_2[11:10] ,Peripheral Function Select" "A12,MSIOF1_SS1,SCIFA5_RXD_B,?..." textline " " bitfld.long 0x08 8.--9. " IP_2[9:8] ,Peripheral Function Select" "A11,MSIOF1_SYNC,IIC1_SDA_B(I2C6),?..." bitfld.long 0x08 6.--7. " IP_2[7:6] ,Peripheral Function Select" "A10,MSIOF1_SCK,IIC1_SCL_B(I2C6),?..." bitfld.long 0x08 4.--5. " IP_2[5:4] ,Peripheral Function Select" "A9,MSIOF1_TXD,SCIFA0_TXD_B," textline " " bitfld.long 0x08 2.--3. " IP_2[3:2] ,Peripheral Function Select" "A8,MSIOF1_RXD,SCIFA0_RXD_B," bitfld.long 0x08 0.--1. " IP_2[1:0] ,Peripheral Function Select" "A7,SCIFB0_RTS_N,SCIFA4_TXD_B," line.long 0x0C "IPSR_3,Peripheral Function Select Register 3" bitfld.long 0x0C 31. " IP_3[31] ,Peripheral Function Select" "RD_WR_N,ATAG1_N" bitfld.long 0x0C 30. " IP_3[30] ,Peripheral Function Select" "RD_N,ATACS11_N" bitfld.long 0x0C 27.--29. " IP_3[29:27] ,Peripheral Function Select" "BS_N,DRACK0,PWM1_C,TPUTO0_C,ATACS01_N,MTS_N_B,?..." textline " " bitfld.long 0x0C 24.--26. " IP_3[26:24] ,Peripheral Function Select" "EX_CS5_N,SCIFA2_TXD,I2C2_SDA_E,TS_SPSYNC_B,RIF0_D1,FMIN,SCIFB2_RTS_N,STM_N_B,?..." bitfld.long 0x0C 21.--23. " IP_3[23:21] ,Peripheral Function Select" "EX_CS4_N,SCIFA2_RXD,I2C2_SCL_E,TS_SDEN_B,RIF0_D0,FMCLK,SCIFB2_CTS_N,SCKZ_B,?..." bitfld.long 0x0C 18.--20. " IP_3[20:18] ,Peripheral Function Select" "EX_CS3_N,SCIFA2_SCK,SCIF4_TXD_C,TS_SCK_B,RIF0_CLK,BPFCLK,SCIFB2_SCK,MDATA_B,?..." textline " " bitfld.long 0x0C 15.--17. " IP_3[17:15] ,Peripheral Function Select" "EX_CS2_N,PWM0,SCIF4_RXD_C,TS_SDATA_B,RIF0_SYNC,TPUTO3,SCIFB2_TXD,SDATA_B,?..." bitfld.long 0x0C 13.--14. " IP_3[14:13] ,Peripheral Function Select" "EX_CS1_N,TPUTO3_B,SCIFB2_RXD,VI1_DATA11,?..." bitfld.long 0x0C 12. " IP_3[12] ,Peripheral Function Select" "EX_CS0_N,VI1_DATA10" textline " " bitfld.long 0x0C 11. " IP_3[11] ,Peripheral Function Select" "CS1_N_A26,VI1_DATA9" bitfld.long 0x0C 10. " IP_3[10] ,Peripheral Function Select" "CS0_N,VI1_DATA8" bitfld.long 0x0C 8.--9. " IP_3[9:8] ,Peripheral Function Select" "A25,SSL,ATARD1_N,?..." textline " " bitfld.long 0x0C 6.--7. " IP_3[7:6] ,Peripheral Function Select" "A24,IO3,EX_WAIT2,?..." bitfld.long 0x0C 4.--5. " IP_3[5:4] ,Peripheral Function Select" "A23,IO2,MOUT6,ATAWR1_N,?..." bitfld.long 0x0C 2.--3. " IP_3[3:2] ,Peripheral Function Select" "A22,MISO_IO1,MOUT5,ATADIR1_N" textline " " bitfld.long 0x0C 0.--1. " IP_3[1:0] ,Peripheral Function Select" "A21,MOSI_IO0,MOUT2," line.long 0x10 "IPSR_4,Peripheral Function Select Register 4" bitfld.long 0x10 30.--31. " IP_4[31:30] ,Peripheral Function Select" "DU0_DG4,LCDOUT12,CC50_STATE12," bitfld.long 0x10 28.--29. " IP_4[29:28] ,Peripheral Function Select" "DU0_DG3,LCDOUT11,CC50_STATE11," bitfld.long 0x10 26.--27. " IP_4[27:26] ,Peripheral Function Select" "DU0_DG2,LCDOUT10,CC50_STATE10," textline " " bitfld.long 0x10 23.--25. " IP_4[25:23] ,Peripheral Function Select" "DU0_DG1,LCDOUT9,SCIFA0_TXD_C,I2C3_SDA_D,CC50_STATE9,?..." bitfld.long 0x10 20.--22. " IP_4[22:20] ,Peripheral Function Select" "DU0_DG0,LCDOUT8,SCIFA0_RXD_C,I2C3_SCL_D,CC50_STATE8,?..." bitfld.long 0x10 18.--19. " IP_4[19:18] ,Peripheral Function Select" "DU0_DR7,LCDOUT23,CC50_STATE7," textline " " bitfld.long 0x10 16.--17. " IP_4[17:16] ,Peripheral Function Select" "DU0_DR6,LCDOUT22,CC50_STATE6," bitfld.long 0x10 14.--15. " IP_4[15:14] ,Peripheral Function Select" "DU0_DR5,LCDOUT21,CC50_STATE5," bitfld.long 0x10 12.--13. " IP_4[13:12] ,Peripheral Function Select" "DU0_DR4,LCDOUT20,CC50_STATE4," textline " " bitfld.long 0x10 10.--11. " IP_4[10:10] ,Peripheral Function Select" "DU0_DR3,LCDOUT19,CC50_STATE3," bitfld.long 0x10 8.--9. " IP_4[9:8] ,Peripheral Function Select" "DU0_DR2,LCDOUT18,CC50_STATE2," bitfld.long 0x10 5.--7. " IP_4[7:5] ,Peripheral Function Select" "DU0_DR1,LCDOUT17,SCIF5_TXD_C,I2C2_SDA_D,CC50_STATE1,?..." textline " " bitfld.long 0x10 2.--4. " IP_4[4:2] ,Peripheral Function Select" "DU0_DR0,LCDOUT16,SCIF5_RXD_C,I2C2_SCL_D,CC50_STATE0,?..." bitfld.long 0x10 0.--1. " IP_4[1:0] ,Peripheral Function Select" "EX_WAIT0,CAN_CLK_B,SCIF_CLK,PWMFSW0" line.long 0x14 "IPSR_5,Peripheral Function Select Register 5" bitfld.long 0x14 30.--31. " IP_5[31:30] ,Peripheral Function Select" "DU0_EXHSYNC_DU0_HSYNC,QSTH_QHS,CC50_STATE27," bitfld.long 0x14 28.--29. " IP_5[29:28] ,Peripheral Function Select" "DU0_DOTCLKOUT1,QSTVB_QVE,CC50_STATE26," bitfld.long 0x14 26.--27. " IP_5[27:26] ,Peripheral Function Select" "DU0_DOTCLKOUT0,QCLK,CC50_STATE25," textline " " bitfld.long 0x14 24.--25. " IP_5[25:24] ,Peripheral Function Select" "DU0_DOTCLKIN,QSTVA_QVS,CC50_STATE24," bitfld.long 0x14 22.--23. " IP_5[23:22] ,Peripheral Function Select" "DU0_DB7,LCDOUT7,CC50_STATE23," bitfld.long 0x14 20.--21. " IP_5[21:20] ,Peripheral Function Select" "DU0_DB6,LCDOUT6,CC50_STATE22," textline " " bitfld.long 0x14 18.--19. " IP_5[19:18] ,Peripheral Function Select" "DU0_DB5,LCDOUT5,CC50_STATE21," bitfld.long 0x14 16.--17. " IP_5[17:16] ,Peripheral Function Select" "DU0_DB4,LCDOUT4,CC50_STATE20," bitfld.long 0x14 14.--15. " IP_5[15:14] ,Peripheral Function Select" "DU0_DB3,LCDOUT3,CC50_STATE19," textline " " bitfld.long 0x14 12.--13. " IP_5[13:12] ,Peripheral Function Select" "DU0_DB2,LCDOUT2,CC50_STATE18," bitfld.long 0x14 9.--11. " IP_5[11:9] ,Peripheral Function Select" "DU0_DB1,LCDOUT1,SCIFA4_TXD_C,I2C4_SDA_D,CAN0_TX_C,CC50_STATE17,?..." bitfld.long 0x14 6.--8. " IP_5[8:6] ,Peripheral Function Select" "DU0_DB0,LCDOUT0,SCIFA4_RXD_C,I2C4_SCL_D,CAN0_RX_C,CC50_STATE16,?..." textline " " bitfld.long 0x14 4.--5. " IP_5[5:4] ,Peripheral Function Select" "DU0_DG7,LCDOUT15,CC50_STATE15," bitfld.long 0x14 2.--3. " IP_5[3:2] ,Peripheral Function Select" "DU0_DG6,LCDOUT14,CC50_STATE14," bitfld.long 0x14 0.--1. " IP_5[1:0] ,Peripheral Function Select" "DU0_DG5,LCDOUT13,CC50_STATE13," line.long 0x18 "IPSR_6,Peripheral Function Select Register 6" bitfld.long 0x18 29.--31. " IP_6[31:29] ,Peripheral Function Select" "ETH_MDIO,VI0_G0,MSIOF2_RXD_B,I2C5_SCL_D,AVB_TX_CLK,ADIDATA,AD_DI,?..." bitfld.long 0x18 26.--28. " IP_6[28:26] ,Peripheral Function Select" "VI0_VSYNC_N,SCIF0_TXD_B,I2C0_SDA_C,AUDIO_CLKOUT_B,AVB_TX_EN,?..." bitfld.long 0x18 23.--25. " IP_6[25:23] ,Peripheral Function Select" "VI0_HSYNC_N,SCIF0_RXD_B,I2C0_SCL_C,IERX_C,AVB_COL,?..." textline " " bitfld.long 0x18 20.--22. " IP_6[22:20] ,Peripheral Function Select" "VI0_FIELD,I2C3_SDA,SCIFA5_TXD_C,IECLK_C,AVB_RX_ER,?..." bitfld.long 0x18 17.--19. " IP_6[19:17] ,Peripheral Function Select" "VI0_CLKENB,I2C3_SCL,SCIFA5_RXD_C,IETX_C,AVB_RXD7,?..." bitfld.long 0x18 16. " IP_6[16] ,Peripheral Function Select" "VI0_DATA7_VI0_B7,AVB_RXD6" textline " " bitfld.long 0x18 15. " IP_6[15] ,Peripheral Function Select" "VI0_DATA6_VI0_B6,AVB_RXD5" bitfld.long 0x18 14. " IP_6[14] ,Peripheral Function Select" "VI0_DATA5_VI0_B5,AVB_RXD4" bitfld.long 0x18 13. " IP_6[13] ,Peripheral Function Select" "VI0_DATA4_VI0_B4,AVB_RXD3" textline " " bitfld.long 0x18 12. " IP_6[12] ,Peripheral Function Select" "VI0_DATA3_VI0_B3,AVB_RXD2" bitfld.long 0x18 11. " IP_6[11] ,Peripheral Function Select" "VI0_DATA2_VI0_B2,AVB_RXD1" bitfld.long 0x18 10. " IP_6[10] ,Peripheral Function Select" "VI0_DATA1_VI0_B1,AVB_RXD0" textline " " bitfld.long 0x18 9. " IP_6[9] ,Peripheral Function Select" "VI0_DATA0_VI0_B0,AVB_RX_DV" bitfld.long 0x18 8. " IP_6[8] ,Peripheral Function Select" "VI0_CLK,AVB_RX_CLK" bitfld.long 0x18 6.--7. " IP_6[7:6] ,Peripheral Function Select" "DU0_CDE,QPOLB,CC50_STATE31," textline " " bitfld.long 0x18 4.--5. " IP_6[5:4] ,Peripheral Function Select" "DU0_DISP,QPOLA,CC50_STATE30," bitfld.long 0x18 2.--3. " IP_6[3:2] ,Peripheral Function Select" "DU0_EXODDF_DU0_ODDF_DISP_CDE,QCPV_QDE,CC50_STATE29," bitfld.long 0x18 0.--1. " IP_6[1:0] ,Peripheral Function Select" "DU0_EXVSYNC_DU0_VSYNC,QSTB_QHE,CC50_STATE28," line.long 0x1C "IPSR_7,Peripheral Function Select Register 7" bitfld.long 0x1C 31. " IP_7[31] ,Peripheral Function Select" "DREQ0_N,SCIFB1_RXD" bitfld.long 0x1C 27.--29. " IP_7[29:27] ,Peripheral Function Select" "ETH_TXD0,VI0_R2,SCIF3_RXD_B,I2C4_SCL_E,AVB_GTX_CLK,SSI_WS6_B,?..." bitfld.long 0x1C 24.--26. " IP_7[26:24] ,Peripheral Function Select" "ETH_MAGIC,VI0_R1,SCIF3_SCK_B,AVB_TX_ER,SSI_SCK6_B,?..." textline " " bitfld.long 0x1C 21.--23. " IP_7[23:21] ,Peripheral Function Select" "ETH_TX_EN,VI0_R0,SCIF2_TXD_C,I2C6_SDA_D,AVB_TXD7,SSI_SDATA5_B,?..." bitfld.long 0x1C 18.--20. " IP_7[20:18] ,Peripheral Function Select" "ETH_TXD1,VI0_G7,SCIF2_RXD_C,I2C6_SCL_D,AVB_TXD6,SSI_WS5_B,?..." bitfld.long 0x1C 15.--17. " IP_7[17:15] ,Peripheral Function Select" "ETH_REFCLK,VI0_G6,SCIF2_SCK_C,AVB_TXD5,SSI_SCK5_B,?..." textline " " bitfld.long 0x1C 12.--14. " IP_7[14:12] ,Peripheral Function Select" "ETH_LINK,VI0_G5,MSIOF2_SS2_B,SCIF4_TXD_D,AVB_TXD4,ADICHS2,?..." bitfld.long 0x1C 9.--11. " IP_7[11:9] ,Peripheral Function Select" "ETH_RXD1,VI0_G4,MSIOF2_SS1_B,SCIF4_RXD_D,AVB_TXD3,ADICHS1,?..." bitfld.long 0x1C 6.--8. " IP_7[8:6] ,Peripheral Function Select" "ETH_RXD0,VI0_G3,MSIOF2_SYNC_B,CAN0_TX_B,AVB_TXD2,ADICHS0,AD_NCS_N,?..." textline " " bitfld.long 0x1C 3.--5. " IP_7[5:3] ,Peripheral Function Select" "ETH_RX_ER,VI0_G2,MSIOF2_SCK_B,CAN0_RX_B,AVB_TXD1,ADICLK,AD_CLK,?..." bitfld.long 0x1C 0.--2. " IP_7[2:0] ,Peripheral Function Select" "ETH_CRS_DV,VI0_G1,MSIOF2_TXD_B,I2C5_SDA_D,AVB_TXD0,ADICS_SAMP,AD_DO,?..." line.long 0x20 "IPSR_8,Peripheral Function Select Register" bitfld.long 0x20 29.--31. " IP_8[31:29] ,Peripheral Function Select" "MSIOF0_RXD,SCIF5_RXD,I2C2_SCL_C,DU1_DR2,RIF1_D0_B,TS_SDEN_D,FMCLK_C,RDS_CLK" bitfld.long 0x20 26.--28. " IP_8[28:26] ,Peripheral Function Select" "I2C1_SDA,SCIF4_TXD,IRQ5,DU1_DR1,RIF1_CLK_B,TS_SCK_D,BPFCLK_C," bitfld.long 0x20 23.--25. " IP_8[25:23] ,Peripheral Function Select" "I2C1_SCL,SCIF4_RXD,PWM5_B,DU1_DR0,RIF1_SYNC_B,TS_SDATA_D,TPUTO1_B," textline " " bitfld.long 0x20 20.--22. " IP_8[22:20] ,Peripheral Function Select" "I2C0_SDA,SCIF0_TXD_C,TPUTO0,CAN_CLK,DVC_MUTE,CAN1_TX_D,?..." bitfld.long 0x20 17.--19. " IP_8[19:17] ,Peripheral Function Select" "I2C0_SCL,SCIF0_RXD_C,PWM5,TCLK1_B,AVB_GTXREFCLK,CAN1_RX_D,TPUTO0_B," bitfld.long 0x20 15.--16. " IP_8[16:15] ,Peripheral Function Select" "HSCIF0_HSCK,SCIF_CLK_B,AVB_CRS,AUDIO_CLKC_B" textline " " bitfld.long 0x20 12.--14. " IP_8[14:12] ,Peripheral Function Select" "HSCIF0_HRTS_N,VI0_R7,SCIF0_TXD_D,I2C0_SDA_E,AVB_PHY_INT,SSI_SDATA8_B,?..." bitfld.long 0x20 9.--11. " IP_8[11:9] ,Peripheral Function Select" "HSCIF0_HCTS_N,VI0_R6,SCIF0_RXD_D,I2C0_SCL_E,AVB_MAGIC,SSI_SDATA7_B,?..." bitfld.long 0x20 6.--8. " IP_8[8:6] ,Peripheral Function Select" "HSCIF0_HTX,VI0_R5,I2C1_SDA_C,AUDIO_CLKB_B,AVB_LINK,SSI_WS78_B,?..." textline " " bitfld.long 0x20 3.--5. " IP_8[5:3] ,Peripheral Function Select" "HSCIF0_HRX,VI0_R4,I2C1_SCL_C,AUDIO_CLKA_B,AVB_MDIO,SSI_SCK78_B,?..." bitfld.long 0x20 0.--2. " IP_8[2:0] ,Peripheral Function Select" "ETH_MDC,VI0_R3,SCIF3_TXD_B,I2C4_SDA_E,AVB_MDC,SSI_SDATA6_B,?..." line.long 0x24 "IPSR_9,Peripheral Function Select Register 9" bitfld.long 0x24 28.--30. " IP_9[30:28] ,Peripheral Function Select" "SCIF1_SCK,PWM3,TCLK2,DU1_DG5,SSI_SDATA1_B,CAN_TXCLK,CC50_STATE34," bitfld.long 0x24 25.--27. " IP_9[27:25] ,Peripheral Function Select" "HSCIF1_HRTS_N,SCIFA4_TXD,IERX,DU1_DG4,SSI_WS1_B,CAN_STEP0,CC50_STATE33," bitfld.long 0x24 22.--24. " IP_9[24:22] ,Peripheral Function Select" "HSCIF1_HCTS_N,SCIFA4_RXD,IECLK,DU1_DG3,SSI_SCK1_B,CAN_DEBUG_HW_TRIGGER,CC50_STATE32," textline " " bitfld.long 0x24 19.--21. " IP_9[21:19] ,Peripheral Function Select" "HSCIF1_HSCK,PWM2,IETX,DU1_DG2,REMOCON_B,SPEEDIN_B,VSP_B," bitfld.long 0x24 17.--18. " IP_9[18:17] ,Peripheral Function Select" "HSCIF1_HTX,I2C4_SDA,TPUTO1,DU1_DG1" bitfld.long 0x24 15.--16. " IP_9[16:15] ,Peripheral Function Select" "HSCIF1_HRX,I2C4_SCL,PWM6,DU1_DG0" textline " " bitfld.long 0x24 12.--14. " IP_9[14:12] ,Peripheral Function Select" "MSIOF0_SS2,SCIFA0_TXD,TS_SPSYNC,DU1_DR7,RIF1_D1,FMIN_B,RDS_DATA_B," bitfld.long 0x24 9.--11. " IP_9[11:9] ,Peripheral Function Select" "MSIOF0_SS1,SCIFA0_RXD,TS_SDEN,DU1_DR6,RIF1_D0,FMCLK_B,RDS_CLK_B," bitfld.long 0x24 6.--8. " IP_9[8:6] ,Peripheral Function Select" "MSIOF0_SYNC,PWM1,TS_SCK,DU1_DR5,RIF1_CLK,BPFCLK_B,?..." textline " " bitfld.long 0x24 3.--5. " IP_9[5:3] ,Peripheral Function Select" "MSIOF0_SCK,IRQ0,TS_SDATA,DU1_DR4,RIF1_SYNC,TPUTO1_C,?..." bitfld.long 0x24 0.--2. " IP_9[2:0] ,Peripheral Function Select" "MSIOF0_TXD,SCIF5_TXD,I2C2_SDA_C,DU1_DR3,RIF1_D1_B,TS_SPSYNC_D,FMIN_C,RDS_DATA" line.long 0x28 "IPSR_10,Peripheral Function Select Register 10" bitfld.long 0x28 30.--31. " IP_10[31:30] ,Peripheral Function Select" "SSI_SCK5,SCIFA3_SCK,DU1_DOTCLKIN,CAN_DEBUGOUT10" bitfld.long 0x28 27.--29. " IP_10[29:27] ,Peripheral Function Select" "I2C2_SDA,SCIFA5_TXD,DU1_DB7,AUDIO_CLKOUT_C,CAN_DEBUGOUT9,?..." bitfld.long 0x28 24.--26. " IP_10[26:24] ,Peripheral Function Select" "I2C2_SCL,SCIFA5_RXD,DU1_DB6,AUDIO_CLKC_C,SSI_SDATA4_B,CAN_DEBUGOUT8,?..." textline " " bitfld.long 0x28 21.--23. " IP_10[23:21] ,Peripheral Function Select" "SCIF3_TXD,I2C1_SDA_E,FMIN_D,DU1_DB5,AUDIO_CLKB_C,SSI_WS4_B,CAN_DEBUGOUT7,RDS_DATA_C" bitfld.long 0x28 18.--20. " IP_10[20:18] ,Peripheral Function Select" "SCIF3_RXD,I2C1_SCL_E,FMCLK_D,DU1_DB4,AUDIO_CLKA_C,SSI_SCK4_B,CAN_DEBUGOUT6,RDS_CLK_C" bitfld.long 0x28 15.--17. " IP_10[17:15] ,Peripheral Function Select" "SCIF3_SCK,IRQ2,BPFCLK_D,DU1_DB3,SSI_SDATA9_B,TANS2,CAN_DEBUGOUT5,CC50_OSCOUT" textline " " bitfld.long 0x28 12.--14. " IP_10[14:12] ,Peripheral Function Select" "SCIF2_SCK,IRQ1,DU1_DB2,SSI_WS9_B,USB0_IDIN,CAN_DEBUGOUT4,CC50_STATE39," bitfld.long 0x28 9.--11. " IP_10[11:9] ,Peripheral Function Select" "SCIF2_TXD,I2C6_SDA,DU1_DB1,SSI_SCK9_B,USB0_OVC1,CAN_DEBUGOUT3,CC50_STATE38," bitfld.long 0x28 6.--8. " IP_10[8:6] ,Peripheral Function Select" "SCIF2_RXD,I2C6_SCL,DU1_DB0,SSI_SDATA2_B,USB0_EXTLP,CAN_DEBUGOUT2,CC50_STATE37," textline " " bitfld.long 0x28 3.--5. " IP_10[5:3] ,Peripheral Function Select" "SCIF1_TXD,I2C5_SDA,DU1_DG7,SSI_WS2_B,CAN_DEBUGOUT1,CC50_STATE36,?..." bitfld.long 0x28 0.--2. " IP_10[2:0] ,Peripheral Function Select" "SCIF1_RXD,I2C5_SCL,DU1_DG6,SSI_SCK2_B,CAN_DEBUGOUT0,CC50_STATE35,?..." line.long 0x2C "IPSR_11,Peripheral Function Select Register 11" bitfld.long 0x2C 27.--29. " IP_11[29:27] ,Peripheral Function Select" "SSI_SDATA0,MSIOF1_SCK_B,PWM0_B,ADICLK_B,AD_CLK_B,?..." bitfld.long 0x2C 24.--26. " IP_11[26:24] ,Peripheral Function Select" "SSI_WS0129,MSIOF1_TXD_B,SCIF5_TXD_D,ADICS_SAMP_B,AD_DO_B,?..." bitfld.long 0x2C 21.--23. " IP_11[23:21] ,Peripheral Function Select" "SSI_SCK0129,MSIOF1_RXD_B,SCIF5_RXD_D,ADIDATA_B,AD_DI_B,PCMWE_N,?..." textline " " bitfld.long 0x2C 18.--20. " IP_11[20:18] ,Peripheral Function Select" "SSI_SDATA7,SCIFA2_TXD_B,IRQ8,AUDIO_CLKA_D,CAN_CLK_D,PCMOE_N,?..." bitfld.long 0x2C 16.--17. " IP_11[17:16] ,Peripheral Function Select" "SSI_WS78,SCIFA2_RXD_B,I2C5_SCL_C,DU1_CDE" bitfld.long 0x2C 14.--15. " IP_11[15:14] ,Peripheral Function Select" "SSI_SCK78,SCIFA2_SCK_B,I2C5_SDA_C,DU1_DISP" textline " " bitfld.long 0x2C 11.--13. " IP_11[13:11] ,Peripheral Function Select" "SSI_SDATA6,SCIFA1_TXD_B,I2C4_SDA_C,DU1_EXODDF_DU1_ODDF_DISP_CDE,CAN_DEBUGOUT15,?..." bitfld.long 0x2C 8.--10. " IP_11[10:8] ,Peripheral Function Select" "SSI_WS6,SCIFA1_RXD_B,I2C4_SCL_C,DU1_EXVSYNC_DU1_VSYNC,CAN_DEBUGOUT14,?..." bitfld.long 0x2C 6.--7. " IP_11[7:6] ,Peripheral Function Select" "SSI_SCK6,SCIFA1_SCK_B,DU1_EXHSYNC_DU1_HSYNC,CAN_DEBUGOUT13" textline " " bitfld.long 0x2C 3.--5. " IP_11[5:3] ,Peripheral Function Select" "SSI_SDATA5,SCIFA3_TXD,I2C3_SDA_C,DU1_DOTCLKOUT1,CAN_DEBUGOUT12,?..." bitfld.long 0x2C 0.--2. " IP_11[2:0] ,Peripheral Function Select" "SSI_WS5,SCIFA3_RXD,I2C3_SCL_C,DU1_DOTCLKOUT0,CAN_DEBUGOUT11,?..." line.long 0x30 "IPSR_12,Peripheral Function Select Register 12" bitfld.long 0x30 27.--29. " IP_12[29:27] ,Peripheral Function Select" "SSI_SCK2,HSCIF1_HTX_B,VI1_DATA2,MDATA,ATAWR0_N,ETH_RXD1_B,?..." bitfld.long 0x30 24.--26. " IP_12[26:24] ,Peripheral Function Select" "SSI_SDATA1,HSCIF1_HRX_B,VI1_DATA1,SDATA,ATAG0_N,ETH_RXD0_B,?..." bitfld.long 0x30 21.--23. " IP_12[23:21] ,Peripheral Function Select" "SSI_WS1,SCIF1_TXD_B,I2C6_SDA_C,VI1_DATA0,CAN0_TX_D,AVB_AVTP_MATCH,ETH_RX_ER_B,?..." textline " " bitfld.long 0x30 18.--20. " IP_12[20:18] ,Peripheral Function Select" "SSI_SCK1,SCIF1_RXD_B,I2C6_SCL_C,VI1_CLK,CAN0_RX_D,AVB_AVTP_CAPTURE,ETH_CRS_DV_B,?..." bitfld.long 0x30 15.--17. " IP_12[17:15] ,Peripheral Function Select" "SSI_SDATA8,SCIF1_SCK_B,PWM1_B,IRQ9,REMOCON,DACK2,ETH_MDIO_B,?..." bitfld.long 0x30 13.--14. " IP_12[14:13] ,Peripheral Function Select" "SSI_SDATA4,MLB_DAT,IERX_B,IRD_SCK" textline " " bitfld.long 0x30 11.--12. " IP_12[12:11] ,Peripheral Function Select" "SSI_WS4,MLB_SIG,IECLK_B,IRD_RX" bitfld.long 0x30 9.--10. " IP_12[10:9] ,Peripheral Function Select" "SSI_SCK4,MLB_CK,IETX_B,IRD_TX" bitfld.long 0x30 6.--8. " IP_12[8:6] ,Peripheral Function Select" "SSI_SDATA3,MSIOF1_SS2_B,SCIFA1_TXD_C,ADICHS2_B,CAN1_TX_C,DREQ2_N,?..." textline " " bitfld.long 0x30 3.--5. " IP_12[5:3] ,Peripheral Function Select" "SSI_WS34,MSIOF1_SS1_B,SCIFA1_RXD_C,ADICHS1_B,CAN1_RX_C,DACK1_B,?..." bitfld.long 0x30 0.--2. " IP_12[2:0] ,Peripheral Function Select" "SSI_SCK34,MSIOF1_SYNC_B,SCIFA1_SCK_C,ADICHS0_B,AD_NCS_N_B,DREQ1_N_B,?..." line.long 0x34 "IPSR_13,Peripheral Function Select Register 13" bitfld.long 0x34 24.--26. " IP_13[26:24] ,Peripheral Function Select" "AUDIO_CLKOUT,I2C4_SDA_B,SCIFA5_TXD_D,VI1_VSYNC_N,TS_SPSYNC_C,RIF0_D1_B,FMIN_E,RDS_DATA_D" bitfld.long 0x34 21.--23. " IP_13[23:21] ,Peripheral Function Select" "AUDIO_CLKC,I2C4_SCL_B,SCIFA5_RXD_D,VI1_HSYNC_N,TS_SDEN_C,RIF0_D0_B,FMCLK_E,RDS_CLK_D" bitfld.long 0x34 18.--20. " IP_13[20:18] ,Peripheral Function Select" "AUDIO_CLKB,I2C0_SDA_B,SCIFA4_TXD_D,VI1_FIELD,TS_SCK_C,RIF0_CLK_B,BPFCLK_E,ETH_MDC_B" textline " " bitfld.long 0x34 15.--17. " IP_13[17:15] ,Peripheral Function Select" "AUDIO_CLKA,I2C0_SCL_B,SCIFA4_RXD_D,VI1_CLKENB,TS_SDATA_C,RIF0_SYNC_B,ETH_TXD0_B," bitfld.long 0x34 12.--14. " IP_13[14:12] ,Peripheral Function Select" "SSI_SDATA9,SCIF2_TXD_B,I2C3_SDA_E,VI1_DATA7,ATADIR0_N,ETH_MAGIC_B,?..." bitfld.long 0x34 9.--11. " IP_13[11:9] ,Peripheral Function Select" "SSI_WS9,SCIF2_RXD_B,I2C3_SCL_E,VI1_DATA6,ATARD0_N,ETH_TX_EN_B,?..." textline " " bitfld.long 0x34 6.--8. " IP_13[8:6] ,Peripheral Function Select" "SSI_SCK9,SCIF2_SCK_B,PWM2_B,VI1_DATA5,MTS_N,EX_WAIT1,ETH_TXD1_B," bitfld.long 0x34 3.--5. " IP_13[5:3] ,Peripheral Function Select" "SSI_SDATA2,HSCIF1_HRTS_N_B,SCIFA0_TXD_D,VI1_DATA4,STM_N,ATACS10_N,ETH_REFCLK_B," bitfld.long 0x34 0.--2. " IP_13[2:0] ,Peripheral Function Select" "SSI_WS2,HSCIF1_HCTS_N_B,SCIFA0_RXD_D,VI1_DATA3,SCKZ,ATACS00_N,ETH_LINK_B," tree.end tree "MODn Registers" width 10. group.long 0x90++0xB line.long 0x00 "MOD_SEL,Module Select Register" bitfld.long 0x00 30.--31. " SEL_ADG[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x00 29. " SEL_ADI[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x00 27.--28. " SEL_CAN[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x00 24.--26. " SEL_DARC[2:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4,Function 5,?..." textline " " bitfld.long 0x00 23. " SEL_DR0[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x00 22. " SEL_DR1[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x00 21. " SEL_DR2[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x00 20. " SEL_DR3[0] ,Module Select" "Function 1,Function 2" textline " " bitfld.long 0x00 19. " SEL_ETH[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x00 18. " SEL_FSN[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x00 15.--17. " SEL_I2C00[2:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4,Function 5,?..." bitfld.long 0x00 12.--14. " SEL_I2C01[2:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4,Function 5,?..." textline " " bitfld.long 0x00 9.--11. " SEL_I2C02[2:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4,Function 5,?..." bitfld.long 0x00 6.--8. " SEL_I2C03[2:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4,Function 5,?..." bitfld.long 0x00 3.--5. " SEL_I2C04[2:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4,Function 5,?..." bitfld.long 0x00 0.--1. " SEL_I2C05[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" textline " " bitfld.long 0x00 0. " SEL_AVB[0] ,Module Select" "Function 1,Function 2" line.long 0x04 "MOD_SEL2,Module Select Register 2" bitfld.long 0x04 30.--31. " SEL_IEB[1:0] ,Module Select" "Function 1,Function 2,Function 3,?..." bitfld.long 0x04 28.--29. " SEL_IIC0[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4,?..." bitfld.long 0x04 27. " SEL_LBS[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x04 26. " SEL_MSI1[0] ,Module Select" "Function 1,Function 2" textline " " bitfld.long 0x04 25. " SEL_MSI2[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x04 24. " SEL_RAD[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x04 23. " SEL_RCN[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x04 22. " SEL_RSP[0] ,Module Select" "Function 1,Function 2" textline " " bitfld.long 0x04 20.--21. " SEL_SCIFA0[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x04 18.--19. " SEL_SCIFA1[1:0] ,Module Select" "Function 1,Function 2,Function 3," bitfld.long 0x04 17. " SEL_SCIFA2[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x04 16. " SEL_SCIFA3[0] ,Module Select" "Function 1,Function 2" textline " " bitfld.long 0x04 14.--15. " SEL_SCIFA4[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x04 12.--13. " SEL_SCIFA5[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x04 11. " SEL_SPDM[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x04 10. " SEL_TMU[0] ,Module Select" "Function 1,Function 2" textline " " bitfld.long 0x04 8.--9. " SEL_TSIF0[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x04 6.--7. " SEL_CAN0[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x04 4.--5. " SEL_CAN1[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x04 3. " SEL_HSCIF0[0] ,Module Select" "Function 1,Function 2" textline " " bitfld.long 0x04 2. " SEL_HSCIF1[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x04 0.--1. " SEL_RDS[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" line.long 0x08 "MOD_SEL3,Module Select Register 3" bitfld.long 0x08 30.--31. " SEL_SCIF0[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x08 28.--29. " SEL_SCIF1[1:0] ,Module Select" "Function 1,Function 2,Function 3," bitfld.long 0x08 26.--27. " SEL_SCIF2[1:0] ,Module Select" "Function 1,Function 2,Function 3," bitfld.long 0x08 25. " SEL_SCIF3[0] ,Module Select" "Function 1,Function 2" textline " " bitfld.long 0x08 22.--24. " SEL_SCIF4[2:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4,Function 5,?..." bitfld.long 0x08 20.--21. " SEL_SCIF5[1:0] ,Module Select" "Function 1,Function 2,Function 3,Function 4" bitfld.long 0x08 19. " SEL_SSI1[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x08 18. " SEL_SSI2[0] ,Module Select" "Function 1,Function 2" textline " " bitfld.long 0x08 17. " SEL_SSI4[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x08 16. " SEL_SSI5[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x08 15. " SEL_SSI6[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x08 14. " SEL_SSI7[0] ,Module Select" "Function 1,Function 2" textline " " bitfld.long 0x08 13. " SEL_SSI8[0] ,Module Select" "Function 1,Function 2" bitfld.long 0x08 12. " SEL_SSI9[0] ,Module Select" "Function 1,Function 2" tree.end tree "PUPRn Registers" width 8. group.long 0x100++0x1B line.long 0x00 "PUPR_0,LSI Pin Pull-Up Control Register 0" bitfld.long 0x00 31. " A_15 ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x00 30. " A_14 ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" bitfld.long 0x00 29. " A_13 ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" bitfld.long 0x00 28. " A_12 ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " A_11 ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" bitfld.long 0x00 26. " A_10 ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" bitfld.long 0x00 25. " A_9 ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x00 24. " A_8 ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " A_7 ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x00 22. " A_6 ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" bitfld.long 0x00 21. " A_5 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x00 20. " A_4 ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " A_3 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x00 18. " A_2 ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" bitfld.long 0x00 17. " A_1 ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x00 16. " A_0 ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " D_15 ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x00 14. " D_14 ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" bitfld.long 0x00 13. " D_13 ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x00 12. " D_12 ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " D_11 ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x00 10. " D_10 ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" bitfld.long 0x00 9. " D_9 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x00 8. " D_8 ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " D_7 ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x00 6. " D_6 ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" bitfld.long 0x00 5. " D_5 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x00 4. " D_4 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " D_3 ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x00 2. " D_2 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" bitfld.long 0x00 1. " D_1 ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " A_0 ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" textline " " line.long 0x04 "PUPR_1,LSI Pin Pull-Up Control Register 1" bitfld.long 0x04 30. " ASEBRK_N_ACK ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" bitfld.long 0x04 29. " EX_CS5_N ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" bitfld.long 0x04 28. " EX_CS3_N ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" bitfld.long 0x04 27. " EX_CS1_N ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" textline " " bitfld.long 0x04 26. " CS1_N_A26 ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" bitfld.long 0x04 25. " TDI ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x04 24. " TMS ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" bitfld.long 0x04 23. " TCK ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " TRST_N ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" bitfld.long 0x04 21. " DACK0 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x04 20. " DREQ0_N ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" bitfld.long 0x04 19. " EX_WAIT0 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " WE1_N ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" bitfld.long 0x04 17. " WE0_N ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x04 16. " RD_WR_N ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" bitfld.long 0x04 15. " RD_N ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" textline " " bitfld.long 0x04 14. " BS_N ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" bitfld.long 0x04 13. " EX_CS4_N ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x04 12. " EX_CS2_N ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" bitfld.long 0x04 11. " EX_CS0_N ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " CS0_N ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" bitfld.long 0x04 9. " A25 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x04 8. " A24 ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" bitfld.long 0x04 7. " A23 ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" textline " " bitfld.long 0x04 6. " A22 ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" bitfld.long 0x04 5. " A21 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x04 4. " A20 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" bitfld.long 0x04 3. " A19 ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" textline " " bitfld.long 0x04 2. " A18 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" bitfld.long 0x04 1. " A17 ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x04 0. " A16 ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x08 "PUPR_2,LSI Pin Pull-Up Control Register 2" bitfld.long 0x08 31. " DU0_CDE ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x08 30. " DU0_DISP ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" textline " " textline " " bitfld.long 0x08 29. " DU0_EXODDF_DU0_ODDF_DISP_CDE ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " DU0_EXVSYNC_DU0_VSYNC ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" textline " " textline " " bitfld.long 0x08 27. " DU0_DISP ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" bitfld.long 0x08 26. " DU0_DOTCLKOUT1 ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" bitfld.long 0x08 25. " DU0_DOTCLKOUT0 ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x08 24. " DU0_DOTCLKIN ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" textline " " bitfld.long 0x08 23. " DU0_DB_7 ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x08 22. " DU0_DB_6 ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" bitfld.long 0x08 21. " DU0_DB_5 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x08 20. " DU0_DB_4 ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " DU0_DB_3 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x08 18. " DU0_DB_2 ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" bitfld.long 0x08 17. " DU0_DB_1 ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x08 16. " DU0_DB_0 ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x08 15. " DU0_DG_7 ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x08 14. " DU0_DG_6 ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" bitfld.long 0x08 13. " DU0_DG_5 ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x08 12. " DU0_DG_4 ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x08 11. " DU0_DG_3 ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x08 10. " DU0_DG_2 ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" bitfld.long 0x08 9. " DU0_DG_1 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x08 8. " DU0_DG_0 ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " DU0_DR_7 ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x08 6. " DU0_DR_6 ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" bitfld.long 0x08 5. " DU0_DR_5 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x08 4. " DU0_DR_4 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" textline " " bitfld.long 0x08 3. " DU0_DR_3 ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x08 2. " DU0_DR_2 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" bitfld.long 0x08 1. " DU0_DR_1 ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x08 0. " DU0_DR_0 ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" textline "" line.long 0x0C "PUPR_3,LSI Pin Pull-Up Control Register 3" bitfld.long 0x0C 31. " I2C1_SDA ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x0C 30. " I2C1_SCL ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" bitfld.long 0x0C 29. " I2C0_SDA ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" bitfld.long 0x0C 28. " I2C0_SCL ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" textline " " bitfld.long 0x0C 27. " HSCIF0_HSCK ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" bitfld.long 0x0C 26. " HSCIF0_HRTS_N ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" bitfld.long 0x0C 25. " HSCIF0_HCTS_N ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x0C 24. " HSCIF0_HTX ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" textline " " bitfld.long 0x0C 23. " HSCIF0_HRX ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x0C 22. " ETH_MDC ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" bitfld.long 0x0C 21. " ETH_TXD0 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x0C 20. " ETH_MAGIC ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x0C 19. " ETH_TX_EN ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x0C 18. " ETH_TXD1 ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" bitfld.long 0x0C 17. " ETH_REF_CLK ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x0C 16. " ETH_LINK ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x0C 15. " ETH_RXD1 ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x0C 14. " ETH_RXD0 ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" bitfld.long 0x0C 13. " ETH_RX_ER ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x0C 12. " ETH_CRS_DV ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x0C 11. " ETH_MDIO ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x0C 10. " VI0_VSYNC_N ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" bitfld.long 0x0C 9. " VI0_HSYNC_N ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x0C 8. " VI0_FIELD ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x0C 7. " VI0_CLKENB ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x0C 6. " VI0_DATA7_VI0_B7 ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" bitfld.long 0x0C 5. " VI0_DATA6_VI0_B6 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x0C 4. " VI0_DATA5_VI0_B5 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" textline " " bitfld.long 0x0C 3. " VI0_DATA4_VI0_B4 ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x0C 2. " VI0_DATA3_VI0_B3 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" bitfld.long 0x0C 1. " VI0_DATA2_VI0_B2 ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x0C 0. " VI0_DATA1_VI0_B1 ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x10 "PUPR_4,LSI Pin Pull-Up Control Register 4" bitfld.long 0x10 31. " SSI_SCK0129 ,LSI Pin Pull-Up Control 31" "Disabled,Enabled" bitfld.long 0x10 30. " SSI_SDATA7 ,LSI Pin Pull-Up Control 30" "Disabled,Enabled" bitfld.long 0x10 29. " SSI_WS78 ,LSI Pin Pull-Up Control 29" "Disabled,Enabled" bitfld.long 0x10 28. " SSI_SCK78 ,LSI Pin Pull-Up Control 28" "Disabled,Enabled" textline " " bitfld.long 0x10 27. " SSI_SDATA6 ,LSI Pin Pull-Up Control 27" "Disabled,Enabled" bitfld.long 0x10 26. " SSI_WS6 ,LSI Pin Pull-Up Control 26" "Disabled,Enabled" bitfld.long 0x10 25. " SSI_SCK6 ,LSI Pin Pull-Up Control 25" "Disabled,Enabled" bitfld.long 0x10 24. " SSI_SDATA5 ,LSI Pin Pull-Up Control 24" "Disabled,Enabled" textline " " bitfld.long 0x10 23. " SSI_WS5 ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x10 22. " SSI_SCK5 ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" bitfld.long 0x10 21. " I2C2_SDA ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x10 20. " I2C2_SCL ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x10 19. " SCIF3_TXD ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x10 18. " SCIF3_RXD ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" bitfld.long 0x10 17. " SCIF3_SCK ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x10 16. " SCIF2_SCK ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x10 15. " SCIF2_TXD ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x10 14. " SCIF2_RXD ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" bitfld.long 0x10 13. " SCIF1_TXD ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x10 12. " SCIF1_RXD ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x10 11. " SCIF1_SCK ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x10 10. " HSCIF1_HRTS_N ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" bitfld.long 0x10 9. " HSCIF1_HCTS_N ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x10 8. " HSCIF1_HSCK ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x10 7. " HSCIF1_HTX ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" bitfld.long 0x10 6. " HSCIF1_HRX ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" bitfld.long 0x10 5. " MSIOF0_SS2 ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x10 4. " MSIOF0_SS1 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" textline " " bitfld.long 0x10 3. " MSIOF0_SYNC ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x10 2. " MSIOF0_SCK ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" bitfld.long 0x10 1. " MSIOF0_TXD ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x10 0. " MSIOF0_RXD ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x14 "PUPR_5,LSI Pin Pull-Up Control Register 5" bitfld.long 0x14 23. " VI0_DATA0_VI0_B0 ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x14 22. " VI0_CLK ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" bitfld.long 0x14 21. " AUDIO_CLKOUT ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x14 20. " AUDIO_CLKC ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x14 19. " AUDIO_CLKB ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x14 18. " AUDIO_CLKA ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" bitfld.long 0x14 17. " SSI_SDATA9 ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x14 16. " SSI_WS9 ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x14 15. " SSI_SCK9 ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x14 14. " SSI_SDATA2 ,LSI Pin Pull-Up Control 14" "Disabled,Enabled" bitfld.long 0x14 13. " SSI_WS2 ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x14 12. " SSI_SCK2 ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" textline " " bitfld.long 0x14 11. " SSI_SDATA1 ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" bitfld.long 0x14 10. " SSI_WS1 ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" bitfld.long 0x14 9. " SSI_SCK1 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x14 8. " SSI_SDATA8 ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " SSI_SDATA3 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" bitfld.long 0x14 3. " SSI_WS34 ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" bitfld.long 0x14 2. " SSI_SCK34 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" bitfld.long 0x14 1. " SSI_SDATA0 ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" textline " " bitfld.long 0x14 0. " SSI_WS0129 ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" line.long 0x18 "PUPR_6,LSI Pin Pull-Up Control Register 6" bitfld.long 0x18 23. " MMC_D7 ,LSI Pin Pull-Up Control 23" "Disabled,Enabled" bitfld.long 0x18 22. " MMC_D6 ,LSI Pin Pull-Up Control 22" "Disabled,Enabled" bitfld.long 0x18 21. " MMC_D5 ,LSI Pin Pull-Up Control 21" "Disabled,Enabled" bitfld.long 0x18 20. " MMC_D4 ,LSI Pin Pull-Up Control 20" "Disabled,Enabled" textline " " bitfld.long 0x18 19. " MMC_D3 ,LSI Pin Pull-Up Control 19" "Disabled,Enabled" bitfld.long 0x18 18. " MMC_D2 ,LSI Pin Pull-Up Control 18" "Disabled,Enabled" bitfld.long 0x18 17. " MMC_D1 ,LSI Pin Pull-Up Control 17" "Disabled,Enabled" bitfld.long 0x18 16. " MMC_D0 ,LSI Pin Pull-Up Control 16" "Disabled,Enabled" textline " " bitfld.long 0x18 15. " MMC_CMD ,LSI Pin Pull-Up Control 15" "Disabled,Enabled" bitfld.long 0x18 13. " SD1_WP ,LSI Pin Pull-Up Control 13" "Disabled,Enabled" bitfld.long 0x18 12. " SD1_CD ,LSI Pin Pull-Up Control 12" "Disabled,Enabled" bitfld.long 0x18 11. " SD1_DATA3 ,LSI Pin Pull-Up Control 11" "Disabled,Enabled" textline " " bitfld.long 0x18 10. " SD1_DATA2 ,LSI Pin Pull-Up Control 10" "Disabled,Enabled" bitfld.long 0x18 9. " SD1_DATA1 ,LSI Pin Pull-Up Control 9" "Disabled,Enabled" bitfld.long 0x18 8. " SD1_DATA0 ,LSI Pin Pull-Up Control 8" "Disabled,Enabled" bitfld.long 0x18 7. " SD1_CMD ,LSI Pin Pull-Up Control 7" "Disabled,Enabled" textline " " bitfld.long 0x18 6. " SD0_WP ,LSI Pin Pull-Up Control 6" "Disabled,Enabled" bitfld.long 0x18 5. " SD0_CD ,LSI Pin Pull-Up Control 5" "Disabled,Enabled" bitfld.long 0x18 4. " SD0_DATA3 ,LSI Pin Pull-Up Control 4" "Disabled,Enabled" bitfld.long 0x18 3. " SD0_DATA2 ,LSI Pin Pull-Up Control 3" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " SD0_DATA1 ,LSI Pin Pull-Up Control 2" "Disabled,Enabled" bitfld.long 0x18 1. " SD0_DATA0 ,LSI Pin Pull-Up Control 1" "Disabled,Enabled" bitfld.long 0x18 0. " SD0_CMD ,LSI Pin Pull-Up Control 0" "Disabled,Enabled" tree.end tree "IOCTRL_n Registers" width 10. group.long 0x60++0x13 line.long 0x00 "IOCTRL_0,SD Control Register 0" bitfld.long 0x00 30.--31. " DRV_MMCCLK ,MMC_CLK Setting" "0,1,2,3" bitfld.long 0x00 28.--29. " DRV_MMCCMD ,MMC_CMD Setting" "0,1,2,3" bitfld.long 0x00 26.--27. " DRV_MMCD0 ,MMC_CD0 Setting 1" "0,1,2,3" bitfld.long 0x00 24.--25. " DRV_MMCD1 ,MMC_CD1 Setting" "0,1,2,3" textline " " bitfld.long 0x00 22.--23. " DRV_MMCD2 ,MMC_CD2 Setting" "0,1,2,3" bitfld.long 0x00 20.--21. " DRV_MMCD3 ,MMC_CD3 Setting" "0,1,2,3" bitfld.long 0x00 18.--19. " DRV_MMCD4 ,MMC_CD4 Setting" "0,1,2,3" bitfld.long 0x00 16.--17. " DRV_MMCD5 ,MMC_CD5 Setting" "0,1,2,3" textline " " bitfld.long 0x00 14.--15. " DRV_MMCD6 ,MMC_CD6 Setting" "0,1,2,3" bitfld.long 0x00 12.--13. " DRV_MMCD7 ,MMC_CD7 Setting" "0,1,2,3" bitfld.long 0x00 10.--11. " DRV_SD0CD ,SD0_CD Setting 1" "0,1,2,3" bitfld.long 0x00 8.--9. " DRV_SD0CLK ,SD0_CLK Setting" "0,1,2,3" textline " " bitfld.long 0x00 6.--7. " DRV_SD0CMD ,SD0_CMD Setting" "0,1,2,3" bitfld.long 0x00 4.--5. " DRV_SD0DATA0 ,SD0_DATA0 Setting" "0,1,2,3" bitfld.long 0x00 2.--3. " DRV_SD0DATA1 ,SD0_DATA1 Setting" "0,1,2,3" bitfld.long 0x00 0.--1. " DRV_SD0DATA2 ,SD0_DATA2 Setting" "0,1,2,3" line.long 0x04 "IOCTRL_1,SD Control Register 1" bitfld.long 0x04 30.--31. " DRV_SD0DATA3 ,SD0_DATA3 Setting" "0,1,2,3" bitfld.long 0x04 28.--29. " DRV_SD0WP ,SD0_WP Setting" "0,1,2,3" bitfld.long 0x04 26.--27. " DRV_SD1CD ,SD1_CD Setting 1" "0,1,2,3" bitfld.long 0x04 24.--25. " DRV_SD1CLK ,SD1_CLK Setting" "0,1,2,3" textline " " bitfld.long 0x04 22.--23. " DRV_SD1CMD ,SD1_CMD Setting" "0,1,2,3" bitfld.long 0x04 20.--21. " DRV_SD1DATA0 ,SD1_DATA0 Setting" "0,1,2,3" bitfld.long 0x04 18.--19. " DRV_SD1DATA1 ,SD1_DATA1 Setting" "0,1,2,3" bitfld.long 0x04 16.--17. " DRV_SD1DATA2 ,SD1_DATA2 Setting" "0,1,2,3" textline " " bitfld.long 0x04 14.--15. " DRV_SD1DATA3 ,SD1_DATA3 Setting" "0,1,2,3" bitfld.long 0x04 12.--13. " DRV_SD1WP ,SD1_WP Setting" "0,1,2,3" line.long 0x08 "IOCTRL_2,TDSEL Control Register" bitfld.long 0x08 30.--31. " TDSEL1_A10 ,A10 Setting" "0,1,2,3" bitfld.long 0x08 28.--29. " TDSEL1_A16 ,A16 Setting" "0,1,2,3" bitfld.long 0x08 26.--27. " TDSEL1_AUDIOCLKB ,AUDIO_CLKB Setting" "0,1,2,3" bitfld.long 0x08 24.--25. " TDSEL1_ETHRXER ,ETH_RX_ER Setting" "0,1,2,3" textline " " bitfld.long 0x08 22.--23. " TDSEL1_EXCS3N ,EX_CS3_N Setting" "0,1,2,3" bitfld.long 0x08 20.--21. " TDSEL1_I2C1SDA ,I2C1_SDA Setting" "0,1,2,3" bitfld.long 0x08 18.--19. " TDSEL1_MMCCLK ,MMC_CLK Setting" "0,1,2,3" bitfld.long 0x08 16.--17. " TDSEL1_MSIOF0SCK ,MSIOF0_SCK Setting" "0,1,2,3" textline " " bitfld.long 0x08 14.--15. " TDSEL1_MSIOF0SYNC ,MSIOF0_SYNC Setting" "0,1,2,3" bitfld.long 0x08 12.--13. " TDSEL1_SD0CLK ,SD0_CLK Setting" "0,1,2,3" bitfld.long 0x08 10.--11. " TDSEL1_SD1CLK ,SD1_CLK Setting" "0,1,2,3" bitfld.long 0x08 8.--9. " TDSEL1_SSISDATA0 ,SSI_SDATA0 Setting" "0,1,2,3" line.long 0x0C "IOCTRL_3,POC Control Register" bitfld.long 0x0C 31. " POC_MMCCLK ,Selecting IO voltage for the pin MMC_CLK" "1.8 V,3.3 V" bitfld.long 0x0C 30. " POC_MMCCMD ,Selecting IO voltage for the pin MMC_CMD" "1.8 V,3.3 V" bitfld.long 0x0C 29. " POC_MMCD0 ,Selecting IO voltage for the pin MMC_CD0" "1.8 V,3.3 V" bitfld.long 0x0C 28. " POC_MMCD1 ,Selecting IO voltage for the pin MMC_CD1" "1.8 V,3.3 V" textline " " bitfld.long 0x0C 27. " POC_MMCD2 ,Selecting IO voltage for the pin MMC_CD2" "1.8 V,3.3 V" bitfld.long 0x0C 26. " POC_MMCD3 ,Selecting IO voltage for the pin MMC_CD3" "1.8 V,3.3 V" bitfld.long 0x0C 25. " POC_MMCD4 ,Selecting IO voltage for the pin MMC_CD4" "1.8 V,3.3 V" bitfld.long 0x0C 24. " POC_MMCD5 ,Selecting IO voltage for the pin MMC_CD5" "1.8 V,3.3 V" textline " " bitfld.long 0x0C 23. " POC_SD0CD ,Selecting IO voltage for the pin SD0_CD" "1.8 V,3.3 V" bitfld.long 0x0C 22. " POC_SD0CLK ,Selecting IO voltage for the pin SD0_CLK" "1.8 V,3.3 V" bitfld.long 0x0C 21. " POC_SD0CMD ,Selecting IO voltage for the pin SD0_CMD" "1.8 V,3.3 V" bitfld.long 0x0C 20. " POC_SD0DATA0 ,Selecting IO voltage for the pin SD0_DATA0" "1.8 V,3.3 V" textline " " bitfld.long 0x0C 19. " POC_SD0DATA1 ,Selecting IO voltage for the pin SD0_DATA1" "1.8 V,3.3 V" bitfld.long 0x0C 18. " POC_SD0DATA2 ,Selecting IO voltage for the pin SD0_DATA2" "1.8 V,3.3 V" bitfld.long 0x0C 17. " POC_SD0DATA3 ,Selecting IO voltage for the pin SD0_DATA3" "1.8 V,3.3 V" bitfld.long 0x0C 16. " POC_SD0WP ,Selecting IO voltage for the pin SD0_WP" "1.8 V,3.3 V" textline " " bitfld.long 0x0C 15. " POC_SD1CD ,Selecting IO voltage for the pin SD1_CD" "1.8 V,3.3 V" bitfld.long 0x0C 14. " POC_SD1CLK ,Selecting IO voltage for the pin SD1_CLK" "1.8 V,3.3 V" bitfld.long 0x0C 13. " POC_SD1CMD ,Selecting IO voltage for the pin SD1_CMD" "1.8 V,3.3 V" bitfld.long 0x0C 12. " POC_SD1DATA0 ,Selecting IO voltage for the pin SD1_DATA0" "1.8 V,3.3 V" textline " " bitfld.long 0x0C 11. " POC_SD1DATA1 ,Selecting IO voltage for the pin SD1_DATA1" "1.8 V,3.3 V" bitfld.long 0x0C 10. " POC_SD1DATA2 ,Selecting IO voltage for the pin SD1_DATA2" "1.8 V,3.3 V" bitfld.long 0x0C 9. " POC_SD1DATA3 ,Selecting IO voltage for the pin SD1_DATA3" "1.8 V,3.3 V" bitfld.long 0x0C 8. " POC_SD1WP ,Selecting IO voltage for the pin SD1_WP" "1.8 V,3.3 V" line.long 0x10 "IOCTRL_7,IICDVFS and TDBG IO Cell Control Register" bitfld.long 0x10 12. " GPREG_MSEL03_P[15] ,Debug monitor function pins select" "DU,SDHI" bitfld.long 0x10 7. " CONTA_IICDVFS ,Control TOF value of IICDVFS IO cell" "0.7 VPU,0.3 VPU" bitfld.long 0x10 6. " CONTB_IICDVFS ,Control VIH/VIL value of IICDVFS IO cell" "VIH,VIL" tree.end width 0xB tree.end tree.open "GPIO" tree "GPIO 0" base ad:0xE6050000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL0,General IO/Interrupt Switching Register 0" bitfld.long 0x00 31. " IOINTSEL0_31 ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " IOINTSEL0_30 ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " IOINTSEL0_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL0_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL0_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL0_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " bitfld.long 0x00 25. " IOINTSEL0_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL0_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" bitfld.long 0x00 23. " IOINTSEL0_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL0_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL0_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL0_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " IOINTSEL0_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL0_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL0_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL0_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" bitfld.long 0x00 15. " IOINTSEL0_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL0_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL0_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL0_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " IOINTSEL0_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL0_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL0_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL0_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" bitfld.long 0x00 7. " IOINTSEL0_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL0_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL0_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL0_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " IOINTSEL0_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL0_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL0_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL0_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL0,General Input/Output Switching Register 0" bitfld.long 0x04 31. " INOUTSEL0_31 ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " INOUTSEL0_30 ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " INOUTSEL0_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL0_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL0_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL0_26 ,General input or output mode select for channel 26" "Input,Output" textline " " bitfld.long 0x04 25. " INOUTSEL0_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL0_24 ,General input or output mode select for channel 24" "Input,Output" bitfld.long 0x04 23. " INOUTSEL0_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL0_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL0_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL0_20 ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " INOUTSEL0_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL0_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL0_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL0_16 ,General input or output mode select for channel 16" "Input,Output" bitfld.long 0x04 15. " INOUTSEL0_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL0_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL0_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL0_12 ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " INOUTSEL0_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL0_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL0_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL0_8 ,General input or output mode select for channel 8" "Input,Output" bitfld.long 0x04 7. " INOUTSEL0_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL0_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL0_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL0_4 ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " INOUTSEL0_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL0_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL0_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL0_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT0,General Output Register 0" bitfld.long 0x08 31. " OUTDT0_31 ,Output value for channel 31" "0,1" bitfld.long 0x08 30. " OUTDT0_30 ,Output value for channel 30" "0,1" bitfld.long 0x08 29. " OUTDT0_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT0_28 ,Output value for channel 28" "0,1" textfld " " textline " " bitfld.long 0x08 27. " OUTDT0_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT0_26 ,Output value for channel 26" "0,1" textline " " bitfld.long 0x08 25. " OUTDT0_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT0_24 ,Output value for channel 24" "0,1" bitfld.long 0x08 23. " OUTDT0_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT0_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT0_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT0_20 ,Output value for channel 20" "0,1" bitfld.long 0x08 19. " OUTDT0_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT0_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT0_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT0_16 ,Output value for channel 16" "0,1" bitfld.long 0x08 15. " OUTDT0_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT0_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT0_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT0_12 ,Output value for channel 12" "0,1" bitfld.long 0x08 11. " OUTDT0_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT0_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT0_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT0_8 ,Output value for channel 8" "0,1" bitfld.long 0x08 7. " OUTDT0_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT0_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT0_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT0_4 ,Output value for channel 4" "0,1" bitfld.long 0x08 3. " OUTDT0_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT0_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT0_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT0_0 ,Output value for channel 0" "0,1" rgroup.long 0x0C++0x07 line.long 0x00 "INDT0,General Input Register 0" bitfld.long 0x00 31. " INDT0_31 ,Value received through pin 31" "0,1" bitfld.long 0x00 30. " INDT0_30 ,Value received through pin 30" "0,1" bitfld.long 0x00 29. " INDT0_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT0_28 ,Value received through pin 28" "0,1" textfld " " textline " " bitfld.long 0x00 27. " INDT0_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT0_26 ,Value received through pin 26" "0,1" textline " " bitfld.long 0x00 25. " INDT0_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT0_24 ,Value received through pin 24" "0,1" bitfld.long 0x00 23. " INDT0_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT0_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT0_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT0_20 ,Value received through pin 20" "0,1" bitfld.long 0x00 19. " INDT0_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT0_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT0_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT0_16 ,Value received through pin 16" "0,1" bitfld.long 0x00 15. " INDT0_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT0_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT0_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT0_12 ,Value received through pin 12" "0,1" bitfld.long 0x00 11. " INDT0_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT0_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT0_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT0_8 ,Value received through pin 8" "0,1" bitfld.long 0x00 7. " INDT0_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT0_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT0_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT0_4 ,Value received through pin 4" "0,1" bitfld.long 0x00 3. " INDT0_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT0_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT0_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT0_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT0,Interrupt Display Register 0" bitfld.long 0x04 31. " INTDT0_31 ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " INTDT0_30 ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " INTDT0_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT0_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT0_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT0_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTDT0_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT0_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " INTDT0_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT0_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT0_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT0_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " INTDT0_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT0_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT0_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT0_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " INTDT0_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT0_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT0_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT0_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " INTDT0_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT0_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT0_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT0_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " INTDT0_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT0_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT0_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT0_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" bitfld.long 0x04 3. " INTDT0_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT0_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT0_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT0_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR0,Interrupt Clear Register 0" bitfld.long 0x00 31. " INTCLR0_31 ,Clears pin 31 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 30. " INTCLR0_30 ,Clears pin 30 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 29. " INTCLR0_29 ,Clears pin 29 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 28. " INTCLR0_28 ,Clears pin 28 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 27. " INTCLR0_27 ,Clears pin 27 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 26. " INTCLR0_26 ,Clears pin 26 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 25. " INTCLR0_25 ,Clears pin 25 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 24. " INTCLR0_24 ,Clears pin 24 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 23. " INTCLR0_23 ,Clears pin 23 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 22. " INTCLR0_22 ,Clears pin 22 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 21. " INTCLR0_21 ,Clears pin 21 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 20. " INTCLR0_20 ,Clears pin 20 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 19. " INTCLR0_19 ,Clears pin 19 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 18. " INTCLR0_18 ,Clears pin 18 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 17. " INTCLR0_17 ,Clears pin 17 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 16. " INTCLR0_16 ,Clears pin 16 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 15. " INTCLR0_15 ,Clears pin 15 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 14. " INTCLR0_14 ,Clears pin 14 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 13. " INTCLR0_13 ,Clears pin 13 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 12. " INTCLR0_12 ,Clears pin 12 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 11. " INTCLR0_11 ,Clears pin 11 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 10. " INTCLR0_10 ,Clears pin 10 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 9. " INTCLR0_9 ,Clears pin 9 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 8. " INTCLR0_8 ,Clears pin 8 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 7. " INTCLR0_7 ,Clears pin 7 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 6. " INTCLR0_6 ,Clears pin 6 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 5. " INTCLR0_5 ,Clears pin 5 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 4. " INTCLR0_4 ,Clears pin 4 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 3. " INTCLR0_3 ,Clears pin 3 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 2. " INTCLR0_2 ,Clears pin 2 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 1. " INTCLR0_1 ,Clears pin 1 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 0. " INTCLR0_0 ,Clears pin 0 bit in the interrupt display register" "No effect,Clear" line.long 0x04 "INTMSK0,Interrupt Mask Register 0" bitfld.long 0x04 31. " INTMSK0_31 ,Masks interrupt request for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " INTMSK0_30 ,Masks interrupt request for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " INTMSK0_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK0_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK0_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK0_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " INTMSK0_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK0_24 ,Masks interrupt request for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " INTMSK0_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK0_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK0_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK0_20 ,Masks interrupt request for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " INTMSK0_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK0_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK0_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK0_16 ,Masks interrupt request for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " INTMSK0_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK0_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK0_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK0_12 ,Masks interrupt request for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " INTMSK0_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK0_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK0_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK0_8 ,Masks interrupt request for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " INTMSK0_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK0_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK0_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK0_4 ,Masks interrupt request for pin 4" "Masked,Not masked" bitfld.long 0x04 3. " INTMSK0_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK0_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK0_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK0_0 ,Masks interrupt request for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR0,Interrupt Mask Clear Register 0" bitfld.long 0x08 31. " MSKCLR0_31 ,Clears mask for pin 31" "No effect,Not masked" bitfld.long 0x08 30. " MSKCLR0_30 ,Clears mask for pin 30" "No effect,Not masked" bitfld.long 0x08 29. " MSKCLR0_29 ,Clears mask for pin 29" "No effect,Not masked" bitfld.long 0x08 28. " MSKCLR0_28 ,Clears mask for pin 28" "No effect,Not masked" textline " " bitfld.long 0x08 27. " MSKCLR0_27 ,Clears mask for pin 27" "No effect,Not masked" bitfld.long 0x08 26. " MSKCLR0_26 ,Clears mask for pin 26" "No effect,Not masked" textline " " bitfld.long 0x08 25. " MSKCLR0_25 ,Clears mask for pin 25" "No effect,Not masked" bitfld.long 0x08 24. " MSKCLR0_24 ,Clears mask for pin 24" "No effect,Not masked" bitfld.long 0x08 23. " MSKCLR0_23 ,Clears mask for pin 23" "No effect,Not masked" bitfld.long 0x08 22. " MSKCLR0_22 ,Clears mask for pin 22" "No effect,Not masked" textline " " bitfld.long 0x08 21. " MSKCLR0_21 ,Clears mask for pin 21" "No effect,Not masked" bitfld.long 0x08 20. " MSKCLR0_20 ,Clears mask for pin 20" "No effect,Not masked" bitfld.long 0x08 19. " MSKCLR0_19 ,Clears mask for pin 19" "No effect,Not masked" bitfld.long 0x08 18. " MSKCLR0_18 ,Clears mask for pin 18" "No effect,Not masked" textline " " bitfld.long 0x08 17. " MSKCLR0_17 ,Clears mask for pin 17" "No effect,Not masked" bitfld.long 0x08 16. " MSKCLR0_16 ,Clears mask for pin 16" "No effect,Not masked" bitfld.long 0x08 15. " MSKCLR0_15 ,Clears mask for pin 15" "No effect,Not masked" bitfld.long 0x08 14. " MSKCLR0_14 ,Clears mask for pin 14" "No effect,Not masked" textline " " bitfld.long 0x08 13. " MSKCLR0_13 ,Clears mask for pin 13" "No effect,Not masked" bitfld.long 0x08 12. " MSKCLR0_12 ,Clears mask for pin 12" "No effect,Not masked" bitfld.long 0x08 11. " MSKCLR0_11 ,Clears mask for pin 11" "No effect,Not masked" bitfld.long 0x08 10. " MSKCLR0_10 ,Clears mask for pin 10" "No effect,Not masked" textline " " bitfld.long 0x08 9. " MSKCLR0_9 ,Clears mask for pin 9" "No effect,Not masked" bitfld.long 0x08 8. " MSKCLR0_8 ,Clears mask for pin 8" "No effect,Not masked" bitfld.long 0x08 7. " MSKCLR0_7 ,Clears mask for pin 7" "No effect,Not masked" bitfld.long 0x08 6. " MSKCLR0_6 ,Clears mask for pin 6" "No effect,Not masked" textline " " bitfld.long 0x08 5. " MSKCLR0_5 ,Clears mask for pin 5" "No effect,Not masked" bitfld.long 0x08 4. " MSKCLR0_4 ,Clears mask for pin 4" "No effect,Not masked" bitfld.long 0x08 3. " MSKCLR0_3 ,Clears mask for pin 3" "No effect,Not masked" bitfld.long 0x08 2. " MSKCLR0_2 ,Clears mask for pin 2" "No effect,Not masked" textline " " bitfld.long 0x08 1. " MSKCLR0_1 ,Clears mask for pin 1" "No effect,Not masked" bitfld.long 0x08 0. " MSKCLR0_0 ,Clears mask for pin 0" "No effect,Not masked" line.long 0x0C "POSNEG0,Positive/Negative Logic Select Register 0" bitfld.long 0x0C 31. " POSNEG0_31 ,Selects polarity for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " POSNEG0_30 ,Selects polarity for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " POSNEG0_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG0_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG0_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG0_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " bitfld.long 0x0C 25. " POSNEG0_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG0_24 ,Selects polarity for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " POSNEG0_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG0_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG0_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG0_20 ,Selects polarity for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " POSNEG0_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG0_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG0_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG0_16 ,Selects polarity for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " POSNEG0_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG0_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG0_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG0_12 ,Selects polarity for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " POSNEG0_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG0_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG0_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG0_8 ,Selects polarity for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " POSNEG0_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG0_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG0_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG0_4 ,Selects polarity for pin 4" "Positive,Negative" bitfld.long 0x0C 3. " POSNEG0_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG0_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG0_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG0_0 ,Selects polarity for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL0,Edge/Level Select Register 0" bitfld.long 0x10 31. " EDGLEVEL0_31 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 31" "Level,Edge" bitfld.long 0x10 30. " EDGLEVEL0_30 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 30" "Level,Edge" bitfld.long 0x10 29. " EDGLEVEL0_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL0_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL0_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL0_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " bitfld.long 0x10 25. " EDGLEVEL0_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL0_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" bitfld.long 0x10 23. " EDGLEVEL0_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL0_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL0_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL0_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" bitfld.long 0x10 19. " EDGLEVEL0_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL0_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL0_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL0_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" bitfld.long 0x10 15. " EDGLEVEL0_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL0_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL0_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL0_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" bitfld.long 0x10 11. " EDGLEVEL0_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL0_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL0_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL0_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" bitfld.long 0x10 7. " EDGLEVEL0_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL0_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL0_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL0_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" bitfld.long 0x10 3. " EDGLEVEL0_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL0_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL0_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL0_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF0,Chattering Prevention On/Off Register 0" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "S3D4/66000,S3D4/33000,S3D4/16500,S3D4/8250" else bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "CLKP/25000,CLKP/12500,CLKP/6250,CLKP/3125" endif textline " " bitfld.long 0x14 3. " FILONOFF0_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF0_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" bitfld.long 0x14 1. " FILONOFF0_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF0_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" group.long 0x38++0x17 line.long 0x00 "INTMSKS0,Interrupt Sub Mask Register 0" bitfld.long 0x00 31. " INTMSKS0_31 ,Interrupt sub mask 31" "Masked,Not masked" bitfld.long 0x00 30. " INTMSKS0_30 ,Interrupt sub mask 30" "Masked,Not masked" bitfld.long 0x00 29. " INTMSKS0_29 ,Interrupt sub mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS0_28 ,Interrupt sub mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS0_27 ,Interrupt sub mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS0_26 ,Interrupt sub mask 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " INTMSKS0_25 ,Interrupt sub mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS0_24 ,Interrupt sub mask 24" "Masked,Not masked" bitfld.long 0x00 23. " INTMSKS0_23 ,Interrupt sub mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS0_22 ,Interrupt sub mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS0_21 ,Interrupt sub mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS0_20 ,Interrupt sub mask 20" "Masked,Not masked" bitfld.long 0x00 19. " INTMSKS0_19 ,Interrupt sub mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS0_18 ,Interrupt sub mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS0_17 ,Interrupt sub mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS0_16 ,Interrupt sub mask 16" "Masked,Not masked" bitfld.long 0x00 15. " INTMSKS0_15 ,Interrupt sub mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS0_14 ,Interrupt sub mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS0_13 ,Interrupt sub mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS0_12 ,Interrupt sub mask 12" "Masked,Not masked" bitfld.long 0x00 11. " INTMSKS0_11 ,Interrupt sub mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS0_10 ,Interrupt sub mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS0_9 ,Interrupt sub mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS0_8 ,Interrupt sub mask 8" "Masked,Not masked" bitfld.long 0x00 7. " INTMSKS0_7 ,Interrupt sub mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS0_6 ,Interrupt sub mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS0_5 ,Interrupt sub mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS0_4 ,Interrupt sub mask 4" "Masked,Not masked" bitfld.long 0x00 3. " INTMSKS0_3 ,Interrupt sub mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS0_2 ,Interrupt sub mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS0_1 ,Interrupt sub mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS0_0 ,Interrupt sub mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS0,Interrupt Sub Mask Clear Register 0" bitfld.long 0x04 31. " MSKCLRS0_31 ,Interrupt sub mask clear 31" "No effect,Masked" bitfld.long 0x04 30. " MSKCLRS0_30 ,Interrupt sub mask clear 30" "No effect,Masked" bitfld.long 0x04 29. " MSKCLRS0_29 ,Interrupt sub mask clear 29" "No effect,Masked" bitfld.long 0x04 28. " MSKCLRS0_28 ,Interrupt sub mask clear 28" "No effect,Masked" textline " " bitfld.long 0x04 27. " MSKCLRS0_27 ,Interrupt sub mask clear 27" "No effect,Masked" bitfld.long 0x04 26. " MSKCLRS0_26 ,Interrupt sub mask clear 26" "No effect,Masked" textline " " bitfld.long 0x04 25. " MSKCLRS0_25 ,Interrupt sub mask clear 25" "No effect,Masked" bitfld.long 0x04 24. " MSKCLRS0_24 ,Interrupt sub mask clear 24" "No effect,Masked" bitfld.long 0x04 23. " MSKCLRS0_23 ,Interrupt sub mask clear 23" "No effect,Masked" bitfld.long 0x04 22. " MSKCLRS0_22 ,Interrupt sub mask clear 22" "No effect,Masked" textline " " bitfld.long 0x04 21. " MSKCLRS0_21 ,Interrupt sub mask clear 21" "No effect,Masked" bitfld.long 0x04 20. " MSKCLRS0_20 ,Interrupt sub mask clear 20" "No effect,Masked" bitfld.long 0x04 19. " MSKCLRS0_19 ,Interrupt sub mask clear 19" "No effect,Masked" bitfld.long 0x04 18. " MSKCLRS0_18 ,Interrupt sub mask clear 18" "No effect,Masked" textline " " bitfld.long 0x04 17. " MSKCLRS0_17 ,Interrupt sub mask clear 17" "No effect,Masked" bitfld.long 0x04 16. " MSKCLRS0_16 ,Interrupt sub mask clear 16" "No effect,Masked" bitfld.long 0x04 15. " MSKCLRS0_15 ,Interrupt sub mask clear 15" "No effect,Masked" bitfld.long 0x04 14. " MSKCLRS0_14 ,Interrupt sub mask clear 14" "No effect,Masked" textline " " bitfld.long 0x04 13. " MSKCLRS0_13 ,Interrupt sub mask clear 13" "No effect,Masked" bitfld.long 0x04 12. " MSKCLRS0_12 ,Interrupt sub mask clear 12" "No effect,Masked" bitfld.long 0x04 11. " MSKCLRS0_11 ,Interrupt sub mask clear 11" "No effect,Masked" bitfld.long 0x04 10. " MSKCLRS0_10 ,Interrupt sub mask clear 10" "No effect,Masked" textline " " bitfld.long 0x04 9. " MSKCLRS0_9 ,Interrupt sub mask clear 9" "No effect,Masked" bitfld.long 0x04 8. " MSKCLRS0_8 ,Interrupt sub mask clear 8" "No effect,Masked" bitfld.long 0x04 7. " MSKCLRS0_7 ,Interrupt sub mask clear 7" "No effect,Masked" bitfld.long 0x04 6. " MSKCLRS0_6 ,Interrupt sub mask clear 6" "No effect,Masked" textline " " bitfld.long 0x04 5. " MSKCLRS0_5 ,Interrupt sub mask clear 5" "No effect,Masked" bitfld.long 0x04 4. " MSKCLRS0_4 ,Interrupt sub mask clear 4" "No effect,Masked" bitfld.long 0x04 3. " MSKCLRS0_3 ,Interrupt sub mask clear 3" "No effect,Masked" bitfld.long 0x04 2. " MSKCLRS0_2 ,Interrupt sub mask clear 2" "No effect,Masked" textline " " bitfld.long 0x04 1. " MSKCLRS0_1 ,Interrupt sub mask clear 1" "No effect,Masked" bitfld.long 0x04 0. " MSKCLRS0_0 ,Interrupt sub mask clear 0" "No effect,Masked" line.long 0x08 "OUTDTSEL0,Output Data Select Register 0" bitfld.long 0x08 31. " OUTDTSEL0_31 ,Output data select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " OUTDTSEL0_30 ,Output data select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " OUTDTSEL0_29 ,Output data select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL0_28 ,Output data select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL0_27 ,Output data select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL0_26 ,Output data select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " OUTDTSEL0_25 ,Output data select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL0_24 ,Output data select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " OUTDTSEL0_23 ,Output data select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL0_22 ,Output data select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL0_21 ,Output data select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL0_20 ,Output data select 20" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 19. " OUTDTSEL0_19 ,Output data select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL0_18 ,Output data select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL0_17 ,Output data select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL0_16 ,Output data select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " OUTDTSEL0_15 ,Output data select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL0_14 ,Output data select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL0_13 ,Output data select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL0_12 ,Output data select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " OUTDTSEL0_11 ,Output data select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL0_10 ,Output data select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL0_9 ,Output data select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL0_8 ,Output data select 8" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 7. " OUTDTSEL0_7 ,Output data select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL0_6 ,Output data select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL0_5 ,Output data select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL0_4 ,Output data select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " OUTDTSEL0_3 ,Output data select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL0_2 ,Output data select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL0_1 ,Output data select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL0_0 ,Output data select 0" "OUTDT,OUTDTH/OUTDTL" line.long 0x0C "OUTDTH0,Output Data High Register 0" bitfld.long 0x0C 31. " OUTDTH0_31 ,Output data high 31" "Not valid,Valid" bitfld.long 0x0C 30. " OUTDTH0_30 ,Output data high 30" "Not valid,Valid" bitfld.long 0x0C 29. " OUTDTH0_29 ,Output data high 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH0_28 ,Output data high 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH0_27 ,Output data high 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH0_26 ,Output data high 26" "Not valid,Valid" textline " " bitfld.long 0x0C 25. " OUTDTH0_25 ,Output data high 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH0_24 ,Output data high 24" "Not valid,Valid" bitfld.long 0x0C 23. " OUTDTH0_23 ,Output data high 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH0_22 ,Output data high 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH0_21 ,Output data high 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH0_20 ,Output data high 20" "Not valid,Valid" bitfld.long 0x0C 19. " OUTDTH0_19 ,Output data high 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH0_18 ,Output data high 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH0_17 ,Output data high 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH0_16 ,Output data high 16" "Not valid,Valid" bitfld.long 0x0C 15. " OUTDTH0_15 ,Output data high 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH0_14 ,Output data high 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH0_13 ,Output data high 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH0_12 ,Output data high 12" "Not valid,Valid" bitfld.long 0x0C 11. " OUTDTH0_11 ,Output data high 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH0_10 ,Output data high 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH0_9 ,Output data high 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH0_8 ,Output data high 8" "Not valid,Valid" bitfld.long 0x0C 7. " OUTDTH0_7 ,Output data high 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH0_6 ,Output data high 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH0_5 ,Output data high 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH0_4 ,Output data high 4" "Not valid,Valid" bitfld.long 0x0C 3. " OUTDTH0_3 ,Output data high 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH0_2 ,Output data high 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH0_1 ,Output data high 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH0_0 ,Output data high 0" "Not valid,Valid" line.long 0x10 "OUTDTL0,Output Data Low Register 0" bitfld.long 0x10 31. " OUTDTL0_31 ,Output data low 31" "Not valid,Valid" bitfld.long 0x10 30. " OUTDTL0_30 ,Output data low 30" "Not valid,Valid" bitfld.long 0x10 29. " OUTDTL0_29 ,Output data low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL0_28 ,Output data low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL0_27 ,Output data low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL0_26 ,Output data low 26" "Not valid,Valid" textline " " bitfld.long 0x10 25. " OUTDTL0_25 ,Output data low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL0_24 ,Output data low 24" "Not valid,Valid" bitfld.long 0x10 23. " OUTDTL0_23 ,Output data low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL0_22 ,Output data low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL0_21 ,Output data low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL0_20 ,Output data low 20" "Not valid,Valid" bitfld.long 0x10 19. " OUTDTL0_19 ,Output data low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL0_18 ,Output data low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL0_17 ,Output data low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL0_16 ,Output data low 16" "Not valid,Valid" bitfld.long 0x10 15. " OUTDTL0_15 ,Output data low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL0_14 ,Output data low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL0_13 ,Output data low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL0_12 ,Output data low 12" "Not valid,Valid" bitfld.long 0x10 11. " OUTDTL0_11 ,Output data low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL0_10 ,Output data low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL0_9 ,Output data low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL0_8 ,Output data low 8" "Not valid,Valid" bitfld.long 0x10 7. " OUTDTL0_7 ,Output data low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL0_6 ,Output data low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL0_5 ,Output data low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL0_4 ,Output data low 4" "Not valid,Valid" bitfld.long 0x10 3. " OUTDTL0_3 ,Output data low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL0_2 ,Output data low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL0_1 ,Output data low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL0_0 ,Output data low 0" "Not valid,Valid" line.long 0x14 "BOTHEDGE0,One Edge/Both Edge Select Register 0" bitfld.long 0x14 31. " BOTHEDGE0_31 ,One edge/both edge select 31" "One,Both" bitfld.long 0x14 30. " BOTHEDGE0_30 ,One edge/both edge select 30" "One,Both" bitfld.long 0x14 29. " BOTHEDGE0_29 ,One edge/both edge select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE0_28 ,One edge/both edge select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE0_27 ,One edge/both edge select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE0_26 ,One edge/both edge select 26" "One,Both" textline " " bitfld.long 0x14 25. " BOTHEDGE0_25 ,One edge/both edge select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE0_24 ,One edge/both edge select 24" "One,Both" bitfld.long 0x14 23. " BOTHEDGE0_23 ,One edge/both edge select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE0_22 ,One edge/both edge select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE0_21 ,One edge/both edge select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE0_20 ,One edge/both edge select 20" "One,Both" bitfld.long 0x14 19. " BOTHEDGE0_19 ,One edge/both edge select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE0_18 ,One edge/both edge select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE0_17 ,One edge/both edge select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE0_16 ,One edge/both edge select 16" "One,Both" bitfld.long 0x14 15. " BOTHEDGE0_15 ,One edge/both edge select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE0_14 ,One edge/both edge select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE0_13 ,One edge/both edge select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE0_12 ,One edge/both edge select 12" "One,Both" bitfld.long 0x14 11. " BOTHEDGE0_11 ,One edge/both edge select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE0_10 ,One edge/both edge select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE0_9 ,One edge/both edge select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE0_8 ,One edge/both edge select 8" "One,Both" bitfld.long 0x14 7. " BOTHEDGE0_7 ,One edge/both edge select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE0_6 ,One edge/both edge select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE0_5 ,One edge/both edge select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE0_4 ,One edge/both edge select 4" "One,Both" bitfld.long 0x14 3. " BOTHEDGE0_3 ,One edge/both edge select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE0_2 ,One edge/both edge select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE0_1 ,One edge/both edge select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE0_0 ,One edge/both edge select 0" "One,Both" width 0xB tree.end tree "GPIO 1" base ad:0xE6051000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL1,General IO/Interrupt Switching Register 1" bitfld.long 0x00 25. " IOINTSEL1_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL1_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" bitfld.long 0x00 23. " IOINTSEL1_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL1_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL1_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL1_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " IOINTSEL1_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL1_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL1_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL1_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" bitfld.long 0x00 15. " IOINTSEL1_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL1_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL1_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL1_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " IOINTSEL1_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL1_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL1_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL1_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" bitfld.long 0x00 7. " IOINTSEL1_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL1_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL1_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL1_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " IOINTSEL1_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL1_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL1_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL1_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL1,General Input/Output Switching Register 1" bitfld.long 0x04 25. " INOUTSEL1_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL1_24 ,General input or output mode select for channel 24" "Input,Output" bitfld.long 0x04 23. " INOUTSEL1_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL1_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL1_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL1_20 ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " INOUTSEL1_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL1_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL1_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL1_16 ,General input or output mode select for channel 16" "Input,Output" bitfld.long 0x04 15. " INOUTSEL1_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL1_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL1_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL1_12 ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " INOUTSEL1_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL1_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL1_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL1_8 ,General input or output mode select for channel 8" "Input,Output" bitfld.long 0x04 7. " INOUTSEL1_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL1_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL1_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL1_4 ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " INOUTSEL1_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL1_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL1_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL1_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT1,General Output Register 1" bitfld.long 0x08 25. " OUTDT1_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT1_24 ,Output value for channel 24" "0,1" bitfld.long 0x08 23. " OUTDT1_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT1_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT1_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT1_20 ,Output value for channel 20" "0,1" bitfld.long 0x08 19. " OUTDT1_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT1_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT1_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT1_16 ,Output value for channel 16" "0,1" bitfld.long 0x08 15. " OUTDT1_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT1_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT1_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT1_12 ,Output value for channel 12" "0,1" bitfld.long 0x08 11. " OUTDT1_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT1_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT1_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT1_8 ,Output value for channel 8" "0,1" bitfld.long 0x08 7. " OUTDT1_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT1_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT1_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT1_4 ,Output value for channel 4" "0,1" bitfld.long 0x08 3. " OUTDT1_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT1_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT1_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT1_0 ,Output value for channel 0" "0,1" rgroup.long 0x0C++0x07 line.long 0x00 "INDT1,General Input Register 1" bitfld.long 0x00 25. " INDT1_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT1_24 ,Value received through pin 24" "0,1" bitfld.long 0x00 23. " INDT1_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT1_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT1_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT1_20 ,Value received through pin 20" "0,1" bitfld.long 0x00 19. " INDT1_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT1_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT1_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT1_16 ,Value received through pin 16" "0,1" bitfld.long 0x00 15. " INDT1_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT1_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT1_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT1_12 ,Value received through pin 12" "0,1" bitfld.long 0x00 11. " INDT1_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT1_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT1_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT1_8 ,Value received through pin 8" "0,1" bitfld.long 0x00 7. " INDT1_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT1_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT1_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT1_4 ,Value received through pin 4" "0,1" bitfld.long 0x00 3. " INDT1_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT1_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT1_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT1_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT1,Interrupt Display Register 1" bitfld.long 0x04 25. " INTDT1_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT1_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " INTDT1_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT1_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT1_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT1_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " INTDT1_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT1_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT1_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT1_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " INTDT1_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT1_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT1_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT1_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " INTDT1_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT1_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT1_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT1_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " INTDT1_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT1_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT1_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT1_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" bitfld.long 0x04 3. " INTDT1_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT1_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT1_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT1_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR1,Interrupt Clear Register 1" bitfld.long 0x00 25. " INTCLR1_25 ,Clears pin 25 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 24. " INTCLR1_24 ,Clears pin 24 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 23. " INTCLR1_23 ,Clears pin 23 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 22. " INTCLR1_22 ,Clears pin 22 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 21. " INTCLR1_21 ,Clears pin 21 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 20. " INTCLR1_20 ,Clears pin 20 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 19. " INTCLR1_19 ,Clears pin 19 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 18. " INTCLR1_18 ,Clears pin 18 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 17. " INTCLR1_17 ,Clears pin 17 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 16. " INTCLR1_16 ,Clears pin 16 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 15. " INTCLR1_15 ,Clears pin 15 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 14. " INTCLR1_14 ,Clears pin 14 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 13. " INTCLR1_13 ,Clears pin 13 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 12. " INTCLR1_12 ,Clears pin 12 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 11. " INTCLR1_11 ,Clears pin 11 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 10. " INTCLR1_10 ,Clears pin 10 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 9. " INTCLR1_9 ,Clears pin 9 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 8. " INTCLR1_8 ,Clears pin 8 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 7. " INTCLR1_7 ,Clears pin 7 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 6. " INTCLR1_6 ,Clears pin 6 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 5. " INTCLR1_5 ,Clears pin 5 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 4. " INTCLR1_4 ,Clears pin 4 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 3. " INTCLR1_3 ,Clears pin 3 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 2. " INTCLR1_2 ,Clears pin 2 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 1. " INTCLR1_1 ,Clears pin 1 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 0. " INTCLR1_0 ,Clears pin 0 bit in the interrupt display register" "No effect,Clear" line.long 0x04 "INTMSK1,Interrupt Mask Register 1" bitfld.long 0x04 25. " INTMSK1_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK1_24 ,Masks interrupt request for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " INTMSK1_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK1_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK1_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK1_20 ,Masks interrupt request for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " INTMSK1_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK1_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK1_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK1_16 ,Masks interrupt request for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " INTMSK1_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK1_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK1_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK1_12 ,Masks interrupt request for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " INTMSK1_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK1_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK1_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK1_8 ,Masks interrupt request for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " INTMSK1_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK1_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK1_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK1_4 ,Masks interrupt request for pin 4" "Masked,Not masked" bitfld.long 0x04 3. " INTMSK1_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK1_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK1_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK1_0 ,Masks interrupt request for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR1,Interrupt Mask Clear Register 1" bitfld.long 0x08 25. " MSKCLR1_25 ,Clears mask for pin 25" "No effect,Not masked" bitfld.long 0x08 24. " MSKCLR1_24 ,Clears mask for pin 24" "No effect,Not masked" bitfld.long 0x08 23. " MSKCLR1_23 ,Clears mask for pin 23" "No effect,Not masked" bitfld.long 0x08 22. " MSKCLR1_22 ,Clears mask for pin 22" "No effect,Not masked" textline " " bitfld.long 0x08 21. " MSKCLR1_21 ,Clears mask for pin 21" "No effect,Not masked" bitfld.long 0x08 20. " MSKCLR1_20 ,Clears mask for pin 20" "No effect,Not masked" bitfld.long 0x08 19. " MSKCLR1_19 ,Clears mask for pin 19" "No effect,Not masked" bitfld.long 0x08 18. " MSKCLR1_18 ,Clears mask for pin 18" "No effect,Not masked" textline " " bitfld.long 0x08 17. " MSKCLR1_17 ,Clears mask for pin 17" "No effect,Not masked" bitfld.long 0x08 16. " MSKCLR1_16 ,Clears mask for pin 16" "No effect,Not masked" bitfld.long 0x08 15. " MSKCLR1_15 ,Clears mask for pin 15" "No effect,Not masked" bitfld.long 0x08 14. " MSKCLR1_14 ,Clears mask for pin 14" "No effect,Not masked" textline " " bitfld.long 0x08 13. " MSKCLR1_13 ,Clears mask for pin 13" "No effect,Not masked" bitfld.long 0x08 12. " MSKCLR1_12 ,Clears mask for pin 12" "No effect,Not masked" bitfld.long 0x08 11. " MSKCLR1_11 ,Clears mask for pin 11" "No effect,Not masked" bitfld.long 0x08 10. " MSKCLR1_10 ,Clears mask for pin 10" "No effect,Not masked" textline " " bitfld.long 0x08 9. " MSKCLR1_9 ,Clears mask for pin 9" "No effect,Not masked" bitfld.long 0x08 8. " MSKCLR1_8 ,Clears mask for pin 8" "No effect,Not masked" bitfld.long 0x08 7. " MSKCLR1_7 ,Clears mask for pin 7" "No effect,Not masked" bitfld.long 0x08 6. " MSKCLR1_6 ,Clears mask for pin 6" "No effect,Not masked" textline " " bitfld.long 0x08 5. " MSKCLR1_5 ,Clears mask for pin 5" "No effect,Not masked" bitfld.long 0x08 4. " MSKCLR1_4 ,Clears mask for pin 4" "No effect,Not masked" bitfld.long 0x08 3. " MSKCLR1_3 ,Clears mask for pin 3" "No effect,Not masked" bitfld.long 0x08 2. " MSKCLR1_2 ,Clears mask for pin 2" "No effect,Not masked" textline " " bitfld.long 0x08 1. " MSKCLR1_1 ,Clears mask for pin 1" "No effect,Not masked" bitfld.long 0x08 0. " MSKCLR1_0 ,Clears mask for pin 0" "No effect,Not masked" line.long 0x0C "POSNEG1,Positive/Negative Logic Select Register 1" bitfld.long 0x0C 25. " POSNEG1_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG1_24 ,Selects polarity for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " POSNEG1_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG1_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG1_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG1_20 ,Selects polarity for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " POSNEG1_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG1_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG1_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG1_16 ,Selects polarity for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " POSNEG1_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG1_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG1_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG1_12 ,Selects polarity for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " POSNEG1_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG1_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG1_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG1_8 ,Selects polarity for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " POSNEG1_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG1_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG1_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG1_4 ,Selects polarity for pin 4" "Positive,Negative" bitfld.long 0x0C 3. " POSNEG1_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG1_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG1_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG1_0 ,Selects polarity for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL1,Edge/Level Select Register 1" bitfld.long 0x10 25. " EDGLEVEL1_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL1_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" bitfld.long 0x10 23. " EDGLEVEL1_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL1_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL1_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL1_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" bitfld.long 0x10 19. " EDGLEVEL1_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL1_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL1_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL1_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" bitfld.long 0x10 15. " EDGLEVEL1_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL1_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL1_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL1_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" bitfld.long 0x10 11. " EDGLEVEL1_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL1_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL1_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL1_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" bitfld.long 0x10 7. " EDGLEVEL1_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL1_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL1_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL1_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" bitfld.long 0x10 3. " EDGLEVEL1_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL1_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL1_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL1_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF1,Chattering Prevention On/Off Register 1" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "S3D4/66000,S3D4/33000,S3D4/16500,S3D4/8250" else bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "CLKP/25000,CLKP/12500,CLKP/6250,CLKP/3125" endif textline " " bitfld.long 0x14 3. " FILONOFF1_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF1_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" bitfld.long 0x14 1. " FILONOFF1_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF1_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" group.long 0x38++0x17 line.long 0x00 "INTMSKS1,Interrupt Sub Mask Register 1" bitfld.long 0x00 25. " INTMSKS1_25 ,Interrupt sub mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS1_24 ,Interrupt sub mask 24" "Masked,Not masked" bitfld.long 0x00 23. " INTMSKS1_23 ,Interrupt sub mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS1_22 ,Interrupt sub mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS1_21 ,Interrupt sub mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS1_20 ,Interrupt sub mask 20" "Masked,Not masked" bitfld.long 0x00 19. " INTMSKS1_19 ,Interrupt sub mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS1_18 ,Interrupt sub mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS1_17 ,Interrupt sub mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS1_16 ,Interrupt sub mask 16" "Masked,Not masked" bitfld.long 0x00 15. " INTMSKS1_15 ,Interrupt sub mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS1_14 ,Interrupt sub mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS1_13 ,Interrupt sub mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS1_12 ,Interrupt sub mask 12" "Masked,Not masked" bitfld.long 0x00 11. " INTMSKS1_11 ,Interrupt sub mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS1_10 ,Interrupt sub mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS1_9 ,Interrupt sub mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS1_8 ,Interrupt sub mask 8" "Masked,Not masked" bitfld.long 0x00 7. " INTMSKS1_7 ,Interrupt sub mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS1_6 ,Interrupt sub mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS1_5 ,Interrupt sub mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS1_4 ,Interrupt sub mask 4" "Masked,Not masked" bitfld.long 0x00 3. " INTMSKS1_3 ,Interrupt sub mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS1_2 ,Interrupt sub mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS1_1 ,Interrupt sub mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS1_0 ,Interrupt sub mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS1,Interrupt Sub Mask Clear Register 1" bitfld.long 0x04 25. " MSKCLRS1_25 ,Interrupt sub mask clear 25" "No effect,Masked" bitfld.long 0x04 24. " MSKCLRS1_24 ,Interrupt sub mask clear 24" "No effect,Masked" bitfld.long 0x04 23. " MSKCLRS1_23 ,Interrupt sub mask clear 23" "No effect,Masked" bitfld.long 0x04 22. " MSKCLRS1_22 ,Interrupt sub mask clear 22" "No effect,Masked" textline " " bitfld.long 0x04 21. " MSKCLRS1_21 ,Interrupt sub mask clear 21" "No effect,Masked" bitfld.long 0x04 20. " MSKCLRS1_20 ,Interrupt sub mask clear 20" "No effect,Masked" bitfld.long 0x04 19. " MSKCLRS1_19 ,Interrupt sub mask clear 19" "No effect,Masked" bitfld.long 0x04 18. " MSKCLRS1_18 ,Interrupt sub mask clear 18" "No effect,Masked" textline " " bitfld.long 0x04 17. " MSKCLRS1_17 ,Interrupt sub mask clear 17" "No effect,Masked" bitfld.long 0x04 16. " MSKCLRS1_16 ,Interrupt sub mask clear 16" "No effect,Masked" bitfld.long 0x04 15. " MSKCLRS1_15 ,Interrupt sub mask clear 15" "No effect,Masked" bitfld.long 0x04 14. " MSKCLRS1_14 ,Interrupt sub mask clear 14" "No effect,Masked" textline " " bitfld.long 0x04 13. " MSKCLRS1_13 ,Interrupt sub mask clear 13" "No effect,Masked" bitfld.long 0x04 12. " MSKCLRS1_12 ,Interrupt sub mask clear 12" "No effect,Masked" bitfld.long 0x04 11. " MSKCLRS1_11 ,Interrupt sub mask clear 11" "No effect,Masked" bitfld.long 0x04 10. " MSKCLRS1_10 ,Interrupt sub mask clear 10" "No effect,Masked" textline " " bitfld.long 0x04 9. " MSKCLRS1_9 ,Interrupt sub mask clear 9" "No effect,Masked" bitfld.long 0x04 8. " MSKCLRS1_8 ,Interrupt sub mask clear 8" "No effect,Masked" bitfld.long 0x04 7. " MSKCLRS1_7 ,Interrupt sub mask clear 7" "No effect,Masked" bitfld.long 0x04 6. " MSKCLRS1_6 ,Interrupt sub mask clear 6" "No effect,Masked" textline " " bitfld.long 0x04 5. " MSKCLRS1_5 ,Interrupt sub mask clear 5" "No effect,Masked" bitfld.long 0x04 4. " MSKCLRS1_4 ,Interrupt sub mask clear 4" "No effect,Masked" bitfld.long 0x04 3. " MSKCLRS1_3 ,Interrupt sub mask clear 3" "No effect,Masked" bitfld.long 0x04 2. " MSKCLRS1_2 ,Interrupt sub mask clear 2" "No effect,Masked" textline " " bitfld.long 0x04 1. " MSKCLRS1_1 ,Interrupt sub mask clear 1" "No effect,Masked" bitfld.long 0x04 0. " MSKCLRS1_0 ,Interrupt sub mask clear 0" "No effect,Masked" line.long 0x08 "OUTDTSEL1,Output Data Select Register 1" bitfld.long 0x08 25. " OUTDTSEL1_25 ,Output data select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL1_24 ,Output data select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " OUTDTSEL1_23 ,Output data select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL1_22 ,Output data select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL1_21 ,Output data select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL1_20 ,Output data select 20" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 19. " OUTDTSEL1_19 ,Output data select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL1_18 ,Output data select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL1_17 ,Output data select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL1_16 ,Output data select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " OUTDTSEL1_15 ,Output data select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL1_14 ,Output data select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL1_13 ,Output data select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL1_12 ,Output data select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " OUTDTSEL1_11 ,Output data select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL1_10 ,Output data select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL1_9 ,Output data select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL1_8 ,Output data select 8" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 7. " OUTDTSEL1_7 ,Output data select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL1_6 ,Output data select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL1_5 ,Output data select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL1_4 ,Output data select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " OUTDTSEL1_3 ,Output data select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL1_2 ,Output data select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL1_1 ,Output data select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL1_0 ,Output data select 0" "OUTDT,OUTDTH/OUTDTL" line.long 0x0C "OUTDTH1,Output Data High Register 1" bitfld.long 0x0C 25. " OUTDTH1_25 ,Output data high 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH1_24 ,Output data high 24" "Not valid,Valid" bitfld.long 0x0C 23. " OUTDTH1_23 ,Output data high 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH1_22 ,Output data high 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH1_21 ,Output data high 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH1_20 ,Output data high 20" "Not valid,Valid" bitfld.long 0x0C 19. " OUTDTH1_19 ,Output data high 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH1_18 ,Output data high 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH1_17 ,Output data high 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH1_16 ,Output data high 16" "Not valid,Valid" bitfld.long 0x0C 15. " OUTDTH1_15 ,Output data high 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH1_14 ,Output data high 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH1_13 ,Output data high 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH1_12 ,Output data high 12" "Not valid,Valid" bitfld.long 0x0C 11. " OUTDTH1_11 ,Output data high 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH1_10 ,Output data high 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH1_9 ,Output data high 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH1_8 ,Output data high 8" "Not valid,Valid" bitfld.long 0x0C 7. " OUTDTH1_7 ,Output data high 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH1_6 ,Output data high 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH1_5 ,Output data high 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH1_4 ,Output data high 4" "Not valid,Valid" bitfld.long 0x0C 3. " OUTDTH1_3 ,Output data high 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH1_2 ,Output data high 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH1_1 ,Output data high 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH1_0 ,Output data high 0" "Not valid,Valid" line.long 0x10 "OUTDTL1,Output Data Low Register 1" bitfld.long 0x10 25. " OUTDTL1_25 ,Output data low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL1_24 ,Output data low 24" "Not valid,Valid" bitfld.long 0x10 23. " OUTDTL1_23 ,Output data low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL1_22 ,Output data low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL1_21 ,Output data low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL1_20 ,Output data low 20" "Not valid,Valid" bitfld.long 0x10 19. " OUTDTL1_19 ,Output data low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL1_18 ,Output data low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL1_17 ,Output data low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL1_16 ,Output data low 16" "Not valid,Valid" bitfld.long 0x10 15. " OUTDTL1_15 ,Output data low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL1_14 ,Output data low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL1_13 ,Output data low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL1_12 ,Output data low 12" "Not valid,Valid" bitfld.long 0x10 11. " OUTDTL1_11 ,Output data low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL1_10 ,Output data low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL1_9 ,Output data low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL1_8 ,Output data low 8" "Not valid,Valid" bitfld.long 0x10 7. " OUTDTL1_7 ,Output data low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL1_6 ,Output data low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL1_5 ,Output data low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL1_4 ,Output data low 4" "Not valid,Valid" bitfld.long 0x10 3. " OUTDTL1_3 ,Output data low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL1_2 ,Output data low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL1_1 ,Output data low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL1_0 ,Output data low 0" "Not valid,Valid" line.long 0x14 "BOTHEDGE1,One Edge/Both Edge Select Register 1" bitfld.long 0x14 25. " BOTHEDGE1_25 ,One edge/both edge select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE1_24 ,One edge/both edge select 24" "One,Both" bitfld.long 0x14 23. " BOTHEDGE1_23 ,One edge/both edge select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE1_22 ,One edge/both edge select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE1_21 ,One edge/both edge select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE1_20 ,One edge/both edge select 20" "One,Both" bitfld.long 0x14 19. " BOTHEDGE1_19 ,One edge/both edge select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE1_18 ,One edge/both edge select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE1_17 ,One edge/both edge select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE1_16 ,One edge/both edge select 16" "One,Both" bitfld.long 0x14 15. " BOTHEDGE1_15 ,One edge/both edge select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE1_14 ,One edge/both edge select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE1_13 ,One edge/both edge select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE1_12 ,One edge/both edge select 12" "One,Both" bitfld.long 0x14 11. " BOTHEDGE1_11 ,One edge/both edge select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE1_10 ,One edge/both edge select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE1_9 ,One edge/both edge select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE1_8 ,One edge/both edge select 8" "One,Both" bitfld.long 0x14 7. " BOTHEDGE1_7 ,One edge/both edge select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE1_6 ,One edge/both edge select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE1_5 ,One edge/both edge select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE1_4 ,One edge/both edge select 4" "One,Both" bitfld.long 0x14 3. " BOTHEDGE1_3 ,One edge/both edge select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE1_2 ,One edge/both edge select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE1_1 ,One edge/both edge select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE1_0 ,One edge/both edge select 0" "One,Both" width 0xB tree.end tree "GPIO 2" base ad:0xE6052000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL2,General IO/Interrupt Switching Register 2" bitfld.long 0x00 31. " IOINTSEL2_31 ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " IOINTSEL2_30 ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " IOINTSEL2_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL2_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL2_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL2_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " bitfld.long 0x00 25. " IOINTSEL2_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL2_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" bitfld.long 0x00 23. " IOINTSEL2_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL2_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL2_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL2_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " IOINTSEL2_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL2_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL2_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL2_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" bitfld.long 0x00 15. " IOINTSEL2_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL2_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL2_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL2_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " IOINTSEL2_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL2_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL2_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL2_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" bitfld.long 0x00 7. " IOINTSEL2_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL2_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL2_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL2_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " IOINTSEL2_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL2_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL2_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL2_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL2,General Input/Output Switching Register 2" bitfld.long 0x04 31. " INOUTSEL2_31 ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " INOUTSEL2_30 ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " INOUTSEL2_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL2_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL2_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL2_26 ,General input or output mode select for channel 26" "Input,Output" textline " " bitfld.long 0x04 25. " INOUTSEL2_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL2_24 ,General input or output mode select for channel 24" "Input,Output" bitfld.long 0x04 23. " INOUTSEL2_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL2_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL2_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL2_20 ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " INOUTSEL2_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL2_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL2_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL2_16 ,General input or output mode select for channel 16" "Input,Output" bitfld.long 0x04 15. " INOUTSEL2_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL2_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL2_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL2_12 ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " INOUTSEL2_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL2_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL2_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL2_8 ,General input or output mode select for channel 8" "Input,Output" bitfld.long 0x04 7. " INOUTSEL2_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL2_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL2_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL2_4 ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " INOUTSEL2_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL2_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL2_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL2_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT2,General Output Register 2" bitfld.long 0x08 31. " OUTDT2_31 ,Output value for channel 31" "0,1" bitfld.long 0x08 30. " OUTDT2_30 ,Output value for channel 30" "0,1" bitfld.long 0x08 29. " OUTDT2_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT2_28 ,Output value for channel 28" "0,1" textfld " " textline " " bitfld.long 0x08 27. " OUTDT2_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT2_26 ,Output value for channel 26" "0,1" textline " " bitfld.long 0x08 25. " OUTDT2_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT2_24 ,Output value for channel 24" "0,1" bitfld.long 0x08 23. " OUTDT2_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT2_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT2_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT2_20 ,Output value for channel 20" "0,1" bitfld.long 0x08 19. " OUTDT2_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT2_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT2_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT2_16 ,Output value for channel 16" "0,1" bitfld.long 0x08 15. " OUTDT2_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT2_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT2_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT2_12 ,Output value for channel 12" "0,1" bitfld.long 0x08 11. " OUTDT2_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT2_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT2_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT2_8 ,Output value for channel 8" "0,1" bitfld.long 0x08 7. " OUTDT2_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT2_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT2_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT2_4 ,Output value for channel 4" "0,1" bitfld.long 0x08 3. " OUTDT2_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT2_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT2_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT2_0 ,Output value for channel 0" "0,1" rgroup.long 0x0C++0x07 line.long 0x00 "INDT2,General Input Register 2" bitfld.long 0x00 31. " INDT2_31 ,Value received through pin 31" "0,1" bitfld.long 0x00 30. " INDT2_30 ,Value received through pin 30" "0,1" bitfld.long 0x00 29. " INDT2_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT2_28 ,Value received through pin 28" "0,1" textfld " " textline " " bitfld.long 0x00 27. " INDT2_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT2_26 ,Value received through pin 26" "0,1" textline " " bitfld.long 0x00 25. " INDT2_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT2_24 ,Value received through pin 24" "0,1" bitfld.long 0x00 23. " INDT2_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT2_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT2_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT2_20 ,Value received through pin 20" "0,1" bitfld.long 0x00 19. " INDT2_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT2_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT2_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT2_16 ,Value received through pin 16" "0,1" bitfld.long 0x00 15. " INDT2_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT2_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT2_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT2_12 ,Value received through pin 12" "0,1" bitfld.long 0x00 11. " INDT2_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT2_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT2_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT2_8 ,Value received through pin 8" "0,1" bitfld.long 0x00 7. " INDT2_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT2_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT2_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT2_4 ,Value received through pin 4" "0,1" bitfld.long 0x00 3. " INDT2_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT2_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT2_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT2_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT2,Interrupt Display Register 2" bitfld.long 0x04 31. " INTDT2_31 ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " INTDT2_30 ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " INTDT2_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT2_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT2_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT2_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTDT2_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT2_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " INTDT2_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT2_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT2_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT2_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " INTDT2_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT2_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT2_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT2_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " INTDT2_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT2_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT2_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT2_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " INTDT2_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT2_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT2_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT2_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " INTDT2_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT2_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT2_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT2_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" bitfld.long 0x04 3. " INTDT2_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT2_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT2_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT2_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR2,Interrupt Clear Register 2" bitfld.long 0x00 31. " INTCLR2_31 ,Clears pin 31 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 30. " INTCLR2_30 ,Clears pin 30 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 29. " INTCLR2_29 ,Clears pin 29 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 28. " INTCLR2_28 ,Clears pin 28 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 27. " INTCLR2_27 ,Clears pin 27 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 26. " INTCLR2_26 ,Clears pin 26 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 25. " INTCLR2_25 ,Clears pin 25 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 24. " INTCLR2_24 ,Clears pin 24 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 23. " INTCLR2_23 ,Clears pin 23 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 22. " INTCLR2_22 ,Clears pin 22 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 21. " INTCLR2_21 ,Clears pin 21 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 20. " INTCLR2_20 ,Clears pin 20 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 19. " INTCLR2_19 ,Clears pin 19 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 18. " INTCLR2_18 ,Clears pin 18 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 17. " INTCLR2_17 ,Clears pin 17 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 16. " INTCLR2_16 ,Clears pin 16 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 15. " INTCLR2_15 ,Clears pin 15 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 14. " INTCLR2_14 ,Clears pin 14 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 13. " INTCLR2_13 ,Clears pin 13 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 12. " INTCLR2_12 ,Clears pin 12 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 11. " INTCLR2_11 ,Clears pin 11 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 10. " INTCLR2_10 ,Clears pin 10 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 9. " INTCLR2_9 ,Clears pin 9 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 8. " INTCLR2_8 ,Clears pin 8 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 7. " INTCLR2_7 ,Clears pin 7 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 6. " INTCLR2_6 ,Clears pin 6 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 5. " INTCLR2_5 ,Clears pin 5 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 4. " INTCLR2_4 ,Clears pin 4 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 3. " INTCLR2_3 ,Clears pin 3 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 2. " INTCLR2_2 ,Clears pin 2 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 1. " INTCLR2_1 ,Clears pin 1 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 0. " INTCLR2_0 ,Clears pin 0 bit in the interrupt display register" "No effect,Clear" line.long 0x04 "INTMSK2,Interrupt Mask Register 2" bitfld.long 0x04 31. " INTMSK2_31 ,Masks interrupt request for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " INTMSK2_30 ,Masks interrupt request for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " INTMSK2_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK2_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK2_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK2_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " INTMSK2_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK2_24 ,Masks interrupt request for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " INTMSK2_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK2_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK2_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK2_20 ,Masks interrupt request for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " INTMSK2_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK2_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK2_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK2_16 ,Masks interrupt request for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " INTMSK2_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK2_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK2_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK2_12 ,Masks interrupt request for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " INTMSK2_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK2_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK2_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK2_8 ,Masks interrupt request for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " INTMSK2_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK2_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK2_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK2_4 ,Masks interrupt request for pin 4" "Masked,Not masked" bitfld.long 0x04 3. " INTMSK2_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK2_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK2_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK2_0 ,Masks interrupt request for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR2,Interrupt Mask Clear Register 2" bitfld.long 0x08 31. " MSKCLR2_31 ,Clears mask for pin 31" "No effect,Not masked" bitfld.long 0x08 30. " MSKCLR2_30 ,Clears mask for pin 30" "No effect,Not masked" bitfld.long 0x08 29. " MSKCLR2_29 ,Clears mask for pin 29" "No effect,Not masked" bitfld.long 0x08 28. " MSKCLR2_28 ,Clears mask for pin 28" "No effect,Not masked" textline " " bitfld.long 0x08 27. " MSKCLR2_27 ,Clears mask for pin 27" "No effect,Not masked" bitfld.long 0x08 26. " MSKCLR2_26 ,Clears mask for pin 26" "No effect,Not masked" textline " " bitfld.long 0x08 25. " MSKCLR2_25 ,Clears mask for pin 25" "No effect,Not masked" bitfld.long 0x08 24. " MSKCLR2_24 ,Clears mask for pin 24" "No effect,Not masked" bitfld.long 0x08 23. " MSKCLR2_23 ,Clears mask for pin 23" "No effect,Not masked" bitfld.long 0x08 22. " MSKCLR2_22 ,Clears mask for pin 22" "No effect,Not masked" textline " " bitfld.long 0x08 21. " MSKCLR2_21 ,Clears mask for pin 21" "No effect,Not masked" bitfld.long 0x08 20. " MSKCLR2_20 ,Clears mask for pin 20" "No effect,Not masked" bitfld.long 0x08 19. " MSKCLR2_19 ,Clears mask for pin 19" "No effect,Not masked" bitfld.long 0x08 18. " MSKCLR2_18 ,Clears mask for pin 18" "No effect,Not masked" textline " " bitfld.long 0x08 17. " MSKCLR2_17 ,Clears mask for pin 17" "No effect,Not masked" bitfld.long 0x08 16. " MSKCLR2_16 ,Clears mask for pin 16" "No effect,Not masked" bitfld.long 0x08 15. " MSKCLR2_15 ,Clears mask for pin 15" "No effect,Not masked" bitfld.long 0x08 14. " MSKCLR2_14 ,Clears mask for pin 14" "No effect,Not masked" textline " " bitfld.long 0x08 13. " MSKCLR2_13 ,Clears mask for pin 13" "No effect,Not masked" bitfld.long 0x08 12. " MSKCLR2_12 ,Clears mask for pin 12" "No effect,Not masked" bitfld.long 0x08 11. " MSKCLR2_11 ,Clears mask for pin 11" "No effect,Not masked" bitfld.long 0x08 10. " MSKCLR2_10 ,Clears mask for pin 10" "No effect,Not masked" textline " " bitfld.long 0x08 9. " MSKCLR2_9 ,Clears mask for pin 9" "No effect,Not masked" bitfld.long 0x08 8. " MSKCLR2_8 ,Clears mask for pin 8" "No effect,Not masked" bitfld.long 0x08 7. " MSKCLR2_7 ,Clears mask for pin 7" "No effect,Not masked" bitfld.long 0x08 6. " MSKCLR2_6 ,Clears mask for pin 6" "No effect,Not masked" textline " " bitfld.long 0x08 5. " MSKCLR2_5 ,Clears mask for pin 5" "No effect,Not masked" bitfld.long 0x08 4. " MSKCLR2_4 ,Clears mask for pin 4" "No effect,Not masked" bitfld.long 0x08 3. " MSKCLR2_3 ,Clears mask for pin 3" "No effect,Not masked" bitfld.long 0x08 2. " MSKCLR2_2 ,Clears mask for pin 2" "No effect,Not masked" textline " " bitfld.long 0x08 1. " MSKCLR2_1 ,Clears mask for pin 1" "No effect,Not masked" bitfld.long 0x08 0. " MSKCLR2_0 ,Clears mask for pin 0" "No effect,Not masked" line.long 0x0C "POSNEG2,Positive/Negative Logic Select Register 2" bitfld.long 0x0C 31. " POSNEG2_31 ,Selects polarity for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " POSNEG2_30 ,Selects polarity for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " POSNEG2_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG2_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG2_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG2_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " bitfld.long 0x0C 25. " POSNEG2_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG2_24 ,Selects polarity for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " POSNEG2_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG2_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG2_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG2_20 ,Selects polarity for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " POSNEG2_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG2_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG2_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG2_16 ,Selects polarity for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " POSNEG2_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG2_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG2_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG2_12 ,Selects polarity for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " POSNEG2_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG2_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG2_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG2_8 ,Selects polarity for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " POSNEG2_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG2_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG2_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG2_4 ,Selects polarity for pin 4" "Positive,Negative" bitfld.long 0x0C 3. " POSNEG2_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG2_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG2_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG2_0 ,Selects polarity for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL2,Edge/Level Select Register 2" bitfld.long 0x10 31. " EDGLEVEL2_31 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 31" "Level,Edge" bitfld.long 0x10 30. " EDGLEVEL2_30 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 30" "Level,Edge" bitfld.long 0x10 29. " EDGLEVEL2_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL2_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL2_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL2_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " bitfld.long 0x10 25. " EDGLEVEL2_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL2_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" bitfld.long 0x10 23. " EDGLEVEL2_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL2_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL2_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL2_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" bitfld.long 0x10 19. " EDGLEVEL2_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL2_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL2_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL2_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" bitfld.long 0x10 15. " EDGLEVEL2_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL2_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL2_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL2_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" bitfld.long 0x10 11. " EDGLEVEL2_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL2_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL2_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL2_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" bitfld.long 0x10 7. " EDGLEVEL2_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL2_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL2_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL2_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" bitfld.long 0x10 3. " EDGLEVEL2_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL2_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL2_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL2_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF2,Chattering Prevention On/Off Register 2" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "S3D4/66000,S3D4/33000,S3D4/16500,S3D4/8250" else bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "CLKP/25000,CLKP/12500,CLKP/6250,CLKP/3125" endif textline " " bitfld.long 0x14 3. " FILONOFF2_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF2_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" bitfld.long 0x14 1. " FILONOFF2_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF2_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" group.long 0x38++0x17 line.long 0x00 "INTMSKS2,Interrupt Sub Mask Register 2" bitfld.long 0x00 31. " INTMSKS2_31 ,Interrupt sub mask 31" "Masked,Not masked" bitfld.long 0x00 30. " INTMSKS2_30 ,Interrupt sub mask 30" "Masked,Not masked" bitfld.long 0x00 29. " INTMSKS2_29 ,Interrupt sub mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS2_28 ,Interrupt sub mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS2_27 ,Interrupt sub mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS2_26 ,Interrupt sub mask 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " INTMSKS2_25 ,Interrupt sub mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS2_24 ,Interrupt sub mask 24" "Masked,Not masked" bitfld.long 0x00 23. " INTMSKS2_23 ,Interrupt sub mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS2_22 ,Interrupt sub mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS2_21 ,Interrupt sub mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS2_20 ,Interrupt sub mask 20" "Masked,Not masked" bitfld.long 0x00 19. " INTMSKS2_19 ,Interrupt sub mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS2_18 ,Interrupt sub mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS2_17 ,Interrupt sub mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS2_16 ,Interrupt sub mask 16" "Masked,Not masked" bitfld.long 0x00 15. " INTMSKS2_15 ,Interrupt sub mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS2_14 ,Interrupt sub mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS2_13 ,Interrupt sub mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS2_12 ,Interrupt sub mask 12" "Masked,Not masked" bitfld.long 0x00 11. " INTMSKS2_11 ,Interrupt sub mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS2_10 ,Interrupt sub mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS2_9 ,Interrupt sub mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS2_8 ,Interrupt sub mask 8" "Masked,Not masked" bitfld.long 0x00 7. " INTMSKS2_7 ,Interrupt sub mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS2_6 ,Interrupt sub mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS2_5 ,Interrupt sub mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS2_4 ,Interrupt sub mask 4" "Masked,Not masked" bitfld.long 0x00 3. " INTMSKS2_3 ,Interrupt sub mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS2_2 ,Interrupt sub mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS2_1 ,Interrupt sub mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS2_0 ,Interrupt sub mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS2,Interrupt Sub Mask Clear Register 2" bitfld.long 0x04 31. " MSKCLRS2_31 ,Interrupt sub mask clear 31" "No effect,Masked" bitfld.long 0x04 30. " MSKCLRS2_30 ,Interrupt sub mask clear 30" "No effect,Masked" bitfld.long 0x04 29. " MSKCLRS2_29 ,Interrupt sub mask clear 29" "No effect,Masked" bitfld.long 0x04 28. " MSKCLRS2_28 ,Interrupt sub mask clear 28" "No effect,Masked" textline " " bitfld.long 0x04 27. " MSKCLRS2_27 ,Interrupt sub mask clear 27" "No effect,Masked" bitfld.long 0x04 26. " MSKCLRS2_26 ,Interrupt sub mask clear 26" "No effect,Masked" textline " " bitfld.long 0x04 25. " MSKCLRS2_25 ,Interrupt sub mask clear 25" "No effect,Masked" bitfld.long 0x04 24. " MSKCLRS2_24 ,Interrupt sub mask clear 24" "No effect,Masked" bitfld.long 0x04 23. " MSKCLRS2_23 ,Interrupt sub mask clear 23" "No effect,Masked" bitfld.long 0x04 22. " MSKCLRS2_22 ,Interrupt sub mask clear 22" "No effect,Masked" textline " " bitfld.long 0x04 21. " MSKCLRS2_21 ,Interrupt sub mask clear 21" "No effect,Masked" bitfld.long 0x04 20. " MSKCLRS2_20 ,Interrupt sub mask clear 20" "No effect,Masked" bitfld.long 0x04 19. " MSKCLRS2_19 ,Interrupt sub mask clear 19" "No effect,Masked" bitfld.long 0x04 18. " MSKCLRS2_18 ,Interrupt sub mask clear 18" "No effect,Masked" textline " " bitfld.long 0x04 17. " MSKCLRS2_17 ,Interrupt sub mask clear 17" "No effect,Masked" bitfld.long 0x04 16. " MSKCLRS2_16 ,Interrupt sub mask clear 16" "No effect,Masked" bitfld.long 0x04 15. " MSKCLRS2_15 ,Interrupt sub mask clear 15" "No effect,Masked" bitfld.long 0x04 14. " MSKCLRS2_14 ,Interrupt sub mask clear 14" "No effect,Masked" textline " " bitfld.long 0x04 13. " MSKCLRS2_13 ,Interrupt sub mask clear 13" "No effect,Masked" bitfld.long 0x04 12. " MSKCLRS2_12 ,Interrupt sub mask clear 12" "No effect,Masked" bitfld.long 0x04 11. " MSKCLRS2_11 ,Interrupt sub mask clear 11" "No effect,Masked" bitfld.long 0x04 10. " MSKCLRS2_10 ,Interrupt sub mask clear 10" "No effect,Masked" textline " " bitfld.long 0x04 9. " MSKCLRS2_9 ,Interrupt sub mask clear 9" "No effect,Masked" bitfld.long 0x04 8. " MSKCLRS2_8 ,Interrupt sub mask clear 8" "No effect,Masked" bitfld.long 0x04 7. " MSKCLRS2_7 ,Interrupt sub mask clear 7" "No effect,Masked" bitfld.long 0x04 6. " MSKCLRS2_6 ,Interrupt sub mask clear 6" "No effect,Masked" textline " " bitfld.long 0x04 5. " MSKCLRS2_5 ,Interrupt sub mask clear 5" "No effect,Masked" bitfld.long 0x04 4. " MSKCLRS2_4 ,Interrupt sub mask clear 4" "No effect,Masked" bitfld.long 0x04 3. " MSKCLRS2_3 ,Interrupt sub mask clear 3" "No effect,Masked" bitfld.long 0x04 2. " MSKCLRS2_2 ,Interrupt sub mask clear 2" "No effect,Masked" textline " " bitfld.long 0x04 1. " MSKCLRS2_1 ,Interrupt sub mask clear 1" "No effect,Masked" bitfld.long 0x04 0. " MSKCLRS2_0 ,Interrupt sub mask clear 0" "No effect,Masked" line.long 0x08 "OUTDTSEL2,Output Data Select Register 2" bitfld.long 0x08 31. " OUTDTSEL2_31 ,Output data select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " OUTDTSEL2_30 ,Output data select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " OUTDTSEL2_29 ,Output data select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL2_28 ,Output data select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL2_27 ,Output data select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL2_26 ,Output data select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " OUTDTSEL2_25 ,Output data select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL2_24 ,Output data select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " OUTDTSEL2_23 ,Output data select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL2_22 ,Output data select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL2_21 ,Output data select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL2_20 ,Output data select 20" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 19. " OUTDTSEL2_19 ,Output data select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL2_18 ,Output data select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL2_17 ,Output data select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL2_16 ,Output data select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " OUTDTSEL2_15 ,Output data select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL2_14 ,Output data select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL2_13 ,Output data select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL2_12 ,Output data select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " OUTDTSEL2_11 ,Output data select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL2_10 ,Output data select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL2_9 ,Output data select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL2_8 ,Output data select 8" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 7. " OUTDTSEL2_7 ,Output data select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL2_6 ,Output data select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL2_5 ,Output data select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL2_4 ,Output data select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " OUTDTSEL2_3 ,Output data select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL2_2 ,Output data select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL2_1 ,Output data select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL2_0 ,Output data select 0" "OUTDT,OUTDTH/OUTDTL" line.long 0x0C "OUTDTH2,Output Data High Register 2" bitfld.long 0x0C 31. " OUTDTH2_31 ,Output data high 31" "Not valid,Valid" bitfld.long 0x0C 30. " OUTDTH2_30 ,Output data high 30" "Not valid,Valid" bitfld.long 0x0C 29. " OUTDTH2_29 ,Output data high 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH2_28 ,Output data high 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH2_27 ,Output data high 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH2_26 ,Output data high 26" "Not valid,Valid" textline " " bitfld.long 0x0C 25. " OUTDTH2_25 ,Output data high 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH2_24 ,Output data high 24" "Not valid,Valid" bitfld.long 0x0C 23. " OUTDTH2_23 ,Output data high 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH2_22 ,Output data high 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH2_21 ,Output data high 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH2_20 ,Output data high 20" "Not valid,Valid" bitfld.long 0x0C 19. " OUTDTH2_19 ,Output data high 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH2_18 ,Output data high 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH2_17 ,Output data high 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH2_16 ,Output data high 16" "Not valid,Valid" bitfld.long 0x0C 15. " OUTDTH2_15 ,Output data high 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH2_14 ,Output data high 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH2_13 ,Output data high 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH2_12 ,Output data high 12" "Not valid,Valid" bitfld.long 0x0C 11. " OUTDTH2_11 ,Output data high 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH2_10 ,Output data high 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH2_9 ,Output data high 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH2_8 ,Output data high 8" "Not valid,Valid" bitfld.long 0x0C 7. " OUTDTH2_7 ,Output data high 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH2_6 ,Output data high 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH2_5 ,Output data high 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH2_4 ,Output data high 4" "Not valid,Valid" bitfld.long 0x0C 3. " OUTDTH2_3 ,Output data high 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH2_2 ,Output data high 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH2_1 ,Output data high 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH2_0 ,Output data high 0" "Not valid,Valid" line.long 0x10 "OUTDTL2,Output Data Low Register 2" bitfld.long 0x10 31. " OUTDTL2_31 ,Output data low 31" "Not valid,Valid" bitfld.long 0x10 30. " OUTDTL2_30 ,Output data low 30" "Not valid,Valid" bitfld.long 0x10 29. " OUTDTL2_29 ,Output data low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL2_28 ,Output data low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL2_27 ,Output data low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL2_26 ,Output data low 26" "Not valid,Valid" textline " " bitfld.long 0x10 25. " OUTDTL2_25 ,Output data low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL2_24 ,Output data low 24" "Not valid,Valid" bitfld.long 0x10 23. " OUTDTL2_23 ,Output data low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL2_22 ,Output data low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL2_21 ,Output data low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL2_20 ,Output data low 20" "Not valid,Valid" bitfld.long 0x10 19. " OUTDTL2_19 ,Output data low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL2_18 ,Output data low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL2_17 ,Output data low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL2_16 ,Output data low 16" "Not valid,Valid" bitfld.long 0x10 15. " OUTDTL2_15 ,Output data low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL2_14 ,Output data low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL2_13 ,Output data low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL2_12 ,Output data low 12" "Not valid,Valid" bitfld.long 0x10 11. " OUTDTL2_11 ,Output data low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL2_10 ,Output data low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL2_9 ,Output data low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL2_8 ,Output data low 8" "Not valid,Valid" bitfld.long 0x10 7. " OUTDTL2_7 ,Output data low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL2_6 ,Output data low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL2_5 ,Output data low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL2_4 ,Output data low 4" "Not valid,Valid" bitfld.long 0x10 3. " OUTDTL2_3 ,Output data low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL2_2 ,Output data low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL2_1 ,Output data low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL2_0 ,Output data low 0" "Not valid,Valid" line.long 0x14 "BOTHEDGE2,One Edge/Both Edge Select Register 2" bitfld.long 0x14 31. " BOTHEDGE2_31 ,One edge/both edge select 31" "One,Both" bitfld.long 0x14 30. " BOTHEDGE2_30 ,One edge/both edge select 30" "One,Both" bitfld.long 0x14 29. " BOTHEDGE2_29 ,One edge/both edge select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE2_28 ,One edge/both edge select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE2_27 ,One edge/both edge select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE2_26 ,One edge/both edge select 26" "One,Both" textline " " bitfld.long 0x14 25. " BOTHEDGE2_25 ,One edge/both edge select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE2_24 ,One edge/both edge select 24" "One,Both" bitfld.long 0x14 23. " BOTHEDGE2_23 ,One edge/both edge select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE2_22 ,One edge/both edge select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE2_21 ,One edge/both edge select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE2_20 ,One edge/both edge select 20" "One,Both" bitfld.long 0x14 19. " BOTHEDGE2_19 ,One edge/both edge select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE2_18 ,One edge/both edge select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE2_17 ,One edge/both edge select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE2_16 ,One edge/both edge select 16" "One,Both" bitfld.long 0x14 15. " BOTHEDGE2_15 ,One edge/both edge select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE2_14 ,One edge/both edge select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE2_13 ,One edge/both edge select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE2_12 ,One edge/both edge select 12" "One,Both" bitfld.long 0x14 11. " BOTHEDGE2_11 ,One edge/both edge select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE2_10 ,One edge/both edge select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE2_9 ,One edge/both edge select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE2_8 ,One edge/both edge select 8" "One,Both" bitfld.long 0x14 7. " BOTHEDGE2_7 ,One edge/both edge select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE2_6 ,One edge/both edge select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE2_5 ,One edge/both edge select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE2_4 ,One edge/both edge select 4" "One,Both" bitfld.long 0x14 3. " BOTHEDGE2_3 ,One edge/both edge select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE2_2 ,One edge/both edge select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE2_1 ,One edge/both edge select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE2_0 ,One edge/both edge select 0" "One,Both" width 0xB tree.end tree "GPIO 3" base ad:0xE6053000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL3,General IO/Interrupt Switching Register 3" bitfld.long 0x00 31. " IOINTSEL3_31 ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " IOINTSEL3_30 ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " IOINTSEL3_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL3_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL3_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL3_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " bitfld.long 0x00 25. " IOINTSEL3_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL3_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" bitfld.long 0x00 23. " IOINTSEL3_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL3_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL3_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL3_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " IOINTSEL3_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL3_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL3_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL3_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" bitfld.long 0x00 15. " IOINTSEL3_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL3_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL3_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL3_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " IOINTSEL3_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL3_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL3_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL3_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" bitfld.long 0x00 7. " IOINTSEL3_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL3_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL3_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL3_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " IOINTSEL3_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL3_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL3_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL3_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL3,General Input/Output Switching Register 3" bitfld.long 0x04 31. " INOUTSEL3_31 ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " INOUTSEL3_30 ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " INOUTSEL3_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL3_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL3_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL3_26 ,General input or output mode select for channel 26" "Input,Output" textline " " bitfld.long 0x04 25. " INOUTSEL3_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL3_24 ,General input or output mode select for channel 24" "Input,Output" bitfld.long 0x04 23. " INOUTSEL3_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL3_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL3_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL3_20 ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " INOUTSEL3_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL3_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL3_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL3_16 ,General input or output mode select for channel 16" "Input,Output" bitfld.long 0x04 15. " INOUTSEL3_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL3_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL3_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL3_12 ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " INOUTSEL3_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL3_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL3_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL3_8 ,General input or output mode select for channel 8" "Input,Output" bitfld.long 0x04 7. " INOUTSEL3_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL3_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL3_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL3_4 ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " INOUTSEL3_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL3_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL3_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL3_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT3,General Output Register 3" bitfld.long 0x08 31. " OUTDT3_31 ,Output value for channel 31" "0,1" bitfld.long 0x08 30. " OUTDT3_30 ,Output value for channel 30" "0,1" bitfld.long 0x08 29. " OUTDT3_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT3_28 ,Output value for channel 28" "0,1" textfld " " textline " " bitfld.long 0x08 27. " OUTDT3_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT3_26 ,Output value for channel 26" "0,1" textline " " bitfld.long 0x08 25. " OUTDT3_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT3_24 ,Output value for channel 24" "0,1" bitfld.long 0x08 23. " OUTDT3_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT3_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT3_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT3_20 ,Output value for channel 20" "0,1" bitfld.long 0x08 19. " OUTDT3_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT3_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT3_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT3_16 ,Output value for channel 16" "0,1" bitfld.long 0x08 15. " OUTDT3_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT3_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT3_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT3_12 ,Output value for channel 12" "0,1" bitfld.long 0x08 11. " OUTDT3_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT3_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT3_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT3_8 ,Output value for channel 8" "0,1" bitfld.long 0x08 7. " OUTDT3_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT3_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT3_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT3_4 ,Output value for channel 4" "0,1" bitfld.long 0x08 3. " OUTDT3_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT3_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT3_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT3_0 ,Output value for channel 0" "0,1" rgroup.long 0x0C++0x07 line.long 0x00 "INDT3,General Input Register 3" bitfld.long 0x00 31. " INDT3_31 ,Value received through pin 31" "0,1" bitfld.long 0x00 30. " INDT3_30 ,Value received through pin 30" "0,1" bitfld.long 0x00 29. " INDT3_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT3_28 ,Value received through pin 28" "0,1" textfld " " textline " " bitfld.long 0x00 27. " INDT3_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT3_26 ,Value received through pin 26" "0,1" textline " " bitfld.long 0x00 25. " INDT3_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT3_24 ,Value received through pin 24" "0,1" bitfld.long 0x00 23. " INDT3_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT3_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT3_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT3_20 ,Value received through pin 20" "0,1" bitfld.long 0x00 19. " INDT3_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT3_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT3_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT3_16 ,Value received through pin 16" "0,1" bitfld.long 0x00 15. " INDT3_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT3_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT3_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT3_12 ,Value received through pin 12" "0,1" bitfld.long 0x00 11. " INDT3_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT3_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT3_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT3_8 ,Value received through pin 8" "0,1" bitfld.long 0x00 7. " INDT3_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT3_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT3_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT3_4 ,Value received through pin 4" "0,1" bitfld.long 0x00 3. " INDT3_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT3_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT3_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT3_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT3,Interrupt Display Register 3" bitfld.long 0x04 31. " INTDT3_31 ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " INTDT3_30 ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " INTDT3_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT3_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT3_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT3_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTDT3_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT3_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " INTDT3_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT3_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT3_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT3_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " INTDT3_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT3_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT3_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT3_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " INTDT3_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT3_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT3_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT3_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " INTDT3_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT3_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT3_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT3_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " INTDT3_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT3_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT3_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT3_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" bitfld.long 0x04 3. " INTDT3_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT3_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT3_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT3_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR3,Interrupt Clear Register 3" bitfld.long 0x00 31. " INTCLR3_31 ,Clears pin 31 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 30. " INTCLR3_30 ,Clears pin 30 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 29. " INTCLR3_29 ,Clears pin 29 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 28. " INTCLR3_28 ,Clears pin 28 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 27. " INTCLR3_27 ,Clears pin 27 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 26. " INTCLR3_26 ,Clears pin 26 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 25. " INTCLR3_25 ,Clears pin 25 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 24. " INTCLR3_24 ,Clears pin 24 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 23. " INTCLR3_23 ,Clears pin 23 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 22. " INTCLR3_22 ,Clears pin 22 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 21. " INTCLR3_21 ,Clears pin 21 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 20. " INTCLR3_20 ,Clears pin 20 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 19. " INTCLR3_19 ,Clears pin 19 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 18. " INTCLR3_18 ,Clears pin 18 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 17. " INTCLR3_17 ,Clears pin 17 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 16. " INTCLR3_16 ,Clears pin 16 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 15. " INTCLR3_15 ,Clears pin 15 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 14. " INTCLR3_14 ,Clears pin 14 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 13. " INTCLR3_13 ,Clears pin 13 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 12. " INTCLR3_12 ,Clears pin 12 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 11. " INTCLR3_11 ,Clears pin 11 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 10. " INTCLR3_10 ,Clears pin 10 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 9. " INTCLR3_9 ,Clears pin 9 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 8. " INTCLR3_8 ,Clears pin 8 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 7. " INTCLR3_7 ,Clears pin 7 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 6. " INTCLR3_6 ,Clears pin 6 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 5. " INTCLR3_5 ,Clears pin 5 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 4. " INTCLR3_4 ,Clears pin 4 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 3. " INTCLR3_3 ,Clears pin 3 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 2. " INTCLR3_2 ,Clears pin 2 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 1. " INTCLR3_1 ,Clears pin 1 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 0. " INTCLR3_0 ,Clears pin 0 bit in the interrupt display register" "No effect,Clear" line.long 0x04 "INTMSK3,Interrupt Mask Register 3" bitfld.long 0x04 31. " INTMSK3_31 ,Masks interrupt request for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " INTMSK3_30 ,Masks interrupt request for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " INTMSK3_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK3_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK3_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK3_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " INTMSK3_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK3_24 ,Masks interrupt request for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " INTMSK3_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK3_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK3_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK3_20 ,Masks interrupt request for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " INTMSK3_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK3_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK3_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK3_16 ,Masks interrupt request for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " INTMSK3_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK3_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK3_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK3_12 ,Masks interrupt request for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " INTMSK3_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK3_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK3_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK3_8 ,Masks interrupt request for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " INTMSK3_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK3_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK3_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK3_4 ,Masks interrupt request for pin 4" "Masked,Not masked" bitfld.long 0x04 3. " INTMSK3_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK3_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK3_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK3_0 ,Masks interrupt request for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR3,Interrupt Mask Clear Register 3" bitfld.long 0x08 31. " MSKCLR3_31 ,Clears mask for pin 31" "No effect,Not masked" bitfld.long 0x08 30. " MSKCLR3_30 ,Clears mask for pin 30" "No effect,Not masked" bitfld.long 0x08 29. " MSKCLR3_29 ,Clears mask for pin 29" "No effect,Not masked" bitfld.long 0x08 28. " MSKCLR3_28 ,Clears mask for pin 28" "No effect,Not masked" textline " " bitfld.long 0x08 27. " MSKCLR3_27 ,Clears mask for pin 27" "No effect,Not masked" bitfld.long 0x08 26. " MSKCLR3_26 ,Clears mask for pin 26" "No effect,Not masked" textline " " bitfld.long 0x08 25. " MSKCLR3_25 ,Clears mask for pin 25" "No effect,Not masked" bitfld.long 0x08 24. " MSKCLR3_24 ,Clears mask for pin 24" "No effect,Not masked" bitfld.long 0x08 23. " MSKCLR3_23 ,Clears mask for pin 23" "No effect,Not masked" bitfld.long 0x08 22. " MSKCLR3_22 ,Clears mask for pin 22" "No effect,Not masked" textline " " bitfld.long 0x08 21. " MSKCLR3_21 ,Clears mask for pin 21" "No effect,Not masked" bitfld.long 0x08 20. " MSKCLR3_20 ,Clears mask for pin 20" "No effect,Not masked" bitfld.long 0x08 19. " MSKCLR3_19 ,Clears mask for pin 19" "No effect,Not masked" bitfld.long 0x08 18. " MSKCLR3_18 ,Clears mask for pin 18" "No effect,Not masked" textline " " bitfld.long 0x08 17. " MSKCLR3_17 ,Clears mask for pin 17" "No effect,Not masked" bitfld.long 0x08 16. " MSKCLR3_16 ,Clears mask for pin 16" "No effect,Not masked" bitfld.long 0x08 15. " MSKCLR3_15 ,Clears mask for pin 15" "No effect,Not masked" bitfld.long 0x08 14. " MSKCLR3_14 ,Clears mask for pin 14" "No effect,Not masked" textline " " bitfld.long 0x08 13. " MSKCLR3_13 ,Clears mask for pin 13" "No effect,Not masked" bitfld.long 0x08 12. " MSKCLR3_12 ,Clears mask for pin 12" "No effect,Not masked" bitfld.long 0x08 11. " MSKCLR3_11 ,Clears mask for pin 11" "No effect,Not masked" bitfld.long 0x08 10. " MSKCLR3_10 ,Clears mask for pin 10" "No effect,Not masked" textline " " bitfld.long 0x08 9. " MSKCLR3_9 ,Clears mask for pin 9" "No effect,Not masked" bitfld.long 0x08 8. " MSKCLR3_8 ,Clears mask for pin 8" "No effect,Not masked" bitfld.long 0x08 7. " MSKCLR3_7 ,Clears mask for pin 7" "No effect,Not masked" bitfld.long 0x08 6. " MSKCLR3_6 ,Clears mask for pin 6" "No effect,Not masked" textline " " bitfld.long 0x08 5. " MSKCLR3_5 ,Clears mask for pin 5" "No effect,Not masked" bitfld.long 0x08 4. " MSKCLR3_4 ,Clears mask for pin 4" "No effect,Not masked" bitfld.long 0x08 3. " MSKCLR3_3 ,Clears mask for pin 3" "No effect,Not masked" bitfld.long 0x08 2. " MSKCLR3_2 ,Clears mask for pin 2" "No effect,Not masked" textline " " bitfld.long 0x08 1. " MSKCLR3_1 ,Clears mask for pin 1" "No effect,Not masked" bitfld.long 0x08 0. " MSKCLR3_0 ,Clears mask for pin 0" "No effect,Not masked" line.long 0x0C "POSNEG3,Positive/Negative Logic Select Register 3" bitfld.long 0x0C 31. " POSNEG3_31 ,Selects polarity for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " POSNEG3_30 ,Selects polarity for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " POSNEG3_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG3_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG3_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG3_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " bitfld.long 0x0C 25. " POSNEG3_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG3_24 ,Selects polarity for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " POSNEG3_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG3_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG3_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG3_20 ,Selects polarity for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " POSNEG3_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG3_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG3_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG3_16 ,Selects polarity for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " POSNEG3_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG3_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG3_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG3_12 ,Selects polarity for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " POSNEG3_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG3_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG3_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG3_8 ,Selects polarity for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " POSNEG3_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG3_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG3_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG3_4 ,Selects polarity for pin 4" "Positive,Negative" bitfld.long 0x0C 3. " POSNEG3_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG3_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG3_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG3_0 ,Selects polarity for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL3,Edge/Level Select Register 3" bitfld.long 0x10 31. " EDGLEVEL3_31 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 31" "Level,Edge" bitfld.long 0x10 30. " EDGLEVEL3_30 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 30" "Level,Edge" bitfld.long 0x10 29. " EDGLEVEL3_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL3_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL3_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL3_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " bitfld.long 0x10 25. " EDGLEVEL3_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL3_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" bitfld.long 0x10 23. " EDGLEVEL3_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL3_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL3_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL3_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" bitfld.long 0x10 19. " EDGLEVEL3_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL3_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL3_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL3_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" bitfld.long 0x10 15. " EDGLEVEL3_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL3_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL3_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL3_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" bitfld.long 0x10 11. " EDGLEVEL3_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL3_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL3_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL3_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" bitfld.long 0x10 7. " EDGLEVEL3_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL3_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL3_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL3_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" bitfld.long 0x10 3. " EDGLEVEL3_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL3_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL3_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL3_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF3,Chattering Prevention On/Off Register 3" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "S3D4/66000,S3D4/33000,S3D4/16500,S3D4/8250" else bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "CLKP/25000,CLKP/12500,CLKP/6250,CLKP/3125" endif textline " " bitfld.long 0x14 3. " FILONOFF3_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF3_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" bitfld.long 0x14 1. " FILONOFF3_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF3_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" group.long 0x38++0x17 line.long 0x00 "INTMSKS3,Interrupt Sub Mask Register 3" bitfld.long 0x00 31. " INTMSKS3_31 ,Interrupt sub mask 31" "Masked,Not masked" bitfld.long 0x00 30. " INTMSKS3_30 ,Interrupt sub mask 30" "Masked,Not masked" bitfld.long 0x00 29. " INTMSKS3_29 ,Interrupt sub mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS3_28 ,Interrupt sub mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS3_27 ,Interrupt sub mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS3_26 ,Interrupt sub mask 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " INTMSKS3_25 ,Interrupt sub mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS3_24 ,Interrupt sub mask 24" "Masked,Not masked" bitfld.long 0x00 23. " INTMSKS3_23 ,Interrupt sub mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS3_22 ,Interrupt sub mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS3_21 ,Interrupt sub mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS3_20 ,Interrupt sub mask 20" "Masked,Not masked" bitfld.long 0x00 19. " INTMSKS3_19 ,Interrupt sub mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS3_18 ,Interrupt sub mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS3_17 ,Interrupt sub mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS3_16 ,Interrupt sub mask 16" "Masked,Not masked" bitfld.long 0x00 15. " INTMSKS3_15 ,Interrupt sub mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS3_14 ,Interrupt sub mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS3_13 ,Interrupt sub mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS3_12 ,Interrupt sub mask 12" "Masked,Not masked" bitfld.long 0x00 11. " INTMSKS3_11 ,Interrupt sub mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS3_10 ,Interrupt sub mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS3_9 ,Interrupt sub mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS3_8 ,Interrupt sub mask 8" "Masked,Not masked" bitfld.long 0x00 7. " INTMSKS3_7 ,Interrupt sub mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS3_6 ,Interrupt sub mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS3_5 ,Interrupt sub mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS3_4 ,Interrupt sub mask 4" "Masked,Not masked" bitfld.long 0x00 3. " INTMSKS3_3 ,Interrupt sub mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS3_2 ,Interrupt sub mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS3_1 ,Interrupt sub mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS3_0 ,Interrupt sub mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS3,Interrupt Sub Mask Clear Register 3" bitfld.long 0x04 31. " MSKCLRS3_31 ,Interrupt sub mask clear 31" "No effect,Masked" bitfld.long 0x04 30. " MSKCLRS3_30 ,Interrupt sub mask clear 30" "No effect,Masked" bitfld.long 0x04 29. " MSKCLRS3_29 ,Interrupt sub mask clear 29" "No effect,Masked" bitfld.long 0x04 28. " MSKCLRS3_28 ,Interrupt sub mask clear 28" "No effect,Masked" textline " " bitfld.long 0x04 27. " MSKCLRS3_27 ,Interrupt sub mask clear 27" "No effect,Masked" bitfld.long 0x04 26. " MSKCLRS3_26 ,Interrupt sub mask clear 26" "No effect,Masked" textline " " bitfld.long 0x04 25. " MSKCLRS3_25 ,Interrupt sub mask clear 25" "No effect,Masked" bitfld.long 0x04 24. " MSKCLRS3_24 ,Interrupt sub mask clear 24" "No effect,Masked" bitfld.long 0x04 23. " MSKCLRS3_23 ,Interrupt sub mask clear 23" "No effect,Masked" bitfld.long 0x04 22. " MSKCLRS3_22 ,Interrupt sub mask clear 22" "No effect,Masked" textline " " bitfld.long 0x04 21. " MSKCLRS3_21 ,Interrupt sub mask clear 21" "No effect,Masked" bitfld.long 0x04 20. " MSKCLRS3_20 ,Interrupt sub mask clear 20" "No effect,Masked" bitfld.long 0x04 19. " MSKCLRS3_19 ,Interrupt sub mask clear 19" "No effect,Masked" bitfld.long 0x04 18. " MSKCLRS3_18 ,Interrupt sub mask clear 18" "No effect,Masked" textline " " bitfld.long 0x04 17. " MSKCLRS3_17 ,Interrupt sub mask clear 17" "No effect,Masked" bitfld.long 0x04 16. " MSKCLRS3_16 ,Interrupt sub mask clear 16" "No effect,Masked" bitfld.long 0x04 15. " MSKCLRS3_15 ,Interrupt sub mask clear 15" "No effect,Masked" bitfld.long 0x04 14. " MSKCLRS3_14 ,Interrupt sub mask clear 14" "No effect,Masked" textline " " bitfld.long 0x04 13. " MSKCLRS3_13 ,Interrupt sub mask clear 13" "No effect,Masked" bitfld.long 0x04 12. " MSKCLRS3_12 ,Interrupt sub mask clear 12" "No effect,Masked" bitfld.long 0x04 11. " MSKCLRS3_11 ,Interrupt sub mask clear 11" "No effect,Masked" bitfld.long 0x04 10. " MSKCLRS3_10 ,Interrupt sub mask clear 10" "No effect,Masked" textline " " bitfld.long 0x04 9. " MSKCLRS3_9 ,Interrupt sub mask clear 9" "No effect,Masked" bitfld.long 0x04 8. " MSKCLRS3_8 ,Interrupt sub mask clear 8" "No effect,Masked" bitfld.long 0x04 7. " MSKCLRS3_7 ,Interrupt sub mask clear 7" "No effect,Masked" bitfld.long 0x04 6. " MSKCLRS3_6 ,Interrupt sub mask clear 6" "No effect,Masked" textline " " bitfld.long 0x04 5. " MSKCLRS3_5 ,Interrupt sub mask clear 5" "No effect,Masked" bitfld.long 0x04 4. " MSKCLRS3_4 ,Interrupt sub mask clear 4" "No effect,Masked" bitfld.long 0x04 3. " MSKCLRS3_3 ,Interrupt sub mask clear 3" "No effect,Masked" bitfld.long 0x04 2. " MSKCLRS3_2 ,Interrupt sub mask clear 2" "No effect,Masked" textline " " bitfld.long 0x04 1. " MSKCLRS3_1 ,Interrupt sub mask clear 1" "No effect,Masked" bitfld.long 0x04 0. " MSKCLRS3_0 ,Interrupt sub mask clear 0" "No effect,Masked" line.long 0x08 "OUTDTSEL3,Output Data Select Register 3" bitfld.long 0x08 31. " OUTDTSEL3_31 ,Output data select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " OUTDTSEL3_30 ,Output data select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " OUTDTSEL3_29 ,Output data select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL3_28 ,Output data select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL3_27 ,Output data select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL3_26 ,Output data select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " OUTDTSEL3_25 ,Output data select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL3_24 ,Output data select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " OUTDTSEL3_23 ,Output data select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL3_22 ,Output data select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL3_21 ,Output data select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL3_20 ,Output data select 20" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 19. " OUTDTSEL3_19 ,Output data select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL3_18 ,Output data select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL3_17 ,Output data select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL3_16 ,Output data select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " OUTDTSEL3_15 ,Output data select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL3_14 ,Output data select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL3_13 ,Output data select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL3_12 ,Output data select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " OUTDTSEL3_11 ,Output data select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL3_10 ,Output data select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL3_9 ,Output data select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL3_8 ,Output data select 8" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 7. " OUTDTSEL3_7 ,Output data select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL3_6 ,Output data select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL3_5 ,Output data select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL3_4 ,Output data select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " OUTDTSEL3_3 ,Output data select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL3_2 ,Output data select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL3_1 ,Output data select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL3_0 ,Output data select 0" "OUTDT,OUTDTH/OUTDTL" line.long 0x0C "OUTDTH3,Output Data High Register 3" bitfld.long 0x0C 31. " OUTDTH3_31 ,Output data high 31" "Not valid,Valid" bitfld.long 0x0C 30. " OUTDTH3_30 ,Output data high 30" "Not valid,Valid" bitfld.long 0x0C 29. " OUTDTH3_29 ,Output data high 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH3_28 ,Output data high 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH3_27 ,Output data high 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH3_26 ,Output data high 26" "Not valid,Valid" textline " " bitfld.long 0x0C 25. " OUTDTH3_25 ,Output data high 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH3_24 ,Output data high 24" "Not valid,Valid" bitfld.long 0x0C 23. " OUTDTH3_23 ,Output data high 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH3_22 ,Output data high 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH3_21 ,Output data high 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH3_20 ,Output data high 20" "Not valid,Valid" bitfld.long 0x0C 19. " OUTDTH3_19 ,Output data high 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH3_18 ,Output data high 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH3_17 ,Output data high 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH3_16 ,Output data high 16" "Not valid,Valid" bitfld.long 0x0C 15. " OUTDTH3_15 ,Output data high 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH3_14 ,Output data high 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH3_13 ,Output data high 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH3_12 ,Output data high 12" "Not valid,Valid" bitfld.long 0x0C 11. " OUTDTH3_11 ,Output data high 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH3_10 ,Output data high 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH3_9 ,Output data high 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH3_8 ,Output data high 8" "Not valid,Valid" bitfld.long 0x0C 7. " OUTDTH3_7 ,Output data high 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH3_6 ,Output data high 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH3_5 ,Output data high 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH3_4 ,Output data high 4" "Not valid,Valid" bitfld.long 0x0C 3. " OUTDTH3_3 ,Output data high 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH3_2 ,Output data high 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH3_1 ,Output data high 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH3_0 ,Output data high 0" "Not valid,Valid" line.long 0x10 "OUTDTL3,Output Data Low Register 3" bitfld.long 0x10 31. " OUTDTL3_31 ,Output data low 31" "Not valid,Valid" bitfld.long 0x10 30. " OUTDTL3_30 ,Output data low 30" "Not valid,Valid" bitfld.long 0x10 29. " OUTDTL3_29 ,Output data low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL3_28 ,Output data low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL3_27 ,Output data low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL3_26 ,Output data low 26" "Not valid,Valid" textline " " bitfld.long 0x10 25. " OUTDTL3_25 ,Output data low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL3_24 ,Output data low 24" "Not valid,Valid" bitfld.long 0x10 23. " OUTDTL3_23 ,Output data low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL3_22 ,Output data low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL3_21 ,Output data low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL3_20 ,Output data low 20" "Not valid,Valid" bitfld.long 0x10 19. " OUTDTL3_19 ,Output data low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL3_18 ,Output data low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL3_17 ,Output data low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL3_16 ,Output data low 16" "Not valid,Valid" bitfld.long 0x10 15. " OUTDTL3_15 ,Output data low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL3_14 ,Output data low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL3_13 ,Output data low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL3_12 ,Output data low 12" "Not valid,Valid" bitfld.long 0x10 11. " OUTDTL3_11 ,Output data low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL3_10 ,Output data low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL3_9 ,Output data low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL3_8 ,Output data low 8" "Not valid,Valid" bitfld.long 0x10 7. " OUTDTL3_7 ,Output data low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL3_6 ,Output data low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL3_5 ,Output data low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL3_4 ,Output data low 4" "Not valid,Valid" bitfld.long 0x10 3. " OUTDTL3_3 ,Output data low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL3_2 ,Output data low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL3_1 ,Output data low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL3_0 ,Output data low 0" "Not valid,Valid" line.long 0x14 "BOTHEDGE3,One Edge/Both Edge Select Register 3" bitfld.long 0x14 31. " BOTHEDGE3_31 ,One edge/both edge select 31" "One,Both" bitfld.long 0x14 30. " BOTHEDGE3_30 ,One edge/both edge select 30" "One,Both" bitfld.long 0x14 29. " BOTHEDGE3_29 ,One edge/both edge select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE3_28 ,One edge/both edge select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE3_27 ,One edge/both edge select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE3_26 ,One edge/both edge select 26" "One,Both" textline " " bitfld.long 0x14 25. " BOTHEDGE3_25 ,One edge/both edge select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE3_24 ,One edge/both edge select 24" "One,Both" bitfld.long 0x14 23. " BOTHEDGE3_23 ,One edge/both edge select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE3_22 ,One edge/both edge select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE3_21 ,One edge/both edge select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE3_20 ,One edge/both edge select 20" "One,Both" bitfld.long 0x14 19. " BOTHEDGE3_19 ,One edge/both edge select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE3_18 ,One edge/both edge select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE3_17 ,One edge/both edge select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE3_16 ,One edge/both edge select 16" "One,Both" bitfld.long 0x14 15. " BOTHEDGE3_15 ,One edge/both edge select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE3_14 ,One edge/both edge select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE3_13 ,One edge/both edge select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE3_12 ,One edge/both edge select 12" "One,Both" bitfld.long 0x14 11. " BOTHEDGE3_11 ,One edge/both edge select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE3_10 ,One edge/both edge select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE3_9 ,One edge/both edge select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE3_8 ,One edge/both edge select 8" "One,Both" bitfld.long 0x14 7. " BOTHEDGE3_7 ,One edge/both edge select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE3_6 ,One edge/both edge select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE3_5 ,One edge/both edge select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE3_4 ,One edge/both edge select 4" "One,Both" bitfld.long 0x14 3. " BOTHEDGE3_3 ,One edge/both edge select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE3_2 ,One edge/both edge select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE3_1 ,One edge/both edge select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE3_0 ,One edge/both edge select 0" "One,Both" width 0xB tree.end tree "GPIO 4" base ad:0xE6054000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL4,General IO/Interrupt Switching Register 4" bitfld.long 0x00 31. " IOINTSEL4_31 ,General input/output or interrupt mode select for channel 31" "General I/O,Interrupt" bitfld.long 0x00 30. " IOINTSEL4_30 ,General input/output or interrupt mode select for channel 30" "General I/O,Interrupt" bitfld.long 0x00 29. " IOINTSEL4_29 ,General input/output or interrupt mode select for channel 29" "General I/O,Interrupt" bitfld.long 0x00 28. " IOINTSEL4_28 ,General input/output or interrupt mode select for channel 28" "General I/O,Interrupt" textline " " bitfld.long 0x00 27. " IOINTSEL4_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL4_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " bitfld.long 0x00 25. " IOINTSEL4_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL4_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" bitfld.long 0x00 23. " IOINTSEL4_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL4_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL4_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL4_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " IOINTSEL4_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL4_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL4_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL4_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" bitfld.long 0x00 15. " IOINTSEL4_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL4_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL4_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL4_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " IOINTSEL4_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL4_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL4_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL4_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" bitfld.long 0x00 7. " IOINTSEL4_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL4_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL4_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL4_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " IOINTSEL4_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL4_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL4_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL4_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL4,General Input/Output Switching Register 4" bitfld.long 0x04 31. " INOUTSEL4_31 ,General input or output mode select for channel 31" "Input,Output" bitfld.long 0x04 30. " INOUTSEL4_30 ,General input or output mode select for channel 30" "Input,Output" bitfld.long 0x04 29. " INOUTSEL4_29 ,General input or output mode select for channel 29" "Input,Output" bitfld.long 0x04 28. " INOUTSEL4_28 ,General input or output mode select for channel 28" "Input,Output" textline " " bitfld.long 0x04 27. " INOUTSEL4_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL4_26 ,General input or output mode select for channel 26" "Input,Output" textline " " bitfld.long 0x04 25. " INOUTSEL4_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL4_24 ,General input or output mode select for channel 24" "Input,Output" bitfld.long 0x04 23. " INOUTSEL4_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL4_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL4_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL4_20 ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " INOUTSEL4_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL4_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL4_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL4_16 ,General input or output mode select for channel 16" "Input,Output" bitfld.long 0x04 15. " INOUTSEL4_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL4_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL4_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL4_12 ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " INOUTSEL4_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL4_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL4_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL4_8 ,General input or output mode select for channel 8" "Input,Output" bitfld.long 0x04 7. " INOUTSEL4_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL4_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL4_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL4_4 ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " INOUTSEL4_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL4_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL4_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL4_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT4,General Output Register 4" bitfld.long 0x08 31. " OUTDT4_31 ,Output value for channel 31" "0,1" bitfld.long 0x08 30. " OUTDT4_30 ,Output value for channel 30" "0,1" bitfld.long 0x08 29. " OUTDT4_29 ,Output value for channel 29" "0,1" bitfld.long 0x08 28. " OUTDT4_28 ,Output value for channel 28" "0,1" textfld " " textline " " bitfld.long 0x08 27. " OUTDT4_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT4_26 ,Output value for channel 26" "0,1" textline " " bitfld.long 0x08 25. " OUTDT4_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT4_24 ,Output value for channel 24" "0,1" bitfld.long 0x08 23. " OUTDT4_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT4_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT4_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT4_20 ,Output value for channel 20" "0,1" bitfld.long 0x08 19. " OUTDT4_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT4_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT4_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT4_16 ,Output value for channel 16" "0,1" bitfld.long 0x08 15. " OUTDT4_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT4_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT4_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT4_12 ,Output value for channel 12" "0,1" bitfld.long 0x08 11. " OUTDT4_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT4_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT4_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT4_8 ,Output value for channel 8" "0,1" bitfld.long 0x08 7. " OUTDT4_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT4_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT4_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT4_4 ,Output value for channel 4" "0,1" bitfld.long 0x08 3. " OUTDT4_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT4_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT4_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT4_0 ,Output value for channel 0" "0,1" rgroup.long 0x0C++0x07 line.long 0x00 "INDT4,General Input Register 4" bitfld.long 0x00 31. " INDT4_31 ,Value received through pin 31" "0,1" bitfld.long 0x00 30. " INDT4_30 ,Value received through pin 30" "0,1" bitfld.long 0x00 29. " INDT4_29 ,Value received through pin 29" "0,1" bitfld.long 0x00 28. " INDT4_28 ,Value received through pin 28" "0,1" textfld " " textline " " bitfld.long 0x00 27. " INDT4_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT4_26 ,Value received through pin 26" "0,1" textline " " bitfld.long 0x00 25. " INDT4_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT4_24 ,Value received through pin 24" "0,1" bitfld.long 0x00 23. " INDT4_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT4_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT4_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT4_20 ,Value received through pin 20" "0,1" bitfld.long 0x00 19. " INDT4_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT4_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT4_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT4_16 ,Value received through pin 16" "0,1" bitfld.long 0x00 15. " INDT4_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT4_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT4_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT4_12 ,Value received through pin 12" "0,1" bitfld.long 0x00 11. " INDT4_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT4_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT4_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT4_8 ,Value received through pin 8" "0,1" bitfld.long 0x00 7. " INDT4_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT4_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT4_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT4_4 ,Value received through pin 4" "0,1" bitfld.long 0x00 3. " INDT4_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT4_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT4_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT4_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT4,Interrupt Display Register 4" bitfld.long 0x04 31. " INTDT4_31 ,Input of an interrupt signal on the pin 31" "No interrupt,Interrupt" bitfld.long 0x04 30. " INTDT4_30 ,Input of an interrupt signal on the pin 30" "No interrupt,Interrupt" bitfld.long 0x04 29. " INTDT4_29 ,Input of an interrupt signal on the pin 29" "No interrupt,Interrupt" bitfld.long 0x04 28. " INTDT4_28 ,Input of an interrupt signal on the pin 28" "No interrupt,Interrupt" textline " " bitfld.long 0x04 27. " INTDT4_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT4_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTDT4_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT4_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " INTDT4_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT4_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT4_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT4_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " INTDT4_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT4_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT4_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT4_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " INTDT4_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT4_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT4_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT4_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " INTDT4_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT4_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT4_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT4_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " INTDT4_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT4_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT4_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT4_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" bitfld.long 0x04 3. " INTDT4_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT4_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT4_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT4_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR4,Interrupt Clear Register 4" bitfld.long 0x00 31. " INTCLR4_31 ,Clears pin 31 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 30. " INTCLR4_30 ,Clears pin 30 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 29. " INTCLR4_29 ,Clears pin 29 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 28. " INTCLR4_28 ,Clears pin 28 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 27. " INTCLR4_27 ,Clears pin 27 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 26. " INTCLR4_26 ,Clears pin 26 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 25. " INTCLR4_25 ,Clears pin 25 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 24. " INTCLR4_24 ,Clears pin 24 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 23. " INTCLR4_23 ,Clears pin 23 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 22. " INTCLR4_22 ,Clears pin 22 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 21. " INTCLR4_21 ,Clears pin 21 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 20. " INTCLR4_20 ,Clears pin 20 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 19. " INTCLR4_19 ,Clears pin 19 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 18. " INTCLR4_18 ,Clears pin 18 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 17. " INTCLR4_17 ,Clears pin 17 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 16. " INTCLR4_16 ,Clears pin 16 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 15. " INTCLR4_15 ,Clears pin 15 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 14. " INTCLR4_14 ,Clears pin 14 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 13. " INTCLR4_13 ,Clears pin 13 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 12. " INTCLR4_12 ,Clears pin 12 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 11. " INTCLR4_11 ,Clears pin 11 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 10. " INTCLR4_10 ,Clears pin 10 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 9. " INTCLR4_9 ,Clears pin 9 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 8. " INTCLR4_8 ,Clears pin 8 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 7. " INTCLR4_7 ,Clears pin 7 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 6. " INTCLR4_6 ,Clears pin 6 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 5. " INTCLR4_5 ,Clears pin 5 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 4. " INTCLR4_4 ,Clears pin 4 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 3. " INTCLR4_3 ,Clears pin 3 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 2. " INTCLR4_2 ,Clears pin 2 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 1. " INTCLR4_1 ,Clears pin 1 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 0. " INTCLR4_0 ,Clears pin 0 bit in the interrupt display register" "No effect,Clear" line.long 0x04 "INTMSK4,Interrupt Mask Register 4" bitfld.long 0x04 31. " INTMSK4_31 ,Masks interrupt request for pin 31" "Masked,Not masked" bitfld.long 0x04 30. " INTMSK4_30 ,Masks interrupt request for pin 30" "Masked,Not masked" bitfld.long 0x04 29. " INTMSK4_29 ,Masks interrupt request for pin 29" "Masked,Not masked" bitfld.long 0x04 28. " INTMSK4_28 ,Masks interrupt request for pin 28" "Masked,Not masked" textline " " bitfld.long 0x04 27. " INTMSK4_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK4_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " INTMSK4_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK4_24 ,Masks interrupt request for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " INTMSK4_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK4_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK4_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK4_20 ,Masks interrupt request for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " INTMSK4_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK4_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK4_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK4_16 ,Masks interrupt request for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " INTMSK4_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK4_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK4_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK4_12 ,Masks interrupt request for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " INTMSK4_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK4_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK4_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK4_8 ,Masks interrupt request for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " INTMSK4_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK4_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK4_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK4_4 ,Masks interrupt request for pin 4" "Masked,Not masked" bitfld.long 0x04 3. " INTMSK4_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK4_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK4_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK4_0 ,Masks interrupt request for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR4,Interrupt Mask Clear Register 4" bitfld.long 0x08 31. " MSKCLR4_31 ,Clears mask for pin 31" "No effect,Not masked" bitfld.long 0x08 30. " MSKCLR4_30 ,Clears mask for pin 30" "No effect,Not masked" bitfld.long 0x08 29. " MSKCLR4_29 ,Clears mask for pin 29" "No effect,Not masked" bitfld.long 0x08 28. " MSKCLR4_28 ,Clears mask for pin 28" "No effect,Not masked" textline " " bitfld.long 0x08 27. " MSKCLR4_27 ,Clears mask for pin 27" "No effect,Not masked" bitfld.long 0x08 26. " MSKCLR4_26 ,Clears mask for pin 26" "No effect,Not masked" textline " " bitfld.long 0x08 25. " MSKCLR4_25 ,Clears mask for pin 25" "No effect,Not masked" bitfld.long 0x08 24. " MSKCLR4_24 ,Clears mask for pin 24" "No effect,Not masked" bitfld.long 0x08 23. " MSKCLR4_23 ,Clears mask for pin 23" "No effect,Not masked" bitfld.long 0x08 22. " MSKCLR4_22 ,Clears mask for pin 22" "No effect,Not masked" textline " " bitfld.long 0x08 21. " MSKCLR4_21 ,Clears mask for pin 21" "No effect,Not masked" bitfld.long 0x08 20. " MSKCLR4_20 ,Clears mask for pin 20" "No effect,Not masked" bitfld.long 0x08 19. " MSKCLR4_19 ,Clears mask for pin 19" "No effect,Not masked" bitfld.long 0x08 18. " MSKCLR4_18 ,Clears mask for pin 18" "No effect,Not masked" textline " " bitfld.long 0x08 17. " MSKCLR4_17 ,Clears mask for pin 17" "No effect,Not masked" bitfld.long 0x08 16. " MSKCLR4_16 ,Clears mask for pin 16" "No effect,Not masked" bitfld.long 0x08 15. " MSKCLR4_15 ,Clears mask for pin 15" "No effect,Not masked" bitfld.long 0x08 14. " MSKCLR4_14 ,Clears mask for pin 14" "No effect,Not masked" textline " " bitfld.long 0x08 13. " MSKCLR4_13 ,Clears mask for pin 13" "No effect,Not masked" bitfld.long 0x08 12. " MSKCLR4_12 ,Clears mask for pin 12" "No effect,Not masked" bitfld.long 0x08 11. " MSKCLR4_11 ,Clears mask for pin 11" "No effect,Not masked" bitfld.long 0x08 10. " MSKCLR4_10 ,Clears mask for pin 10" "No effect,Not masked" textline " " bitfld.long 0x08 9. " MSKCLR4_9 ,Clears mask for pin 9" "No effect,Not masked" bitfld.long 0x08 8. " MSKCLR4_8 ,Clears mask for pin 8" "No effect,Not masked" bitfld.long 0x08 7. " MSKCLR4_7 ,Clears mask for pin 7" "No effect,Not masked" bitfld.long 0x08 6. " MSKCLR4_6 ,Clears mask for pin 6" "No effect,Not masked" textline " " bitfld.long 0x08 5. " MSKCLR4_5 ,Clears mask for pin 5" "No effect,Not masked" bitfld.long 0x08 4. " MSKCLR4_4 ,Clears mask for pin 4" "No effect,Not masked" bitfld.long 0x08 3. " MSKCLR4_3 ,Clears mask for pin 3" "No effect,Not masked" bitfld.long 0x08 2. " MSKCLR4_2 ,Clears mask for pin 2" "No effect,Not masked" textline " " bitfld.long 0x08 1. " MSKCLR4_1 ,Clears mask for pin 1" "No effect,Not masked" bitfld.long 0x08 0. " MSKCLR4_0 ,Clears mask for pin 0" "No effect,Not masked" line.long 0x0C "POSNEG4,Positive/Negative Logic Select Register 4" bitfld.long 0x0C 31. " POSNEG4_31 ,Selects polarity for pin 31" "Positive,Negative" bitfld.long 0x0C 30. " POSNEG4_30 ,Selects polarity for pin 30" "Positive,Negative" bitfld.long 0x0C 29. " POSNEG4_29 ,Selects polarity for pin 29" "Positive,Negative" bitfld.long 0x0C 28. " POSNEG4_28 ,Selects polarity for pin 28" "Positive,Negative" textline " " bitfld.long 0x0C 27. " POSNEG4_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG4_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " bitfld.long 0x0C 25. " POSNEG4_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG4_24 ,Selects polarity for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " POSNEG4_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG4_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG4_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG4_20 ,Selects polarity for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " POSNEG4_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG4_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG4_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG4_16 ,Selects polarity for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " POSNEG4_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG4_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG4_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG4_12 ,Selects polarity for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " POSNEG4_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG4_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG4_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG4_8 ,Selects polarity for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " POSNEG4_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG4_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG4_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG4_4 ,Selects polarity for pin 4" "Positive,Negative" bitfld.long 0x0C 3. " POSNEG4_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG4_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG4_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG4_0 ,Selects polarity for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL4,Edge/Level Select Register 4" bitfld.long 0x10 31. " EDGLEVEL4_31 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 31" "Level,Edge" bitfld.long 0x10 30. " EDGLEVEL4_30 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 30" "Level,Edge" bitfld.long 0x10 29. " EDGLEVEL4_29 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 29" "Level,Edge" bitfld.long 0x10 28. " EDGLEVEL4_28 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 28" "Level,Edge" textline " " bitfld.long 0x10 27. " EDGLEVEL4_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL4_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " bitfld.long 0x10 25. " EDGLEVEL4_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL4_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" bitfld.long 0x10 23. " EDGLEVEL4_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL4_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL4_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL4_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" bitfld.long 0x10 19. " EDGLEVEL4_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL4_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL4_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL4_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" bitfld.long 0x10 15. " EDGLEVEL4_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL4_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL4_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL4_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" bitfld.long 0x10 11. " EDGLEVEL4_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL4_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL4_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL4_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" bitfld.long 0x10 7. " EDGLEVEL4_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL4_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL4_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL4_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" bitfld.long 0x10 3. " EDGLEVEL4_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL4_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL4_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL4_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF4,Chattering Prevention On/Off Register 4" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "S3D4/66000,S3D4/33000,S3D4/16500,S3D4/8250" else bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "CLKP/25000,CLKP/12500,CLKP/6250,CLKP/3125" endif textline " " bitfld.long 0x14 3. " FILONOFF4_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF4_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" bitfld.long 0x14 1. " FILONOFF4_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF4_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" group.long 0x38++0x17 line.long 0x00 "INTMSKS4,Interrupt Sub Mask Register 4" bitfld.long 0x00 31. " INTMSKS4_31 ,Interrupt sub mask 31" "Masked,Not masked" bitfld.long 0x00 30. " INTMSKS4_30 ,Interrupt sub mask 30" "Masked,Not masked" bitfld.long 0x00 29. " INTMSKS4_29 ,Interrupt sub mask 29" "Masked,Not masked" bitfld.long 0x00 28. " INTMSKS4_28 ,Interrupt sub mask 28" "Masked,Not masked" textline " " bitfld.long 0x00 27. " INTMSKS4_27 ,Interrupt sub mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS4_26 ,Interrupt sub mask 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " INTMSKS4_25 ,Interrupt sub mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS4_24 ,Interrupt sub mask 24" "Masked,Not masked" bitfld.long 0x00 23. " INTMSKS4_23 ,Interrupt sub mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS4_22 ,Interrupt sub mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS4_21 ,Interrupt sub mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS4_20 ,Interrupt sub mask 20" "Masked,Not masked" bitfld.long 0x00 19. " INTMSKS4_19 ,Interrupt sub mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS4_18 ,Interrupt sub mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS4_17 ,Interrupt sub mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS4_16 ,Interrupt sub mask 16" "Masked,Not masked" bitfld.long 0x00 15. " INTMSKS4_15 ,Interrupt sub mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS4_14 ,Interrupt sub mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS4_13 ,Interrupt sub mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS4_12 ,Interrupt sub mask 12" "Masked,Not masked" bitfld.long 0x00 11. " INTMSKS4_11 ,Interrupt sub mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS4_10 ,Interrupt sub mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS4_9 ,Interrupt sub mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS4_8 ,Interrupt sub mask 8" "Masked,Not masked" bitfld.long 0x00 7. " INTMSKS4_7 ,Interrupt sub mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS4_6 ,Interrupt sub mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS4_5 ,Interrupt sub mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS4_4 ,Interrupt sub mask 4" "Masked,Not masked" bitfld.long 0x00 3. " INTMSKS4_3 ,Interrupt sub mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS4_2 ,Interrupt sub mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS4_1 ,Interrupt sub mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS4_0 ,Interrupt sub mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS4,Interrupt Sub Mask Clear Register 4" bitfld.long 0x04 31. " MSKCLRS4_31 ,Interrupt sub mask clear 31" "No effect,Masked" bitfld.long 0x04 30. " MSKCLRS4_30 ,Interrupt sub mask clear 30" "No effect,Masked" bitfld.long 0x04 29. " MSKCLRS4_29 ,Interrupt sub mask clear 29" "No effect,Masked" bitfld.long 0x04 28. " MSKCLRS4_28 ,Interrupt sub mask clear 28" "No effect,Masked" textline " " bitfld.long 0x04 27. " MSKCLRS4_27 ,Interrupt sub mask clear 27" "No effect,Masked" bitfld.long 0x04 26. " MSKCLRS4_26 ,Interrupt sub mask clear 26" "No effect,Masked" textline " " bitfld.long 0x04 25. " MSKCLRS4_25 ,Interrupt sub mask clear 25" "No effect,Masked" bitfld.long 0x04 24. " MSKCLRS4_24 ,Interrupt sub mask clear 24" "No effect,Masked" bitfld.long 0x04 23. " MSKCLRS4_23 ,Interrupt sub mask clear 23" "No effect,Masked" bitfld.long 0x04 22. " MSKCLRS4_22 ,Interrupt sub mask clear 22" "No effect,Masked" textline " " bitfld.long 0x04 21. " MSKCLRS4_21 ,Interrupt sub mask clear 21" "No effect,Masked" bitfld.long 0x04 20. " MSKCLRS4_20 ,Interrupt sub mask clear 20" "No effect,Masked" bitfld.long 0x04 19. " MSKCLRS4_19 ,Interrupt sub mask clear 19" "No effect,Masked" bitfld.long 0x04 18. " MSKCLRS4_18 ,Interrupt sub mask clear 18" "No effect,Masked" textline " " bitfld.long 0x04 17. " MSKCLRS4_17 ,Interrupt sub mask clear 17" "No effect,Masked" bitfld.long 0x04 16. " MSKCLRS4_16 ,Interrupt sub mask clear 16" "No effect,Masked" bitfld.long 0x04 15. " MSKCLRS4_15 ,Interrupt sub mask clear 15" "No effect,Masked" bitfld.long 0x04 14. " MSKCLRS4_14 ,Interrupt sub mask clear 14" "No effect,Masked" textline " " bitfld.long 0x04 13. " MSKCLRS4_13 ,Interrupt sub mask clear 13" "No effect,Masked" bitfld.long 0x04 12. " MSKCLRS4_12 ,Interrupt sub mask clear 12" "No effect,Masked" bitfld.long 0x04 11. " MSKCLRS4_11 ,Interrupt sub mask clear 11" "No effect,Masked" bitfld.long 0x04 10. " MSKCLRS4_10 ,Interrupt sub mask clear 10" "No effect,Masked" textline " " bitfld.long 0x04 9. " MSKCLRS4_9 ,Interrupt sub mask clear 9" "No effect,Masked" bitfld.long 0x04 8. " MSKCLRS4_8 ,Interrupt sub mask clear 8" "No effect,Masked" bitfld.long 0x04 7. " MSKCLRS4_7 ,Interrupt sub mask clear 7" "No effect,Masked" bitfld.long 0x04 6. " MSKCLRS4_6 ,Interrupt sub mask clear 6" "No effect,Masked" textline " " bitfld.long 0x04 5. " MSKCLRS4_5 ,Interrupt sub mask clear 5" "No effect,Masked" bitfld.long 0x04 4. " MSKCLRS4_4 ,Interrupt sub mask clear 4" "No effect,Masked" bitfld.long 0x04 3. " MSKCLRS4_3 ,Interrupt sub mask clear 3" "No effect,Masked" bitfld.long 0x04 2. " MSKCLRS4_2 ,Interrupt sub mask clear 2" "No effect,Masked" textline " " bitfld.long 0x04 1. " MSKCLRS4_1 ,Interrupt sub mask clear 1" "No effect,Masked" bitfld.long 0x04 0. " MSKCLRS4_0 ,Interrupt sub mask clear 0" "No effect,Masked" line.long 0x08 "OUTDTSEL4,Output Data Select Register 4" bitfld.long 0x08 31. " OUTDTSEL4_31 ,Output data select 31" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 30. " OUTDTSEL4_30 ,Output data select 30" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 29. " OUTDTSEL4_29 ,Output data select 29" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 28. " OUTDTSEL4_28 ,Output data select 28" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 27. " OUTDTSEL4_27 ,Output data select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL4_26 ,Output data select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " OUTDTSEL4_25 ,Output data select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL4_24 ,Output data select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " OUTDTSEL4_23 ,Output data select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL4_22 ,Output data select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL4_21 ,Output data select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL4_20 ,Output data select 20" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 19. " OUTDTSEL4_19 ,Output data select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL4_18 ,Output data select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL4_17 ,Output data select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL4_16 ,Output data select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " OUTDTSEL4_15 ,Output data select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL4_14 ,Output data select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL4_13 ,Output data select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL4_12 ,Output data select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " OUTDTSEL4_11 ,Output data select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL4_10 ,Output data select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL4_9 ,Output data select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL4_8 ,Output data select 8" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 7. " OUTDTSEL4_7 ,Output data select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL4_6 ,Output data select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL4_5 ,Output data select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL4_4 ,Output data select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " OUTDTSEL4_3 ,Output data select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL4_2 ,Output data select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL4_1 ,Output data select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL4_0 ,Output data select 0" "OUTDT,OUTDTH/OUTDTL" line.long 0x0C "OUTDTH4,Output Data High Register 4" bitfld.long 0x0C 31. " OUTDTH4_31 ,Output data high 31" "Not valid,Valid" bitfld.long 0x0C 30. " OUTDTH4_30 ,Output data high 30" "Not valid,Valid" bitfld.long 0x0C 29. " OUTDTH4_29 ,Output data high 29" "Not valid,Valid" bitfld.long 0x0C 28. " OUTDTH4_28 ,Output data high 28" "Not valid,Valid" textline " " bitfld.long 0x0C 27. " OUTDTH4_27 ,Output data high 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH4_26 ,Output data high 26" "Not valid,Valid" textline " " bitfld.long 0x0C 25. " OUTDTH4_25 ,Output data high 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH4_24 ,Output data high 24" "Not valid,Valid" bitfld.long 0x0C 23. " OUTDTH4_23 ,Output data high 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH4_22 ,Output data high 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH4_21 ,Output data high 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH4_20 ,Output data high 20" "Not valid,Valid" bitfld.long 0x0C 19. " OUTDTH4_19 ,Output data high 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH4_18 ,Output data high 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH4_17 ,Output data high 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH4_16 ,Output data high 16" "Not valid,Valid" bitfld.long 0x0C 15. " OUTDTH4_15 ,Output data high 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH4_14 ,Output data high 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH4_13 ,Output data high 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH4_12 ,Output data high 12" "Not valid,Valid" bitfld.long 0x0C 11. " OUTDTH4_11 ,Output data high 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH4_10 ,Output data high 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH4_9 ,Output data high 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH4_8 ,Output data high 8" "Not valid,Valid" bitfld.long 0x0C 7. " OUTDTH4_7 ,Output data high 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH4_6 ,Output data high 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH4_5 ,Output data high 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH4_4 ,Output data high 4" "Not valid,Valid" bitfld.long 0x0C 3. " OUTDTH4_3 ,Output data high 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH4_2 ,Output data high 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH4_1 ,Output data high 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH4_0 ,Output data high 0" "Not valid,Valid" line.long 0x10 "OUTDTL4,Output Data Low Register 4" bitfld.long 0x10 31. " OUTDTL4_31 ,Output data low 31" "Not valid,Valid" bitfld.long 0x10 30. " OUTDTL4_30 ,Output data low 30" "Not valid,Valid" bitfld.long 0x10 29. " OUTDTL4_29 ,Output data low 29" "Not valid,Valid" bitfld.long 0x10 28. " OUTDTL4_28 ,Output data low 28" "Not valid,Valid" textline " " bitfld.long 0x10 27. " OUTDTL4_27 ,Output data low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL4_26 ,Output data low 26" "Not valid,Valid" textline " " bitfld.long 0x10 25. " OUTDTL4_25 ,Output data low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL4_24 ,Output data low 24" "Not valid,Valid" bitfld.long 0x10 23. " OUTDTL4_23 ,Output data low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL4_22 ,Output data low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL4_21 ,Output data low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL4_20 ,Output data low 20" "Not valid,Valid" bitfld.long 0x10 19. " OUTDTL4_19 ,Output data low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL4_18 ,Output data low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL4_17 ,Output data low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL4_16 ,Output data low 16" "Not valid,Valid" bitfld.long 0x10 15. " OUTDTL4_15 ,Output data low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL4_14 ,Output data low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL4_13 ,Output data low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL4_12 ,Output data low 12" "Not valid,Valid" bitfld.long 0x10 11. " OUTDTL4_11 ,Output data low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL4_10 ,Output data low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL4_9 ,Output data low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL4_8 ,Output data low 8" "Not valid,Valid" bitfld.long 0x10 7. " OUTDTL4_7 ,Output data low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL4_6 ,Output data low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL4_5 ,Output data low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL4_4 ,Output data low 4" "Not valid,Valid" bitfld.long 0x10 3. " OUTDTL4_3 ,Output data low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL4_2 ,Output data low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL4_1 ,Output data low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL4_0 ,Output data low 0" "Not valid,Valid" line.long 0x14 "BOTHEDGE4,One Edge/Both Edge Select Register 4" bitfld.long 0x14 31. " BOTHEDGE4_31 ,One edge/both edge select 31" "One,Both" bitfld.long 0x14 30. " BOTHEDGE4_30 ,One edge/both edge select 30" "One,Both" bitfld.long 0x14 29. " BOTHEDGE4_29 ,One edge/both edge select 29" "One,Both" bitfld.long 0x14 28. " BOTHEDGE4_28 ,One edge/both edge select 28" "One,Both" textline " " bitfld.long 0x14 27. " BOTHEDGE4_27 ,One edge/both edge select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE4_26 ,One edge/both edge select 26" "One,Both" textline " " bitfld.long 0x14 25. " BOTHEDGE4_25 ,One edge/both edge select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE4_24 ,One edge/both edge select 24" "One,Both" bitfld.long 0x14 23. " BOTHEDGE4_23 ,One edge/both edge select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE4_22 ,One edge/both edge select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE4_21 ,One edge/both edge select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE4_20 ,One edge/both edge select 20" "One,Both" bitfld.long 0x14 19. " BOTHEDGE4_19 ,One edge/both edge select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE4_18 ,One edge/both edge select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE4_17 ,One edge/both edge select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE4_16 ,One edge/both edge select 16" "One,Both" bitfld.long 0x14 15. " BOTHEDGE4_15 ,One edge/both edge select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE4_14 ,One edge/both edge select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE4_13 ,One edge/both edge select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE4_12 ,One edge/both edge select 12" "One,Both" bitfld.long 0x14 11. " BOTHEDGE4_11 ,One edge/both edge select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE4_10 ,One edge/both edge select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE4_9 ,One edge/both edge select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE4_8 ,One edge/both edge select 8" "One,Both" bitfld.long 0x14 7. " BOTHEDGE4_7 ,One edge/both edge select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE4_6 ,One edge/both edge select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE4_5 ,One edge/both edge select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE4_4 ,One edge/both edge select 4" "One,Both" bitfld.long 0x14 3. " BOTHEDGE4_3 ,One edge/both edge select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE4_2 ,One edge/both edge select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE4_1 ,One edge/both edge select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE4_0 ,One edge/both edge select 0" "One,Both" width 0xB tree.end tree "GPIO 5" base ad:0xE6055000 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL5,General IO/Interrupt Switching Register 5" bitfld.long 0x00 27. " IOINTSEL5_27 ,General input/output or interrupt mode select for channel 27" "General I/O,Interrupt" bitfld.long 0x00 26. " IOINTSEL5_26 ,General input/output or interrupt mode select for channel 26" "General I/O,Interrupt" textline " " bitfld.long 0x00 25. " IOINTSEL5_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL5_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" bitfld.long 0x00 23. " IOINTSEL5_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL5_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL5_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL5_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " IOINTSEL5_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL5_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL5_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL5_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" bitfld.long 0x00 15. " IOINTSEL5_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL5_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL5_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL5_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " IOINTSEL5_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL5_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL5_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL5_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" bitfld.long 0x00 7. " IOINTSEL5_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL5_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL5_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL5_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " IOINTSEL5_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL5_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL5_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL5_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL5,General Input/Output Switching Register 5" bitfld.long 0x04 27. " INOUTSEL5_27 ,General input or output mode select for channel 27" "Input,Output" bitfld.long 0x04 26. " INOUTSEL5_26 ,General input or output mode select for channel 26" "Input,Output" textline " " bitfld.long 0x04 25. " INOUTSEL5_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL5_24 ,General input or output mode select for channel 24" "Input,Output" bitfld.long 0x04 23. " INOUTSEL5_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL5_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL5_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL5_20 ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " INOUTSEL5_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL5_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL5_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL5_16 ,General input or output mode select for channel 16" "Input,Output" bitfld.long 0x04 15. " INOUTSEL5_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL5_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL5_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL5_12 ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " INOUTSEL5_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL5_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL5_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL5_8 ,General input or output mode select for channel 8" "Input,Output" bitfld.long 0x04 7. " INOUTSEL5_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL5_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL5_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL5_4 ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " INOUTSEL5_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL5_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL5_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL5_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT5,General Output Register 5" textline " " bitfld.long 0x08 27. " OUTDT5_27 ,Output value for channel 27" "0,1" bitfld.long 0x08 26. " OUTDT5_26 ,Output value for channel 26" "0,1" textline " " bitfld.long 0x08 25. " OUTDT5_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT5_24 ,Output value for channel 24" "0,1" bitfld.long 0x08 23. " OUTDT5_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT5_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT5_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT5_20 ,Output value for channel 20" "0,1" bitfld.long 0x08 19. " OUTDT5_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT5_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT5_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT5_16 ,Output value for channel 16" "0,1" bitfld.long 0x08 15. " OUTDT5_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT5_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT5_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT5_12 ,Output value for channel 12" "0,1" bitfld.long 0x08 11. " OUTDT5_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT5_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT5_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT5_8 ,Output value for channel 8" "0,1" bitfld.long 0x08 7. " OUTDT5_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT5_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT5_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT5_4 ,Output value for channel 4" "0,1" bitfld.long 0x08 3. " OUTDT5_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT5_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT5_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT5_0 ,Output value for channel 0" "0,1" rgroup.long 0x0C++0x07 line.long 0x00 "INDT5,General Input Register 5" textline " " bitfld.long 0x00 27. " INDT5_27 ,Value received through pin 27" "0,1" bitfld.long 0x00 26. " INDT5_26 ,Value received through pin 26" "0,1" textline " " bitfld.long 0x00 25. " INDT5_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT5_24 ,Value received through pin 24" "0,1" bitfld.long 0x00 23. " INDT5_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT5_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT5_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT5_20 ,Value received through pin 20" "0,1" bitfld.long 0x00 19. " INDT5_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT5_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT5_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT5_16 ,Value received through pin 16" "0,1" bitfld.long 0x00 15. " INDT5_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT5_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT5_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT5_12 ,Value received through pin 12" "0,1" bitfld.long 0x00 11. " INDT5_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT5_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT5_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT5_8 ,Value received through pin 8" "0,1" bitfld.long 0x00 7. " INDT5_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT5_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT5_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT5_4 ,Value received through pin 4" "0,1" bitfld.long 0x00 3. " INDT5_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT5_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT5_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT5_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT5,Interrupt Display Register 5" bitfld.long 0x04 27. " INTDT5_27 ,Input of an interrupt signal on the pin 27" "No interrupt,Interrupt" bitfld.long 0x04 26. " INTDT5_26 ,Input of an interrupt signal on the pin 26" "No interrupt,Interrupt" textline " " bitfld.long 0x04 25. " INTDT5_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT5_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " INTDT5_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT5_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT5_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT5_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " INTDT5_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT5_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT5_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT5_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " INTDT5_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT5_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT5_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT5_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " INTDT5_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT5_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT5_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT5_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " INTDT5_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT5_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT5_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT5_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" bitfld.long 0x04 3. " INTDT5_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT5_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT5_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT5_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR5,Interrupt Clear Register 5" bitfld.long 0x00 27. " INTCLR5_27 ,Clears pin 27 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 26. " INTCLR5_26 ,Clears pin 26 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 25. " INTCLR5_25 ,Clears pin 25 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 24. " INTCLR5_24 ,Clears pin 24 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 23. " INTCLR5_23 ,Clears pin 23 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 22. " INTCLR5_22 ,Clears pin 22 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 21. " INTCLR5_21 ,Clears pin 21 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 20. " INTCLR5_20 ,Clears pin 20 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 19. " INTCLR5_19 ,Clears pin 19 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 18. " INTCLR5_18 ,Clears pin 18 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 17. " INTCLR5_17 ,Clears pin 17 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 16. " INTCLR5_16 ,Clears pin 16 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 15. " INTCLR5_15 ,Clears pin 15 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 14. " INTCLR5_14 ,Clears pin 14 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 13. " INTCLR5_13 ,Clears pin 13 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 12. " INTCLR5_12 ,Clears pin 12 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 11. " INTCLR5_11 ,Clears pin 11 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 10. " INTCLR5_10 ,Clears pin 10 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 9. " INTCLR5_9 ,Clears pin 9 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 8. " INTCLR5_8 ,Clears pin 8 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 7. " INTCLR5_7 ,Clears pin 7 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 6. " INTCLR5_6 ,Clears pin 6 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 5. " INTCLR5_5 ,Clears pin 5 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 4. " INTCLR5_4 ,Clears pin 4 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 3. " INTCLR5_3 ,Clears pin 3 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 2. " INTCLR5_2 ,Clears pin 2 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 1. " INTCLR5_1 ,Clears pin 1 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 0. " INTCLR5_0 ,Clears pin 0 bit in the interrupt display register" "No effect,Clear" line.long 0x04 "INTMSK5,Interrupt Mask Register 5" bitfld.long 0x04 27. " INTMSK5_27 ,Masks interrupt request for pin 27" "Masked,Not masked" bitfld.long 0x04 26. " INTMSK5_26 ,Masks interrupt request for pin 26" "Masked,Not masked" textline " " bitfld.long 0x04 25. " INTMSK5_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK5_24 ,Masks interrupt request for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " INTMSK5_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK5_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK5_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK5_20 ,Masks interrupt request for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " INTMSK5_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK5_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK5_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK5_16 ,Masks interrupt request for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " INTMSK5_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK5_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK5_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK5_12 ,Masks interrupt request for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " INTMSK5_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK5_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK5_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK5_8 ,Masks interrupt request for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " INTMSK5_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK5_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK5_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK5_4 ,Masks interrupt request for pin 4" "Masked,Not masked" bitfld.long 0x04 3. " INTMSK5_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK5_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK5_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK5_0 ,Masks interrupt request for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR5,Interrupt Mask Clear Register 5" bitfld.long 0x08 27. " MSKCLR5_27 ,Clears mask for pin 27" "No effect,Not masked" bitfld.long 0x08 26. " MSKCLR5_26 ,Clears mask for pin 26" "No effect,Not masked" textline " " bitfld.long 0x08 25. " MSKCLR5_25 ,Clears mask for pin 25" "No effect,Not masked" bitfld.long 0x08 24. " MSKCLR5_24 ,Clears mask for pin 24" "No effect,Not masked" bitfld.long 0x08 23. " MSKCLR5_23 ,Clears mask for pin 23" "No effect,Not masked" bitfld.long 0x08 22. " MSKCLR5_22 ,Clears mask for pin 22" "No effect,Not masked" textline " " bitfld.long 0x08 21. " MSKCLR5_21 ,Clears mask for pin 21" "No effect,Not masked" bitfld.long 0x08 20. " MSKCLR5_20 ,Clears mask for pin 20" "No effect,Not masked" bitfld.long 0x08 19. " MSKCLR5_19 ,Clears mask for pin 19" "No effect,Not masked" bitfld.long 0x08 18. " MSKCLR5_18 ,Clears mask for pin 18" "No effect,Not masked" textline " " bitfld.long 0x08 17. " MSKCLR5_17 ,Clears mask for pin 17" "No effect,Not masked" bitfld.long 0x08 16. " MSKCLR5_16 ,Clears mask for pin 16" "No effect,Not masked" bitfld.long 0x08 15. " MSKCLR5_15 ,Clears mask for pin 15" "No effect,Not masked" bitfld.long 0x08 14. " MSKCLR5_14 ,Clears mask for pin 14" "No effect,Not masked" textline " " bitfld.long 0x08 13. " MSKCLR5_13 ,Clears mask for pin 13" "No effect,Not masked" bitfld.long 0x08 12. " MSKCLR5_12 ,Clears mask for pin 12" "No effect,Not masked" bitfld.long 0x08 11. " MSKCLR5_11 ,Clears mask for pin 11" "No effect,Not masked" bitfld.long 0x08 10. " MSKCLR5_10 ,Clears mask for pin 10" "No effect,Not masked" textline " " bitfld.long 0x08 9. " MSKCLR5_9 ,Clears mask for pin 9" "No effect,Not masked" bitfld.long 0x08 8. " MSKCLR5_8 ,Clears mask for pin 8" "No effect,Not masked" bitfld.long 0x08 7. " MSKCLR5_7 ,Clears mask for pin 7" "No effect,Not masked" bitfld.long 0x08 6. " MSKCLR5_6 ,Clears mask for pin 6" "No effect,Not masked" textline " " bitfld.long 0x08 5. " MSKCLR5_5 ,Clears mask for pin 5" "No effect,Not masked" bitfld.long 0x08 4. " MSKCLR5_4 ,Clears mask for pin 4" "No effect,Not masked" bitfld.long 0x08 3. " MSKCLR5_3 ,Clears mask for pin 3" "No effect,Not masked" bitfld.long 0x08 2. " MSKCLR5_2 ,Clears mask for pin 2" "No effect,Not masked" textline " " bitfld.long 0x08 1. " MSKCLR5_1 ,Clears mask for pin 1" "No effect,Not masked" bitfld.long 0x08 0. " MSKCLR5_0 ,Clears mask for pin 0" "No effect,Not masked" line.long 0x0C "POSNEG5,Positive/Negative Logic Select Register 5" bitfld.long 0x0C 27. " POSNEG5_27 ,Selects polarity for pin 27" "Positive,Negative" bitfld.long 0x0C 26. " POSNEG5_26 ,Selects polarity for pin 26" "Positive,Negative" textline " " bitfld.long 0x0C 25. " POSNEG5_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG5_24 ,Selects polarity for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " POSNEG5_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG5_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG5_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG5_20 ,Selects polarity for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " POSNEG5_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG5_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG5_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG5_16 ,Selects polarity for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " POSNEG5_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG5_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG5_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG5_12 ,Selects polarity for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " POSNEG5_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG5_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG5_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG5_8 ,Selects polarity for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " POSNEG5_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG5_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG5_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG5_4 ,Selects polarity for pin 4" "Positive,Negative" bitfld.long 0x0C 3. " POSNEG5_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG5_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG5_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG5_0 ,Selects polarity for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL5,Edge/Level Select Register 5" bitfld.long 0x10 27. " EDGLEVEL5_27 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 27" "Level,Edge" bitfld.long 0x10 26. " EDGLEVEL5_26 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 26" "Level,Edge" textline " " bitfld.long 0x10 25. " EDGLEVEL5_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL5_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" bitfld.long 0x10 23. " EDGLEVEL5_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL5_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL5_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL5_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" bitfld.long 0x10 19. " EDGLEVEL5_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL5_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL5_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL5_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" bitfld.long 0x10 15. " EDGLEVEL5_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL5_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL5_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL5_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" bitfld.long 0x10 11. " EDGLEVEL5_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL5_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL5_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL5_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" bitfld.long 0x10 7. " EDGLEVEL5_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL5_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL5_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL5_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" bitfld.long 0x10 3. " EDGLEVEL5_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL5_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL5_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL5_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF5,Chattering Prevention On/Off Register 5" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "S3D4/66000,S3D4/33000,S3D4/16500,S3D4/8250" else bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "CLKP/25000,CLKP/12500,CLKP/6250,CLKP/3125" endif textline " " bitfld.long 0x14 3. " FILONOFF5_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF5_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" bitfld.long 0x14 1. " FILONOFF5_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF5_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" group.long 0x38++0x17 line.long 0x00 "INTMSKS5,Interrupt Sub Mask Register 5" bitfld.long 0x00 27. " INTMSKS5_27 ,Interrupt sub mask 27" "Masked,Not masked" bitfld.long 0x00 26. " INTMSKS5_26 ,Interrupt sub mask 26" "Masked,Not masked" textline " " bitfld.long 0x00 25. " INTMSKS5_25 ,Interrupt sub mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS5_24 ,Interrupt sub mask 24" "Masked,Not masked" bitfld.long 0x00 23. " INTMSKS5_23 ,Interrupt sub mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS5_22 ,Interrupt sub mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS5_21 ,Interrupt sub mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS5_20 ,Interrupt sub mask 20" "Masked,Not masked" bitfld.long 0x00 19. " INTMSKS5_19 ,Interrupt sub mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS5_18 ,Interrupt sub mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS5_17 ,Interrupt sub mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS5_16 ,Interrupt sub mask 16" "Masked,Not masked" bitfld.long 0x00 15. " INTMSKS5_15 ,Interrupt sub mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS5_14 ,Interrupt sub mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS5_13 ,Interrupt sub mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS5_12 ,Interrupt sub mask 12" "Masked,Not masked" bitfld.long 0x00 11. " INTMSKS5_11 ,Interrupt sub mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS5_10 ,Interrupt sub mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS5_9 ,Interrupt sub mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS5_8 ,Interrupt sub mask 8" "Masked,Not masked" bitfld.long 0x00 7. " INTMSKS5_7 ,Interrupt sub mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS5_6 ,Interrupt sub mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS5_5 ,Interrupt sub mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS5_4 ,Interrupt sub mask 4" "Masked,Not masked" bitfld.long 0x00 3. " INTMSKS5_3 ,Interrupt sub mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS5_2 ,Interrupt sub mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS5_1 ,Interrupt sub mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS5_0 ,Interrupt sub mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS5,Interrupt Sub Mask Clear Register 5" bitfld.long 0x04 27. " MSKCLRS5_27 ,Interrupt sub mask clear 27" "No effect,Masked" bitfld.long 0x04 26. " MSKCLRS5_26 ,Interrupt sub mask clear 26" "No effect,Masked" textline " " bitfld.long 0x04 25. " MSKCLRS5_25 ,Interrupt sub mask clear 25" "No effect,Masked" bitfld.long 0x04 24. " MSKCLRS5_24 ,Interrupt sub mask clear 24" "No effect,Masked" bitfld.long 0x04 23. " MSKCLRS5_23 ,Interrupt sub mask clear 23" "No effect,Masked" bitfld.long 0x04 22. " MSKCLRS5_22 ,Interrupt sub mask clear 22" "No effect,Masked" textline " " bitfld.long 0x04 21. " MSKCLRS5_21 ,Interrupt sub mask clear 21" "No effect,Masked" bitfld.long 0x04 20. " MSKCLRS5_20 ,Interrupt sub mask clear 20" "No effect,Masked" bitfld.long 0x04 19. " MSKCLRS5_19 ,Interrupt sub mask clear 19" "No effect,Masked" bitfld.long 0x04 18. " MSKCLRS5_18 ,Interrupt sub mask clear 18" "No effect,Masked" textline " " bitfld.long 0x04 17. " MSKCLRS5_17 ,Interrupt sub mask clear 17" "No effect,Masked" bitfld.long 0x04 16. " MSKCLRS5_16 ,Interrupt sub mask clear 16" "No effect,Masked" bitfld.long 0x04 15. " MSKCLRS5_15 ,Interrupt sub mask clear 15" "No effect,Masked" bitfld.long 0x04 14. " MSKCLRS5_14 ,Interrupt sub mask clear 14" "No effect,Masked" textline " " bitfld.long 0x04 13. " MSKCLRS5_13 ,Interrupt sub mask clear 13" "No effect,Masked" bitfld.long 0x04 12. " MSKCLRS5_12 ,Interrupt sub mask clear 12" "No effect,Masked" bitfld.long 0x04 11. " MSKCLRS5_11 ,Interrupt sub mask clear 11" "No effect,Masked" bitfld.long 0x04 10. " MSKCLRS5_10 ,Interrupt sub mask clear 10" "No effect,Masked" textline " " bitfld.long 0x04 9. " MSKCLRS5_9 ,Interrupt sub mask clear 9" "No effect,Masked" bitfld.long 0x04 8. " MSKCLRS5_8 ,Interrupt sub mask clear 8" "No effect,Masked" bitfld.long 0x04 7. " MSKCLRS5_7 ,Interrupt sub mask clear 7" "No effect,Masked" bitfld.long 0x04 6. " MSKCLRS5_6 ,Interrupt sub mask clear 6" "No effect,Masked" textline " " bitfld.long 0x04 5. " MSKCLRS5_5 ,Interrupt sub mask clear 5" "No effect,Masked" bitfld.long 0x04 4. " MSKCLRS5_4 ,Interrupt sub mask clear 4" "No effect,Masked" bitfld.long 0x04 3. " MSKCLRS5_3 ,Interrupt sub mask clear 3" "No effect,Masked" bitfld.long 0x04 2. " MSKCLRS5_2 ,Interrupt sub mask clear 2" "No effect,Masked" textline " " bitfld.long 0x04 1. " MSKCLRS5_1 ,Interrupt sub mask clear 1" "No effect,Masked" bitfld.long 0x04 0. " MSKCLRS5_0 ,Interrupt sub mask clear 0" "No effect,Masked" line.long 0x08 "OUTDTSEL5,Output Data Select Register 5" bitfld.long 0x08 27. " OUTDTSEL5_27 ,Output data select 27" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 26. " OUTDTSEL5_26 ,Output data select 26" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 25. " OUTDTSEL5_25 ,Output data select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL5_24 ,Output data select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " OUTDTSEL5_23 ,Output data select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL5_22 ,Output data select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL5_21 ,Output data select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL5_20 ,Output data select 20" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 19. " OUTDTSEL5_19 ,Output data select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL5_18 ,Output data select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL5_17 ,Output data select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL5_16 ,Output data select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " OUTDTSEL5_15 ,Output data select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL5_14 ,Output data select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL5_13 ,Output data select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL5_12 ,Output data select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " OUTDTSEL5_11 ,Output data select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL5_10 ,Output data select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL5_9 ,Output data select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL5_8 ,Output data select 8" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 7. " OUTDTSEL5_7 ,Output data select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL5_6 ,Output data select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL5_5 ,Output data select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL5_4 ,Output data select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " OUTDTSEL5_3 ,Output data select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL5_2 ,Output data select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL5_1 ,Output data select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL5_0 ,Output data select 0" "OUTDT,OUTDTH/OUTDTL" line.long 0x0C "OUTDTH5,Output Data High Register 5" bitfld.long 0x0C 27. " OUTDTH5_27 ,Output data high 27" "Not valid,Valid" bitfld.long 0x0C 26. " OUTDTH5_26 ,Output data high 26" "Not valid,Valid" textline " " bitfld.long 0x0C 25. " OUTDTH5_25 ,Output data high 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH5_24 ,Output data high 24" "Not valid,Valid" bitfld.long 0x0C 23. " OUTDTH5_23 ,Output data high 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH5_22 ,Output data high 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH5_21 ,Output data high 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH5_20 ,Output data high 20" "Not valid,Valid" bitfld.long 0x0C 19. " OUTDTH5_19 ,Output data high 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH5_18 ,Output data high 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH5_17 ,Output data high 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH5_16 ,Output data high 16" "Not valid,Valid" bitfld.long 0x0C 15. " OUTDTH5_15 ,Output data high 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH5_14 ,Output data high 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH5_13 ,Output data high 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH5_12 ,Output data high 12" "Not valid,Valid" bitfld.long 0x0C 11. " OUTDTH5_11 ,Output data high 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH5_10 ,Output data high 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH5_9 ,Output data high 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH5_8 ,Output data high 8" "Not valid,Valid" bitfld.long 0x0C 7. " OUTDTH5_7 ,Output data high 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH5_6 ,Output data high 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH5_5 ,Output data high 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH5_4 ,Output data high 4" "Not valid,Valid" bitfld.long 0x0C 3. " OUTDTH5_3 ,Output data high 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH5_2 ,Output data high 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH5_1 ,Output data high 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH5_0 ,Output data high 0" "Not valid,Valid" line.long 0x10 "OUTDTL5,Output Data Low Register 5" bitfld.long 0x10 27. " OUTDTL5_27 ,Output data low 27" "Not valid,Valid" bitfld.long 0x10 26. " OUTDTL5_26 ,Output data low 26" "Not valid,Valid" textline " " bitfld.long 0x10 25. " OUTDTL5_25 ,Output data low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL5_24 ,Output data low 24" "Not valid,Valid" bitfld.long 0x10 23. " OUTDTL5_23 ,Output data low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL5_22 ,Output data low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL5_21 ,Output data low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL5_20 ,Output data low 20" "Not valid,Valid" bitfld.long 0x10 19. " OUTDTL5_19 ,Output data low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL5_18 ,Output data low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL5_17 ,Output data low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL5_16 ,Output data low 16" "Not valid,Valid" bitfld.long 0x10 15. " OUTDTL5_15 ,Output data low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL5_14 ,Output data low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL5_13 ,Output data low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL5_12 ,Output data low 12" "Not valid,Valid" bitfld.long 0x10 11. " OUTDTL5_11 ,Output data low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL5_10 ,Output data low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL5_9 ,Output data low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL5_8 ,Output data low 8" "Not valid,Valid" bitfld.long 0x10 7. " OUTDTL5_7 ,Output data low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL5_6 ,Output data low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL5_5 ,Output data low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL5_4 ,Output data low 4" "Not valid,Valid" bitfld.long 0x10 3. " OUTDTL5_3 ,Output data low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL5_2 ,Output data low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL5_1 ,Output data low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL5_0 ,Output data low 0" "Not valid,Valid" line.long 0x14 "BOTHEDGE5,One Edge/Both Edge Select Register 5" bitfld.long 0x14 27. " BOTHEDGE5_27 ,One edge/both edge select 27" "One,Both" bitfld.long 0x14 26. " BOTHEDGE5_26 ,One edge/both edge select 26" "One,Both" textline " " bitfld.long 0x14 25. " BOTHEDGE5_25 ,One edge/both edge select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE5_24 ,One edge/both edge select 24" "One,Both" bitfld.long 0x14 23. " BOTHEDGE5_23 ,One edge/both edge select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE5_22 ,One edge/both edge select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE5_21 ,One edge/both edge select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE5_20 ,One edge/both edge select 20" "One,Both" bitfld.long 0x14 19. " BOTHEDGE5_19 ,One edge/both edge select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE5_18 ,One edge/both edge select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE5_17 ,One edge/both edge select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE5_16 ,One edge/both edge select 16" "One,Both" bitfld.long 0x14 15. " BOTHEDGE5_15 ,One edge/both edge select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE5_14 ,One edge/both edge select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE5_13 ,One edge/both edge select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE5_12 ,One edge/both edge select 12" "One,Both" bitfld.long 0x14 11. " BOTHEDGE5_11 ,One edge/both edge select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE5_10 ,One edge/both edge select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE5_9 ,One edge/both edge select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE5_8 ,One edge/both edge select 8" "One,Both" bitfld.long 0x14 7. " BOTHEDGE5_7 ,One edge/both edge select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE5_6 ,One edge/both edge select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE5_5 ,One edge/both edge select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE5_4 ,One edge/both edge select 4" "One,Both" bitfld.long 0x14 3. " BOTHEDGE5_3 ,One edge/both edge select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE5_2 ,One edge/both edge select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE5_1 ,One edge/both edge select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE5_0 ,One edge/both edge select 0" "One,Both" width 0xB tree.end tree "GPIO 6" base ad:0xE6055400 width 11. group.long 0x00++0xB line.long 0x00 "IOINTSEL6,General IO/Interrupt Switching Register 6" bitfld.long 0x00 25. " IOINTSEL6_25 ,General input/output or interrupt mode select for channel 25" "General I/O,Interrupt" bitfld.long 0x00 24. " IOINTSEL6_24 ,General input/output or interrupt mode select for channel 24" "General I/O,Interrupt" bitfld.long 0x00 23. " IOINTSEL6_23 ,General input/output or interrupt mode select for channel 23" "General I/O,Interrupt" bitfld.long 0x00 22. " IOINTSEL6_22 ,General input/output or interrupt mode select for channel 22" "General I/O,Interrupt" textline " " bitfld.long 0x00 21. " IOINTSEL6_21 ,General input/output or interrupt mode select for channel 21" "General I/O,Interrupt" bitfld.long 0x00 20. " IOINTSEL6_20 ,General input/output or interrupt mode select for channel 20" "General I/O,Interrupt" bitfld.long 0x00 19. " IOINTSEL6_19 ,General input/output or interrupt mode select for channel 19" "General I/O,Interrupt" bitfld.long 0x00 18. " IOINTSEL6_18 ,General input/output or interrupt mode select for channel 18" "General I/O,Interrupt" textline " " bitfld.long 0x00 17. " IOINTSEL6_17 ,General input/output or interrupt mode select for channel 17" "General I/O,Interrupt" bitfld.long 0x00 16. " IOINTSEL6_16 ,General input/output or interrupt mode select for channel 16" "General I/O,Interrupt" bitfld.long 0x00 15. " IOINTSEL6_15 ,General input/output or interrupt mode select for channel 15" "General I/O,Interrupt" bitfld.long 0x00 14. " IOINTSEL6_14 ,General input/output or interrupt mode select for channel 14" "General I/O,Interrupt" textline " " bitfld.long 0x00 13. " IOINTSEL6_13 ,General input/output or interrupt mode select for channel 13" "General I/O,Interrupt" bitfld.long 0x00 12. " IOINTSEL6_12 ,General input/output or interrupt mode select for channel 12" "General I/O,Interrupt" bitfld.long 0x00 11. " IOINTSEL6_11 ,General input/output or interrupt mode select for channel 11" "General I/O,Interrupt" bitfld.long 0x00 10. " IOINTSEL6_10 ,General input/output or interrupt mode select for channel 10" "General I/O,Interrupt" textline " " bitfld.long 0x00 9. " IOINTSEL6_9 ,General input/output or interrupt mode select for channel 9" "General I/O,Interrupt" bitfld.long 0x00 8. " IOINTSEL6_8 ,General input/output or interrupt mode select for channel 8" "General I/O,Interrupt" bitfld.long 0x00 7. " IOINTSEL6_7 ,General input/output or interrupt mode select for channel 7" "General I/O,Interrupt" bitfld.long 0x00 6. " IOINTSEL6_6 ,General input/output or interrupt mode select for channel 6" "General I/O,Interrupt" textline " " bitfld.long 0x00 5. " IOINTSEL6_5 ,General input/output or interrupt mode select for channel 5" "General I/O,Interrupt" bitfld.long 0x00 4. " IOINTSEL6_4 ,General input/output or interrupt mode select for channel 4" "General I/O,Interrupt" bitfld.long 0x00 3. " IOINTSEL6_3 ,General input/output or interrupt mode select for channel 3" "General I/O,Interrupt" bitfld.long 0x00 2. " IOINTSEL6_2 ,General input/output or interrupt mode select for channel 2" "General I/O,Interrupt" textline " " bitfld.long 0x00 1. " IOINTSEL6_1 ,General input/output or interrupt mode select for channel 1" "General I/O,Interrupt" bitfld.long 0x00 0. " IOINTSEL6_0 ,General input/output or interrupt mode select for channel 0" "General I/O,Interrupt" line.long 0x04 "INOUTSEL6,General Input/Output Switching Register 6" bitfld.long 0x04 25. " INOUTSEL6_25 ,General input or output mode select for channel 25" "Input,Output" bitfld.long 0x04 24. " INOUTSEL6_24 ,General input or output mode select for channel 24" "Input,Output" bitfld.long 0x04 23. " INOUTSEL6_23 ,General input or output mode select for channel 23" "Input,Output" bitfld.long 0x04 22. " INOUTSEL6_22 ,General input or output mode select for channel 22" "Input,Output" textline " " bitfld.long 0x04 21. " INOUTSEL6_21 ,General input or output mode select for channel 21" "Input,Output" bitfld.long 0x04 20. " INOUTSEL6_20 ,General input or output mode select for channel 20" "Input,Output" bitfld.long 0x04 19. " INOUTSEL6_19 ,General input or output mode select for channel 19" "Input,Output" bitfld.long 0x04 18. " INOUTSEL6_18 ,General input or output mode select for channel 18" "Input,Output" textline " " bitfld.long 0x04 17. " INOUTSEL6_17 ,General input or output mode select for channel 17" "Input,Output" bitfld.long 0x04 16. " INOUTSEL6_16 ,General input or output mode select for channel 16" "Input,Output" bitfld.long 0x04 15. " INOUTSEL6_15 ,General input or output mode select for channel 15" "Input,Output" bitfld.long 0x04 14. " INOUTSEL6_14 ,General input or output mode select for channel 14" "Input,Output" textline " " bitfld.long 0x04 13. " INOUTSEL6_13 ,General input or output mode select for channel 13" "Input,Output" bitfld.long 0x04 12. " INOUTSEL6_12 ,General input or output mode select for channel 12" "Input,Output" bitfld.long 0x04 11. " INOUTSEL6_11 ,General input or output mode select for channel 11" "Input,Output" bitfld.long 0x04 10. " INOUTSEL6_10 ,General input or output mode select for channel 10" "Input,Output" textline " " bitfld.long 0x04 9. " INOUTSEL6_9 ,General input or output mode select for channel 9" "Input,Output" bitfld.long 0x04 8. " INOUTSEL6_8 ,General input or output mode select for channel 8" "Input,Output" bitfld.long 0x04 7. " INOUTSEL6_7 ,General input or output mode select for channel 7" "Input,Output" bitfld.long 0x04 6. " INOUTSEL6_6 ,General input or output mode select for channel 6" "Input,Output" textline " " bitfld.long 0x04 5. " INOUTSEL6_5 ,General input or output mode select for channel 5" "Input,Output" bitfld.long 0x04 4. " INOUTSEL6_4 ,General input or output mode select for channel 4" "Input,Output" bitfld.long 0x04 3. " INOUTSEL6_3 ,General input or output mode select for channel 3" "Input,Output" bitfld.long 0x04 2. " INOUTSEL6_2 ,General input or output mode select for channel 2" "Input,Output" textline " " bitfld.long 0x04 1. " INOUTSEL6_1 ,General input or output mode select for channel 1" "Input,Output" bitfld.long 0x04 0. " INOUTSEL6_0 ,General input or output mode select for channel 0" "Input,Output" textline " " line.long 0x08 "OUTDT6,General Output Register 6" bitfld.long 0x08 25. " OUTDT6_25 ,Output value for channel 25" "0,1" bitfld.long 0x08 24. " OUTDT6_24 ,Output value for channel 24" "0,1" bitfld.long 0x08 23. " OUTDT6_23 ,Output value for channel 23" "0,1" bitfld.long 0x08 22. " OUTDT6_22 ,Output value for channel 22" "0,1" textline " " bitfld.long 0x08 21. " OUTDT6_21 ,Output value for channel 21" "0,1" bitfld.long 0x08 20. " OUTDT6_20 ,Output value for channel 20" "0,1" bitfld.long 0x08 19. " OUTDT6_19 ,Output value for channel 19" "0,1" bitfld.long 0x08 18. " OUTDT6_18 ,Output value for channel 18" "0,1" textline " " bitfld.long 0x08 17. " OUTDT6_17 ,Output value for channel 17" "0,1" bitfld.long 0x08 16. " OUTDT6_16 ,Output value for channel 16" "0,1" bitfld.long 0x08 15. " OUTDT6_15 ,Output value for channel 15" "0,1" bitfld.long 0x08 14. " OUTDT6_14 ,Output value for channel 14" "0,1" textline " " bitfld.long 0x08 13. " OUTDT6_13 ,Output value for channel 13" "0,1" bitfld.long 0x08 12. " OUTDT6_12 ,Output value for channel 12" "0,1" bitfld.long 0x08 11. " OUTDT6_11 ,Output value for channel 11" "0,1" bitfld.long 0x08 10. " OUTDT6_10 ,Output value for channel 10" "0,1" textline " " bitfld.long 0x08 9. " OUTDT6_9 ,Output value for channel 9" "0,1" bitfld.long 0x08 8. " OUTDT6_8 ,Output value for channel 8" "0,1" bitfld.long 0x08 7. " OUTDT6_7 ,Output value for channel 7" "0,1" bitfld.long 0x08 6. " OUTDT6_6 ,Output value for channel 6" "0,1" textline " " bitfld.long 0x08 5. " OUTDT6_5 ,Output value for channel 5" "0,1" bitfld.long 0x08 4. " OUTDT6_4 ,Output value for channel 4" "0,1" bitfld.long 0x08 3. " OUTDT6_3 ,Output value for channel 3" "0,1" bitfld.long 0x08 2. " OUTDT6_2 ,Output value for channel 2" "0,1" textline " " bitfld.long 0x08 1. " OUTDT6_1 ,Output value for channel 1" "0,1" bitfld.long 0x08 0. " OUTDT6_0 ,Output value for channel 0" "0,1" rgroup.long 0x0C++0x07 line.long 0x00 "INDT6,General Input Register 6" bitfld.long 0x00 25. " INDT6_25 ,Value received through pin 25" "0,1" bitfld.long 0x00 24. " INDT6_24 ,Value received through pin 24" "0,1" bitfld.long 0x00 23. " INDT6_23 ,Value received through pin 23" "0,1" bitfld.long 0x00 22. " INDT6_22 ,Value received through pin 22" "0,1" textline " " bitfld.long 0x00 21. " INDT6_21 ,Value received through pin 21" "0,1" bitfld.long 0x00 20. " INDT6_20 ,Value received through pin 20" "0,1" bitfld.long 0x00 19. " INDT6_19 ,Value received through pin 19" "0,1" bitfld.long 0x00 18. " INDT6_18 ,Value received through pin 18" "0,1" textline " " bitfld.long 0x00 17. " INDT6_17 ,Value received through pin 17" "0,1" bitfld.long 0x00 16. " INDT6_16 ,Value received through pin 16" "0,1" bitfld.long 0x00 15. " INDT6_15 ,Value received through pin 15" "0,1" bitfld.long 0x00 14. " INDT6_14 ,Value received through pin 14" "0,1" textline " " bitfld.long 0x00 13. " INDT6_13 ,Value received through pin 13" "0,1" bitfld.long 0x00 12. " INDT6_12 ,Value received through pin 12" "0,1" bitfld.long 0x00 11. " INDT6_11 ,Value received through pin 11" "0,1" bitfld.long 0x00 10. " INDT6_10 ,Value received through pin 10" "0,1" textline " " bitfld.long 0x00 9. " INDT6_9 ,Value received through pin 9" "0,1" bitfld.long 0x00 8. " INDT6_8 ,Value received through pin 8" "0,1" bitfld.long 0x00 7. " INDT6_7 ,Value received through pin 7" "0,1" bitfld.long 0x00 6. " INDT6_6 ,Value received through pin 6" "0,1" textline " " bitfld.long 0x00 5. " INDT6_5 ,Value received through pin 5" "0,1" bitfld.long 0x00 4. " INDT6_4 ,Value received through pin 4" "0,1" bitfld.long 0x00 3. " INDT6_3 ,Value received through pin 3" "0,1" bitfld.long 0x00 2. " INDT6_2 ,Value received through pin 2" "0,1" textline " " bitfld.long 0x00 1. " INDT6_1 ,Value received through pin 1" "0,1" bitfld.long 0x00 0. " INDT6_0 ,Value received through pin 0" "0,1" textline " " line.long 0x04 "INTDT6,Interrupt Display Register 6" bitfld.long 0x04 25. " INTDT6_25 ,Input of an interrupt signal on the pin 25" "No interrupt,Interrupt" bitfld.long 0x04 24. " INTDT6_24 ,Input of an interrupt signal on the pin 24" "No interrupt,Interrupt" bitfld.long 0x04 23. " INTDT6_23 ,Input of an interrupt signal on the pin 23" "No interrupt,Interrupt" bitfld.long 0x04 22. " INTDT6_22 ,Input of an interrupt signal on the pin 22" "No interrupt,Interrupt" textline " " bitfld.long 0x04 21. " INTDT6_21 ,Input of an interrupt signal on the pin 21" "No interrupt,Interrupt" bitfld.long 0x04 20. " INTDT6_20 ,Input of an interrupt signal on the pin 20" "No interrupt,Interrupt" bitfld.long 0x04 19. " INTDT6_19 ,Input of an interrupt signal on the pin 19" "No interrupt,Interrupt" bitfld.long 0x04 18. " INTDT6_18 ,Input of an interrupt signal on the pin 18" "No interrupt,Interrupt" textline " " bitfld.long 0x04 17. " INTDT6_17 ,Input of an interrupt signal on the pin 17" "No interrupt,Interrupt" bitfld.long 0x04 16. " INTDT6_16 ,Input of an interrupt signal on the pin 16" "No interrupt,Interrupt" bitfld.long 0x04 15. " INTDT6_15 ,Input of an interrupt signal on the pin 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " INTDT6_14 ,Input of an interrupt signal on the pin 14" "No interrupt,Interrupt" textline " " bitfld.long 0x04 13. " INTDT6_13 ,Input of an interrupt signal on the pin 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " INTDT6_12 ,Input of an interrupt signal on the pin 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " INTDT6_11 ,Input of an interrupt signal on the pin 11" "No interrupt,Interrupt" bitfld.long 0x04 10. " INTDT6_10 ,Input of an interrupt signal on the pin 10" "No interrupt,Interrupt" textline " " bitfld.long 0x04 9. " INTDT6_9 ,Input of an interrupt signal on the pin 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " INTDT6_8 ,Input of an interrupt signal on the pin 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " INTDT6_7 ,Input of an interrupt signal on the pin 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " INTDT6_6 ,Input of an interrupt signal on the pin 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " INTDT6_5 ,Input of an interrupt signal on the pin 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " INTDT6_4 ,Input of an interrupt signal on the pin 4" "No interrupt,Interrupt" bitfld.long 0x04 3. " INTDT6_3 ,Input of an interrupt signal on the pin 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " INTDT6_2 ,Input of an interrupt signal on the pin 2" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " INTDT6_1 ,Input of an interrupt signal on the pin 1" "No interrupt,Interrupt" bitfld.long 0x04 0. " INTDT6_0 ,Input of an interrupt signal on the pin 0" "No interrupt,Interrupt" group.long 0x14++0x17 line.long 0x00 "INTCLR6,Interrupt Clear Register 6" bitfld.long 0x00 25. " INTCLR6_25 ,Clears pin 25 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 24. " INTCLR6_24 ,Clears pin 24 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 23. " INTCLR6_23 ,Clears pin 23 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 22. " INTCLR6_22 ,Clears pin 22 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 21. " INTCLR6_21 ,Clears pin 21 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 20. " INTCLR6_20 ,Clears pin 20 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 19. " INTCLR6_19 ,Clears pin 19 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 18. " INTCLR6_18 ,Clears pin 18 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 17. " INTCLR6_17 ,Clears pin 17 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 16. " INTCLR6_16 ,Clears pin 16 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 15. " INTCLR6_15 ,Clears pin 15 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 14. " INTCLR6_14 ,Clears pin 14 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 13. " INTCLR6_13 ,Clears pin 13 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 12. " INTCLR6_12 ,Clears pin 12 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 11. " INTCLR6_11 ,Clears pin 11 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 10. " INTCLR6_10 ,Clears pin 10 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 9. " INTCLR6_9 ,Clears pin 9 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 8. " INTCLR6_8 ,Clears pin 8 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 7. " INTCLR6_7 ,Clears pin 7 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 6. " INTCLR6_6 ,Clears pin 6 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 5. " INTCLR6_5 ,Clears pin 5 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 4. " INTCLR6_4 ,Clears pin 4 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 3. " INTCLR6_3 ,Clears pin 3 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 2. " INTCLR6_2 ,Clears pin 2 bit in the interrupt display register" "No effect,Clear" textline " " bitfld.long 0x00 1. " INTCLR6_1 ,Clears pin 1 bit in the interrupt display register" "No effect,Clear" bitfld.long 0x00 0. " INTCLR6_0 ,Clears pin 0 bit in the interrupt display register" "No effect,Clear" line.long 0x04 "INTMSK6,Interrupt Mask Register 6" bitfld.long 0x04 25. " INTMSK6_25 ,Masks interrupt request for pin 25" "Masked,Not masked" bitfld.long 0x04 24. " INTMSK6_24 ,Masks interrupt request for pin 24" "Masked,Not masked" bitfld.long 0x04 23. " INTMSK6_23 ,Masks interrupt request for pin 23" "Masked,Not masked" bitfld.long 0x04 22. " INTMSK6_22 ,Masks interrupt request for pin 22" "Masked,Not masked" textline " " bitfld.long 0x04 21. " INTMSK6_21 ,Masks interrupt request for pin 21" "Masked,Not masked" bitfld.long 0x04 20. " INTMSK6_20 ,Masks interrupt request for pin 20" "Masked,Not masked" bitfld.long 0x04 19. " INTMSK6_19 ,Masks interrupt request for pin 19" "Masked,Not masked" bitfld.long 0x04 18. " INTMSK6_18 ,Masks interrupt request for pin 18" "Masked,Not masked" textline " " bitfld.long 0x04 17. " INTMSK6_17 ,Masks interrupt request for pin 17" "Masked,Not masked" bitfld.long 0x04 16. " INTMSK6_16 ,Masks interrupt request for pin 16" "Masked,Not masked" bitfld.long 0x04 15. " INTMSK6_15 ,Masks interrupt request for pin 15" "Masked,Not masked" bitfld.long 0x04 14. " INTMSK6_14 ,Masks interrupt request for pin 14" "Masked,Not masked" textline " " bitfld.long 0x04 13. " INTMSK6_13 ,Masks interrupt request for pin 13" "Masked,Not masked" bitfld.long 0x04 12. " INTMSK6_12 ,Masks interrupt request for pin 12" "Masked,Not masked" bitfld.long 0x04 11. " INTMSK6_11 ,Masks interrupt request for pin 11" "Masked,Not masked" bitfld.long 0x04 10. " INTMSK6_10 ,Masks interrupt request for pin 10" "Masked,Not masked" textline " " bitfld.long 0x04 9. " INTMSK6_9 ,Masks interrupt request for pin 9" "Masked,Not masked" bitfld.long 0x04 8. " INTMSK6_8 ,Masks interrupt request for pin 8" "Masked,Not masked" bitfld.long 0x04 7. " INTMSK6_7 ,Masks interrupt request for pin 7" "Masked,Not masked" bitfld.long 0x04 6. " INTMSK6_6 ,Masks interrupt request for pin 6" "Masked,Not masked" textline " " bitfld.long 0x04 5. " INTMSK6_5 ,Masks interrupt request for pin 5" "Masked,Not masked" bitfld.long 0x04 4. " INTMSK6_4 ,Masks interrupt request for pin 4" "Masked,Not masked" bitfld.long 0x04 3. " INTMSK6_3 ,Masks interrupt request for pin 3" "Masked,Not masked" bitfld.long 0x04 2. " INTMSK6_2 ,Masks interrupt request for pin 2" "Masked,Not masked" textline " " bitfld.long 0x04 1. " INTMSK6_1 ,Masks interrupt request for pin 1" "Masked,Not masked" bitfld.long 0x04 0. " INTMSK6_0 ,Masks interrupt request for pin 0" "Masked,Not masked" line.long 0x08 "MSKCLR6,Interrupt Mask Clear Register 6" bitfld.long 0x08 25. " MSKCLR6_25 ,Clears mask for pin 25" "No effect,Not masked" bitfld.long 0x08 24. " MSKCLR6_24 ,Clears mask for pin 24" "No effect,Not masked" bitfld.long 0x08 23. " MSKCLR6_23 ,Clears mask for pin 23" "No effect,Not masked" bitfld.long 0x08 22. " MSKCLR6_22 ,Clears mask for pin 22" "No effect,Not masked" textline " " bitfld.long 0x08 21. " MSKCLR6_21 ,Clears mask for pin 21" "No effect,Not masked" bitfld.long 0x08 20. " MSKCLR6_20 ,Clears mask for pin 20" "No effect,Not masked" bitfld.long 0x08 19. " MSKCLR6_19 ,Clears mask for pin 19" "No effect,Not masked" bitfld.long 0x08 18. " MSKCLR6_18 ,Clears mask for pin 18" "No effect,Not masked" textline " " bitfld.long 0x08 17. " MSKCLR6_17 ,Clears mask for pin 17" "No effect,Not masked" bitfld.long 0x08 16. " MSKCLR6_16 ,Clears mask for pin 16" "No effect,Not masked" bitfld.long 0x08 15. " MSKCLR6_15 ,Clears mask for pin 15" "No effect,Not masked" bitfld.long 0x08 14. " MSKCLR6_14 ,Clears mask for pin 14" "No effect,Not masked" textline " " bitfld.long 0x08 13. " MSKCLR6_13 ,Clears mask for pin 13" "No effect,Not masked" bitfld.long 0x08 12. " MSKCLR6_12 ,Clears mask for pin 12" "No effect,Not masked" bitfld.long 0x08 11. " MSKCLR6_11 ,Clears mask for pin 11" "No effect,Not masked" bitfld.long 0x08 10. " MSKCLR6_10 ,Clears mask for pin 10" "No effect,Not masked" textline " " bitfld.long 0x08 9. " MSKCLR6_9 ,Clears mask for pin 9" "No effect,Not masked" bitfld.long 0x08 8. " MSKCLR6_8 ,Clears mask for pin 8" "No effect,Not masked" bitfld.long 0x08 7. " MSKCLR6_7 ,Clears mask for pin 7" "No effect,Not masked" bitfld.long 0x08 6. " MSKCLR6_6 ,Clears mask for pin 6" "No effect,Not masked" textline " " bitfld.long 0x08 5. " MSKCLR6_5 ,Clears mask for pin 5" "No effect,Not masked" bitfld.long 0x08 4. " MSKCLR6_4 ,Clears mask for pin 4" "No effect,Not masked" bitfld.long 0x08 3. " MSKCLR6_3 ,Clears mask for pin 3" "No effect,Not masked" bitfld.long 0x08 2. " MSKCLR6_2 ,Clears mask for pin 2" "No effect,Not masked" textline " " bitfld.long 0x08 1. " MSKCLR6_1 ,Clears mask for pin 1" "No effect,Not masked" bitfld.long 0x08 0. " MSKCLR6_0 ,Clears mask for pin 0" "No effect,Not masked" line.long 0x0C "POSNEG6,Positive/Negative Logic Select Register 6" bitfld.long 0x0C 25. " POSNEG6_25 ,Selects polarity for pin 25" "Positive,Negative" bitfld.long 0x0C 24. " POSNEG6_24 ,Selects polarity for pin 24" "Positive,Negative" bitfld.long 0x0C 23. " POSNEG6_23 ,Selects polarity for pin 23" "Positive,Negative" bitfld.long 0x0C 22. " POSNEG6_22 ,Selects polarity for pin 22" "Positive,Negative" textline " " bitfld.long 0x0C 21. " POSNEG6_21 ,Selects polarity for pin 21" "Positive,Negative" bitfld.long 0x0C 20. " POSNEG6_20 ,Selects polarity for pin 20" "Positive,Negative" bitfld.long 0x0C 19. " POSNEG6_19 ,Selects polarity for pin 19" "Positive,Negative" bitfld.long 0x0C 18. " POSNEG6_18 ,Selects polarity for pin 18" "Positive,Negative" textline " " bitfld.long 0x0C 17. " POSNEG6_17 ,Selects polarity for pin 17" "Positive,Negative" bitfld.long 0x0C 16. " POSNEG6_16 ,Selects polarity for pin 16" "Positive,Negative" bitfld.long 0x0C 15. " POSNEG6_15 ,Selects polarity for pin 15" "Positive,Negative" bitfld.long 0x0C 14. " POSNEG6_14 ,Selects polarity for pin 14" "Positive,Negative" textline " " bitfld.long 0x0C 13. " POSNEG6_13 ,Selects polarity for pin 13" "Positive,Negative" bitfld.long 0x0C 12. " POSNEG6_12 ,Selects polarity for pin 12" "Positive,Negative" bitfld.long 0x0C 11. " POSNEG6_11 ,Selects polarity for pin 11" "Positive,Negative" bitfld.long 0x0C 10. " POSNEG6_10 ,Selects polarity for pin 10" "Positive,Negative" textline " " bitfld.long 0x0C 9. " POSNEG6_9 ,Selects polarity for pin 9" "Positive,Negative" bitfld.long 0x0C 8. " POSNEG6_8 ,Selects polarity for pin 8" "Positive,Negative" bitfld.long 0x0C 7. " POSNEG6_7 ,Selects polarity for pin 7" "Positive,Negative" bitfld.long 0x0C 6. " POSNEG6_6 ,Selects polarity for pin 6" "Positive,Negative" textline " " bitfld.long 0x0C 5. " POSNEG6_5 ,Selects polarity for pin 5" "Positive,Negative" bitfld.long 0x0C 4. " POSNEG6_4 ,Selects polarity for pin 4" "Positive,Negative" bitfld.long 0x0C 3. " POSNEG6_3 ,Selects polarity for pin 3" "Positive,Negative" bitfld.long 0x0C 2. " POSNEG6_2 ,Selects polarity for pin 2" "Positive,Negative" textline " " bitfld.long 0x0C 1. " POSNEG6_1 ,Selects polarity for pin 1" "Positive,Negative" bitfld.long 0x0C 0. " POSNEG6_0 ,Selects polarity for pin 0" "Positive,Negative" line.long 0x10 "EDGLEVEL6,Edge/Level Select Register 6" bitfld.long 0x10 25. " EDGLEVEL6_25 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 25" "Level,Edge" bitfld.long 0x10 24. " EDGLEVEL6_24 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 24" "Level,Edge" bitfld.long 0x10 23. " EDGLEVEL6_23 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 23" "Level,Edge" bitfld.long 0x10 22. " EDGLEVEL6_22 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 22" "Level,Edge" textline " " bitfld.long 0x10 21. " EDGLEVEL6_21 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 21" "Level,Edge" bitfld.long 0x10 20. " EDGLEVEL6_20 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 20" "Level,Edge" bitfld.long 0x10 19. " EDGLEVEL6_19 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 19" "Level,Edge" bitfld.long 0x10 18. " EDGLEVEL6_18 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 18" "Level,Edge" textline " " bitfld.long 0x10 17. " EDGLEVEL6_17 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 17" "Level,Edge" bitfld.long 0x10 16. " EDGLEVEL6_16 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 16" "Level,Edge" bitfld.long 0x10 15. " EDGLEVEL6_15 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 15" "Level,Edge" bitfld.long 0x10 14. " EDGLEVEL6_14 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 14" "Level,Edge" textline " " bitfld.long 0x10 13. " EDGLEVEL6_13 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 13" "Level,Edge" bitfld.long 0x10 12. " EDGLEVEL6_12 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 12" "Level,Edge" bitfld.long 0x10 11. " EDGLEVEL6_11 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 11" "Level,Edge" bitfld.long 0x10 10. " EDGLEVEL6_10 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 10" "Level,Edge" textline " " bitfld.long 0x10 9. " EDGLEVEL6_9 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 9" "Level,Edge" bitfld.long 0x10 8. " EDGLEVEL6_8 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 8" "Level,Edge" bitfld.long 0x10 7. " EDGLEVEL6_7 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 7" "Level,Edge" bitfld.long 0x10 6. " EDGLEVEL6_6 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 6" "Level,Edge" textline " " bitfld.long 0x10 5. " EDGLEVEL6_5 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 5" "Level,Edge" bitfld.long 0x10 4. " EDGLEVEL6_4 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 4" "Level,Edge" bitfld.long 0x10 3. " EDGLEVEL6_3 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 3" "Level,Edge" bitfld.long 0x10 2. " EDGLEVEL6_2 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 2" "Level,Edge" textline " " bitfld.long 0x10 1. " EDGLEVEL6_1 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 1" "Level,Edge" bitfld.long 0x10 0. " EDGLEVEL6_0 ,Selects the level or edge as detection conditions of the interrupt input signal for pin 0" "Level,Edge" textline " " line.long 0x14 "FILONOFF6,Chattering Prevention On/Off Register 6" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*")) bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "S3D4/66000,S3D4/33000,S3D4/16500,S3D4/8250" else bitfld.long 0x14 30.--31. " CLKSEL ,Filter clock frequency" "CLKP/25000,CLKP/12500,CLKP/6250,CLKP/3125" endif textline " " bitfld.long 0x14 3. " FILONOFF6_3 ,Enables or disables the chattering prevention function 3" "Disabled,Enabled" bitfld.long 0x14 2. " FILONOFF6_2 ,Enables or disables the chattering prevention function 2" "Disabled,Enabled" bitfld.long 0x14 1. " FILONOFF6_1 ,Enables or disables the chattering prevention function 1" "Disabled,Enabled" bitfld.long 0x14 0. " FILONOFF6_0 ,Enables or disables the chattering prevention function 0" "Disabled,Enabled" group.long 0x38++0x17 line.long 0x00 "INTMSKS6,Interrupt Sub Mask Register 6" bitfld.long 0x00 25. " INTMSKS6_25 ,Interrupt sub mask 25" "Masked,Not masked" bitfld.long 0x00 24. " INTMSKS6_24 ,Interrupt sub mask 24" "Masked,Not masked" bitfld.long 0x00 23. " INTMSKS6_23 ,Interrupt sub mask 23" "Masked,Not masked" bitfld.long 0x00 22. " INTMSKS6_22 ,Interrupt sub mask 22" "Masked,Not masked" textline " " bitfld.long 0x00 21. " INTMSKS6_21 ,Interrupt sub mask 21" "Masked,Not masked" bitfld.long 0x00 20. " INTMSKS6_20 ,Interrupt sub mask 20" "Masked,Not masked" bitfld.long 0x00 19. " INTMSKS6_19 ,Interrupt sub mask 19" "Masked,Not masked" bitfld.long 0x00 18. " INTMSKS6_18 ,Interrupt sub mask 18" "Masked,Not masked" textline " " bitfld.long 0x00 17. " INTMSKS6_17 ,Interrupt sub mask 17" "Masked,Not masked" bitfld.long 0x00 16. " INTMSKS6_16 ,Interrupt sub mask 16" "Masked,Not masked" bitfld.long 0x00 15. " INTMSKS6_15 ,Interrupt sub mask 15" "Masked,Not masked" bitfld.long 0x00 14. " INTMSKS6_14 ,Interrupt sub mask 14" "Masked,Not masked" textline " " bitfld.long 0x00 13. " INTMSKS6_13 ,Interrupt sub mask 13" "Masked,Not masked" bitfld.long 0x00 12. " INTMSKS6_12 ,Interrupt sub mask 12" "Masked,Not masked" bitfld.long 0x00 11. " INTMSKS6_11 ,Interrupt sub mask 11" "Masked,Not masked" bitfld.long 0x00 10. " INTMSKS6_10 ,Interrupt sub mask 10" "Masked,Not masked" textline " " bitfld.long 0x00 9. " INTMSKS6_9 ,Interrupt sub mask 9" "Masked,Not masked" bitfld.long 0x00 8. " INTMSKS6_8 ,Interrupt sub mask 8" "Masked,Not masked" bitfld.long 0x00 7. " INTMSKS6_7 ,Interrupt sub mask 7" "Masked,Not masked" bitfld.long 0x00 6. " INTMSKS6_6 ,Interrupt sub mask 6" "Masked,Not masked" textline " " bitfld.long 0x00 5. " INTMSKS6_5 ,Interrupt sub mask 5" "Masked,Not masked" bitfld.long 0x00 4. " INTMSKS6_4 ,Interrupt sub mask 4" "Masked,Not masked" bitfld.long 0x00 3. " INTMSKS6_3 ,Interrupt sub mask 3" "Masked,Not masked" bitfld.long 0x00 2. " INTMSKS6_2 ,Interrupt sub mask 2" "Masked,Not masked" textline " " bitfld.long 0x00 1. " INTMSKS6_1 ,Interrupt sub mask 1" "Masked,Not masked" bitfld.long 0x00 0. " INTMSKS6_0 ,Interrupt sub mask 0" "Masked,Not masked" line.long 0x04 "MSKCLRS6,Interrupt Sub Mask Clear Register 6" bitfld.long 0x04 25. " MSKCLRS6_25 ,Interrupt sub mask clear 25" "No effect,Masked" bitfld.long 0x04 24. " MSKCLRS6_24 ,Interrupt sub mask clear 24" "No effect,Masked" bitfld.long 0x04 23. " MSKCLRS6_23 ,Interrupt sub mask clear 23" "No effect,Masked" bitfld.long 0x04 22. " MSKCLRS6_22 ,Interrupt sub mask clear 22" "No effect,Masked" textline " " bitfld.long 0x04 21. " MSKCLRS6_21 ,Interrupt sub mask clear 21" "No effect,Masked" bitfld.long 0x04 20. " MSKCLRS6_20 ,Interrupt sub mask clear 20" "No effect,Masked" bitfld.long 0x04 19. " MSKCLRS6_19 ,Interrupt sub mask clear 19" "No effect,Masked" bitfld.long 0x04 18. " MSKCLRS6_18 ,Interrupt sub mask clear 18" "No effect,Masked" textline " " bitfld.long 0x04 17. " MSKCLRS6_17 ,Interrupt sub mask clear 17" "No effect,Masked" bitfld.long 0x04 16. " MSKCLRS6_16 ,Interrupt sub mask clear 16" "No effect,Masked" bitfld.long 0x04 15. " MSKCLRS6_15 ,Interrupt sub mask clear 15" "No effect,Masked" bitfld.long 0x04 14. " MSKCLRS6_14 ,Interrupt sub mask clear 14" "No effect,Masked" textline " " bitfld.long 0x04 13. " MSKCLRS6_13 ,Interrupt sub mask clear 13" "No effect,Masked" bitfld.long 0x04 12. " MSKCLRS6_12 ,Interrupt sub mask clear 12" "No effect,Masked" bitfld.long 0x04 11. " MSKCLRS6_11 ,Interrupt sub mask clear 11" "No effect,Masked" bitfld.long 0x04 10. " MSKCLRS6_10 ,Interrupt sub mask clear 10" "No effect,Masked" textline " " bitfld.long 0x04 9. " MSKCLRS6_9 ,Interrupt sub mask clear 9" "No effect,Masked" bitfld.long 0x04 8. " MSKCLRS6_8 ,Interrupt sub mask clear 8" "No effect,Masked" bitfld.long 0x04 7. " MSKCLRS6_7 ,Interrupt sub mask clear 7" "No effect,Masked" bitfld.long 0x04 6. " MSKCLRS6_6 ,Interrupt sub mask clear 6" "No effect,Masked" textline " " bitfld.long 0x04 5. " MSKCLRS6_5 ,Interrupt sub mask clear 5" "No effect,Masked" bitfld.long 0x04 4. " MSKCLRS6_4 ,Interrupt sub mask clear 4" "No effect,Masked" bitfld.long 0x04 3. " MSKCLRS6_3 ,Interrupt sub mask clear 3" "No effect,Masked" bitfld.long 0x04 2. " MSKCLRS6_2 ,Interrupt sub mask clear 2" "No effect,Masked" textline " " bitfld.long 0x04 1. " MSKCLRS6_1 ,Interrupt sub mask clear 1" "No effect,Masked" bitfld.long 0x04 0. " MSKCLRS6_0 ,Interrupt sub mask clear 0" "No effect,Masked" line.long 0x08 "OUTDTSEL6,Output Data Select Register 6" bitfld.long 0x08 25. " OUTDTSEL6_25 ,Output data select 25" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 24. " OUTDTSEL6_24 ,Output data select 24" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 23. " OUTDTSEL6_23 ,Output data select 23" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 22. " OUTDTSEL6_22 ,Output data select 22" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 21. " OUTDTSEL6_21 ,Output data select 21" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 20. " OUTDTSEL6_20 ,Output data select 20" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 19. " OUTDTSEL6_19 ,Output data select 19" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 18. " OUTDTSEL6_18 ,Output data select 18" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 17. " OUTDTSEL6_17 ,Output data select 17" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 16. " OUTDTSEL6_16 ,Output data select 16" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 15. " OUTDTSEL6_15 ,Output data select 15" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 14. " OUTDTSEL6_14 ,Output data select 14" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 13. " OUTDTSEL6_13 ,Output data select 13" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 12. " OUTDTSEL6_12 ,Output data select 12" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 11. " OUTDTSEL6_11 ,Output data select 11" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 10. " OUTDTSEL6_10 ,Output data select 10" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 9. " OUTDTSEL6_9 ,Output data select 9" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 8. " OUTDTSEL6_8 ,Output data select 8" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 7. " OUTDTSEL6_7 ,Output data select 7" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 6. " OUTDTSEL6_6 ,Output data select 6" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 5. " OUTDTSEL6_5 ,Output data select 5" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 4. " OUTDTSEL6_4 ,Output data select 4" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 3. " OUTDTSEL6_3 ,Output data select 3" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 2. " OUTDTSEL6_2 ,Output data select 2" "OUTDT,OUTDTH/OUTDTL" textline " " bitfld.long 0x08 1. " OUTDTSEL6_1 ,Output data select 1" "OUTDT,OUTDTH/OUTDTL" bitfld.long 0x08 0. " OUTDTSEL6_0 ,Output data select 0" "OUTDT,OUTDTH/OUTDTL" line.long 0x0C "OUTDTH6,Output Data High Register 6" bitfld.long 0x0C 25. " OUTDTH6_25 ,Output data high 25" "Not valid,Valid" bitfld.long 0x0C 24. " OUTDTH6_24 ,Output data high 24" "Not valid,Valid" bitfld.long 0x0C 23. " OUTDTH6_23 ,Output data high 23" "Not valid,Valid" bitfld.long 0x0C 22. " OUTDTH6_22 ,Output data high 22" "Not valid,Valid" textline " " bitfld.long 0x0C 21. " OUTDTH6_21 ,Output data high 21" "Not valid,Valid" bitfld.long 0x0C 20. " OUTDTH6_20 ,Output data high 20" "Not valid,Valid" bitfld.long 0x0C 19. " OUTDTH6_19 ,Output data high 19" "Not valid,Valid" bitfld.long 0x0C 18. " OUTDTH6_18 ,Output data high 18" "Not valid,Valid" textline " " bitfld.long 0x0C 17. " OUTDTH6_17 ,Output data high 17" "Not valid,Valid" bitfld.long 0x0C 16. " OUTDTH6_16 ,Output data high 16" "Not valid,Valid" bitfld.long 0x0C 15. " OUTDTH6_15 ,Output data high 15" "Not valid,Valid" bitfld.long 0x0C 14. " OUTDTH6_14 ,Output data high 14" "Not valid,Valid" textline " " bitfld.long 0x0C 13. " OUTDTH6_13 ,Output data high 13" "Not valid,Valid" bitfld.long 0x0C 12. " OUTDTH6_12 ,Output data high 12" "Not valid,Valid" bitfld.long 0x0C 11. " OUTDTH6_11 ,Output data high 11" "Not valid,Valid" bitfld.long 0x0C 10. " OUTDTH6_10 ,Output data high 10" "Not valid,Valid" textline " " bitfld.long 0x0C 9. " OUTDTH6_9 ,Output data high 9" "Not valid,Valid" bitfld.long 0x0C 8. " OUTDTH6_8 ,Output data high 8" "Not valid,Valid" bitfld.long 0x0C 7. " OUTDTH6_7 ,Output data high 7" "Not valid,Valid" bitfld.long 0x0C 6. " OUTDTH6_6 ,Output data high 6" "Not valid,Valid" textline " " bitfld.long 0x0C 5. " OUTDTH6_5 ,Output data high 5" "Not valid,Valid" bitfld.long 0x0C 4. " OUTDTH6_4 ,Output data high 4" "Not valid,Valid" bitfld.long 0x0C 3. " OUTDTH6_3 ,Output data high 3" "Not valid,Valid" bitfld.long 0x0C 2. " OUTDTH6_2 ,Output data high 2" "Not valid,Valid" textline " " bitfld.long 0x0C 1. " OUTDTH6_1 ,Output data high 1" "Not valid,Valid" bitfld.long 0x0C 0. " OUTDTH6_0 ,Output data high 0" "Not valid,Valid" line.long 0x10 "OUTDTL6,Output Data Low Register 6" bitfld.long 0x10 25. " OUTDTL6_25 ,Output data low 25" "Not valid,Valid" bitfld.long 0x10 24. " OUTDTL6_24 ,Output data low 24" "Not valid,Valid" bitfld.long 0x10 23. " OUTDTL6_23 ,Output data low 23" "Not valid,Valid" bitfld.long 0x10 22. " OUTDTL6_22 ,Output data low 22" "Not valid,Valid" textline " " bitfld.long 0x10 21. " OUTDTL6_21 ,Output data low 21" "Not valid,Valid" bitfld.long 0x10 20. " OUTDTL6_20 ,Output data low 20" "Not valid,Valid" bitfld.long 0x10 19. " OUTDTL6_19 ,Output data low 19" "Not valid,Valid" bitfld.long 0x10 18. " OUTDTL6_18 ,Output data low 18" "Not valid,Valid" textline " " bitfld.long 0x10 17. " OUTDTL6_17 ,Output data low 17" "Not valid,Valid" bitfld.long 0x10 16. " OUTDTL6_16 ,Output data low 16" "Not valid,Valid" bitfld.long 0x10 15. " OUTDTL6_15 ,Output data low 15" "Not valid,Valid" bitfld.long 0x10 14. " OUTDTL6_14 ,Output data low 14" "Not valid,Valid" textline " " bitfld.long 0x10 13. " OUTDTL6_13 ,Output data low 13" "Not valid,Valid" bitfld.long 0x10 12. " OUTDTL6_12 ,Output data low 12" "Not valid,Valid" bitfld.long 0x10 11. " OUTDTL6_11 ,Output data low 11" "Not valid,Valid" bitfld.long 0x10 10. " OUTDTL6_10 ,Output data low 10" "Not valid,Valid" textline " " bitfld.long 0x10 9. " OUTDTL6_9 ,Output data low 9" "Not valid,Valid" bitfld.long 0x10 8. " OUTDTL6_8 ,Output data low 8" "Not valid,Valid" bitfld.long 0x10 7. " OUTDTL6_7 ,Output data low 7" "Not valid,Valid" bitfld.long 0x10 6. " OUTDTL6_6 ,Output data low 6" "Not valid,Valid" textline " " bitfld.long 0x10 5. " OUTDTL6_5 ,Output data low 5" "Not valid,Valid" bitfld.long 0x10 4. " OUTDTL6_4 ,Output data low 4" "Not valid,Valid" bitfld.long 0x10 3. " OUTDTL6_3 ,Output data low 3" "Not valid,Valid" bitfld.long 0x10 2. " OUTDTL6_2 ,Output data low 2" "Not valid,Valid" textline " " bitfld.long 0x10 1. " OUTDTL6_1 ,Output data low 1" "Not valid,Valid" bitfld.long 0x10 0. " OUTDTL6_0 ,Output data low 0" "Not valid,Valid" line.long 0x14 "BOTHEDGE6,One Edge/Both Edge Select Register 6" bitfld.long 0x14 25. " BOTHEDGE6_25 ,One edge/both edge select 25" "One,Both" bitfld.long 0x14 24. " BOTHEDGE6_24 ,One edge/both edge select 24" "One,Both" bitfld.long 0x14 23. " BOTHEDGE6_23 ,One edge/both edge select 23" "One,Both" bitfld.long 0x14 22. " BOTHEDGE6_22 ,One edge/both edge select 22" "One,Both" textline " " bitfld.long 0x14 21. " BOTHEDGE6_21 ,One edge/both edge select 21" "One,Both" bitfld.long 0x14 20. " BOTHEDGE6_20 ,One edge/both edge select 20" "One,Both" bitfld.long 0x14 19. " BOTHEDGE6_19 ,One edge/both edge select 19" "One,Both" bitfld.long 0x14 18. " BOTHEDGE6_18 ,One edge/both edge select 18" "One,Both" textline " " bitfld.long 0x14 17. " BOTHEDGE6_17 ,One edge/both edge select 17" "One,Both" bitfld.long 0x14 16. " BOTHEDGE6_16 ,One edge/both edge select 16" "One,Both" bitfld.long 0x14 15. " BOTHEDGE6_15 ,One edge/both edge select 15" "One,Both" bitfld.long 0x14 14. " BOTHEDGE6_14 ,One edge/both edge select 14" "One,Both" textline " " bitfld.long 0x14 13. " BOTHEDGE6_13 ,One edge/both edge select 13" "One,Both" bitfld.long 0x14 12. " BOTHEDGE6_12 ,One edge/both edge select 12" "One,Both" bitfld.long 0x14 11. " BOTHEDGE6_11 ,One edge/both edge select 11" "One,Both" bitfld.long 0x14 10. " BOTHEDGE6_10 ,One edge/both edge select 10" "One,Both" textline " " bitfld.long 0x14 9. " BOTHEDGE6_9 ,One edge/both edge select 9" "One,Both" bitfld.long 0x14 8. " BOTHEDGE6_8 ,One edge/both edge select 8" "One,Both" bitfld.long 0x14 7. " BOTHEDGE6_7 ,One edge/both edge select 7" "One,Both" bitfld.long 0x14 6. " BOTHEDGE6_6 ,One edge/both edge select 6" "One,Both" textline " " bitfld.long 0x14 5. " BOTHEDGE6_5 ,One edge/both edge select 5" "One,Both" bitfld.long 0x14 4. " BOTHEDGE6_4 ,One edge/both edge select 4" "One,Both" bitfld.long 0x14 3. " BOTHEDGE6_3 ,One edge/both edge select 3" "One,Both" bitfld.long 0x14 2. " BOTHEDGE6_2 ,One edge/both edge select 2" "One,Both" textline " " bitfld.long 0x14 1. " BOTHEDGE6_1 ,One edge/both edge select 1" "One,Both" bitfld.long 0x14 0. " BOTHEDGE6_0 ,One edge/both edge select 0" "One,Both" width 0xB tree.end tree.end tree "CPG (Clock Pulse Generator)" base ad:0xE6150000 width 11. group.long 0x04++0x3 line.long 0x00 "FRQCRB,Frequency Control Register B" bitfld.long 0x00 31. " KICK ,KICK bit" "Not activated,Activated" bitfld.long 0x00 20.--23. " ZTRFC ,Debug Trace port Clock (ZTRfi) Frequency Division Ratio" ",,x 1/4,x 1/6,x 1/8,x 1/12,x 1/16,x 1/18,x 1/24,,,,x 1/5,?..." bitfld.long 0x00 16.--19. " ZTFC ,Debug Trace bus Clock (ZTfi) Frequency Division Ratio" ",,,x 1/6,x 1/8,x 1/12,x 1/16,x 1/18,x 1/24,,,,x 1/5,?..." textline " " bitfld.long 0x00 0.--3. " ZTRD2FC ,Debug Clock (ZTRD2fi) Frequency Division Ratio" ",,,,,x 1/12,x 1/16,x 1/18,x 1/24,?..." sif !cpuis("R8A77940") group.long 0xE0++0x3 line.long 0x00 "FRQCRC,Frequency Control Register C" bitfld.long 0x00 8.--12. " ZFC ,AP-System Core (Cortex-A15) Clock (Zfi) Frequency Division Ratio" "x 32/32,x 31/32,x 30/32,x 29/32,x 28/32,x 27/32,x 26/32,x 25/32,x 24/32,x 23/32,x 22/32,x 21/32,x 20/32,x 19/32,x 18/32,x 17/32,x 16/32,x 15/32,x 14/32,x 13/32,x 12/32,x 11/32,x 10/32,x 9/32,x 8/32,x 7/32,x 6/32,x 5/32,x 4/32,x 3/32,x 2/32,x 1/32" rgroup.long 0xD0++0x3 line.long 0x00 "PLLECR,PLL Enable Control Register" bitfld.long 0x00 8. " PLL0ST ,PLL circuit 0 status" "Off,On" group.long 0xD8++0x3 line.long 0x00 "PLL0CR,PLL0 Control Register" hexmask.long.byte 0x00 24.--30. 1. " STC ,PLL Circuit 0 Multiplication Ratio" endif group.long 0x74++0x7 line.long 0x00 "SDCKCR,SDHI Clock Frequency Control Register" bitfld.long 0x00 8.--11. " SDHFC ,SDH clock (SDHfi) Frequency Division Ratio" "x 1/2,x 1/3,x 1/4,x 1/6,x 1/8,x 1/12,x 1/16,x 1/18,x 1/24,,x 1/36,x 1/48,?..." bitfld.long 0x00 4.--7. " SD0FC ,SDHI0 clock (SD0fi) Frequency Division Ratio" ",,,,,x 1/12,x 1/16,x 1/18,x 1/24,,x 1/36,x 1/48,x 1/10,?..." sif ((cpu()!="RCARM2")&&(!cpuis("R8A77940"))) bitfld.long 0x00 0.--3. " SD1FC ,SDHI1 clock (SD1fi) Frequency Division Ratio" ",,,,,x 1/12,x 1/16,x 1/18,x 1/24,,x 1/36,x 1/48,x 1/10,,," endif sif (cpu()=="RCARM2"||cpuis("R8A77940")) line.long 0x04 "SD1CKCR,SDHI1 Clock Frequency Control Register" else line.long 0x04 "SD2CKCR,SDHI2 Clock Frequency Control Register" endif bitfld.long 0x04 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x04 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" sif (cpu()=="RCARM2"||cpuis("R8A77940")) group.long 0x26C++0x03 line.long 0x00 "SD2CKCR,SDHI2 Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else group.long 0x7C++0x03 line.long 0x00 "SD3CKCR,SDHI3 Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" endif group.long 0x240++0x3 line.long 0x00 "MMC0CKCR,MMC0 Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" sif (cpu()!="RCARM2"&&(!cpuis("R8A77940"))) group.long 0x244++0x03 line.long 0x00 "MMC1CKCR,MMC1 Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" endif group.long 0x25C++0x3 line.long 0x00 "ADSPCKCR,ADSP Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--3. " DIV ,Division Ratio" ",x 1/3,x 1/4,x 1/6,x 1/8,x 1/12,x 1/16,x 1/18,x 1/24,,x 1/36,x 1/48,?..." sif (!cpuis("R8A77940")) group.long 0x248++0x7 line.long 0x00 "SSPCKCR,SSP Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x00 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" line.long 0x04 "SSPRSCKCR,SSPRS Clock Frequency Control Register" bitfld.long 0x04 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" bitfld.long 0x04 0.--5. " DIV ,Division Ratio" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" endif sif cpu()=="RCARM2" group.long 0x234++0x03 line.long 0x00 "GPUCKCR,GPU Clock Frequency Control Register" bitfld.long 0x00 15. " ZGCKSEL ,Clock Select" "(PLL1/VCO x 1/2) x 1/3,(PLL1/VCO x 1/2) x 1/5" endif sif (cpu()!="RCARM2"&&(!cpuis("R8A77940"))) if (((per.l(ad:0xE6150000+0x230))&0x2000)==0x0000) group.long 0x230++0x3 line.long 0x00 "MTSBCKCR,MTSB Clock Frequency Control Register" bitfld.long 0x00 13. " MTSB0SRC ,Clock Select" "CPGMA/PLL1,CPGMD/PLL3" bitfld.long 0x00 12. " MTSB1SRC ,Clock Select" "CPGMA/PLL1,CPGMD/PLL3" textline " " bitfld.long 0x00 4.--7. " MTSB1X2FC ,MTSB1X2 clock (MTSB1X2fi) Frequency Division Ratio when using CPGMA/PLL1" ",,x 1/4,x 1/6,,,,,,,,,x 1/5,,,Stopped" bitfld.long 0x00 0.--3. " MTSB1X1FC ,MTSB1X1 clock (MTSB1X1fi) Frequency Division Ratio when using CPGMA/PLL1" ",,,,x 1/8,x 1/12,,,,,,,x 1/10,,,Stopped" else group.long 0x230++0x3 line.long 0x00 "MTSBCKCR,MTSB Clock Frequency Control Register" bitfld.long 0x00 13. " MTSB0SRC ,Clock Select" "CPGMA/PLL1,CPGMD/PLL3" bitfld.long 0x00 12. " MTSB1SRC ,Clock Select" "CPGMA/PLL1,CPGMD/PLL3" bitfld.long 0x00 8.--11. " MTSB0FC ,MTSB0 clock (MTSB0fi) Frequency Division Ratio when using CPGMA/PLL1" ",,,x 1/6,x 1/8,,,,,,,,x 1/10,,,Stopped" endif endif group.long 0x270++0x7 line.long 0x00 "RCANCKCR,RCAN Clock Frequency Control Register" bitfld.long 0x00 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" line.long 0x04 "FMMCKCR,FMM Clock Frequency Control Register" bitfld.long 0x04 8. " CKSTP ,Clock Stop" "Not stopped,Stopped" sif ((cpu()=="RCARM2")||cpuis("R8A77940")) bitfld.long 0x04 1. " FMMCKSEL ,Select the clock supplied to FMM" "FMCLK,MLBCLK / 6" endif sif !cpuis("R8A77940") group.long 0x58++0x3 line.long 0x00 "DVFSCR0,DVFS Control Register 0" bitfld.long 0x00 31. " DVFSEN ,Enables DVFS control sequence" "Disabled,Enabled" bitfld.long 0x00 29. " PLLVSMODE ,PLL Power Supply request mode" "Disabled,Enabled" rbitfld.long 0x00 27. " I2CEND ,I2C status bit" "Not started/On going,Finished" textline " " rbitfld.long 0x00 26. " I2CERR ,I2C error status bit" "No error,Error" bitfld.long 0x00 23. " VSSTART ,Voltage Scaling Start Bit" "Not started,Started" bitfld.long 0x00 20. " VSINTEN ,VSEND Interrupt Enable bit" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " VSERR2 ,Error bit 2" "No error,Error" bitfld.long 0x00 17. " VSERR1 ,Error bit 1" "No error,Error" bitfld.long 0x00 16. " VSEND ,VSEND bit" "Not completed,Completed" textline " " bitfld.long 0x00 13. " VREQ ,Request voltage bit" "Low,High" rbitfld.long 0x00 9. " VCURRENT ,Request Status Bit" "Not requested,Requested" group.long 0x5C++0x3 line.long 0x00 "DVFSCR1,DVFS Control Register 1" bitfld.long 0x00 8. " WAITMODE ,Selects Timer mode for DVFS timer" "Timeout,Time Measurement" hexmask.long.byte 0x00 0.--7. 1. " WAITTIME ,DVFS timer value" endif base ad:0xFFEF0000 group.long 0x00++0x7 line.long 0x00 "SH4AIFC,SH-4A Ick Frequency Control Register" bitfld.long 0x00 0.--2. " IIFC ,SH-4A internal clock division ratio" "x 1,x 1/2,x 1/3,x 1/6,?..." line.long 0x04 "SH4ASTBCR,SH-4A Standby Control Register" bitfld.long 0x04 31. " LTSLP ,Light Sleep" "Disabled,Enabled" rbitfld.long 0x04 9. " EXRESET ,SH-4A Core Reset State" "No reset,Reset" bitfld.long 0x04 8. " EXRESETEND ,SH-4A Core Reset Completed" "Not completed,Completed" textline " " rbitfld.long 0x04 2. " SLEEP ,Sleep Mode" "Disabled,Enabled" bitfld.long 0x04 1. " RESET ,Reset" "No reset,Reset" bitfld.long 0x04 0. " MSTP ,Module Stop" "Not stopped,Stopped" width 0xB tree.end tree "MSSR (Module Standby, Software Reset)" base ad:0xE6150000 tree "Module Stop Status Registers" width 11. rgroup.long 0x30++0x3 line.long 0x00 "MSTPSR_0,Module Stop Status Register 0" bitfld.long 0x00 22. " MSTPST_022 ,INTC-RT Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST_021 ,RTDMAC Stop Status" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST_018 ,H-UDI Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 11. " MSTPST_011 ,ARMREG Stop Status" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST_000 ,MSIOF0 Stop Status" "Not stopped,Stopped" rgroup.long 0x38++0x3 line.long 0x00 "MSTPSR_1,Module Stop Status Register 1" bitfld.long 0x00 31. " MSTPST_131 ,VSP1 (SY) Stop Status" "Not stopped,Stopped" bitfld.long 0x00 28. " MSTPST_128 ,VSP1DU0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 25. " MSTPST_125 ,TMU0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 24. " MSTPST_124 ,CMT0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST_122 ,TMU2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST_121 ,TMU3 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 19. " MSTPST_119 ,FDP0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST_115 ,2DDMAC Stop Status" "Not stopped,Stopped" bitfld.long 0x00 12. " MSTPST_112 ,3DG Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 11. " MSTPST_111 ,TMU1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST_108 ,TSIF0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 7. " MSTPST_107 ,TSIF1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 6. " MSTPST_106 ,ADG(M2) Stop Status" "Not stopped,Stopped" bitfld.long 0x00 4. " MSTPST_104 ,STB Stop Status" "Not stopped,Stopped" bitfld.long 0x00 3. " MSTPST_103 ,VPC0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 1. " MSTPST_101 ,VCP0 Stop Status" "Not stopped,Stopped" rgroup.long 0x40++0x3 line.long 0x00 "MSTPSR_2,Module Stop Status Register 2" bitfld.long 0x00 28. " MSTPST_228 ,Crypt Engine (Secure) Stop Status" "Not stopped,Stopped" bitfld.long 0x00 19. " MSTPST_219 ,SYS-DMAC0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST_218 ,SYS-DMAC1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 16. " MSTPST_216 ,SCIFB2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 13. " MSTPST_213 ,MFIS Stop Status" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST_208 ,MSIOF1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 7. " MSTPST_207 ,SCIFB1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 6. " MSTPST_206 ,SCIFB0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 5. " MSTPST_205 ,MSIOF2 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 4. " MSTPST_204 ,SCIFA0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 3. " MSTPST_203 ,SCIFA1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 2. " MSTPST_202 ,SCIFA2 Stop Status" "Not stopped,Stopped" rgroup.long 0x48++0x7 line.long 0x00 "MSTPSR_3,Module Stop Status Register 3" bitfld.long 0x00 31. " MSTPST_331 ,USBDMAC1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 30. " MSTPST_330 ,USBDMAC0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 29. " MSTPST_329 ,CMT1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 23. " MSTPST_323 ,IIC1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST_318 ,IIC0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST_315 ,MMC0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 14. " MSTPST_314 ,SDHI0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 13. " MSTPST_313 ,SDHI1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 12. " MSTPST_312 ,SDHI2 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 11. " MSTPST_311 ,SDHI3 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST_310 ,IrDA Stop Status" "Not stopped,Stopped" bitfld.long 0x00 4. " MSTPST_304 ,TPU0 Stop Status" "Not stopped,Stopped" line.long 0x04 "MSTPSR_4,Module Stop Status Register 4" bitfld.long 0x04 31. " MSTPST_431 ,Secure up-Time Clock Stop Status" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST_408 ,INTC-SY Stop Status" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST_407 ,IRQC Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 6. " MSTPST_406 ,USB DDM Stop Status" "Not stopped,Stopped" bitfld.long 0x04 2. " MSTPST_402 ,RWDT Stop Status" "Not stopped,Stopped" rgroup.long 0x3C++0x3 line.long 0x00 "MSTPSR_5,Module Stop Status Register 5" bitfld.long 0x00 30. " MSTPST_530 ,Secure boot ROM Stop Status" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST_523 ,PWM Stop Status" "Not stopped,Stopped" bitfld.long 0x00 22. " MSTPST_522 ,Thermal Sensor Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 6. " MSTPST_506 ,ADSP Stop Status" "Not stopped,Stopped" bitfld.long 0x00 2. " MSTPST_502 ,MPDMAC0 Stop Status" "Not stopped,Stopped" rgroup.long 0x1C4++0x3 line.long 0x00 "MSTPSR_7,Module Stop Status Register 7" bitfld.long 0x00 24. " MSTPST_724 ,DU0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST_721 ,SCIF0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 20. " MSTPST_720 ,SCIF1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 19. " MSTPST_719 ,SCIF2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST_718 ,SCIF3 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST_717 ,HSCIF0 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 16. " MSTPST_716 ,HSCIF1 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST_715 ,SCIF4 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST_714 ,SCIF5 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 13. " MSTPST_713 ,HSCIF2 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST_710 ,CMM0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST_709 ,CMM1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 4. " MSTPST_704 ,USBHS Stop Status" "Not stopped,Stopped" bitfld.long 0x00 3. " MSTPST_703 ,USB(EHCI) Stop Status" "Not stopped,Stopped" rgroup.long 0x9A0++0xF line.long 0x00 "MSTPSR_8,Module Stop Status Register 8" bitfld.long 0x00 30. " MSTPST_830 ,DCU Stop Status" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST_823 ,IMR-LSX2 0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 13. " MSTPST_813 ,Ether Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST_812 ,EtherAVB Stop Status" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST_811 ,VIN0 Stop Status" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST_810 ,VIN1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x00 2. " MSTPST_802 ,MLB+ Stop Status" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST_800 ,IPMMU-SGX Stop Status" "Not stopped,Stopped" line.long 0x04 "MSTPSR_9,Module Stop Status Register 9" bitfld.long 0x04 31. " MSTPST_931 ,I2C0 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST_930 ,I2C1 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 29. " MSTPST_929 ,I2C2 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 28. " MSTPST_928 ,I2C3 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 27. " MSTPST_927 ,I2C4 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST_925 ,I2C5 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 24. " MSTPST_924 ,MLM Stop Status" "Not stopped,Stopped" bitfld.long 0x04 23. " MSTPST_923 ,DTCP Stop Status" "Not stopped,Stopped" bitfld.long 0x04 18. " MSTPST_918 ,IEBUS Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 17. " MSTPST_917 ,QSPI Stop Status" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST_916 ,RCAN0 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST_915 ,RCAN1 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 12. " MSTPST_912 ,GPIO0 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST_911 ,GPIO1 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 10. " MSTPST_910 ,GPIO2 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 9. " MSTPST_909 ,GPIO3 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST_908 ,GPIO4 Stop Status" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST_907 ,GPIO5 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 6. " MSTPST_906 ,DARC Stop Status" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST_903 ,REMOCON Stop Status" "Not stopped,Stopped" bitfld.long 0x04 2. " MSTPST_902 ,Speed-pulse I/F Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x04 1. " MSTPST_901 ,Gyro ADC I/F Stop Status" "Not stopped,Stopped" line.long 0x08 "MSTPSR_10,Module Stop Status Register 10" bitfld.long 0x08 31. " MSTPST_1031 ,SCU (SRC0) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 30. " MSTPST_1030 ,SCU (SRC1) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 29. " MSTPST_1029 ,SCU (SRC2)Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 28. " MSTPST_1028 ,SCU (SRC3) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 27. " MSTPST_1027 ,SCU (SRC4) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 26. " MSTPST_1026 ,SCU (SRC5) Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 25. " MSTPST_1025 ,SCU (SRC6) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 24. " MSTPST_1024 ,SCU (SRC7) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 23. " MSTPST_1023 ,SCU (SRC8) Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 22. " MSTPST_1022 ,SCU (SRC9) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 21. " MSTPST_1021 ,SCU (CTU00/01/02/03, MIX0) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 20. " MSTPST_1020 ,SCU (CTU10/11/12/13, MIX1) Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 19. " MSTPST_1019 ,SCU (DVC0) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST_1018 ,SCU (DVC1) Stop Status" "Not stopped,Stopped" bitfld.long 0x08 17. " MSTPST_1017 ,SCU (ALL) Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 15. " MSTPST_1015 ,SSI0 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 14. " MSTPST_1014 ,SSI1 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST_1013 ,SSI2 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 12. " MSTPST_1012 ,SSI3 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 11. " MSTPST_1011 ,SSI4 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 10. " MSTPST_1010 ,SSI5 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 9. " MSTPST_1009 ,SSI6 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 8. " MSTPST_1008 ,SSI7 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 7. " MSTPST_1007 ,SSI8 Stop Status" "Not stopped,Stopped" textline " " bitfld.long 0x08 6. " MSTPST_1006 ,SSI9 Stop Status" "Not stopped,Stopped" bitfld.long 0x08 5. " MSTPST_1005 ,SSI (ALL)Stop Status" "Not stopped,Stopped" line.long 0x0C "MSTPSR_11,Module Stop Status Register 11" bitfld.long 0x0C 8. " MSTPST_1108 ,SCIFA5 Stop Status" "Not stopped,Stopped" bitfld.long 0x0C 7. " MSTPST_1107 ,SCIFA4 Stop Status" "Not stopped,Stopped" bitfld.long 0x0C 6. " MSTPST_1106 ,SCIFA3 Stop Status" "Not stopped,Stopped" tree.end tree "Realtime Module Stop Registers" width 12. group.long 0x110++0x17 line.long 0x00 "RMSTPCR_0,Realtime Module Stop Register 0" bitfld.long 0x00 22. " MSTPST_022 ,INTC-RT Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST_018 ,H-UDI Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 11. " MSTPST_011 ,ARMREG Stop Control" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST_000 ,MSIOF0 Stop Control" "Not stopped,Stopped" line.long 0x04 "RMSTPCR_1,Realtime Module Stop Register 1" bitfld.long 0x04 31. " MSTPST_131 ,VSP1 (SY) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 28. " MSTPST_128 ,VSP1DU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST_125 ,TMU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 24. " MSTPST_124 ,CMT0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 22. " MSTPST_122 ,TMU2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 21. " MSTPST_121 ,TMU3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 19. " MSTPST_119 ,FDP0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST_115 ,2DDMAC Stop Control" "Not stopped,Stopped" bitfld.long 0x04 12. " MSTPST_112 ,3DG Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 11. " MSTPST_111 ,TMU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST_108 ,TSIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST_107 ,TSIF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 6. " MSTPST_106 ,ADG(M2) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 4. " MSTPST_104 ,STB Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST_103 ,VPC0 top Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 1. " MSTPST_101 ,VCP0 Stop Control" "Not stopped,Stopped" line.long 0x08 "RMSTPCR_2,Realtime Module Stop Register 2" bitfld.long 0x08 28. " MSTPST_228 ,Crypt Engine (Secure) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 19. " MSTPST_219 ,SYS-DMAC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST_218 ,SYS-DMAC1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 16. " MSTPST_216 ,SCIFB2 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST_213 ,MFIS Stop Control" "Not stopped,Stopped" bitfld.long 0x08 8. " MSTPST_208 ,MSIOF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 7. " MSTPST_207 ,SCIFB1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 6. " MSTPST_206 ,SCIFB0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 5. " MSTPST_205 ,MSIOF2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 4. " MSTPST_204 ,SCIFA0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 3. " MSTPST_203 ,SCIFA1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 2. " MSTPST_202 ,SCIFA2 Stop Control" "Not stopped,Stopped" line.long 0x0C "RMSTPCR_3,Realtime Module Stop Register 3" bitfld.long 0x0C 31. " MSTPST_331 ,USBDMAC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 30. " MSTPST_330 ,USBDMAC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 29. " MSTPST_329 ,CMT1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 23. " MSTPST_323 ,IIC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 18. " MSTPST_318 ,IIC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 15. " MSTPST_315 ,MMC0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 14. " MSTPST_314 ,SDHI0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 12. " MSTPST_312 ,SDHI2 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 11. " MSTPST_311 ,SDHI3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 10. " MSTPST_310 ,IrDA Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 4. " MSTPST_304 ,TPU0 Stop Control" "Not stopped,Stopped" line.long 0x10 "RMSTPCR_4,Realtime Module Stop Register 4" bitfld.long 0x10 31. " MSTPST_431 ,Secure up-Time Clock Stop Control" "Not stopped,Stopped" bitfld.long 0x10 8. " MSTPST_408 ,INTC-SY Stop Control" "Not stopped,Stopped" bitfld.long 0x10 7. " MSTPST_407 ,IRQC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x10 6. " MSTPST_406 ,USB DDM Stop Control" "Not stopped,Stopped" bitfld.long 0x10 2. " MSTPST_402 ,RWDT Stop Control" "Not stopped,Stopped" line.long 0x14 "RMSTPCR_5,Realtime Module Stop Register 5" bitfld.long 0x14 30. " MSTPST_530 ,Secure boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 23. " MSTPST_523 ,PWM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 22. " MSTPST_522 ,Thermal Sensor Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x14 6. " MSTPST_506 ,ADSP Stop Control" "Not stopped,Stopped" bitfld.long 0x14 2. " MSTPST_502 ,AUDIODMAC0 Stop Control" "Not stopped,Stopped" group.long 0x12C++0x3 line.long 0x00 "RMSTPCR_7,Realtime Module Stop Register 7" bitfld.long 0x00 24. " MSTPST_724 ,DU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST_721 ,SCIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 20. " MSTPST_720 ,SCIF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 19. " MSTPST_719 ,SCIF2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST_718 ,SCIF3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST_717 ,HSCIF0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 16. " MSTPST_716 ,HSCIF1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST_715 ,SCIF4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST_714 ,SCIF5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 13. " MSTPST_713 ,HSCIF2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST_710 ,CMM0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST_709 ,CMM1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 8. " MSTPST_708 ,CMM2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 4. " MSTPST_704 ,USBHS Stop Control" "Not stopped,Stopped" bitfld.long 0x00 3. " MSTPST_703 ,USB(EHCI) Stop Control" "Not stopped,Stopped" group.long 0x980++0x0F line.long 0x00 "RMSTPCR_8,Realtime Module Stop Register 8" bitfld.long 0x00 30. " MSTPST_830 ,DCU Stop Control" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST_823 ,IMR-LSX2 0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 13. " MSTPST_813 ,Ether Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST_812 ,EtherAVB Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST_811 ,VIN0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST_810 ,VIN1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 2. " MSTPST_802 ,MLB+ Stop Control" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST_800 ,IPMMU-SGX Stop Control" "Not stopped,Stopped" line.long 0x04 "RMSTPCR_9,Realtime Module Stop Register 9" bitfld.long 0x04 31. " MSTPST_931 ,I2C0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST_930 ,I2C1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 29. " MSTPST_929 ,I2C2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 28. " MSTPST_928 ,I2C3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 27. " MSTPST_927 ,I2C4 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST_925 ,I2C5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 24. " MSTPST_924 ,MLM Stop Control" "Not stopped,Stopped" bitfld.long 0x04 23. " MSTPST_923 ,DTCP Stop Control" "Not stopped,Stopped" bitfld.long 0x04 18. " MSTPST_918 ,IEBUS Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 17. " MSTPST_917 ,QSPI Stop Control" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST_916 ,RCAN0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST_915 ,RCAN1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 12. " MSTPST_912 ,GPIO0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST_911 ,GPIO1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 10. " MSTPST_910 ,GPIO2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 9. " MSTPST_909 ,GPIO3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST_908 ,GPIO4 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST_907 ,GPIO5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 6. " MSTPST_906 ,DARC Stop Control" "Not stopped,Stopped" bitfld.long 0x04 5. " MSTPST_905 ,GPIO6 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST_903 ,REMOCON Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 2. " MSTPST_902 ,Speed-pulse I/F Stop Control" "Not stopped,Stopped" bitfld.long 0x04 1. " MSTPST_901 ,Gyro ADC I/F Stop Control" "Not stopped,Stopped" line.long 0x08 "RMSTPCR_10,Realtime Module Stop Register 10" bitfld.long 0x08 31. " MSTPST_1031 ,SCU (SRC0) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 30. " MSTPST_1030 ,SCU (SRC1) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 29. " MSTPST_1029 ,SCU (SRC2)Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 28. " MSTPST_1028 ,SCU (SRC3) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 27. " MSTPST_1027 ,SCU (SRC4) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 26. " MSTPST_1026 ,SCU (SRC5) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 25. " MSTPST_1025 ,SCU (SRC6) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 24. " MSTPST_1024 ,SCU (SRC7) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 23. " MSTPST_1023 ,SCU (SRC8) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 22. " MSTPST_1022 ,SCU (SRC9) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 21. " MSTPST_1021 ,SCU (CTU00/01/02/03, MIX0) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 20. " MSTPST_1020 ,SCU (CTU10/11/12/13, MIX1) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 19. " MSTPST_1019 ,SCU (DVC0) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST_1018 ,SCU (DVC1) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 17. " MSTPST_1017 ,SCU (ALL) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 15. " MSTPST_1015 ,SSI0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 14. " MSTPST_1014 ,SSI1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST_1013 ,SSI2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 12. " MSTPST_1012 ,SSI3 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 11. " MSTPST_1011 ,SSI4 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 10. " MSTPST_1010 ,SSI5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 9. " MSTPST_1009 ,SSI6 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 8. " MSTPST_1008 ,SSI7 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 7. " MSTPST_1007 ,SSI8 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 6. " MSTPST_1006 ,SSI9 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 5. " MSTPST_1005 ,SSI (ALL) Stop Control" "Not stopped,Stopped" line.long 0x0C "RMSTPCR_11,Realtime Module Stop Register 11" bitfld.long 0x0C 8. " MSTPST_1108 ,SCIFA5 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 7. " MSTPST_1107 ,SCIFA4 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 6. " MSTPST_1106 ,SCIFA3 Stop Control" "Not stopped,Stopped" tree.end tree "System Module Stop Control Register" width 12. group.long 0x130++0x17 line.long 0x00 "SMSTPCR_0,Realtime Module Stop Register 0" bitfld.long 0x00 22. " MSTPST_022 ,INTC-RT Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST_018 ,H-UDI Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST_011 ,ARMREG Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 0. " MSTPST_000 ,MSIOF0 Stop Control" "Not stopped,Stopped" line.long 0x04 "SMSTPCR_1,Realtime Module Stop Register 1" bitfld.long 0x04 31. " MSTPST_131 ,VSP1 (SY) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 28. " MSTPST_128 ,VSP1DU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST_125 ,TMU0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 24. " MSTPST_124 ,CMT0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 22. " MSTPST_122 ,TMU2 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 21. " MSTPST_121 ,TMU3 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 19. " MSTPST_119 ,FDP0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST_115 ,2DDMAC Stop Control" "Not stopped,Stopped" bitfld.long 0x04 12. " MSTPST_112 ,3DG Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 11. " MSTPST_111 ,TMU1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST_108 ,TSIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST_107 ,TSIF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 6. " MSTPST_106 ,ADG(M2) Stop Control" "Not stopped,Stopped" bitfld.long 0x04 4. " MSTPST_104 ,STB Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST_103 ,VPC0 top Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 1. " MSTPST_101 ,VCP0 Stop Control" "Not stopped,Stopped" line.long 0x08 "SMSTPCR_2,Realtime Module Stop Register 2" bitfld.long 0x08 28. " MSTPST_228 ,Crypt Engine (Secure) Stop Control" "Not stopped,Stopped" bitfld.long 0x08 19. " MSTPST_219 ,SYS-DMAC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 18. " MSTPST_218 ,SYS-DMAC1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 16. " MSTPST_216 ,SCIFB2 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 13. " MSTPST_213 ,MFIS Stop Control" "Not stopped,Stopped" bitfld.long 0x08 8. " MSTPST_208 ,MSIOF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 7. " MSTPST_207 ,SCIFB1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 6. " MSTPST_206 ,SCIFB0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 5. " MSTPST_205 ,MSIOF2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x08 4. " MSTPST_204 ,SCIFA0 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 3. " MSTPST_203 ,SCIFA1 Stop Control" "Not stopped,Stopped" bitfld.long 0x08 2. " MSTPST_202 ,SCIFA2 Stop Control" "Not stopped,Stopped" line.long 0x0C "SMSTPCR_3,Realtime Module Stop Register 3" bitfld.long 0x0C 31. " MSTPST_331 ,USBDMAC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 30. " MSTPST_330 ,USBDMAC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 29. " MSTPST_329 ,CMT1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 23. " MSTPST_323 ,IIC1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 18. " MSTPST_318 ,IIC0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 15. " MSTPST_315 ,MMC0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 14. " MSTPST_314 ,SDHI0 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 12. " MSTPST_312 ,SDHI1 Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 11. " MSTPST_311 ,SDHI2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x0C 10. " MSTPST_310 ,IrDA Stop Control" "Not stopped,Stopped" bitfld.long 0x0C 4. " MSTPST_304 ,TPU0 Stop Control" "Not stopped,Stopped" line.long 0x10 "SMSTPCR_4,Realtime Module Stop Register 4" bitfld.long 0x10 31. " MSTPST_431 ,Secure up-Time Clock Stop Control" "Not stopped,Stopped" bitfld.long 0x10 8. " MSTPST_408 ,INTC-SY Stop Control" "Not stopped,Stopped" bitfld.long 0x10 7. " MSTPST_407 ,IRQC Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x10 6. " MSTPST_406 ,USB DDM Stop Control" "Not stopped,Stopped" bitfld.long 0x10 2. " MSTPST_402 ,RWDT Stop Control" "Not stopped,Stopped" line.long 0x14 "SMSTPCR_5,Realtime Module Stop Register 5" bitfld.long 0x14 30. " MSTPST_530 ,Secure boot ROM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 23. " MSTPST_523 ,PWM Stop Control" "Not stopped,Stopped" bitfld.long 0x14 22. " MSTPST_522 ,Thermal Sensor Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x14 6. " MSTPST_506 ,ADSP Stop Control" "Not stopped,Stopped" bitfld.long 0x14 2. " MSTPST_502 ,AUDIODMAC0 Stop Control" "Not stopped,Stopped" group.long 0x14C++0x3 line.long 0x00 "SMSTPCR_7,Realtime Module Stop Register 7" bitfld.long 0x00 24. " MSTPST_724 ,DU0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST_721 ,SCIF0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 20. " MSTPST_720 ,SCIF1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 19. " MSTPST_719 ,SCIF2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST_718 ,SCIF3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST_717 ,HSCIF0 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 16. " MSTPST_716 ,HSCIF1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 15. " MSTPST_715 ,SCIF4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST_714 ,SCIF5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 13. " MSTPST_713 ,HSCIF2 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST_710 ,CMM0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 9. " MSTPST_709 ,CMM1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 4. " MSTPST_704 ,USBHS Stop Control" "Not stopped,Stopped" bitfld.long 0x00 3. " MSTPST_703 ,USB(EHCI) Stop Control" "Not stopped,Stopped" group.long 0x990++0x7 line.long 0x00 "SMSTPCR_8,Realtime Module Stop Register 8" bitfld.long 0x00 30. " MSTPST_830 ,DCU Stop Control" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST_823 ,IMR-LSX2 0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 13. " MSTPST_813 ,Ether Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST_812 ,EtherAVB Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST_811 ,VIN0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST_810 ,VIN1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 2. " MSTPST_802 ,MLB+ Stop Control" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPST_800 ,IPMMU_SGX Stop Control" "Not stopped,Stopped" line.long 0x04 "SMSTPCR_9,Realtime Module Stop Register 9" bitfld.long 0x04 31. " MSTPST_931 ,I2C0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 30. " MSTPST_930 ,I2C1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 29. " MSTPST_929 ,I2C2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 28. " MSTPST_928 ,I2C3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 27. " MSTPST_927 ,I2C4 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 25. " MSTPST_925 ,I2C5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 24. " MSTPST_924 ,MLM Stop Control" "Not stopped,Stopped" bitfld.long 0x04 23. " MSTPST_923 ,DTCP Stop Control" "Not stopped,Stopped" bitfld.long 0x04 18. " MSTPST_918 ,IEBUS Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 17. " MSTPST_917 ,QSPI Stop Control" "Not stopped,Stopped" bitfld.long 0x04 16. " MSTPST_916 ,RCAN0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 15. " MSTPST_915 ,RCAN1 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 12. " MSTPST_912 ,GPIO0 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 11. " MSTPST_911 ,GPIO1 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 10. " MSTPST_910 ,GPIO2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 9. " MSTPST_909 ,GPIO3 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 8. " MSTPST_908 ,GPIO4 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 7. " MSTPST_907 ,GPIO5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 6. " MSTPST_906 ,DARC Stop Control" "Not stopped,Stopped" bitfld.long 0x04 5. " MSTPST_905 ,GPIO6 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 3. " MSTPST_903 ,REMOCON Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x04 2. " MSTPST_902 ,Speed-pulse I/F Stop Control" "Not stopped,Stopped" bitfld.long 0x04 1. " MSTPST_901 ,Gyro ADC I/F Stop Control" "Not stopped,Stopped" group.long 0x998++0x7 line.long 0x00 "SMSTPCR_10,Realtime Module Stop Register 10" bitfld.long 0x00 31. " MSTPST_1031 ,SCU (SRC0) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 30. " MSTPST_1030 ,SCU (SRC1) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 29. " MSTPST_1029 ,SCU (SRC2)Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 28. " MSTPST_1028 ,SCU (SRC3) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 27. " MSTPST_1027 ,SCU (SRC4) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 26. " MSTPST_1026 ,SCU (SRC5) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 25. " MSTPST_1025 ,SCU (SRC6) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 24. " MSTPST_1024 ,SCU (SRC7) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 23. " MSTPST_1023 ,SCU (SRC8) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 22. " MSTPST_1022 ,SCU (SRC9) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 21. " MSTPST_1021 ,SCU (CTU00/01/02/03, MIX0) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 20. " MSTPST_1020 ,SCU (CTU10/11/12/13, MIX1) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 19. " MSTPST_1019 ,SCU (DVC0) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 18. " MSTPST_1018 ,SCU (DVC1) Stop Control" "Not stopped,Stopped" bitfld.long 0x00 17. " MSTPST_1017 ,SCU (ALL) Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 15. " MSTPST_1015 ,SSI0 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 14. " MSTPST_1014 ,SSI1 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 13. " MSTPST_1013 ,SSI2 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 12. " MSTPST_1012 ,SSI3 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 11. " MSTPST_1011 ,SSI4 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 10. " MSTPST_1010 ,SSI5 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 9. " MSTPST_1009 ,SSI6 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 8. " MSTPST_1008 ,SSI7 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 7. " MSTPST_1007 ,SSI8 Stop Control" "Not stopped,Stopped" textline " " bitfld.long 0x00 6. " MSTPST_1006 ,SSI9 Stop Control" "Not stopped,Stopped" bitfld.long 0x00 5. " MSTPST_1005 ,SSI (ALL) Stop Control" "Not stopped,Stopped" line.long 0x04 "SMSTPCR_11,Realtime Module Stop Register 11" bitfld.long 0x04 7. " MSTPST_1107 ,SCIFA5 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 6. " MSTPST_1106 ,SCIFA4 Stop Control" "Not stopped,Stopped" bitfld.long 0x04 5. " MSTPST_1105 ,SCIFA3 Stop Control" "Not stopped,Stopped" tree.end tree "Software Reset and Clear Reset Registers" width 8. group.long 0xA0++0x3 line.long 0x00 "SRCR_0,Software Reset Register 0" setclrfld.long 0x00 22. 0x00 22. 0x8A0 22. " SRTST022_set/clr ,INTC-RT Software Reset" "No reset,Reset" setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST019_set/clr ,H-UDI Software Reset" "No reset,Reset" setclrfld.long 0x00 0. 0x00 0. 0x8A0 0. " SRTST000_set/clr ,MSIOF0 Software Reset" "No reset,Reset" group.long 0xA8++0x3 line.long 0x00 "SRCR_1,Software Reset Register 1" setclrfld.long 0x00 31. 0x00 31. 0x8A0 31. " SRTST131_set/clr ,VSP1 (SY) Software Reset" "No reset,Reset" setclrfld.long 0x00 28. 0x00 28. 0x8A0 28. " SRTST128_set/clr ,VSP1DU0 Software Reset" "No reset,Reset" setclrfld.long 0x00 25. 0x00 25. 0x8A0 25. " SRTST125_set/clr ,TMU0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 24. 0x00 24. 0x8A0 24. " SRTST124_set/clr ,CMT0 Software Reset" "No reset,Reset" setclrfld.long 0x00 22. 0x00 22. 0x8A0 22. " SRTST122_set/clr ,TMU2 Software Reset" "No reset,Reset" setclrfld.long 0x00 21. 0x00 21. 0x8A0 21. " SRTST121_set/clr ,TMU3 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST119_set/clr ,FDP0 Software Reset" "No reset,Reset" setclrfld.long 0x00 15. 0x00 15. 0x8A0 15. " SRTST115_set/clr ,2DDMAC Software Reset" "No reset,Reset" setclrfld.long 0x00 12. 0x00 12. 0x8A0 12. " SRTST112_set/clr ,3DG Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 11. 0x00 11. 0x8A0 11. " SRTST111_set/clr ,TMU1 Software Reset" "No reset,Reset" setclrfld.long 0x00 8. 0x00 8. 0x8A0 8. " SRTST108_set/clr ,TSIF0 Software Reset" "No reset,Reset" setclrfld.long 0x00 7. 0x00 7. 0x8A0 7. " SRTST107_set/clr ,TSIF1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST104_set/clr ,STB Software Reset" "No reset,Reset" setclrfld.long 0x00 3. 0x00 3. 0x8A0 3. " SRTST103_set/clr ,VPC0 top Control" "No reset,Reset" setclrfld.long 0x00 1. 0x00 1. 0x8A0 1. " SRTST101_set/clr ,VCP0 Software Reset" "No reset,Reset" group.long 0xB0++0x3 line.long 0x00 "SRCR_2,Software Reset Register 2" setclrfld.long 0x00 28. 0x00 28. 0x8A0 28. " SRTST228_set/clr ,Crypt Engine (Secure) Software Reset" "No reset,Reset" setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST219_set/clr ,SYS-DMAC0 Software Reset" "No reset,Reset" setclrfld.long 0x00 18. 0x00 18. 0x8A0 18. " SRTST218_set/clr ,SYS-DMAC1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 16. 0x00 16. 0x8A0 16. " SRTST216_set/clr ,SCIFB2 Software Reset" "No reset,Reset" setclrfld.long 0x00 13. 0x00 13. 0x8A0 13. " SRTST213_set/clr ,MFIS Software Reset" "No reset,Reset" setclrfld.long 0x00 8. 0x00 8. 0x8A0 8. " SRTST208_set/clr ,MSIOF1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 7. 0x00 7. 0x8A0 7. " SRTST207_set/clr ,SCIFB1 Software Reset" "No reset,Reset" setclrfld.long 0x00 6. 0x00 6. 0x8A0 6. " SRTST206_set/clr ,SCIFB0 Software Reset" "No reset,Reset" setclrfld.long 0x00 5. 0x00 5. 0x8A0 5. " SRTST205_set/clr ,MSIOF2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST204_set/clr ,SCIFA0 Software Reset" "No reset,Reset" setclrfld.long 0x00 3. 0x00 3. 0x8A0 3. " SRTST203_set/clr ,SCIFA1 Software Reset" "No reset,Reset" setclrfld.long 0x00 2. 0x00 2. 0x8A0 2. " SRTST202_set/clr ,SCIFA2 Software Reset" "No reset,Reset" group.long 0xB8++0x7 line.long 0x00 "SRCR_3,Software Reset Register 3" setclrfld.long 0x00 31. 0x00 31. 0x8A0 31. " SRTST331_set/clr ,USBDMAC1 Software Reset" "No reset,Reset" setclrfld.long 0x00 30. 0x00 30. 0x8A0 30. " SRTST330_set/clr ,USBDMAC0 Software Reset" "No reset,Reset" setclrfld.long 0x00 29. 0x00 29. 0x8A0 29. " SRTST329_set/clr ,CMT1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 23. 0x00 23. 0x8A0 23. " SRTST323_set/clr ,IIC1 Software Reset" "No reset,Reset" setclrfld.long 0x00 18. 0x00 18. 0x8A0 18. " SRTST318_set/clr ,IIC0 Software Reset" "No reset,Reset" setclrfld.long 0x00 15. 0x00 15. 0x8A0 15. " SRTST315_set/clr ,MMC0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 14. 0x00 14. 0x8A0 14. " SRTST314_set/clr ,SDHI0 Software Reset" "No reset,Reset" setclrfld.long 0x00 12. 0x00 12. 0x8A0 12. " SRTST312_set/clr ,SDHI1 Software Reset" "No reset,Reset" setclrfld.long 0x00 11. 0x00 11. 0x8A0 11. " SRTST311_set/clr ,SDHI2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 10. 0x00 10. 0x8A0 10. " SRTST310_set/clr ,IRDA Software Reset" "No reset,Reset" setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST304_set/clr ,TPU0 Software Reset" "No reset,Reset" line.long 0x04 "SRCR_4,Software Reset Register 4" setclrfld.long 0x04 31. 0x04 31. 0x8A4 31. " SRTST431_set/clr ,Secure up-Time Clock Software Reset" "No reset,Reset" setclrfld.long 0x04 8. 0x04 8. 0x8A4 8. " SRTST408_set/clr ,INTC-SY Software Reset" "No reset,Reset" setclrfld.long 0x04 7. 0x04 7. 0x8A4 7. " SRTST407_set/clr ,IRQC Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 6. 0x04 6. 0x8A4 6. " SRTST406_set/clr ,USB DDM Software Reset" "No reset,Reset" setclrfld.long 0x04 2. 0x04 2. 0x8A4 2. " SRTST402_set/clr ,RWDT Software Reset" "No reset,Reset" setclrfld.long 0x04 1. 0x04 1. 0x8A4 1. " SRTST401_set/clr ,Secure WDT Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 0. 0x04 0. 0x8A4 0. " SRTST400_set/clr ,Secure Timer (SCMT) Software Reset" "No reset,Reset" group.long 0xC4++0x3 line.long 0x00 "SRCR_5,Software Reset Register 5" setclrfld.long 0x00 23. 0x00 23. 0x8A0 23. " SRTST523_set/clr ,PWM Software Reset" "No reset,Reset" setclrfld.long 0x00 8. 0x00 8. 0x8A0 8. " SRTST508_set/clr ,SCUW Software Reset" "No reset,Reset" setclrfld.long 0x00 6. 0x00 6. 0x8A0 6. " SRTST506_set/clr ,ADSP Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 2. 0x00 2. 0x8A0 2. " SRTST502_set/clr ,AUDIODMAC0 Software Reset" "No reset,Reset" group.long 0x1CC++0x3 line.long 0x00 "SRCR_7,Software Reset Register 7" setclrfld.long 0x00 24. 0x00 24. 0x8A0 24. " SRTST724_set/clr ,DU0 Software Reset" "No reset,Reset" setclrfld.long 0x00 21. 0x00 21. 0x8A0 21. " SRTST721_set/clr ,SCIF0 Software Reset" "No reset,Reset" setclrfld.long 0x00 20. 0x00 20. 0x8A0 20. " SRTST720_set/clr ,SCIF1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 19. 0x00 19. 0x8A0 19. " SRTST719_set/clr ,SCIF2 Software Reset" "No reset,Reset" setclrfld.long 0x00 18. 0x00 18. 0x8A0 18. " SRTST718_set/clr ,SCIF3 Software Reset" "No reset,Reset" setclrfld.long 0x00 17. 0x00 17. 0x8A0 17. " SRTST717_set/clr ,HSCIF0 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 16. 0x00 16. 0x8A0 16. " SRTST716_set/clr ,HSCIF1 Software Reset" "No reset,Reset" setclrfld.long 0x00 15. 0x00 15. 0x8A0 15. " SRTST715_set/clr ,SCIF4 Software Reset" "No reset,Reset" setclrfld.long 0x00 14. 0x00 14. 0x8A0 14. " SRTST714_set/clr ,SCIF5 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 13. 0x00 13. 0x8A0 13. " SRTST713_set/clr ,HSCIF2 Software Reset" "No reset,Reset" setclrfld.long 0x00 10. 0x00 10. 0x8A0 10. " SRTST710_set/clr ,CMM0 Software Reset" "No reset,Reset" setclrfld.long 0x00 9. 0x00 9. 0x8A0 9. " SRTST709_set/clr ,CMM1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 4. 0x00 4. 0x8A0 4. " SRTST704_set/clr ,USBHS Software Reset" "No reset,Reset" setclrfld.long 0x00 3. 0x00 3. 0x8A0 3. " SRTST703_set/clr ,USB(EHCI) Software Reset" "No reset,Reset" group.long 0x920++0x0F line.long 0x00 "SRCR_8,Software Reset Register 8" setclrfld.long 0x00 30. 0x00 30. 0x40 30. " SRTST830_set/clr ,DCU Software Reset" "No reset,Reset" setclrfld.long 0x00 23. 0x00 23. 0x40 23. " SRTST823_set/clr ,IMR-LSX2 0 Software Reset" "No reset,Reset" setclrfld.long 0x00 13. 0x00 13. 0x40 13. " SRTST813_set/clr ,Ether Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 12. 0x00 12. 0x40 12. " SRTST812_set/clr ,EtherAVB Software Reset" "No reset,Reset" setclrfld.long 0x00 11. 0x00 11. 0x40 11. " SRTST811_set/clr ,VIN0 Software Reset" "No reset,Reset" setclrfld.long 0x00 10. 0x00 10. 0x40 10. " SRTST810_set/clr ,VIN1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x00 2. 0x00 2. 0x40 2. " SRTST802_set/clr ,MLB+ Software Reset" "No reset,Reset" setclrfld.long 0x00 0. 0x00 0. 0x40 0. " SRTST800_set/clr ,IPMMU-SGX Software Reset" "No reset,Reset" line.long 0x04 "SRCR_9,Software Reset Register 9" setclrfld.long 0x04 31. 0x04 31. 0x44 31. " SRTST931_set/clr ,I2C0 Software Reset" "No reset,Reset" setclrfld.long 0x04 30. 0x04 30. 0x44 30. " SRTST930_set/clr ,I2C1 Software Reset" "No reset,Reset" setclrfld.long 0x04 29. 0x04 29. 0x44 29. " SRTST929_set/clr ,I2C2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 28. 0x04 28. 0x44 28. " SRTST928_set/clr ,I2C3 Software Reset" "No reset,Reset" setclrfld.long 0x04 27. 0x04 27. 0x44 27. " SRTST927_set/clr ,I2C4 Software Reset" "No reset,Reset" setclrfld.long 0x04 25. 0x04 25. 0x44 25. " SRTST925_set/clr ,I2C5 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 24. 0x04 24. 0x44 24. " SRTST924_set/clr ,MLM Software Reset" "No reset,Reset" setclrfld.long 0x04 23. 0x04 23. 0x44 23. " SRTST923_set/clr ,DTCP Software Reset" "No reset,Reset" setclrfld.long 0x04 18. 0x04 18. 0x44 18. " SRTST918_set/clr ,IEBUS Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 17. 0x04 17. 0x44 17. " SRTST917_set/clr ,QSPI Software Reset" "No reset,Reset" setclrfld.long 0x04 16. 0x04 16. 0x44 16. " SRTST916_set/clr ,RCAN0 Software Reset" "No reset,Reset" setclrfld.long 0x04 15. 0x04 15. 0x44 15. " SRTST915_set/clr ,RCAN1 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 12. 0x04 12. 0x44 12. " SRTST912_set/clr ,GPIO0 Software Reset" "No reset,Reset" setclrfld.long 0x04 11. 0x04 11. 0x44 11. " SRTST911_set/clr ,GPIO1 Software Reset" "No reset,Reset" setclrfld.long 0x04 10. 0x04 10. 0x44 10. " SRTST910_set/clr ,GPIO2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 9. 0x04 9. 0x44 9. " SRTST909_set/clr ,GPIO3 Software Reset" "No reset,Reset" setclrfld.long 0x04 8. 0x04 8. 0x44 8. " SRTST908_set/clr ,GPIO4 Software Reset" "No reset,Reset" setclrfld.long 0x04 7. 0x04 7. 0x44 7. " SRTST907_set/clr ,GPIO5 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 6. 0x04 6. 0x44 6. " SRTST906_set/clr ,DARC Software Reset" "No reset,Reset" setclrfld.long 0x04 5. 0x04 5. 0x44 5. " SRTST905_set/clr ,GPIO6 Software Reset" "No reset,Reset" setclrfld.long 0x04 3. 0x04 3. 0x44 3. " SRTST903_set/clr ,REMOCON Software Reset" "No reset,Reset" textline " " setclrfld.long 0x04 2. 0x04 2. 0x44 2. " SRTST902_set/clr ,Speed Pulse IF Software Reset" "No reset,Reset" line.long 0x08 "SRCR_10,Software Reset Register 10" setclrfld.long 0x08 15. 0x08 15. 0x48 15. " SRTST1015_set/clr ,SSI0 Software Reset" "No reset,Reset" setclrfld.long 0x08 14. 0x08 14. 0x48 14. " SRTST1014_set/clr ,SSI1 Software Reset" "No reset,Reset" setclrfld.long 0x08 13. 0x08 13. 0x48 13. " SRTST1013_set/clr ,SSI2 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x08 12. 0x08 12. 0x48 12. " SRTST1012_set/clr ,SSI3 Software Reset" "No reset,Reset" setclrfld.long 0x08 11. 0x08 11. 0x48 11. " SRTST1011_set/clr ,SSI4 Software Reset" "No reset,Reset" setclrfld.long 0x08 10. 0x08 10. 0x48 10. " SRTST1010_set/clr ,SSI5 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x08 9. 0x08 9. 0x48 9. " SRTST1009_set/clr ,SSI6 Software Reset" "No reset,Reset" setclrfld.long 0x08 8. 0x08 8. 0x48 8. " SRTST1008_set/clr ,SSI7 Software Reset" "No reset,Reset" setclrfld.long 0x08 7. 0x08 7. 0x48 7. " SRTST1007_set/clr ,SSI8 Software Reset" "No reset,Reset" textline " " setclrfld.long 0x08 6. 0x08 6. 0x48 6. " SRTST1006_set/clr ,SSI9 Software Reset" "No reset,Reset" setclrfld.long 0x08 5. 0x08 5. 0x48 5. " SRTST1005_set/clr ,SSI (ALL) Software Reset" "No reset,Reset" line.long 0x0C "SRCR_11,Software Reset Register 11" setclrfld.long 0x0C 8. 0x0C 8. 0x4C 8. " SRTST1108_set/clr ,SCIFA5 Software Reset" "No reset,Reset" setclrfld.long 0x0C 7. 0x0C 7. 0x4C 7. " SRTST1107_set/clr ,SCIFA4 Software Reset" "No reset,Reset" setclrfld.long 0x0C 6. 0x0C 6. 0x4C 6. " SRTST1106_set/clr ,SCIFA3 Software Reset" "No reset,Reset" tree.end width 0xB tree.end tree "APMU (Advanced Power Management Unit for AP-System Core)" tree.open "Cortex-A7" base ad:0xE6151000 width 9. group.long 0x100++0x3 line.long 0x00 "CPU0CR,CPU0Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x110++0x3 line.long 0x00 "CPU1CR,CPU1Power Status Control Register" bitfld.long 0x00 0.--1. " CPUPWR ,CPU PWR" "Sleep,,,CoreStandby" group.long 0x184++0x3 line.long 0x00 "CPUCMCR,Common Power Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4. " L2RST ,CPU L2 reset control bit" "Normal,L2 shutdown" bitfld.long 0x00 0.--1. " CMPWR ,CPU common power control bit" "Normal,,L2 shutdown," else bitfld.long 0x00 4. " L2RST ,CPU L2 reset control bit" "L2dormant,Normal" bitfld.long 0x00 0.--1. " CMPWR ,CPU common power control bit" "Normal,,L2dormant," endif group.long 0x10++0x3 line.long 0x00 "WUPCR,CPU Wake Up Control Register" bitfld.long 0x00 1. " CPU1WUP ,CPU1 wake up bit" "No wake up,Wake up" bitfld.long 0x00 0. " CPU0WUP ,CPU0 wake up bit" "No wake up,Wake up" rgroup.long 0x40++0x3 line.long 0x00 "PSTR,Power Status Register" bitfld.long 0x00 4.--5. " CPU1ST ,CPU1 status bit" "Run,,,CoreStandby" bitfld.long 0x00 0.--1. " CPU0ST ,CPU0 status bit" "Run,,,CoreStandby" textline "" sif cpu()=="RCARM2" group.long 0x80++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 24. " DBGCPUREN ,Debug mode non-CPU power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 21. " DBGCPU1REN ,CPU1 power-shutoff derived reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DBGCPU0REN ,CPU0 power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" elif cpuis("R8A77940")||cpuis("R8A7792X") group.long 0x180++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 24. " DBGCPUREN ,Debug mode non-CPU power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 21. " DBGCPU1REN ,CPU1 power-shutoff derived reset enable" "Disabled,Enabled" textline " " bitfld.long 0x00 20. " DBGCPU0REN ,CPU0 power-shutoff derived reset enable" "Disabled,Enabled" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" elif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x180++0x03 line.long 0x00 "DBGRCR,Debug Resource Reset Control Register" bitfld.long 0x00 19. " DBGCPUPREN ,CPU Peripheral power-shutoff derived reset enable" "Disabled,Enabled" group.long 0x1E0++0x03 line.long 0x00 "RBCR,Runtime Test Control Register" bitfld.long 0x00 15. " SCUIMSK ,SCUIMSK" "0,1" bitfld.long 0x00 8. " CPURMSK ,CPURMSK" "0,1" bitfld.long 0x00 3. " CPU3IMSK ,CPU3IMSK" "0,1" textline " " bitfld.long 0x00 2. " CPU2IMSK ,CPU2IMSK" "0,1" bitfld.long 0x00 1. " CPU1IMSK ,CPU1IMSK" "0,1" bitfld.long 0x00 0. " CPU0IMSK ,CPU0IMSK" "0,1" endif width 0x0B tree.end tree.end tree "RST (RESET)" base ad:0xE6160000 width 12. sif !cpuis("R8A77940")&&!cpuis("R8A77470") rgroup.long 0x60++0x03 line.long 0x00 "MODEMR,Mode Monitor Register" bitfld.long 0x00 30. " MDT1 ,MDT1" "0,1" bitfld.long 0x00 29. " MDT0 ,MDT0" "0,1" bitfld.long 0x00 28. " MD28 ,MD28" "0,1" bitfld.long 0x00 27. " MD27 ,MD27" "0,1" bitfld.long 0x00 26. " MD26 ,MD26" "0,1" bitfld.long 0x00 25. " MD25 ,MD25" "0,1" bitfld.long 0x00 24. " MD24 ,MD24" "0,1" bitfld.long 0x00 23. " MD23 ,MD23" "0,1" textline " " bitfld.long 0x00 22. " MD22 ,MD22" "0,1" bitfld.long 0x00 21. " MD21 ,MD21" "0,1" bitfld.long 0x00 20. " MD20 ,MD20" "0,1" bitfld.long 0x00 19. " MD19 ,MD19" "0,1" bitfld.long 0x00 18. " MD18 ,MD18" "0,1" bitfld.long 0x00 17. " MD17 ,MD17" "0,1" bitfld.long 0x00 16. " MD16 ,MD16" "0,1" bitfld.long 0x00 15. " MD15 ,MD15" "0,1" textline " " bitfld.long 0x00 14. " MD14 ,MD14" "0,1" bitfld.long 0x00 13. " MD13 ,MD13" "0,1" bitfld.long 0x00 12. " MD12 ,MD12" "0,1" bitfld.long 0x00 11. " MD11 ,MD11" "0,1" bitfld.long 0x00 10. " MD10 ,MD10" "0,1" bitfld.long 0x00 9. " MD09 ,MD09" "0,1" bitfld.long 0x00 8. " MD08 ,MD08" "0,1" bitfld.long 0x00 7. " MD07 ,MD07" "0,1" textline " " bitfld.long 0x00 6. " MD06 ,MD06" "0,1" bitfld.long 0x00 5. " MD05 ,MD05" "0,1" bitfld.long 0x00 4. " MD04 ,MD04" "0,1" bitfld.long 0x00 3. " MD03 ,MD03" "0,1" bitfld.long 0x00 2. " MD02 ,MD02" "0,1" bitfld.long 0x00 1. " MD01 ,MD01" "0,1" bitfld.long 0x00 0. " MD00 ,MD00" "0,1" else rgroup.long 0x60++0x03 line.long 0x00 "MODEMR,Mode Monitor Register" bitfld.long 0x00 30. " MDT1 ,MDT1" "0,1" bitfld.long 0x00 29. " MDT0 ,MDT0" "0,1" bitfld.long 0x00 21. " MD21 ,MD21" "0,1" bitfld.long 0x00 20. " MD20 ,MD20" "0,1" sif cpu()=="R8A77470" bitfld.long 0x00 14. " MD14 ,MD14" "0,1" bitfld.long 0x00 13. " MD13 ,MD13" "0,1" bitfld.long 0x00 11. " MD11 ,MD11" "0,1" textline " " bitfld.long 0x00 10. " MD10 ,MD10" "0,1" else bitfld.long 0x00 19. " MD19 ,MD19" "0,1" bitfld.long 0x00 18. " MD18 ,MD18" "0,1" bitfld.long 0x00 14. " MD14 ,MD14" "0,1" bitfld.long 0x00 13. " MD13 ,MD13" "0,1" textline " " bitfld.long 0x00 12. " MD12 ,MD12" "0,1" bitfld.long 0x00 11. " MD11 ,MD11" "0,1" bitfld.long 0x00 10. " MD10 ,MD10" "0,1" endif bitfld.long 0x00 9. " MD09 ,MD09" "0,1" bitfld.long 0x00 8. " MD08 ,MD08" "0,1" bitfld.long 0x00 7. " MD07 ,MD07" "0,1" bitfld.long 0x00 6. " MD06 ,MD06" "0,1" bitfld.long 0x00 5. " MD05 ,MD05" "0,1" textline " " bitfld.long 0x00 4. " MD04 ,MD04" "0,1" bitfld.long 0x00 3. " MD03 ,MD03" "0,1" bitfld.long 0x00 2. " MD02 ,MD02" "0,1" bitfld.long 0x00 1. " MD01 ,MD01" "0,1" bitfld.long 0x00 0. " MD00 ,MD00" "0,1" endif textline " " sif (!cpuis("R8A77940")&&!cpuis("R8A77470")) group.long 0x40++0x03 line.long 0x00 "CA15RESCNT,CA15 Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " CV ,Code value" bitfld.long 0x00 3. " CA15CPU0R ,Issue reset to CA15-CPU0" "No reset,Reset" bitfld.long 0x00 2. " CA15CPU1R ,Issue reset to CA15-CPU1" "No reset,Reset" sif cpu()!="RCARM2" textline " " bitfld.long 0x00 1. " CA15CPU2R ,Issue reset to CA15-CPU2" "No reset,Reset" bitfld.long 0x00 0. " CA15CPU3R ,Issue reset to CA15-CPU3" "No reset,Reset" endif endif sif cpu()!="RCARM2" group.long 0x44++0x03 line.long 0x00 "CA7RESCNT,CA7 Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " CV ,Code value" bitfld.long 0x00 3. " CA7CPU0R ,Issue reset to CA7-CPU0" "No reset,Reset" bitfld.long 0x00 2. " CA7CPU1R ,Issue reset to CA7-CPU1" "No reset,Reset" sif cpu()!="R8A77470" textline " " bitfld.long 0x00 1. " CA7CPU2R ,Issue reset to CA7-CPU2" "No reset,Reset" bitfld.long 0x00 0. " CA7CPU3R ,Issue reset to CA7-CPU3" "No reset,Reset" endif endif sif cpu()!="R8A77470" group.long 0x48++0x03 line.long 0x00 "SHXSFTRST,SH-4A Software Reset Register" hexmask.long.word 0x00 16.--31. 1. " CV ,Code value" bitfld.long 0x00 0. " SHX4R ,Issue reset request to SH-4A" "No reset,Reset" sif cpu()!="RCARM2" group.long 0x50++0x03 line.long 0x00 "RESCNT,Reset Control Register" bitfld.long 0x00 1. " MSTPCA15 ,System CPU (CA15) module stop" "Not stopped,Stopped" bitfld.long 0x00 0. " MSTPCA7 ,System CPU (CA7) module stop" "Not stopped,Stopped" endif endif group.long 0x54++0x07 line.long 0x00 "WDTRSTCR,Watchdog Timer Reset Control Register" hexmask.long.word 0x00 16.--31. 1. " CV ,Code value" sif cpu()!="R8A77470" bitfld.long 0x00 1. " SWDT_RSTMSK ,Secure-WDT reset mask" "Reset,No reset" endif bitfld.long 0x00 0. " RWDT_RSTMSK ,RWDT reset mask" "Reset,No reset" line.long 0x04 "RSTOUTCR,PRESETOUT Control Register" bitfld.long 0x04 0. " RESOUT ,PRESETOUT# control by software" "Asserted,Negated" sif cpu()!="R8A77470" group.long 0x00++0x03 line.long 0x00 "RBAR,RT Boot Address Register" hexmask.long 0x00 4.--31. 1. " RBAR ,SH-4A boot address" bitfld.long 0x00 0.--1. " BTMD ,Specifies the boot area of SH-4A" "External Memory,RBAR,?..." endif group.long 0x10++0x07 line.long 0x00 "SBAR,SYS Boot Address Register" line.long 0x04 "SBAR2,SYS Boot Address Register 2" textline " " sif (!cpuis("R8A77940")&&!cpuis("R8A77470")) group.long 0x04++0x03 line.long 0x00 "RBAR2,RT Boot Address Register 2" hexmask.long 0x00 4.--31. 0x10 " RBAR2 ,SH-4A boot address 2" bitfld.long 0x00 0. " VLD ,VALID bit" "RBAR,RBAR2" endif sif (cpuis("R8A77940")||cpuis("R8A77470")) group.long 0x30++0x07 line.long 0x00 "CA7BAR,CA7 Boot Address Register" hexmask.long.tbyte 0x00 10.--31. 0x4 " SBAR ,System CPU (CA7) boot address" bitfld.long 0x00 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " BTMD ,Specifies the boot area of system CPU (CA7)" "SBAR[39:18],,Built-in memory,?..." line.long 0x04 "CA7BAR2,CA7 Boot Address Register 2" hexmask.long.tbyte 0x04 10.--31. 0x4 " SBAR2 ,System CPU (CA7) boot address 2" bitfld.long 0x04 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x04 0. " VLD ,VALID bit" "SBAR,SBAR2" elif cpu()!="RCARM2" group.long 0x4030++0x07 line.long 0x00 "CA7BAR,CA7 Boot Address Register" hexmask.long.tbyte 0x00 10.--31. 0x4 " SBAR ,System CPU (CA7) boot address" bitfld.long 0x00 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " BTMD ,Specifies the boot area of system CPU (CA7)" "SBAR[39:18],,Built-in memory,?..." line.long 0x04 "CA7BAR2,CA7 Boot Address Register 2" hexmask.long.tbyte 0x04 10.--31. 0x4 " SBAR2 ,System CPU (CA7) boot address 2" bitfld.long 0x04 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x04 0. " VLD ,VALID bit" "SBAR,SBAR2" endif sif (!cpuis("R8A77940")&&!cpuis("R8A77470")) group.long 0x6020++0x07 line.long 0x00 "CA15BAR,CA15 Boot Address Register" hexmask.long.tbyte 0x00 10.--31. 0x4 " SBAR ,System CPU (CA15) boot address" bitfld.long 0x00 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x00 0.--1. " BTMD ,Specifies the boot area of system CPU (CA15)" "SBAR[39:18],,Built-in memory,?..." line.long 0x04 "CA15BAR2,CA15 Boot Address Register 2" hexmask.long.tbyte 0x04 10.--31. 0x4 " SBAR2 ,System CPU (CA15) boot address 2" bitfld.long 0x04 4. " BAREN ,BAR enable" "Disabled,Enabled" bitfld.long 0x04 0. " VLD ,VALID bit" "SBAR,SBAR2" endif sif !cpuis("R8A77470") base ad:0xFFEF0000 width 14. group.long 0x80++0x0B "SH 4A" line.long 0x00 "SH4AWDTST,SH-4A Watchdog Timer Stop Time Register" hexmask.long.byte 0x00 24.--31. 1. " CV ,Code value" hexmask.long.tbyte 0x00 0.--23. 1. " WDTST ,SH4AWDTCNT overflow time" line.long 0x04 "SH4AWDTCSR,SH-4A Watchdog Timer Control/Status Register" hexmask.long.byte 0x04 24.--31. 1. " CV ,Code value" bitfld.long 0x04 7. " TME ,Timer enable" "Disabled,Enabled" bitfld.long 0x04 4. " WOVF ,Watchdog timer overflow" "Not occurred,Occurred" line.long 0x08 "SH4AWDTBST,SH-4A Watchdog Timer Base Stop Time Register" hexmask.long.byte 0x08 24.--31. 1. " CV ,Code value" hexmask.long.tbyte 0x08 0.--23. 1. " WDTST ,SH4AWDTBCNT overflow time" rgroup.long 0x90++0x03 line.long 0x00 "SH4AWDTCNT,SH-4A Watchdog Timer Counter" hexmask.long.tbyte 0x00 0.--23. 1. " WDTCNT ,Counter value" rgroup.long 0x98++0x03 line.long 0x00 "SH4AWDTBCNT,SH-4A Watchdog Timer Base Counter" hexmask.long.tbyte 0x00 0.--23. 1. " WDTCNT ,Counter value" group.long 0x40++0x03 line.long 0x00 "SH4ARESETVEC,SH-4A Reset Vector Setting Register" endif width 0x0B tree.end tree "INTC-SYS (Interrupt Controller)" base ad:0xE61C0000 width 16. tree "IRQC Event Detector Register Configuration" sif cpuis("R8A77470") rgroup.long 0x00++0x03 line.long 0x00 "INTREQ_STS0,Interrupt Request Status Register $2" bitfld.long 0x00 9. " INTREQ_9 ,Interrupt status 9" "Not requested,Requested" bitfld.long 0x00 8. " INTREQ_8 ,Interrupt status 8" "Not requested,Requested" bitfld.long 0x00 7. " INTREQ_7 ,Interrupt status 7" "Not requested,Requested" textline " " bitfld.long 0x00 6. " INTREQ_6 ,Interrupt status 6" "Not requested,Requested" bitfld.long 0x00 5. " INTREQ_5 ,Interrupt status 5" "Not requested,Requested" bitfld.long 0x00 4. " INTREQ_4 ,Interrupt status 4" "Not requested,Requested" textline " " bitfld.long 0x00 3. " INTREQ_3 ,Interrupt status 3" "Not requested,Requested" bitfld.long 0x00 2. " INTREQ_2 ,Interrupt status 2" "Not requested,Requested" bitfld.long 0x00 1. " INTREQ_1 ,Interrupt status 1" "Not requested,Requested" textline " " bitfld.long 0x00 0. " INTREQ_0 ,Interrupt status 0" "Not requested,Requested" group.long 0x04++0x03 line.long 0x00 "INTEN_STS0,Interrupt Enable Status Register $2" eventfld.long 0x00 9. " INTEN_9 ,Interrupt enable 9" "Disabled,Enabled" eventfld.long 0x00 8. " INTEN_8 ,Interrupt enable 8" "Disabled,Enabled" eventfld.long 0x00 7. " INTEN_7 ,Interrupt enable 7" "Disabled,Enabled" textline " " eventfld.long 0x00 6. " INTEN_6 ,Interrupt enable 6" "Disabled,Enabled" eventfld.long 0x00 5. " INTEN_5 ,Interrupt enable 5" "Disabled,Enabled" eventfld.long 0x00 4. " INTEN_4 ,Interrupt enable 4" "Disabled,Enabled" textline " " eventfld.long 0x00 3. " INTEN_3 ,Interrupt enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " INTEN_2 ,Interrupt enable 2" "Disabled,Enabled" eventfld.long 0x00 1. " INTEN_1 ,Interrupt enable 1" "Disabled,Enabled" textline " " eventfld.long 0x00 0. " INTEN_0 ,Interrupt enable 0" "Disabled,Enabled" wgroup.long 0x08++0x03 line.long 0x00 "INTEN_SET0,Interrupt Enable Set Register $2" bitfld.long 0x00 9. " INTENS_9 ,Interrupt enable set 9" "No effect,Enabled" bitfld.long 0x00 8. " INTENS_8 ,Interrupt enable set 8" "No effect,Enabled" bitfld.long 0x00 7. " INTENS_7 ,Interrupt enable set 7" "No effect,Enabled" textline " " bitfld.long 0x00 6. " INTENS_6 ,Interrupt enable set 6" "No effect,Enabled" bitfld.long 0x00 5. " INTENS_5 ,Interrupt enable set 5" "No effect,Enabled" bitfld.long 0x00 4. " INTENS_4 ,Interrupt enable set 4" "No effect,Enabled" textline " " bitfld.long 0x00 3. " INTENS_3 ,Interrupt enable set 3" "No effect,Enabled" bitfld.long 0x00 2. " INTENS_2 ,Interrupt enable set 2" "No effect,Enabled" bitfld.long 0x00 1. " INTENS_1 ,Interrupt enable set 1" "No effect,Enabled" textline " " bitfld.long 0x00 0. " INTENS_0 ,Interrupt enable set 0" "No effect,Enabled" else rgroup.long 0x0++0x03 line.long 0x00 "INTREQ_STS0,Interrupt Request Status Register 0" bitfld.long 0x00 9. " INTREQ_9 ,Interrupt status 9" "Not requested,Requested" bitfld.long 0x00 8. " INTREQ_8 ,Interrupt status 8" "Not requested,Requested" bitfld.long 0x00 7. " INTREQ_7 ,Interrupt status 7" "Not requested,Requested" textline " " bitfld.long 0x00 6. " INTREQ_6 ,Interrupt status 6" "Not requested,Requested" bitfld.long 0x00 5. " INTREQ_5 ,Interrupt status 5" "Not requested,Requested" bitfld.long 0x00 4. " INTREQ_4 ,Interrupt status 4" "Not requested,Requested" textline " " bitfld.long 0x00 3. " INTREQ_3 ,Interrupt status 3" "Not requested,Requested" bitfld.long 0x00 2. " INTREQ_2 ,Interrupt status 2" "Not requested,Requested" bitfld.long 0x00 1. " INTREQ_1 ,Interrupt status 1" "Not requested,Requested" textline " " bitfld.long 0x00 0. " INTREQ_0 ,Interrupt status 0" "Not requested,Requested" group.long (0x0+0x04)++0x03 line.long 0x00 "INTEN_STS0,Interrupt Enable Status Register 0" eventfld.long 0x00 9. " INTEN_9 ,Interrupt enable 9" "Disabled,Enabled" eventfld.long 0x00 8. " INTEN_8 ,Interrupt enable 8" "Disabled,Enabled" eventfld.long 0x00 7. " INTEN_7 ,Interrupt enable 7" "Disabled,Enabled" textline " " eventfld.long 0x00 6. " INTEN_6 ,Interrupt enable 6" "Disabled,Enabled" eventfld.long 0x00 5. " INTEN_5 ,Interrupt enable 5" "Disabled,Enabled" eventfld.long 0x00 4. " INTEN_4 ,Interrupt enable 4" "Disabled,Enabled" textline " " eventfld.long 0x00 3. " INTEN_3 ,Interrupt enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " INTEN_2 ,Interrupt enable 2" "Disabled,Enabled" eventfld.long 0x00 1. " INTEN_1 ,Interrupt enable 1" "Disabled,Enabled" textline " " eventfld.long 0x00 0. " INTEN_0 ,Interrupt enable 0" "Disabled,Enabled" wgroup.long (0x0+0x08)++0x03 line.long 0x00 "INTEN_SET,0,Interrupt Enable Set Register 0" bitfld.long 0x00 9. " INTENS_9 ,Interrupt enable set 9" "No effect,Enabled" bitfld.long 0x00 8. " INTENS_8 ,Interrupt enable set 8" "No effect,Enabled" bitfld.long 0x00 7. " INTENS_7 ,Interrupt enable set 7" "No effect,Enabled" textline " " bitfld.long 0x00 6. " INTENS_6 ,Interrupt enable set 6" "No effect,Enabled" bitfld.long 0x00 5. " INTENS_5 ,Interrupt enable set 5" "No effect,Enabled" bitfld.long 0x00 4. " INTENS_4 ,Interrupt enable set 4" "No effect,Enabled" textline " " bitfld.long 0x00 3. " INTENS_3 ,Interrupt enable set 3" "No effect,Enabled" bitfld.long 0x00 2. " INTENS_2 ,Interrupt enable set 2" "No effect,Enabled" bitfld.long 0x00 1. " INTENS_1 ,Interrupt enable set 1" "No effect,Enabled" textline " " bitfld.long 0x00 0. " INTENS_0 ,Interrupt enable set 0" "No effect,Enabled" rgroup.long 0x10++0x03 line.long 0x00 "INTREQ_STS1,Interrupt Request Status Register 1" bitfld.long 0x00 9. " INTREQ_9 ,Interrupt status 9" "Not requested,Requested" bitfld.long 0x00 8. " INTREQ_8 ,Interrupt status 8" "Not requested,Requested" bitfld.long 0x00 7. " INTREQ_7 ,Interrupt status 7" "Not requested,Requested" textline " " bitfld.long 0x00 6. " INTREQ_6 ,Interrupt status 6" "Not requested,Requested" bitfld.long 0x00 5. " INTREQ_5 ,Interrupt status 5" "Not requested,Requested" bitfld.long 0x00 4. " INTREQ_4 ,Interrupt status 4" "Not requested,Requested" textline " " bitfld.long 0x00 3. " INTREQ_3 ,Interrupt status 3" "Not requested,Requested" bitfld.long 0x00 2. " INTREQ_2 ,Interrupt status 2" "Not requested,Requested" bitfld.long 0x00 1. " INTREQ_1 ,Interrupt status 1" "Not requested,Requested" textline " " bitfld.long 0x00 0. " INTREQ_0 ,Interrupt status 0" "Not requested,Requested" group.long (0x10+0x04)++0x03 line.long 0x00 "INTEN_STS1,Interrupt Enable Status Register 1" eventfld.long 0x00 9. " INTEN_9 ,Interrupt enable 9" "Disabled,Enabled" eventfld.long 0x00 8. " INTEN_8 ,Interrupt enable 8" "Disabled,Enabled" eventfld.long 0x00 7. " INTEN_7 ,Interrupt enable 7" "Disabled,Enabled" textline " " eventfld.long 0x00 6. " INTEN_6 ,Interrupt enable 6" "Disabled,Enabled" eventfld.long 0x00 5. " INTEN_5 ,Interrupt enable 5" "Disabled,Enabled" eventfld.long 0x00 4. " INTEN_4 ,Interrupt enable 4" "Disabled,Enabled" textline " " eventfld.long 0x00 3. " INTEN_3 ,Interrupt enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " INTEN_2 ,Interrupt enable 2" "Disabled,Enabled" eventfld.long 0x00 1. " INTEN_1 ,Interrupt enable 1" "Disabled,Enabled" textline " " eventfld.long 0x00 0. " INTEN_0 ,Interrupt enable 0" "Disabled,Enabled" wgroup.long (0x10+0x08)++0x03 line.long 0x00 "INTEN_SET,1,Interrupt Enable Set Register 1" bitfld.long 0x00 9. " INTENS_9 ,Interrupt enable set 9" "No effect,Enabled" bitfld.long 0x00 8. " INTENS_8 ,Interrupt enable set 8" "No effect,Enabled" bitfld.long 0x00 7. " INTENS_7 ,Interrupt enable set 7" "No effect,Enabled" textline " " bitfld.long 0x00 6. " INTENS_6 ,Interrupt enable set 6" "No effect,Enabled" bitfld.long 0x00 5. " INTENS_5 ,Interrupt enable set 5" "No effect,Enabled" bitfld.long 0x00 4. " INTENS_4 ,Interrupt enable set 4" "No effect,Enabled" textline " " bitfld.long 0x00 3. " INTENS_3 ,Interrupt enable set 3" "No effect,Enabled" bitfld.long 0x00 2. " INTENS_2 ,Interrupt enable set 2" "No effect,Enabled" bitfld.long 0x00 1. " INTENS_1 ,Interrupt enable set 1" "No effect,Enabled" textline " " bitfld.long 0x00 0. " INTENS_0 ,Interrupt enable set 0" "No effect,Enabled" endif rgroup.long 0x120++0x03 line.long 0x00 "CHTEN_STS,Chattering Reduction Status Register" bitfld.long 0x00 9. " CHTEN_9 ,Noise reduction enable status 9" "Disabled,Enabled" bitfld.long 0x00 8. " CHTEN_8 ,Noise reduction enable status 8" "Disabled,Enabled" bitfld.long 0x00 7. " CHTEN_7 ,Noise reduction enable status 7" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " CHTEN_6 ,Noise reduction enable status 6" "Disabled,Enabled" bitfld.long 0x00 5. " CHTEN_5 ,Noise reduction enable status 5" "Disabled,Enabled" bitfld.long 0x00 4. " CHTEN_4 ,Noise reduction enable status 4" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CHTEN_3 ,Noise reduction enable status 3" "Disabled,Enabled" bitfld.long 0x00 2. " CHTEN_2 ,Noise reduction enable status 2" "Disabled,Enabled" bitfld.long 0x00 1. " CHTEN_1 ,Noise reduction enable status 1" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " CHTEN_0 ,Noise reduction enable status 0" "Disabled,Enabled" sif cpuis("R8A77470") group.long 0x500++0x03 line.long 0x00 "DETECT_STATUS,IRQ Detect Status Register" eventfld.long 0x00 9. " IRQ9DET ,IRQ9 event detection status" "No interrupt,Interrupt" eventfld.long 0x00 8. " IRQ8DET ,IRQ8 event detection status" "No interrupt,Interrupt" eventfld.long 0x00 7. " IRQ7DET ,IRQ7 event detection status" "No interrupt,Interrupt" eventfld.long 0x00 6. " IRQ6DET ,IRQ6 event detection status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 5. " IRQ5DET ,IRQ5 event detection status" "No interrupt,Interrupt" eventfld.long 0x00 4. " IRQ4DET ,IRQ4 event detection status" "No interrupt,Interrupt" eventfld.long 0x00 3. " IRQ3DET ,IRQ3 event detection status" "No interrupt,Interrupt" eventfld.long 0x00 2. " IRQ2DET ,IRQ2 event detection status" "No interrupt,Interrupt" textline " " eventfld.long 0x00 1. " IRQ1DET ,IRQ1 event detection status" "No interrupt,Interrupt" eventfld.long 0x00 0. " IRQ0DET ,IRQ0 event detection status" "No interrupt,Interrupt" rgroup.long 0x504++0x03 line.long 0x00 "MONITOR,IRQ Signal Level Monitor Register" bitfld.long 0x00 9. " IRQ9MON ,IRQ9 external signal level monitor" "Low,High" bitfld.long 0x00 8. " IRQ8MON ,IRQ8 external signal level monitor" "Low,High" bitfld.long 0x00 7. " IRQ7MON ,IRQ7 external signal level monitor" "Low,High" bitfld.long 0x00 6. " IRQ6MON ,IRQ6 external signal level monitor" "Low,High" textline " " bitfld.long 0x00 5. " IRQ5MON ,IRQ5 external signal level monitor" "Low,High" bitfld.long 0x00 4. " IRQ4MON ,IRQ4 external signal level monitor" "Low,High" bitfld.long 0x00 3. " IRQ3MON ,IRQ3 external signal level monitor" "Low,High" bitfld.long 0x00 2. " IRQ2MON ,IRQ2 external signal level monitor" "Low,High" textline " " bitfld.long 0x00 1. " IRQ1MON ,IRQ1 external signal level monitor" "Low,High" bitfld.long 0x00 0. " IRQ0MON ,IRQ0 external signal level monitor" "Low,High" endif rgroup.long 0x108++0x17 line.long 0x00 "HLVL_STS,IRQ High Level Detect Status Register" bitfld.long 0x00 9. " IRQHSTS_9 ,IRQ high level interrupt status 9" "Not occurred,Occurred" bitfld.long 0x00 8. " IRQHSTS_8 ,IRQ high level interrupt status 8" "Not occurred,Occurred" bitfld.long 0x00 7. " IRQHSTS_7 ,IRQ high level interrupt status 7" "Not occurred,Occurred" textline " " bitfld.long 0x00 6. " IRQHSTS_6 ,IRQ high level interrupt status 6" "Not occurred,Occurred" bitfld.long 0x00 5. " IRQHSTS_5 ,IRQ high level interrupt status 5" "Not occurred,Occurred" bitfld.long 0x00 4. " IRQHSTS_4 ,IRQ high level interrupt status 4" "Not occurred,Occurred" textline " " bitfld.long 0x00 3. " IRQHSTS_3 ,IRQ high level interrupt status 3" "Not occurred,Occurred" bitfld.long 0x00 2. " IRQHSTS_2 ,IRQ high level interrupt status 2" "Not occurred,Occurred" bitfld.long 0x00 1. " IRQHSTS_1 ,IRQ high level interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x00 0. " IRQHSTS_0 ,IRQ high level interrupt status 0" "Not occurred,Occurred" line.long 0x04 "LLVL_STS,IRQ Low Level Detect Status Register" bitfld.long 0x04 9. " IRQLSTS_9 ,IRQ low level interrupt status 9" "Not occurred,Occurred" bitfld.long 0x04 8. " IRQLSTS_8 ,IRQ low level interrupt status 8" "Not occurred,Occurred" bitfld.long 0x04 7. " IRQLSTS_7 ,IRQ low level interrupt status 7" "Not occurred,Occurred" textline " " bitfld.long 0x04 6. " IRQLSTS_6 ,IRQ low level interrupt status 6" "Not occurred,Occurred" bitfld.long 0x04 5. " IRQLSTS_5 ,IRQ low level interrupt status 5" "Not occurred,Occurred" bitfld.long 0x04 4. " IRQLSTS_4 ,IRQ low level interrupt status 4" "Not occurred,Occurred" textline " " bitfld.long 0x04 3. " IRQLSTS_3 ,IRQ low level interrupt status 3" "Not occurred,Occurred" bitfld.long 0x04 2. " IRQLSTS_2 ,IRQ low level interrupt status 2" "Not occurred,Occurred" bitfld.long 0x04 1. " IRQLSTS_1 ,IRQ low level interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x04 0. " IRQLSTS_0 ,IRQ low level interrupt status 0" "Not occurred,Occurred" line.long 0x08 "S_R_EDGE_STS,IRQ Sync Rising Edge Detect Status Register" bitfld.long 0x08 9. " IRQSRSTS_9 ,IRQ synchronous rise edge interrupt status 9" "Not occurred,Occurred" bitfld.long 0x08 8. " IRQSRSTS_8 ,IRQ synchronous rise edge interrupt status 8" "Not occurred,Occurred" bitfld.long 0x08 7. " IRQSRSTS_7 ,IRQ synchronous rise edge interrupt status 7" "Not occurred,Occurred" textline " " bitfld.long 0x08 6. " IRQSRSTS_6 ,IRQ synchronous rise edge interrupt status 6" "Not occurred,Occurred" bitfld.long 0x08 5. " IRQSRSTS_5 ,IRQ synchronous rise edge interrupt status 5" "Not occurred,Occurred" bitfld.long 0x08 4. " IRQSRSTS_4 ,IRQ synchronous rise edge interrupt status 4" "Not occurred,Occurred" textline " " bitfld.long 0x08 3. " IRQSRSTS_3 ,IRQ synchronous rise edge interrupt status 3" "Not occurred,Occurred" bitfld.long 0x08 2. " IRQSRSTS_2 ,IRQ synchronous rise edge interrupt status 2" "Not occurred,Occurred" bitfld.long 0x08 1. " IRQSRSTS_1 ,IRQ synchronous rise edge interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x08 0. " IRQSRSTS_0 ,IRQ synchronous rise edge interrupt status 0" "Not occurred,Occurred" line.long 0x0C "S_F_EDGE_STS,IRQ Sync Falling Edge Detect Status Register" bitfld.long 0x0C 9. " IRQSFSTS_9 ,IRQ asynchronous rise edge interrupt status 9" "Not occurred,Occurred" bitfld.long 0x0C 8. " IRQSFSTS_8 ,IRQ asynchronous rise edge interrupt status 8" "Not occurred,Occurred" bitfld.long 0x0C 7. " IRQSFSTS_7 ,IRQ asynchronous rise edge interrupt status 7" "Not occurred,Occurred" textline " " bitfld.long 0x0C 6. " IRQSFSTS_6 ,IRQ asynchronous rise edge interrupt status 6" "Not occurred,Occurred" bitfld.long 0x0C 5. " IRQSFSTS_5 ,IRQ asynchronous rise edge interrupt status 5" "Not occurred,Occurred" bitfld.long 0x0C 4. " IRQSFSTS_4 ,IRQ asynchronous rise edge interrupt status 4" "Not occurred,Occurred" textline " " bitfld.long 0x0C 3. " IRQSFSTS_3 ,IRQ asynchronous rise edge interrupt status 3" "Not occurred,Occurred" bitfld.long 0x0C 2. " IRQSFSTS_2 ,IRQ asynchronous rise edge interrupt status 2" "Not occurred,Occurred" bitfld.long 0x0C 1. " IRQSFSTS_1 ,IRQ asynchronous rise edge interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x0C 0. " IRQSFSTS_0 ,IRQ asynchronous rise edge interrupt status 0" "Not occurred,Occurred" line.long 0x10 "A_R_EDGE_STS,IRQ Async Rising Edge DetectStatus Register" bitfld.long 0x10 9. " IRQARSTS_9 ,IRQ asynchronous rise edge interrupt status 9" "Not occurred,Occurred" bitfld.long 0x10 8. " IRQARSTS_8 ,IRQ asynchronous rise edge interrupt status 8" "Not occurred,Occurred" bitfld.long 0x10 7. " IRQARSTS_7 ,IRQ asynchronous rise edge interrupt status 7" "Not occurred,Occurred" textline " " bitfld.long 0x10 6. " IRQARSTS_6 ,IRQ asynchronous rise edge interrupt status 6" "Not occurred,Occurred" bitfld.long 0x10 5. " IRQARSTS_5 ,IRQ asynchronous rise edge interrupt status 5" "Not occurred,Occurred" bitfld.long 0x10 4. " IRQARSTS_4 ,IRQ asynchronous rise edge interrupt status 4" "Not occurred,Occurred" textline " " bitfld.long 0x10 3. " IRQARSTS_3 ,IRQ asynchronous rise edge interrupt status 3" "Not occurred,Occurred" bitfld.long 0x10 2. " IRQARSTS_2 ,IRQ asynchronous rise edge interrupt status 2" "Not occurred,Occurred" bitfld.long 0x10 1. " IRQARSTS_1 ,IRQ asynchronous rise edge interrupt status 1" "Not occurred,Occurred" textline " " bitfld.long 0x10 0. " IRQARSTS_0 ,IRQ asynchronous rise edge interrupt status 0" "Not occurred,Occurred" line.long 0x14 "A_F_EDGE_STS,IRQ Async Falling Edge Detect Status Register" bitfld.long 0x14 9. " IRQAFSTS_9 ,IRQ async falling edge detect status 9" "Not occurred,Occurred" bitfld.long 0x14 8. " IRQAFSTS_8 ,IRQ async falling edge detect status 8" "Not occurred,Occurred" bitfld.long 0x14 7. " IRQAFSTS_7 ,IRQ async falling edge detect status 7" "Not occurred,Occurred" textline " " bitfld.long 0x14 6. " IRQAFSTS_6 ,IRQ async falling edge detect status 6" "Not occurred,Occurred" bitfld.long 0x14 5. " IRQAFSTS_5 ,IRQ async falling edge detect status 5" "Not occurred,Occurred" bitfld.long 0x14 4. " IRQAFSTS_4 ,IRQ async falling edge detect status 4" "Not occurred,Occurred" textline " " bitfld.long 0x14 3. " IRQAFSTS_3 ,IRQ async falling edge detect status 3" "Not occurred,Occurred" bitfld.long 0x14 2. " IRQAFSTS_2 ,IRQ async falling edge detect status 2" "Not occurred,Occurred" bitfld.long 0x14 1. " IRQAFSTS_1 ,IRQ async falling edge detect status 1" "Not occurred,Occurred" textline " " bitfld.long 0x14 0. " IRQAFSTS_0 ,IRQ async falling edge detect status 0" "Not occurred,Occurred" sif cpuis("R8A77940") group.long 0x180++0x03 line.long 0x00 "CONFIG_0,IRQ0 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ0 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ0 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x180++0x03 line.long 0x00 "CONFIG_00,IRQ0 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ0 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ0 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif sif cpuis("R8A77940") group.long 0x184++0x03 line.long 0x00 "CONFIG_1,IRQ1 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ1 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ1 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x184++0x03 line.long 0x00 "CONFIG_01,IRQ1 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ1 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ1 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif sif cpuis("R8A77940") group.long 0x188++0x03 line.long 0x00 "CONFIG_2,IRQ2 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ2 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ2 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x188++0x03 line.long 0x00 "CONFIG_02,IRQ2 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ2 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ2 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif sif cpuis("R8A77940") group.long 0x18C++0x03 line.long 0x00 "CONFIG_3,IRQ3 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ3 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ3 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x18C++0x03 line.long 0x00 "CONFIG_03,IRQ3 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ3 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ3 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif sif cpuis("R8A77940") group.long 0x190++0x03 line.long 0x00 "CONFIG_4,IRQ4 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ4 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ4 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x190++0x03 line.long 0x00 "CONFIG_04,IRQ4 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ4 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ4 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif sif cpuis("R8A77940") group.long 0x194++0x03 line.long 0x00 "CONFIG_5,IRQ5 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ5 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ5 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x194++0x03 line.long 0x00 "CONFIG_05,IRQ5 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ5 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ5 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif sif cpuis("R8A77940") group.long 0x198++0x03 line.long 0x00 "CONFIG_6,IRQ6 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ6 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ6 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x198++0x03 line.long 0x00 "CONFIG_06,IRQ6 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ6 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ6 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif sif cpuis("R8A77940") group.long 0x19C++0x03 line.long 0x00 "CONFIG_7,IRQ7 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ7 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ7 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x19C++0x03 line.long 0x00 "CONFIG_07,IRQ7 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ7 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ7 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif sif cpuis("R8A77940") group.long 0x1A0++0x03 line.long 0x00 "CONFIG_8,IRQ8 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ8 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ8 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x1A0++0x03 line.long 0x00 "CONFIG_08,IRQ8 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ8 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ8 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif sif cpuis("R8A77940") group.long 0x1A4++0x03 line.long 0x00 "CONFIG_9,IRQ9 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS1 ,IRQ9 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS2 ,IRQ9 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,,Enabled,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," else group.long 0x1A4++0x03 line.long 0x00 "CONFIG_09,IRQ9 Configuration Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,IRQ9 scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,IRQ9 chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" textline " " bitfld.long 0x00 0.--5. " SS ,Sense Selection" "Disabled,Low level,High level,,Sync. falling,,,,Sync. rising,,,,Sync. both,,,,Async. falling,,,,,,,,,,,,,,,,Async. rising,,,,,,,,,,,,,,,,Async. both,,,,,,,,,,,,,,," endif tree.end tree "NMI Event Detector Register Configuration" sif !cpuis("R8A77940") sif cpuis("R8A77470") rgroup.long 0x400++0x03 line.long 0x00 "NMIREQ_STS0,NMI Request Status Register 0" bitfld.long 0x00 7. " C7_STS ,NMI status 7" "Not during service,During service" bitfld.long 0x00 6. " C6_STS ,NMI status 6" "Not during service,During service" bitfld.long 0x00 5. " C5_STS ,NMI status 5" "Not during service,During service" textline " " bitfld.long 0x00 4. " C4_STS ,NMI status 4" "Not during service,During service" bitfld.long 0x00 3. " C3_STS ,NMI status 3" "Not during service,During service" bitfld.long 0x00 2. " C2_STS ,NMI status 2" "Not during service,During service" textline " " bitfld.long 0x00 1. " C1_STS ,NMI status 1" "Not during service,During service" bitfld.long 0x00 0. " C0_STS ,NMI status 0" "Not during service,During service" group.long (0x400+0x04)++0x03 line.long 0x00 "NMIEN_STS0,NMI Enable Status Register 0" eventfld.long 0x00 7. " C7_IEN ,NMI enable 7" "Disabled,Enabled" eventfld.long 0x00 6. " C6_IEN ,NMI enable 6" "Disabled,Enabled" eventfld.long 0x00 5. " C5_IEN ,NMI enable 5" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " C4_IEN ,NMI enable 4" "Disabled,Enabled" eventfld.long 0x00 3. " C3_IEN ,NMI enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " C2_IEN ,NMI enable 2" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " C1_IEN ,NMI enable 1" "Disabled,Enabled" eventfld.long 0x00 0. " C0_IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long (0x400+0x08)++0x03 line.long 0x00 "NMIEN_SET,NMI Enable Set (CPU0) Register 0" bitfld.long 0x00 7. " C7_SET ,NMI enable set 7" "No effect,Enable" bitfld.long 0x00 6. " C6_SET ,NMI enable set 6" "No effect,Enable" bitfld.long 0x00 5. " C5_SET ,NMI enable set 5" "No effect,Enable" textline " " bitfld.long 0x00 4. " C4_SET ,NMI enable set 4" "No effect,Enable" bitfld.long 0x00 3. " C3_SET ,NMI enable set 3" "No effect,Enable" bitfld.long 0x00 2. " C2_SET ,NMI enable set 2" "No effect,Enable" textline " " bitfld.long 0x00 1. " C1_SET ,NMI enable set 1" "No effect,Enable" bitfld.long 0x00 0. " C0_SET ,NMI enable set 0" "No effect,Enable" else endif sif cpuis("R8A77470") else rgroup.long 0x410++0x03 line.long 0x00 "NMIREQ_STS1,NMI Request Status Register 1" bitfld.long 0x00 7. " C7_STS ,NMI status 7" "Not during service,During service" bitfld.long 0x00 6. " C6_STS ,NMI status 6" "Not during service,During service" bitfld.long 0x00 5. " C5_STS ,NMI status 5" "Not during service,During service" textline " " bitfld.long 0x00 4. " C4_STS ,NMI status 4" "Not during service,During service" bitfld.long 0x00 3. " C3_STS ,NMI status 3" "Not during service,During service" bitfld.long 0x00 2. " C2_STS ,NMI status 2" "Not during service,During service" textline " " bitfld.long 0x00 1. " C1_STS ,NMI status 1" "Not during service,During service" bitfld.long 0x00 0. " C0_STS ,NMI status 0" "Not during service,During service" group.long (0x410+0x04)++0x03 line.long 0x00 "NMIEN_STS1,NMI Enable Status Register 1" eventfld.long 0x00 7. " C7_IEN ,NMI enable 7" "Disabled,Enabled" eventfld.long 0x00 6. " C6_IEN ,NMI enable 6" "Disabled,Enabled" eventfld.long 0x00 5. " C5_IEN ,NMI enable 5" "Disabled,Enabled" textline " " eventfld.long 0x00 4. " C4_IEN ,NMI enable 4" "Disabled,Enabled" eventfld.long 0x00 3. " C3_IEN ,NMI enable 3" "Disabled,Enabled" eventfld.long 0x00 2. " C2_IEN ,NMI enable 2" "Disabled,Enabled" textline " " eventfld.long 0x00 1. " C1_IEN ,NMI enable 1" "Disabled,Enabled" eventfld.long 0x00 0. " C0_IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long (0x410+0x08)++0x03 line.long 0x00 "NMIEN_SET,NMI Enable Set (CPU1) Register 1" bitfld.long 0x00 7. " C7_SET ,NMI enable set 7" "No effect,Enable" bitfld.long 0x00 6. " C6_SET ,NMI enable set 6" "No effect,Enable" bitfld.long 0x00 5. " C5_SET ,NMI enable set 5" "No effect,Enable" textline " " bitfld.long 0x00 4. " C4_SET ,NMI enable set 4" "No effect,Enable" bitfld.long 0x00 3. " C3_SET ,NMI enable set 3" "No effect,Enable" bitfld.long 0x00 2. " C2_SET ,NMI enable set 2" "No effect,Enable" textline " " bitfld.long 0x00 1. " C1_SET ,NMI enable set 1" "No effect,Enable" bitfld.long 0x00 0. " C0_SET ,NMI enable set 0" "No effect,Enable" endif else rgroup.long 0x400++0x03 line.long 0x00 "NMIREQ_STS0,NMI Request Status Register 0" bitfld.long 0x00 1. " C1_STS ,NMI status 1" "Not during service,During service" bitfld.long 0x00 0. " C0_STS ,NMI status 0" "Not during service,During service" group.long 0x404++0x03 line.long 0x00 "NMIEN_STS0,NMI Enable Status Register 0" eventfld.long 0x00 1. " C1_IEN ,NMI enable 1" "Disabled,Enabled" eventfld.long 0x00 0. " C0_IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long 0x408++0x03 line.long 0x00 "NMIEN_SET0,NMI Enable Set Register 0" bitfld.long 0x00 1. " C1_SET ,NMI enable set 1" "No effect,Enable" bitfld.long 0x00 0. " C0_SET ,NMI enable set 0" "No effect,Enable" rgroup.long 0x410++0x03 line.long 0x00 "NMIREQ_STS1,NMI Request Status Register 1" bitfld.long 0x00 0. " C0_STS ,NMI status 0" "Not during service,During service" group.long 0x414++0x03 line.long 0x00 "NMIEN_STS1,NMI Enable Status Register 1" eventfld.long 0x00 0. " C0_IEN ,NMI enable 0" "Disabled,Enabled" wgroup.long 0x418++0x03 line.long 0x00 "NMIEN_SET1,NMI Enable Set Register 1" bitfld.long 0x00 0. " C0_SET ,NMI enable set 0" "No effect,Enable" endif rgroup.long 0x520++0x03 line.long 0x00 "CHTEN_STS,Chattering Reduction Status Register" bitfld.long 0x00 0. " CHTEN ,Noise reduction enable status" "Disabled,Enabled" group.long 0x540++0x03 line.long 0x00 "DEB_SET,NMI Debounce Setting Register" bitfld.long 0x00 31. " CHTEN ,Chattering reduction enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " STS_1 ,NMI scan timing" "1 ms,2 ms,4 ms,8 ms" bitfld.long 0x00 16.--21. " STS_2 ,NMI chattering reduction period" "No reduction,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2,STS1 x STS2" sif cpuis("R8A77940") rgroup.long 0x508++0x17 line.long 0x00 "HLVL_STS,NMI High Level Detect Status Register" bitfld.long 0x00 8. " NMI8_HSTS ,NMI8 high level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 1. " NMI1_HSTS ,NMI1 high level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 0. " NMI0_HSTS ,NMI0 high level interrupt status" "Not occurred,Occurred" line.long 0x04 "LLVL_STS,NMI Low Level Detect Status Register" bitfld.long 0x04 8. " NMI8_LSTS ,NMI8 low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 1. " NMI1_LSTS ,NMI1 low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 0. " NMI0_LSTS ,NMI0 low level interrupt status" "Not occurred,Occurred" line.long 0x08 "S_R_EDGE_STS,NMI Sync Rising Edge Detect Status Register" bitfld.long 0x08 8. " NMI8_SRSTS ,NMI8 synchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 1. " NMI1_SRSTS ,NMI1 synchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 0. " NMI0_SRSTS ,NMI0 synchronous rise edge interrupt status" "Not occurred,Occurred" line.long 0x0C "S_F_EDGE_STS,NMI Sync Falling Edge Detect Status Register" bitfld.long 0x0C 8. " NMI8_SFSTS ,NMI8 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 1. " NMI1_SFSTS ,NMI1 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 0. " NMI0_SFSTS ,NMI0 asynchronous rise edge interrupt status" "Not occurred,Occurred" line.long 0x10 "A_R_EDGE_STS,NMI Async Rising Edge Detect Status Register" bitfld.long 0x10 8. " NMI8_ARSTS ,NMI8 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 1. " NMI1_ARSTS ,NMI1 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 0. " NMI0_ARSTS ,NMI0 asynchronous rise edge interrupt status" "Not occurred,Occurred" line.long 0x14 "A_F_EDGE_STS,NMI Async Falling Edge Detect Status Register" bitfld.long 0x14 8. " NMI8_AFSTS ,NMI8 asynchronous fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 1. " NMI1_AFSTS ,NMI1 asynchronous fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 0. " NMI0_AFSTS ,NMI0 asynchronous fall edge interrupt status" "Not occurred,Occurred" else rgroup.long 0x508++0x17 line.long 0x00 "HLVL_STS,NMI High Level Detect Status Register" sif !cpuis("R8A77470") bitfld.long 0x00 8. " NMI8_HSTS ,NMI8 high level interrupt status" "Not occurred,Occurred" endif bitfld.long 0x00 7. " NMI7_HSTS ,NMI7 high level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 6. " NMI6_HSTS ,NMI6 high level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 5. " NMI5_HSTS ,NMI5 high level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 4. " NMI4_HSTS ,NMI4 high level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 3. " NMI3_HSTS ,NMI3 high level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " NMI2_HSTS ,NMI2 high level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 1. " NMI1_HSTS ,NMI1 high level interrupt status" "Not occurred,Occurred" bitfld.long 0x00 0. " NMI0_HSTS ,NMI0 high level interrupt status" "Not occurred,Occurred" line.long 0x04 "LLVL_STS,NMI Low Level Detect Status Register" sif !cpuis("R8A77470") bitfld.long 0x04 8. " NMI8_LSTS ,NMI8 Low level interrupt status" "Not occurred,Occurred" endif bitfld.long 0x04 7. " NMI7_LSTS ,NMI7 low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 6. " NMI6_LSTS ,NMI6 low level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x04 5. " NMI5_LSTS ,NMI5 low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 4. " NMI4_LSTS ,NMI4 low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 3. " NMI3_LSTS ,NMI3 low level interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x04 2. " NMI2_LSTS ,NMI2 low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 1. " NMI1_LSTS ,NMI1 low level interrupt status" "Not occurred,Occurred" bitfld.long 0x04 0. " NMI0_LSTS ,NMI0 low level interrupt status" "Not occurred,Occurred" line.long 0x08 "S_R_EDGE_STS,NMI Sync Rising Edge Detect Status Register" sif !cpuis("R8A77470") bitfld.long 0x08 8. " NMI8_SRSTS ,NMI8 synchronous rise edge interrupt status" "Not occurred,Occurred" endif bitfld.long 0x08 7. " NMI7_SRSTS ,NMI7 synchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 6. " NMI6_SRSTS ,NMI6 synchronous rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x08 5. " NMI5_SRSTS ,NMI5 synchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 4. " NMI4_SRSTS ,NMI4 synchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 3. " NMI3_SRSTS ,NMI3 synchronous rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x08 2. " NMI2_SRSTS ,NMI2 synchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 1. " NMI1_SRSTS ,NMI1 synchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x08 0. " NMI0_SRSTS ,NMI0 synchronous rise edge interrupt status" "Not occurred,Occurred" line.long 0x0C "S_F_EDGE_STS,NMI Sync Falling Edge Detect Status Register" sif !cpuis("R8A77470") bitfld.long 0x0C 8. " NMI8_SFSTS ,NMI8 asynchronous rise edge interrupt status" "Not occurred,Occurred" endif bitfld.long 0x0C 7. " NMI7_SFSTS ,NMI7 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 6. " NMI6_SFSTS ,NMI6 asynchronous rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x0C 5. " NMI5_SFSTS ,NMI5 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 4. " NMI4_SFSTS ,NMI4 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 3. " NMI3_SFSTS ,NMI3 asynchronous rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x0C 2. " NMI2_SFSTS ,NMI2 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 1. " NMI1_SFSTS ,NMI1 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x0C 0. " NMI0_SFSTS ,NMI0 asynchronous rise edge interrupt status" "Not occurred,Occurred" line.long 0x10 "A_R_EDGE_STS,NMI Async Rising Edge Detect Status Register" sif !cpuis("R8A77470") bitfld.long 0x10 8. " NMI8_ARSTS ,NMI8 asynchronous rise edge interrupt status" "Not occurred,Occurred" endif bitfld.long 0x10 7. " NMI7_ARSTS ,NMI7 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 6. " NMI6_ARSTS ,NMI6 asynchronous rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x10 5. " NMI5_ARSTS ,NMI5 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 4. " NMI4_ARSTS ,NMI4 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 3. " NMI3_ARSTS ,NMI3 asynchronous rise edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x10 2. " NMI2_ARSTS ,NMI2 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 1. " NMI1_ARSTS ,NMI1 asynchronous rise edge interrupt status" "Not occurred,Occurred" bitfld.long 0x10 0. " NMI0_ARSTS ,NMI0 asynchronous rise edge interrupt status" "Not occurred,Occurred" line.long 0x14 "A_F_EDGE_STS,NMI Async Falling Edge Detect Status Register" sif !cpuis("R8A77470") bitfld.long 0x14 8. " NMI8_AFSTS ,NMI8 asynchronous fall edge interrupt status" "Not occurred,Occurred" endif bitfld.long 0x14 7. " NMI7_AFSTS ,NMI7 asynchronous fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 6. " NMI6_AFSTS ,NMI6 asynchronous fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x14 5. " NMI5_AFSTS ,NMI5 asynchronous fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 4. " NMI4_AFSTS ,NMI4 asynchronous fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 3. " NMI3_AFSTS ,NMI3 asynchronous fall edge interrupt status" "Not occurred,Occurred" textline " " bitfld.long 0x14 2. " NMI2_AFSTS ,NMI2 asynchronous fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 1. " NMI1_AFSTS ,NMI1 asynchronous fall edge interrupt status" "Not occurred,Occurred" bitfld.long 0x14 0. " NMI0_AFSTS ,NMI0 asynchronous fall edge interrupt status" "Not occurred,Occurred" endif sif (cpuis("R8A77940")||cpuis("R8A77470")) group.long 0x580++0x07 line.long 0x00 "CONFIG_0_NMI,NMI Configuration 0 Register" bitfld.long 0x00 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x04 "CONFIG_1_NMI,NMI Configuration 1 Register" bitfld.long 0x04 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." sif !cpuis("R8A77470") group.long 0x5A0++0x03 line.long 0x00 "CONFIG_8_NMI,NMI Configuration 8 Register" bitfld.long 0x00 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." endif else group.long 0x400++0x23 line.long 0x0 "CONFIG_0_NMI,NMI Configuration 0 Register" bitfld.long 0x0 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x4 "CONFIG_1_NMI,NMI Configuration 1 Register" bitfld.long 0x4 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x8 "CONFIG_2_NMI,NMI Configuration 2 Register" bitfld.long 0x8 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0xC "CONFIG_3_NMI,NMI Configuration 3 Register" bitfld.long 0xC 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x10 "CONFIG_4_NMI,NMI Configuration 4 Register" bitfld.long 0x10 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x14 "CONFIG_5_NMI,NMI Configuration 5 Register" bitfld.long 0x14 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x18 "CONFIG_6_NMI,NMI Configuration 6 Register" bitfld.long 0x18 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x1C "CONFIG_7_NMI,NMI Configuration 7 Register" bitfld.long 0x1C 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." line.long 0x20 "CONFIG_8_NMI,NMI Configuration 8 Register" bitfld.long 0x20 0.--5. " SS ,Sense selection" "Disabled,Low level,High level,,Synchronous falling edge,,,,Synchronous rising edge,,,,Synchronous both edges,,,,Asynchronous falling edge,,,,,,,,,,,,,,,,Asynchronous rising edge,,,,,,,,,,,,,,,,Asynchronous both edges,?..." endif tree.end tree "NMI Lock Register Configuration" group.long 0xA00++0x0B line.long 0x00 "NMI_LCK,NMI Mask Lock Set Register" line.long 0x04 "NMI_LCKCODE,NMI Lock Code Register" line.long 0x08 "NMI_DBG,NMI Debug Control Enable Register" bitfld.long 0x08 0. " DBGEN ,NMI mask lock feature debug enable" "Disabled,Enabled" group.long 0xB08++0x03 line.long 0x00 "NMI_DBGCODE,NMI Debug Code Register" tree.end width 0x0B tree.end tree "INTC-RT (Interrupt Controller)" base ad:0xFFD20000 width 12. tree "Peripheral Interrupt Priority Registers" group.word 0x00++0x1 line.word 0x00 "IPR_A_S,Peripheral Interrupt priority register AS" bitfld.word 0x00 12.--15. " IPR_A_S[15:12] ,CoreSight priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_A_S[11:8] ,TPU priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_A_S[7:4] ,2D-DMAC priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_A_S[3:0] ,Secure timer priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x04++0x1 line.word 0x00 "IPR_B_S,Peripheral Interrupt priority register BS" bitfld.word 0x00 8.--11. " IPR_B_S[11:8] ,MMC0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x0C++0x1 line.word 0x00 "IPR_D_S,Peripheral Interrupt priority register DS" bitfld.word 0x00 12.--15. " IPR_D_S[15:12] ,CAN0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_D_S[11:8] ,CAN1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x10++0x1 line.word 0x00 "IPR_E_S,Peripheral Interrupt priority register ES" bitfld.word 0x00 8.--11. " IPR_E_S[11:8] ,IR Receiver priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x14++0x1 line.word 0x00 "IPR_F_S,Peripheral Interrupt priority register FS" bitfld.word 0x00 4.--7. " IPR_F_S[7:4] ,CMT0_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_F_S[3:0] ,CMT0_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x18++0x1 line.word 0x00 "IPR_G_S,Peripheral Interrupt priority register ES" bitfld.word 0x00 12.--15. " IPR_G_S[15:12] ,TMU1_TUNI0/TMU0_TUNI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_G_S[11:8] ,TMU1_TUNI1/TMU0_TUNI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_G_S[7:4] ,TMU1_TUNI2/TMU0_TUNI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_G_S[3:0] ,TSIF1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x1C++0x1 line.word 0x00 "IPR_H_S,Peripheral Interrupt priority register HS" bitfld.word 0x00 8.--11. " IPR_H_S[11:8] ,IE-BUS priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_H_S[7:4] ,SDHIO0/SDHIO1/SDHIO2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x20++0x1 line.word 0x00 "IPR_I_S,Peripheral Interrupt priority register IS" bitfld.word 0x00 4.--7. " IPR_I_S[7:4] ,TSIF0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_I_S[3:0] ,I2C3/I2C0/IIC0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x24++0x1 line.word 0x00 "IPR_J_S,Peripheral Interrupt priority register JS" bitfld.word 0x00 8.--11. " IPR_J_S[11:8] ,SGX-540 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x28++0x1 line.word 0x00 "IPR_K_S,Peripheral Interrupt priority register KS" bitfld.word 0x00 12.--15. " IPR_K_S[15:12] ,DARC priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_K_S[3:0] ,Secure up timer priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x2C++0x1 line.word 0x00 "IPR_L_S,Peripheral Interrupt priority register LS" bitfld.word 0x00 12.--15. " IPR_L_S[15:12] ,IPMMU(DS)/IPMMU(SYS0)/IPMMU(SYS1) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30++0x1 line.word 0x00 "IPR_M_S,Peripheral Interrupt priority register MS" bitfld.word 0x00 12.--15. " IPR_M_S[15:12] ,I2C1/I2C2/IIC1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_M_S[7:4] ,Secure WDT priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_M_S[3:0] ,RWDT priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30000++0x1 line.word 0x00 "IPR_A_S3,Peripheral Interrupt priority register AS3" bitfld.word 0x00 12.--15. " IPR_A_S3[15:12] ,SCIF0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_A_S3[11:8] ,SCIF1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_A_S3[7:4] ,HSCIF0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_A_S3[3:0] ,HSCIF1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30004++0x1 line.word 0x00 "IPR_B_S3,Peripheral Interrupt priority register BS3" bitfld.word 0x00 12.--15. " IPR_B_S3[15:12] ,TMU1_TUNI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_B_S3[11:8] ,TMU2_TUNI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_B_S3[3:0] ,SYSC priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30008++0x1 line.word 0x00 "IPR_C_S3,Peripheral Interrupt priority register CS3" bitfld.word 0x00 12.--15. " IPR_C_S3[15:12] ,QSPI priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_C_S3[7:4] ,ETHER priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_C_S3[3:0] ,CPG priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3000C++0x1 line.word 0x00 "IPR_D_S3,Peripheral Interrupt priority register DS3" bitfld.word 0x00 12.--15. " IPR_D_S3[15:12] ,SCIFA0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_D_S3[11:8] ,SCIFA1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_D_S3[7:4] ,SCIFA2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_D_S3[3:0] ,APMU0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30010++0x1 line.word 0x00 "IPR_E_S3,Peripheral Interrupt priority register ES3" bitfld.word 0x00 12.--15. " IPR_E_S3[15:12] ,SCIFB0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E_S3[11:8] ,SCIFB1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E_S3[7:4] ,SCIFB2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_E_S3[3:0] ,AVB priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30014++0x1 line.word 0x00 "IPR_F_S3,Peripheral Interrupt priority register FS3" bitfld.word 0x00 12.--15. " IPR_F_S3[15:12] ,CMT1_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_F_S3[11:8] ,CMT1_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_F_S3[7:4] ,CMT1_2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_F_S3[3:0] ,CMT1_3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30018++0x1 line.word 0x00 "IPR_G_S3,Peripheral Interrupt priority register GS3" bitfld.word 0x00 12.--15. " IPR_G_S3[15:12] ,CMT1_4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_G_S3[11:8] ,CMT1_5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_G_S3[7:4] ,CMT1_6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_G_S3[3:0] ,CMT1_7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3001C++0x1 line.word 0x00 "IPR_H_S3,Peripheral Interrupt priority register HS3" bitfld.word 0x00 12.--15. " IPR_H_S3[15:12] ,MSOF0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_H_S3[11:8] ,MSOF1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_H_S3[7:4] ,MSOF2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30028++0x1 line.word 0x00 "IPR_K_S3,Peripheral Interrupt priority register KS3" bitfld.word 0x00 12.--15. " IPR_K_S3[15:12] ,ADSP priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3002C++0x1 line.word 0x00 "IPR_L_S3,Peripheral Interrupt priority register LS3" bitfld.word 0x00 12.--15. " IPR_L_S3[15:12] ,DU1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30030++0x1 line.word 0x00 "IPR_M_S3,Peripheral Interrupt priority register MS3" bitfld.word 0x00 12.--15. " IPR_M_S3[15:12] ,LBSC-WT0/LBSC-ATA priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_M_S3[7:4] ,LBSC-DMAC0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_M_S3[3:0] ,LBSC-DMAC1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30034++0x1 line.word 0x00 "IPR_N_S3,Peripheral Interrupt priority register NS3" bitfld.word 0x00 12.--15. " IPR_N_S3[15:12] ,LBSC-DMAC2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_N_S3[11:8] ,TMU2_TUNI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_N_S3[7:4] ,TMU2_TUNI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_N_S3[3:0] ,TMU2_TUNI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30038++0x1 line.word 0x00 "IPR_O_S3,Peripheral Interrupt priority register OS3" bitfld.word 0x00 4.--7. " IPR_O_S3[7:4] ,TMU3_TUNI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_O_S3[3:0] ,TMU3_TUNI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3003C++0x1 line.word 0x00 "IPR_P_S3,Peripheral Interrupt priority register PS3" bitfld.word 0x00 12.--15. " IPR_P_S3[15:12] ,TMU3_TUNI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_P_S3[7:4] ,APMU1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30040++0x1 line.word 0x00 "IPR_Q_S3,Peripheral Interrupt priority register QS3" bitfld.word 0x00 8.--11. " IPR_Q_S3[11:8] ,DU0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_Q_S3[3:0] ,VSPS priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30044++0x1 line.word 0x00 "IPR_R_S3,Peripheral Interrupt priority register RS3" bitfld.word 0x00 12.--15. " IPR_R_S3[15:12] ,VSPD0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_R_S3[11:8] ,VSPD1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_R_S3[7:4] ,IMR-LSX2_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_R_S3[3:0] ,IMR-LSX2_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30048++0x1 line.word 0x00 "IPR_S_S3,Peripheral Interrupt priority register SS3" bitfld.word 0x00 12.--15. " IPR_S_S3[15:12] ,VIN0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_S_S3[11:8] ,VIN1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_S_S3[7:4] ,VIN2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3004C++0x1 line.word 0x00 "IPR_T_S3,Peripheral Interrupt priority register TS3" bitfld.word 0x00 0.--3. " IPR_T_S3[3:0] ,IPMMU_MP priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30050++0x1 line.word 0x00 "IPR_U_S3,Peripheral Interrupt priority register US3" bitfld.word 0x00 8.--11. " IPR_U_S3[11:8] ,IPMMU_M priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_U_S3[7:4] ,FDP0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_U_S3[3:0] ,FDP1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30054++0x1 line.word 0x00 "IPR_V_S3,Peripheral Interrupt priority register VS3" bitfld.word 0x00 4.--7. " IPR_V_S3[7:4] ,IPMMU_GP priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_V_S3[3:0] ,IPMMU_GP(SEC) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30058++0x1 line.word 0x00 "IPR_W_S3,Peripheral Interrupt priority register WS3" bitfld.word 0x00 12.--15. " IPR_W_S3[15:12] ,DISCOM0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_W_S3[7:4] ,VCP3_VLC_0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_W_S3[3:0] ,VCP3_VLC_1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30060++0x1 line.word 0x00 "IPR_Y_S3,Peripheral Interrupt priority register YS3" bitfld.word 0x00 8.--11. " IPR_Y_S3[11:8] ,IPMMU_M_SEC priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30064++0x1 line.word 0x00 "IPR_Z_S3,Peripheral Interrupt priority register ZS3" bitfld.word 0x00 12.--15. " IPR_Z_S3[15:12] ,S3C (Secure) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_Z_S3[11:8] ,S3C priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_Z_S3[3:0] ,Crypto Engine 0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x30068++0x1 line.word 0x00 "IPR_AA_S3,Peripheral Interrupt priority register AAS3" bitfld.word 0x00 8.--11. " IPR_A_AS3[11:8] ,USB DDM priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_AA_S3[7:4] ,USB DMAC0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_AA_S3[3:0] ,USB DMAC1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3006C++0x1 line.word 0x00 "IPR_AB_S3,Peripheral Interrupt priority register ABS3" bitfld.word 0x00 12.--15. " IPR_A_BS3[15:12] ,USB2.0 OTG priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_AB_S3[11:8] ,USB2.0 HOST1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_AB_S3[3:0] ,USB2.0 HOST0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x3007C++0x1 line.word 0x00 "IPR_AF_S3,Peripheral Interrupt priority register AFS3" bitfld.word 0x00 4.--7. " IPR_AF_S3[7:4] ,MFIIICR1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_AF_S3[3:0] ,MFIIICR0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40000++0x1 line.word 0x00 "IPR_A_S3P,Peripheral Interrupt priority register AS3P" bitfld.word 0x00 12.--15. " IPR_A_S3P[15:12] ,SYSDMAC0_DEI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_A_S3P[11:8] ,SYSDMAC0_DEI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_A_S3P[7:4] ,SYSDMAC0_DEI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_A_S3P[3:0] ,SYSDMAC0_DEI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40004++0x1 line.word 0x00 "IPR_B_S3P,Peripheral Interrupt priority register AS3P" bitfld.word 0x00 12.--15. " IPR_B_S3P[15:12] ,SYSDMAC0_DEI4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_B_S3P[11:8] ,SYSDMAC0_DEI5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_B_S3P[7:4] ,SYSDMAC0_DEI6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_B_S3P[3:0] ,SYSDMAC0_DEI7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40008++0x1 line.word 0x00 "IPR_C_S3P,Peripheral Interrupt priority register CS3P" bitfld.word 0x00 12.--15. " IPR_C_S3P[15:12] ,SYSDMAC0_DEI8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_C_S3P[11:8] ,SYSDMAC0_DEI9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_C_S3P[7:4] ,SYSDMAC0_DEI10 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_C_S3P[3:0] ,SYSDMAC0_DEI11 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4000C++0x1 line.word 0x00 "IPR_D_S3P,Peripheral Interrupt priority register DS3P" bitfld.word 0x00 12.--15. " IPR_D_S3P[15:12] ,SYSDMAC0_DEI12 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_D_S3P[11:8] ,SYSDMAC0_DEI13 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_D_S3P[7:4] ,SYSDMAC0_DEI14 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40010++0x1 line.word 0x00 "IPR_E_S3P,Peripheral Interrupt priority register ES3P" bitfld.word 0x00 12.--15. " IPR_E_S3P[15:12] ,SYSDMAC1_DEI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E_S3P[11:8] ,SYSDMAC1_DEI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E_S3P[7:4] ,SYSDMAC1_DEI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_E_S3P[3:0] ,SYSDMAC1_DEI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40014++0x1 line.word 0x00 "IPR_F_S3P,Peripheral Interrupt priority register FS3P" bitfld.word 0x00 12.--15. " IPR_F_S3P[15:12] ,SYSDMAC1_DEI4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_F_S3P[11:8] ,SYSDMAC1_DEI5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_F_S3P[7:4] ,SYSDMAC1_DEI6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_F_S3P[3:0] ,SYSDMAC1_DEI7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40018++0x1 line.word 0x00 "IPR_G_S3P,Peripheral Interrupt priority register GS3P" bitfld.word 0x00 12.--15. " IPR_G_S3P[15:12] ,SYSDMAC1_DEI8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_G_S3P[11:8] ,SYSDMAC1_DEI9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_G_S3P[7:4] ,SYSDMAC1_DEI10 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_G_S3P[3:0] ,SYSDMAC1_DEI11 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4001C++0x1 line.word 0x00 "IPR_H_S3P,Peripheral Interrupt priority register HS3P" bitfld.word 0x00 12.--15. " IPR_H_S3P[15:12] ,SYSDMAC1_DEI12 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_H_S3P[11:8] ,SYSDMAC1_DEI13 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_H_S3P[7:4] ,SYSDMAC1_DEI14 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40020++0x1 line.word 0x00 "IPR_I_S3P,Peripheral Interrupt priority register IS3P" bitfld.word 0x00 12.--15. " IPR_I_S3P[15:12] ,ASDMAC0_DEI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_I_S3P[11:8] ,ASDMAC0_DEI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_I_S3P[7:4] ,ASDMAC0_DEI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_I_S3P[3:0] ,ASDMAC0_DEI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40024++0x1 line.word 0x00 "IPR_J_S3P,Peripheral Interrupt priority register JS3P" bitfld.word 0x00 12.--15. " IPR_J_S3P[15:12] ,ASDMAC0_DEI4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_J_S3P[11:8] ,ASDMAC0_DEI5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_J_S3P[7:4] ,ASDMAC0_DEI6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_J_S3P[3:0] ,ASDMAC0_DEI7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40028++0x1 line.word 0x00 "IPR_K_S3P,Peripheral Interrupt priority register KS3P" bitfld.word 0x00 12.--15. " IPR_K_S3P[15:12] ,ASDMAC0_DEI8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_K_S3P[11:8] ,ASDMAC0_DEI9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_K_S3P[7:4] ,ASDMAC0_DEI10 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_K_S3P[3:0] ,ASDMAC0_DEI11 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4002C++0x1 line.word 0x00 "IPR_L_S3P,Peripheral Interrupt priority register LS3P" bitfld.word 0x00 12.--15. " IPR_L_S3P[15:12] ,ASDMAC0_DEI12 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_L_S3P[11:8] ,ASDMAC0_ERR priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40040++0x1 line.word 0x00 "IPR_Q_S3P,Peripheral Interrupt priority register QS3P" bitfld.word 0x00 12.--15. " IPR_Q_S3P[15:12] ,SCU7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_Q_S3P[11:8] ,SCU6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_Q_S3P[7:4] ,SCU5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_Q_S3P[3:0] ,SCU4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40044++0x1 line.word 0x00 "IPR_R_SP3,Peripheral Interrupt priority register RS3P" bitfld.word 0x00 12.--15. " IPR_R_SP3[15:12] ,SCU3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_R_SP3[11:8] ,SCU2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_R_SP3[7:4] ,SCU51 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_R_SP3[3:0] ,SCU0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40048++0x1 line.word 0x00 "IPR_S_S3P,Peripheral Interrupt priority register SS3P" bitfld.word 0x00 12.--15. " IPR_S_S3P[15:12] ,MLM7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_S_S3P[11:8] ,MLM6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_S_S3P[7:4] ,MLM5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_S_S3P[3:0] ,MLM4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4004C++0x1 line.word 0x00 "IPR_T_S3P,Peripheral Interrupt priority register TS3P" bitfld.word 0x00 12.--15. " IPR_T_S3P[15:12] ,MLM3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_T_S3P[11:8] ,MLM2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_T_S3P[7:4] ,MLM1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_T_S3P[3:0] ,MLM0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40050++0x1 line.word 0x00 "IPR_U_S3P,Peripheral Interrupt priority register US3P" bitfld.word 0x00 12.--15. " IPR_U_S3P[15:12] ,SSI7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_U_S3P[11:8] ,SSI6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_U_S3P[7:4] ,SSI5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_U_S3P[3:0] ,SSI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40054++0x1 line.word 0x00 "IPR_V_S3P,Peripheral Interrupt priority register VS3P" bitfld.word 0x00 12.--15. " IPR_V_S3P[15:12] ,SSI3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_V_S3P[11:8] ,SSI2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_V_S3P[7:4] ,SSI1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_V_S3P[3:0] ,SSI0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40058++0x1 line.word 0x00 "IPR_W_S3P,Peripheral Interrupt priority register WS3P" bitfld.word 0x00 12.--15. " IPR_W_S3P[15:12] ,SCU9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_W_S3P[11:8] ,SCU8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_W_S3P[7:4] ,SSI9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_W_S3P[3:0] ,SSI8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4005C++0x1 line.word 0x00 "IPR_X_S3P,Peripheral Interrupt priority register XS3P" bitfld.word 0x00 8.--11. " IPR_X_S3P[11:8] ,MLP_ACSR1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_X_S3P[7:4] ,MLP_ACSR0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_X_S3P[3:0] ,MLP_M_S0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40064++0x1 line.word 0x00 "IPR_Z_S3P,Peripheral Interrupt priority register ZS3P" bitfld.word 0x00 4.--7. " IPR_Z_S3P[7:4] ,DTCP1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_Z_S3P[3:0] ,DTCP0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x40068++0x1 line.word 0x00 "IPR_AA_S3P,Peripheral Interrupt priority register AAS3P" bitfld.word 0x00 12.--15. " IPR_AA_S3P[15:12] ,SYSDMAC0_ERR priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_AA_S3P[11:8] ,SYSDMAC1_ERR priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x4006C++0x1 line.word 0x00 "IPR_AB_S3P,Peripheral Interrupt priority register ABS3P" bitfld.word 0x00 4.--7. " IPR_AB_S3P[7:4] ,IPMMUSY0(S) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_AB_S3P[3:0] ,IPMMUDS(S) priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x200++0x1 line.word 0x00 "IPR_E00_S,Peripheral Interrupt priority register e00S" bitfld.word 0x00 12.--15. " IPR_E00_S[15:12] ,IRQ0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E00_S[11:8] ,IRQ1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E00_S[7:4] ,IRQ2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_E00_S[3:0] ,IRQ3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x204++0x1 line.word 0x00 "IPR_E01_S,Peripheral Interrupt priority register e01S" bitfld.word 0x00 12.--15. " IPR_E01_S[15:12] ,GPIO0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E01_S[11:8] ,GPIO1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E01_S[7:4] ,GPIO2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_E01_S[3:0] ,GPIO3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x208++0x1 line.word 0x00 "IPR_E02_S,Peripheral Interrupt priority register e02S" bitfld.word 0x00 12.--15. " IPR_E02_S[15:12] ,GPIO4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E02_S[11:8] ,GPIO5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E02_S[7:4] ,GPIO6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x20C++0x1 line.word 0x00 "IPR_E03_S,Peripheral Interrupt priority register e03S" bitfld.word 0x00 12.--15. " IPR_E03_S[15:12] ,IRQ4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E03_S[11:8] ,IRQ5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E03_S[7:4] ,IRQ6 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_E03_S[3:0] ,IRQ7 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x210++0x1 line.word 0x00 "IPR_E04_S,Peripheral Interrupt priority register e04S" bitfld.word 0x00 12.--15. " IPR_E04_S[15:12] ,IRQ8 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E04_S[11:8] ,IRQ9 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E04_S[7:4] ,DCU priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_E04_S[3:0] ,I2C4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x214++0x1 line.word 0x00 "IPR_E05_S,Peripheral Interrupt priority register e05S" bitfld.word 0x00 12.--15. " IPR_E05_S[15:12] ,I2C5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E05_S[11:8] ,HSCIF2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E05_S[7:4] ,SCIF2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_E05_S[3:0] ,SCIF3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x218++0x1 line.word 0x00 "IPR_E06_S,Peripheral Interrupt priority register e06S" bitfld.word 0x00 12.--15. " IPR_E06_S[15:12] ,SCIF4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E06_S[11:8] ,SCIF5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x21C++0x1 line.word 0x00 "IPR_E07_S,Peripheral Interrupt priority register e07S" bitfld.word 0x00 12.--15. " IPR_E07_S[15:12] ,DISCOM1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E07_S[11:8] ,SCIFA3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E07_S[7:4] ,SCIFA4 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_E07_S[3:0] ,SCIFA5 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" group.word 0x220++0x1 line.word 0x00 "IPR_E08_S,Peripheral Interrupt priority register e08S" bitfld.word 0x00 12.--15. " IPR_E08_S[15:12] ,DRIF0 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 8.--11. " IPR_E08_S[11:8] ,DRIF1 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 4.--7. " IPR_E08_S[7:4] ,DRIF2 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" bitfld.word 0x00 0.--3. " IPR_E08_S[3:0] ,DRIF3 priority level" "Masked,Lowest,2,3,4,5,6,7,8,9,10,11,12,13,14,Highest" tree.end width 13. tree "Peripheral Interrupt Mask Registers" group.byte 0x84++0x0 line.byte 0x00 "IMR_1_S,Peripheral Interrupt mask register 1S" bitfld.byte 0x00 3. " IMR_1_S[3] ,SDHIO3 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_1_S[2] ,SDHIO2 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_1_S[0] ,SDHIO0 Interrupt mask" "Not masked,Masked" group.byte 0x88++0x0 line.byte 0x00 "IMR_2_S,Peripheral Interrupt mask register 2S" bitfld.byte 0x00 7. " IMR_2_S[7] ,IEBUS Interrupt mask" "Not masked,Masked" group.byte 0x8C++0x0 line.byte 0x00 "IMR_3_S,Peripheral Interrupt mask register 3S" bitfld.byte 0x00 4. " IMR_3_S[4] ,2DDM0 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_3_S[3] ,DARC Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR_3_S[1] ,Sec Up Timer Interrupt mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_3_S[0] ,Sec Timer Interrupt mask" "Not masked,Masked" group.byte 0x90++0x0 line.byte 0x00 "IMR_4_S,Peripheral Interrupt mask register 4S" bitfld.byte 0x00 5. " IMR_4_S[5] ,TPU0 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR_4_S[4] ,CoreSight Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_4_S[3] ,JPU Interrupt mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_4_S[0] ,MMC0 Interrupt mask" "Not masked,Masked" group.byte 0x98++0x0 line.byte 0x00 "IMR_6_S,Peripheral Interrupt mask register 6S" bitfld.byte 0x00 3. " IMR_6_S[3] ,SGX-3DG Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_6_S[5] ,Speed-pulse I/F Interrupt mask" "Not masked,Masked" group.byte 0x9C++0x0 line.byte 0x00 "IMR_7_S,Peripheral Interrupt mask register 7S" bitfld.byte 0x00 6. " IMR_7_S[6] ,TMU1_TUNI2 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_7_S[5] ,TMU1_TUNI1 Interrupt mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_7_S[4] ,TMU1_TUNI0 Interrupt mask" "Not masked,Masked" group.byte 0xA0++0x0 line.byte 0x00 "IMR_8_S,Peripheral Interrupt mask register 8S" bitfld.byte 0x00 2. " IMR_8_S[2] ,TMU0_TUNI1 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR_8_S[1] ,TMU0_TUNI2 Interrupt mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_8_S[0] ,TMU0_TUNI0 Interrupt mask" "Not masked,Masked" group.byte 0xA4++0x0 line.byte 0x00 "IMR_9_S,Peripheral Interrupt mask register 9S" bitfld.byte 0x00 7. " IMR_9_S[7] ,SWDT0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_9_S[6] ,RWDT0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_9_S[5] ,CMT0_1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_9_S[4] ,CMT0_0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_9_S[2] ,IIC1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR_9_S[1] ,I2C2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_9_S[0] ,I2C1 Interrupt Mask" "Not masked,Masked" group.byte 0xA8++0x0 line.byte 0x00 "IMR_10_S,Peripheral Interrupt mask register 10S" bitfld.byte 0x00 7. " IMR_10_S[7] ,IPMMU(DS)" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_10_S[6] ,IPMMU(SYS1)" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_10_S[5] ,IPMMU(SYS0)" "Not masked,Masked" group.byte 0xAC++0x0 line.byte 0x00 "IMR_11_S,Peripheral Interrupt mask register 11S" bitfld.byte 0x00 7. " IMR_11_S[7] ,IIC0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_11_S[6] ,I2C0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR_11_S[4] ,I2C3 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 2. " IMR_11_S[2] ,TSIF1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_11_S[0] ,TSIF0 Interrupt Mask" "Not masked,Masked" group.byte 0xB0++0x0 line.byte 0x00 "IMR_12_S,Peripheral Interrupt mask register 12S" bitfld.byte 0x00 1. " IMR_12_S[1] ,CAN1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_12_S[0] ,CAN0 Interrupt Mask" "Not masked,Masked" group.byte 0x30080++0x0 line.byte 0x00 "IMR_0_S3,Peripheral Interrupt mask register 0S3" bitfld.byte 0x00 7. " IMR_0_S3[7] ,SCIF0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_0_S3[6] ,SCIF1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_0_S3[5] ,HSCIF0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_0_S3[4] ,HSCIF1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_0_S3[3] ,TMU1_TUNI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_0_S3[2] ,TMU2_TUNI3 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_0_S3[0] ,SYSC Interrupt Mask" "Not masked,Masked" group.byte 0x30084++0x0 line.byte 0x00 "IMR_1_S3,Peripheral Interrupt mask register 1S3" bitfld.byte 0x00 7. " IMR_1_S3[7] ,QSPI Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_1_S3[5] ,ETHER Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_1_S3[4] ,CPGA0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_1_S3[3] ,SCIFA0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_1_S3[2] ,SCIFA1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_1_S3[1] ,SCIFA2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_1_S3[0] ,APMU0 Interrupt Mask" "Not masked,Masked" group.byte 0x30088++0x0 line.byte 0x00 "IMR_2_S3,Peripheral Interrupt mask register 2S3" bitfld.byte 0x00 7. " IMR_2_S3[7] ,SCIFB0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_2_S3[6] ,SCIFB1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_2_S3[5] ,SCIFB2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_2_S3[4] ,AVB Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_2_S3[3] ,CMT1_0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_2_S3[2] ,CMT1_1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_2_S3[1] ,CMT1_2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_2_S3[0] ,CMT1_3 Interrupt Mask" "Not masked,Masked" group.byte 0x3008C++0x0 line.byte 0x00 "IMR_3_S3,Peripheral Interrupt mask register 3S3" bitfld.byte 0x00 7. " IMR_3_S3[7] ,CMT1_4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_3_S3[6] ,CMT1_5 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_3_S3[5] ,CMT1_6 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_3_S3[4] ,CMT1_7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_3_S3[3] ,MSOF0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_3_S3[2] ,MSOF1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_3_S3[1] ,MSOF2 Interrupt Mask" "Not masked,Masked" group.byte 0x30094++0x0 line.byte 0x00 "IMR_5_S3,Peripheral Interrupt mask register 5S3" bitfld.byte 0x00 7. " IMR_5_S3[7] ,ADSP Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_5_S3[3] ,DU1 Interrupt Mask" "Not masked,Masked" group.byte 0x30098++0x0 line.byte 0x00 "IMR_6_S3,Peripheral Interrupt mask register 6S3" bitfld.byte 0x00 7. " IMR_6_S3[7] ,LBSC-WT0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_6_S3[6] ,LBSC-ATA Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_6_S3[5] ,LBSC-DMAC0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_6_S3[4] ,LBSC-DMAC1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_6_S3[3] ,LBSC-DMAC2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_6_S3[2] ,TMU2_TUNI0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_6_S3[1] ,TMU2_TUNI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_6_S3[0] ,TMU2_TUNI2 Interrupt Mask" "Not masked,Masked" group.byte 0x3009C++0x0 line.byte 0x00 "IMR_7_S3,Peripheral Interrupt mask register 7S3" bitfld.byte 0x00 7. " IMR_7_S3[7] ,MFIS Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_7_S3[6] ,CPORTS2R Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_7_S3[5] ,TMU3_TUNI0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_7_S3[4] ,TMU3_TUNI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_7_S3[3] ,TMU3_TUNI2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_7_S3[2] ,Thermal Sensor Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_7_S3[1] ,CPG Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_7_S3[0] ,DRC Interrupt Mask" "Not masked,Masked" group.byte 0x300A0++0x0 line.byte 0x00 "IMR_8_S3,Peripheral Interrupt mask register 8S3" bitfld.byte 0x00 6. " IMR_8_S3[6] ,DU0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR_8_S3[4] ,VSP Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_8_S3[3] ,VSPD0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 2. " IMR_8_S3[2] ,VSPD1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR_8_S3[1] ,IMR-LSX0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_8_S3[0] ,IMR-LSX1 Interrupt Mask" "Not masked,Masked" group.byte 0x300A4++0x0 line.byte 0x00 "IMR_9_S3,Peripheral Interrupt mask register 9S3" bitfld.byte 0x00 7. " IMR_9_S3[7] ,VIN0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_9_S3[6] ,VIN1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_9_S3[5] ,VIN2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_9_S3[0] ,IPMMU_MP Interrupt Mask" "Not masked,Masked" group.byte 0x300A8++0x0 line.byte 0x00 "IMR_10_S3,Peripheral Interrupt mask register 10S3" bitfld.byte 0x00 6. " IMR_10_S3[6] ,IPMMU_M Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_10_S3[5] ,FDP0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR_10_S3[4] ,FDP1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_10_S3[1] ,IPMMU_GP Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_10_S3[0] ,IPMMU_GP(SEC) Interrupt Mask" "Not masked,Masked" group.byte 0x300AC++0x0 line.byte 0x00 "IMR_11_S3,Peripheral Interrupt mask register 11S3" bitfld.byte 0x00 5. " IMR_11_S3[5] ,VCP3_VLC_0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR_11_S3[4] ,VCP3_CE_0 Interrupt Mask" "Not masked,Masked" group.byte 0x300B0++0x0 line.byte 0x00 "IMR_12_S3,Peripheral Interrupt mask register 12S3" bitfld.byte 0x00 6. " IMR_12_S3[6] ,IPMMU_M_SEC Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_12_S3[3] ,S3C (Secure) Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_12_S3[2] ,S3C Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_12_S3[0] ,Crypto Engine 0 Interrupt Mask" "Not masked,Masked" group.byte 0x300B4++0x0 line.byte 0x00 "IMR_13_S3,Peripheral Interrupt mask register 13S3" bitfld.byte 0x00 6. " IMR_13_S3[6] ,USB DDM Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_13_S3[5] ,USB DMAC 1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 4. " IMR_13_S3[4] ,USB DMAC 0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 3. " IMR_13_S3[3] ,USB2.0 OTG Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_13_S3[2] ,USB2.0 HOST1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_13_S3[0] ,USB2.0 HOST0 Interrupt Mask" "Not masked,Masked" group.byte 0x300BC++0x0 line.byte 0x00 "IMR_15_S3,Peripheral Interrupt mask register 15S3" bitfld.byte 0x00 1. " IMR_15_S3[1] ,MFIS-IICR1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_15_S3[0] ,MFIS-IICR0 Interrupt Mask" "Not masked,Masked" group.byte 0x40080++0x0 line.byte 0x00 "IMR_0_S3P,Peripheral Interrupt mask register 0S3P" bitfld.byte 0x00 7. " IMR_0_S3P[7] ,SYSDMAC0_DEI0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_0_S3P[6] ,SYSDMAC0_DEI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_0_S3P[5] ,SYSDMAC0_DEI2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_0_S3P[4] ,SYSDMAC0_DEI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_0_S3P[3] ,SYSDMAC0_DEI4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_0_S3P[2] ,SYSDMAC0_DEI5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_0_S3P[1] ,SYSDMAC0_DEI6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_0_S3P[0] ,SYSDMAC0_DEI7 Interrupt Mask" "Not masked,Masked" group.byte 0x40084++0x0 line.byte 0x00 "IMR_1_S3P,Peripheral Interrupt mask register 1S3P" bitfld.byte 0x00 7. " IMR_1_S3P[7] ,SYSDMAC0_DEI8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_1_S3P[6] ,SYSDMAC0_DEI9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_1_S3P[5] ,SYSDMAC0_DEI10 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_1_S3P[4] ,SYSDMAC0_DEI11 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_1_S3P[3] ,SYSDMAC0_DEI12 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_1_S3P[2] ,SYSDMAC0_DEI13 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_1_S3P[1] ,SYSDMAC0_DEI14 Interrupt Mask" "Not masked,Masked" group.byte 0x40088++0x0 line.byte 0x00 "IMR_2_S3P,Peripheral Interrupt mask register 2S3P" bitfld.byte 0x00 7. " IMR_2_S3P[7] ,SYSDMAC1_DEI0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_2_S3P[6] ,SYSDMAC1_DEI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_2_S3P[5] ,SYSDMAC1_DEI2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_2_S3P[4] ,SYSDMAC1_DEI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_2_S3P[3] ,SYSDMAC1_DEI4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_2_S3P[2] ,SYSDMAC1_DEI5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_2_S3P[1] ,SYSDMAC1_DEI6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_2_S3P[0] ,SYSDMAC1_DEI7 Interrupt Mask" "Not masked,Masked" group.byte 0x4008C++0x0 line.byte 0x00 "IMR_3_S3P,Peripheral Interrupt mask register 3S3P" bitfld.byte 0x00 7. " IMR_3_S3P[7] ,SYSDMAC1_DEI8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_3_S3P[6] ,SYSDMAC1_DEI9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_3_S3P[5] ,SYSDMAC1_DEI10 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_3_S3P[4] ,SYSDMAC1_DEI11 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_3_S3P[3] ,SYSDMAC1_DEI12 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_3_S3P[2] ,SYSDMAC1_DEI13 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_3_S3P[1] ,SYSDMAC1_DEI14 Interrupt Mask" "Not masked,Masked" group.byte 0x40090++0x0 line.byte 0x00 "IMR_4_S3P,Peripheral Interrupt mask register 4S3P" bitfld.byte 0x00 7. " IMR_4_S3P[7] ,ASDMAC0_DEI0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_4_S3P[6] ,ASDMAC0_DEI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_4_S3P[5] ,ASDMAC0_DEI2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_4_S3P[4] ,ASDMAC0_DEI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_4_S3P[3] ,ASDMAC0_DEI4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_4_S3P[2] ,ASDMAC0_DEI5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_4_S3P[1] ,ASDMAC0_DEI6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_4_S3P[0] ,ASDMAC0_DEI7 Interrupt Mask" "Not masked,Masked" group.byte 0x40094++0x0 line.byte 0x00 "IMR_5_S3P,Peripheral Interrupt mask register 5S3P" bitfld.byte 0x00 7. " IMR_5_S3P[7] ,ASDMAC0_DEI8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_5_S3P[6] ,ASDMAC0_DEI9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_5_S3P[5] ,ASDMAC0_DEI10 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_5_S3P[4] ,ASDMAC0_DEI11 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_5_S3P[3] ,ASDMAC0_DEI12 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_5_S3P[2] ,ASDMAC0_ERR Interrupt Mask" "Not masked,Masked" group.byte 0x400A0++0x0 line.byte 0x00 "IMR_8_S3P,Peripheral Interrupt mask register 8S3P" bitfld.byte 0x00 7. " IMR_8_S3P[7] ,SCU7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_8_S3P[6] ,SCU6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_8_S3P[5] ,SCU5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_8_S3P[4] ,SCU4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_8_S3P[3] ,SCU3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_8_S3P[2] ,SCU2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_8_S3P[1] ,SCU1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_8_S3P[0] ,SCU0 Interrupt Mask" "Not masked,Masked" group.byte 0x400A4++0x0 line.byte 0x00 "IMR_9_S3P,Peripheral Interrupt mask register 9S3P" bitfld.byte 0x00 7. " IMR_9_S3P[7] ,MLM7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_9_S3P[6] ,MLM6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_9_S3P[5] ,MLM5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_9_S3P[4] ,MLM4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_9_S3P[3] ,MLM3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_9_S3P[2] ,MLM2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_9_S3P[1] ,MLM1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_9_S3P[0] ,MLM0 Interrupt Mask" "Not masked,Masked" group.byte 0x400A8++0x0 line.byte 0x00 "IMR_10_S3P,Peripheral Interrupt mask register 10S3P" bitfld.byte 0x00 7. " IMR_10_S3P[7] ,SSI7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_10_S3P[6] ,SSI6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_10_S3P[5] ,SSI5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_10_S3P[4] ,SSI4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_10_S3P[3] ,SSI3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_10_S3P[2] ,SSI2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_10_S3P[1] ,SSI1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_10_S3P[0] ,SSI0 Interrupt Mask" "Not masked,Masked" group.byte 0x400AC++0x0 line.byte 0x00 "IMR_11_S3P,Peripheral Interrupt mask register 11S3P" bitfld.byte 0x00 7. " IMR_11_S3P[7] ,SCU9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_11_S3P[6] ,SCU8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_11_S3P[5] ,SSI9 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_11_S3P[4] ,SSI8 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_11_S3P[2] ,MLP_ACSR1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR_11_S3P[1] ,MLP_ACSR0 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_11_S3P[0] ,MLP_M_S0 Interrupt Mask" "Not masked,Masked" group.byte 0x400B0++0x0 line.byte 0x00 "IMR_12_S3P,Peripheral Interrupt mask register 12S3P" bitfld.byte 0x00 1. " IMR_12_S3P[1] ,DTCP1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_12_S3P[0] ,DTCP0 Interrupt Mask" "Not masked,Masked" group.byte 0x400B4++0x0 line.byte 0x00 "IMR_13_S3P,Peripheral Interrupt mask register 13S3P" bitfld.byte 0x00 7. " IMR_13_S3P[7] ,SYSDMAC0_ERR Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_13_S3P[6] ,SYSDMAC1_ERR Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR_13_S3P[1] ,IPMMUSY0(S) Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_13_S3P[0] ,IPMMUDS(S) Interrupt Mask" "Not masked,Masked" group.byte 0x280++0x0 line.byte 0x00 "IMR_E00_S,Peripheral Interrupt mask register e00S" bitfld.byte 0x00 7. " IMR_E00_S[7] ,GPIO3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_E00_S[6] ,GPIO2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_E00_S[5] ,GPIO1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_E00_S[4] ,GPIO0 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_E00_S[3] ,IRQ3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_E00_S[2] ,IRQ2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_E00_S[1] ,IRQ1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_E00_S[0] ,IRQ0 Interrupt Mask" "Not masked,Masked" group.byte 0x284++0x0 line.byte 0x00 "IMR_E01_S,Peripheral Interrupt mask register e01S" bitfld.byte 0x00 7. " IMR_E01_S[7] ,IRQ7 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_E01_S[6] ,IRQ6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_E01_S[5] ,IRQ5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_E01_S[4] ,IRQ4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_E01_S[2] ,GPIO6 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR_E01_S[1] ,GPIO5 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_E01_S[0] ,GPIO4 Interrupt Mask" "Not masked,Masked" group.byte 0x288++0x0 line.byte 0x00 "IMR_E02_S,Peripheral Interrupt mask register e02S" bitfld.byte 0x00 7. " IMR_E02_S[7] ,SCIF3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_E02_S[6] ,SCIF2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_E02_S[5] ,HSCIF2 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_E02_S[4] ,I2C5 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 3. " IMR_E02_S[3] ,I2C4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_E02_S[2] ,DCU Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 1. " IMR_E02_S[1] ,IRQ9 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_E02_S[0] ,IRQ8 Interrupt Mask" "Not masked,Masked" group.byte 0x28C++0x0 line.byte 0x00 "IMR_E03_S,Peripheral Interrupt mask register e03S" bitfld.byte 0x00 7. " IMR_E03_S[7] ,SCIFA5 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 6. " IMR_E03_S[6] ,SCIFA4 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 5. " IMR_E03_S[5] ,SCIFA3 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 4. " IMR_E03_S[4] ,DISCOM1 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR_E03_S[1] ,SCIF5 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 0. " IMR_E03_S[0] ,SCIF4 Interrupt Mask" "Not masked,Masked" group.byte 0x290++0x0 line.byte 0x00 "IMR_E04_S,Peripheral Interrupt mask register e04S" bitfld.byte 0x00 3. " IMR_E04_S[3] ,DRIF3 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 2. " IMR_E04_S[2] ,DRIF2 Interrupt Mask" "Not masked,Masked" bitfld.byte 0x00 1. " IMR_E04_S[1] ,DRIF1 Interrupt Mask" "Not masked,Masked" textline " " bitfld.byte 0x00 0. " IMR_E04_S[0] ,DRIF0 Interrupt Mask" "Not masked,Masked" tree.end tree "Peripheral Interrupt Mask Clear Registers" wgroup.byte 0xC4++0x0 line.byte 0x00 "IMCR_1_S,Peripheral Interrupt mask clear register 1S" bitfld.byte 0x00 3. " IMCR_1_S[3] ,SDHIO3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_1_S[2] ,SDHIO2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_1_S[0] ,SDHIO0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xC8++0x0 line.byte 0x00 "IMCR_2_S,Peripheral Interrupt mask clear register 2S" bitfld.byte 0x00 7. " IMCR_2_S[7] ,IEBUS Interrupt mask clear" "No effect,Clear" wgroup.byte 0xCC++0x0 line.byte 0x00 "IMCR_3_S,Peripheral Interrupt mask clear register 3S" bitfld.byte 0x00 4. " IMCR_3_S[4] ,2DDM0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_3_S[3] ,DARC Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR_3_S[1] ,Sec Up Timer Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_3_S[0] ,Sec Timer Interrupt mask clear" "No effect,Clear" wgroup.byte 0xD0++0x0 line.byte 0x00 "IMCR_4_S,Peripheral Interrupt mask clear register 4S" bitfld.byte 0x00 5. " IMCR_4_S[5] ,TPU0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR_4_S[4] ,CoreSight Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_4_S[3] ,JPU Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_4_S[0] ,MMC0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xD8++0x0 line.byte 0x00 "IMCR_6_S,Peripheral Interrupt mask clear register 6S" bitfld.byte 0x00 3. " IMCR_6_S[3] ,SGX-3DG Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_6_S[5] ,Speed-pulse I/F Interrupt mask clear" "No effect,Clear" wgroup.byte 0xDC++0x0 line.byte 0x00 "IMCR_7_S,Peripheral Interrupt mask clear register 7S" bitfld.byte 0x00 6. " IMCR_7_S[6] ,TMU1_TUNI2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_7_S[5] ,TMU1_TUNI1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_7_S[4] ,TMU1_TUNI0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xE0++0x0 line.byte 0x00 "IMCR_8_S,Peripheral Interrupt mask clear register 8S" bitfld.byte 0x00 2. " IMCR_8_S[2] ,TMU0_TUNI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR_8_S[1] ,TMU0_TUNI2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_8_S[0] ,TMU0_TUNI0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xE4++0x0 line.byte 0x00 "IMCR_9_S,Peripheral Interrupt mask clear register 9S" bitfld.byte 0x00 7. " IMCR_9_S[7] ,SWDT0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_9_S[6] ,RWDT0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_9_S[5] ,CMT0_1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_9_S[4] ,CMT0_0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_9_S[2] ,IIC1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR_9_S[1] ,I2C2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_9_S[0] ,I2C1 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xE8++0x0 line.byte 0x00 "IMCR_10_S,Peripheral Interrupt mask clear register 10S" bitfld.byte 0x00 7. " IMCR_10_S[7] ,IPMMU(DS)" "Not masked,Masked" bitfld.byte 0x00 6. " IMCR_10_S[6] ,IPMMU(SYS1)" "Not masked,Masked" bitfld.byte 0x00 5. " IMCR_10_S[5] ,IPMMU(SYS0)" "Not masked,Masked" wgroup.byte 0xEC++0x0 line.byte 0x00 "IMCR_11_S,Peripheral Interrupt mask clear register 11S" bitfld.byte 0x00 7. " IMCR_11_S[7] ,IIC0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_11_S[6] ,I2C0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR_11_S[4] ,I2C3 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 2. " IMCR_11_S[2] ,TSIF1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_11_S[0] ,TSIF0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0xF0++0x0 line.byte 0x00 "IMCR_12_S,Peripheral Interrupt mask clear register 12S" bitfld.byte 0x00 1. " IMCR_12_S[1] ,CAN1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_12_S[0] ,CAN0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300C0++0x0 line.byte 0x00 "IMCR_0_S3,Peripheral Interrupt mask clear register 0S3" bitfld.byte 0x00 7. " IMCR_0_S3[7] ,SCIF0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_0_S3[6] ,SCIF1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_0_S3[5] ,HSCIF0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_0_S3[4] ,HSCIF1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_0_S3[3] ,TMU1_TUNI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_0_S3[2] ,TMU2_TUNI3 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_0_S3[0] ,SYSC Interrupt mask clear" "No effect,Clear" wgroup.byte 0X300C4++0x0 line.byte 0x00 "IMCR_1_S3,Peripheral Interrupt mask clear register 1S3" bitfld.byte 0x00 7. " IMCR_1_S3[7] ,QSPI Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_1_S3[5] ,ETHER Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_1_S3[4] ,CPGA0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_1_S3[3] ,SCIFA0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_1_S3[2] ,SCIFA1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_1_S3[1] ,SCIFA2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_1_S3[0] ,APMU0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0X300C8++0x0 line.byte 0x00 "IMCR_2_S3,Peripheral Interrupt mask clear register 2S3" bitfld.byte 0x00 7. " IMCR_2_S3[7] ,SCIFB0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_2_S3[6] ,SCIFB1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_2_S3[5] ,SCIFB2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_2_S3[4] ,AVB Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_2_S3[3] ,CMT1_0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_2_S3[2] ,CMT1_1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_2_S3[1] ,CMT1_2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_2_S3[0] ,CMT1_3 Interrupt mask clear" "No effect,Clear" wgroup.byte 0X300CC++0x0 line.byte 0x00 "IMCR_3_S3,Peripheral Interrupt mask clear register 3S3" bitfld.byte 0x00 7. " IMCR_3_S3[7] ,CMT1_4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_3_S3[6] ,CMT1_5 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_3_S3[5] ,CMT1_6 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_3_S3[4] ,CMT1_7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_3_S3[3] ,MSOF0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_3_S3[2] ,MSOF1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_3_S3[1] ,MSOF2 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300D4++0x0 line.byte 0x00 "IMCR_5_S3,Peripheral Interrupt mask clear register 5S3" bitfld.byte 0x00 7. " IMCR_5_S3[7] ,ADSP Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_5_S3[3] ,DU1 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300D8++0x0 line.byte 0x00 "IMCR_6_S3,Peripheral Interrupt mask clear register 6S3" bitfld.byte 0x00 7. " IMCR_6_S3[7] ,LBSC-WT0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_6_S3[6] ,LBSC-ATA Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_6_S3[5] ,LBSC-DMAC0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_6_S3[4] ,LBSC-DMAC1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_6_S3[3] ,LBSC-DMAC2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_6_S3[2] ,TMU2_TUNI0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_6_S3[1] ,TMU2_TUNI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_6_S3[0] ,TMU2_TUNI2 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300DC++0x0 line.byte 0x00 "IMCR_7_S3,Peripheral Interrupt mask clear register 7S3" bitfld.byte 0x00 7. " IMCR_7_S3[7] ,MFIS Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_7_S3[6] ,CPORTS2R Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_7_S3[5] ,TMU3_TUNI0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_7_S3[4] ,TMU3_TUNI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_7_S3[3] ,TMU3_TUNI2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_7_S3[2] ,Thermal Sensor Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_7_S3[1] ,CPG Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_7_S3[0] ,DRC Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300E0++0x0 line.byte 0x00 "IMCR_8_S3,Peripheral Interrupt mask clear register 8S3" bitfld.byte 0x00 6. " IMCR_8_S3[6] ,DU0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR_8_S3[4] ,VSP Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_8_S3[3] ,VSPD0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 2. " IMCR_8_S3[2] ,VSPD1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR_8_S3[1] ,IMCR-LSX0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_8_S3[0] ,IMCR-LSX1 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300E4++0x0 line.byte 0x00 "IMCR_9_S3,Peripheral Interrupt mask clear register 9S3" bitfld.byte 0x00 7. " IMCR_9_S3[7] ,VIN0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_9_S3[6] ,VIN1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_9_S3[5] ,VIN2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_9_S3[0] ,IPMMU_MP Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300E8++0x0 line.byte 0x00 "IMCR_10_S3,Peripheral Interrupt mask clear register 10S3" bitfld.byte 0x00 6. " IMCR_10_S3[6] ,IPMMU_M Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_10_S3[5] ,FDP0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR_10_S3[4] ,FDP1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_10_S3[1] ,IPMMU_GP Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_10_S3[0] ,IPMMU_GP(SEC) Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300EC++0x0 line.byte 0x00 "IMCR_11_S3,Peripheral Interrupt mask clear register 11S3" bitfld.byte 0x00 5. " IMCR_11_S3[5] ,VCP3_VLC_0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR_11_S3[4] ,VCP3_CE_0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300F0++0x0 line.byte 0x00 "IMCR_12_S3,Peripheral Interrupt mask clear register 12S3" bitfld.byte 0x00 6. " IMCR_12_S3[6] ,IPMMU_M_SEC Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_12_S3[3] ,S3C (Secure) Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_12_S3[2] ,S3C Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_12_S3[0] ,Crypto Engine 0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300F4++0x0 line.byte 0x00 "IMCR_13_S3,Peripheral Interrupt mask clear register 13S3" bitfld.byte 0x00 6. " IMCR_13_S3[6] ,USB DDM Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_13_S3[5] ,USB DMAC 1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 4. " IMCR_13_S3[4] ,USB DMAC 0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 3. " IMCR_13_S3[3] ,USB2.0 OTG Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_13_S3[2] ,USB2.0 HOST1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_13_S3[0] ,USB2.0 HOST0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x300FC++0x0 line.byte 0x00 "IMCR_15_S3,Peripheral Interrupt mask clear register 15S3" bitfld.byte 0x00 1. " IMCR_15_S3[1] ,MFIS-IICR1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_15_S3[0] ,MFIS-IICR0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400C0++0x0 line.byte 0x00 "IMCR_0_S3P,Peripheral Interrupt mask clear register 0S3P" bitfld.byte 0x00 7. " IMCR_0_S3P[7] ,SYSDMAC0_DEI0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_0_S3P[6] ,SYSDMAC0_DEI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_0_S3P[5] ,SYSDMAC0_DEI2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_0_S3P[4] ,SYSDMAC0_DEI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_0_S3P[3] ,SYSDMAC0_DEI4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_0_S3P[2] ,SYSDMAC0_DEI5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_0_S3P[1] ,SYSDMAC0_DEI6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_0_S3P[0] ,SYSDMAC0_DEI7 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400C4++0x0 line.byte 0x00 "IMCR_1_S3P,Peripheral Interrupt mask clear register 1S3P" bitfld.byte 0x00 7. " IMCR_1_S3P[7] ,SYSDMAC0_DEI8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_1_S3P[6] ,SYSDMAC0_DEI9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_1_S3P[5] ,SYSDMAC0_DEI10 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_1_S3P[4] ,SYSDMAC0_DEI11 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_1_S3P[3] ,SYSDMAC0_DEI12 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_1_S3P[2] ,SYSDMAC0_DEI13 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_1_S3P[1] ,SYSDMAC0_DEI14 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400C8++0x0 line.byte 0x00 "IMCR_2_S3P,Peripheral Interrupt mask clear register 2S3P" bitfld.byte 0x00 7. " IMCR_2_S3P[7] ,SYSDMAC1_DEI0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_2_S3P[6] ,SYSDMAC1_DEI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_2_S3P[5] ,SYSDMAC1_DEI2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_2_S3P[4] ,SYSDMAC1_DEI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_2_S3P[3] ,SYSDMAC1_DEI4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_2_S3P[2] ,SYSDMAC1_DEI5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_2_S3P[1] ,SYSDMAC1_DEI6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_2_S3P[0] ,SYSDMAC1_DEI7 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400CC++0x0 line.byte 0x00 "IMCR_3_S3P,Peripheral Interrupt mask clear register 3S3P" bitfld.byte 0x00 7. " IMCR_3_S3P[7] ,SYSDMAC1_DEI8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_3_S3P[6] ,SYSDMAC1_DEI9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_3_S3P[5] ,SYSDMAC1_DEI10 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_3_S3P[4] ,SYSDMAC1_DEI11 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_3_S3P[3] ,SYSDMAC1_DEI12 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_3_S3P[2] ,SYSDMAC1_DEI13 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_3_S3P[1] ,SYSDMAC1_DEI14 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400D0++0x0 line.byte 0x00 "IMCR_4_S3P,Peripheral Interrupt mask clear register 4S3P" bitfld.byte 0x00 7. " IMCR_4_S3P[7] ,ASDMAC0_DEI0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_4_S3P[6] ,ASDMAC0_DEI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_4_S3P[5] ,ASDMAC0_DEI2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_4_S3P[4] ,ASDMAC0_DEI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_4_S3P[3] ,ASDMAC0_DEI4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_4_S3P[2] ,ASDMAC0_DEI5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_4_S3P[1] ,ASDMAC0_DEI6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_4_S3P[0] ,ASDMAC0_DEI7 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400D4++0x0 line.byte 0x00 "IMCR_5_S3P,Peripheral Interrupt mask clear register 5S3P" bitfld.byte 0x00 7. " IMCR_5_S3P[7] ,ASDMAC0_DEI8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_5_S3P[6] ,ASDMAC0_DEI9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_5_S3P[5] ,ASDMAC0_DEI10 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_5_S3P[4] ,ASDMAC0_DEI11 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_5_S3P[3] ,ASDMAC0_DEI12 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_5_S3P[2] ,ASDMAC0_ERR Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400E0++0x0 line.byte 0x00 "IMCR_8_S3P,Peripheral Interrupt mask clear register 8S3P" bitfld.byte 0x00 7. " IMCR_8_S3P[7] ,SCU7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_8_S3P[6] ,SCU6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_8_S3P[5] ,SCU5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_8_S3P[4] ,SCU4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_8_S3P[3] ,SCU3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_8_S3P[2] ,SCU2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_8_S3P[1] ,SCU1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_8_S3P[0] ,SCU0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400E4++0x0 line.byte 0x00 "IMCR_9_S3P,Peripheral Interrupt mask clear register 9S3P" bitfld.byte 0x00 7. " IMCR_9_S3P[7] ,MLM7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_9_S3P[6] ,MLM6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_9_S3P[5] ,MLM5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_9_S3P[4] ,MLM4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_9_S3P[3] ,MLM3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_9_S3P[2] ,MLM2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_9_S3P[1] ,MLM1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_9_S3P[0] ,MLM0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400E8++0x0 line.byte 0x00 "IMCR_10_S3P,Peripheral Interrupt mask clear register 10S3P" bitfld.byte 0x00 7. " IMCR_10_S3P[7] ,SSI7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_10_S3P[6] ,SSI6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_10_S3P[5] ,SSI5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_10_S3P[4] ,SSI4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_10_S3P[3] ,SSI3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_10_S3P[2] ,SSI2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_10_S3P[1] ,SSI1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_10_S3P[0] ,SSI0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400EC++0x0 line.byte 0x00 "IMCR_11_S3P,Peripheral Interrupt mask clear register 11S3P" bitfld.byte 0x00 7. " IMCR_11_S3P[7] ,SCU9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_11_S3P[6] ,SCU8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_11_S3P[5] ,SSI9 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_11_S3P[4] ,SSI8 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_11_S3P[2] ,MLP_ACSR1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR_11_S3P[1] ,MLP_ACSR0 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_11_S3P[0] ,MLP_M_S0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400F0++0x0 line.byte 0x00 "IMCR_12_S3P,Peripheral Interrupt mask clear register 12S3P" bitfld.byte 0x00 1. " IMCR_12_S3P[1] ,DTCP1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_12_S3P[0] ,DTCP0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x400F4++0x0 line.byte 0x00 "IMCR_13_S3P,Peripheral Interrupt mask clear register 13S3P" bitfld.byte 0x00 7. " IMCR_13_S3P[7] ,SYSDMAC0_ERR Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_13_S3P[6] ,SYSDMAC1_ERR Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR_13_S3P[1] ,IPMMUSY0(S) Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_13_S3P[0] ,IPMMUDS(S) Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2C0++0x0 line.byte 0x00 "IMCR_E00_S,Peripheral Interrupt mask clear register e00S" bitfld.byte 0x00 7. " IMCR_E00_S[7] ,GPIO3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_E00_S[6] ,GPIO2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_E00_S[5] ,GPIO1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_E00_S[4] ,GPIO0 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_E00_S[3] ,IRQ3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_E00_S[2] ,IRQ2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_E00_S[1] ,IRQ1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_E00_S[0] ,IRQ0 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2C4++0x0 line.byte 0x00 "IMCR_E01_S,Peripheral Interrupt mask clear register e01S" bitfld.byte 0x00 7. " IMCR_E01_S[7] ,IRQ7 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_E01_S[6] ,IRQ6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_E01_S[5] ,IRQ5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_E01_S[4] ,IRQ4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_E01_S[2] ,GPIO6 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR_E01_S[1] ,GPIO5 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_E01_S[0] ,GPIO4 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2C8++0x0 line.byte 0x00 "IMCR_E02_S,Peripheral Interrupt mask clear register e02S" bitfld.byte 0x00 7. " IMCR_E02_S[7] ,SCIF3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_E02_S[6] ,SCIF2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_E02_S[5] ,HSCIF2 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_E02_S[4] ,I2C5 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 3. " IMCR_E02_S[3] ,I2C4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_E02_S[2] ,DCU Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 1. " IMCR_E02_S[1] ,IRQ9 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_E02_S[0] ,IRQ8 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2CC++0x0 line.byte 0x00 "IMCR_E03_S,Peripheral Interrupt mask clear register e03S" bitfld.byte 0x00 7. " IMCR_E03_S[7] ,SCIFA5 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 6. " IMCR_E03_S[6] ,SCIFA4 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 5. " IMCR_E03_S[5] ,SCIFA3 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 4. " IMCR_E03_S[4] ,DISCOM1 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR_E03_S[1] ,SCIF5 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 0. " IMCR_E03_S[0] ,SCIF4 Interrupt mask clear" "No effect,Clear" wgroup.byte 0x2D0++0x0 line.byte 0x00 "IMCR_E04_S,Peripheral Interrupt mask clear register e04S" bitfld.byte 0x00 3. " IMCR_E04_S[3] ,DRIF3 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 2. " IMCR_E04_S[2] ,DRIF2 Interrupt mask clear" "No effect,Clear" bitfld.byte 0x00 1. " IMCR_E04_S[1] ,DRIF1 Interrupt mask clear" "No effect,Clear" textline " " bitfld.byte 0x00 0. " IMCR_E04_S[0] ,DRIF0 Interrupt mask clear" "No effect,Clear" tree.end width 12. group.long 0x20000++0x3 line.long 0x00 "USERIMASKS,User interrupt mask level register S" bitfld.long 0x00 4.--7. " UIMASKS ,User Interrupt Mask Level" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" width 0xB tree.end tree "MFIS (Multifunctional Interface)" base ad:0xE6260000 width 11. group.long 0xC0++0x7 line.long 0x00 "MFISLCKR0,MFIS Lock Register 0" bitfld.long 0x00 0. " LCK ,Mutex Control" "Not acquired/Release,Acquired/Forbidden" line.long 0x04 "MFISLCKR1,MFIS Lock Register 1" bitfld.long 0x04 0. " LCK ,Mutex Control" "Not acquired/Release,Acquired/Forbidden" sif cpuis("R8A77940") group.long 0x110++0x7 line.long 0x00 "MFISIICR0,MFIS CPU Communication Control Register 0 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR0,MFIS CPU Communication Control Register 0 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x118++0x7 line.long 0x00 "MFISIICR1,MFIS CPU Communication Control Register 1 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR1,MFIS CPU Communication Control Register 1 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" else group.long 0x110++0x7 line.long 0x00 "MFISIICR0,MFIS CPU Communication Control Register 0 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR0,MFIS CPU Communication Control Register 0 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x118++0x7 line.long 0x00 "MFISIICR1,MFIS CPU Communication Control Register 1 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR1,MFIS CPU Communication Control Register 1 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x120++0x7 line.long 0x00 "MFISIICR2,MFIS CPU Communication Control Register 2 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR2,MFIS CPU Communication Control Register 2 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x128++0x7 line.long 0x00 "MFISIICR3,MFIS CPU Communication Control Register 3 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR3,MFIS CPU Communication Control Register 3 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x130++0x7 line.long 0x00 "MFISIICR4,MFIS CPU Communication Control Register 4 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR4,MFIS CPU Communication Control Register 4 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x138++0x7 line.long 0x00 "MFISIICR5,MFIS CPU Communication Control Register 5 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR5,MFIS CPU Communication Control Register 5 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x140++0x7 line.long 0x00 "MFISIICR6,MFIS CPU Communication Control Register 6 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR6,MFIS CPU Communication Control Register 6 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" group.long 0x148++0x7 line.long 0x00 "MFISIICR7,MFIS CPU Communication Control Register 7 (ARM->SH-A4)" hexmask.long.word 0x00 1.--15. 1. " IIC ,Interrupt Source" bitfld.long 0x00 0. " IIR ,Internal Interrupt Request" "Not requested,Requested" line.long 0x04 "MFISEICR7,MFIS CPU Communication Control Register 7 (SH-4A->ARM)" hexmask.long.word 0x04 1.--15. 1. " EIC ,Interrupt Source" bitfld.long 0x04 0. " EIR ,Internal Interrupt Request" "Not requested,Requested" endif sif cpuis("R8A77940") group.long 0x160++0x3F line.long 0x0 "MFISIMBR0,MFIS CPU Communication Message Register 0 (ARM->SH-4A)" line.long 0x4 "MFISIMBR1,MFIS CPU Communication Message Register 1 (ARM->SH-4A)" line.long 0x20 "MFISEMBR0,MFIS CPU Communication Message Register 0 (SH-4A->ARM)" line.long 0x24 "MFISEMBR1,MFIS CPU Communication Message Register 1 (SH-4A->ARM)" else group.long 0x160++0x3F line.long 0x0 "MFISIMBR0,MFIS CPU Communication Message Register 0 (ARM->SH-4A)" line.long 0x4 "MFISIMBR1,MFIS CPU Communication Message Register 1 (ARM->SH-4A)" line.long 0x8 "MFISIMBR2,MFIS CPU Communication Message Register 2 (ARM->SH-4A)" line.long 0xC "MFISIMBR3,MFIS CPU Communication Message Register 3 (ARM->SH-4A)" line.long 0x10 "MFISIMBR4,MFIS CPU Communication Message Register 4 (ARM->SH-4A)" line.long 0x14 "MFISIMBR5,MFIS CPU Communication Message Register 5 (ARM->SH-4A)" line.long 0x18 "MFISIMBR6,MFIS CPU Communication Message Register 6 (ARM->SH-4A)" line.long 0x1C "MFISIMBR7,MFIS CPU Communication Message Register 7 (ARM->SH-4A)" line.long 0x20 "MFISEMBR0,MFIS CPU Communication Message Register 0 (SH-4A->ARM)" line.long 0x24 "MFISEMBR1,MFIS CPU Communication Message Register 1 (SH-4A->ARM)" line.long 0x28 "MFISEMBR2,MFIS CPU Communication Message Register 2 (SH-4A->ARM)" line.long 0x2C "MFISEMBR3,MFIS CPU Communication Message Register 3 (SH-4A->ARM)" line.long 0x30 "MFISEMBR4,MFIS CPU Communication Message Register 4 (SH-4A->ARM)" line.long 0x34 "MFISEMBR5,MFIS CPU Communication Message Register 5 (SH-4A->ARM)" line.long 0x38 "MFISEMBR6,MFIS CPU Communication Message Register 6 (SH-4A->ARM)" line.long 0x3C "MFISEMBR7,MFIS CPU Communication Message Register 7 (SH-4A->ARM)" endif width 0xB tree.end tree "AXI-bus" base ad:0xFE960000 width 10. group.long 0x00++0x07 line.long 0x00 "MXSAAR0,MXI SDRAM Address Allocation Register 0" hexmask.long.word 0x00 16.--31. 0x01 " SADD_0[39:24] ,Start Address 0 [39:24]" hexmask.long.word 0x00 0.--15. 0x01 " EADD_0[39:24] ,End Address 0 [39:24]" line.long 0x04 "MXSAAR1,MXI SDRAM Address Allocation Register 1" hexmask.long.word 0x04 16.--31. 0x01 " SADD_1[39:24] ,Start Address 1 [39:24]" hexmask.long.word 0x04 0.--15. 0x01 " EADD_1[39:24] ,End Address 1 [39:24]" group.long 0x40++0x07 line.long 0x00 "MXRTCR,MXI Read Transaction Control Register" sif cpuis("R8A77470") bitfld.long 0x00 5. " KPAR ,Switching arbitration" "Switched,Not switched" endif bitfld.long 0x00 4. " RQPUSHEN ,This bit should be set to 1" "No effect,1" bitfld.long 0x00 0.--2. " RTHRES ,Unit of transaction threshold at which QoS arbitration is performed" "No limit,1,2,4,8,16,32,?..." line.long 0x04 "MXWTCR,MXI Write Transaction Control Register" sif cpuis("R8A77470") bitfld.long 0x04 5. " KPAW ,Switching arbitration" "Switched,Not switched" endif bitfld.long 0x04 4. " WQPUSHEN ,This bit should be set to 1" "No effect,1" bitfld.long 0x04 0.--2. " WTHRES ,Unit of transaction threshold at which QoS arbitration is performed" "No limit,1,2,4,8,16,32,?..." width 0x0B tree.end tree.open "IPMMU" tree "IPMMU-SY0" base ad:0xE6280000 width 11. tree "MMU Registers" if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xE6280000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6280000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xE6280000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6280000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xE6280000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6280000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xE6280000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6280000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6280000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6280000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xE6280000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6280000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6280000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6280000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6280000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xE6280000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6280000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xE6280000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6280000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6280000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xE6280000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree "IPMMU-SY1" base ad:0xE6290000 width 11. tree "MMU Registers" if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xE6290000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6290000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xE6290000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6290000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xE6290000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6290000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xE6290000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6290000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6290000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6290000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xE6290000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6290000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6290000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6290000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6290000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xE6290000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6290000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xE6290000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6290000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6290000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xE6290000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree "IPMMU-DS" base ad:0xE6740000 width 11. tree "MMU Registers" if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xE6740000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6740000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xE6740000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6740000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xE6740000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6740000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xE6740000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE6740000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE6740000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE6740000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xE6740000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE6740000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE6740000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE6740000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE6740000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xE6740000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6740000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xE6740000+0x580)&0x1))==0x1) if (((per.l(ad:0xE6740000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE6740000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xE6740000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree "IPMMU-MP" base ad:0xEC680000 width 11. tree "MMU Registers" if (((per.l(ad:0xEC680000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xEC680000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC680000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xEC680000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xEC680000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xEC680000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xEC680000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xEC680000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xEC680000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC680000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xEC680000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xEC680000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xEC680000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xEC680000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xEC680000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xEC680000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC680000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xEC680000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xEC680000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xEC680000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xEC680000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xEC680000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xEC680000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC680000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xEC680000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xEC680000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xEC680000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xEC680000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xEC680000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xEC680000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xEC680000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xEC680000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xEC680000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xEC680000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xEC680000+0x580)&0x1))==0x1) if (((per.l(ad:0xEC680000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC680000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xEC680000+0x580)&0x1))==0x1) if (((per.l(ad:0xEC680000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xEC680000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xEC680000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree "IPMMU-MX" base ad:0xFE951000 width 11. tree "MMU Registers" if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xFE951000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xFE951000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x40))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000))&0x8)==0x8) group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x40++0x03 "Unit 1" line.long 0x00 "IMCTR_1,MMU Control Register 1" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x40+0x04)++0x03 line.long 0x00 "IMCAAR_1,MMU CCI Address Allocation Register 1" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x40+0x0C)++0x03 line.long 0x00 "IMBUSCR_1,MMU Bus Control Register 1" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR1,Both" endif textline " " if (((per.l(ad:0xFE951000+0x40+0x8))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xFE951000+0x40))&0x20000000)==0x00) group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x40+0x08)++0x03 line.long 0x00 "IMTTBCR_1,MMU Translation Table Base Control Register 1" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR11" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR11" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR01" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR01" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x14)++0x03 line.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR0_1,MMU Translation Table Upper Base Register 0 1" endif group.long (0x40+0x10)++0x03 line.long 0x00 "IMTTLBR0_1,MMU Translation Table Lower Base Register 0 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x80000000) group.long (0x40+0x1C)++0x03 line.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x40+0x14)++0x03 hide.long 0x00 "IMTTUBR1_1,MMU Translation Table Upper Base Register 1 1" endif group.long (0x40+0x18)++0x03 line.long 0x00 "IMTTLBR1_1,MMU Translation Table Lower Base Register 1 1" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x40+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x40+0x28)++0x07 line.long 0x00 "IMMAIR0_1,MMU Memory Attribute Indirection Register 0 1" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_1,MMU Memory Attribute Indirection Register 1 1" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x40+0x28)++0x07 line.long 0x00 "PRRR_1,Primary Region Remap Register 0 1" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_1,Primary Region Remap Register 1 1" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x40+0x20)++0x03 line.long 0x00 "IMSTR_1,MMU Error Status Register 1" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x40+0x30)++0x03 line.long 0x00 "IMEAR_1,MMU Error Address Register 1" if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x80))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000))&0x8)==0x8) group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x80++0x03 "Unit 2" line.long 0x00 "IMCTR_2,MMU Control Register 2" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x80+0x04)++0x03 line.long 0x00 "IMCAAR_2,MMU CCI Address Allocation Register 2" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x80+0x0C)++0x03 line.long 0x00 "IMBUSCR_2,MMU Bus Control Register 2" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR2,Both" endif textline " " if (((per.l(ad:0xFE951000+0x80+0x8))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xFE951000+0x80))&0x20000000)==0x00) group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x80+0x08)++0x03 line.long 0x00 "IMTTBCR_2,MMU Translation Table Base Control Register 2" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR12" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR12" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR02" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR02" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x14)++0x03 line.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR0_2,MMU Translation Table Upper Base Register 0 2" endif group.long (0x80+0x10)++0x03 line.long 0x00 "IMTTLBR0_2,MMU Translation Table Lower Base Register 0 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x80000000) group.long (0x80+0x1C)++0x03 line.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x80+0x14)++0x03 hide.long 0x00 "IMTTUBR1_2,MMU Translation Table Upper Base Register 1 2" endif group.long (0x80+0x18)++0x03 line.long 0x00 "IMTTLBR1_2,MMU Translation Table Lower Base Register 1 2" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0x80+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x80+0x28)++0x07 line.long 0x00 "IMMAIR0_2,MMU Memory Attribute Indirection Register 0 2" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_2,MMU Memory Attribute Indirection Register 1 2" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x80+0x28)++0x07 line.long 0x00 "PRRR_2,Primary Region Remap Register 0 2" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_2,Primary Region Remap Register 1 2" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x80+0x20)++0x03 line.long 0x00 "IMSTR_2,MMU Error Status Register 2" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x80+0x30)++0x03 line.long 0x00 "IMEAR_2,MMU Error Address Register 2" if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0xC0))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000))&0x8)==0x8) group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0xC0++0x03 "Unit 3" line.long 0x00 "IMCTR_3,MMU Control Register 3" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0xC0+0x04)++0x03 line.long 0x00 "IMCAAR_3,MMU CCI Address Allocation Register 3" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0xC0+0x0C)++0x03 line.long 0x00 "IMBUSCR_3,MMU Bus Control Register 3" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR3,Both" endif textline " " if (((per.l(ad:0xFE951000+0xC0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xFE951000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xFE951000+0xC0))&0x20000000)==0x00) group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0xC0+0x08)++0x03 line.long 0x00 "IMTTBCR_3,MMU Translation Table Base Control Register 3" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR13" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR13" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR03" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR03" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x14)++0x03 line.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_3,MMU Translation Table Upper Base Register 0 3" endif group.long (0xC0+0x10)++0x03 line.long 0x00 "IMTTLBR0_3,MMU Translation Table Lower Base Register 0 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x80000000) group.long (0xC0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0xC0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_3,MMU Translation Table Upper Base Register 1 3" endif group.long (0xC0+0x18)++0x03 line.long 0x00 "IMTTLBR1_3,MMU Translation Table Lower Base Register 1 3" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xFE951000+0xC0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0xC0+0x28)++0x07 line.long 0x00 "IMMAIR0_3,MMU Memory Attribute Indirection Register 0 3" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_3,MMU Memory Attribute Indirection Register 1 3" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0xC0+0x28)++0x07 line.long 0x00 "PRRR_3,Primary Region Remap Register 0 3" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_3,Primary Region Remap Register 1 3" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0xC0+0x20)++0x03 line.long 0x00 "IMSTR_3,MMU Error Status Register 3" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0xC0+0x30)++0x03 line.long 0x00 "IMEAR_3,MMU Error Address Register 3" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xFE951000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xFE951000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xFE951000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xFE951000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xFE951000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x310++0x03 line.long 0x00 "IMUCTR_1,uTLB Control Register 1" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x310+0x08)++0x03 line.long 0x00 "IMUASID_1,uTLB ASID Register 1" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x320++0x03 line.long 0x00 "IMUCTR_2,uTLB Control Register 2" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x320+0x08)++0x03 line.long 0x00 "IMUASID_2,uTLB ASID Register 2" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x330++0x03 line.long 0x00 "IMUCTR_3,uTLB Control Register 3" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x330+0x08)++0x03 line.long 0x00 "IMUASID_3,uTLB ASID Register 3" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x340++0x03 line.long 0x00 "IMUCTR_4,uTLB Control Register 4" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x340+0x08)++0x03 line.long 0x00 "IMUASID_4,uTLB ASID Register 4" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x350++0x03 line.long 0x00 "IMUCTR_5,uTLB Control Register 5" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x350+0x08)++0x03 line.long 0x00 "IMUASID_5,uTLB ASID Register 5" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x360++0x03 line.long 0x00 "IMUCTR_6,uTLB Control Register 6" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x360+0x08)++0x03 line.long 0x00 "IMUASID_6,uTLB ASID Register 6" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x370++0x03 line.long 0x00 "IMUCTR_7,uTLB Control Register 7" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x370+0x08)++0x03 line.long 0x00 "IMUASID_7,uTLB ASID Register 7" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x380++0x03 line.long 0x00 "IMUCTR_8,uTLB Control Register 8" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x380+0x08)++0x03 line.long 0x00 "IMUASID_8,uTLB ASID Register 8" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x390++0x03 line.long 0x00 "IMUCTR_9,uTLB Control Register 9" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x390+0x08)++0x03 line.long 0x00 "IMUASID_9,uTLB ASID Register 9" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3A0++0x03 line.long 0x00 "IMUCTR_10,uTLB Control Register 10" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3A0+0x08)++0x03 line.long 0x00 "IMUASID_10,uTLB ASID Register 10" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3B0++0x03 line.long 0x00 "IMUCTR_11,uTLB Control Register 11" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3B0+0x08)++0x03 line.long 0x00 "IMUASID_11,uTLB ASID Register 11" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3C0++0x03 line.long 0x00 "IMUCTR_12,uTLB Control Register 12" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3C0+0x08)++0x03 line.long 0x00 "IMUASID_12,uTLB ASID Register 12" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3D0++0x03 line.long 0x00 "IMUCTR_13,uTLB Control Register 13" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3D0+0x08)++0x03 line.long 0x00 "IMUASID_13,uTLB ASID Register 13" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3E0++0x03 line.long 0x00 "IMUCTR_14,uTLB Control Register 14" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3E0+0x08)++0x03 line.long 0x00 "IMUASID_14,uTLB ASID Register 14" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x3F0++0x03 line.long 0x00 "IMUCTR_15,uTLB Control Register 15" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x3F0+0x08)++0x03 line.long 0x00 "IMUASID_15,uTLB ASID Register 15" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x400++0x03 line.long 0x00 "IMUCTR_16,uTLB Control Register 16" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x400+0x08)++0x03 line.long 0x00 "IMUASID_16,uTLB ASID Register 16" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x410++0x03 line.long 0x00 "IMUCTR_17,uTLB Control Register 17" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x410+0x08)++0x03 line.long 0x00 "IMUASID_17,uTLB ASID Register 17" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x420++0x03 line.long 0x00 "IMUCTR_18,uTLB Control Register 18" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x420+0x08)++0x03 line.long 0x00 "IMUASID_18,uTLB ASID Register 18" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x430++0x03 line.long 0x00 "IMUCTR_19,uTLB Control Register 19" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x430+0x08)++0x03 line.long 0x00 "IMUASID_19,uTLB ASID Register 19" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x440++0x03 line.long 0x00 "IMUCTR_20,uTLB Control Register 20" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x440+0x08)++0x03 line.long 0x00 "IMUASID_20,uTLB ASID Register 20" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x450++0x03 line.long 0x00 "IMUCTR_21,uTLB Control Register 21" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x450+0x08)++0x03 line.long 0x00 "IMUASID_21,uTLB ASID Register 21" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x460++0x03 line.long 0x00 "IMUCTR_22,uTLB Control Register 22" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x460+0x08)++0x03 line.long 0x00 "IMUASID_22,uTLB ASID Register 22" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x470++0x03 line.long 0x00 "IMUCTR_23,uTLB Control Register 23" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x470+0x08)++0x03 line.long 0x00 "IMUASID_23,uTLB ASID Register 23" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x480++0x03 line.long 0x00 "IMUCTR_24,uTLB Control Register 24" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x480+0x08)++0x03 line.long 0x00 "IMUASID_24,uTLB ASID Register 24" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x490++0x03 line.long 0x00 "IMUCTR_25,uTLB Control Register 25" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x490+0x08)++0x03 line.long 0x00 "IMUASID_25,uTLB ASID Register 25" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4A0++0x03 line.long 0x00 "IMUCTR_26,uTLB Control Register 26" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4A0+0x08)++0x03 line.long 0x00 "IMUASID_26,uTLB ASID Register 26" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4B0++0x03 line.long 0x00 "IMUCTR_27,uTLB Control Register 27" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4B0+0x08)++0x03 line.long 0x00 "IMUASID_27,uTLB ASID Register 27" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4C0++0x03 line.long 0x00 "IMUCTR_28,uTLB Control Register 28" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4C0+0x08)++0x03 line.long 0x00 "IMUASID_28,uTLB ASID Register 28" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4D0++0x03 line.long 0x00 "IMUCTR_29,uTLB Control Register 29" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4D0+0x08)++0x03 line.long 0x00 "IMUASID_29,uTLB ASID Register 29" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4E0++0x03 line.long 0x00 "IMUCTR_30,uTLB Control Register 30" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4E0+0x08)++0x03 line.long 0x00 "IMUASID_30,uTLB ASID Register 30" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" group.long 0x4F0++0x03 line.long 0x00 "IMUCTR_31,uTLB Control Register 31" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x4F0+0x08)++0x03 line.long 0x00 "IMUASID_31,uTLB ASID Register 31" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xFE951000+0x580)&0x1))==0x1) if (((per.l(ad:0xFE951000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xFE951000+0x580)&0x1))==0x1) if (((per.l(ad:0xFE951000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xFE951000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xFE951000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree "IPMMU-GP" base ad:0xE62A0000 width 11. tree "MMU Registers" if (((per.l(ad:0xE62A0000+0x0+0x08))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0x0))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 17. " TRE ,TEX remap enable" "Disabled,Enabled" bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE62A0000))&0x8)==0x8) group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access Flag enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " RTSEL ,Retranslation table select" "0,1,2,3,4,5,6,7" else bitfld.long 0x00 4.--5. " RTSEL ,Retranslation table select" "0,1,2,3" endif textline " " bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" textline " " bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" else group.long 0x0++0x03 "Unit 0" line.long 0x00 "IMCTR_0,MMU Control Register 0" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " VA64 ,AArch64 support" "VMSAv8-64,VMSAv8-32" textline " " endif bitfld.long 0x00 16. " AFE ,Access flag enable" "Disabled,Enabled" bitfld.long 0x00 3. " TREN ,MMU retranslation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FLUSH ,TLB invalidate" "Not invalidated,Invalidated" bitfld.long 0x00 0. " MMUEN ,MMU enable" "Disabled,Enabled" endif endif sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450") group.long (0x0+0x04)++0x03 line.long 0x00 "IMCAAR_0,MMU CCI Address Allocation Register 0" sif (cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440")||cpuis("R8A77450")) hexmask.long.word 0x00 16.--31. 0x01 " SADD[39:24] ,Start physical address via CCI interconnect" hexmask.long.word 0x00 0.--15. 0x01 " EADD[39:24] ,End physical address via CCI interconnect" endif group.long (0x0+0x0C)++0x03 line.long 0x00 "IMBUSCR_0,MMU Bus Control Register 0" bitfld.long 0x00 2. " DVM ,Broadcast TLB maintenance operations through CCI" "Not managed,Managed" bitfld.long 0x00 0.--1. " BUSSEL ,Bus select" "Always,Memory attr. shareable,Range of IMCAAR0,Both" endif textline " " if (((per.l(ad:0xE62A0000+0x0+0x8))&0x80000000)==0x0) if (((per.l(ad:0xE62A0000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" bitfld.long 0x00 30. " PMB ,PMB enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A7747*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif else if (((per.l(ad:0xE62A0000+0x0))&0x20000000)==0x00) group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--21. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ1)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 16.--21. " TSZ_0 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(64-TSZ0)" "2^64,2^61,2^60,2^59,2^58,2^57,2^56,2^55,2^54,2^53,2^52,2^51,2^50,2^49,2^48,2^47,2^46,2^45,2^44,2^43,2^42,2^41,2^40,2^39,2^38,2^37,2^36,2^35,2^34,2^33,2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25,2^24,2^23,2^22,2^21,2^20,2^19,2^18,2^17,2^16,2^15,2^14,2^13,2^12,2^11,2^10,2^9,2^8,2^7,2^6,2^5,2^4,2^3,2^2,2,1,0" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif else group.long (0x0+0x08)++0x03 line.long 0x00 "IMTTBCR_0,MMU Translation Table Base Control Register 0" bitfld.long 0x00 31. " EAE ,Extended address enable" "Disabled,Enabled" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 28.--29. " SH_1 ,Shareability attributes for the memory associated with the translation table walks using TTBR10" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 26.--27. " ORGN_1 ,Outer cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 23. " PGSZ ,2nd level page size" "Large (16KB),Small (4KB)" textline " " bitfld.long 0x00 22. " SCSZ ,1st level page size select" "Super section size (16MB),Section size (1MB)" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 26.--27. " ORGN_1 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 24.--25. " IRGN_1 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR10" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 16.--18. " TSZ_1 ,The size offset of the TTBR1n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ1)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Outer-shareable,Inner Shareable" textline " " else bitfld.long 0x00 12.--13. " SH_0 ,Shareability attributes for the memory associated with the translation table walks using TTBR00" "Non-shareable,,Non-shareable,Inner Shareable" textline " " endif bitfld.long 0x00 10.--11. " ORGN_0 ,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" bitfld.long 0x00 8.--9. " IRGN_0 ,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR00" "Non-cache,WR-Back WR-Alloc Cache,WR-Through Cache,WR-Back no WR-Alloc Cache" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 6.--7. " SL ,Starting level for translation table walks" "Third level,Second level,First level," bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " else bitfld.long 0x00 4. " SL_0 ,Starting level for translation table walks" "Second level,First level" bitfld.long 0x00 0.--2. " TSZ_0 ,The size offset of the TTBR0n addressed region, encoded as a 3bit unsigned number, giving the size of the region as 2^(32-TSZ0)" "2^32,2^31,2^30,2^29,2^28,2^27,2^26,2^25" textline " " endif endif endif if (((per.l(ad:0xE62A0000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x14)++0x03 line.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR0_0,MMU Translation Table Upper Base Register 0 0" endif group.long (0x0+0x10)++0x03 line.long 0x00 "IMTTLBR0_0,MMU Translation Table Lower Base Register 0 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0x0+0x08))&0x80000000)==0x80000000) group.long (0x0+0x1C)++0x03 line.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" hexmask.long.byte 0x00 0.--7. 1. " TTBR[39:32] ,Translation table base address [39:32]" else hgroup.long (0x0+0x14)++0x03 hide.long 0x00 "IMTTUBR1_0,MMU Translation Table Upper Base Register 1 0" endif group.long (0x0+0x18)++0x03 line.long 0x00 "IMTTLBR1_0,MMU Translation Table Lower Base Register 1 0" hexmask.long 0x00 4.--31. 0x10 " TTBR[31:4] ,Translation table base address [31:4]" if (((per.l(ad:0xE62A0000+0x0+0x08))&0x80000000)==0x80000000) sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A774*") group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,Memory attribute encoding for an AttrIndx[2:0] entry" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,Memory attribute encoding for an AttrIndx[2:0] entry" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,Memory attribute encoding for an AttrIndx[2:0] entry" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,Memory attribute encoding for an AttrIndx[2:0] entry" else group.long (0x0+0x28)++0x07 line.long 0x00 "IMMAIR0_0,MMU Memory Attribute Indirection Register 0 0" hexmask.long.byte 0x00 24.--31. 1. " ATTR_3 ,ATTR3" hexmask.long.byte 0x00 16.--23. 1. " ATTR_2 ,ATTR2" hexmask.long.byte 0x00 8.--15. 1. " ATTR_1 ,ATTR1" textline " " hexmask.long.byte 0x00 0.--7. 1. " ATTR_0 ,ATTR0" line.long 0x04 "IMMAIR1_0,MMU Memory Attribute Indirection Register 1 0" hexmask.long.byte 0x04 24.--31. 1. " ATTR_7 ,ATTR7" hexmask.long.byte 0x04 16.--23. 1. " ATTR_6 ,ATTR6" hexmask.long.byte 0x04 8.--15. 1. " ATTR_5 ,ATTR5" textline " " hexmask.long.byte 0x04 0.--7. 1. " ATTR_4 ,ATTR4" endif else group.long (0x0+0x28)++0x07 line.long 0x00 "PRRR_0,Primary Region Remap Register 0 0" bitfld.long 0x00 31. " NOS_7 ,Outer Shareable property mapping for memory attributes 7" "Outer,Inner" bitfld.long 0x00 30. " NOS_6 ,Outer Shareable property mapping for memory attributes 6" "Outer,Inner" bitfld.long 0x00 29. " NOS_5 ,Outer Shareable property mapping for memory attributes 5" "Outer,Inner" textline " " bitfld.long 0x00 28. " NOS_4 ,Outer Shareable property mapping for memory attributes 4" "Outer,Inner" bitfld.long 0x00 27. " NOS_3 ,Outer Shareable property mapping for memory attributes 3" "Outer,Inner" bitfld.long 0x00 26. " NOS_2 ,Outer Shareable property mapping for memory attributes 2" "Outer,Inner" textline " " bitfld.long 0x00 25. " NOS_1 ,Outer Shareable property mapping for memory attributes 1" "Outer,Inner" bitfld.long 0x00 24. " NOS_0 ,Outer Shareable property mapping for memory attributes 0" "Outer,Inner" bitfld.long 0x00 19. " NS_1 ,Mapping of S = 1 attribute for Normal memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 18. " NS_0 ,Mapping of S = 0 attribute for Normal memory" "Not shareable,Shareable" bitfld.long 0x00 17. " DS_1 ,Mapping of S = 1 attribute for Device memory" "Not shareable,Shareable" bitfld.long 0x00 16. " DS_0 ,Mapping of S = 0 attribute for Device memory" "Not shareable,Shareable" textline " " bitfld.long 0x00 14.--15. " TR_7 ,Primary TEX mapping for memory attributes 7" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 12.--13. " TR_6 ,Primary TEX mapping for memory attributes 6" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 10.--11. " TR_5 ,Primary TEX mapping for memory attributes 5" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 8.--9. " TR_4 ,Primary TEX mapping for memory attributes 4" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 6.--7. " TR_3 ,Primary TEX mapping for memory attributes 3" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 4.--5. " TR_2 ,Primary TEX mapping for memory attributes 2" "Strongly-ordered,Device,Normal Memory,?..." textline " " bitfld.long 0x00 2.--3. " TR_1 ,Primary TEX mapping for memory attributes 1" "Strongly-ordered,Device,Normal Memory,?..." bitfld.long 0x00 0.--1. " TR_0 ,Primary TEX mapping for memory attributes 0" "Strongly-ordered,Device,Normal Memory,?..." line.long 0x04 "PRRR_0,Primary Region Remap Register 1 0" bitfld.long 0x04 30.--31. " OR_7 ,Outer Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 28.--29. " OR_6 ,Outer Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 26.--27. " OR_5 ,Outer Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 24.--25. " OR_4 ,Outer Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 22.--23. " OR_3 ,Outer Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 20.--21. " OR_2 ,Outer Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 18.--19. " OR_1 ,Outer Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 16.--17. " OR_0 ,Outer Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 14.--15. " IR_7 ,Inner Cacheable property mapping for memory attributes 7" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 12.--13. " IR_6 ,Inner Cacheable property mapping for memory attributes 6" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 10.--11. " IR_5 ,Inner Cacheable property mapping for memory attributes 5" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 8.--9. " IR_4 ,Inner Cacheable property mapping for memory attributes 4" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 6.--7. " IR_3 ,Inner Cacheable property mapping for memory attributes 3" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 4.--5. " IR_2 ,Inner Cacheable property mapping for memory attributes 2" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" bitfld.long 0x04 2.--3. " IR_1 ,Inner Cacheable property mapping for memory attributes 1" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" textline " " bitfld.long 0x04 0.--1. " IR_0 ,Inner Cacheable property mapping for memory attributes 0" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/no Write-Allocate,Write-Back/no Write-Allocate" endif textline " " sif cpuis("R7S72104*")||cpuis("R7S72106*")||cpuis("R8A77440")||cpuis("R8A77430")||cpuis("R8A77450")||cpuis("R8A77420") group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" rbitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" rbitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page Fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation Fault" "Not occurred,Occurred" else group.long (0x0+0x20)++0x03 line.long 0x00 "IMSTR_0,MMU Error Status Register 0" bitfld.long 0x00 12.--13. " ERRLVL[1:0] ,Error cause page table walk level" "0,1,2,3" bitfld.long 0x00 8.--10. " ERRCODE[2:0] ,Error type" ",TLB format error,,,Access perm. error,Secure access error,?..." bitfld.long 0x00 4. " MHIT ,Multiple TLB hit" "Not occurred,Occurred" textline " " bitfld.long 0x00 2. " ABORT ,ABORT" "Not aborted,Aborted" bitfld.long 0x00 1. " PF ,Page fault" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" endif group.long (0x0+0x30)++0x03 line.long 0x00 "IMEAR_0,MMU Error Address Register 0" tree.end tree "PMB Registers" group.long 0x200++0x03 line.long 0x00 "IMPCTR,PMB Control Register" sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--6. " TTSEL ,Translation table select" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 4.--5. " TTSEL ,Translation table select" "0,1,2,3" textline " " endif bitfld.long 0x00 3. " TTEN ,TLB translation enable" "Disabled,Enabled" bitfld.long 0x00 2. " INTEN ,Interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " PMBEN ,PMB enable" "Disabled,Enabled" if (((per.l(ad:0xE62A0000+0x280+0x40))&0x90)==0x00) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x280+0x40))&0x90)==0x80) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x280+0x40))&0x90)==0x10) group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x280++0x03 line.long 0x00 "IMPMBA_0,PMB Address Array 0" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x284+0x40))&0x90)==0x00) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x284+0x40))&0x90)==0x80) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x284+0x40))&0x90)==0x10) group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x284++0x03 line.long 0x00 "IMPMBA_1,PMB Address Array 1" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x288+0x40))&0x90)==0x00) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x288+0x40))&0x90)==0x80) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x288+0x40))&0x90)==0x10) group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x288++0x03 line.long 0x00 "IMPMBA_2,PMB Address Array 2" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x28C+0x40))&0x90)==0x00) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x28C+0x40))&0x90)==0x80) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x28C+0x40))&0x90)==0x10) group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x28C++0x03 line.long 0x00 "IMPMBA_3,PMB Address Array 3" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x290+0x40))&0x90)==0x00) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x290+0x40))&0x90)==0x80) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x290+0x40))&0x90)==0x10) group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x290++0x03 line.long 0x00 "IMPMBA_4,PMB Address Array 4" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x294+0x40))&0x90)==0x00) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x294+0x40))&0x90)==0x80) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x294+0x40))&0x90)==0x10) group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x294++0x03 line.long 0x00 "IMPMBA_5,PMB Address Array 5" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x298+0x40))&0x90)==0x00) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x298+0x40))&0x90)==0x80) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x298+0x40))&0x90)==0x10) group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x298++0x03 line.long 0x00 "IMPMBA_6,PMB Address Array 6" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x29C+0x40))&0x90)==0x00) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x29C+0x40))&0x90)==0x80) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x29C+0x40))&0x90)==0x10) group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x29C++0x03 line.long 0x00 "IMPMBA_7,PMB Address Array 7" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2A0+0x40))&0x90)==0x00) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A0+0x40))&0x90)==0x80) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A0+0x40))&0x90)==0x10) group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A0++0x03 line.long 0x00 "IMPMBA_8,PMB Address Array 8" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2A4+0x40))&0x90)==0x00) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A4+0x40))&0x90)==0x80) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A4+0x40))&0x90)==0x10) group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A4++0x03 line.long 0x00 "IMPMBA_9,PMB Address Array 9" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2A8+0x40))&0x90)==0x00) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A8+0x40))&0x90)==0x80) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2A8+0x40))&0x90)==0x10) group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2A8++0x03 line.long 0x00 "IMPMBA_10,PMB Address Array 10" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2AC+0x40))&0x90)==0x00) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2AC+0x40))&0x90)==0x80) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2AC+0x40))&0x90)==0x10) group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2AC++0x03 line.long 0x00 "IMPMBA_11,PMB Address Array 11" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2B0+0x40))&0x90)==0x00) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B0+0x40))&0x90)==0x80) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B0+0x40))&0x90)==0x10) group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B0++0x03 line.long 0x00 "IMPMBA_12,PMB Address Array 12" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2B4+0x40))&0x90)==0x00) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B4+0x40))&0x90)==0x80) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B4+0x40))&0x90)==0x10) group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B4++0x03 line.long 0x00 "IMPMBA_13,PMB Address Array 13" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2B8+0x40))&0x90)==0x00) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B8+0x40))&0x90)==0x80) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2B8+0x40))&0x90)==0x10) group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2B8++0x03 line.long 0x00 "IMPMBA_14,PMB Address Array 14" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2BC+0x40))&0x90)==0x00) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 24.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2BC+0x40))&0x90)==0x80) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 26.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" elif (((per.l(ad:0xE62A0000+0x2BC+0x40))&0x90)==0x10) group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 27.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" else group.long 0x2BC++0x03 line.long 0x00 "IMPMBA_15,PMB Address Array 15" hexmask.long.byte 0x00 29.--31. 1. " VPN ,Virtual page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" endif if (((per.l(ad:0xE62A0000+0x2C0))&0x90)==0x00) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C0))&0x90)==0x80) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C0))&0x90)==0x10) group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C0++0x03 line.long 0x00 "IMPMBD_0,PMB Data Array 0" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2C4))&0x90)==0x00) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C4))&0x90)==0x80) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C4))&0x90)==0x10) group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C4++0x03 line.long 0x00 "IMPMBD_1,PMB Data Array 1" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2C8))&0x90)==0x00) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C8))&0x90)==0x80) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2C8))&0x90)==0x10) group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2C8++0x03 line.long 0x00 "IMPMBD_2,PMB Data Array 2" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2CC))&0x90)==0x00) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2CC))&0x90)==0x80) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2CC))&0x90)==0x10) group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2CC++0x03 line.long 0x00 "IMPMBD_3,PMB Data Array 3" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2D0))&0x90)==0x00) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D0))&0x90)==0x80) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D0))&0x90)==0x10) group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D0++0x03 line.long 0x00 "IMPMBD_4,PMB Data Array 4" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2D4))&0x90)==0x00) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D4))&0x90)==0x80) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D4))&0x90)==0x10) group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D4++0x03 line.long 0x00 "IMPMBD_5,PMB Data Array 5" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2D8))&0x90)==0x00) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D8))&0x90)==0x80) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2D8))&0x90)==0x10) group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2D8++0x03 line.long 0x00 "IMPMBD_6,PMB Data Array 6" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2DC))&0x90)==0x00) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2DC))&0x90)==0x80) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2DC))&0x90)==0x10) group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2DC++0x03 line.long 0x00 "IMPMBD_7,PMB Data Array 7" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2E0))&0x90)==0x00) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E0))&0x90)==0x80) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E0))&0x90)==0x10) group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E0++0x03 line.long 0x00 "IMPMBD_8,PMB Data Array 8" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2E4))&0x90)==0x00) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E4))&0x90)==0x80) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E4))&0x90)==0x10) group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E4++0x03 line.long 0x00 "IMPMBD_9,PMB Data Array 9" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2E8))&0x90)==0x00) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E8))&0x90)==0x80) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2E8))&0x90)==0x10) group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2E8++0x03 line.long 0x00 "IMPMBD_10,PMB Data Array 10" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2EC))&0x90)==0x00) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2EC))&0x90)==0x80) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2EC))&0x90)==0x10) group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2EC++0x03 line.long 0x00 "IMPMBD_11,PMB Data Array 11" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2F0))&0x90)==0x00) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F0))&0x90)==0x80) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F0))&0x90)==0x10) group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F0++0x03 line.long 0x00 "IMPMBD_12,PMB Data Array 12" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2F4))&0x90)==0x00) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F4))&0x90)==0x80) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F4))&0x90)==0x10) group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F4++0x03 line.long 0x00 "IMPMBD_13,PMB Data Array 13" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2F8))&0x90)==0x00) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F8))&0x90)==0x80) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2F8))&0x90)==0x10) group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2F8++0x03 line.long 0x00 "IMPMBD_14,PMB Data Array 14" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif if (((per.l(ad:0xE62A0000+0x2FC))&0x90)==0x00) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 24.--31. 1. " PPN[31:24] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2FC))&0x90)==0x80) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 26.--31. 1. " PPN[31:26] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" elif (((per.l(ad:0xE62A0000+0x2FC))&0x90)==0x10) group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 27.--31. 1. " PPN[31:27] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" else group.long 0x2FC++0x03 line.long 0x00 "IMPMBD_15,PMB Data Array 15" hexmask.long.byte 0x00 29.--31. 1. " PPN[31:29] ,Physical page number" hexmask.long.byte 0x00 16.--23. 1. " PPN[39:32] ,Upper physical page number" bitfld.long 0x00 8. " V ,Page Translation enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. 4. " SZ ,Page size" "16-Mbyte,64-Mbyte,128-Mbyte,512-Mbyte" endif group.long 0x208++0x03 line.long 0x00 "IMPSTR,PMB Status Register" bitfld.long 0x00 4. " MHIT ,Multiple hit" "Not occurred,Occurred" bitfld.long 0x00 0. " TF ,Translation fault" "Not occurred,Occurred" group.long 0x20C++0x03 line.long 0x00 "IMPEAR,PMB Error Address Register" tree.end tree "uTLB Registers" group.long 0x300++0x03 line.long 0x00 "IMUCTR_0,uTLB Control Register 0" bitfld.long 0x00 31. " FIXADDEN ,Fix the upper 8bit of physical address" "Disabled,Enabled" hexmask.long.byte 0x00 16.--23. 1. " FIXADD[39:32] ,FIXADD[39:32]" textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,MMU4,MMU5,MMU6,MMU7,PMB,?..." textline " " else bitfld.long 0x00 4.--7. " TTSEL ,Translation table" "MMU0,MMU1,MMU2,MMU3,,,,,PMB,?..." textline " " endif bitfld.long 0x00 1. " FLUSH ,Micro-TLB invalidate" "No effect,Invalidated" bitfld.long 0x00 0. " MMUEN ,Address translation enable" "Disabled,Enabled" group.long (0x300+0x08)++0x03 line.long 0x00 "IMUASID_0,uTLB ASID Register 0" hexmask.long.byte 0x00 8.--15. 1. " ASID_1 ,ASID1" hexmask.long.byte 0x00 0.--7. 1. " ASID_0 ,ASID0" tree.end sif cpuis("R8J7795*")||cpuis("R8A7795*") tree "MMU RAM Status and Control Registers" width 14. rgroup.long 0x540++0x03 line.long 0x00 "IMSSTR,MMU Interrupt Status Register" bitfld.long 0x00 13. " MM ,Interrupt status of IPMMU-MM" "Not accepted,Accepted" bitfld.long 0x00 13. " VP ,Interrupt status of IPMMU-VP" "Not accepted,Accepted" bitfld.long 0x00 13. " VI ,Interrupt status of IPMMU-VI" "Not accepted,Accepted" bitfld.long 0x00 13. " VC1 ,Interrupt status of IPMMU-VC1" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " VC0 ,Interrupt status of IPMMU-VC0" "Not accepted,Accepted" bitfld.long 0x00 13. " SY ,Interrupt status of IPMMU-SY" "Not accepted,Accepted" bitfld.long 0x00 13. " RT ,Interrupt status of IPMMU-RT" "Not accepted,Accepted" bitfld.long 0x00 13. " PV ,Interrupt status of IPMMU-PV" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " MP1 ,Interrupt status of IPMMU-MP1" "Not accepted,Accepted" bitfld.long 0x00 13. " MP0 ,Interrupt status of IPMMU-MP0" "Not accepted,Accepted" bitfld.long 0x00 13. " IR ,Interrupt status of IPMMU-IR" "Not accepted,Accepted" bitfld.long 0x00 13. " HC ,Interrupt status of IPMMU-HC" "Not accepted,Accepted" textline " " bitfld.long 0x00 13. " DS1 ,Interrupt status of IPMMU-DS1" "Not accepted,Accepted" bitfld.long 0x00 13. " DS0 ,Interrupt status of IPMMU-DS0" "Not accepted,Accepted" group.long 0x560++0x0F line.long 0x00 "IMRAM0ERRCTR,MMU RAM0 Error Control Register" bitfld.long 0x00 25. " L1UC ,L1UC" "0,1" bitfld.long 0x00 24. " L1C ,L1C" "0,1" bitfld.long 0x00 23. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x00 22. " L2C3 ,L2C3" "0,1" textline " " bitfld.long 0x00 21. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x00 20. " L2C2 ,L2C2" "0,1" bitfld.long 0x00 19. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x00 18. " L2C1 ,L2C1" "0,1" textline " " bitfld.long 0x00 17. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x00 16. " L2C0 ,L2C0" "0,1" bitfld.long 0x00 15. " L3UC7 ,L3UC7" "0,1" bitfld.long 0x00 14. " L2C7 ,L2C7" "0,1" textline " " bitfld.long 0x00 13. " L3UC6 ,L3UC6" "0,1" bitfld.long 0x00 12. " L3C6 ,L3C6" "0,1" bitfld.long 0x00 11. " L2UC5 ,L2UC5" "0,1" bitfld.long 0x00 10. " L3C5 ,L3C5" "0,1" textline " " bitfld.long 0x00 9. " L3UC4 ,L3UC4" "0,1" bitfld.long 0x00 8. " L3C4 ,L3C4" "0,1" bitfld.long 0x00 7. " L3UC3 ,L3UC3" "0,1" bitfld.long 0x00 6. " L3C3 ,L3C3" "0,1" textline " " bitfld.long 0x00 5. " L3UC2 ,L3UC2" "0,1" bitfld.long 0x00 4. " L3C2 ,L3C2" "0,1" bitfld.long 0x00 3. " L3UC1 ,L3UC1" "0,1" bitfld.long 0x00 2. " L3C1 ,L3C1" "0,1" textline " " bitfld.long 0x00 1. " L3UC0 ,L3UC0" "0,1" bitfld.long 0x00 0. " L3C0 ,L3C0" "0,1" line.long 0x04 "IMRAM0ERRSTR,MMU RAM0 Error Status Register" eventfld.long 0x04 25. " L1UC ,L1UC" "0,1" eventfld.long 0x04 24. " L1C ,L1C" "0,1" eventfld.long 0x04 23. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x04 22. " L2C3 ,L2C3" "0,1" textline " " eventfld.long 0x04 21. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x04 20. " L2C2 ,L2C2" "0,1" eventfld.long 0x04 19. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x04 18. " L2C1 ,L2C1" "0,1" textline " " eventfld.long 0x04 17. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x04 16. " L2C0 ,L2C0" "0,1" eventfld.long 0x04 15. " L3UC7 ,L3UC7" "0,1" eventfld.long 0x04 14. " L2C7 ,L2C7" "0,1" textline " " eventfld.long 0x04 13. " L3UC6 ,L3UC6" "0,1" eventfld.long 0x04 12. " L3C6 ,L3C6" "0,1" eventfld.long 0x04 11. " L2UC5 ,L2UC5" "0,1" eventfld.long 0x04 10. " L3C5 ,L3C5" "0,1" textline " " eventfld.long 0x04 9. " L3UC4 ,L3UC4" "0,1" eventfld.long 0x04 8. " L3C4 ,L3C4" "0,1" eventfld.long 0x04 7. " L3UC3 ,L3UC3" "0,1" eventfld.long 0x04 6. " L3C3 ,L3C3" "0,1" textline " " eventfld.long 0x04 5. " L3UC2 ,L3UC2" "0,1" eventfld.long 0x04 4. " L3C2 ,L3C2" "0,1" eventfld.long 0x04 3. " L3UC1 ,L3UC1" "0,1" eventfld.long 0x04 2. " L3C1 ,L3C1" "0,1" textline " " eventfld.long 0x04 1. " L3UC0 ,L3UC0" "0,1" eventfld.long 0x04 0. " L3C0 ,L3C0" "0,1" line.long 0x08 "IMRAM1ERRCTR,MMU RAM1 Error Control Register" bitfld.long 0x08 7. " L2UC3 ,L2UC3" "0,1" bitfld.long 0x08 6. " L2C3 ,L2C3" "0,1" bitfld.long 0x08 5. " L2UC2 ,L2UC2" "0,1" bitfld.long 0x08 4. " L2C2 ,L2C2" "0,1" textline " " bitfld.long 0x08 3. " L2UC1 ,L2UC1" "0,1" bitfld.long 0x08 2. " L2C1 ,L2C1" "0,1" bitfld.long 0x08 1. " L2UC0 ,L2UC0" "0,1" bitfld.long 0x08 0. " L2C0 ,L2C0" "0,1" line.long 0x0C "IMRAM1ERRSTR,MMU RAM1 Error Status Register" eventfld.long 0x0C 7. " L2UC3 ,L2UC3" "0,1" eventfld.long 0x0C 6. " L2C3 ,L2C3" "0,1" eventfld.long 0x0C 5. " L2UC2 ,L2UC2" "0,1" eventfld.long 0x0C 4. " L2C2 ,L2C2" "0,1" textline " " eventfld.long 0x0C 3. " L2UC1 ,L2UC1" "0,1" eventfld.long 0x0C 2. " L2C1 ,L2C1" "0,1" eventfld.long 0x0C 1. " L2UC0 ,L2UC0" "0,1" eventfld.long 0x0C 0. " L2C0 ,L2C0" "0,1" tree.end elif cpuis("R8A77420")||cpuis("R8A77430")||cpuis("R8A77440") tree "Monitor Registers" width 13. if (((per.l(ad:0xE62A0000+0x580)&0x1))==0x1) if (((per.l(ad:0xE62A0000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE62A0000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif tree.end else tree "Monitor Registers" width 13. if (((per.l(ad:0xE62A0000+0x580)&0x1))==0x1) if (((per.l(ad:0xE62A0000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif else if (((per.l(ad:0xE62A0000+0x580)&0x3000))==0x3000) group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 8.--9. " SEL ,Indicates the MMU table number to be monitored" "0,1,2,3" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x580++0x03 line.long 0x00 "IMPFMMCTR,MMU Performance Monitor Control Register" bitfld.long 0x00 12.--13. " MD ,Monitor mode" "40-bit MMUs,32-bit MMUs,,MMUn by SEL" bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif endif if (((per.l(ad:0xE62A0000+0x584)&0x1))==0x1) group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 1. " RST ,Reset all status and counter values" "No effect,Reset" textline " " bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" else group.long 0x584++0x03 line.long 0x00 "IMPFMDCTR,DVM Performance Monitor Control Register" bitfld.long 0x00 16.--17. " DVMSEL_1 ,Selects monitor mode 1" "ASID,VA,ERR," bitfld.long 0x00 12.--13. " DVMSEL_0 ,Selects monitor mode 0" "ASID,VA,ERR," bitfld.long 0x00 0. " EN ,Performance monitor enable" "Disabled,Enabled" endif group.long 0x590++0x0F line.long 0x00 "IMPFMMTOTAL,MMU Performance Monitor Total Translation Counter" hexmask.long.tbyte 0x00 0.--23. 1. " TOTAL ,The total number of translation requests" line.long 0x04 "IMPFMHIT,MMU Performance Monitor Hit Counter" hexmask.long.tbyte 0x04 0.--23. 1. " HIT ,The total number of TLB hit requests" line.long 0x08 "IMPFML3MISS,MMU Performance Monitor L3 Miss Counter" hexmask.long.tbyte 0x08 0.--23. 1. " L3MISS ,The total number of L3 miss requests (not including L2 miss and L1 miss)" line.long 0x0C "IMPFML2MISS,MMU Performance Monitor L2 Miss Counter" hexmask.long.tbyte 0x0C 0.--23. 1. " L2MISS ,The total number of L2 miss requests (not including L1 miss)" group.long 0x5B0++0x0F line.long 0x00 "IMPFMDTOTAL,DVM Monitor Total Transaction Counter" hexmask.long.word 0x00 16.--31. 1. " SYNCTOTAL ,The total number of DVM Sync transactions" hexmask.long.word 0x00 0.--15. 1. " INVTOTAL ,The total number of TLB Invalidate transactions" line.long 0x04 "IMPFMDUSER,DVM Monitor User Counter" hexmask.long.word 0x04 16.--31. 1. " UCNT_1 ,The total number of TLB Invalidate transactions chosen by DVMSEL1" hexmask.long.word 0x04 0.--15. 1. " UCNT_0 ,The total number of TLB Invalidate transactions chosen by DVMSEL0" line.long 0x08 "IMPFMDLINV0,DVM Monitor Last TLB Invalidate 0" line.long 0x0C "IMPFMDLINV1,DVM Monitor Last TLB Invalidate 1" tree.end endif width 0x0B tree.end tree.end tree "LBSC within Bus Bridge" base ad:0xFEC00200 width 12. group.long 0x200++0x07 line.long 0x00 "CS0CTRL,Area 0 Control Register" sif ((cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77420")||(cpu()=="R8A77470")||(cpu()=="R8A77440")) rbitfld.long 0x00 8. " 128B ,Area 0 capacity indication (Mbytes)" "64,128" rbitfld.long 0x00 4.--5. " CS0SZ ,Area 0 bus size indication (bits)" ",8,16,?..." textline " " elif (cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*"))||(cpuis("R8A77960*"))||(cpuis("R8A77990*")) rbitfld.long 0x00 4.--5. " CS0SZ ,Area 0 bus size indication (bits)" ",8,16,?..." textline " " else bitfld.long 0x00 15. " ENDIAN ,Endian indication" "Big,Little" bitfld.long 0x00 8. " 128B ,Area 0 capacity indication (Mbytes)" "64,128" bitfld.long 0x00 4.--5. " CS0SZ ,Area 0 bus size indication (bits)" ",8,16,?..." textline " " endif bitfld.long 0x00 0.--1. " CS0IF ,Area 0 interface select" "Standard,Burst ROM,?..." line.long 0x04 "CS1CTRL,Area 1 Control Register" bitfld.long 0x04 4.--5. " CS1SZ ,Area 1 bus size selection (bits)" ",8,16,?..." bitfld.long 0x04 2. " CS1BRM ,Area 1 byte-control SRAM mode selection" "/CS,/RD" textline " " sif ((cpu()=="R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*")||cpuis("R8A77960*")||cpuis("R8A77990*")||(cpu()=="R8A77470")) bitfld.long 0x04 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x04 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") if (((per.l(ad:0xFEC00200+0x200+0x8))&0x3)==0x01) group.long (0x200+0x8)++0x03 line.long 0x00 "ECS0CTRL,Expansion Area 0 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS0CP ,Expansion area 0 capacity setting" bitfld.long 0x00 4.--5. " ECS0SZ ,Expansion area 0 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS0BRM ,Expansion area 0 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS0IF ,Expansion area 0 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x8)++0x03 line.long 0x00 "ECS0CTRL,Expansion Area 0 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS0CP ,Expansion area 0 capacity setting" bitfld.long 0x00 4.--5. " ECS0SZ ,Expansion area 0 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS0IF ,Expansion area 0 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0xC))&0x3)==0x01) group.long (0x200+0xC)++0x03 line.long 0x00 "ECS1CTRL,Expansion Area 1 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS1CP ,Expansion area 1 capacity setting" bitfld.long 0x00 4.--5. " ECS1SZ ,Expansion area 1 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS1BRM ,Expansion area 1 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS1IF ,Expansion area 1 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0xC)++0x03 line.long 0x00 "ECS1CTRL,Expansion Area 1 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS1CP ,Expansion area 1 capacity setting" bitfld.long 0x00 4.--5. " ECS1SZ ,Expansion area 1 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS1IF ,Expansion area 1 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x10))&0x3)==0x01) group.long (0x200+0x10)++0x03 line.long 0x00 "ECS2CTRL,Expansion Area 2 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS2CP ,Expansion area 2 capacity setting" bitfld.long 0x00 4.--5. " ECS2SZ ,Expansion area 2 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS2BRM ,Expansion area 2 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS2IF ,Expansion area 2 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x10)++0x03 line.long 0x00 "ECS2CTRL,Expansion Area 2 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS2CP ,Expansion area 2 capacity setting" bitfld.long 0x00 4.--5. " ECS2SZ ,Expansion area 2 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS2IF ,Expansion area 2 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x14))&0x3)==0x01) group.long (0x200+0x14)++0x03 line.long 0x00 "ECS3CTRL,Expansion Area 3 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS3CP ,Expansion area 3 capacity setting" bitfld.long 0x00 4.--5. " ECS3SZ ,Expansion area 3 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS3BRM ,Expansion area 3 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS3IF ,Expansion area 3 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x14)++0x03 line.long 0x00 "ECS3CTRL,Expansion Area 3 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS3CP ,Expansion area 3 capacity setting" bitfld.long 0x00 4.--5. " ECS3SZ ,Expansion area 3 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS3IF ,Expansion area 3 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x18))&0x3)==0x01) group.long (0x200+0x18)++0x03 line.long 0x00 "ECS4CTRL,Expansion Area 4 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS4CP ,Expansion area 4 capacity setting" bitfld.long 0x00 4.--5. " ECS4SZ ,Expansion area 4 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS4BRM ,Expansion area 4 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS4IF ,Expansion area 4 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x18)++0x03 line.long 0x00 "ECS4CTRL,Expansion Area 4 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS4CP ,Expansion area 4 capacity setting" bitfld.long 0x00 4.--5. " ECS4SZ ,Expansion area 4 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS4IF ,Expansion area 4 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif if (((per.l(ad:0xFEC00200+0x200+0x1C))&0x3)==0x01) group.long (0x200+0x1C)++0x03 line.long 0x00 "ECS5CTRL,Expansion Area 5 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS5CP ,Expansion area 5 capacity setting" bitfld.long 0x00 4.--5. " ECS5SZ ,Expansion area 5 bus size selection (bits)" ",8,16,?..." bitfld.long 0x00 2. " ECS5BRM ,Expansion area 5 byte-control SRAM mode" "/CS,/RD" textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS5IF ,Expansion area 5 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif else group.long (0x200+0x1C)++0x03 line.long 0x00 "ECS5CTRL,Expansion Area 5 Control Register" hexmask.long.byte 0x00 8.--14. 1. " ECS5CP ,Expansion area 5 capacity setting" bitfld.long 0x00 4.--5. " ECS5SZ ,Expansion area 5 bus size selection (bits)" ",8,16,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x00 0.--1. " CS1IF ,Area 1 interface selection" "Standard,Byte-control SRAM,?..." textline " " else bitfld.long 0x00 0.--1. " ECS5IF ,Expansion area 5 interface selection" "Standard,Byte-control SRAM,ATA,?..." textline " " endif endif endif sif ((cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(cpu()!="R8A77940")&&(cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77990*"))&&(!cpuis("R8A77965*"))&&(cpu()!="R8A77470")&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450")&&(cpu()!="R8A77440")) group.long 0x220++0x03 line.long 0x00 "CS0CTRL2,Area 0 Control 2 Register" hexmask.long.byte 0x00 8.--14. 1. " CS0CP ,Area 0 capacity setting" endif textline " " group.long 0x230++0x07 line.long 0x00 "CSWCR0,Area 0 RD/WE Pulse Control Register" sif ((cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77440")) bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif line.long 0x04 "CSWCR1,Area 1 RD/WE Pulse Control Register" sif ((cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77970*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77440")) bitfld.long 0x04 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x04 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x04 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x04 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") group.long 0x238++0x03 line.long 0x00 "ECSWCR0,Expansion Area 0 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x23C++0x03 line.long 0x00 "ECSWCR1,Expansion Area 1 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x240++0x03 line.long 0x00 "ECSWCR2,Expansion Area 2 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x244++0x03 line.long 0x00 "ECSWCR3,Expansion Area 3 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 3" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x248++0x03 line.long 0x00 "ECSWCR4,Expansion Area 4 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 4" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long 0x24C++0x03 line.long 0x00 "ECSWCR5,Expansion Area 5 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 5" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 5" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x250+0x0)++0x03 line.long 0x00 "EXDMAWCR0,LBSC-DMAC Channel 0 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 0" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 0" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x250+0x4)++0x03 line.long 0x00 "EXDMAWCR1,LBSC-DMAC Channel 1 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 1" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x250+0x8)++0x03 line.long 0x00 "EXDMAWCR2,LBSC-DMAC Channel 2 RD/WE Pulse Control Register" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 27.--31. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 11.--15. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" textline " " else bitfld.long 0x00 24.--26. " WRITE_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " WRITE_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /WE signal during writing to area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 16.--19. " WRITE_PULSE_CYCLE ,/WE pulse cycles during writing to area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8.--10. " READ_CS_SETUP_CYCLE ,/CS and address setup cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " READ_CS_HOLD_CYCLE ,/CS and address hold cycles with respect to the /RD signal during reading from area 2" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--3. " READ_PULSE_CYCLE ,/RD pulse cycles during reading from area 2" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif textline " " group.long 0x280++0x7 line.long 0x00 "CSPWCR0,Area 0 External Wait Control Register" bitfld.long 0x00 5. " V ,Area 0 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Area 0 external wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Area 0 external Wait signal polarity" "Not inverted,Inverted" textline " " endif else bitfld.long 0x00 4. " RB ,Area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Area 0 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x00 2. " EXWT2 ,Area 0 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Area 0 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " elif (cpu()=="R8A77470") bitfld.long 0x00 1. " EXWT1 ,Area 0 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif line.long 0x04 "CSPWCR1,Area 1 External Wait Control Register" bitfld.long 0x04 5. " V ,Area 1 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") sif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x04 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x04 3. " WINV ,Area 1 external wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x04 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x04 3. " WINV ,Area 1 external wait signal polarity" "Not inverted,Inverted" textline " " endif else bitfld.long 0x04 4. " RB ,Area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x04 3. " WINV ,Area 1 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x04 2. " EXWT2 ,Area 1 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x04 1. " EXWT1 ,Area 1 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " EXWT0 ,Area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " elif (cpu()=="R8A77470") bitfld.long 0x04 1. " EXWT1 ,Area 1 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x04 0. " EXWT0 ,Area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x04 0. " EXWT0 ,Area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif sif ((!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77990*"))&&(!cpuis("R8A77965*"))&&(cpu()!="R8A77470")) group.long (0x288+0x0)++0x03 line.long 0x00 "ECSPWCR0,Expansion Area 0 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 0 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 0 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 0 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 0 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 0 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 0 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 0 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x4)++0x03 line.long 0x00 "ECSPWCR1,Expansion Area 1 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 1 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 1 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 1 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 1 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 1 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 1 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 1 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x8)++0x03 line.long 0x00 "ECSPWCR2,Expansion Area 2 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 2 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 2 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 2 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 2 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 2 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 2 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 2 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 2 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 2 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0xC)++0x03 line.long 0x00 "ECSPWCR3,Expansion Area 3 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 3 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 3 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 3 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 3 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 3 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 3 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 3 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 3 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 3 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x10)++0x03 line.long 0x00 "ECSPWCR4,Expansion Area 4 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 4 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 4 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 4 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 4 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 4 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 4 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 4 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 4 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 4 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif group.long (0x288+0x14)++0x03 line.long 0x00 "ECSPWCR5,Expansion Area 5 External Wait Control Register" bitfld.long 0x00 5. " V ,Expansion area 5 external wait signal Enable/Disable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X") bitfld.long 0x00 4. " RB ,Expansion area 5 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 5 External wait signal polarity" "Not inverted,Inverted" textline " " else bitfld.long 0x00 4. " RB ,Expansion area 5 READY/BUSY logic selection" "Busy,Ready" bitfld.long 0x00 3. " WINV ,Expansion area 5 external wait signal polarity" "Not inverted,Inverted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 2. " EXWT2 ,Expansion area 5 EX_WAIT2 enable" "Disabled,Enabled" bitfld.long 0x00 1. " EXWT1 ,Expansion area 5 EX_WAIT1 enable" "Disabled,Enabled" bitfld.long 0x00 0. " EXWT0 ,Expansion area 5 EX_WAIT0 enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 0. " EXWT0 ,Expansion area 5 EX_WAIT0 enable" "Disabled,Enabled" textline " " endif endif group.long 0x2A0++0x03 line.long 0x00 "EXWTSYNC,External Wait Input Control Register" sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")&&(!cpuis("R8A77970*")))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x00 2. " EXWTSYNC2 ,EX_WAIT[2] synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 1. " EXWTSYNC1 ,EX_WAIT[1] synchronize" "Not synchronized,Synchronized" textline " " bitfld.long 0x00 0. " EXWTSYNC0 ,EX_WAIT[0] synchronize" "Not synchronized,Synchronized" textline " " elif (cpu()=="R8A77470") bitfld.long 0x00 1. " EXWTSYNC1 ,EX_WAIT[1] synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 0. " EXWTSYNC0 ,EX_WAIT[0] synchronize" "Not synchronized,Synchronized" textline " " endif if (((per.l(ad:0xFEC00200+0x200))&0x03)==0x01) group.long 0x2B0++0x03 line.long 0x00 "CS0BSTCTL,Area 0 Burst Control Register" bitfld.long 0x00 11.--13. " A0BST ,Area 0 burst length for burst ROM interface" "No transfer,4,8,16,32,No transfer,No transfer,No transfer" else hgroup.long 0x2B0++0x03 hide.long 0x00 "CS0BSTCTL,Area 0 Burst Control Register" endif textline " " group.long 0x2B4++0x03 line.long 0x00 "CS0BTPH,Area 0 Burst Pitch Set Register" bitfld.long 0x00 8. " A0H ,/CS and address hold cycles with respect to the /RD signal for area 0" "0,1" bitfld.long 0x00 4.--7. " A0W ,Burst pitch after the first burst cycle for area 0" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--2. " A0B ,Burst pitch after the second burst cycle for area 0" ",1,2,3,4,5,6,7" group.long 0x2C0++0x3 line.long 0x00 "CS1GDST,Area 1 Guard Set Register" bitfld.long 0x00 4. " CS1GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Area 1 guard interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" sif ((!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))) sif (cpu()!="R8A77470") group.long 0x2C4++0x03 line.long 0x00 "ECS0GDST,Expansion Area 0 Guard Set Register" bitfld.long 0x00 4. " ECS0GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 0 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2C8++0x03 line.long 0x00 "ECS1GDST,Expansion Area 1 Guard Set Register" bitfld.long 0x00 4. " ECS1GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 1 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2CC++0x03 line.long 0x00 "ECS2GDST,Expansion Area 2 Guard Set Register" bitfld.long 0x00 4. " ECS2GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 2 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2D0++0x03 line.long 0x00 "ECS3GDST,Expansion Area 3 Guard Set Register" bitfld.long 0x00 4. " ECS3GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 3 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2D4++0x03 line.long 0x00 "ECS4GDST,Expansion Area 4 Guard Set Register" bitfld.long 0x00 4. " ECS4GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 4 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x2D8++0x03 line.long 0x00 "ECS5GDST,Expansion Area 5 Guard Set Register" bitfld.long 0x00 4. " ECS5GD ,TIMER_SET setting valid" "Invalid,Valid" bitfld.long 0x00 0.--3. " TIMER_SET ,Expansion Area 5 guard (access prohibition) interval between sequential access cycles" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif group.long (0x2F0+0x0)++0x03 line.long 0x00 "EXDMASET0,LBSC-DMAC Channel 0 Area Assignment Register" sif (cpu()!="R8A77470") bitfld.long 0x00 7. " DMYECS5 ,LBSC-DMAC channel 0 to expansion area 5 assign" "Not assigned,Assigned" bitfld.long 0x00 6. " DMYECS4 ,LBSC-DMAC channel 0 to expansion area 4 assign" "Not assigned,Assigned" bitfld.long 0x00 5. " DMYECS3 ,LBSC-DMAC channel 0 to expansion area 3 assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 4. " DMYECS2 ,LBSC-DMAC channel 0 to expansion area 2 assign" "Not assigned,Assigned" bitfld.long 0x00 3. " DMYECS1 ,LBSC-DMAC channel 0 to expansion area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 2. " DMYECS0 ,LBSC-DMAC channel 0 to expansion area 0 assign" "Not assigned,Assigned" textline " " endif bitfld.long 0x00 1. " DMYCS1 ,LBSC-DMAC channel 0 to area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 0. " DMYCS0 ,LBSC-DMAC channel 0 to area 0 assign" "Not assigned,Assigned" group.long (0x2F0+0x4)++0x03 line.long 0x00 "EXDMASET1,LBSC-DMAC Channel 1 Area Assignment Register" sif (cpu()!="R8A77470") bitfld.long 0x00 7. " DMYECS5 ,LBSC-DMAC channel 1 to expansion area 5 assign" "Not assigned,Assigned" bitfld.long 0x00 6. " DMYECS4 ,LBSC-DMAC channel 1 to expansion area 4 assign" "Not assigned,Assigned" bitfld.long 0x00 5. " DMYECS3 ,LBSC-DMAC channel 1 to expansion area 3 assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 4. " DMYECS2 ,LBSC-DMAC channel 1 to expansion area 2 assign" "Not assigned,Assigned" bitfld.long 0x00 3. " DMYECS1 ,LBSC-DMAC channel 1 to expansion area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 2. " DMYECS0 ,LBSC-DMAC channel 1 to expansion area 0 assign" "Not assigned,Assigned" textline " " endif bitfld.long 0x00 1. " DMYCS1 ,LBSC-DMAC channel 1 to area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 0. " DMYCS0 ,LBSC-DMAC channel 1 to area 0 assign" "Not assigned,Assigned" group.long (0x2F0+0x8)++0x03 line.long 0x00 "EXDMASET2,LBSC-DMAC Channel 2 Area Assignment Register" sif (cpu()!="R8A77470") bitfld.long 0x00 7. " DMYECS5 ,LBSC-DMAC channel 2 to expansion area 5 assign" "Not assigned,Assigned" bitfld.long 0x00 6. " DMYECS4 ,LBSC-DMAC channel 2 to expansion area 4 assign" "Not assigned,Assigned" bitfld.long 0x00 5. " DMYECS3 ,LBSC-DMAC channel 2 to expansion area 3 assign" "Not assigned,Assigned" textline " " bitfld.long 0x00 4. " DMYECS2 ,LBSC-DMAC channel 2 to expansion area 2 assign" "Not assigned,Assigned" bitfld.long 0x00 3. " DMYECS1 ,LBSC-DMAC channel 2 to expansion area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 2. " DMYECS0 ,LBSC-DMAC channel 2 to expansion area 0 assign" "Not assigned,Assigned" textline " " endif bitfld.long 0x00 1. " DMYCS1 ,LBSC-DMAC channel 2 to area 1 assign" "Not assigned,Assigned" bitfld.long 0x00 0. " DMYCS0 ,LBSC-DMAC channel 2 to area 0 assign" "Not assigned,Assigned" textline " " group.long (0x310+0x0)++0x03 line.long 0x00 "EXDMCR0,LBSC-DMAC Channel 0 Control Register" bitfld.long 0x00 15. " DRST ,DACK signal forcible negation" "Not negated,Negated" textline " " sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " else bitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 12. " DBST ,Continuously assert the DACK signal" "Negated,Asserted" textline " " endif bitfld.long 0x00 10. " EXQL ,DREQ[0] signal low/high level receive" "Low,High" bitfld.long 0x00 9. " EXDY ,DREQ[0] signal synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 8. " EXDS ,DREQ[0] signal at an level/edge detect" "Level,Edge" textline " " bitfld.long 0x00 5. " EXRS ,Number of DRACK[0] clock cycles before /CS|DACK[0] asserted" "1,2" bitfld.long 0x00 4. " EXRL ,DRACK[0] low/high-active signal output" "High-active,Low-active" bitfld.long 0x00 2. " EXAL ,DACK[0] low/high-active signal output" "High-active,Low-active" textline " " bitfld.long 0x00 0.--1. " DAKCTL ,Signals asserted for area where LBSC-DMAC channel 0 is assigned" "/CS & DACK[0],/CS,DACK[0],/CS & DACK[0]" group.long (0x310+0x4)++0x03 line.long 0x00 "EXDMCR1,LBSC-DMAC Channel 1 Control Register" bitfld.long 0x00 15. " DRST ,DACK signal forcible negation" "Not negated,Negated" textline " " sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " else bitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 12. " DBST ,Continuously assert the DACK signal" "Negated,Asserted" textline " " endif bitfld.long 0x00 10. " EXQL ,DREQ[1] signal low/high level receive" "Low,High" bitfld.long 0x00 9. " EXDY ,DREQ[1] signal synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 8. " EXDS ,DREQ[1] signal at an level/edge detect" "Level,Edge" textline " " bitfld.long 0x00 5. " EXRS ,Number of DRACK[0] clock cycles before /CS|DACK[0] asserted" "1,2" bitfld.long 0x00 4. " EXRL ,DRACK[0] low/high-active signal output" "High-active,Low-active" bitfld.long 0x00 2. " EXAL ,DACK[1] low/high-active signal output" "High-active,Low-active" textline " " bitfld.long 0x00 0.--1. " DAKCTL ,Signals asserted for area where LBSC-DMAC channel 1 is assigned" "/CS & DACK[1],/CS,DACK[1],/CS & DACK[1]" group.long (0x310+0x8)++0x03 line.long 0x00 "EXDMCR2,LBSC-DMAC Channel 2 Control Register" bitfld.long 0x00 15. " DRST ,DACK signal forcible negation" "Not negated,Negated" textline " " sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A7792X")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " else bitfld.long 0x00 13. " DSTS ,DACK signal assert state indication" "Not asserted,Asserted" textline " " endif sif (cpu()!="R8A7792X") bitfld.long 0x00 12. " DBST ,Continuously assert the DACK signal" "Negated,Asserted" textline " " endif bitfld.long 0x00 10. " EXQL ,DREQ[2] signal low/high level receive" "Low,High" bitfld.long 0x00 9. " EXDY ,DREQ[2] signal synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 8. " EXDS ,DREQ[2] signal at an level/edge detect" "Level,Edge" textline " " bitfld.long 0x00 5. " EXRS ,Number of DRACK[0] clock cycles before /CS|DACK[0] asserted" "1,2" bitfld.long 0x00 4. " EXRL ,DRACK[0] low/high-active signal output" "High-active,Low-active" bitfld.long 0x00 2. " EXAL ,DACK[2] low/high-active signal output" "High-active,Low-active" textline " " bitfld.long 0x00 0.--1. " DAKCTL ,Signals asserted for area where LBSC-DMAC channel 2 is assigned" "/CS & DACK[2],/CS,DACK[2],/CS & DACK[2]" endif rgroup.long 0x330++0x03 line.long 0x00 "BCINTSR,BSC Interrupt Source Status Register" bitfld.long 0x00 1. " EXWTE ,EX-BUS wait timeout error status" "No error,Error" textline " " sif (cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") bitfld.long 0x00 0. " ATTE ,ATA wait timeout error status" "No error,Error" endif wgroup.long 0x334++0x03 line.long 0x00 "BCINTCR,BSC Interrupt Source Clear Register" bitfld.long 0x00 1. " EXWTEC ,EX-BUS wait timeout error status clear" "No effect,Clear" textline " " sif (cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")&&(cpu()!="R8A77440") bitfld.long 0x00 0. " ATTEC ,ATA wait timeout error status clear" "No effect,Clear" endif group.long 0x338++0x03 line.long 0x00 "BCINTMR,BSC Interrupt Enable Register" bitfld.long 0x00 1. " EXWTEM ,EX-BUS wait timeout error interrupt enable" "Disabled,Enabled" textline " " sif (cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470") bitfld.long 0x00 0. " ATTEM ,ATA wait timeout error interrupt enable" "Disabled,Enabled" endif sif (!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*")) group.long 0x340++0x03 line.long 0x00 "EXBATLV,EX_BUS Priority Level Set Register" bitfld.long 0x00 0. " EX-BLV ,Priority level setting for EX_BUS arbitration (higher/lower)" "PIO/LBSC-DMAC,LBSC-DMAC/PIO" endif textline " " rgroup.long 0x344++0x03 line.long 0x00 "EXWTSTS,External Wait Status Register" sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) bitfld.long 0x00 2. " EXWT2STS ,Indicates the EX_WAIT2 pin state" "Low,High" bitfld.long 0x00 1. " EXWT1STS ,Indicates the EX_WAIT1 pin state" "Low,High" bitfld.long 0x00 0. " EXWT0STS ,Indicates the EX_WAIT0 pin state" "Low,High" textline " " elif (cpu()=="R8A77470") bitfld.long 0x00 1. " EXWT1STS ,Indicates the EX_WAIT1 pin state" "Low,High" bitfld.long 0x00 0. " EXWT0STS ,Indicates the EX_WAIT0 pin state" "Low,High" textline " " else bitfld.long 0x00 0. " EXWT0STS ,Indicates the EX_WAIT0 pin state" "Low,High" textline " " endif sif ((cpu()!="R8A7792X")&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*"))&&(!cpuis("R8A77970*"))&&(!cpuis("R8A77960*"))&&(!cpuis("R8A77965*"))&&(!cpuis("R8A77990*"))&&(cpu()!="R8A77470")) group.long 0x380++0x03 line.long 0x00 "ATACSCTRL,ATACS Control Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A77420")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x00 6. " ATAECS5_EN ,ATACS signal at area 5 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 5. " ATAECS4_EN ,ATACS signal at area 4 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 4. " ATAECS3_EN ,ATACS signal at area 3 in ATA mode" "ATACS0,ATACS1" textline " " bitfld.long 0x00 3. " ATAECS2_EN ,ATACS signal at area 2 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 2. " ATAECS1_EN ,ATACS signal at area 1 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 1. " ATAECS0_EN ,ATACS signal at area 0 in ATA mode" "ATACS0,ATACS1" textline " " bitfld.long 0x00 0. " ATACS1_EN ,ATACS signal at area 1 in ATA mode" "ATACS0,ATACS1" textline " " else bitfld.long 0x00 5. " ATAECS5_EN ,ATACS signal at area 5 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 4. " ATAECS4_EN ,ATACS signal at area 4 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 3. " ATAECS3_EN ,ATACS signal at area 3 in ATA mode" "ATACS0,ATACS1" textline " " bitfld.long 0x00 2. " ATAECS2_EN ,ATACS signal at area 2 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 1. " ATAECS1_EN ,ATACS signal at area 1 in ATA mode" "ATACS0,ATACS1" bitfld.long 0x00 0. " ATAECS0_EN ,ATACS signal at area 0 in ATA mode" "ATACS0,ATACS1" endif endif group.long 0x3C0++0x07 line.long 0x00 "EXBCT,EX-BUS Wait Timeout Detection Base Counter Register" hexmask.long.byte 0x00 24.--31. 1. " EXWB_KEY ,EX-BUS wait timeout detection base counter register write key" hexmask.long.tbyte 0x00 0.--19. 1. " EXW_TOBCNT ,EX-BUS wait timeout counter setting" line.long 0x04 "EXTCT,EX-BUS Wait Timeout Detection Counter Register" hexmask.long.byte 0x04 24.--31. 1. " EXWB_KEY ,EX-BUS wait timeout detection counter register write key" bitfld.long 0x04 16. " EXW_TOEN ,EX-BUS wait timeout enable" "Disabled,Enabled" hexmask.long.word 0x04 0.--11. 1. " EXW_TOCNT ,EX-BUS wait timeout counter setting" sif (cpu()=="RCARM2")||(cpu()=="R8A77940")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") group.long 0x010++0x07 line.long 0x00 "EXTSR,EX-BUS Wait Timeout Detection Access Source Indication Register" eventfld.long 0x00 16. " EXW_TOSHW ,Timeout for access to the EX-BUS from superHyway" "No timeout,Timeout" eventfld.long 0x00 2. " EXW_TODC2 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 2" "No timeout,Timeout" eventfld.long 0x00 1. " EXW_TODC1 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 1" "No timeout,Timeout" textline " " eventfld.long 0x00 0. " EXW_TODC0 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 0" "No timeout,Timeout" line.long 0x04 "EXTADR,EX-BUS Wait Timeout Detection Address Indication Register" elif cpuis("R8J7795*")||cpuis("R8A7795*")||cpu()==("R8A77970")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77990*")) group.long 0x010++0x07 line.long 0x00 "EXTSR,EX-BUS Wait Timeout Detection Access Source Indication Register" eventfld.long 0x00 16. " EXW_TOSHW ,Timeout for access to the EX-BUS from SuperHyway" "No timeout,Timeout" line.long 0x04 "EXTADR,EX-BUS Wait Timeout Detection Address Indication Register" else group.long 0x010++0x07 line.long 0x00 "EXTSR,EX-BUS Wait Timeout Detection Access Source Indication Register" bitfld.long 0x00 16. " EXW_TOSHW ,Timeout for access to the EX-BUS from SuperHyway" "No timeout,Timeout" bitfld.long 0x00 2. " EXW_TODC2 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 2" "No timeout,Timeout" bitfld.long 0x00 1. " EXW_TODC1 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 1" "No timeout,Timeout" textline " " bitfld.long 0x00 0. " EXW_TODC0 ,Timeout for access to the EX-BUS from LBSC-DMAC channel 0" "No timeout,Timeout" line.long 0x04 "EXTADR,EX-BUS Wait Timeout Detection Address Indication Register" endif width 0x0B tree.end tree.open "DBSC3 (DDR3-SDRAM Interface)" tree "DBSC3 0" base ad:0xE6790000 width 14. sif cpu()=="R8A77940" hgroup.long 0x0C++0x03 hide.long 0x00 "DBSTATE_1,DBSC3 status register 1" else rgroup.long 0x0C++0x03 line.long 0x00 "DBSTATE_1,DBSC3 status register 1" bitfld.long 0x00 16.--17. " THRML ,External Temperature Sensor" "Higher than -10 C,Higher/lower than -15 C/-10 C,,-15 C or lower" endif group.long 0x10++0x07 line.long 0x00 "DBACEN,SDRAM access enable register" bitfld.long 0x00 0. " ACCEN ,SDRAM Access Enable" "Disabled,Enabled" line.long 0x04 "DBRFEN,Auto-refresh enable register" bitfld.long 0x04 0. " ARFEN ,Auto-Refresh Enable" "Stop,Start" if ((((per.l(ad:0xE6790000+0x18))&0x3F000000)==0x28000000)||(((per.l(ad:0xE6790000+0x18))&0x3F000000)==0x29000000)||(((per.l(ad:0xE6790000+0x18))&0x3F000000)==0x2A000000)||(((per.l(ad:0xE6790000+0x18))&0x3F000000)==0x2B000000)) group.long 0x18++0x03 line.long 0x00 "DBCMD,Manual command-issuing register" bitfld.long 0x00 24.--29. " OPC ,Operation Code" "Device Deselected Issued,,ZQ Calibration Short Issued,ZQ Calibration Long Issued,,,,,,,,Precharge All Issued,Refresh Issued,,,,Power Down Entry,Power Down Exit,,,,,,,Self-Refresh Entry,Self-Refresh Exit,,,,,,,Set Reset Pins to Low,Set Reset Pins to High,,,,,,,ModeRegisterSet 0 Issued,ModeRegisterSet 1 Issued,ModeRegisterSet 2 Issued,ModeRegisterSet 3 Issued,?..." hexmask.long.word 0x00 0.--15. 1. " ARG ,Parameter Bits - value to be issued on the address pins (MA) of SDRAM" else group.long 0x18++0x03 line.long 0x00 "DBCMD,Manual command-issuing register" bitfld.long 0x00 24.--29. " OPC ,Operation Code" "Device Deselected Issued,,ZQ Calibration Short Issued,ZQ Calibration Long Issued,,,,,,,,Precharge All Issued,Refresh Issued,,,,Power Down Entry,Power Down Exit,,,,,,,Self-Refresh Entry,Self-Refresh Exit,,,,,,,Set Reset Pins to Low,Set Reset Pins to High,,,,,,,ModeRegisterSet 0 Issued,ModeRegisterSet 1 Issued,ModeRegisterSet 2 Issued,ModeRegisterSet 3 Issued,?..." hexmask.long.word 0x00 0.--15. 1. " ARG ,Parameter Bits - minimum interval to issuing of the next command in SDRAM cycles" endif rgroup.long 0x1C++0x03 line.long 0x00 "DBWAIT,Operation completion waiting register" bitfld.long 0x00 0. " WAIT ,Operation Completion Waiting" "Low,High" group.long 0x20++0x07 line.long 0x00 "DBKIND,SDRAM type setting register" bitfld.long 0x00 0.--2. " DDCG ,SDRAM Kind" ",,,,,,,DDR3-SDRAM" line.long 0x04 "DBCONF_0,SDRAM configuration setting register 0" bitfld.long 0x04 24.--28. " AWRW0 ,Row Address Bit Width Setting" ",,,,,,,,,,,,12 bits,13 bits,14 bits,15 bits,16 bits,?..." bitfld.long 0x04 20. " AWRK0 ,Number of Ranks Setting" "One rank,?..." textline " " bitfld.long 0x04 16.--17. " AWBK0 ,Number of Banks Setting" ",,,Eight banks" bitfld.long 0x04 8.--11. " AWCL0 ,Column Address Bit Width Setting" ",,,,,,,,,9 bits,10 bits,?..." textline " " bitfld.long 0x04 0.--1. " DW0 ,External Data Bus Width Setting" ",16 bits,32 bits,?..." group.long 0x30++0x3 line.long 0x00 "DBPHYTYPE,PHY Type Setting Register" bitfld.long 0x00 0.--1. " PHYTYPE ,PHY Type Setting Bits" ",DFI,?..." group.long 0x40++0x0B line.long 0x00 "DBTR_0,SDRAM Timing Register 0" bitfld.long 0x00 0.--3. " CL ,CAS Latency Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,?..." line.long 0x04 "DBTR_1,SDRAM Timing Register 1" bitfld.long 0x04 0.--3. " CWL ,CAS Write Latency Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,?..." line.long 0x08 "DBTRv2,SDRAM Timing Register 2" bitfld.long 0x08 0.--3. " AL ,Additive Latency Setting" "0 cycles,?..." group.long 0x50++0x43 line.long 0x00 "DBTR_3,SDRAM Timing Register 3" bitfld.long 0x00 0.--4. " TRCD ,ACT to READ/ACT to WRITE Interval Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x04 "DBTR_4,SDRAM Timing Register 4" bitfld.long 0x04 16.--20. " TRPA ,PREA Time Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.long 0x04 0.--4. " TRP ,PRE Time Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" line.long 0x08 "DBTR_5,SDRAM Timing Register 5" bitfld.long 0x08 0.--5. " TRC ,ACT to ACT/ACT to REF Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles,62 cycles,63 cycles" line.long 0x0C "DBTR_6,SDRAM Timing Register 6" bitfld.long 0x0C 0.--5. " TRAS ,ACT to PRE Interval Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,?..." line.long 0x10 "DBTR_7,SDRAM Timing Register 7" bitfld.long 0x10 0.--3. " TRRD ,ACT(A) to ACT(B) Interval Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x14 "DBTR_8,SDRAM Timing Register 8" hexmask.long.byte 0x14 0.--7. 1. " TFAW ,Four Activate Window Length Setting" line.long 0x18 "DBTR_9,SDRAM Timing Register 9" bitfld.long 0x18 0.--3. " TRDPR ,READ-PRE Interval Setting" ",,,,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x1C "DBTR_10,SDRAM Timing Register 10" bitfld.long 0x1C 0.--3. " TWR ,Write-Recovery Period Setting" ",,,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,?..." line.long 0x20 "DBTR_11,SDRAM Timing Register 11" bitfld.long 0x20 0.--5. " TRDWR ,READ to WRITE Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,?..." line.long 0x24 "DBTR_12,SDRAM Timing Register 12" bitfld.long 0x24 0.--5. " TWRRD ,WRITE to READ Interval Setting" ",,,,,,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,?..." line.long 0x28 "DBTR_13,SDRAM Timing Register 13" hexmask.long.word 0x28 0.--11. 1. " TRFC ,REF to ACT/ACT to REF Interval Setting" line.long 0x2C "DBTR_14,SDRAM Timing Register 14" hexmask.long.byte 0x2C 16.--23. 1. " TCKEHDLL ,CKEH (DLL-LOCK) Period Setting" hexmask.long.byte 0x2C 0.--7. 1. " TCKEH ,CKEH Period Setting" line.long 0x30 "DBTR_15,SDRAM Timing Register 15" bitfld.long 0x30 16.--19. " TCKESR ,CKESR Period Setting Bits" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" bitfld.long 0x30 0.--3. " TCKEL ,CKEL Period Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles" line.long 0x34 "DBTR_16,SDRAM Timing Register 16" bitfld.long 0x34 28.--31. " DQIENLTNCY ,Dqienltncy Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,?..." bitfld.long 0x34 16.--21. " DQL ,Dqltncy Setting" ",,,,,,,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles,32 cycles,33 cycles,34 cycles,35 cycles,36 cycles,37 cycles,38 cycles,39 cycles,40 cycles,41 cycles,42 cycles,43 cycles,44 cycles,45 cycles,46 cycles,47 cycles,48 cycles,49 cycles,50 cycles,51 cycles,52 cycles,53 cycles,54 cycles,55 cycles,56 cycles,57 cycles,58 cycles,59 cycles,60 cycles,61 cycles,62 cycles,63 cycles" textline " " bitfld.long 0x34 12.--15. " DQENLTNCY ,Dqenltncy Setting" "0 cycles,1 cycles,2 cycles,3 cycles,4 cycles,5 cycles,?..." bitfld.long 0x34 0.--3. " WDQL ,Wdqltncy Setting" ",One cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,?..." line.long 0x38 "DBTR_17,SDRAM Timing Register 17" bitfld.long 0x38 16.--21. " TMOD ,MRS Time Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,14 cycles,15 cycles,?..." line.long 0x3C "DBTR_18,SDRAM Timing Register 18" bitfld.long 0x3C 24.--26. " RODTL ,ODT Assert Period Setting at Read" "BL/2 cycles,BL/2 + 1 cycles,BL/2 + 2 cycles,BL/2 + 3 cycles,BL/2 + 4 cycles,BL/2 + 5 cycles,BL/2 + 6 cycles,BL/2 + 7 cycles" bitfld.long 0x3C 16.--18. " RODTA ,ODT Assert Start Timing Setting Bits Read" "Simultaneous with the read,One cycle after the read,Two cycles after the read,Three cycles after the read,?..." textline " " bitfld.long 0x3C 8.--10. " WODTL ,ODT Assert Period Setting at Write" "BL/2 cycles,BL/2 + 1 cycles,BL/2 + 2 cycles,BL/2 + 3 cycles,BL/2 + 4 cycles,BL/2 + 5 cycles,BL/2 + 6 cycles,BL/2 + 7 cycles" bitfld.long 0x3C 0.--2. " WODTA ,ODT Assert Start Timing Setting at Write" "Simultaneous with the read,1 cycle after the read,2 cycles after the read,3 cycles after the read,?..." line.long 0x40 "DBTR_19,SDRAM Timing Register 19" hexmask.long.byte 0x40 0.--7. 1. " TZQCS ,Calibration Period Setting" group.long 0xB0++0x3 line.long 0x00 "DBBL,SDRAM operation setting register" bitfld.long 0x00 0.--1. " BL ,Burst Length Setting" "Fixed to 8,?..." group.long 0xC0++0x3 line.long 0x00 "DBADJ_0,DBSC3 operation adjustment register 0" bitfld.long 0x00 16.--17. " FREQRATIO ,PHY Frequency Ratio Setting Bits" ",,1:4,?..." bitfld.long 0x00 0. " CAMODE ,Command/Address Output Mode Setting" ",1 command output in 2 clock cycle" group.long 0xC8++0x3 line.long 0x00 "DBADJ_2,DBSC3 operation adjustment register 2" hexmask.long.byte 0x00 24.--31. 1. " ACAPC1 ,Bits for Setting Data Cell Count Acceptable by Device Control Unit" bitfld.long 0x00 16.--19. " ACAPX1 ,Bits for Setting Transaction Count Acceptable by Device Control Unit" ",,,,,,,,8 transactions,?..." textline " " hexmask.long.byte 0x00 8.--15. 1. " ACAPC0 ,Bits for Setting Data Cell Count Acceptable by Device Control Unit" bitfld.long 0x00 0.--3. " ACAPX0 ,Bits for Setting Transaction Count Acceptable by Device Control Unit" ",,,,,,,,8 transactions,?..." group.long 0xE0++0xB line.long 0x00 "DBRFCNF_0,Refresh configuration register 0" hexmask.long.word 0x00 0.--11. 1. " REFTHF ,Forcible Auto-Refresh Threshold Setting" line.long 0x04 "DBRFCNF_1,Refresh configuration register 1" bitfld.long 0x04 16.--19. " REFPMAX ,Maximum Post Number of Refresh Commands Setting" ",,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,?..." hexmask.long.word 0x04 0.--15. 1. " REFINT ,Average Refresh Interval Setting" line.long 0x08 "DBRFCNF_2,Refresh configuration register 2" bitfld.long 0x08 16.--19. " REFPMIN ,Minimum Post Number of Refresh Commands Setting Bits" ",1,?..." bitfld.long 0x08 0. " REFINTS ,Average Refresh Interval Adjustment" "REFINT,1/2 REFINT" group.long 0xF4++0x7 line.long 0x00 "DBCALCNF,DDR3-SDRAM calibration configuration register" bitfld.long 0x00 24. " CALEN ,DDR3-SDRAM Calibration Enable" "Disabled,Enabled" hexmask.long.word 0x00 0.--15. 1. " CALINT ,DDR3-SDRAM Calibration Frequency Setting Bits" line.long 0x04 "DBCALTR,DDR3-SDRAM calibration timing register" hexmask.long.word 0x04 16.--27. 1. " TCALRZ ,DDR3-SDRAM Calibration Timing Setting (REF to ZQCS Interval)" hexmask.long.word 0x04 0.--11. 1. " TCALZR ,DDR3-SDRAM Calibration Timing Setting (ZQCS to REF Interval)" group.long 0x100++0x03 line.long 0x00 "DBRNK_0,ODT operation setting register" bitfld.long 0x00 16. " RODTOUT0 ,Bit for ODT Output Level Setting at Read" "Level set to 0,Level set to 1" bitfld.long 0x00 0. " WODTOUT0 ,Bit for ODT Output Level Setting at Write" "Level set to 0,Level set to 1" group.long 0x180++0x03 line.long 0x00 "DBPDNCNF,Power-down configuration register" hexmask.long.byte 0x00 8.--15. 1. " PDWAIT ,Power-Down Wait" bitfld.long 0x00 4. " PDDLL ,Power-Down DLL Control" "Disabled,Enabled" textline " " bitfld.long 0x00 0.--1. " PDMODE ,Power-Down Mode" "Disabled,Power-down,Self-refresh,?..." rgroup.long 0x240++0x3 line.long 0x00 "DBDFISTAT,DFI Status IF Input Register" bitfld.long 0x00 0. " INITCOMPL ,INITCOMPL" "0,1" group.long 0x244++0x3 line.long 0x00 "DBDFICNT,DFI Status IF Output Register" bitfld.long 0x00 4.--5. " FREQRATIO ,Frequence ratio" ",Clk freqratio,?..." bitfld.long 0x00 0. " INITSTART ,Init start" "0,1" group.long 0x280++0x3 line.long 0x00 "DBPDLCK,PHY Unit Lock Register" hexmask.long.word 0x00 0.--15. 1. " PLOCK ,PHY Unit Access Lock Setting" group.long 0x290++0x3 line.long 0x00 "DBPDRGA,PHY Unit Address Register" hexmask.long.word 0x00 0.--15. 1. " PRA ,PHY Unit Address Register" group.long 0x2A0++0x3 line.long 0x00 "DBPDRGD,PHY Unit Access Register" group.long 0x304++0x3 line.long 0x00 "DBBS0CNT_1,Bus control unit 0 control register 1" bitfld.long 0x00 0.--1. " BKADM ,Bank Assignment Setting" "One block,Two blocks,Three blocks,Four blocks" if (((per.l(ad:0xE6790000+0x380))&0x70000)==0x20000) group.long 0x380++0x3 line.long 0x00 "DBWT_0_CNF_0,AXI Port Setting Register 0" bitfld.long 0x00 16.--18. " WASYN ,WASYN" ",,2,?..." bitfld.long 0x00 0.--2. " WCN ,AXI Clock to Memory Clock Ratio Setting Bits" "0.5 MCLKCH1>...>CH13>CH14,,,Round-robin" bitfld.word 0x00 2. " AE ,Address error flag" "No error,Error" bitfld.word 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" else group.long 0x60++0x03 line.long 0x00 "DMAOR_L,DMA Operation Register For Low Channel" bitfld.long 0x00 8.--9. " PR ,Priority mode" "CH0>CH1>...>CH14,,,Round-robin" bitfld.long 0x00 2. " AE ,Address error flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" endif wgroup.long 0x80++0x03 line.long 0x00 "DMACHCLR_L,DMA Channel Clear Register For Low Channel" bitfld.long 0x00 14. " CLR14 ,Channel 14 registers clear" "No clear,Clear" bitfld.long 0x00 13. " CLR13 ,Channel 13 registers clear" "No clear,Clear" bitfld.long 0x00 12. " CLR12 ,Channel 12 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 11. " CLR11 ,Channel 11 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR10 ,Channel 10 registers clear" "No clear,Clear" bitfld.long 0x00 9. " CLR9 ,Channel 9 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 8. " CLR8 ,Channel 8 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR7 ,Channel 7 registers clear" "No clear,Clear" bitfld.long 0x00 6. " CLR6 ,Channel 6 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 5. " CLR5 ,Channel 5 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR4 ,Channel 4 registers clear" "No clear,Clear" bitfld.long 0x00 3. " CLR3 ,Channel 3 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 2. " CLR2 ,Channel 2 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR1 ,Channel 1 registers clear" "No clear,Clear" bitfld.long 0x00 0. " CLR0 ,Channel 0 registers clear" "No clear,Clear" sif (cpu()!="R7S721042")&&(cpu()!="R7S721043")&&(cpu()!="R7S721046")&&(cpu()!="R7S721047")&&(cpu()!="R7S721062")&&(cpu()!="R7S721063")&&(cpu()!="R7S721066")&&(cpu()!="R7S721067") group.long 0xA0++0x03 line.long 0x00 "DMADPSEC_L,DPRAM Secure Control Register For Low Channel" bitfld.long 0x00 31. " SEC ,Secure attribute setting of descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of descriptor memory" endif textline " " width 17. if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x20)++0x07 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" else group.long 0x8000++0x07 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" endif group.long (0x8000+0x08)++0x03 line.long 0x00 "DMATCR_0,DMA Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8000+0x18)++0x03 line.long 0x00 "DMATCRB_0,DMA Transfer Count Registers B_0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x28)++0x03 line.long 0x00 "DMATSR_0,DMA Transfer Size Register 0" endif group.long (0x8000+0x38)++0x03 line.long 0x00 "DMATSRB_0,DMA Transfer Size Register 0" if (((per.l(ad:0xE6700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x2C)++0x03 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x0C)++0x03 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8000+0x1C)++0x03 line.long 0x00 "DMACHCRB_0,DMA Channel Control Register B_0" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8000+0x48)++0x03 line.long 0x00 "DMABUFCR_0,DMA Buffer Control Register 0" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8000+0x40)++0x01 line.word 0x00 "DMARS_0,DMA Extended Resource Selector 0" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x07 line.long 0x00 "DMADPBASE_0,DMA Descriptor Base Address Register 0" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_0,DMA Descriptor Control Register 0" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x07 line.long 0x00 "DMAFIXSAR_0,DMA Fixed Source Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_0,DMA Fixed Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8000+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_0,DMA Fixed Descriptor Base Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x20)++0x07 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" else group.long 0x8080++0x07 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" endif group.long (0x8080+0x08)++0x03 line.long 0x00 "DMATCR_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x18)++0x03 line.long 0x00 "DMATCRB_1,DMA Transfer Count Registers B_1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x28)++0x03 line.long 0x00 "DMATSR_1,DMA Transfer Size Register 1" endif group.long (0x8080+0x38)++0x03 line.long 0x00 "DMATSRB_1,DMA Transfer Size Register 1" if (((per.l(ad:0xE6700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x2C)++0x03 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x0C)++0x03 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8080+0x1C)++0x03 line.long 0x00 "DMACHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "DMABUFCR_1,DMA Buffer Control Register 1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8080+0x40)++0x01 line.word 0x00 "DMARS_1,DMA Extended Resource Selector 1" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x07 line.long 0x00 "DMADPBASE_1,DMA Descriptor Base Address Register 1" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x07 line.long 0x00 "DMAFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8080+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x20)++0x07 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" else group.long 0x8100++0x07 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" endif group.long (0x8100+0x08)++0x03 line.long 0x00 "DMATCR_2,DMA Transfer Count Register 2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8100+0x18)++0x03 line.long 0x00 "DMATCRB_2,DMA Transfer Count Registers B_2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x28)++0x03 line.long 0x00 "DMATSR_2,DMA Transfer Size Register 2" endif group.long (0x8100+0x38)++0x03 line.long 0x00 "DMATSRB_2,DMA Transfer Size Register 2" if (((per.l(ad:0xE6700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x2C)++0x03 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x0C)++0x03 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8100+0x1C)++0x03 line.long 0x00 "DMACHCRB_2,DMA Channel Control Register B_2" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8100+0x48)++0x03 line.long 0x00 "DMABUFCR_2,DMA Buffer Control Register 2" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8100+0x40)++0x01 line.word 0x00 "DMARS_2,DMA Extended Resource Selector 2" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x07 line.long 0x00 "DMADPBASE_2,DMA Descriptor Base Address Register 2" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_2,DMA Descriptor Control Register 2" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x07 line.long 0x00 "DMAFIXSAR_2,DMA Fixed Source Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_2,DMA Fixed Destination Address Register 2" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8100+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_2,DMA Fixed Descriptor Base Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x20)++0x07 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" else group.long 0x8180++0x07 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" endif group.long (0x8180+0x08)++0x03 line.long 0x00 "DMATCR_3,DMA Transfer Count Register 3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8180+0x18)++0x03 line.long 0x00 "DMATCRB_3,DMA Transfer Count Registers B_3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x28)++0x03 line.long 0x00 "DMATSR_3,DMA Transfer Size Register 3" endif group.long (0x8180+0x38)++0x03 line.long 0x00 "DMATSRB_3,DMA Transfer Size Register 3" if (((per.l(ad:0xE6700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x2C)++0x03 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x0C)++0x03 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8180+0x1C)++0x03 line.long 0x00 "DMACHCRB_3,DMA Channel Control Register B_3" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8180+0x48)++0x03 line.long 0x00 "DMABUFCR_3,DMA Buffer Control Register 3" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8180+0x40)++0x01 line.word 0x00 "DMARS_3,DMA Extended Resource Selector 3" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8180+0x50)++0x07 line.long 0x00 "DMADPBASE_3,DMA Descriptor Base Address Register 3" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_3,DMA Descriptor Control Register 3" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8180+0x10)++0x07 line.long 0x00 "DMAFIXSAR_3,DMA Fixed Source Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_3,DMA Fixed Destination Address Register 3" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8180+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_3,DMA Fixed Descriptor Base Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x20)++0x07 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" else group.long 0x8200++0x07 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" endif group.long (0x8200+0x08)++0x03 line.long 0x00 "DMATCR_4,DMA Transfer Count Register 4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8200+0x18)++0x03 line.long 0x00 "DMATCRB_4,DMA Transfer Count Registers B_4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x28)++0x03 line.long 0x00 "DMATSR_4,DMA Transfer Size Register 4" endif group.long (0x8200+0x38)++0x03 line.long 0x00 "DMATSRB_4,DMA Transfer Size Register 4" if (((per.l(ad:0xE6700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x2C)++0x03 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x0C)++0x03 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8200+0x1C)++0x03 line.long 0x00 "DMACHCRB_4,DMA Channel Control Register B_4" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8200+0x48)++0x03 line.long 0x00 "DMABUFCR_4,DMA Buffer Control Register 4" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8200+0x40)++0x01 line.word 0x00 "DMARS_4,DMA Extended Resource Selector 4" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8200+0x50)++0x07 line.long 0x00 "DMADPBASE_4,DMA Descriptor Base Address Register 4" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_4,DMA Descriptor Control Register 4" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8200+0x10)++0x07 line.long 0x00 "DMAFIXSAR_4,DMA Fixed Source Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_4,DMA Fixed Destination Address Register 4" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8200+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_4,DMA Fixed Descriptor Base Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x20)++0x07 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" else group.long 0x8280++0x07 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" endif group.long (0x8280+0x08)++0x03 line.long 0x00 "DMATCR_5,DMA Transfer Count Register 5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8280+0x18)++0x03 line.long 0x00 "DMATCRB_5,DMA Transfer Count Registers B_5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x28)++0x03 line.long 0x00 "DMATSR_5,DMA Transfer Size Register 5" endif group.long (0x8280+0x38)++0x03 line.long 0x00 "DMATSRB_5,DMA Transfer Size Register 5" if (((per.l(ad:0xE6700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x2C)++0x03 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x0C)++0x03 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8280+0x1C)++0x03 line.long 0x00 "DMACHCRB_5,DMA Channel Control Register B_5" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8280+0x48)++0x03 line.long 0x00 "DMABUFCR_5,DMA Buffer Control Register 5" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8280+0x40)++0x01 line.word 0x00 "DMARS_5,DMA Extended Resource Selector 5" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8280+0x50)++0x07 line.long 0x00 "DMADPBASE_5,DMA Descriptor Base Address Register 5" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_5,DMA Descriptor Control Register 5" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8280+0x10)++0x07 line.long 0x00 "DMAFIXSAR_5,DMA Fixed Source Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_5,DMA Fixed Destination Address Register 5" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8280+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_5,DMA Fixed Descriptor Base Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x20)++0x07 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" else group.long 0x8300++0x07 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" endif group.long (0x8300+0x08)++0x03 line.long 0x00 "DMATCR_6,DMA Transfer Count Register 6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8300+0x18)++0x03 line.long 0x00 "DMATCRB_6,DMA Transfer Count Registers B_6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x28)++0x03 line.long 0x00 "DMATSR_6,DMA Transfer Size Register 6" endif group.long (0x8300+0x38)++0x03 line.long 0x00 "DMATSRB_6,DMA Transfer Size Register 6" if (((per.l(ad:0xE6700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x2C)++0x03 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x0C)++0x03 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8300+0x1C)++0x03 line.long 0x00 "DMACHCRB_6,DMA Channel Control Register B_6" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8300+0x48)++0x03 line.long 0x00 "DMABUFCR_6,DMA Buffer Control Register 6" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8300+0x40)++0x01 line.word 0x00 "DMARS_6,DMA Extended Resource Selector 6" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8300+0x50)++0x07 line.long 0x00 "DMADPBASE_6,DMA Descriptor Base Address Register 6" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_6,DMA Descriptor Control Register 6" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8300+0x10)++0x07 line.long 0x00 "DMAFIXSAR_6,DMA Fixed Source Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_6,DMA Fixed Destination Address Register 6" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8300+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_6,DMA Fixed Descriptor Base Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x20)++0x07 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" else group.long 0x8380++0x07 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" endif group.long (0x8380+0x08)++0x03 line.long 0x00 "DMATCR_7,DMA Transfer Count Register 7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8380+0x18)++0x03 line.long 0x00 "DMATCRB_7,DMA Transfer Count Registers B_7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x28)++0x03 line.long 0x00 "DMATSR_7,DMA Transfer Size Register 7" endif group.long (0x8380+0x38)++0x03 line.long 0x00 "DMATSRB_7,DMA Transfer Size Register 7" if (((per.l(ad:0xE6700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x2C)++0x03 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x0C)++0x03 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8380+0x1C)++0x03 line.long 0x00 "DMACHCRB_7,DMA Channel Control Register B_7" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8380+0x48)++0x03 line.long 0x00 "DMABUFCR_7,DMA Buffer Control Register 7" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8380+0x40)++0x01 line.word 0x00 "DMARS_7,DMA Extended Resource Selector 7" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8380+0x50)++0x07 line.long 0x00 "DMADPBASE_7,DMA Descriptor Base Address Register 7" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_7,DMA Descriptor Control Register 7" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8380+0x10)++0x07 line.long 0x00 "DMAFIXSAR_7,DMA Fixed Source Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_7,DMA Fixed Destination Address Register 7" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8380+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_7,DMA Fixed Descriptor Base Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x20)++0x07 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" else group.long 0x8400++0x07 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" endif group.long (0x8400+0x08)++0x03 line.long 0x00 "DMATCR_8,DMA Transfer Count Register 8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8400+0x18)++0x03 line.long 0x00 "DMATCRB_8,DMA Transfer Count Registers B_8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x28)++0x03 line.long 0x00 "DMATSR_8,DMA Transfer Size Register 8" endif group.long (0x8400+0x38)++0x03 line.long 0x00 "DMATSRB_8,DMA Transfer Size Register 8" if (((per.l(ad:0xE6700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x2C)++0x03 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x0C)++0x03 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8400+0x1C)++0x03 line.long 0x00 "DMACHCRB_8,DMA Channel Control Register B_8" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8400+0x48)++0x03 line.long 0x00 "DMABUFCR_8,DMA Buffer Control Register 8" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8400+0x40)++0x01 line.word 0x00 "DMARS_8,DMA Extended Resource Selector 8" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8400+0x50)++0x07 line.long 0x00 "DMADPBASE_8,DMA Descriptor Base Address Register 8" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_8,DMA Descriptor Control Register 8" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8400+0x10)++0x07 line.long 0x00 "DMAFIXSAR_8,DMA Fixed Source Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_8,DMA Fixed Destination Address Register 8" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8400+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_8,DMA Fixed Descriptor Base Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x20)++0x07 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" else group.long 0x8480++0x07 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" endif group.long (0x8480+0x08)++0x03 line.long 0x00 "DMATCR_9,DMA Transfer Count Register 9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8480+0x18)++0x03 line.long 0x00 "DMATCRB_9,DMA Transfer Count Registers B_9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x28)++0x03 line.long 0x00 "DMATSR_9,DMA Transfer Size Register 9" endif group.long (0x8480+0x38)++0x03 line.long 0x00 "DMATSRB_9,DMA Transfer Size Register 9" if (((per.l(ad:0xE6700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x2C)++0x03 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x0C)++0x03 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8480+0x1C)++0x03 line.long 0x00 "DMACHCRB_9,DMA Channel Control Register B_9" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8480+0x48)++0x03 line.long 0x00 "DMABUFCR_9,DMA Buffer Control Register 9" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8480+0x40)++0x01 line.word 0x00 "DMARS_9,DMA Extended Resource Selector 9" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8480+0x50)++0x07 line.long 0x00 "DMADPBASE_9,DMA Descriptor Base Address Register 9" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_9,DMA Descriptor Control Register 9" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8480+0x10)++0x07 line.long 0x00 "DMAFIXSAR_9,DMA Fixed Source Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_9,DMA Fixed Destination Address Register 9" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8480+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_9,DMA Fixed Descriptor Base Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x20)++0x07 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" else group.long 0x8500++0x07 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" endif group.long (0x8500+0x08)++0x03 line.long 0x00 "DMATCR_10,DMA Transfer Count Register 10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8500+0x18)++0x03 line.long 0x00 "DMATCRB_10,DMA Transfer Count Registers B_10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x28)++0x03 line.long 0x00 "DMATSR_10,DMA Transfer Size Register 10" endif group.long (0x8500+0x38)++0x03 line.long 0x00 "DMATSRB_10,DMA Transfer Size Register 10" if (((per.l(ad:0xE6700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x2C)++0x03 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x0C)++0x03 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8500+0x1C)++0x03 line.long 0x00 "DMACHCRB_10,DMA Channel Control Register B_10" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8500+0x48)++0x03 line.long 0x00 "DMABUFCR_10,DMA Buffer Control Register 10" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8500+0x40)++0x01 line.word 0x00 "DMARS_10,DMA Extended Resource Selector 10" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8500+0x50)++0x07 line.long 0x00 "DMADPBASE_10,DMA Descriptor Base Address Register 10" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_10,DMA Descriptor Control Register 10" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8500+0x10)++0x07 line.long 0x00 "DMAFIXSAR_10,DMA Fixed Source Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_10,DMA Fixed Destination Address Register 10" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8500+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_10,DMA Fixed Descriptor Base Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x20)++0x07 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" else group.long 0x8580++0x07 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" endif group.long (0x8580+0x08)++0x03 line.long 0x00 "DMATCR_11,DMA Transfer Count Register 11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8580+0x18)++0x03 line.long 0x00 "DMATCRB_11,DMA Transfer Count Registers B_11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x28)++0x03 line.long 0x00 "DMATSR_11,DMA Transfer Size Register 11" endif group.long (0x8580+0x38)++0x03 line.long 0x00 "DMATSRB_11,DMA Transfer Size Register 11" if (((per.l(ad:0xE6700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x2C)++0x03 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x0C)++0x03 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8580+0x1C)++0x03 line.long 0x00 "DMACHCRB_11,DMA Channel Control Register B_11" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8580+0x48)++0x03 line.long 0x00 "DMABUFCR_11,DMA Buffer Control Register 11" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8580+0x40)++0x01 line.word 0x00 "DMARS_11,DMA Extended Resource Selector 11" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8580+0x50)++0x07 line.long 0x00 "DMADPBASE_11,DMA Descriptor Base Address Register 11" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_11,DMA Descriptor Control Register 11" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8580+0x10)++0x07 line.long 0x00 "DMAFIXSAR_11,DMA Fixed Source Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_11,DMA Fixed Destination Address Register 11" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8580+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_11,DMA Fixed Descriptor Base Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x20)++0x07 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" else group.long 0x8600++0x07 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" endif group.long (0x8600+0x08)++0x03 line.long 0x00 "DMATCR_12,DMA Transfer Count Register 12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8600+0x18)++0x03 line.long 0x00 "DMATCRB_12,DMA Transfer Count Registers B_12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x28)++0x03 line.long 0x00 "DMATSR_12,DMA Transfer Size Register 12" endif group.long (0x8600+0x38)++0x03 line.long 0x00 "DMATSRB_12,DMA Transfer Size Register 12" if (((per.l(ad:0xE6700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x2C)++0x03 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x0C)++0x03 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8600+0x1C)++0x03 line.long 0x00 "DMACHCRB_12,DMA Channel Control Register B_12" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8600+0x48)++0x03 line.long 0x00 "DMABUFCR_12,DMA Buffer Control Register 12" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8600+0x40)++0x01 line.word 0x00 "DMARS_12,DMA Extended Resource Selector 12" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8600+0x50)++0x07 line.long 0x00 "DMADPBASE_12,DMA Descriptor Base Address Register 12" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_12,DMA Descriptor Control Register 12" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8600+0x10)++0x07 line.long 0x00 "DMAFIXSAR_12,DMA Fixed Source Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_12,DMA Fixed Destination Address Register 12" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8600+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_12,DMA Fixed Descriptor Base Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x20)++0x07 line.long 0x00 "DMASAR_13,DMA Source Address Register 13" line.long 0x04 "DMADAR_13,DMA Destination Address Register 13" else group.long 0x8680++0x07 line.long 0x00 "DMASAR_13,DMA Source Address Register 13" line.long 0x04 "DMADAR_13,DMA Destination Address Register 13" endif group.long (0x8680+0x08)++0x03 line.long 0x00 "DMATCR_13,DMA Transfer Count Register 13" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8680+0x18)++0x03 line.long 0x00 "DMATCRB_13,DMA Transfer Count Registers B_13" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x28)++0x03 line.long 0x00 "DMATSR_13,DMA Transfer Size Register 13" endif group.long (0x8680+0x38)++0x03 line.long 0x00 "DMATSRB_13,DMA Transfer Size Register 13" if (((per.l(ad:0xE6700000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x2C)++0x03 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x0C)++0x03 line.long 0x00 "DMACHCR_13,DMA Channel Control Register 13" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8680+0x1C)++0x03 line.long 0x00 "DMACHCRB_13,DMA Channel Control Register B_13" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8680+0x48)++0x03 line.long 0x00 "DMABUFCR_13,DMA Buffer Control Register 13" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8680+0x40)++0x01 line.word 0x00 "DMARS_13,DMA Extended Resource Selector 13" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8680+0x50)++0x07 line.long 0x00 "DMADPBASE_13,DMA Descriptor Base Address Register 13" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_13,DMA Descriptor Control Register 13" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8680+0x10)++0x07 line.long 0x00 "DMAFIXSAR_13,DMA Fixed Source Address Register 13" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_13,DMA Fixed Destination Address Register 13" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8680+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_13,DMA Fixed Descriptor Base Address Register 13" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x20)++0x07 line.long 0x00 "DMASAR_14,DMA Source Address Register 14" line.long 0x04 "DMADAR_14,DMA Destination Address Register 14" else group.long 0x8700++0x07 line.long 0x00 "DMASAR_14,DMA Source Address Register 14" line.long 0x04 "DMADAR_14,DMA Destination Address Register 14" endif group.long (0x8700+0x08)++0x03 line.long 0x00 "DMATCR_14,DMA Transfer Count Register 14" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8700+0x18)++0x03 line.long 0x00 "DMATCRB_14,DMA Transfer Count Registers B_14" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x28)++0x03 line.long 0x00 "DMATSR_14,DMA Transfer Size Register 14" endif group.long (0x8700+0x38)++0x03 line.long 0x00 "DMATSRB_14,DMA Transfer Size Register 14" if (((per.l(ad:0xE6700000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x2C)++0x03 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x0C)++0x03 line.long 0x00 "DMACHCR_14,DMA Channel Control Register 14" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8700+0x1C)++0x03 line.long 0x00 "DMACHCRB_14,DMA Channel Control Register B_14" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8700+0x48)++0x03 line.long 0x00 "DMABUFCR_14,DMA Buffer Control Register 14" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8700+0x40)++0x01 line.word 0x00 "DMARS_14,DMA Extended Resource Selector 14" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8700+0x50)++0x07 line.long 0x00 "DMADPBASE_14,DMA Descriptor Base Address Register 14" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_14,DMA Descriptor Control Register 14" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8700+0x10)++0x07 line.long 0x00 "DMAFIXSAR_14,DMA Fixed Source Address Register 14" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_14,DMA Fixed Destination Address Register 14" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8700+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_14,DMA Fixed Descriptor Base Address Register 14" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" width 15. textline "" group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for $2 Channels" button "DESCRIPTORMEM" "d (ad:0xE6700000+0xA000)--(ad:0xE6700000+0xA7FF) /long" width 0xB tree.end tree "Upper channels" base ad:0xE6720000 width 12. rgroup.long 0x20++0x03 line.long 0x00 "DMAISTA_U,DMA Interrupt Status Register For Upper Channel" bitfld.long 0x00 14. " I29 ,Channel 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 13. " I28 ,Channel 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 12. " I27 ,Channel 25 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " I26 ,Channel 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " I25 ,Channel 25 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 9. " I24 ,Channel 24 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " I23 ,Channel 23 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 7. " I22 ,Channel 22 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 6. " I21 ,Channel 21 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 5. " I20 ,Channel 20 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I19 ,Channel 19 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 3. " I18 ,Channel 18 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 2. " I17 ,Channel 17 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I16 ,Channel 16 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " I15 ,Channel 15 interrupt status" "No interrupt,Interrupt" sif (cpu()!="R7S721042")&&(cpu()!="R7S721043")&&(cpu()!="R7S721046")&&(cpu()!="R7S721047")&&(cpu()!="R7S721062")&&(cpu()!="R7S721063")&&(cpu()!="R7S721066")&&(cpu()!="R7S721067") group.long 0x30++0x03 line.long 0x00 "DMASEC_U,DMA Secure Control Register For Upper Channel" bitfld.long 0x00 14. " S29 ,Channel 29 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 13. " S28 ,Channel 28 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 12. " S27 ,Channel 27 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 11. " S26 ,Channel 26 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 10. " S25 ,Channel 25 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 9. " S24 ,Channel 24 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 8. " S23 ,Channel 23 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 7. " S22 ,Channel 22 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 6. " S21 ,Channel 21 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 5. " S20 ,Channel 20 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S19 ,Channel 19 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 3. " S18 ,Channel 18 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 2. " S17 ,Channel 17 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S16 ,Channel 16 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 0. " S15 ,Channel 15 secure mode setting" "Non-secure,Secure" endif sif CPUIS("R8A774*") group.word 0x60++0x01 line.word 0x00 "DMAOR_U,DMA Operation Register For Upper Channel" bitfld.word 0x00 8.--9. " PR ,Priority mode" "CH15>CH16>...>CH28>CH29,,,Round-robin" bitfld.word 0x00 2. " AE ,Address error flag" "No error,Error" bitfld.word 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" else group.long 0x60++0x03 line.long 0x00 "DMAOR_U,DMA Operation Register For Upper Channel" bitfld.long 0x00 8.--9. " PR ,Priority mode" "CH0>CH1>...>CH12,,,Round-robin" bitfld.long 0x00 2. " AE ,Address error flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" endif wgroup.long 0x80++0x03 line.long 0x00 "DMACHCLR_U,DMA Channel Clear Register For Upper Channel" bitfld.long 0x00 14. " CLR29 ,Channel 29 registers clear" "No clear,Clear" bitfld.long 0x00 13. " CLR28 ,Channel 28 registers clear" "No clear,Clear" bitfld.long 0x00 12. " CLR27 ,Channel 27 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 11. " CLR26 ,Channel 26 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR25 ,Channel 25 registers clear" "No clear,Clear" bitfld.long 0x00 9. " CLR24 ,Channel 24 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 8. " CLR23 ,Channel 23 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR22 ,Channel 22 registers clear" "No clear,Clear" bitfld.long 0x00 6. " CLR21 ,Channel 21 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 5. " CLR20 ,Channel 20 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR19 ,Channel 19 registers clear" "No clear,Clear" bitfld.long 0x00 3. " CLR18 ,Channel 18 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 2. " CLR17 ,Channel 17 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR16 ,Channel 16 registers clear" "No clear,Clear" bitfld.long 0x00 0. " CLR15 ,Channel 15 registers clear" "No clear,Clear" sif (cpu()!="R7S721042")&&(cpu()!="R7S721043")&&(cpu()!="R7S721046")&&(cpu()!="R7S721047")&&(cpu()!="R7S721062")&&(cpu()!="R7S721063")&&(cpu()!="R7S721066")&&(cpu()!="R7S721067") group.long 0xA0++0x03 line.long 0x00 "DMADPSEC_U,DPRAM Secure Control Register For Upper Channel" bitfld.long 0x00 31. " SEC ,Secure attribute setting of descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of descriptor memory" endif textline " " width 17. if (((per.l(ad:0xE6720000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x20)++0x07 line.long 0x00 "DMASAR_15,DMA Source Address Register 15" line.long 0x04 "DMADAR_15,DMA Destination Address Register 15" else group.long 0x8000++0x07 line.long 0x00 "DMASAR_15,DMA Source Address Register 15" line.long 0x04 "DMADAR_15,DMA Destination Address Register 15" endif group.long (0x8000+0x08)++0x03 line.long 0x00 "DMATCR_15,DMA Transfer Count Register 15" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8000+0x18)++0x03 line.long 0x00 "DMATCRB_15,DMA Transfer Count Registers B_15" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x28)++0x03 line.long 0x00 "DMATSR_15,DMA Transfer Size Register 15" endif group.long (0x8000+0x38)++0x03 line.long 0x00 "DMATSRB_15,DMA Transfer Size Register 15" if (((per.l(ad:0xE6720000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x2C)++0x03 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8000+0x0C)++0x03 line.long 0x00 "DMACHCR_15,DMA Channel Control Register 15" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8000+0x1C)++0x03 line.long 0x00 "DMACHCRB_15,DMA Channel Control Register B_15" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8000+0x48)++0x03 line.long 0x00 "DMABUFCR_15,DMA Buffer Control Register 15" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8000+0x40)++0x01 line.word 0x00 "DMARS_15,DMA Extended Resource Selector 15" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x07 line.long 0x00 "DMADPBASE_15,DMA Descriptor Base Address Register 15" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_15,DMA Descriptor Control Register 15" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x07 line.long 0x00 "DMAFIXSAR_15,DMA Fixed Source Address Register 15" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_15,DMA Fixed Destination Address Register 15" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8000+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_15,DMA Fixed Descriptor Base Address Register 15" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x20)++0x07 line.long 0x00 "DMASAR_16,DMA Source Address Register 16" line.long 0x04 "DMADAR_16,DMA Destination Address Register 16" else group.long 0x8080++0x07 line.long 0x00 "DMASAR_16,DMA Source Address Register 16" line.long 0x04 "DMADAR_16,DMA Destination Address Register 16" endif group.long (0x8080+0x08)++0x03 line.long 0x00 "DMATCR_16,DMA Transfer Count Register 16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x18)++0x03 line.long 0x00 "DMATCRB_16,DMA Transfer Count Registers B_16" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x28)++0x03 line.long 0x00 "DMATSR_16,DMA Transfer Size Register 16" endif group.long (0x8080+0x38)++0x03 line.long 0x00 "DMATSRB_16,DMA Transfer Size Register 16" if (((per.l(ad:0xE6720000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x2C)++0x03 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8080+0x0C)++0x03 line.long 0x00 "DMACHCR_16,DMA Channel Control Register 16" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8080+0x1C)++0x03 line.long 0x00 "DMACHCRB_16,DMA Channel Control Register B_16" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "DMABUFCR_16,DMA Buffer Control Register 16" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8080+0x40)++0x01 line.word 0x00 "DMARS_16,DMA Extended Resource Selector 16" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x07 line.long 0x00 "DMADPBASE_16,DMA Descriptor Base Address Register 16" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_16,DMA Descriptor Control Register 16" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x07 line.long 0x00 "DMAFIXSAR_16,DMA Fixed Source Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_16,DMA Fixed Destination Address Register 16" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8080+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_16,DMA Fixed Descriptor Base Address Register 16" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x20)++0x07 line.long 0x00 "DMASAR_17,DMA Source Address Register 17" line.long 0x04 "DMADAR_17,DMA Destination Address Register 17" else group.long 0x8100++0x07 line.long 0x00 "DMASAR_17,DMA Source Address Register 17" line.long 0x04 "DMADAR_17,DMA Destination Address Register 17" endif group.long (0x8100+0x08)++0x03 line.long 0x00 "DMATCR_17,DMA Transfer Count Register 17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8100+0x18)++0x03 line.long 0x00 "DMATCRB_17,DMA Transfer Count Registers B_17" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x28)++0x03 line.long 0x00 "DMATSR_17,DMA Transfer Size Register 17" endif group.long (0x8100+0x38)++0x03 line.long 0x00 "DMATSRB_17,DMA Transfer Size Register 17" if (((per.l(ad:0xE6720000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x2C)++0x03 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8100+0x0C)++0x03 line.long 0x00 "DMACHCR_17,DMA Channel Control Register 17" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8100+0x1C)++0x03 line.long 0x00 "DMACHCRB_17,DMA Channel Control Register B_17" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8100+0x48)++0x03 line.long 0x00 "DMABUFCR_17,DMA Buffer Control Register 17" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8100+0x40)++0x01 line.word 0x00 "DMARS_17,DMA Extended Resource Selector 17" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x07 line.long 0x00 "DMADPBASE_17,DMA Descriptor Base Address Register 17" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_17,DMA Descriptor Control Register 17" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x07 line.long 0x00 "DMAFIXSAR_17,DMA Fixed Source Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_17,DMA Fixed Destination Address Register 17" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8100+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_17,DMA Fixed Descriptor Base Address Register 17" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x20)++0x07 line.long 0x00 "DMASAR_18,DMA Source Address Register 18" line.long 0x04 "DMADAR_18,DMA Destination Address Register 18" else group.long 0x8180++0x07 line.long 0x00 "DMASAR_18,DMA Source Address Register 18" line.long 0x04 "DMADAR_18,DMA Destination Address Register 18" endif group.long (0x8180+0x08)++0x03 line.long 0x00 "DMATCR_18,DMA Transfer Count Register 18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8180+0x18)++0x03 line.long 0x00 "DMATCRB_18,DMA Transfer Count Registers B_18" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x28)++0x03 line.long 0x00 "DMATSR_18,DMA Transfer Size Register 18" endif group.long (0x8180+0x38)++0x03 line.long 0x00 "DMATSRB_18,DMA Transfer Size Register 18" if (((per.l(ad:0xE6720000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x2C)++0x03 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8180+0x0C)++0x03 line.long 0x00 "DMACHCR_18,DMA Channel Control Register 18" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8180+0x1C)++0x03 line.long 0x00 "DMACHCRB_18,DMA Channel Control Register B_18" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8180+0x48)++0x03 line.long 0x00 "DMABUFCR_18,DMA Buffer Control Register 18" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8180+0x40)++0x01 line.word 0x00 "DMARS_18,DMA Extended Resource Selector 18" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8180+0x50)++0x07 line.long 0x00 "DMADPBASE_18,DMA Descriptor Base Address Register 18" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_18,DMA Descriptor Control Register 18" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8180+0x10)++0x07 line.long 0x00 "DMAFIXSAR_18,DMA Fixed Source Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_18,DMA Fixed Destination Address Register 18" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8180+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_18,DMA Fixed Descriptor Base Address Register 18" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x20)++0x07 line.long 0x00 "DMASAR_19,DMA Source Address Register 19" line.long 0x04 "DMADAR_19,DMA Destination Address Register 19" else group.long 0x8200++0x07 line.long 0x00 "DMASAR_19,DMA Source Address Register 19" line.long 0x04 "DMADAR_19,DMA Destination Address Register 19" endif group.long (0x8200+0x08)++0x03 line.long 0x00 "DMATCR_19,DMA Transfer Count Register 19" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8200+0x18)++0x03 line.long 0x00 "DMATCRB_19,DMA Transfer Count Registers B_19" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x28)++0x03 line.long 0x00 "DMATSR_19,DMA Transfer Size Register 19" endif group.long (0x8200+0x38)++0x03 line.long 0x00 "DMATSRB_19,DMA Transfer Size Register 19" if (((per.l(ad:0xE6720000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x2C)++0x03 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8200+0x0C)++0x03 line.long 0x00 "DMACHCR_19,DMA Channel Control Register 19" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8200+0x1C)++0x03 line.long 0x00 "DMACHCRB_19,DMA Channel Control Register B_19" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8200+0x48)++0x03 line.long 0x00 "DMABUFCR_19,DMA Buffer Control Register 19" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8200+0x40)++0x01 line.word 0x00 "DMARS_19,DMA Extended Resource Selector 19" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8200+0x50)++0x07 line.long 0x00 "DMADPBASE_19,DMA Descriptor Base Address Register 19" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_19,DMA Descriptor Control Register 19" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8200+0x10)++0x07 line.long 0x00 "DMAFIXSAR_19,DMA Fixed Source Address Register 19" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_19,DMA Fixed Destination Address Register 19" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8200+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_19,DMA Fixed Descriptor Base Address Register 19" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x20)++0x07 line.long 0x00 "DMASAR_20,DMA Source Address Register 20" line.long 0x04 "DMADAR_20,DMA Destination Address Register 20" else group.long 0x8280++0x07 line.long 0x00 "DMASAR_20,DMA Source Address Register 20" line.long 0x04 "DMADAR_20,DMA Destination Address Register 20" endif group.long (0x8280+0x08)++0x03 line.long 0x00 "DMATCR_20,DMA Transfer Count Register 20" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8280+0x18)++0x03 line.long 0x00 "DMATCRB_20,DMA Transfer Count Registers B_20" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x28)++0x03 line.long 0x00 "DMATSR_20,DMA Transfer Size Register 20" endif group.long (0x8280+0x38)++0x03 line.long 0x00 "DMATSRB_20,DMA Transfer Size Register 20" if (((per.l(ad:0xE6720000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x2C)++0x03 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8280+0x0C)++0x03 line.long 0x00 "DMACHCR_20,DMA Channel Control Register 20" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8280+0x1C)++0x03 line.long 0x00 "DMACHCRB_20,DMA Channel Control Register B_20" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8280+0x48)++0x03 line.long 0x00 "DMABUFCR_20,DMA Buffer Control Register 20" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8280+0x40)++0x01 line.word 0x00 "DMARS_20,DMA Extended Resource Selector 20" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8280+0x50)++0x07 line.long 0x00 "DMADPBASE_20,DMA Descriptor Base Address Register 20" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_20,DMA Descriptor Control Register 20" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8280+0x10)++0x07 line.long 0x00 "DMAFIXSAR_20,DMA Fixed Source Address Register 20" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_20,DMA Fixed Destination Address Register 20" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8280+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_20,DMA Fixed Descriptor Base Address Register 20" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x20)++0x07 line.long 0x00 "DMASAR_21,DMA Source Address Register 21" line.long 0x04 "DMADAR_21,DMA Destination Address Register 21" else group.long 0x8300++0x07 line.long 0x00 "DMASAR_21,DMA Source Address Register 21" line.long 0x04 "DMADAR_21,DMA Destination Address Register 21" endif group.long (0x8300+0x08)++0x03 line.long 0x00 "DMATCR_21,DMA Transfer Count Register 21" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8300+0x18)++0x03 line.long 0x00 "DMATCRB_21,DMA Transfer Count Registers B_21" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x28)++0x03 line.long 0x00 "DMATSR_21,DMA Transfer Size Register 21" endif group.long (0x8300+0x38)++0x03 line.long 0x00 "DMATSRB_21,DMA Transfer Size Register 21" if (((per.l(ad:0xE6720000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x2C)++0x03 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8300+0x0C)++0x03 line.long 0x00 "DMACHCR_21,DMA Channel Control Register 21" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8300+0x1C)++0x03 line.long 0x00 "DMACHCRB_21,DMA Channel Control Register B_21" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8300+0x48)++0x03 line.long 0x00 "DMABUFCR_21,DMA Buffer Control Register 21" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8300+0x40)++0x01 line.word 0x00 "DMARS_21,DMA Extended Resource Selector 21" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8300+0x50)++0x07 line.long 0x00 "DMADPBASE_21,DMA Descriptor Base Address Register 21" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_21,DMA Descriptor Control Register 21" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8300+0x10)++0x07 line.long 0x00 "DMAFIXSAR_21,DMA Fixed Source Address Register 21" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_21,DMA Fixed Destination Address Register 21" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8300+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_21,DMA Fixed Descriptor Base Address Register 21" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x20)++0x07 line.long 0x00 "DMASAR_22,DMA Source Address Register 22" line.long 0x04 "DMADAR_22,DMA Destination Address Register 22" else group.long 0x8380++0x07 line.long 0x00 "DMASAR_22,DMA Source Address Register 22" line.long 0x04 "DMADAR_22,DMA Destination Address Register 22" endif group.long (0x8380+0x08)++0x03 line.long 0x00 "DMATCR_22,DMA Transfer Count Register 22" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8380+0x18)++0x03 line.long 0x00 "DMATCRB_22,DMA Transfer Count Registers B_22" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x28)++0x03 line.long 0x00 "DMATSR_22,DMA Transfer Size Register 22" endif group.long (0x8380+0x38)++0x03 line.long 0x00 "DMATSRB_22,DMA Transfer Size Register 22" if (((per.l(ad:0xE6720000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x2C)++0x03 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8380+0x0C)++0x03 line.long 0x00 "DMACHCR_22,DMA Channel Control Register 22" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8380+0x1C)++0x03 line.long 0x00 "DMACHCRB_22,DMA Channel Control Register B_22" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8380+0x48)++0x03 line.long 0x00 "DMABUFCR_22,DMA Buffer Control Register 22" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8380+0x40)++0x01 line.word 0x00 "DMARS_22,DMA Extended Resource Selector 22" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8380+0x50)++0x07 line.long 0x00 "DMADPBASE_22,DMA Descriptor Base Address Register 22" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_22,DMA Descriptor Control Register 22" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8380+0x10)++0x07 line.long 0x00 "DMAFIXSAR_22,DMA Fixed Source Address Register 22" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_22,DMA Fixed Destination Address Register 22" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8380+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_22,DMA Fixed Descriptor Base Address Register 22" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x20)++0x07 line.long 0x00 "DMASAR_23,DMA Source Address Register 23" line.long 0x04 "DMADAR_23,DMA Destination Address Register 23" else group.long 0x8400++0x07 line.long 0x00 "DMASAR_23,DMA Source Address Register 23" line.long 0x04 "DMADAR_23,DMA Destination Address Register 23" endif group.long (0x8400+0x08)++0x03 line.long 0x00 "DMATCR_23,DMA Transfer Count Register 23" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8400+0x18)++0x03 line.long 0x00 "DMATCRB_23,DMA Transfer Count Registers B_23" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x28)++0x03 line.long 0x00 "DMATSR_23,DMA Transfer Size Register 23" endif group.long (0x8400+0x38)++0x03 line.long 0x00 "DMATSRB_23,DMA Transfer Size Register 23" if (((per.l(ad:0xE6720000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x2C)++0x03 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8400+0x0C)++0x03 line.long 0x00 "DMACHCR_23,DMA Channel Control Register 23" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8400+0x1C)++0x03 line.long 0x00 "DMACHCRB_23,DMA Channel Control Register B_23" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8400+0x48)++0x03 line.long 0x00 "DMABUFCR_23,DMA Buffer Control Register 23" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8400+0x40)++0x01 line.word 0x00 "DMARS_23,DMA Extended Resource Selector 23" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8400+0x50)++0x07 line.long 0x00 "DMADPBASE_23,DMA Descriptor Base Address Register 23" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_23,DMA Descriptor Control Register 23" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8400+0x10)++0x07 line.long 0x00 "DMAFIXSAR_23,DMA Fixed Source Address Register 23" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_23,DMA Fixed Destination Address Register 23" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8400+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_23,DMA Fixed Descriptor Base Address Register 23" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x20)++0x07 line.long 0x00 "DMASAR_24,DMA Source Address Register 24" line.long 0x04 "DMADAR_24,DMA Destination Address Register 24" else group.long 0x8480++0x07 line.long 0x00 "DMASAR_24,DMA Source Address Register 24" line.long 0x04 "DMADAR_24,DMA Destination Address Register 24" endif group.long (0x8480+0x08)++0x03 line.long 0x00 "DMATCR_24,DMA Transfer Count Register 24" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8480+0x18)++0x03 line.long 0x00 "DMATCRB_24,DMA Transfer Count Registers B_24" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x28)++0x03 line.long 0x00 "DMATSR_24,DMA Transfer Size Register 24" endif group.long (0x8480+0x38)++0x03 line.long 0x00 "DMATSRB_24,DMA Transfer Size Register 24" if (((per.l(ad:0xE6720000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x2C)++0x03 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8480+0x0C)++0x03 line.long 0x00 "DMACHCR_24,DMA Channel Control Register 24" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8480+0x1C)++0x03 line.long 0x00 "DMACHCRB_24,DMA Channel Control Register B_24" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8480+0x48)++0x03 line.long 0x00 "DMABUFCR_24,DMA Buffer Control Register 24" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8480+0x40)++0x01 line.word 0x00 "DMARS_24,DMA Extended Resource Selector 24" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8480+0x50)++0x07 line.long 0x00 "DMADPBASE_24,DMA Descriptor Base Address Register 24" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_24,DMA Descriptor Control Register 24" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8480+0x10)++0x07 line.long 0x00 "DMAFIXSAR_24,DMA Fixed Source Address Register 24" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_24,DMA Fixed Destination Address Register 24" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8480+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_24,DMA Fixed Descriptor Base Address Register 24" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x20)++0x07 line.long 0x00 "DMASAR_25,DMA Source Address Register 25" line.long 0x04 "DMADAR_25,DMA Destination Address Register 25" else group.long 0x8500++0x07 line.long 0x00 "DMASAR_25,DMA Source Address Register 25" line.long 0x04 "DMADAR_25,DMA Destination Address Register 25" endif group.long (0x8500+0x08)++0x03 line.long 0x00 "DMATCR_25,DMA Transfer Count Register 25" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8500+0x18)++0x03 line.long 0x00 "DMATCRB_25,DMA Transfer Count Registers B_25" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x28)++0x03 line.long 0x00 "DMATSR_25,DMA Transfer Size Register 25" endif group.long (0x8500+0x38)++0x03 line.long 0x00 "DMATSRB_25,DMA Transfer Size Register 25" if (((per.l(ad:0xE6720000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x2C)++0x03 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8500+0x0C)++0x03 line.long 0x00 "DMACHCR_25,DMA Channel Control Register 25" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8500+0x1C)++0x03 line.long 0x00 "DMACHCRB_25,DMA Channel Control Register B_25" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8500+0x48)++0x03 line.long 0x00 "DMABUFCR_25,DMA Buffer Control Register 25" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8500+0x40)++0x01 line.word 0x00 "DMARS_25,DMA Extended Resource Selector 25" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8500+0x50)++0x07 line.long 0x00 "DMADPBASE_25,DMA Descriptor Base Address Register 25" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_25,DMA Descriptor Control Register 25" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8500+0x10)++0x07 line.long 0x00 "DMAFIXSAR_25,DMA Fixed Source Address Register 25" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_25,DMA Fixed Destination Address Register 25" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8500+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_25,DMA Fixed Descriptor Base Address Register 25" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x20)++0x07 line.long 0x00 "DMASAR_26,DMA Source Address Register 26" line.long 0x04 "DMADAR_26,DMA Destination Address Register 26" else group.long 0x8580++0x07 line.long 0x00 "DMASAR_26,DMA Source Address Register 26" line.long 0x04 "DMADAR_26,DMA Destination Address Register 26" endif group.long (0x8580+0x08)++0x03 line.long 0x00 "DMATCR_26,DMA Transfer Count Register 26" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8580+0x18)++0x03 line.long 0x00 "DMATCRB_26,DMA Transfer Count Registers B_26" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x28)++0x03 line.long 0x00 "DMATSR_26,DMA Transfer Size Register 26" endif group.long (0x8580+0x38)++0x03 line.long 0x00 "DMATSRB_26,DMA Transfer Size Register 26" if (((per.l(ad:0xE6720000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x2C)++0x03 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8580+0x0C)++0x03 line.long 0x00 "DMACHCR_26,DMA Channel Control Register 26" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8580+0x1C)++0x03 line.long 0x00 "DMACHCRB_26,DMA Channel Control Register B_26" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8580+0x48)++0x03 line.long 0x00 "DMABUFCR_26,DMA Buffer Control Register 26" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8580+0x40)++0x01 line.word 0x00 "DMARS_26,DMA Extended Resource Selector 26" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8580+0x50)++0x07 line.long 0x00 "DMADPBASE_26,DMA Descriptor Base Address Register 26" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_26,DMA Descriptor Control Register 26" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8580+0x10)++0x07 line.long 0x00 "DMAFIXSAR_26,DMA Fixed Source Address Register 26" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_26,DMA Fixed Destination Address Register 26" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8580+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_26,DMA Fixed Descriptor Base Address Register 26" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x20)++0x07 line.long 0x00 "DMASAR_27,DMA Source Address Register 27" line.long 0x04 "DMADAR_27,DMA Destination Address Register 27" else group.long 0x8600++0x07 line.long 0x00 "DMASAR_27,DMA Source Address Register 27" line.long 0x04 "DMADAR_27,DMA Destination Address Register 27" endif group.long (0x8600+0x08)++0x03 line.long 0x00 "DMATCR_27,DMA Transfer Count Register 27" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8600+0x18)++0x03 line.long 0x00 "DMATCRB_27,DMA Transfer Count Registers B_27" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x28)++0x03 line.long 0x00 "DMATSR_27,DMA Transfer Size Register 27" endif group.long (0x8600+0x38)++0x03 line.long 0x00 "DMATSRB_27,DMA Transfer Size Register 27" if (((per.l(ad:0xE6720000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x2C)++0x03 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8600+0x0C)++0x03 line.long 0x00 "DMACHCR_27,DMA Channel Control Register 27" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8600+0x1C)++0x03 line.long 0x00 "DMACHCRB_27,DMA Channel Control Register B_27" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8600+0x48)++0x03 line.long 0x00 "DMABUFCR_27,DMA Buffer Control Register 27" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8600+0x40)++0x01 line.word 0x00 "DMARS_27,DMA Extended Resource Selector 27" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8600+0x50)++0x07 line.long 0x00 "DMADPBASE_27,DMA Descriptor Base Address Register 27" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_27,DMA Descriptor Control Register 27" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8600+0x10)++0x07 line.long 0x00 "DMAFIXSAR_27,DMA Fixed Source Address Register 27" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_27,DMA Fixed Destination Address Register 27" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8600+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_27,DMA Fixed Descriptor Base Address Register 27" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x20)++0x07 line.long 0x00 "DMASAR_28,DMA Source Address Register 28" line.long 0x04 "DMADAR_28,DMA Destination Address Register 28" else group.long 0x8680++0x07 line.long 0x00 "DMASAR_28,DMA Source Address Register 28" line.long 0x04 "DMADAR_28,DMA Destination Address Register 28" endif group.long (0x8680+0x08)++0x03 line.long 0x00 "DMATCR_28,DMA Transfer Count Register 28" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8680+0x18)++0x03 line.long 0x00 "DMATCRB_28,DMA Transfer Count Registers B_28" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x28)++0x03 line.long 0x00 "DMATSR_28,DMA Transfer Size Register 28" endif group.long (0x8680+0x38)++0x03 line.long 0x00 "DMATSRB_28,DMA Transfer Size Register 28" if (((per.l(ad:0xE6720000+0x8680+0x1C))&0x100)==0x100) group.long (0x8680+0x2C)++0x03 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8680+0x0C)++0x03 line.long 0x00 "DMACHCR_28,DMA Channel Control Register 28" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8680+0x1C)++0x03 line.long 0x00 "DMACHCRB_28,DMA Channel Control Register B_28" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8680+0x48)++0x03 line.long 0x00 "DMABUFCR_28,DMA Buffer Control Register 28" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8680+0x40)++0x01 line.word 0x00 "DMARS_28,DMA Extended Resource Selector 28" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8680+0x50)++0x07 line.long 0x00 "DMADPBASE_28,DMA Descriptor Base Address Register 28" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_28,DMA Descriptor Control Register 28" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8680+0x10)++0x07 line.long 0x00 "DMAFIXSAR_28,DMA Fixed Source Address Register 28" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_28,DMA Fixed Destination Address Register 28" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8680+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_28,DMA Fixed Descriptor Base Address Register 28" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" if (((per.l(ad:0xE6720000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x20)++0x07 line.long 0x00 "DMASAR_29,DMA Source Address Register 29" line.long 0x04 "DMADAR_29,DMA Destination Address Register 29" else group.long 0x8700++0x07 line.long 0x00 "DMASAR_29,DMA Source Address Register 29" line.long 0x04 "DMADAR_29,DMA Destination Address Register 29" endif group.long (0x8700+0x08)++0x03 line.long 0x00 "DMATCR_29,DMA Transfer Count Register 29" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8700+0x18)++0x03 line.long 0x00 "DMATCRB_29,DMA Transfer Count Registers B_29" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xE6720000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x28)++0x03 line.long 0x00 "DMATSR_29,DMA Transfer Size Register 29" endif group.long (0x8700+0x38)++0x03 line.long 0x00 "DMATSRB_29,DMA Transfer Size Register 29" if (((per.l(ad:0xE6720000+0x8700+0x1C))&0x100)==0x100) group.long (0x8700+0x2C)++0x03 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long (0x8700+0x0C)++0x03 line.long 0x00 "DMACHCR_29,DMA Channel Control Register 29" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source Address Mode" "Fixed,Incremented,Decremented,Fixed" textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif group.long (0x8700+0x1C)++0x03 line.long 0x00 "DMACHCRB_29,DMA Channel Control Register B_29" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Descriptor number of step" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission of descriptor" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer slow speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8700+0x48)++0x03 line.long 0x00 "DMABUFCR_29,DMA Buffer Control Register 29" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit to SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8700+0x40)++0x01 line.word 0x00 "DMARS_29,DMA Extended Resource Selector 29" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8700+0x50)++0x07 line.long 0x00 "DMADPBASE_29,DMA Descriptor Base Address Register 29" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of descriptor" textline " " sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",External or Built-in" textline " " else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" textline " " endif line.long 0x04 "DMADPCR_29,DMA Descriptor Control Register 29" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8700+0x10)++0x07 line.long 0x00 "DMAFIXSAR_29,DMA Fixed Source Address Register 29" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_29,DMA Fixed Destination Address Register 29" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8700+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_29,DMA Fixed Descriptor Base Address Register 29" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" width 15. textline "" group.long 0xA000++0x3 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for $2 Channels" button "DESCRIPTORMEM" "d (ad:0xE6720000+0xA000)--(ad:0xE6720000+0xA7FF) /long" width 0xB tree.end tree.end tree "LBSC-DMAC" tree "LBSC Common Registers" base ad:0xFEC01000 width 13. group.long 0x00++0x03 line.long 0x00 "DTIMR,DMA Timer Control Register" hexmask.long.word 0x00 0.--15. 1. " DTIM ,DMAC internal timer cycle set" group.long 0x04++0x03 line.long 0x00 "DRMSKR,DMA Request Mask Control Register" bitfld.long 0x00 8.--11. " DRMSK_2 ,Number of clock cycles from the completion of a DMA transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 4.--7. " DRMSK_1 ,Number of clock cycles from the completion of a DMA transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0.--3. " DRMSK_0 ,Number of clock cycles from the completion of a DMA transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x0C++0x03 line.long 0x00 "DMLVLR,DMA Memory Access Priority Level Control Register" bitfld.long 0x00 2. " DMLV_2 ,External bus arbitration priority group for each DMAC channel" "Level 2,Level 1" bitfld.long 0x00 1. " DMLV_1 ,External bus arbitration priority group for each DMAC channel" "Level 2,Level 1" bitfld.long 0x00 0. " DMLV_0 ,External bus arbitration priority group for each DMAC channel" "Level 2,Level 1" rgroup.long 0x10++0x03 line.long 0x00 "DINTSR,DMA Transfer End Interrupt Register" bitfld.long 0x00 2. " DTE_2 ,DMA transfer end interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " DTE_1 ,DMA transfer end interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE_0 ,DMA transfer end interrupt status" "No interrupt,Interrupt" wgroup.long 0x14++0x03 line.long 0x00 "DINTCR,DMA Transfer End Interrupt Status Clear Register" bitfld.long 0x00 2. " DTEC_2 ,DMA transfer end interrupt status clear" "No effect,Clear" bitfld.long 0x00 1. " DTEC_1 ,DMA transfer end interrupt status clear" "No effect,Clear" bitfld.long 0x00 0. " DTEC_0 ,DMA transfer end interrupt status clear" "No effect,Clear" group.long 0x18++0x03 line.long 0x00 "DINTMR,DMA Transfer End Interrupt Enable Register" bitfld.long 0x00 2. " DTEM_2 ,DMA transfer end interrupt output control" "Not out,Out" bitfld.long 0x00 1. " DTEM_1 ,DMA transfer end interrupt output control" "Not out,Out" bitfld.long 0x00 0. " DTEM_0 ,DMA transfer end interrupt output control" "Not out,Out" rgroup.long 0x20++0x03 line.long 0x00 "DACTSR,DMA Activation Status Register" bitfld.long 0x00 2. " DS_2 ,DMA channel 2 status" "Idle,Active" bitfld.long 0x00 1. " DS_1 ,DMA channel 1 status" "Idle,Active" bitfld.long 0x00 0. " DS_0 ,DMA channel 0 status" "Idle,Active" group.long (0x24+0x0)++0x03 line.long 0x00 "LSRSTR_0,Software-Reset Register 0" eventfld.long 0x00 0. " SRST ,Software reset" "No reset,Reset" group.long (0x24+0x4)++0x03 line.long 0x00 "LSRSTR_1,Software-Reset Register 1" eventfld.long 0x00 0. " SRST ,Software reset" "No reset,Reset" group.long (0x24+0x8)++0x03 line.long 0x00 "LSRSTR_2,Software-Reset Register 2" eventfld.long 0x00 0. " SRST ,Software reset" "No reset,Reset" group.long 0x80++0x03 line.long 0x00 "DMALGR,External DMA Data Alignment Control Register" bitfld.long 0x00 11. " DMLG_2[EXBWE] ,EX-BUS data alignment conversion for DMAC channel 2" "Fixed,Variable" bitfld.long 0x00 10. " DMLG_2[EXAC] ,Endian setting channel 2" "Big,Little" bitfld.long 0x00 8.--9. " DMLG_2[EXBW] ,Unit for data alignment conversion" "8 bits,16 bits,,Invalid" textline " " bitfld.long 0x00 7. " DMLG_1[EXBWE] ,EXBUS data alignment conversion for DMAC channel 1" "Fixed,Variable" bitfld.long 0x00 6. " DMLG_1[EXAC] ,Endian setting channel 1" "Big,Little" bitfld.long 0x00 4.--5. " DMLG_2[EXBW] ,Unit for data alignment conversion" "8 bits,16 bits,,Invalid" textline " " bitfld.long 0x00 3. " DMLG_0[EXBWE] ,EXBUS data alignment conversion for DMAC channel 0" "Fixed,Variable" bitfld.long 0x00 2. " DMLG_0[EXAC] ,Endian setting channel 0" "Big,Little" bitfld.long 0x00 0.--1. " DMLG_0[EXBW] ,Unit for data alignment conversion" "8 bits,16 bits,,Invalid" sif (cpu()=="RCARM2")||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") group.long 0x90++0x03 line.long 0x00 "LBSC-DMASPR,LBSC-DMA AXI Priority Control Register" bitfld.long 0x00 8.--11. " SPRR_2 ,AXI bus access priority level for DMAC channel 2" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 4.--7. " SPRR_1 ,AXI bus access priority level for DMAC channel 1" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 0.--3. " SPRR_0 ,AXI bus access priority level for DMAC channel 0" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" else group.long 0x90++0x03 line.long 0x00 "LBSC-DMASPR,LBSC-DMA SHwy Priority Control Register" bitfld.long 0x00 8.--11. " SPRR_2 ,SHwy bus access priority level for DMAC channel 2" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 4.--7. " SPRR_1 ,SHwy bus access priority level for DMAC channel 1" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" bitfld.long 0x00 0.--3. " SPRR_0 ,SHwy bus access priority level for DMAC channel 0" "0(Lowest),1,2,3,4,5,6,7,8,9,10,11,12,13,14,15(Highest)" endif sif !cpuis("R8A77470") group.long 0xC0++0x07 line.long 0x00 "UATMR,Ultra ATA DMA Mode Register" bitfld.long 0x00 24.--25. " UTDR_1 ,Select the external pin for the DREQ in the Ultra ATA 1" "No external pin,DREQ0,DREQ1,No external pin" bitfld.long 0x00 21. " UTWE_1 ,Enables or disables data alignment conversion for write operation in the Ultra ATA 1" "Disabled,Enabled" bitfld.long 0x00 20. " UTRE_1 ,Enables or disables data alignment conversion for read operation in the Ultra ATA 1" "Disabled,Enabled" textline " " bitfld.long 0x00 17.--18. " UTSL_1 ,Select the external pin for the IORDY in the Ultra ATA 1" "No external pin,EX_WAIT0,EX_WAIT1,EX_WAIT2" bitfld.long 0x00 16. " UATM_1 ,Specifies the Ultra ATA 1 operating mode" "Normal DMA mode,Ultra ATA DMA mode" bitfld.long 0x00 8.--9. " UTDR_0 ,Select the external pin for the DREQ signal in the Ultra ATA 0" "No external pin,DREQ0,DREQ1,No external pin" textline " " bitfld.long 0x00 5. " UTWE_0 ,Enables or disables data alignment conversion for write operation in the Ultra ATA 0" "Disabled,Enabled" bitfld.long 0x00 4. " UTRE_0 ,Enables or disables data alignment conversion for read operation in the Ultra ATA 0" "Disabled,Enabled" bitfld.long 0x00 1.--2. " UTSL_0 ,Select the external pin for the IORDY in the Ultra ATA 0" "No external pin,EX_WAIT0,EX_WAIT1,EX_WAIT2" textline " " bitfld.long 0x00 0. " UATM_0 ,Specifies the Ultra ATA 0 operating mode" "Normal DMA mode,Ultra ATA DMA mode" line.long 0x04 "UATWCR,Ultra ATA Write Cycle Setting Register" bitfld.long 0x04 16.--18. " UATWCYC_1 ,Specify the setup and hold clock cycles of the write data in the Ultra ATA 1 [Setup/Hold]]" "1 cycle/1 cycle,2 cycles/1 cycle,2 cycles/2 cycles,3 cycles/2 cycles,3 cycles/3 cycles,4 cycles/3 cycles,4 cycles/4 cycles,5 cycles/4 cycles" bitfld.long 0x04 0.--2. " UATWCYC_0 ,Specify the setup and hold clock cycles of the write data in the Ultra ATA 0 [Setup/Hold]" "1 cycle/1 cycle,2 cycles/1 cycle,2 cycles/2 cycles,3 cycles/2 cycles,3 cycles/3 cycles,4 cycles/3 cycles,4 cycles/4 cycles,5 cycles/4 cycles" group.long 0xC8++0x07 line.long 0x00 "UATTSR_0,Ultra ATA Timeout Period Setting Register 0" line.long 0x04 "UATTSR_1,Ultra ATA Timeout Period Setting Register 1" group.long 0xCC++0x07 line.long 0x00 "UATTER,Ultra ATA Error Indication Register" bitfld.long 0x00 16. " DER_1 ,Timeout occurs due to a temporary communication stop in Ultra ATA 1" "No timeout,Timeout" bitfld.long 0x00 1. " PER ,PIO access is executed" "No access,Access" bitfld.long 0x00 0. " DER_0 ,Timeout occurs due to a temporary communication stop in Ultra ATA 0" "No timeout,Timeout" line.long 0x04 "UATIER,Ultra ATA Error Interrupt Enable Register" bitfld.long 0x04 16. " DERE_1 ,DER1 interrupt" "No interrupt,Interrupt" bitfld.long 0x04 1. " PERE ,PER interrupt" "No interrupt,Interrupt" bitfld.long 0x04 0. " DERE_0 ,DER0 interrupt" "No interrupt,Interrupt" rgroup.long 0xD4++0x03 line.long 0x00 "UATCRCR,Ultra ATA CRC Code Indication Register" hexmask.long.word 0x00 16.--31. 1. " CRC_1 ,CRC code created from the transfer data in Ultra ATA 1" hexmask.long.word 0x00 0.--15. 1. " CRC_0 ,CRC code created from the transfer data in Ultra ATA 0" base ad:0xFEC00030 group.long 0x00++0x03 line.long 0x00 "UATTMR,Ultra ATA Transfer Mode Register" bitfld.long 0x00 9. " DTCD_1 ,Controls the operating mode for continuation in case of transfer termination in Ultra ATA 1" "Disabled,Enabled" bitfld.long 0x00 8. " DTCD_0 ,Controls the operating mode for continuation in case of transfer termination in Ultra ATA 0" "Disabled,Enabled" bitfld.long 0x00 0. " DBG_0 ,Test Bit" "0,1" endif width 0x0B tree.end tree "Channel 0" base ad:0xFEC01000 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long 0x08 0.--25. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01000+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01000+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01000+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 1" base ad:0xFEC01040 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01040+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01040+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01040+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" bitfld.long 0x00 21. " BTMD ,Specifies the burst DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 2" base ad:0xFEC01080 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01080+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01080+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01080+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 3" base ad:0xFEC010C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC010C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC010C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC010C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 4" base ad:0xFEC01100 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01100+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01100+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01100+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 5" base ad:0xFEC01140 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01140+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01140+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01140+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 6" base ad:0xFEC01180 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01180+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01180+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01180+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 7" base ad:0xFEC011C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC011C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC011C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC011C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 8" base ad:0xFEC01200 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01200+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01200+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01200+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 9" base ad:0xFEC01240 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01240+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01240+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01240+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 10" base ad:0xFEC01280 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01280+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01280+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01280+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 11" base ad:0xFEC012C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC012C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC012C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC012C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 12" base ad:0xFEC01300 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01300+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01300+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01300+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 13" base ad:0xFEC01340 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01340+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01340+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01340+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 14" base ad:0xFEC01380 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01380+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01380+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01380+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 15" base ad:0xFEC013C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC013C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC013C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC013C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 16" base ad:0xFEC01400 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01400+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01400+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01400+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 17" base ad:0xFEC01440 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01440+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01440+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01440+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 18" base ad:0xFEC01480 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01480+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01480+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01480+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 19" base ad:0xFEC014C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC014C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC014C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC014C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 20" base ad:0xFEC01500 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01500+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01500+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01500+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 21" base ad:0xFEC01540 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01540+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01540+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01540+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 22" base ad:0xFEC01580 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01580+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01580+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01580+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 23" base ad:0xFEC015C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC015C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC015C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC015C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 24" base ad:0xFEC01600 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01600+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01600+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01600+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 25" base ad:0xFEC01640 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01640+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01640+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01640+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 26" base ad:0xFEC01680 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01680+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01680+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01680+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 27" base ad:0xFEC016C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC016C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC016C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC016C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 28" base ad:0xFEC01700 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01700+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01700+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01700+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 29" base ad:0xFEC01740 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01740+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01740+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01740+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 30" base ad:0xFEC01780 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01780+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01780+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01780+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 31" base ad:0xFEC017C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC017C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC017C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC017C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 32" base ad:0xFEC01800 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01800+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01800+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01800+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 33" base ad:0xFEC01840 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01840+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01840+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01840+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 34" base ad:0xFEC01880 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01880+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01880+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01880+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 35" base ad:0xFEC018C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC018C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC018C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC018C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 36" base ad:0xFEC01900 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01900+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01900+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01900+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 37" base ad:0xFEC01940 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01940+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01940+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01940+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 38" base ad:0xFEC01980 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01980+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01980+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01980+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 39" base ad:0xFEC019C0 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC019C0+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC019C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC019C0+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 40" base ad:0xFEC01A00 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01A00+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01A00+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01A00+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 41" base ad:0xFEC01A40 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01A40+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01A40+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01A40+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree "Channel 42" base ad:0xFEC01A80 width 9. group.long 0x00++0x17 line.long 0x00 "DSAR_0,DMA Source Address Registers 0" line.long 0x04 "DDAR_0,DMA Destination Address Registers 0" line.long 0x08 "DTCR_0,DMA Transfer Count Registers 0" hexmask.long 0x08 0.--25. 1. " DTC ,DMA transfer count" line.long 0x0c "DSAR_1,DMA Source Address Registers 1" line.long 0x10 "DDAR_1,DMA Destination Address Registers 0" line.long 0x14 "DTCR_1,DMA Transfer Count Registers 0" hexmask.long 0x14 0.--25. 1. " DTC ,DMA transfer count" rgroup.long 0x18++0x0b line.long 0x00 "DSASR,DMA Source Address Status Register" line.long 0x04 "DDASR,DMA Destination Address Status Register" line.long 0x08 "DTCSR,DMA Transfer Count Status Register" hexmask.long.tbyte 0x08 0.--23. 1. " DTCS ,Remaining DMA transfer count" textline " " sif CPUIS("R8A774*") if (((per.l(ad:0xFEC01A80+0x28))&0x4000000)==0x4000000) if (((per.l(ad:0xFEC01A80+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif else if (((per.l(ad:0xFEC01A80+0x28))&0x40000)==0x40000) group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" rbitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" rbitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " rbitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "0,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif endif else group.long 0x28++0x03 line.long 0x00 "DCR,DMA Control Register" bitfld.long 0x00 26. " DTAMD ,Data alignment conversion mode" "Input pin/peripheral bus width,DTAC/DTAU/DTAU1" bitfld.long 0x00 25. " DTAC ,Enables or disables data alignment conversion" "Disabled,Enabled" bitfld.long 0x00 24. " DTAU ,Unit for data alignment conversion" "Byte,Word" textline " " bitfld.long 0x00 23. " DTAU_1 ,Specifies whether 8-byte data alignment is performed in 4-byte units" "Not performed,Performed" bitfld.long 0x00 22. " SWMD ,Specifies memory (AXI bus) access size" "1 byte,4 bytes" textline " " bitfld.long 0x00 20. " PKMD ,Enables or disables packing of data" "Disabled,Enabled" bitfld.long 0x00 18. " CT ,Specifies continuous DMA transfer" "Not continuous,Continuous" bitfld.long 0x00 17. " ACMD ,Automatic continuous DMA transfer" "Not transferred,Transferred" textline " " bitfld.long 0x00 16. " DIP ,Specifies the valid DMA information set(s)" "Repeatedly,Alternately" bitfld.long 0x00 13. " SMDL ,Transfer source module" "Memory,Peripheral" bitfld.long 0x00 12. " SPDAM ,Fix or increment the transfer source peripheral address" "Fixed,Incremented" textline " " bitfld.long 0x00 10.--11. " SDRMD ,DMA request mode for the transfer source" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 8.--9. " SPDS ,Data bus width for the transfer source peripheral" "8 bits,16 bits,32 bits,?..." bitfld.long 0x00 5. " DMDL ,Transfer destination module" "Memory,Peripheral" textline " " bitfld.long 0x00 4. " DPDAM ,Fix or increment the transfer destination peripheral address" "Fixed,Incremented" bitfld.long 0x00 2.--3. " DDRMD ,DMA request mode for the transfer destination" "Module request,Auto-request,Timer request,?..." bitfld.long 0x00 0.--1. " DPDS ,Data bus width for the transfer destination peripheral" "8 bits,16 bits,32 bits,?..." endif textline " " wgroup.long 0x2c++0x07 line.long 0x00 "DCMDR,DMA Command Register" bitfld.long 0x00 7. " BDOUT ,Forcibly writes the data read from a peripheral to the SuperHyway bus side" "No effect,Write" bitfld.long 0x00 6. " DQSPD ,Temporarily stops transfer in DMA information units" "No effect,Stop" bitfld.long 0x00 5. " DQSPC ,Cancels temporary transfer stop in DMA information units" "No effect,Cancel" textline " " bitfld.long 0x00 4. " DMSPD ,Temporarily stops transfer in bus cycle units" "No effect,Stop" bitfld.long 0x00 3. " DMSPC ,Cancels temporary transfer stop in bus cycle units" "No effect,Cancel" bitfld.long 0x00 2. " DQEND ,Terminates continuous DMA transfer mode" "No effect,Terminate" textline " " bitfld.long 0x00 1. " DNXT ,Requests the next DMA transfer" "No effect,Request" bitfld.long 0x00 0. " DMEN ,Activates DMA transfer" "No effect,Activate" line.long 0x04 "DSTPR,DMA Forced Stop Register" bitfld.long 0x04 0. " DMSTP ,Forcibly terminates DMA transfer" "No effect,Terminate" rgroup.long 0x34++0x03 line.long 0x00 "DSTSR,DMA Status Register" bitfld.long 0x00 6. " NDP_1 ,Next DMA transfer information register status 1" "Not transferred,Transferred" bitfld.long 0x00 5. " NDP_0 ,Next DMA transfer information register status 0" "Not transferred,Transferred" bitfld.long 0x00 4. " DQSPS ,Temporary stop status of DMA information updating" "Normal operation,Stopped" textline " " bitfld.long 0x00 3. " DMSPS ,Temporary stop status of DMA transfer" "Normal operation,Stopped" bitfld.long 0x00 2. " DQSTS ,DMA acceptance end status" "Accepted,Stopped" bitfld.long 0x00 1. " DRSTS ,DMA transfer request status" "Not requested,Requested" textline " " bitfld.long 0x00 0. " DMSTS ,DMA status" "Completed,Active" group.long 0x38++0x07 line.long 0x00 "DDBGR,DMA Channel Debug Register" bitfld.long 0x00 31. " DBG_02 ,Test bit" "0,1" rbitfld.long 0x00 4.--6. " DBG_01 ,Test bit" "0,1,2,3,4,5,6,7" rbitfld.long 0x00 0.--2. " DBG_00 ,Test bit" "0,1,2,3,4,5,6,7" line.long 0x04 "DDBGR_2,DMA Channel Debug Register 2" bitfld.long 0x04 30. " DBG_12 ,Test bit" "0,1" bitfld.long 0x04 28.--29. " DBG_11 ,Test bit" "0,1,2,3" hexmask.long 0x04 0.--25. 1. " DBG_10 ,Test bit" width 0x0B tree.end tree.end tree.open "DU (Display Unit)" tree "DU 0" base ad:0xFEB00000 width 13. tree "Display Control Registers" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "DSYSR_0,Display Unit System Control Register" bitfld.long 0x00 29. " ILTS ,Input pad latch timing select" "Rising,Falling" bitfld.long 0x00 20. " DSEC ,Display data endian change" "Not performed,Performed" bitfld.long 0x00 16. " IUPD ,internal updating disable" "No,Yes" textline " " bitfld.long 0x00 8.--9. " DRES/DEN ,Display reset/display enable" "Started (display DOOR),Started (display memory),Stopped,?..." bitfld.long 0x00 6.--7. " TVM ,TV synchronization mode" "Master mode,Synchronous mode,TV synchronization mode,?..." bitfld.long 0x00 4.--5. " SCM ,Scan mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" else group.long 0x00++0x03 line.long 0x00 "DSYSR_0,Display Unit System Control Register" bitfld.long 0x00 20. " DSEC ,Display data endian change" "Not performed,Performed" sif cpu()=="R8A77470" bitfld.long 0x00 16. " IUPD ,Internal updating disable" "No,Yes" endif bitfld.long 0x00 6.--7. " TVM ,TV synchronization mode" "Master mode,Synchronous mode,TV synchronization mode,?..." textline " " bitfld.long 0x00 4.--5. " SCM_1 ,Scan mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" endif textline "" group.long 0x04++0x03 line.long 0x00 "DSMR_0,Display Mode Register" bitfld.long 0x00 28. " VSPM ,VSYNC pin mode" "VSYNC,CSYNC" bitfld.long 0x00 27. " ODPM ,ODDF pin mode" "ODDF,CLAMP" bitfld.long 0x00 25.--26. " DIPM ,DISP pin mode" "DISP,CSYNC,,DE" textline " " bitfld.long 0x00 24. " CSPM ,CSYNC pin mode" "CSYNC,HSYNC" bitfld.long 0x00 19. " DIL ,DISP polarity selection" "High-active,Polarity inverted" bitfld.long 0x00 18. " VSL ,VSYNC polarity selection" "Low-active,Polarity inverted" textline " " bitfld.long 0x00 17. " HSL ,HSYNC polarity selection" "Low-active,Polarity inverted" bitfld.long 0x00 16. " DDIS ,DISP output disable" "No,Yes" bitfld.long 0x00 15. " CDEL ,CDE polarity selection" "High-active,Polarity inverted" textline " " bitfld.long 0x00 13.--14. " CDEM ,CDE output mode" "Normal mode,Normal mode,Low level,High level" bitfld.long 0x00 12. " CDED ,CDE disable" "No,Yes" bitfld.long 0x00 8. " ODEV ,ODD signal polarity selection" "Low level,High level" textline " " bitfld.long 0x00 6.--7. " CSY ,CSYNC mode" "Mode 0,,Mode 2,Mode 3" rgroup.long 0x08++0x03 line.long 0x00 "DSSR_0,Display Status Register" bitfld.long 0x00 30.--31. " VC_1_FB ,Video capture frame 1 buffer flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" bitfld.long 0x00 28.--29. " VC_0_FB ,Video capture frame 0 buffer flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" sif cpu()!="R8A77470" bitfld.long 0x00 26.--27. " VC_2_FB ,Video capture 2 frame buffer flag" "PnDSA_0_R,PnDSA_1_R,PnDSA_2_R,Initial state" endif textline " " bitfld.long 0x00 25. " DFB10 ,Display frame buffer 10 flag" "AP_2_DSA_0_R,AP_2_DSA_1_R" bitfld.long 0x00 24. " DFB_9 ,Display frame buffer 9 flag" "AP_1_DSA_0_R,AP_1_DSA_1_R" bitfld.long 0x00 23. " DFB_8 ,Display frame buffer 8 flag" "P8DSA_0_R,P8DSA_1_R" textline " " bitfld.long 0x00 22. " DFB_7 ,Display frame buffer 7 flag" "AP_7_DSA_0_R,AP_7_DSA_1_R" bitfld.long 0x00 21. " DFB_6 ,Display frame buffer 6 flag" "AP_6_DSA_0_R,AP_6_DSA_1_R" bitfld.long 0x00 20. " DFB_5 ,Display frame buffer 5 flag" "AP_5_DSA_0_R,AP_5_DSA_1_R" textline " " bitfld.long 0x00 19. " DFB_4 ,Display frame buffer 4 flag" "P4DSA_0_R,P4DSA_1_R" bitfld.long 0x00 18. " DFB_3 ,Display frame buffer 3 flag" "P3DSA_0_R,P3DSA_1_R" bitfld.long 0x00 17. " DFB_2 ,Display frame buffer 2 flag" "P2DSA_0_R,P2DSA_1_R" textline " " bitfld.long 0x00 16. " DFB_1 ,Display frame buffer 1 flag" "P1DSA_0_R,P1DSA_1_R" textline " " bitfld.long 0x00 15. " TVR ,TV synchronization error flag 1" "Detected,Not detected" bitfld.long 0x00 14. " FRM ,Frame flag" "Low,High" bitfld.long 0x00 12. " BUF ,Buffer underflow flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical blanking flag" "Low,High" bitfld.long 0x00 9. " RINT ,Raster interrupt flag" "No interrupt,Interrupt" bitfld.long 0x00 8. " HBK ,Horizontal blanking flag" "Low,High" textline " " bitfld.long 0x00 7. " ADC_8 ,Auto rendering display change flag 8" "Not switched,Switched" bitfld.long 0x00 6. " ADC_7 ,Auto rendering display change flag 7" "Not switched,Switched" bitfld.long 0x00 5. " ADC_6 ,Auto rendering display change flag 6" "Not switched,Switched" textline " " bitfld.long 0x00 4. " ADC_5 ,Auto rendering display change flag 5" "Not switched,Switched" bitfld.long 0x00 3. " ADC_4 ,Auto rendering display change flag 4" "Not switched,Switched" bitfld.long 0x00 2. " ADC_3 ,Auto rendering display change flag 3" "Not switched,Switched" textline " " bitfld.long 0x00 1. " ADC_2 ,Auto rendering display change flag 2" "Not switched,Switched" bitfld.long 0x00 0. " ADC_1 ,Auto rendering display change flag 1" "Not switched,Switched" wgroup.long 0x0C++0x03 line.long 0x00 "DSRCR_0,Display Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV synchronization signal error flag clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame flag clear" "No effect,Clear" bitfld.long 0x00 12. " BUFL ,Buffer underflow flag clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " VBCL ,Vertical blanking flag clear" "No effect,Clear" bitfld.long 0x00 9. " RICL ,Raster interrupt flag clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal blanking flag clear" "No effect,Clear" textline " " bitfld.long 0x00 7. " ADCL_8 ,Auto rendering display change flag clear 8" "No effect,Clear" bitfld.long 0x00 6. " ADCL_7 ,Auto rendering display change flag clear 7" "No effect,Clear" bitfld.long 0x00 5. " ADCL_6 ,Auto rendering display change flag clear 6" "No effect,Clear" textline " " bitfld.long 0x00 4. " ADCL_5 ,Auto rendering display change flag clear 5" "No effect,Clear" bitfld.long 0x00 3. " ADCL_4 ,Auto rendering display change flag clear 4" "No effect,Clear" bitfld.long 0x00 2. " ADCL_3 ,Auto rendering display change flag clear 3" "No effect,Clear" textline " " bitfld.long 0x00 1. " ADCL_2 ,Auto rendering display change flag clear 2" "No effect,Clear" bitfld.long 0x00 0. " ADCL_1 ,Auto rendering display change flag clear 1" "No effect,Clear" group.long 0x10++0x0b line.long 0x00 "DIER_0,Display Unit Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV synchronous signal error flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " BUE ,Buffer underflow flag interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical blanking flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster interrupt flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK flag interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ADCE_8 ,Auto rendering display change flag 8 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " ADCE_7 ,Auto rendering display change flag 7 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " ADCE_6 ,Auto rendering display change flag 6 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ADCE_5 ,Auto rendering display change flag 5 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ADCE_4 ,Auto rendering display change flag 4 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " ADCE_3 ,Auto rendering display change flag 3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ADCE_2 ,Auto rendering display change flag 2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " ADCE_1 ,Auto rendering display change flag 1 interrupt enable" "Disabled,Enabled" line.long 0x04 "CPCR_0,Color Palette Control Register" bitfld.long 0x04 19. " CP_4_CE ,Color palette 4 change enable" "Disabled,Enabled" bitfld.long 0x04 18. " CP_3_CE ,Color palette 3 change enable" "Disabled,Enabled" bitfld.long 0x04 17. " CP_2_CE ,Color palette 2 change enable" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " CP_1_CE ,Color palette 1 change enable" "Disabled,Enabled" line.long 0x08 "DPPR_0,Display Plane Priority Register" bitfld.long 0x08 31. " DPE_8 ,Display plane priority 8 enable" "Disabled,Enabled" bitfld.long 0x08 28.--30. " DPS_8 ,Display plane priority 8 select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 27. " DPE_7 ,Display plane priority 7 enable" "Disabled,Enabled" bitfld.long 0x08 24.--26. " DPS_7 ,Display plane priority 7 select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 23. " DPE_6 ,Display plane priority 6 enable" "Disabled,Enabled" bitfld.long 0x08 20.--22. " DPS_6 ,Display plane priority 6 select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 19. " DPE_5 ,Display plane priority 5 enable" "Disabled,Enabled" bitfld.long 0x08 16.--18. " DPS_5 ,Display plane priority 5 select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 15. " DPE_4 ,Display plane priority 4 enable" "Disabled,Enabled" bitfld.long 0x08 12.--14. " DPS_4 ,Display plane priority 4 select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 11. " DPE_3 ,Display plane priority 3 enable" "Disabled,Enabled" bitfld.long 0x08 8.--10. " DPS_3 ,Display plane priority 3 select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 7. " DPE_2 ,Display plane priority 2 enable" "Disabled,Enabled" bitfld.long 0x08 4.--6. " DPS_2 ,Display plane priority 2 select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" textline " " bitfld.long 0x08 3. " DPE_1 ,Display plane priority 1 enable" "Disabled,Enabled" bitfld.long 0x08 0.--2. " DPS_1 ,Display plane priority 1 select" "Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8" group.long 0x20++0x03 line.long 0x00 "DEFR_0,Display Unit Extensional Function Enable Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR enabling code [0x7773]" bitfld.long 0x00 12. " EXSL ,External sync signal select" "Post-division clocks,Pre-division clocks" bitfld.long 0x00 11. " EXVL ,External Vsync latch select" "Every clock cycle,Rising edge" textline " " bitfld.long 0x00 5. " EXUP ,External updating mode" "Internal,External" bitfld.long 0x00 4. " VCUP ,Vertical cycle register update timing select" "Falling VSYNC,Rising VSYNC" bitfld.long 0x00 0. " DEFE ,Display unit extensional function enable" "Disabled,Enabled" group.long 0x24++0x03 line.long 0x00 "DAPCR_0,Display Alpha Ratio Plane Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register available code to make DAPCR accessible [0x7773]" bitfld.long 0x00 4. " AP_2_E ,Alpha ratio plane 2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " AP_1_E ,Alpha ratio plane 1 enable" "Disabled,Enabled" if ((((per.l(ad:0xFEB00000+0x34))&0x1)==0x1)&&(((per.l(ad:0xFEB00000+0x38))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register available code [0x7773]" bitfld.long 0x00 13. " CA_2_B ,Display capture a bit 2 function select" "0,1" bitfld.long 0x00 12. " CD_2_F ,Display capture data 2 format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 8. " DC_2_E ,Display capture 2 enable" "Disabled,Enabled" bitfld.long 0x00 5. " CAB ,Display capture a bit function select" "0,1" bitfld.long 0x00 4. " CDF ,Display capture data format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 0. " DCE ,Display capture enable" "Disabled,Enabled" elif ((((per.l(ad:0xFEB00000+0x34))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register available code [0x7773]" bitfld.long 0x00 5. " CAB ,Display capture a bit function select" "0,1" bitfld.long 0x00 4. " CDF ,Display capture data format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 0. " DCE ,Display capture enable" "Disabled,Enabled" elif ((((per.l(ad:0xFEB00000+0x38))&0x1)==0x1)) group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register available code [0x7773]" bitfld.long 0x00 13. " CA_2_B ,Display capture a bit 2 function select" "0,1" bitfld.long 0x00 12. " CD_2_F ,Display capture data 2 format" "RGB565,ARGB1555" textline " " bitfld.long 0x00 8. " DC_2_E ,Display capture 2 enable" "Disabled,Enabled" bitfld.long 0x00 0. " DCE ,Display capture enable" "Disabled,Enabled" else group.long 0x28++0x03 line.long 0x00 "DCPCR_0,Display Capture Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register available code [0x7773]" bitfld.long 0x00 0. " DCE ,Display capture enable" "Disabled,Enabled" endif group.long 0x34++0x03 line.long 0x00 "DEF2R0,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register available code [0x7775]" bitfld.long 0x00 0. " DEFE_2_G ,Display unit extensional function enable SHNavi_2_G" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "DEF3R0,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register available code [0x7776]" bitfld.long 0x00 0. " DEFE_3 ,Display unit extensional function enable from SH-Navi3" "Disabled,Enabled" group.long 0x3c++0x03 line.long 0x00 "DEFR40,Display Unit Extensional Function Enable Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,Register available code [0x7777]" bitfld.long 0x00 5. " LRUO ,LRU function off" "No,yes" rgroup.long 0x60++0x03 line.long 0x00 "DVCSR_0,Display Unit Video Capture Status Register" sif cpu()!="R8A77470" bitfld.long 0x00 22.--23. " VC_3_FB_2 ,Video capture 3 frame buffer flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 20.--21. " VC_2_FB_2 ,Video capture 2 frame buffer flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" endif bitfld.long 0x00 18.--19. " VC_1_FB_2 ,Video capture 1 frame buffer flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" textline " " bitfld.long 0x00 16.--17. " VC_0_FB_2 ,Video capture 0 frame buffer flag 2" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" sif cpu()!="R8A77470" bitfld.long 0x00 6.--7. " VC_3_FB ,Video capture 3 frame buffer flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 4.--5. " VC_2_FB ,Video capture 2 frame buffer flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" endif textline " " bitfld.long 0x00 2.--3. " VC_1_FB ,Video capture 1 frame buffer flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" bitfld.long 0x00 0.--1. " VC_0_FB ,Video capture 0 frame buffer flag" "PnDSA_0_R,PnDSA_1_O,PnDSA_2_R,Initial state" group.long 0xE0++0x03 line.long 0x00 "DEF5R0,Display Unit Extensional Function Enable Register 5" hexmask.long.byte 0x00 24.--31. 1. " CODE ,DEFR_5 enabling code [0x66]" sif cpu()=="R8A77470" bitfld.long 0x00 18. "NTEE,DVENC enable" "Disabled,Enabled" bitfld.long 0x00 6.--7. "RGBYC1,RGB-YC converted output 1" "RGB,Multiplexed YC,Non-multiplexed YC,?..." bitfld.long 0x00 4.--5. "RGBYC0,RGB-YC converted output 0" "RGB,Multiplexed YC,Non-multiplexed YC,?..." else bitfld.long 0x00 14.--15. " YCRGB_2 ,YC-RGB select 2" "No conversion,Levels 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 12.--13. " YCRGB_1 ,YC-RGB select 1" "No conversion,Levels 1/2,Levels 2/3,Levels 3/4" textline " " bitfld.long 0x00 10.--11. " DRC_1 ,DRC select 1" "Not performed,Level 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 8.--9. " DRC_1 ,DRC select 1" "Not performed,Level 1/2,Levels 2/3,Levels 3/4" bitfld.long 0x00 2. " DRCS ,DRC select" "Processor 0,Processor 1" textline " " endif bitfld.long 0x00 0. " DEFE_5 ,Display unit extensional function enable 5" "Disabled,Enabled" group.long 0xE4++0x03 line.long 0x00 "DDLTR_0,Display Data Latency Adjustment Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DDLTR enabling code [0x7766]" bitfld.long 0x00 6. " DLAR_1 ,Display data latency adjustment RGBYC2" "No delay,Delay" sif cpu()!="R8A77470" bitfld.long 0x00 5. " DLAY_1 ,Display data latency adjustment YCRGB2" "No delay,Delay" textline " " bitfld.long 0x00 4. " DLAD_1 ,Display data latency adjustment DRC1" "No delay,Delay" bitfld.long 0x00 1. " DLAY_0 ,Display data latency adjustment YCRGB0" "No delay,Delay" bitfld.long 0x00 0. " DLAD_0 ,Display data latency adjustment DRC0" "No delay,Delay" endif group.long 0xE8++0x03 line.long 0x00 "DEF6R0,Display Unit Extensional Function Enable Register 6" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR_6 enabling code [0x7778]" bitfld.long 0x00 10.--11. " ODPM12 ,ODDF pin mode 22" "ODMP2,,DISP,CDE" bitfld.long 0x00 8.--9. " ODPM02 ,ODDF pin mode 12" "ODMP2,,DISP,CDE" textline " " sif cpu()=="R8A77470" bitfld.long 0x00 3. "MLOS1,Multiple output select 1" "24-bit,12-bit" else bitfld.long 0x00 4. " TCNE_0 ,T-CON enable 0" "Disabled,Enabled" endif bitfld.long 0x00 2. " MLOS_1 ,Multiple output select 1" "24-bit,12-bit" base ad:0xFEB20000 rgroup.long 0x08++0x3 line.long 0x00 "DD_1_SSR_0,Display Unit Domain 1 Status Register 0" bitfld.long 0x00 15. " TVR ,TV synchronization error flag" "Not occurred,Occurred" bitfld.long 0x00 14. " FRM ,Frame flag" "Not occurred,Occurred" bitfld.long 0x00 12. " BUF ,Buffer underflow flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 11. " VBK ,Vertical blanking flag" "Not occurred,Occurred" bitfld.long 0x00 9. " RINT ,Raster interrupt flag" "Not occurred,Occurred" bitfld.long 0x00 8. " HBK ,Horizontal blanking flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 7. " ADC_8 ,Auto rendering display change flag 8" "Not switched,Switched" bitfld.long 0x00 6. " ADC_7 ,Auto rendering display change flag 7" "Not switched,Switched" bitfld.long 0x00 5. " ADC_6 ,Auto rendering display change flag 6" "Not switched,Switched" textline " " bitfld.long 0x00 4. " ADC_5 ,Auto rendering display change flag 5" "Not switched,Switched" bitfld.long 0x00 3. " ADC_4 ,Auto rendering display change flag 4" "Not switched,Switched" bitfld.long 0x00 2. " ADC_3 ,Auto rendering display change flag 3" "Not switched,Switched" textline " " bitfld.long 0x00 1. " ADC_2 ,Auto rendering display change flag 2" "Not switched,Switched" bitfld.long 0x00 0. " ADC_1 ,Auto rendering display change flag 1" "Not switched,Switched" wgroup.long 0x0C++0x3 line.long 0x00 "DD_1_SRCR_0,Display Unit Domain 1 Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV synchronization signal error flag clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame flag clear" "No effect,Clear" bitfld.long 0x00 12. " BUFL ,Buffer underflow flag clear" "No effect,Clear" textline " " bitfld.long 0x00 11. " VBCL ,Vertical blanking flag clear" "No effect,Clear" bitfld.long 0x00 9. " RICL ,Raster interrupt flag clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal blanking flag clear" "No effect,Clear" textline " " bitfld.long 0x00 7. " ADCL_8 ,Auto rendering display change flag clear 8" "No effect,Clear" bitfld.long 0x00 6. " ADCL_7 ,Auto rendering display change flag clear 7" "No effect,Clear" bitfld.long 0x00 5. " ADCL_6 ,Auto rendering display change flag clear 6" "No effect,Clear" textline " " bitfld.long 0x00 4. " ADCL_5 ,Auto rendering display change flag clear 5" "No effect,Clear" bitfld.long 0x00 3. " ADCL_4 ,Auto rendering display change flag clear 4" "No effect,Clear" bitfld.long 0x00 2. " ADCL_3 ,Auto rendering display change flag clear 3" "No effect,Clear" textline " " bitfld.long 0x00 1. " ADCL_2 ,Auto rendering display change flag clear 2" "No effect,Clear" bitfld.long 0x00 0. " ADCL_1 ,Auto rendering display change flag clear 1" "No effect,Clear" group.long 0x10++0x3 line.long 0x00 "DD_1_IER_0,Display Unit Domain 1 Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV synchronous signal error flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " BUE ,Buffer underflow flag interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE ,Vertical blanking flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE ,Raster interrupt flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK flag interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ADCE_8 ,Auto rendering display change flag 8 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " ADCE_7 ,Auto rendering display change flag 7 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " ADCE_6 ,Auto rendering display change flag 6 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ADCE_5 ,Auto rendering display change flag 5 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 3. " ADCE_4 ,Auto rendering display change flag 4 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " ADCE_3 ,Auto rendering display change flag 3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ADCE_2 ,Auto Rendering display change flag 2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " ADCE_1 ,Auto rendering display change flag 1 Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x7 line.long 0x00 "DEF_8_R0,Display Unit Extensional FunctionControl 8 Register 0" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEF_8_Rm enabling code" sif cpu()=="R8A77470" bitfld.long 0x00 1. "YCOD,YC off mode output data" "00,80" else bitfld.long 0x00 6. " VSCS ,VSP_1 channel select" "DU1/DU_0 plane 2,DU_2 plane 1" bitfld.long 0x00 4.--5. " DRGBS ,Digital RGB output select" "DU0,DU1,DU2,?..." textline " " endif bitfld.long 0x00 0. " DEFE_8 ,Display unit extensional function enable 8" "Disabled,Enabled" line.long 0x04 "DOFLR_0,Display Unit Output Signal Fixed Level Register 0" hexmask.long.word 0x04 16.--31. 1. " CODE ,DOFLR_0 enabling code" bitfld.long 0x04 13. " HSYCFL_1 ,HSYNC (DU1) signal fixed low level" "Normal,Fixed low" bitfld.long 0x04 12. " VSYCFL_1 ,VSYNC (DU1) signal fixed low level" "Normal,Fixed low" textline " " bitfld.long 0x04 11. " ODDFL_1 ,ODDF (DU1) signal fixed low level" "Normal,Fixed low" bitfld.long 0x04 10. " DISPFL_1 ,DISP (DU1) signal fixed low level" "Normal,Fixed low" bitfld.long 0x04 9. " CDEFL_1 ,CDE (DU1) signal fixed low level" "Normal,Fixed low" textline " " bitfld.long 0x04 8. " RGBFL_1 ,RGB (DU1) signal fixed low level" "Normal,Fixed low" bitfld.long 0x04 5. " HSYCFL_0 ,HSYNC (DU0) signal fixed low level" "Normal,Fixed low" bitfld.long 0x04 4. " VSYCFL_0 ,VSYNC (DU0) signal fixed low level" "Normal,Fixed low" textline " " bitfld.long 0x04 3. " ODDFL_0 ,ODDF (DU0) signal fixed low level" "Normal,Fixed low" bitfld.long 0x04 2. " DISPFL_0 ,DISP (DU0) signal fixed low level" "Normal,Fixed low" bitfld.long 0x04 1. " CDEFL_0 ,CDE (DU0) signal fixed low level" "Normal,Fixed low" textline " " bitfld.long 0x04 0. " RGBFL_0 ,RGB (DU0) signal fixed low level" "Normal,Fixed low" group.long 0x28++0x3 line.long 0x00 "DIDSR,Display Unit Input Dot Clock Select Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DIDSR enabling code" sif cpu()=="R8A77470" bitfld.long 0x00 10.--11. " LDCS_1 ,DU_1 LVDS dot clock select" "DU1_DOTCLKIN,DU1_DOTCLKIN,LVDS 1,DVENC 1" textline " " bitfld.long 0x00 8.--9. " LDCS_0 ,DU_0 LVDS dot clock select" "DU0_DOTCLKIN,DU0_DOTCLKIN,LVDS 0,DVENC 0" bitfld.long 0x00 2.--3. " PDCS_1 ,DU_1 pad dot clock select" "DU0_DOTCLKIN,DU1_DOTCLKIN,DU1_DOTCLKIN,?..." textline " " bitfld.long 0x00 0.--1. " PDCS_0 ,DU_0 pad dot clock select" "DU0_DOTCLKIN,DU1_DOTCLKIN,DU0_DOTCLKIN,?..." else bitfld.long 0x00 12.--13. " LDCS_2 ,DU_2 LVDS dot clock select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" bitfld.long 0x00 10.--11. " LDCS_1 ,DU_1 LVDS dot clock select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" textline " " bitfld.long 0x00 8.--9. " LDCS_0 ,DU_0 LVDS dot clock select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" bitfld.long 0x00 4.--5. " PDCS_2 ,DU_2 pad dot clock select" "DU_DOTCLKIN2,DU_DOTCLKIN0,DU_DOTCLKIN2,DU_DOTCLKIN1" bitfld.long 0x00 2.--3. " PDCS_1 ,DU_1 pad dot clock select" "DU_DOTCLKIN1,DU_DOTCLKIN0,DU_DOTCLKIN1,DU_DOTCLKIN2" textline " " bitfld.long 0x00 0.--1. " PDCS_0 ,DU_0 pad dot clock select" "DU_DOTCLKIN0,DU_DOTCLKIN1,DU_DOTCLKIN0,DU_DOTCLKIN2" endif tree.end base ad:0xFEB00000 tree "Display Timing Generation Registers" width 11. group.long 0x40++0x1F line.long 0x00 "HDSR_0,Horizontal Display Start Register" hexmask.long.word 0x00 0.--9. 1. " HDS ,Horizontal display start" line.long 0x04 "HDER_0,Horizontal Display End Register" hexmask.long.word 0x04 0.--11. 1. " HDE ,Horizontal display end" line.long 0x08 "VDSR_0,Vertical Display Start Register" hexmask.long.word 0x08 0.--8. 1. " VDS ,Vertical display start" line.long 0x0c "VDER_0,Vertical Display End Register" hexmask.long.word 0x0c 0.--10. 1. " VDE ,Vertical display end" line.long 0x10 "HCR_0,Horizontal Cycle Register" hexmask.long.word 0x10 0.--11. 1. " HC ,Horizontal cycle" line.long 0x14 "HSWR_0,Horizontal Sync Width Register" hexmask.long.word 0x14 0.--8. 1. " HSW ,Horizontal sync width" line.long 0x18 "VCR_0,Vertical Cycle Register" hexmask.long.word 0x18 0.--10. 1. " VC ,Vertical cycle" line.long 0x1c "VSPR_0,Vertical Sync Point Register" hexmask.long.word 0x1c 0.--10. 1. " VSP ,Vertical sync point" if (((per.l(ad:0xFEB00000+0x04))&0x80)==0x80) group.long (0x60)++0x7 line.long 0x00 "EQWR_0,Equal Pulse Width Register" hexmask.long.byte 0x00 0.--6. 1. " EQW ,Equal pulse width" line.long 0x04 "SPWR_0,Serration Width Register" hexmask.long.word 0x04 0.--9. 1. " SPW ,Serration width" else hgroup.long 0x60++0x3 hide.long 0x00 "EQWR_0,Equal Pulse Width Register" hgroup.long 0x64++0x3 hide.long 0x00 "SPWR_0,Separation Width Register" endif group.long 0x70++0xF line.long 0x00 "CLAMPSR_0,CLAMP Signal Start Register" hexmask.long.word 0x00 0.--11. 1. " CLAMPS ,CLAMP signal start" line.long 0x04 "CLAMPWR_0,CLAMP Signal Width Register" hexmask.long.word 0x04 0.--11. 1. " CLAMPW ,CLAMP signal width" line.long 0x08 "DESR_0,DE Signal Start Register" hexmask.long.word 0x08 0.--11. 1. " DES ,DE signal start" line.long 0x0c "DEWR_0,DE Signal Width Register" hexmask.long.word 0x0c 0.--11. 1. " DEW ,DE signal width" tree.end width 12. tree "Display Attribute Registers" group.long 0x80++0xF line.long 0x0 "CP_1_TR_0,Color Palette Transparent Color Register" bitfld.long 0x0 15. " CP_1_IF ,Color palette index F" "Not set,Set" bitfld.long 0x0 14. " CP_1_IE ,Color palette index E" "Not set,Set" bitfld.long 0x0 13. " CP_1_ID ,Color palette index D" "Not set,Set" bitfld.long 0x0 12. " CP_1_IC ,Color palette index C" "Not set,Set" textline " " bitfld.long 0x0 11. " CP_1_IB ,Color palette index B" "Not set,Set" bitfld.long 0x0 10. " CP_1_IA ,Color palette index A" "Not set,Set" bitfld.long 0x0 9. " CP_1_I9 ,Color palette index 9" "Not set,Set" bitfld.long 0x0 8. " CP_1_I8 ,Color palette index 8" "Not set,Set" textline " " bitfld.long 0x0 7. " CP_1_I7 ,Color palette index 7" "Not set,Set" bitfld.long 0x0 6. " CP_1_I6 ,Color palette index 6" "Not set,Set" bitfld.long 0x0 5. " CP_1_I5 ,Color palette index 5" "Not set,Set" bitfld.long 0x0 4. " CP_1_I4 ,Color palette index 4" "Not set,Set" textline " " bitfld.long 0x0 3. " CP_1_I3 ,Color palette index 3" "Not set,Set" bitfld.long 0x0 2. " CP_1_I2 ,Color palette index 2" "Not set,Set" bitfld.long 0x0 1. " CP_1_I1 ,Color palette index 1" "Not set,Set" bitfld.long 0x0 0. " CP_1_I0 ,Color palette index 0" "Not set,Set" line.long 0x4 "CP_2_TR_0,Color Palette Transparent Color Register" bitfld.long 0x4 15. " CP_2_IF ,Color palette index F" "Not set,Set" bitfld.long 0x4 14. " CP_2_IE ,Color palette index E" "Not set,Set" bitfld.long 0x4 13. " CP_2_ID ,Color palette index D" "Not set,Set" bitfld.long 0x4 12. " CP_2_IC ,Color palette index C" "Not set,Set" textline " " bitfld.long 0x4 11. " CP_2_IB ,Color palette index B" "Not set,Set" bitfld.long 0x4 10. " CP_2_IA ,Color palette index A" "Not set,Set" bitfld.long 0x4 9. " CP_2_I9 ,Color palette index 9" "Not set,Set" bitfld.long 0x4 8. " CP_2_I8 ,Color palette index 8" "Not set,Set" textline " " bitfld.long 0x4 7. " CP_2_I7 ,Color palette index 7" "Not set,Set" bitfld.long 0x4 6. " CP_2_I6 ,Color palette index 6" "Not set,Set" bitfld.long 0x4 5. " CP_2_I5 ,Color palette index 5" "Not set,Set" bitfld.long 0x4 4. " CP_2_I4 ,Color palette index 4" "Not set,Set" textline " " bitfld.long 0x4 3. " CP_2_I3 ,Color palette index 3" "Not set,Set" bitfld.long 0x4 2. " CP_2_I2 ,Color palette index 2" "Not set,Set" bitfld.long 0x4 1. " CP_2_I1 ,Color palette index 1" "Not set,Set" bitfld.long 0x4 0. " CP_2_I0 ,Color palette index 0" "Not set,Set" line.long 0x8 "CP_3_TR_0,Color Palette Transparent Color Register" bitfld.long 0x8 15. " CP_3_IF ,Color palette index F" "Not set,Set" bitfld.long 0x8 14. " CP_3_IE ,Color palette index E" "Not set,Set" bitfld.long 0x8 13. " CP_3_ID ,Color palette index D" "Not set,Set" bitfld.long 0x8 12. " CP_3_IC ,Color palette index C" "Not set,Set" textline " " bitfld.long 0x8 11. " CP_3_IB ,Color palette index B" "Not set,Set" bitfld.long 0x8 10. " CP_3_IA ,Color palette index A" "Not set,Set" bitfld.long 0x8 9. " CP_3_I9 ,Color palette index 9" "Not set,Set" bitfld.long 0x8 8. " CP_3_I8 ,Color palette index 8" "Not set,Set" textline " " bitfld.long 0x8 7. " CP_3_I7 ,Color palette index 7" "Not set,Set" bitfld.long 0x8 6. " CP_3_I6 ,Color palette index 6" "Not set,Set" bitfld.long 0x8 5. " CP_3_I5 ,Color palette index 5" "Not set,Set" bitfld.long 0x8 4. " CP_3_I4 ,Color palette index 4" "Not set,Set" textline " " bitfld.long 0x8 3. " CP_3_I3 ,Color palette index 3" "Not set,Set" bitfld.long 0x8 2. " CP_3_I2 ,Color palette index 2" "Not set,Set" bitfld.long 0x8 1. " CP_3_I1 ,Color palette index 1" "Not set,Set" bitfld.long 0x8 0. " CP_3_I0 ,Color palette index 0" "Not set,Set" line.long 0xC "CP_4_TR_0,Color Palette Transparent Color Register" bitfld.long 0xC 15. " CP_4_IF ,Color palette index F" "Not set,Set" bitfld.long 0xC 14. " CP_4_IE ,Color palette index E" "Not set,Set" bitfld.long 0xC 13. " CP_4_ID ,Color palette index D" "Not set,Set" bitfld.long 0xC 12. " CP_4_IC ,Color palette index C" "Not set,Set" textline " " bitfld.long 0xC 11. " CP_4_IB ,Color palette index B" "Not set,Set" bitfld.long 0xC 10. " CP_4_IA ,Color palette index A" "Not set,Set" bitfld.long 0xC 9. " CP_4_I9 ,Color palette index 9" "Not set,Set" bitfld.long 0xC 8. " CP_4_I8 ,Color palette index 8" "Not set,Set" textline " " bitfld.long 0xC 7. " CP_4_I7 ,Color palette index 7" "Not set,Set" bitfld.long 0xC 6. " CP_4_I6 ,Color palette index 6" "Not set,Set" bitfld.long 0xC 5. " CP_4_I5 ,Color palette index 5" "Not set,Set" bitfld.long 0xC 4. " CP_4_I4 ,Color palette index 4" "Not set,Set" textline " " bitfld.long 0xC 3. " CP_4_I3 ,Color palette index 3" "Not set,Set" bitfld.long 0xC 2. " CP_4_I2 ,Color palette index 2" "Not set,Set" bitfld.long 0xC 1. " CP_4_I1 ,Color palette index 1" "Not set,Set" bitfld.long 0xC 0. " CP_4_I0 ,Color palette index 0" "Not set,Set" textline " " group.long 0x90++0xF line.long 0x00 "DOOR_0,Display-Off Mode Output Register" hexmask.long.byte 0x00 18.--23. 1. " DOR ,Display off mode output red" hexmask.long.byte 0x00 10.--15. 1. " DOG ,Display off mode output green" hexmask.long.byte 0x00 2.--7. 1. " DOB ,Display off mode output blue" line.long 0x04 "CDER_0,Color Detection Register" hexmask.long.byte 0x04 18.--23. 1. " CDR ,Color detection red" hexmask.long.byte 0x04 10.--15. 1. " CDG ,Color detection green" hexmask.long.byte 0x04 2.--7. 1. " CDB ,Color detection blue" line.long 0x08 "BPOR_0,Ground Color Register" hexmask.long.byte 0x08 18.--23. 1. " BPOR ,Background plane output red" hexmask.long.byte 0x08 10.--15. 1. " BPOG ,Background plane output green" hexmask.long.byte 0x08 2.--7. 1. " BPOB ,Background plane output blue" line.long 0x0c "RINTOFSR_0,Raster Interrupt Offset Register" hexmask.long.word 0x0c 0.--10. 1. " RINTOFS ,Raster interrupt offset" tree.end tree "Display Planes 1-8" tree "Display Plane 1" base (ad:0xFEB00000+0x100) width 12. if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "P_1_MR,Plane 1 Mode Register" sif CPUIS("R8A77430")||CPUIS("R8A77440") bitfld.long 0x00 26.--27. " P_1_VISL ,Plane 1 video input select" "VIN0,VIN1,VIN2,?..." textline " " elif CPUIS("R8A77450") bitfld.long 0x00 26.--27. " P_1_VISL ,Plane 1 video input select" "VIN0,VIN1,?..." textline " " else bitfld.long 0x00 26.--27. " P_1_VISL ,Plane 1 video input select" "VIN0,VIN1,VIN2,VIN3" textline " " endif bitfld.long 0x00 20. " P_1_YCDF ,Plane 1 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_1_TC ,Plane 1 transparent color" "P_1_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_1WAE ,Plane 1 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_1_SPIM ,Plane 1 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_1_CPSL ,Plane 1 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_1_DC ,Plane 1 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_1_BM ,Plane 1 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_1_DDF ,Plane 1 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" else group.long 0x00++0x03 line.long 0x00 "P_1_MR,Plane 1 Mode Register" bitfld.long 0x00 20. " P_1_YCDF ,Plane 1 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_1_TC ,Plane 1 transparent color" "P_1_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_1WAE ,Plane 1 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_1_SPIM ,Plane 1 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_1_CPSL ,Plane 1 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_1_DC ,Plane 1 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_1_BM ,Plane 1 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_1_DDF ,Plane 1 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" endif group.long 0x04++0x03 line.long 0x00 "P_1_MWR,Plane 1 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_1_MWX ,Plane 1 memory width X" if (((per.l(ad:0xFEB00000+0x100))&0x03)==0x00) group.long 0x08++0x03 line.long 0x00 "P_1_ALPHAR,Plane 1 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_1_ABIT ,Plane 1 A bit function select" "A=1,A=0,Regardless A,Regardless A" bitfld.long 0x00 8.--10. " P_1_BRSL ,Plane 1 blend ratio selection" "P_1_ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P_1_ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P_1_ALPHA ,Plane 1 blend ratio" else group.long 0x08++0x03 line.long 0x00 "P_1_ALPHAR,Plane 1 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_1_ABIT ,Plane 1 A bit function select" "A=1,A=0,Regardless A,Regardless A" hexmask.long.byte 0x00 0.--7. 1. " P_1_ALPHA ,Plane 1 blend ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P_1_DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_1_DSX ,Plane 1 display size X" line.long 0x04 "P_1_DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_1_DSY ,Plane 1 display size Y" line.long 0x08 "P_1_DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_1_DPX ,Plane 1 display position X" line.long 0x0C "P_1_DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_1_DPY ,Plane 1 display position Y" else group.long 0x10++0x0F line.long 0x00 "P_1_DSXR,Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_1_DSX ,Plane 1 display size X" line.long 0x04 "P_1_DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_1_DSY ,Plane 1 display size Y" line.long 0x08 "P_1_DPXR,Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_1_DPX ,Plane 1 display position X" line.long 0x0C "P_1_DPYR,Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_1_DPY ,Plane 1 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P_1_DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_1_DSA0 ,Plane 1 display domain start address 0" line.long 0x04 "P_1_DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_1_DSA1 ,Plane 1 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_1_DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_1_DSA2 ,Plane 1 display domain start address 2" else line.long 0x08 "P_1_DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_1_DSA2 ,Plane 1 display domain start address 2" endif else group.long 0x20++0x0b line.long 0x00 "P_1_DSA0R,Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_1_DSA0 ,Plane 1 display domain start address 0" line.long 0x04 "P_1_DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_1_DSA1 ,Plane 1 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_1_DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_1_DSA2 ,Plane 1 display domain start address 2" else line.long 0x08 "P_1_DSA2R,Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_1_DSA2 ,Plane 1 display domain start address 2" endif endif group.long 0x30++0x13 line.long 0x00 "P_1_SPXR,Plane 1 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_1_SPX ,Plane 1 starting position X" line.long 0x04 "P_1_SPYR,Plane 1 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_1_SPY ,Plane 1 starting position Y" line.long 0x08 "P_1_WASPR,Plane 1 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_1_WASPY ,Plane 1 wrap around starting position Y" line.long 0x0C "P_1_WAMWR,Plane 1 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_1_WAMWY ,Plane 1 wrap around memory width Y" line.long 0x10 "P_1_BTR,Plane 1 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_1_BTA ,Plane 1 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_1_BTB ,Plane 1 blinking cycle B" textline " " group.long 0x44++0x0B line.long 0x00 "P_1_TC_1R,Plane 1 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P_1_TC1 ,Plane 1 transparent color 1" line.long 0x04 "P_1_TC_2R,Plane 1 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P_1_TC2 ,Plane 1 transparent color 2" line.long 0x08 "P_1_TC_3R,Plane 1 Transparent Color 3 Register" hexmask.long.byte 0x08 24.--31. 1. " CODE ,P_1_TC3R enabling code [0x66]" hexmask.long.tbyte 0x08 0.--23. 1. " P_1_TC3 ,Plane 1 transparent color 3" textline " " group.long 0x50++0x03 line.long 0x00 "P_1_MLR,Plane 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_1_MLY ,Plane 1 memory length Y" group.long 0x80++0x03 line.long 0x00 "P_1_SWAPR,Plane 1 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_1_DIGN/SPBY ,Plane 1 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_1_SPQW ,Plane 1 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_1_SPLW ,Plane 1 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_1_SPWD ,Plane 1 word swap enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P_1_DDCR,Plane 1 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_1_DDCR enabling code [0x7775]" bitfld.long 0x00 11. " P_1_LRGB1 ,Plane 1 32 bits/pixel display control 1" "Not used,Used" bitfld.long 0x00 10. " P_1_LRGB0 ,Plane 1 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P_1_DDCR2,Plane 1 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_1_DDCR2 enabling code [0x7776]" textline " " bitfld.long 0x00 5. " P_1_NV21 ,Plane 1 NV21 data format" "NV12 order,NV21 order" bitfld.long 0x00 4. " P_1_Y420 ,Plane 1 YUV420 data format" "YUV422,YUV420" bitfld.long 0x00 1. " P_1_DIVU ,Plane 1 UV data from divided YUV" "P_1_DDF bit of P_1_MR,UV data" textline " " bitfld.long 0x00 0. " P_1_DIVY ,Plane 1 Y data from divided YUV" "P_1_DDF bit of P_1_MR,Y data" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "P_1_DDCR4,Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_1_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P1VSPS ,Plane 1 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P1VSPS ,Plane 1 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_1_EDF ,Plane 1 extensional data format" "P1DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "P_1_DDCR4,Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_1_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_1_EDF ,Plane 1 extensional data format" "P1DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Display Plane 2" base (ad:0xFEB00000+0x200) width 12. if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "P_2_MR,Plane 2 Mode Register" sif CPUIS("R8A77430")||CPUIS("R8A77440") bitfld.long 0x00 26.--27. " P_2_VISL ,Plane 2 video input select" "VIN0,VIN1,VIN2,?..." textline " " elif CPUIS("R8A77450") bitfld.long 0x00 26.--27. " P_2_VISL ,Plane 2 video input select" "VIN0,VIN1,?..." textline " " else bitfld.long 0x00 26.--27. " P_2_VISL ,Plane 2 video input select" "VIN0,VIN1,VIN2,VIN3" textline " " endif bitfld.long 0x00 20. " P_2_YCDF ,Plane 2 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_2_TC ,Plane 2 transparent color" "P_2_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_2WAE ,Plane 2 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_2_SPIM ,Plane 2 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_2_CPSL ,Plane 2 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_2_DC ,Plane 2 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_2_BM ,Plane 2 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_2_DDF ,Plane 2 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" else group.long 0x00++0x03 line.long 0x00 "P_2_MR,Plane 2 Mode Register" bitfld.long 0x00 20. " P_2_YCDF ,Plane 2 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_2_TC ,Plane 2 transparent color" "P_2_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_2WAE ,Plane 2 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_2_SPIM ,Plane 2 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_2_CPSL ,Plane 2 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_2_DC ,Plane 2 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_2_BM ,Plane 2 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_2_DDF ,Plane 2 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" endif group.long 0x04++0x03 line.long 0x00 "P_2_MWR,Plane 2 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_2_MWX ,Plane 2 memory width X" if (((per.l(ad:0xFEB00000+0x200))&0x03)==0x00) group.long 0x08++0x03 line.long 0x00 "P_2_ALPHAR,Plane 2 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_2_ABIT ,Plane 2 A bit function select" "A=1,A=0,Regardless A,Regardless A" bitfld.long 0x00 8.--10. " P_2_BRSL ,Plane 2 blend ratio selection" "P_2_ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P_2_ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P_2_ALPHA ,Plane 2 blend ratio" else group.long 0x08++0x03 line.long 0x00 "P_2_ALPHAR,Plane 2 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_2_ABIT ,Plane 2 A bit function select" "A=1,A=0,Regardless A,Regardless A" hexmask.long.byte 0x00 0.--7. 1. " P_2_ALPHA ,Plane 2 blend ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P_2_DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_2_DSX ,Plane 2 display size X" line.long 0x04 "P_2_DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_2_DSY ,Plane 2 display size Y" line.long 0x08 "P_2_DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_2_DPX ,Plane 2 display position X" line.long 0x0C "P_2_DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_2_DPY ,Plane 2 display position Y" else group.long 0x10++0x0F line.long 0x00 "P_2_DSXR,Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_2_DSX ,Plane 2 display size X" line.long 0x04 "P_2_DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_2_DSY ,Plane 2 display size Y" line.long 0x08 "P_2_DPXR,Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_2_DPX ,Plane 2 display position X" line.long 0x0C "P_2_DPYR,Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_2_DPY ,Plane 2 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P_2_DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_2_DSA0 ,Plane 2 display domain start address 0" line.long 0x04 "P_2_DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_2_DSA1 ,Plane 2 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_2_DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_2_DSA2 ,Plane 2 display domain start address 2" else line.long 0x08 "P_2_DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_2_DSA2 ,Plane 2 display domain start address 2" endif else group.long 0x20++0x0b line.long 0x00 "P_2_DSA0R,Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_2_DSA0 ,Plane 2 display domain start address 0" line.long 0x04 "P_2_DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_2_DSA1 ,Plane 2 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_2_DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_2_DSA2 ,Plane 2 display domain start address 2" else line.long 0x08 "P_2_DSA2R,Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_2_DSA2 ,Plane 2 display domain start address 2" endif endif group.long 0x30++0x13 line.long 0x00 "P_2_SPXR,Plane 2 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_2_SPX ,Plane 2 starting position X" line.long 0x04 "P_2_SPYR,Plane 2 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_2_SPY ,Plane 2 starting position Y" line.long 0x08 "P_2_WASPR,Plane 2 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_2_WASPY ,Plane 2 wrap around starting position Y" line.long 0x0C "P_2_WAMWR,Plane 2 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_2_WAMWY ,Plane 2 wrap around memory width Y" line.long 0x10 "P_2_BTR,Plane 2 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_2_BTA ,Plane 2 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_2_BTB ,Plane 2 blinking cycle B" textline " " group.long 0x44++0x0B line.long 0x00 "P_2_TC_1R,Plane 2 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P_2_TC1 ,Plane 2 transparent color 1" line.long 0x04 "P_2_TC_2R,Plane 2 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P_2_TC2 ,Plane 2 transparent color 2" line.long 0x08 "P_2_TC_3R,Plane 2 Transparent Color 3 Register" hexmask.long.byte 0x08 24.--31. 1. " CODE ,P_2_TC3R enabling code [0x66]" hexmask.long.tbyte 0x08 0.--23. 1. " P_2_TC3 ,Plane 2 transparent color 3" textline " " group.long 0x50++0x03 line.long 0x00 "P_2_MLR,Plane 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_2_MLY ,Plane 2 memory length Y" group.long 0x80++0x03 line.long 0x00 "P_2_SWAPR,Plane 2 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_2_DIGN/SPBY ,Plane 2 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_2_SPQW ,Plane 2 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_2_SPLW ,Plane 2 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_2_SPWD ,Plane 2 word swap enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P_2_DDCR,Plane 2 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_2_DDCR enabling code [0x7775]" bitfld.long 0x00 11. " P_2_LRGB1 ,Plane 2 32 bits/pixel display control 1" "Not used,Used" bitfld.long 0x00 10. " P_2_LRGB0 ,Plane 2 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P_2_DDCR2,Plane 2 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_2_DDCR2 enabling code [0x7776]" textline " " bitfld.long 0x00 5. " P_2_NV21 ,Plane 2 NV21 data format" "NV12 order,NV21 order" bitfld.long 0x00 4. " P_2_Y420 ,Plane 2 YUV420 data format" "YUV422,YUV420" bitfld.long 0x00 1. " P_2_DIVU ,Plane 2 UV data from divided YUV" "P_2_DDF bit of P_2_MR,UV data" textline " " bitfld.long 0x00 0. " P_2_DIVY ,Plane 2 Y data from divided YUV" "P_2_DDF bit of P_2_MR,Y data" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "P_2_DDCR4,Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_2_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P2VSPS ,Plane 2 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P2VSPS ,Plane 2 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_2_EDF ,Plane 2 extensional data format" "P2DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "P_2_DDCR4,Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_2_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_2_EDF ,Plane 2 extensional data format" "P2DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Display Plane 3" base (ad:0xFEB00000+0x300) width 12. if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "P_3_MR,Plane 3 Mode Register" sif CPUIS("R8A77430")||CPUIS("R8A77440") bitfld.long 0x00 26.--27. " P_3_VISL ,Plane 3 video input select" "VIN0,VIN1,VIN2,?..." textline " " elif CPUIS("R8A77450") bitfld.long 0x00 26.--27. " P_3_VISL ,Plane 3 video input select" "VIN0,VIN1,?..." textline " " else bitfld.long 0x00 26.--27. " P_3_VISL ,Plane 3 video input select" "VIN0,VIN1,VIN2,VIN3" textline " " endif bitfld.long 0x00 20. " P_3_YCDF ,Plane 3 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_3_TC ,Plane 3 transparent color" "P_3_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_3WAE ,Plane 3 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_3_SPIM ,Plane 3 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_3_CPSL ,Plane 3 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_3_DC ,Plane 3 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_3_BM ,Plane 3 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_3_DDF ,Plane 3 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" else group.long 0x00++0x03 line.long 0x00 "P_3_MR,Plane 3 Mode Register" bitfld.long 0x00 20. " P_3_YCDF ,Plane 3 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_3_TC ,Plane 3 transparent color" "P_3_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_3WAE ,Plane 3 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_3_SPIM ,Plane 3 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_3_CPSL ,Plane 3 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_3_DC ,Plane 3 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_3_BM ,Plane 3 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_3_DDF ,Plane 3 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" endif group.long 0x04++0x03 line.long 0x00 "P_3_MWR,Plane 3 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_3_MWX ,Plane 3 memory width X" if (((per.l(ad:0xFEB00000+0x300))&0x03)==0x00) group.long 0x08++0x03 line.long 0x00 "P_3_ALPHAR,Plane 3 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_3_ABIT ,Plane 3 A bit function select" "A=1,A=0,Regardless A,Regardless A" bitfld.long 0x00 8.--10. " P_3_BRSL ,Plane 3 blend ratio selection" "P_3_ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P_3_ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P_3_ALPHA ,Plane 3 blend ratio" else group.long 0x08++0x03 line.long 0x00 "P_3_ALPHAR,Plane 3 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_3_ABIT ,Plane 3 A bit function select" "A=1,A=0,Regardless A,Regardless A" hexmask.long.byte 0x00 0.--7. 1. " P_3_ALPHA ,Plane 3 blend ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P_3_DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_3_DSX ,Plane 3 display size X" line.long 0x04 "P_3_DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_3_DSY ,Plane 3 display size Y" line.long 0x08 "P_3_DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_3_DPX ,Plane 3 display position X" line.long 0x0C "P_3_DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_3_DPY ,Plane 3 display position Y" else group.long 0x10++0x0F line.long 0x00 "P_3_DSXR,Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_3_DSX ,Plane 3 display size X" line.long 0x04 "P_3_DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_3_DSY ,Plane 3 display size Y" line.long 0x08 "P_3_DPXR,Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_3_DPX ,Plane 3 display position X" line.long 0x0C "P_3_DPYR,Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_3_DPY ,Plane 3 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P_3_DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_3_DSA0 ,Plane 3 display domain start address 0" line.long 0x04 "P_3_DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_3_DSA1 ,Plane 3 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_3_DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_3_DSA2 ,Plane 3 display domain start address 2" else line.long 0x08 "P_3_DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_3_DSA2 ,Plane 3 display domain start address 2" endif else group.long 0x20++0x0b line.long 0x00 "P_3_DSA0R,Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_3_DSA0 ,Plane 3 display domain start address 0" line.long 0x04 "P_3_DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_3_DSA1 ,Plane 3 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_3_DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_3_DSA2 ,Plane 3 display domain start address 2" else line.long 0x08 "P_3_DSA2R,Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_3_DSA2 ,Plane 3 display domain start address 2" endif endif group.long 0x30++0x13 line.long 0x00 "P_3_SPXR,Plane 3 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_3_SPX ,Plane 3 starting position X" line.long 0x04 "P_3_SPYR,Plane 3 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_3_SPY ,Plane 3 starting position Y" line.long 0x08 "P_3_WASPR,Plane 3 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_3_WASPY ,Plane 3 wrap around starting position Y" line.long 0x0C "P_3_WAMWR,Plane 3 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_3_WAMWY ,Plane 3 wrap around memory width Y" line.long 0x10 "P_3_BTR,Plane 3 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_3_BTA ,Plane 3 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_3_BTB ,Plane 3 blinking cycle B" textline " " group.long 0x44++0x0B line.long 0x00 "P_3_TC_1R,Plane 3 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P_3_TC1 ,Plane 3 transparent color 1" line.long 0x04 "P_3_TC_2R,Plane 3 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P_3_TC2 ,Plane 3 transparent color 2" line.long 0x08 "P_3_TC_3R,Plane 3 Transparent Color 3 Register" hexmask.long.byte 0x08 24.--31. 1. " CODE ,P_3_TC3R enabling code [0x66]" hexmask.long.tbyte 0x08 0.--23. 1. " P_3_TC3 ,Plane 3 transparent color 3" textline " " group.long 0x50++0x03 line.long 0x00 "P_3_MLR,Plane 3 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_3_MLY ,Plane 3 memory length Y" group.long 0x80++0x03 line.long 0x00 "P_3_SWAPR,Plane 3 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_3_DIGN/SPBY ,Plane 3 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_3_SPQW ,Plane 3 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_3_SPLW ,Plane 3 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_3_SPWD ,Plane 3 word swap enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P_3_DDCR,Plane 3 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_3_DDCR enabling code [0x7775]" bitfld.long 0x00 11. " P_3_LRGB1 ,Plane 3 32 bits/pixel display control 1" "Not used,Used" bitfld.long 0x00 10. " P_3_LRGB0 ,Plane 3 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P_3_DDCR2,Plane 3 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_3_DDCR2 enabling code [0x7776]" textline " " bitfld.long 0x00 5. " P_3_NV21 ,Plane 3 NV21 data format" "NV12 order,NV21 order" bitfld.long 0x00 4. " P_3_Y420 ,Plane 3 YUV420 data format" "YUV422,YUV420" bitfld.long 0x00 1. " P_3_DIVU ,Plane 3 UV data from divided YUV" "P_3_DDF bit of P_3_MR,UV data" textline " " bitfld.long 0x00 0. " P_3_DIVY ,Plane 3 Y data from divided YUV" "P_3_DDF bit of P_3_MR,Y data" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "P_3_DDCR4,Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_3_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P3VSPS ,Plane 3 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P3VSPS ,Plane 3 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_3_SDFS ,Plane 3 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_3_SDFS ,Plane 3 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_3_EDF ,Plane 3 extensional data format" "P3DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "P_3_DDCR4,Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_3_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_3_SDFS ,Plane 3 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_3_SDFS ,Plane 3 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_3_EDF ,Plane 3 extensional data format" "P3DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Display Plane 4" base (ad:0xFEB00000+0x400) width 12. if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "P_4_MR,Plane 4 Mode Register" sif CPUIS("R8A77430")||CPUIS("R8A77440") bitfld.long 0x00 26.--27. " P_4_VISL ,Plane 4 video input select" "VIN0,VIN1,VIN2,?..." textline " " elif CPUIS("R8A77450") bitfld.long 0x00 26.--27. " P_4_VISL ,Plane 4 video input select" "VIN0,VIN1,?..." textline " " else bitfld.long 0x00 26.--27. " P_4_VISL ,Plane 4 video input select" "VIN0,VIN1,VIN2,VIN3" textline " " endif bitfld.long 0x00 20. " P_4_YCDF ,Plane 4 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_4_TC ,Plane 4 transparent color" "P_4_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_4WAE ,Plane 4 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_4_SPIM ,Plane 4 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_4_CPSL ,Plane 4 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_4_DC ,Plane 4 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_4_BM ,Plane 4 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_4_DDF ,Plane 4 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" else group.long 0x00++0x03 line.long 0x00 "P_4_MR,Plane 4 Mode Register" bitfld.long 0x00 20. " P_4_YCDF ,Plane 4 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_4_TC ,Plane 4 transparent color" "P_4_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_4WAE ,Plane 4 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_4_SPIM ,Plane 4 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_4_CPSL ,Plane 4 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_4_DC ,Plane 4 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_4_BM ,Plane 4 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_4_DDF ,Plane 4 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" endif group.long 0x04++0x03 line.long 0x00 "P_4_MWR,Plane 4 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_4_MWX ,Plane 4 memory width X" if (((per.l(ad:0xFEB00000+0x400))&0x03)==0x00) group.long 0x08++0x03 line.long 0x00 "P_4_ALPHAR,Plane 4 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_4_ABIT ,Plane 4 A bit function select" "A=1,A=0,Regardless A,Regardless A" bitfld.long 0x00 8.--10. " P_4_BRSL ,Plane 4 blend ratio selection" "P_4_ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P_4_ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P_4_ALPHA ,Plane 4 blend ratio" else group.long 0x08++0x03 line.long 0x00 "P_4_ALPHAR,Plane 4 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_4_ABIT ,Plane 4 A bit function select" "A=1,A=0,Regardless A,Regardless A" hexmask.long.byte 0x00 0.--7. 1. " P_4_ALPHA ,Plane 4 blend ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P_4_DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_4_DSX ,Plane 4 display size X" line.long 0x04 "P_4_DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_4_DSY ,Plane 4 display size Y" line.long 0x08 "P_4_DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_4_DPX ,Plane 4 display position X" line.long 0x0C "P_4_DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_4_DPY ,Plane 4 display position Y" else group.long 0x10++0x0F line.long 0x00 "P_4_DSXR,Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_4_DSX ,Plane 4 display size X" line.long 0x04 "P_4_DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_4_DSY ,Plane 4 display size Y" line.long 0x08 "P_4_DPXR,Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_4_DPX ,Plane 4 display position X" line.long 0x0C "P_4_DPYR,Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_4_DPY ,Plane 4 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P_4_DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_4_DSA0 ,Plane 4 display domain start address 0" line.long 0x04 "P_4_DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_4_DSA1 ,Plane 4 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_4_DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_4_DSA2 ,Plane 4 display domain start address 2" else line.long 0x08 "P_4_DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_4_DSA2 ,Plane 4 display domain start address 2" endif else group.long 0x20++0x0b line.long 0x00 "P_4_DSA0R,Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_4_DSA0 ,Plane 4 display domain start address 0" line.long 0x04 "P_4_DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_4_DSA1 ,Plane 4 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_4_DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_4_DSA2 ,Plane 4 display domain start address 2" else line.long 0x08 "P_4_DSA2R,Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_4_DSA2 ,Plane 4 display domain start address 2" endif endif group.long 0x30++0x13 line.long 0x00 "P_4_SPXR,Plane 4 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_4_SPX ,Plane 4 starting position X" line.long 0x04 "P_4_SPYR,Plane 4 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_4_SPY ,Plane 4 starting position Y" line.long 0x08 "P_4_WASPR,Plane 4 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_4_WASPY ,Plane 4 wrap around starting position Y" line.long 0x0C "P_4_WAMWR,Plane 4 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_4_WAMWY ,Plane 4 wrap around memory width Y" line.long 0x10 "P_4_BTR,Plane 4 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_4_BTA ,Plane 4 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_4_BTB ,Plane 4 blinking cycle B" textline " " group.long 0x44++0x0B line.long 0x00 "P_4_TC_1R,Plane 4 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P_4_TC1 ,Plane 4 transparent color 1" line.long 0x04 "P_4_TC_2R,Plane 4 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P_4_TC2 ,Plane 4 transparent color 2" line.long 0x08 "P_4_TC_3R,Plane 4 Transparent Color 3 Register" hexmask.long.byte 0x08 24.--31. 1. " CODE ,P_4_TC3R enabling code [0x66]" hexmask.long.tbyte 0x08 0.--23. 1. " P_4_TC3 ,Plane 4 transparent color 3" textline " " group.long 0x50++0x03 line.long 0x00 "P_4_MLR,Plane 4 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_4_MLY ,Plane 4 memory length Y" group.long 0x80++0x03 line.long 0x00 "P_4_SWAPR,Plane 4 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_4_DIGN/SPBY ,Plane 4 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_4_SPQW ,Plane 4 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_4_SPLW ,Plane 4 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_4_SPWD ,Plane 4 word swap enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P_4_DDCR,Plane 4 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_4_DDCR enabling code [0x7775]" bitfld.long 0x00 11. " P_4_LRGB1 ,Plane 4 32 bits/pixel display control 1" "Not used,Used" bitfld.long 0x00 10. " P_4_LRGB0 ,Plane 4 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P_4_DDCR2,Plane 4 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_4_DDCR2 enabling code [0x7776]" textline " " bitfld.long 0x00 5. " P_4_NV21 ,Plane 4 NV21 data format" "NV12 order,NV21 order" bitfld.long 0x00 4. " P_4_Y420 ,Plane 4 YUV420 data format" "YUV422,YUV420" bitfld.long 0x00 1. " P_4_DIVU ,Plane 4 UV data from divided YUV" "P_4_DDF bit of P_4_MR,UV data" textline " " bitfld.long 0x00 0. " P_4_DIVY ,Plane 4 Y data from divided YUV" "P_4_DDF bit of P_4_MR,Y data" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "P_4_DDCR4,Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_4_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P4VSPS ,Plane 4 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P4VSPS ,Plane 4 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_4_SDFS ,Plane 4 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_4_SDFS ,Plane 4 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_4_EDF ,Plane 4 extensional data format" "P4DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "P_4_DDCR4,Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_4_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_4_SDFS ,Plane 4 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_4_SDFS ,Plane 4 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_4_EDF ,Plane 4 extensional data format" "P4DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Display Plane 5" base (ad:0xFEB00000+0x500) width 12. if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "P_5_MR,Plane 5 Mode Register" sif CPUIS("R8A77430")||CPUIS("R8A77440") bitfld.long 0x00 26.--27. " P_5_VISL ,Plane 5 video input select" "VIN0,VIN1,VIN2,?..." textline " " elif CPUIS("R8A77450") bitfld.long 0x00 26.--27. " P_5_VISL ,Plane 5 video input select" "VIN0,VIN1,?..." textline " " else bitfld.long 0x00 26.--27. " P_5_VISL ,Plane 5 video input select" "VIN0,VIN1,VIN2,VIN3" textline " " endif bitfld.long 0x00 20. " P_5_YCDF ,Plane 5 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_5_TC ,Plane 5 transparent color" "P_5_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_5WAE ,Plane 5 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_5_SPIM ,Plane 5 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_5_CPSL ,Plane 5 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_5_DC ,Plane 5 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_5_BM ,Plane 5 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_5_DDF ,Plane 5 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" else group.long 0x00++0x03 line.long 0x00 "P_5_MR,Plane 5 Mode Register" bitfld.long 0x00 20. " P_5_YCDF ,Plane 5 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_5_TC ,Plane 5 transparent color" "P_5_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_5WAE ,Plane 5 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_5_SPIM ,Plane 5 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_5_CPSL ,Plane 5 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_5_DC ,Plane 5 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_5_BM ,Plane 5 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_5_DDF ,Plane 5 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" endif group.long 0x04++0x03 line.long 0x00 "P_5_MWR,Plane 5 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_5_MWX ,Plane 5 memory width X" if (((per.l(ad:0xFEB00000+0x500))&0x03)==0x00) group.long 0x08++0x03 line.long 0x00 "P_5_ALPHAR,Plane 5 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_5_ABIT ,Plane 5 A bit function select" "A=1,A=0,Regardless A,Regardless A" bitfld.long 0x00 8.--10. " P_5_BRSL ,Plane 5 blend ratio selection" "P_5_ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P_5_ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P_5_ALPHA ,Plane 5 blend ratio" else group.long 0x08++0x03 line.long 0x00 "P_5_ALPHAR,Plane 5 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_5_ABIT ,Plane 5 A bit function select" "A=1,A=0,Regardless A,Regardless A" hexmask.long.byte 0x00 0.--7. 1. " P_5_ALPHA ,Plane 5 blend ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P_5_DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_5_DSX ,Plane 5 display size X" line.long 0x04 "P_5_DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_5_DSY ,Plane 5 display size Y" line.long 0x08 "P_5_DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_5_DPX ,Plane 5 display position X" line.long 0x0C "P_5_DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_5_DPY ,Plane 5 display position Y" else group.long 0x10++0x0F line.long 0x00 "P_5_DSXR,Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_5_DSX ,Plane 5 display size X" line.long 0x04 "P_5_DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_5_DSY ,Plane 5 display size Y" line.long 0x08 "P_5_DPXR,Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_5_DPX ,Plane 5 display position X" line.long 0x0C "P_5_DPYR,Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_5_DPY ,Plane 5 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P_5_DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_5_DSA0 ,Plane 5 display domain start address 0" line.long 0x04 "P_5_DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_5_DSA1 ,Plane 5 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_5_DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_5_DSA2 ,Plane 5 display domain start address 2" else line.long 0x08 "P_5_DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_5_DSA2 ,Plane 5 display domain start address 2" endif else group.long 0x20++0x0b line.long 0x00 "P_5_DSA0R,Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_5_DSA0 ,Plane 5 display domain start address 0" line.long 0x04 "P_5_DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_5_DSA1 ,Plane 5 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_5_DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_5_DSA2 ,Plane 5 display domain start address 2" else line.long 0x08 "P_5_DSA2R,Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_5_DSA2 ,Plane 5 display domain start address 2" endif endif group.long 0x30++0x13 line.long 0x00 "P_5_SPXR,Plane 5 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_5_SPX ,Plane 5 starting position X" line.long 0x04 "P_5_SPYR,Plane 5 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_5_SPY ,Plane 5 starting position Y" line.long 0x08 "P_5_WASPR,Plane 5 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_5_WASPY ,Plane 5 wrap around starting position Y" line.long 0x0C "P_5_WAMWR,Plane 5 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_5_WAMWY ,Plane 5 wrap around memory width Y" line.long 0x10 "P_5_BTR,Plane 5 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_5_BTA ,Plane 5 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_5_BTB ,Plane 5 blinking cycle B" textline " " group.long 0x44++0x0B line.long 0x00 "P_5_TC_1R,Plane 5 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P_5_TC1 ,Plane 5 transparent color 1" line.long 0x04 "P_5_TC_2R,Plane 5 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P_5_TC2 ,Plane 5 transparent color 2" line.long 0x08 "P_5_TC_3R,Plane 5 Transparent Color 3 Register" hexmask.long.byte 0x08 24.--31. 1. " CODE ,P_5_TC3R enabling code [0x66]" hexmask.long.tbyte 0x08 0.--23. 1. " P_5_TC3 ,Plane 5 transparent color 3" textline " " group.long 0x50++0x03 line.long 0x00 "P_5_MLR,Plane 5 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_5_MLY ,Plane 5 memory length Y" group.long 0x80++0x03 line.long 0x00 "P_5_SWAPR,Plane 5 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_5_DIGN/SPBY ,Plane 5 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_5_SPQW ,Plane 5 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_5_SPLW ,Plane 5 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_5_SPWD ,Plane 5 word swap enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P_5_DDCR,Plane 5 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_5_DDCR enabling code [0x7775]" bitfld.long 0x00 11. " P_5_LRGB1 ,Plane 5 32 bits/pixel display control 1" "Not used,Used" bitfld.long 0x00 10. " P_5_LRGB0 ,Plane 5 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P_5_DDCR2,Plane 5 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_5_DDCR2 enabling code [0x7776]" textline " " bitfld.long 0x00 5. " P_5_NV21 ,Plane 5 NV21 data format" "NV12 order,NV21 order" bitfld.long 0x00 4. " P_5_Y420 ,Plane 5 YUV420 data format" "YUV422,YUV420" bitfld.long 0x00 1. " P_5_DIVU ,Plane 5 UV data from divided YUV" "P_5_DDF bit of P_5_MR,UV data" textline " " bitfld.long 0x00 0. " P_5_DIVY ,Plane 5 Y data from divided YUV" "P_5_DDF bit of P_5_MR,Y data" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "P_5_DDCR4,Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_5_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P5VSPS ,Plane 5 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P5VSPS ,Plane 5 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_5_SDFS ,Plane 5 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_5_SDFS ,Plane 5 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_5_EDF ,Plane 5 extensional data format" "P5DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "P_5_DDCR4,Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_5_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_5_SDFS ,Plane 5 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_5_SDFS ,Plane 5 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_5_EDF ,Plane 5 extensional data format" "P5DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Display Plane 6" base (ad:0xFEB00000+0x600) width 12. if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "P_6_MR,Plane 6 Mode Register" sif CPUIS("R8A77430")||CPUIS("R8A77440") bitfld.long 0x00 26.--27. " P_6_VISL ,Plane 6 video input select" "VIN0,VIN1,VIN2,?..." textline " " elif CPUIS("R8A77450") bitfld.long 0x00 26.--27. " P_6_VISL ,Plane 6 video input select" "VIN0,VIN1,?..." textline " " else bitfld.long 0x00 26.--27. " P_6_VISL ,Plane 6 video input select" "VIN0,VIN1,VIN2,VIN3" textline " " endif bitfld.long 0x00 20. " P_6_YCDF ,Plane 6 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_6_TC ,Plane 6 transparent color" "P_6_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_6WAE ,Plane 6 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_6_SPIM ,Plane 6 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_6_CPSL ,Plane 6 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_6_DC ,Plane 6 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_6_BM ,Plane 6 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_6_DDF ,Plane 6 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" else group.long 0x00++0x03 line.long 0x00 "P_6_MR,Plane 6 Mode Register" bitfld.long 0x00 20. " P_6_YCDF ,Plane 6 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_6_TC ,Plane 6 transparent color" "P_6_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_6WAE ,Plane 6 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_6_SPIM ,Plane 6 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_6_CPSL ,Plane 6 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_6_DC ,Plane 6 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_6_BM ,Plane 6 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_6_DDF ,Plane 6 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" endif group.long 0x04++0x03 line.long 0x00 "P_6_MWR,Plane 6 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_6_MWX ,Plane 6 memory width X" if (((per.l(ad:0xFEB00000+0x600))&0x03)==0x00) group.long 0x08++0x03 line.long 0x00 "P_6_ALPHAR,Plane 6 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_6_ABIT ,Plane 6 A bit function select" "A=1,A=0,Regardless A,Regardless A" bitfld.long 0x00 8.--10. " P_6_BRSL ,Plane 6 blend ratio selection" "P_6_ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P_6_ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P_6_ALPHA ,Plane 6 blend ratio" else group.long 0x08++0x03 line.long 0x00 "P_6_ALPHAR,Plane 6 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_6_ABIT ,Plane 6 A bit function select" "A=1,A=0,Regardless A,Regardless A" hexmask.long.byte 0x00 0.--7. 1. " P_6_ALPHA ,Plane 6 blend ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P_6_DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_6_DSX ,Plane 6 display size X" line.long 0x04 "P_6_DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_6_DSY ,Plane 6 display size Y" line.long 0x08 "P_6_DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_6_DPX ,Plane 6 display position X" line.long 0x0C "P_6_DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_6_DPY ,Plane 6 display position Y" else group.long 0x10++0x0F line.long 0x00 "P_6_DSXR,Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_6_DSX ,Plane 6 display size X" line.long 0x04 "P_6_DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_6_DSY ,Plane 6 display size Y" line.long 0x08 "P_6_DPXR,Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_6_DPX ,Plane 6 display position X" line.long 0x0C "P_6_DPYR,Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_6_DPY ,Plane 6 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P_6_DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_6_DSA0 ,Plane 6 display domain start address 0" line.long 0x04 "P_6_DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_6_DSA1 ,Plane 6 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_6_DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_6_DSA2 ,Plane 6 display domain start address 2" else line.long 0x08 "P_6_DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_6_DSA2 ,Plane 6 display domain start address 2" endif else group.long 0x20++0x0b line.long 0x00 "P_6_DSA0R,Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_6_DSA0 ,Plane 6 display domain start address 0" line.long 0x04 "P_6_DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_6_DSA1 ,Plane 6 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_6_DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_6_DSA2 ,Plane 6 display domain start address 2" else line.long 0x08 "P_6_DSA2R,Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_6_DSA2 ,Plane 6 display domain start address 2" endif endif group.long 0x30++0x13 line.long 0x00 "P_6_SPXR,Plane 6 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_6_SPX ,Plane 6 starting position X" line.long 0x04 "P_6_SPYR,Plane 6 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_6_SPY ,Plane 6 starting position Y" line.long 0x08 "P_6_WASPR,Plane 6 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_6_WASPY ,Plane 6 wrap around starting position Y" line.long 0x0C "P_6_WAMWR,Plane 6 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_6_WAMWY ,Plane 6 wrap around memory width Y" line.long 0x10 "P_6_BTR,Plane 6 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_6_BTA ,Plane 6 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_6_BTB ,Plane 6 blinking cycle B" textline " " group.long 0x44++0x0B line.long 0x00 "P_6_TC_1R,Plane 6 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P_6_TC1 ,Plane 6 transparent color 1" line.long 0x04 "P_6_TC_2R,Plane 6 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P_6_TC2 ,Plane 6 transparent color 2" line.long 0x08 "P_6_TC_3R,Plane 6 Transparent Color 3 Register" hexmask.long.byte 0x08 24.--31. 1. " CODE ,P_6_TC3R enabling code [0x66]" hexmask.long.tbyte 0x08 0.--23. 1. " P_6_TC3 ,Plane 6 transparent color 3" textline " " group.long 0x50++0x03 line.long 0x00 "P_6_MLR,Plane 6 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_6_MLY ,Plane 6 memory length Y" group.long 0x80++0x03 line.long 0x00 "P_6_SWAPR,Plane 6 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_6_DIGN/SPBY ,Plane 6 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_6_SPQW ,Plane 6 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_6_SPLW ,Plane 6 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_6_SPWD ,Plane 6 word swap enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P_6_DDCR,Plane 6 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_6_DDCR enabling code [0x7775]" bitfld.long 0x00 11. " P_6_LRGB1 ,Plane 6 32 bits/pixel display control 1" "Not used,Used" bitfld.long 0x00 10. " P_6_LRGB0 ,Plane 6 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P_6_DDCR2,Plane 6 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_6_DDCR2 enabling code [0x7776]" textline " " bitfld.long 0x00 5. " P_6_NV21 ,Plane 6 NV21 data format" "NV12 order,NV21 order" bitfld.long 0x00 4. " P_6_Y420 ,Plane 6 YUV420 data format" "YUV422,YUV420" bitfld.long 0x00 1. " P_6_DIVU ,Plane 6 UV data from divided YUV" "P_6_DDF bit of P_6_MR,UV data" textline " " bitfld.long 0x00 0. " P_6_DIVY ,Plane 6 Y data from divided YUV" "P_6_DDF bit of P_6_MR,Y data" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "P_6_DDCR4,Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_6_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P6VSPS ,Plane 6 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P6VSPS ,Plane 6 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_6_SDFS ,Plane 6 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_6_SDFS ,Plane 6 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_6_EDF ,Plane 6 extensional data format" "P6DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "P_6_DDCR4,Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_6_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_6_SDFS ,Plane 6 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_6_SDFS ,Plane 6 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_6_EDF ,Plane 6 extensional data format" "P6DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Display Plane 7" base (ad:0xFEB00000+0x700) width 12. if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "P_7_MR,Plane 7 Mode Register" sif CPUIS("R8A77430")||CPUIS("R8A77440") bitfld.long 0x00 26.--27. " P_7_VISL ,Plane 7 video input select" "VIN0,VIN1,VIN2,?..." textline " " elif CPUIS("R8A77450") bitfld.long 0x00 26.--27. " P_7_VISL ,Plane 7 video input select" "VIN0,VIN1,?..." textline " " else bitfld.long 0x00 26.--27. " P_7_VISL ,Plane 7 video input select" "VIN0,VIN1,VIN2,VIN3" textline " " endif bitfld.long 0x00 20. " P_7_YCDF ,Plane 7 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_7_TC ,Plane 7 transparent color" "P_7_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_7WAE ,Plane 7 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_7_SPIM ,Plane 7 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_7_CPSL ,Plane 7 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_7_DC ,Plane 7 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_7_BM ,Plane 7 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_7_DDF ,Plane 7 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" else group.long 0x00++0x03 line.long 0x00 "P_7_MR,Plane 7 Mode Register" bitfld.long 0x00 20. " P_7_YCDF ,Plane 7 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_7_TC ,Plane 7 transparent color" "P_7_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_7WAE ,Plane 7 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_7_SPIM ,Plane 7 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_7_CPSL ,Plane 7 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_7_DC ,Plane 7 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_7_BM ,Plane 7 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_7_DDF ,Plane 7 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" endif group.long 0x04++0x03 line.long 0x00 "P_7_MWR,Plane 7 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_7_MWX ,Plane 7 memory width X" if (((per.l(ad:0xFEB00000+0x700))&0x03)==0x00) group.long 0x08++0x03 line.long 0x00 "P_7_ALPHAR,Plane 7 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_7_ABIT ,Plane 7 A bit function select" "A=1,A=0,Regardless A,Regardless A" bitfld.long 0x00 8.--10. " P_7_BRSL ,Plane 7 blend ratio selection" "P_7_ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P_7_ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P_7_ALPHA ,Plane 7 blend ratio" else group.long 0x08++0x03 line.long 0x00 "P_7_ALPHAR,Plane 7 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_7_ABIT ,Plane 7 A bit function select" "A=1,A=0,Regardless A,Regardless A" hexmask.long.byte 0x00 0.--7. 1. " P_7_ALPHA ,Plane 7 blend ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P_7_DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_7_DSX ,Plane 7 display size X" line.long 0x04 "P_7_DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_7_DSY ,Plane 7 display size Y" line.long 0x08 "P_7_DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_7_DPX ,Plane 7 display position X" line.long 0x0C "P_7_DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_7_DPY ,Plane 7 display position Y" else group.long 0x10++0x0F line.long 0x00 "P_7_DSXR,Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_7_DSX ,Plane 7 display size X" line.long 0x04 "P_7_DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_7_DSY ,Plane 7 display size Y" line.long 0x08 "P_7_DPXR,Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_7_DPX ,Plane 7 display position X" line.long 0x0C "P_7_DPYR,Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_7_DPY ,Plane 7 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P_7_DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_7_DSA0 ,Plane 7 display domain start address 0" line.long 0x04 "P_7_DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_7_DSA1 ,Plane 7 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_7_DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_7_DSA2 ,Plane 7 display domain start address 2" else line.long 0x08 "P_7_DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_7_DSA2 ,Plane 7 display domain start address 2" endif else group.long 0x20++0x0b line.long 0x00 "P_7_DSA0R,Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_7_DSA0 ,Plane 7 display domain start address 0" line.long 0x04 "P_7_DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_7_DSA1 ,Plane 7 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_7_DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_7_DSA2 ,Plane 7 display domain start address 2" else line.long 0x08 "P_7_DSA2R,Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_7_DSA2 ,Plane 7 display domain start address 2" endif endif group.long 0x30++0x13 line.long 0x00 "P_7_SPXR,Plane 7 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_7_SPX ,Plane 7 starting position X" line.long 0x04 "P_7_SPYR,Plane 7 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_7_SPY ,Plane 7 starting position Y" line.long 0x08 "P_7_WASPR,Plane 7 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_7_WASPY ,Plane 7 wrap around starting position Y" line.long 0x0C "P_7_WAMWR,Plane 7 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_7_WAMWY ,Plane 7 wrap around memory width Y" line.long 0x10 "P_7_BTR,Plane 7 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_7_BTA ,Plane 7 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_7_BTB ,Plane 7 blinking cycle B" textline " " group.long 0x44++0x0B line.long 0x00 "P_7_TC_1R,Plane 7 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P_7_TC1 ,Plane 7 transparent color 1" line.long 0x04 "P_7_TC_2R,Plane 7 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P_7_TC2 ,Plane 7 transparent color 2" line.long 0x08 "P_7_TC_3R,Plane 7 Transparent Color 3 Register" hexmask.long.byte 0x08 24.--31. 1. " CODE ,P_7_TC3R enabling code [0x66]" hexmask.long.tbyte 0x08 0.--23. 1. " P_7_TC3 ,Plane 7 transparent color 3" textline " " group.long 0x50++0x03 line.long 0x00 "P_7_MLR,Plane 7 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_7_MLY ,Plane 7 memory length Y" group.long 0x80++0x03 line.long 0x00 "P_7_SWAPR,Plane 7 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_7_DIGN/SPBY ,Plane 7 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_7_SPQW ,Plane 7 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_7_SPLW ,Plane 7 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_7_SPWD ,Plane 7 word swap enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P_7_DDCR,Plane 7 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_7_DDCR enabling code [0x7775]" bitfld.long 0x00 11. " P_7_LRGB1 ,Plane 7 32 bits/pixel display control 1" "Not used,Used" bitfld.long 0x00 10. " P_7_LRGB0 ,Plane 7 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P_7_DDCR2,Plane 7 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_7_DDCR2 enabling code [0x7776]" textline " " bitfld.long 0x00 5. " P_7_NV21 ,Plane 7 NV21 data format" "NV12 order,NV21 order" bitfld.long 0x00 4. " P_7_Y420 ,Plane 7 YUV420 data format" "YUV422,YUV420" bitfld.long 0x00 1. " P_7_DIVU ,Plane 7 UV data from divided YUV" "P_7_DDF bit of P_7_MR,UV data" textline " " bitfld.long 0x00 0. " P_7_DIVY ,Plane 7 Y data from divided YUV" "P_7_DDF bit of P_7_MR,Y data" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "P_7_DDCR4,Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_7_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P7VSPS ,Plane 7 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P7VSPS ,Plane 7 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_7_SDFS ,Plane 7 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_7_SDFS ,Plane 7 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_7_EDF ,Plane 7 extensional data format" "P7DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "P_7_DDCR4,Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_7_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_7_SDFS ,Plane 7 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_7_SDFS ,Plane 7 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_7_EDF ,Plane 7 extensional data format" "P7DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Display Plane 8" base (ad:0xFEB00000+0x800) width 12. if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "P_8_MR,Plane 8 Mode Register" sif CPUIS("R8A77430")||CPUIS("R8A77440") bitfld.long 0x00 26.--27. " P_8_VISL ,Plane 8 video input select" "VIN0,VIN1,VIN2,?..." textline " " elif CPUIS("R8A77450") bitfld.long 0x00 26.--27. " P_8_VISL ,Plane 8 video input select" "VIN0,VIN1,?..." textline " " else bitfld.long 0x00 26.--27. " P_8_VISL ,Plane 8 video input select" "VIN0,VIN1,VIN2,VIN3" textline " " endif bitfld.long 0x00 20. " P_8_YCDF ,Plane 8 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_8_TC ,Plane 8 transparent color" "P_8_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_8WAE ,Plane 8 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_8_SPIM ,Plane 8 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_8_CPSL ,Plane 8 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_8_DC ,Plane 8 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_8_BM ,Plane 8 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_8_DDF ,Plane 8 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" else group.long 0x00++0x03 line.long 0x00 "P_8_MR,Plane 8 Mode Register" bitfld.long 0x00 20. " P_8_YCDF ,Plane 8 YC data format" "UYVY,YUYV" bitfld.long 0x00 17. " P_8_TC ,Plane 8 transparent color" "P_8_TC1R,CP1TR/CP4TR" bitfld.long 0x00 16. " P_8WAE ,Plane 8 wrap around enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12.--14. " P_8_SPIM ,Plane 8 super impose mode" "Transparent color processing,Blending/Lower plane,EOR operation/Lower plane,,No transparent processing,Blending/Lower plane,EOR operation/Lower plane,?..." bitfld.long 0x00 8.--10. " P_8_CPSL ,Plane 8 color palette selection" "Palette 1,Palette 2,Palette 3,Palette 4,?..." bitfld.long 0x00 7. " P_8_DC ,Plane 8 display area change" "No change,Change" textline " " bitfld.long 0x00 4.--5. " P_8_BM ,Plane 8 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" bitfld.long 0x00 0.--1. " P_8_DDF ,Plane 8 display data format" "8bit/pixel,16bit/pixel,ARGB,YC" endif group.long 0x04++0x03 line.long 0x00 "P_8_MWR,Plane 8 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_8_MWX ,Plane 8 memory width X" if (((per.l(ad:0xFEB00000+0x800))&0x03)==0x00) group.long 0x08++0x03 line.long 0x00 "P_8_ALPHAR,Plane 8 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_8_ABIT ,Plane 8 A bit function select" "A=1,A=0,Regardless A,Regardless A" bitfld.long 0x00 8.--10. " P_8_BRSL ,Plane 8 blend ratio selection" "P_8_ALPHA,,PnMR bits 24-31,Display data of plane this bits 0-2,,P_8_ALPHA,PnMR bits 24-31,Display data of Alpha-ratio plane this bits 0-2" textline " " hexmask.long.byte 0x00 0.--7. 1. " P_8_ALPHA ,Plane 8 blend ratio" else group.long 0x08++0x03 line.long 0x00 "P_8_ALPHAR,Plane 8 Blend Ratio Register" bitfld.long 0x00 12.--13. " P_8_ABIT ,Plane 8 A bit function select" "A=1,A=0,Regardless A,Regardless A" hexmask.long.byte 0x00 0.--7. 1. " P_8_ALPHA ,Plane 8 blend ratio" endif if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "P_8_DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_8_DSX ,Plane 8 display size X" line.long 0x04 "P_8_DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_8_DSY ,Plane 8 display size Y" line.long 0x08 "P_8_DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_8_DPX ,Plane 8 display position X" line.long 0x0C "P_8_DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_8_DPY ,Plane 8 display position Y" else group.long 0x10++0x0F line.long 0x00 "P_8_DSXR,Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_8_DSX ,Plane 8 display size X" line.long 0x04 "P_8_DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_8_DSY ,Plane 8 display size Y" line.long 0x08 "P_8_DPXR,Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_8_DPX ,Plane 8 display position X" line.long 0x0C "P_8_DPYR,Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_8_DPY ,Plane 8 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "P_8_DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_8_DSA0 ,Plane 8 display domain start address 0" line.long 0x04 "P_8_DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_8_DSA1 ,Plane 8 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_8_DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_8_DSA2 ,Plane 8 display domain start address 2" else line.long 0x08 "P_8_DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_8_DSA2 ,Plane 8 display domain start address 2" endif else group.long 0x20++0x0b line.long 0x00 "P_8_DSA0R,Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_8_DSA0 ,Plane 8 display domain start address 0" line.long 0x04 "P_8_DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_8_DSA1 ,Plane 8 display domain start address 1" sif cpu()=="R8A77470" line.long 0x08 "P_8_DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_8_DSA2 ,Plane 8 display domain start address 2" else line.long 0x08 "P_8_DSA2R,Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_8_DSA2 ,Plane 8 display domain start address 2" endif endif group.long 0x30++0x13 line.long 0x00 "P_8_SPXR,Plane 8 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_8_SPX ,Plane 8 starting position X" line.long 0x04 "P_8_SPYR,Plane 8 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_8_SPY ,Plane 8 starting position Y" line.long 0x08 "P_8_WASPR,Plane 8 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_8_WASPY ,Plane 8 wrap around starting position Y" line.long 0x0C "P_8_WAMWR,Plane 8 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_8_WAMWY ,Plane 8 wrap around memory width Y" line.long 0x10 "P_8_BTR,Plane 8 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_8_BTA ,Plane 8 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_8_BTB ,Plane 8 blinking cycle B" textline " " group.long 0x44++0x0B line.long 0x00 "P_8_TC_1R,Plane 8 Transparent Color 1 Register" hexmask.long.byte 0x00 0.--7. 1. " P_8_TC1 ,Plane 8 transparent color 1" line.long 0x04 "P_8_TC_2R,Plane 8 Transparent Color 2 Register" hexmask.long.word 0x04 0.--15. 1. " P_8_TC2 ,Plane 8 transparent color 2" line.long 0x08 "P_8_TC_3R,Plane 8 Transparent Color 3 Register" hexmask.long.byte 0x08 24.--31. 1. " CODE ,P_8_TC3R enabling code [0x66]" hexmask.long.tbyte 0x08 0.--23. 1. " P_8_TC3 ,Plane 8 transparent color 3" textline " " group.long 0x50++0x03 line.long 0x00 "P_8_MLR,Plane 8 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_8_MLY ,Plane 8 memory length Y" group.long 0x80++0x03 line.long 0x00 "P_8_SWAPR,Plane 8 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_8_DIGN/SPBY ,Plane 8 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_8_SPQW ,Plane 8 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_8_SPLW ,Plane 8 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_8_SPWD ,Plane 8 word swap enable" "Disabled,Enabled" group.long 0x84++0x03 line.long 0x00 "P_8_DDCR,Plane 8 Display Data Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_8_DDCR enabling code [0x7775]" bitfld.long 0x00 11. " P_8_LRGB1 ,Plane 8 32 bits/pixel display control 1" "Not used,Used" bitfld.long 0x00 10. " P_8_LRGB0 ,Plane 8 32 bits/pixel display control 0" "Not used,Used" group.long 0x88++0x03 line.long 0x00 "P_8_DDCR2,Plane 8 Display Data Control Register 2" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_8_DDCR2 enabling code [0x7776]" textline " " bitfld.long 0x00 5. " P_8_NV21 ,Plane 8 NV21 data format" "NV12 order,NV21 order" bitfld.long 0x00 4. " P_8_Y420 ,Plane 8 YUV420 data format" "YUV422,YUV420" bitfld.long 0x00 1. " P_8_DIVU ,Plane 8 UV data from divided YUV" "P_8_DDF bit of P_8_MR,UV data" textline " " bitfld.long 0x00 0. " P_8_DIVY ,Plane 8 Y data from divided YUV" "P_8_DDF bit of P_8_MR,Y data" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "P_8_DDCR4,Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_8_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P8VSPS ,Plane 8 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P8VSPS ,Plane 8 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_8_SDFS ,Plane 8 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_8_SDFS ,Plane 8 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_8_EDF ,Plane 8 extensional data format" "P8DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "P_8_DDCR4,Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_8_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_8_SDFS ,Plane 8 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_8_SDFS ,Plane 8 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_8_EDF ,Plane 8 extensional data format" "P8DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree.end tree "Alpha-Ratio Planes 1-8" sif cpu()=="R8A77470" tree "Alpha-Ratio Plane 1" base (ad:0xFEB00000+0xA100) width 12. group.long 0x00++0x03 line.long 0x00 "AP_1_MR,Alpha Plane 1 Mode Register" bitfld.long 0x00 16. " P_1_WAE ,Plane 1 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_1_DC ,Plane 1 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_1_BM ,Plane 1 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_1_MWR,Alpha Plane 1 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_1_MWX ,Plane 1 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_1_DSXR,Alpha Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_1_DSX ,Plane 1 display size X" line.long 0x04 "AP_1_DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_1_DSY ,Plane 1 display size Y" line.long 0x08 "AP_1_DPXR,Alpha Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_1_DPX ,Plane 1 display position X" line.long 0x0C "AP_1_DPYR,Alpha Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_1_DPY ,Plane 1 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_1_DSXR,Alpha Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_1_DSX ,Plane 1 display size X" line.long 0x04 "AP_1_DSYR,Alpha Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_1_DSY ,Plane 1 display size Y" line.long 0x08 "AP_1_DPXR,Alpha Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_1_DPX ,Plane 1 display position X" line.long 0x0C "AP_1_DPYR,Alpha Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_1_DPY ,Plane 1 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_1_DSA0R,Alpha Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_1_DSA0 ,Plane 1 display domain start address 0" line.long 0x04 "AP_1_DSA1R,Alpha Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_1_DSA1 ,Plane 1 display domain start address 1" line.long 0x08 "AP_1_DSA2R,Alpha Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_1_DSA2 ,Plane 1 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_1_DSA0R,Alpha Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_1_DSA0 ,Plane 1 display domain start address 0" line.long 0x04 "AP_1_DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_1_DSA1 ,Alpha Plane 1 display domain start Address 1" line.long 0x08 "AP_1_DSA2R,Alpha Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_1_DSA2 ,Plane 1 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_1_SPXR,Alpha Plane 1 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_1_SPX ,Plane 1 starting position X" line.long 0x04 "AP_1_SPYR,Alpha Plane 1 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_1_SPY ,Plane 1 starting position Y" line.long 0x08 "AP_1_WASPR,Alpha Plane 1 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_1_WASPY ,Plane 1 wrap around starting position Y" line.long 0x0C "AP_1_WAMWR,Alpha Plane 1 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_1_WAMWY ,Plane 1 wrap around memory width Y" line.long 0x10 "AP_1_BTR,Alpha Plane 1 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_1_BTA ,Plane 1 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_1_BTB ,Plane 1 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_1_MLR,Alpha Plane 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_1_MLY ,Plane 1 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_1_SWAPR,Alpha Plane 1 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_1_DIGN/SPBY ,Plane 1 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_1_SPQW ,Plane 1 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_1_SPLW ,Plane 1 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_1_SPWD ,Plane 1 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_1_DDCR4,Alpha Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_1_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P1VSPS ,Plane 1 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P1VSPS ,Plane 1 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_1_EDF ,Plane 1 extensional data format" "P1DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_1_DDCR4,Alpha Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_1_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_1_EDF ,Plane 1 extensional data format" "P1DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Alpha-Ratio Plane 2" base (ad:0xFEB00000+0xA200) width 12. group.long 0x00++0x03 line.long 0x00 "AP_2_MR,Alpha Plane 2 Mode Register" bitfld.long 0x00 16. " P_2_WAE ,Plane 2 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_2_DC ,Plane 2 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_2_BM ,Plane 2 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_2_MWR,Alpha Plane 2 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_2_MWX ,Plane 2 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_2_DSXR,Alpha Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_2_DSX ,Plane 2 display size X" line.long 0x04 "AP_2_DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_2_DSY ,Plane 2 display size Y" line.long 0x08 "AP_2_DPXR,Alpha Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_2_DPX ,Plane 2 display position X" line.long 0x0C "AP_2_DPYR,Alpha Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_2_DPY ,Plane 2 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_2_DSXR,Alpha Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_2_DSX ,Plane 2 display size X" line.long 0x04 "AP_2_DSYR,Alpha Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_2_DSY ,Plane 2 display size Y" line.long 0x08 "AP_2_DPXR,Alpha Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_2_DPX ,Plane 2 display position X" line.long 0x0C "AP_2_DPYR,Alpha Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_2_DPY ,Plane 2 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_2_DSA0R,Alpha Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_2_DSA0 ,Plane 2 display domain start address 0" line.long 0x04 "AP_2_DSA1R,Alpha Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_2_DSA1 ,Plane 2 display domain start address 1" line.long 0x08 "AP_2_DSA2R,Alpha Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_2_DSA2 ,Plane 2 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_2_DSA0R,Alpha Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_2_DSA0 ,Plane 2 display domain start address 0" line.long 0x04 "AP_2_DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_2_DSA1 ,Alpha Plane 2 display domain start Address 1" line.long 0x08 "AP_2_DSA2R,Alpha Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_2_DSA2 ,Plane 2 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_2_SPXR,Alpha Plane 2 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_2_SPX ,Plane 2 starting position X" line.long 0x04 "AP_2_SPYR,Alpha Plane 2 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_2_SPY ,Plane 2 starting position Y" line.long 0x08 "AP_2_WASPR,Alpha Plane 2 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_2_WASPY ,Plane 2 wrap around starting position Y" line.long 0x0C "AP_2_WAMWR,Alpha Plane 2 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_2_WAMWY ,Plane 2 wrap around memory width Y" line.long 0x10 "AP_2_BTR,Alpha Plane 2 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_2_BTA ,Plane 2 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_2_BTB ,Plane 2 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_2_MLR,Alpha Plane 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_2_MLY ,Plane 2 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_2_SWAPR,Alpha Plane 2 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_2_DIGN/SPBY ,Plane 2 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_2_SPQW ,Plane 2 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_2_SPLW ,Plane 2 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_2_SPWD ,Plane 2 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_2_DDCR4,Alpha Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_2_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P2VSPS ,Plane 2 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P2VSPS ,Plane 2 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_2_EDF ,Plane 2 extensional data format" "P2DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_2_DDCR4,Alpha Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_2_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_2_EDF ,Plane 2 extensional data format" "P2DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end else tree "Alpha-Ratio Plane 1" base (ad:0xFEB00000+0xA100) width 12. group.long 0x00++0x03 line.long 0x00 "AP_1_MR,Alpha Plane 1 Mode Register" bitfld.long 0x00 16. " P_1_WAE ,Plane 1 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_1_DC ,Plane 1 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_1_BM ,Plane 1 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_1_MWR,Alpha Plane 1 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_1_MWX ,Plane 1 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_1_DSXR,Alpha Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_1_DSX ,Plane 1 display size X" line.long 0x04 "AP_1_DSYR,Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_1_DSY ,Plane 1 display size Y" line.long 0x08 "AP_1_DPXR,Alpha Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_1_DPX ,Plane 1 display position X" line.long 0x0C "AP_1_DPYR,Alpha Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_1_DPY ,Plane 1 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_1_DSXR,Alpha Plane 1 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_1_DSX ,Plane 1 display size X" line.long 0x04 "AP_1_DSYR,Alpha Plane 1 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_1_DSY ,Plane 1 display size Y" line.long 0x08 "AP_1_DPXR,Alpha Plane 1 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_1_DPX ,Plane 1 display position X" line.long 0x0C "AP_1_DPYR,Alpha Plane 1 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_1_DPY ,Plane 1 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_1_DSA0R,Alpha Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_1_DSA0 ,Plane 1 display domain start address 0" line.long 0x04 "AP_1_DSA1R,Alpha Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_1_DSA1 ,Plane 1 display domain start address 1" line.long 0x08 "AP_1_DSA2R,Alpha Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_1_DSA2 ,Plane 1 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_1_DSA0R,Alpha Plane 1 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_1_DSA0 ,Plane 1 display domain start address 0" line.long 0x04 "AP_1_DSA1R,Plane 1 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_1_DSA1 ,Alpha Plane 1 display domain start Address 1" line.long 0x08 "AP_1_DSA2R,Alpha Plane 1 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_1_DSA2 ,Plane 1 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_1_SPXR,Alpha Plane 1 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_1_SPX ,Plane 1 starting position X" line.long 0x04 "AP_1_SPYR,Alpha Plane 1 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_1_SPY ,Plane 1 starting position Y" line.long 0x08 "AP_1_WASPR,Alpha Plane 1 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_1_WASPY ,Plane 1 wrap around starting position Y" line.long 0x0C "AP_1_WAMWR,Alpha Plane 1 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_1_WAMWY ,Plane 1 wrap around memory width Y" line.long 0x10 "AP_1_BTR,Alpha Plane 1 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_1_BTA ,Plane 1 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_1_BTB ,Plane 1 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_1_MLR,Alpha Plane 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_1_MLY ,Plane 1 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_1_SWAPR,Alpha Plane 1 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_1_DIGN/SPBY ,Plane 1 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_1_SPQW ,Plane 1 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_1_SPLW ,Plane 1 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_1_SPWD ,Plane 1 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_1_DDCR4,Alpha Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_1_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P1VSPS ,Plane 1 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P1VSPS ,Plane 1 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_1_EDF ,Plane 1 extensional data format" "P1DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_1_DDCR4,Alpha Plane 1 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_1_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_1_SDFS ,Plane 1 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_1_EDF ,Plane 1 extensional data format" "P1DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Alpha-Ratio Plane 2" base (ad:0xFEB00000+0xA200) width 12. group.long 0x00++0x03 line.long 0x00 "AP_2_MR,Alpha Plane 2 Mode Register" bitfld.long 0x00 16. " P_2_WAE ,Plane 2 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_2_DC ,Plane 2 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_2_BM ,Plane 2 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_2_MWR,Alpha Plane 2 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_2_MWX ,Plane 2 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_2_DSXR,Alpha Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_2_DSX ,Plane 2 display size X" line.long 0x04 "AP_2_DSYR,Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_2_DSY ,Plane 2 display size Y" line.long 0x08 "AP_2_DPXR,Alpha Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_2_DPX ,Plane 2 display position X" line.long 0x0C "AP_2_DPYR,Alpha Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_2_DPY ,Plane 2 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_2_DSXR,Alpha Plane 2 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_2_DSX ,Plane 2 display size X" line.long 0x04 "AP_2_DSYR,Alpha Plane 2 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_2_DSY ,Plane 2 display size Y" line.long 0x08 "AP_2_DPXR,Alpha Plane 2 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_2_DPX ,Plane 2 display position X" line.long 0x0C "AP_2_DPYR,Alpha Plane 2 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_2_DPY ,Plane 2 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_2_DSA0R,Alpha Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_2_DSA0 ,Plane 2 display domain start address 0" line.long 0x04 "AP_2_DSA1R,Alpha Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_2_DSA1 ,Plane 2 display domain start address 1" line.long 0x08 "AP_2_DSA2R,Alpha Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_2_DSA2 ,Plane 2 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_2_DSA0R,Alpha Plane 2 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_2_DSA0 ,Plane 2 display domain start address 0" line.long 0x04 "AP_2_DSA1R,Plane 2 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_2_DSA1 ,Alpha Plane 2 display domain start Address 1" line.long 0x08 "AP_2_DSA2R,Alpha Plane 2 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_2_DSA2 ,Plane 2 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_2_SPXR,Alpha Plane 2 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_2_SPX ,Plane 2 starting position X" line.long 0x04 "AP_2_SPYR,Alpha Plane 2 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_2_SPY ,Plane 2 starting position Y" line.long 0x08 "AP_2_WASPR,Alpha Plane 2 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_2_WASPY ,Plane 2 wrap around starting position Y" line.long 0x0C "AP_2_WAMWR,Alpha Plane 2 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_2_WAMWY ,Plane 2 wrap around memory width Y" line.long 0x10 "AP_2_BTR,Alpha Plane 2 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_2_BTA ,Plane 2 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_2_BTB ,Plane 2 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_2_MLR,Alpha Plane 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_2_MLY ,Plane 2 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_2_SWAPR,Alpha Plane 2 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_2_DIGN/SPBY ,Plane 2 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_2_SPQW ,Plane 2 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_2_SPLW ,Plane 2 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_2_SPWD ,Plane 2 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_2_DDCR4,Alpha Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_2_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P2VSPS ,Plane 2 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P2VSPS ,Plane 2 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_2_EDF ,Plane 2 extensional data format" "P2DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_2_DDCR4,Alpha Plane 2 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_2_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_2_SDFS ,Plane 2 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_2_EDF ,Plane 2 extensional data format" "P2DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Alpha-Ratio Plane 3" base (ad:0xFEB00000+0xA300) width 12. group.long 0x00++0x03 line.long 0x00 "AP_3_MR,Alpha Plane 3 Mode Register" bitfld.long 0x00 16. " P_3_WAE ,Plane 3 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_3_DC ,Plane 3 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_3_BM ,Plane 3 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_3_MWR,Alpha Plane 3 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_3_MWX ,Plane 3 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_3_DSXR,Alpha Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_3_DSX ,Plane 3 display size X" line.long 0x04 "AP_3_DSYR,Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_3_DSY ,Plane 3 display size Y" line.long 0x08 "AP_3_DPXR,Alpha Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_3_DPX ,Plane 3 display position X" line.long 0x0C "AP_3_DPYR,Alpha Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_3_DPY ,Plane 3 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_3_DSXR,Alpha Plane 3 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_3_DSX ,Plane 3 display size X" line.long 0x04 "AP_3_DSYR,Alpha Plane 3 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_3_DSY ,Plane 3 display size Y" line.long 0x08 "AP_3_DPXR,Alpha Plane 3 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_3_DPX ,Plane 3 display position X" line.long 0x0C "AP_3_DPYR,Alpha Plane 3 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_3_DPY ,Plane 3 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_3_DSA0R,Alpha Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_3_DSA0 ,Plane 3 display domain start address 0" line.long 0x04 "AP_3_DSA1R,Alpha Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_3_DSA1 ,Plane 3 display domain start address 1" line.long 0x08 "AP_3_DSA2R,Alpha Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_3_DSA2 ,Plane 3 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_3_DSA0R,Alpha Plane 3 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_3_DSA0 ,Plane 3 display domain start address 0" line.long 0x04 "AP_3_DSA1R,Plane 3 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_3_DSA1 ,Alpha Plane 3 display domain start Address 1" line.long 0x08 "AP_3_DSA2R,Alpha Plane 3 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_3_DSA2 ,Plane 3 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_3_SPXR,Alpha Plane 3 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_3_SPX ,Plane 3 starting position X" line.long 0x04 "AP_3_SPYR,Alpha Plane 3 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_3_SPY ,Plane 3 starting position Y" line.long 0x08 "AP_3_WASPR,Alpha Plane 3 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_3_WASPY ,Plane 3 wrap around starting position Y" line.long 0x0C "AP_3_WAMWR,Alpha Plane 3 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_3_WAMWY ,Plane 3 wrap around memory width Y" line.long 0x10 "AP_3_BTR,Alpha Plane 3 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_3_BTA ,Plane 3 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_3_BTB ,Plane 3 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_3_MLR,Alpha Plane 3 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_3_MLY ,Plane 3 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_3_SWAPR,Alpha Plane 3 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_3_DIGN/SPBY ,Plane 3 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_3_SPQW ,Plane 3 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_3_SPLW ,Plane 3 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_3_SPWD ,Plane 3 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_3_DDCR4,Alpha Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_3_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P3VSPS ,Plane 3 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P3VSPS ,Plane 3 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_3_SDFS ,Plane 3 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_3_SDFS ,Plane 3 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_3_EDF ,Plane 3 extensional data format" "P3DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_3_DDCR4,Alpha Plane 3 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_3_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_3_SDFS ,Plane 3 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_3_SDFS ,Plane 3 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_3_EDF ,Plane 3 extensional data format" "P3DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Alpha-Ratio Plane 4" base (ad:0xFEB00000+0xA400) width 12. group.long 0x00++0x03 line.long 0x00 "AP_4_MR,Alpha Plane 4 Mode Register" bitfld.long 0x00 16. " P_4_WAE ,Plane 4 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_4_DC ,Plane 4 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_4_BM ,Plane 4 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_4_MWR,Alpha Plane 4 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_4_MWX ,Plane 4 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_4_DSXR,Alpha Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_4_DSX ,Plane 4 display size X" line.long 0x04 "AP_4_DSYR,Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_4_DSY ,Plane 4 display size Y" line.long 0x08 "AP_4_DPXR,Alpha Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_4_DPX ,Plane 4 display position X" line.long 0x0C "AP_4_DPYR,Alpha Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_4_DPY ,Plane 4 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_4_DSXR,Alpha Plane 4 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_4_DSX ,Plane 4 display size X" line.long 0x04 "AP_4_DSYR,Alpha Plane 4 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_4_DSY ,Plane 4 display size Y" line.long 0x08 "AP_4_DPXR,Alpha Plane 4 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_4_DPX ,Plane 4 display position X" line.long 0x0C "AP_4_DPYR,Alpha Plane 4 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_4_DPY ,Plane 4 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_4_DSA0R,Alpha Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_4_DSA0 ,Plane 4 display domain start address 0" line.long 0x04 "AP_4_DSA1R,Alpha Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_4_DSA1 ,Plane 4 display domain start address 1" line.long 0x08 "AP_4_DSA2R,Alpha Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_4_DSA2 ,Plane 4 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_4_DSA0R,Alpha Plane 4 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_4_DSA0 ,Plane 4 display domain start address 0" line.long 0x04 "AP_4_DSA1R,Plane 4 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_4_DSA1 ,Alpha Plane 4 display domain start Address 1" line.long 0x08 "AP_4_DSA2R,Alpha Plane 4 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_4_DSA2 ,Plane 4 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_4_SPXR,Alpha Plane 4 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_4_SPX ,Plane 4 starting position X" line.long 0x04 "AP_4_SPYR,Alpha Plane 4 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_4_SPY ,Plane 4 starting position Y" line.long 0x08 "AP_4_WASPR,Alpha Plane 4 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_4_WASPY ,Plane 4 wrap around starting position Y" line.long 0x0C "AP_4_WAMWR,Alpha Plane 4 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_4_WAMWY ,Plane 4 wrap around memory width Y" line.long 0x10 "AP_4_BTR,Alpha Plane 4 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_4_BTA ,Plane 4 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_4_BTB ,Plane 4 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_4_MLR,Alpha Plane 4 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_4_MLY ,Plane 4 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_4_SWAPR,Alpha Plane 4 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_4_DIGN/SPBY ,Plane 4 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_4_SPQW ,Plane 4 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_4_SPLW ,Plane 4 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_4_SPWD ,Plane 4 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_4_DDCR4,Alpha Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_4_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P4VSPS ,Plane 4 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P4VSPS ,Plane 4 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_4_SDFS ,Plane 4 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_4_SDFS ,Plane 4 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_4_EDF ,Plane 4 extensional data format" "P4DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_4_DDCR4,Alpha Plane 4 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_4_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_4_SDFS ,Plane 4 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_4_SDFS ,Plane 4 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_4_EDF ,Plane 4 extensional data format" "P4DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Alpha-Ratio Plane 5" base (ad:0xFEB00000+0xA500) width 12. group.long 0x00++0x03 line.long 0x00 "AP_5_MR,Alpha Plane 5 Mode Register" bitfld.long 0x00 16. " P_5_WAE ,Plane 5 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_5_DC ,Plane 5 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_5_BM ,Plane 5 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_5_MWR,Alpha Plane 5 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_5_MWX ,Plane 5 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_5_DSXR,Alpha Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_5_DSX ,Plane 5 display size X" line.long 0x04 "AP_5_DSYR,Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_5_DSY ,Plane 5 display size Y" line.long 0x08 "AP_5_DPXR,Alpha Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_5_DPX ,Plane 5 display position X" line.long 0x0C "AP_5_DPYR,Alpha Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_5_DPY ,Plane 5 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_5_DSXR,Alpha Plane 5 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_5_DSX ,Plane 5 display size X" line.long 0x04 "AP_5_DSYR,Alpha Plane 5 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_5_DSY ,Plane 5 display size Y" line.long 0x08 "AP_5_DPXR,Alpha Plane 5 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_5_DPX ,Plane 5 display position X" line.long 0x0C "AP_5_DPYR,Alpha Plane 5 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_5_DPY ,Plane 5 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_5_DSA0R,Alpha Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_5_DSA0 ,Plane 5 display domain start address 0" line.long 0x04 "AP_5_DSA1R,Alpha Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_5_DSA1 ,Plane 5 display domain start address 1" line.long 0x08 "AP_5_DSA2R,Alpha Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_5_DSA2 ,Plane 5 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_5_DSA0R,Alpha Plane 5 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_5_DSA0 ,Plane 5 display domain start address 0" line.long 0x04 "AP_5_DSA1R,Plane 5 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_5_DSA1 ,Alpha Plane 5 display domain start Address 1" line.long 0x08 "AP_5_DSA2R,Alpha Plane 5 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_5_DSA2 ,Plane 5 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_5_SPXR,Alpha Plane 5 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_5_SPX ,Plane 5 starting position X" line.long 0x04 "AP_5_SPYR,Alpha Plane 5 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_5_SPY ,Plane 5 starting position Y" line.long 0x08 "AP_5_WASPR,Alpha Plane 5 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_5_WASPY ,Plane 5 wrap around starting position Y" line.long 0x0C "AP_5_WAMWR,Alpha Plane 5 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_5_WAMWY ,Plane 5 wrap around memory width Y" line.long 0x10 "AP_5_BTR,Alpha Plane 5 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_5_BTA ,Plane 5 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_5_BTB ,Plane 5 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_5_MLR,Alpha Plane 5 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_5_MLY ,Plane 5 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_5_SWAPR,Alpha Plane 5 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_5_DIGN/SPBY ,Plane 5 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_5_SPQW ,Plane 5 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_5_SPLW ,Plane 5 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_5_SPWD ,Plane 5 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_5_DDCR4,Alpha Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_5_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P5VSPS ,Plane 5 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P5VSPS ,Plane 5 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_5_SDFS ,Plane 5 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_5_SDFS ,Plane 5 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_5_EDF ,Plane 5 extensional data format" "P5DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_5_DDCR4,Alpha Plane 5 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_5_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_5_SDFS ,Plane 5 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_5_SDFS ,Plane 5 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_5_EDF ,Plane 5 extensional data format" "P5DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Alpha-Ratio Plane 6" base (ad:0xFEB00000+0xA600) width 12. group.long 0x00++0x03 line.long 0x00 "AP_6_MR,Alpha Plane 6 Mode Register" bitfld.long 0x00 16. " P_6_WAE ,Plane 6 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_6_DC ,Plane 6 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_6_BM ,Plane 6 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_6_MWR,Alpha Plane 6 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_6_MWX ,Plane 6 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_6_DSXR,Alpha Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_6_DSX ,Plane 6 display size X" line.long 0x04 "AP_6_DSYR,Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_6_DSY ,Plane 6 display size Y" line.long 0x08 "AP_6_DPXR,Alpha Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_6_DPX ,Plane 6 display position X" line.long 0x0C "AP_6_DPYR,Alpha Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_6_DPY ,Plane 6 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_6_DSXR,Alpha Plane 6 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_6_DSX ,Plane 6 display size X" line.long 0x04 "AP_6_DSYR,Alpha Plane 6 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_6_DSY ,Plane 6 display size Y" line.long 0x08 "AP_6_DPXR,Alpha Plane 6 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_6_DPX ,Plane 6 display position X" line.long 0x0C "AP_6_DPYR,Alpha Plane 6 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_6_DPY ,Plane 6 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_6_DSA0R,Alpha Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_6_DSA0 ,Plane 6 display domain start address 0" line.long 0x04 "AP_6_DSA1R,Alpha Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_6_DSA1 ,Plane 6 display domain start address 1" line.long 0x08 "AP_6_DSA2R,Alpha Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_6_DSA2 ,Plane 6 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_6_DSA0R,Alpha Plane 6 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_6_DSA0 ,Plane 6 display domain start address 0" line.long 0x04 "AP_6_DSA1R,Plane 6 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_6_DSA1 ,Alpha Plane 6 display domain start Address 1" line.long 0x08 "AP_6_DSA2R,Alpha Plane 6 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_6_DSA2 ,Plane 6 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_6_SPXR,Alpha Plane 6 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_6_SPX ,Plane 6 starting position X" line.long 0x04 "AP_6_SPYR,Alpha Plane 6 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_6_SPY ,Plane 6 starting position Y" line.long 0x08 "AP_6_WASPR,Alpha Plane 6 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_6_WASPY ,Plane 6 wrap around starting position Y" line.long 0x0C "AP_6_WAMWR,Alpha Plane 6 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_6_WAMWY ,Plane 6 wrap around memory width Y" line.long 0x10 "AP_6_BTR,Alpha Plane 6 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_6_BTA ,Plane 6 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_6_BTB ,Plane 6 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_6_MLR,Alpha Plane 6 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_6_MLY ,Plane 6 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_6_SWAPR,Alpha Plane 6 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_6_DIGN/SPBY ,Plane 6 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_6_SPQW ,Plane 6 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_6_SPLW ,Plane 6 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_6_SPWD ,Plane 6 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_6_DDCR4,Alpha Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_6_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P6VSPS ,Plane 6 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P6VSPS ,Plane 6 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_6_SDFS ,Plane 6 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_6_SDFS ,Plane 6 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_6_EDF ,Plane 6 extensional data format" "P6DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_6_DDCR4,Alpha Plane 6 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_6_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_6_SDFS ,Plane 6 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_6_SDFS ,Plane 6 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_6_EDF ,Plane 6 extensional data format" "P6DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Alpha-Ratio Plane 7" base (ad:0xFEB00000+0xA700) width 12. group.long 0x00++0x03 line.long 0x00 "AP_7_MR,Alpha Plane 7 Mode Register" bitfld.long 0x00 16. " P_7_WAE ,Plane 7 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_7_DC ,Plane 7 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_7_BM ,Plane 7 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_7_MWR,Alpha Plane 7 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_7_MWX ,Plane 7 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_7_DSXR,Alpha Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_7_DSX ,Plane 7 display size X" line.long 0x04 "AP_7_DSYR,Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_7_DSY ,Plane 7 display size Y" line.long 0x08 "AP_7_DPXR,Alpha Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_7_DPX ,Plane 7 display position X" line.long 0x0C "AP_7_DPYR,Alpha Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_7_DPY ,Plane 7 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_7_DSXR,Alpha Plane 7 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_7_DSX ,Plane 7 display size X" line.long 0x04 "AP_7_DSYR,Alpha Plane 7 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_7_DSY ,Plane 7 display size Y" line.long 0x08 "AP_7_DPXR,Alpha Plane 7 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_7_DPX ,Plane 7 display position X" line.long 0x0C "AP_7_DPYR,Alpha Plane 7 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_7_DPY ,Plane 7 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_7_DSA0R,Alpha Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_7_DSA0 ,Plane 7 display domain start address 0" line.long 0x04 "AP_7_DSA1R,Alpha Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_7_DSA1 ,Plane 7 display domain start address 1" line.long 0x08 "AP_7_DSA2R,Alpha Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_7_DSA2 ,Plane 7 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_7_DSA0R,Alpha Plane 7 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_7_DSA0 ,Plane 7 display domain start address 0" line.long 0x04 "AP_7_DSA1R,Plane 7 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_7_DSA1 ,Alpha Plane 7 display domain start Address 1" line.long 0x08 "AP_7_DSA2R,Alpha Plane 7 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_7_DSA2 ,Plane 7 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_7_SPXR,Alpha Plane 7 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_7_SPX ,Plane 7 starting position X" line.long 0x04 "AP_7_SPYR,Alpha Plane 7 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_7_SPY ,Plane 7 starting position Y" line.long 0x08 "AP_7_WASPR,Alpha Plane 7 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_7_WASPY ,Plane 7 wrap around starting position Y" line.long 0x0C "AP_7_WAMWR,Alpha Plane 7 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_7_WAMWY ,Plane 7 wrap around memory width Y" line.long 0x10 "AP_7_BTR,Alpha Plane 7 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_7_BTA ,Plane 7 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_7_BTB ,Plane 7 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_7_MLR,Alpha Plane 7 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_7_MLY ,Plane 7 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_7_SWAPR,Alpha Plane 7 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_7_DIGN/SPBY ,Plane 7 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_7_SPQW ,Plane 7 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_7_SPLW ,Plane 7 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_7_SPWD ,Plane 7 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_7_DDCR4,Alpha Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_7_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P7VSPS ,Plane 7 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P7VSPS ,Plane 7 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_7_SDFS ,Plane 7 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_7_SDFS ,Plane 7 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_7_EDF ,Plane 7 extensional data format" "P7DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_7_DDCR4,Alpha Plane 7 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_7_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_7_SDFS ,Plane 7 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_7_SDFS ,Plane 7 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_7_EDF ,Plane 7 extensional data format" "P7DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end tree "Alpha-Ratio Plane 8" base (ad:0xFEB00000+0xA800) width 12. group.long 0x00++0x03 line.long 0x00 "AP_8_MR,Alpha Plane 8 Mode Register" bitfld.long 0x00 16. " P_8_WAE ,Plane 8 wrap around enable" "Disabled,Enabled" bitfld.long 0x00 7. " P_8_DC ,Plane 8 display area change" "No change,Change" bitfld.long 0x00 4.--5. " P_8_BM ,Plane 8 buffer mode" "Manual display change,Auto rendering,Auto display change,Video capture" group.long 0x04++0x03 line.long 0x00 "AP_8_MWR,Alpha Plane 8 Memory Width Register" hexmask.long.word 0x00 4.--12. 1. " P_8_MWX ,Plane 8 memory width X" if (((per.l(ad:0xFEB00000+0xE0))&0x01)==0x01) group.long 0x10++0x0F line.long 0x00 "AP_8_DSXR,Alpha Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--11. 1. " P_8_DSX ,Plane 8 display size X" line.long 0x04 "AP_8_DSYR,Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--10. 1. " P_8_DSY ,Plane 8 display size Y" line.long 0x08 "AP_8_DPXR,Alpha Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--11. 1. " P_8_DPX ,Plane 8 display position X" line.long 0x0C "AP_8_DPYR,Alpha Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--10. 1. " P_8_DPY ,Plane 8 display position Y" else group.long 0x10++0x0F line.long 0x00 "AP_8_DSXR,Alpha Plane 8 Display Size X Register" hexmask.long.word 0x00 0.--10. 1. " P_8_DSX ,Plane 8 display size X" line.long 0x04 "AP_8_DSYR,Alpha Plane 8 Display Size Y Register" hexmask.long.word 0x04 0.--9. 1. " P_8_DSY ,Plane 8 display size Y" line.long 0x08 "AP_8_DPXR,Alpha Plane 8 Display Position X Register" hexmask.long.word 0x08 0.--10. 1. " P_8_DPX ,Plane 8 display position X" line.long 0x0C "AP_8_DPYR,Alpha Plane 8 Display Position Y Register" hexmask.long.word 0x0C 0.--9. 1. " P_8_DPY ,Plane 8 display position Y" endif if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x20++0x0b line.long 0x00 "AP_8_DSA0R,Alpha Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--31. 0x10 " P_8_DSA0 ,Plane 8 display domain start address 0" line.long 0x04 "AP_8_DSA1R,Alpha Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--31. 0x10 " P_8_DSA1 ,Plane 8 display domain start address 1" line.long 0x08 "AP_8_DSA2R,Alpha Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--31. 0x10 " P_8_DSA2 ,Plane 8 display domain start address 2" else group.long 0x20++0x0b line.long 0x00 "AP_8_DSA0R,Alpha Plane 8 Display Domain Start Address 0 Register" hexmask.long 0x00 4.--28. 0x10 " P_8_DSA0 ,Plane 8 display domain start address 0" line.long 0x04 "AP_8_DSA1R,Plane 8 Display Domain Start Address 1 Register" hexmask.long 0x04 4.--28. 0x10 " P_8_DSA1 ,Alpha Plane 8 display domain start Address 1" line.long 0x08 "AP_8_DSA2R,Alpha Plane 8 Display Domain Start Address 2 Register" hexmask.long 0x08 4.--28. 0x10 " P_8_DSA2 ,Plane 8 display domain start address 2" endif group.long 0x30++0x13 line.long 0x00 "AP_8_SPXR,Alpha Plane 8 Starting Position X Register" hexmask.long.word 0x00 0.--11. 1. " P_8_SPX ,Plane 8 starting position X" line.long 0x04 "AP_8_SPYR,Alpha Plane 8 Starting Position Y Register" hexmask.long.word 0x04 0.--15. 1. " P_8_SPY ,Plane 8 starting position Y" line.long 0x08 "AP_8_WASPR,Alpha Plane 8 Wrap Around Starting Position Register" hexmask.long.word 0x08 4.--13. 0x10 " P_8_WASPY ,Plane 8 wrap around starting position Y" line.long 0x0C "AP_8_WAMWR,Alpha Plane 8 Wrap Around Memory Width Register" hexmask.long.word 0x0C 0.--11. 1. " P_8_WAMWY ,Plane 8 wrap around memory width Y" line.long 0x10 "AP_8_BTR,Alpha Plane 8 Blinking Cycle Register" hexmask.long.byte 0x10 8.--15. 1. " P_8_BTA ,Plane 8 blinking cycle A" hexmask.long.byte 0x10 0.--7. 1. " P_8_BTB ,Plane 8 blinking cycle B" textline " " textline " " group.long 0x50++0x03 line.long 0x00 "AP_8_MLR,Alpha Plane 8 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " P_8_MLY ,Plane 8 memory length Y" group.long 0x80++0x03 line.long 0x00 "AP_8_SWAPR,Alpha Plane 8 SWAP Control Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,PnSWAPR enabling code [0x7775]" textline " " bitfld.long 0x00 4. 0. " P_8_DIGN/SPBY ,Plane 8 display data format invalid/byte swap enable" "Not swapped,Not swapped,Swapped in byte/Not swapped,Swapped in byte" bitfld.long 0x00 3. " P_8_SPQW ,Plane 8 quadword swap enable" "Disabled,Enabled" bitfld.long 0x00 2. " P_8_SPLW ,Plane 8 longword swap enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " P_8_SPWD ,Plane 8 word swap enable" "Disabled,Enabled" if (((per.l(ad:0xFEB00000+0x20020))&0x01)==0x01) group.long 0x90++0x03 line.long 0x00 "AP_8_DDCR4,Alpha Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_8_DDCR4 enabling code [0x7766]" textline " " sif CPUIS("R8A77470")||CPUIS("R8A77440") bitfld.long 0x00 13. " P8VSPS ,Plane 8 VSP1 select " "Memory,VSP1" textline " " elif CPUIS("R8A77420") bitfld.long 0x00 13. " P8VSPS ,Plane 8 VSP1 select" "Memory,VSP1" bitfld.long 0x00 4.--6. " P_8_SDFS ,Plane 8 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_8_SDFS ,Plane 8 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif bitfld.long 0x00 0.--2. " P_8_EDF ,Plane 8 extensional data format" "P8DDF bits,ARGB8888,RGB888,RGB666,?..." else group.long 0x90++0x03 line.long 0x00 "AP_8_DDCR4,Alpha Plane 8 Display Data Control Register 4" hexmask.long.word 0x00 16.--31. 1. " CODE ,P_8_DDCR4 enabling code [0x7766]" textline " " sif !CPUIS("R8A77470")&&!CPUIS("R8A77440") sif CPUIS("R8A77420") bitfld.long 0x00 4.--6. " P_8_SDFS ,Plane 8 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " else bitfld.long 0x00 4.--6. " P_8_SDFS ,Plane 8 superimpose data format select" "RGB composite,RGB composite,RGB composite,RGB composite,,YC composite,?..." textline " " endif endif bitfld.long 0x00 0.--2. " P_8_EDF ,Plane 8 extensional data format" "P8DDF bits,ARGB8888,RGB888,RGB666,?..." endif width 0xb tree.end endif tree.end base ad:0xFEB00000 tree "Display Capture Registers" tree "Display Capture 1 Registers" group.long 0xC100++0x7 line.long 0x00 "DC_1_MR,Display Capture 1 Mode Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DC1MR enabling code" hexmask.long.byte 0x00 8.--15. 1. " DC_1_AR ,Display capture 1 alpha ratio" bitfld.long 0x00 0. " DC_1_DF ,Display capture 1 data format" "Bits 4 and 5,ARGB8888." line.long 0x04 "DC_1_MWR,Display Capture 1 Memory Width Register" hexmask.long.word 0x04 4.--12. 1. " DC_1_MWX ,Display capture 1 memory width X" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long (0xC100+0x20)++0x03 line.long 0x00 "DC_1_SAR,Display Capture 1 Area Start Address Register" hexmask.long 0x00 4.--31. 0x10 " DC_1_SA ,Display capture 1 area start address" else group.long (0xC100+0x20)++0x03 line.long 0x00 "DC_1_SAR,Display Capture 1 Area Start Address Register" hexmask.long 0x00 4.--28. 0x10 " DC_1_SA ,Display capture 1 area start address" endif group.long (0xC100+0x50)++0x03 line.long 0x00 "DC_1_MLR,Display Capture 1 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " DC_1_MLY ,Display capture 1 memory length Y" tree.end tree "Display Capture 2 Registers" group.long 0xC200++0x7 line.long 0x00 "DC_2_MR,Display Capture 2 Mode Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DC2MR enabling code" hexmask.long.byte 0x00 8.--15. 1. " DC_2_AR ,Display capture 2 alpha ratio" bitfld.long 0x00 0. " DC_2_DF ,Display capture 2 data format" "Bits 4 and 5,ARGB8888." line.long 0x04 "DC_2_MWR,Display Capture 2 Memory Width Register" hexmask.long.word 0x04 4.--12. 1. " DC_2_MWX ,Display capture 2 memory width X" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long (0xC200+0x20)++0x03 line.long 0x00 "DC_2_SAR,Display Capture 2 Area Start Address Register" hexmask.long 0x00 4.--31. 0x10 " DC_2_SA ,Display capture 2 area start address" else group.long (0xC200+0x20)++0x03 line.long 0x00 "DC_2_SAR,Display Capture 2 Area Start Address Register" hexmask.long 0x00 4.--28. 0x10 " DC_2_SA ,Display capture 2 area start address" endif group.long (0xC200+0x50)++0x03 line.long 0x00 "DC_2_MLR,Display Capture 2 Memory Length Register" hexmask.long.tbyte 0x00 0.--16. 1. " DC_2_MLY ,Display capture 2 memory length Y" tree.end tree.end tree "Color Palette 1 Registers" width 10. group.long 0x1000++0x3ff line.long 0x0 "CP1_0 R,Color Palette 1 Register 0 " hexmask.long.byte 0x0 24.--31. 1. " CP1_0 A ,Color palette 1_0 blend ratio" hexmask.long.byte 0x0 18.--23. 1. " CP1_0 R ,Color palette 1_0 red" hexmask.long.byte 0x0 10.--15. 1. " CP1_0 G ,Color palette 1_0 green" hexmask.long.byte 0x0 2.--7. 1. " CP1_0 B ,Color palette 1_0 blue" line.long 0x4 "CP1_1 R,Color Palette 1 Register 1 " hexmask.long.byte 0x4 24.--31. 1. " CP1_1 A ,Color palette 1_1 blend ratio" hexmask.long.byte 0x4 18.--23. 1. " CP1_1 R ,Color palette 1_1 red" hexmask.long.byte 0x4 10.--15. 1. " CP1_1 G ,Color palette 1_1 green" hexmask.long.byte 0x4 2.--7. 1. " CP1_1 B ,Color palette 1_1 blue" line.long 0x8 "CP1_2 R,Color Palette 1 Register 2 " hexmask.long.byte 0x8 24.--31. 1. " CP1_2 A ,Color palette 1_2 blend ratio" hexmask.long.byte 0x8 18.--23. 1. " CP1_2 R ,Color palette 1_2 red" hexmask.long.byte 0x8 10.--15. 1. " CP1_2 G ,Color palette 1_2 green" hexmask.long.byte 0x8 2.--7. 1. " CP1_2 B ,Color palette 1_2 blue" line.long 0xC "CP1_3 R,Color Palette 1 Register 3 " hexmask.long.byte 0xC 24.--31. 1. " CP1_3 A ,Color palette 1_3 blend ratio" hexmask.long.byte 0xC 18.--23. 1. " CP1_3 R ,Color palette 1_3 red" hexmask.long.byte 0xC 10.--15. 1. " CP1_3 G ,Color palette 1_3 green" hexmask.long.byte 0xC 2.--7. 1. " CP1_3 B ,Color palette 1_3 blue" line.long 0x10 "CP1_4 R,Color Palette 1 Register 4 " hexmask.long.byte 0x10 24.--31. 1. " CP1_4 A ,Color palette 1_4 blend ratio" hexmask.long.byte 0x10 18.--23. 1. " CP1_4 R ,Color palette 1_4 red" hexmask.long.byte 0x10 10.--15. 1. " CP1_4 G ,Color palette 1_4 green" hexmask.long.byte 0x10 2.--7. 1. " CP1_4 B ,Color palette 1_4 blue" line.long 0x14 "CP1_5 R,Color Palette 1 Register 5 " hexmask.long.byte 0x14 24.--31. 1. " CP1_5 A ,Color palette 1_5 blend ratio" hexmask.long.byte 0x14 18.--23. 1. " CP1_5 R ,Color palette 1_5 red" hexmask.long.byte 0x14 10.--15. 1. " CP1_5 G ,Color palette 1_5 green" hexmask.long.byte 0x14 2.--7. 1. " CP1_5 B ,Color palette 1_5 blue" line.long 0x18 "CP1_6 R,Color Palette 1 Register 6 " hexmask.long.byte 0x18 24.--31. 1. " CP1_6 A ,Color palette 1_6 blend ratio" hexmask.long.byte 0x18 18.--23. 1. " CP1_6 R ,Color palette 1_6 red" hexmask.long.byte 0x18 10.--15. 1. " CP1_6 G ,Color palette 1_6 green" hexmask.long.byte 0x18 2.--7. 1. " CP1_6 B ,Color palette 1_6 blue" line.long 0x1C "CP1_7 R,Color Palette 1 Register 7 " hexmask.long.byte 0x1C 24.--31. 1. " CP1_7 A ,Color palette 1_7 blend ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP1_7 R ,Color palette 1_7 red" hexmask.long.byte 0x1C 10.--15. 1. " CP1_7 G ,Color palette 1_7 green" hexmask.long.byte 0x1C 2.--7. 1. " CP1_7 B ,Color palette 1_7 blue" line.long 0x20 "CP1_8 R,Color Palette 1 Register 8 " hexmask.long.byte 0x20 24.--31. 1. " CP1_8 A ,Color palette 1_8 blend ratio" hexmask.long.byte 0x20 18.--23. 1. " CP1_8 R ,Color palette 1_8 red" hexmask.long.byte 0x20 10.--15. 1. " CP1_8 G ,Color palette 1_8 green" hexmask.long.byte 0x20 2.--7. 1. " CP1_8 B ,Color palette 1_8 blue" line.long 0x24 "CP1_9 R,Color Palette 1 Register 9 " hexmask.long.byte 0x24 24.--31. 1. " CP1_9 A ,Color palette 1_9 blend ratio" hexmask.long.byte 0x24 18.--23. 1. " CP1_9 R ,Color palette 1_9 red" hexmask.long.byte 0x24 10.--15. 1. " CP1_9 G ,Color palette 1_9 green" hexmask.long.byte 0x24 2.--7. 1. " CP1_9 B ,Color palette 1_9 blue" line.long 0x28 "CP1_10 R,Color Palette 1 Register 10 " hexmask.long.byte 0x28 24.--31. 1. " CP1_10 A ,Color palette 1_10 blend ratio" hexmask.long.byte 0x28 18.--23. 1. " CP1_10 R ,Color palette 1_10 red" hexmask.long.byte 0x28 10.--15. 1. " CP1_10 G ,Color palette 1_10 green" hexmask.long.byte 0x28 2.--7. 1. " CP1_10 B ,Color palette 1_10 blue" line.long 0x2C "CP1_11 R,Color Palette 1 Register 11 " hexmask.long.byte 0x2C 24.--31. 1. " CP1_11 A ,Color palette 1_11 blend ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP1_11 R ,Color palette 1_11 red" hexmask.long.byte 0x2C 10.--15. 1. " CP1_11 G ,Color palette 1_11 green" hexmask.long.byte 0x2C 2.--7. 1. " CP1_11 B ,Color palette 1_11 blue" line.long 0x30 "CP1_12 R,Color Palette 1 Register 12 " hexmask.long.byte 0x30 24.--31. 1. " CP1_12 A ,Color palette 1_12 blend ratio" hexmask.long.byte 0x30 18.--23. 1. " CP1_12 R ,Color palette 1_12 red" hexmask.long.byte 0x30 10.--15. 1. " CP1_12 G ,Color palette 1_12 green" hexmask.long.byte 0x30 2.--7. 1. " CP1_12 B ,Color palette 1_12 blue" line.long 0x34 "CP1_13 R,Color Palette 1 Register 13 " hexmask.long.byte 0x34 24.--31. 1. " CP1_13 A ,Color palette 1_13 blend ratio" hexmask.long.byte 0x34 18.--23. 1. " CP1_13 R ,Color palette 1_13 red" hexmask.long.byte 0x34 10.--15. 1. " CP1_13 G ,Color palette 1_13 green" hexmask.long.byte 0x34 2.--7. 1. " CP1_13 B ,Color palette 1_13 blue" line.long 0x38 "CP1_14 R,Color Palette 1 Register 14 " hexmask.long.byte 0x38 24.--31. 1. " CP1_14 A ,Color palette 1_14 blend ratio" hexmask.long.byte 0x38 18.--23. 1. " CP1_14 R ,Color palette 1_14 red" hexmask.long.byte 0x38 10.--15. 1. " CP1_14 G ,Color palette 1_14 green" hexmask.long.byte 0x38 2.--7. 1. " CP1_14 B ,Color palette 1_14 blue" line.long 0x3C "CP1_15 R,Color Palette 1 Register 15 " hexmask.long.byte 0x3C 24.--31. 1. " CP1_15 A ,Color palette 1_15 blend ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP1_15 R ,Color palette 1_15 red" hexmask.long.byte 0x3C 10.--15. 1. " CP1_15 G ,Color palette 1_15 green" hexmask.long.byte 0x3C 2.--7. 1. " CP1_15 B ,Color palette 1_15 blue" line.long 0x40 "CP1_16 R,Color Palette 1 Register 16 " hexmask.long.byte 0x40 24.--31. 1. " CP1_16 A ,Color palette 1_16 blend ratio" hexmask.long.byte 0x40 18.--23. 1. " CP1_16 R ,Color palette 1_16 red" hexmask.long.byte 0x40 10.--15. 1. " CP1_16 G ,Color palette 1_16 green" hexmask.long.byte 0x40 2.--7. 1. " CP1_16 B ,Color palette 1_16 blue" line.long 0x44 "CP1_17 R,Color Palette 1 Register 17 " hexmask.long.byte 0x44 24.--31. 1. " CP1_17 A ,Color palette 1_17 blend ratio" hexmask.long.byte 0x44 18.--23. 1. " CP1_17 R ,Color palette 1_17 red" hexmask.long.byte 0x44 10.--15. 1. " CP1_17 G ,Color palette 1_17 green" hexmask.long.byte 0x44 2.--7. 1. " CP1_17 B ,Color palette 1_17 blue" line.long 0x48 "CP1_18 R,Color Palette 1 Register 18 " hexmask.long.byte 0x48 24.--31. 1. " CP1_18 A ,Color palette 1_18 blend ratio" hexmask.long.byte 0x48 18.--23. 1. " CP1_18 R ,Color palette 1_18 red" hexmask.long.byte 0x48 10.--15. 1. " CP1_18 G ,Color palette 1_18 green" hexmask.long.byte 0x48 2.--7. 1. " CP1_18 B ,Color palette 1_18 blue" line.long 0x4C "CP1_19 R,Color Palette 1 Register 19 " hexmask.long.byte 0x4C 24.--31. 1. " CP1_19 A ,Color palette 1_19 blend ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP1_19 R ,Color palette 1_19 red" hexmask.long.byte 0x4C 10.--15. 1. " CP1_19 G ,Color palette 1_19 green" hexmask.long.byte 0x4C 2.--7. 1. " CP1_19 B ,Color palette 1_19 blue" line.long 0x50 "CP1_20 R,Color Palette 1 Register 20 " hexmask.long.byte 0x50 24.--31. 1. " CP1_20 A ,Color palette 1_20 blend ratio" hexmask.long.byte 0x50 18.--23. 1. " CP1_20 R ,Color palette 1_20 red" hexmask.long.byte 0x50 10.--15. 1. " CP1_20 G ,Color palette 1_20 green" hexmask.long.byte 0x50 2.--7. 1. " CP1_20 B ,Color palette 1_20 blue" line.long 0x54 "CP1_21 R,Color Palette 1 Register 21 " hexmask.long.byte 0x54 24.--31. 1. " CP1_21 A ,Color palette 1_21 blend ratio" hexmask.long.byte 0x54 18.--23. 1. " CP1_21 R ,Color palette 1_21 red" hexmask.long.byte 0x54 10.--15. 1. " CP1_21 G ,Color palette 1_21 green" hexmask.long.byte 0x54 2.--7. 1. " CP1_21 B ,Color palette 1_21 blue" line.long 0x58 "CP1_22 R,Color Palette 1 Register 22 " hexmask.long.byte 0x58 24.--31. 1. " CP1_22 A ,Color palette 1_22 blend ratio" hexmask.long.byte 0x58 18.--23. 1. " CP1_22 R ,Color palette 1_22 red" hexmask.long.byte 0x58 10.--15. 1. " CP1_22 G ,Color palette 1_22 green" hexmask.long.byte 0x58 2.--7. 1. " CP1_22 B ,Color palette 1_22 blue" line.long 0x5C "CP1_23 R,Color Palette 1 Register 23 " hexmask.long.byte 0x5C 24.--31. 1. " CP1_23 A ,Color palette 1_23 blend ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP1_23 R ,Color palette 1_23 red" hexmask.long.byte 0x5C 10.--15. 1. " CP1_23 G ,Color palette 1_23 green" hexmask.long.byte 0x5C 2.--7. 1. " CP1_23 B ,Color palette 1_23 blue" line.long 0x60 "CP1_24 R,Color Palette 1 Register 24 " hexmask.long.byte 0x60 24.--31. 1. " CP1_24 A ,Color palette 1_24 blend ratio" hexmask.long.byte 0x60 18.--23. 1. " CP1_24 R ,Color palette 1_24 red" hexmask.long.byte 0x60 10.--15. 1. " CP1_24 G ,Color palette 1_24 green" hexmask.long.byte 0x60 2.--7. 1. " CP1_24 B ,Color palette 1_24 blue" line.long 0x64 "CP1_25 R,Color Palette 1 Register 25 " hexmask.long.byte 0x64 24.--31. 1. " CP1_25 A ,Color palette 1_25 blend ratio" hexmask.long.byte 0x64 18.--23. 1. " CP1_25 R ,Color palette 1_25 red" hexmask.long.byte 0x64 10.--15. 1. " CP1_25 G ,Color palette 1_25 green" hexmask.long.byte 0x64 2.--7. 1. " CP1_25 B ,Color palette 1_25 blue" line.long 0x68 "CP1_26 R,Color Palette 1 Register 26 " hexmask.long.byte 0x68 24.--31. 1. " CP1_26 A ,Color palette 1_26 blend ratio" hexmask.long.byte 0x68 18.--23. 1. " CP1_26 R ,Color palette 1_26 red" hexmask.long.byte 0x68 10.--15. 1. " CP1_26 G ,Color palette 1_26 green" hexmask.long.byte 0x68 2.--7. 1. " CP1_26 B ,Color palette 1_26 blue" line.long 0x6C "CP1_27 R,Color Palette 1 Register 27 " hexmask.long.byte 0x6C 24.--31. 1. " CP1_27 A ,Color palette 1_27 blend ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP1_27 R ,Color palette 1_27 red" hexmask.long.byte 0x6C 10.--15. 1. " CP1_27 G ,Color palette 1_27 green" hexmask.long.byte 0x6C 2.--7. 1. " CP1_27 B ,Color palette 1_27 blue" line.long 0x70 "CP1_28 R,Color Palette 1 Register 28 " hexmask.long.byte 0x70 24.--31. 1. " CP1_28 A ,Color palette 1_28 blend ratio" hexmask.long.byte 0x70 18.--23. 1. " CP1_28 R ,Color palette 1_28 red" hexmask.long.byte 0x70 10.--15. 1. " CP1_28 G ,Color palette 1_28 green" hexmask.long.byte 0x70 2.--7. 1. " CP1_28 B ,Color palette 1_28 blue" line.long 0x74 "CP1_29 R,Color Palette 1 Register 29 " hexmask.long.byte 0x74 24.--31. 1. " CP1_29 A ,Color palette 1_29 blend ratio" hexmask.long.byte 0x74 18.--23. 1. " CP1_29 R ,Color palette 1_29 red" hexmask.long.byte 0x74 10.--15. 1. " CP1_29 G ,Color palette 1_29 green" hexmask.long.byte 0x74 2.--7. 1. " CP1_29 B ,Color palette 1_29 blue" line.long 0x78 "CP1_30 R,Color Palette 1 Register 30 " hexmask.long.byte 0x78 24.--31. 1. " CP1_30 A ,Color palette 1_30 blend ratio" hexmask.long.byte 0x78 18.--23. 1. " CP1_30 R ,Color palette 1_30 red" hexmask.long.byte 0x78 10.--15. 1. " CP1_30 G ,Color palette 1_30 green" hexmask.long.byte 0x78 2.--7. 1. " CP1_30 B ,Color palette 1_30 blue" line.long 0x7C "CP1_31 R,Color Palette 1 Register 31 " hexmask.long.byte 0x7C 24.--31. 1. " CP1_31 A ,Color palette 1_31 blend ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP1_31 R ,Color palette 1_31 red" hexmask.long.byte 0x7C 10.--15. 1. " CP1_31 G ,Color palette 1_31 green" hexmask.long.byte 0x7C 2.--7. 1. " CP1_31 B ,Color palette 1_31 blue" line.long 0x80 "CP1_32 R,Color Palette 1 Register 32 " hexmask.long.byte 0x80 24.--31. 1. " CP1_32 A ,Color palette 1_32 blend ratio" hexmask.long.byte 0x80 18.--23. 1. " CP1_32 R ,Color palette 1_32 red" hexmask.long.byte 0x80 10.--15. 1. " CP1_32 G ,Color palette 1_32 green" hexmask.long.byte 0x80 2.--7. 1. " CP1_32 B ,Color palette 1_32 blue" line.long 0x84 "CP1_33 R,Color Palette 1 Register 33 " hexmask.long.byte 0x84 24.--31. 1. " CP1_33 A ,Color palette 1_33 blend ratio" hexmask.long.byte 0x84 18.--23. 1. " CP1_33 R ,Color palette 1_33 red" hexmask.long.byte 0x84 10.--15. 1. " CP1_33 G ,Color palette 1_33 green" hexmask.long.byte 0x84 2.--7. 1. " CP1_33 B ,Color palette 1_33 blue" line.long 0x88 "CP1_34 R,Color Palette 1 Register 34 " hexmask.long.byte 0x88 24.--31. 1. " CP1_34 A ,Color palette 1_34 blend ratio" hexmask.long.byte 0x88 18.--23. 1. " CP1_34 R ,Color palette 1_34 red" hexmask.long.byte 0x88 10.--15. 1. " CP1_34 G ,Color palette 1_34 green" hexmask.long.byte 0x88 2.--7. 1. " CP1_34 B ,Color palette 1_34 blue" line.long 0x8C "CP1_35 R,Color Palette 1 Register 35 " hexmask.long.byte 0x8C 24.--31. 1. " CP1_35 A ,Color palette 1_35 blend ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP1_35 R ,Color palette 1_35 red" hexmask.long.byte 0x8C 10.--15. 1. " CP1_35 G ,Color palette 1_35 green" hexmask.long.byte 0x8C 2.--7. 1. " CP1_35 B ,Color palette 1_35 blue" line.long 0x90 "CP1_36 R,Color Palette 1 Register 36 " hexmask.long.byte 0x90 24.--31. 1. " CP1_36 A ,Color palette 1_36 blend ratio" hexmask.long.byte 0x90 18.--23. 1. " CP1_36 R ,Color palette 1_36 red" hexmask.long.byte 0x90 10.--15. 1. " CP1_36 G ,Color palette 1_36 green" hexmask.long.byte 0x90 2.--7. 1. " CP1_36 B ,Color palette 1_36 blue" line.long 0x94 "CP1_37 R,Color Palette 1 Register 37 " hexmask.long.byte 0x94 24.--31. 1. " CP1_37 A ,Color palette 1_37 blend ratio" hexmask.long.byte 0x94 18.--23. 1. " CP1_37 R ,Color palette 1_37 red" hexmask.long.byte 0x94 10.--15. 1. " CP1_37 G ,Color palette 1_37 green" hexmask.long.byte 0x94 2.--7. 1. " CP1_37 B ,Color palette 1_37 blue" line.long 0x98 "CP1_38 R,Color Palette 1 Register 38 " hexmask.long.byte 0x98 24.--31. 1. " CP1_38 A ,Color palette 1_38 blend ratio" hexmask.long.byte 0x98 18.--23. 1. " CP1_38 R ,Color palette 1_38 red" hexmask.long.byte 0x98 10.--15. 1. " CP1_38 G ,Color palette 1_38 green" hexmask.long.byte 0x98 2.--7. 1. " CP1_38 B ,Color palette 1_38 blue" line.long 0x9C "CP1_39 R,Color Palette 1 Register 39 " hexmask.long.byte 0x9C 24.--31. 1. " CP1_39 A ,Color palette 1_39 blend ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP1_39 R ,Color palette 1_39 red" hexmask.long.byte 0x9C 10.--15. 1. " CP1_39 G ,Color palette 1_39 green" hexmask.long.byte 0x9C 2.--7. 1. " CP1_39 B ,Color palette 1_39 blue" line.long 0xA0 "CP1_40 R,Color Palette 1 Register 40 " hexmask.long.byte 0xA0 24.--31. 1. " CP1_40 A ,Color palette 1_40 blend ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP1_40 R ,Color palette 1_40 red" hexmask.long.byte 0xA0 10.--15. 1. " CP1_40 G ,Color palette 1_40 green" hexmask.long.byte 0xA0 2.--7. 1. " CP1_40 B ,Color palette 1_40 blue" line.long 0xA4 "CP1_41 R,Color Palette 1 Register 41 " hexmask.long.byte 0xA4 24.--31. 1. " CP1_41 A ,Color palette 1_41 blend ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP1_41 R ,Color palette 1_41 red" hexmask.long.byte 0xA4 10.--15. 1. " CP1_41 G ,Color palette 1_41 green" hexmask.long.byte 0xA4 2.--7. 1. " CP1_41 B ,Color palette 1_41 blue" line.long 0xA8 "CP1_42 R,Color Palette 1 Register 42 " hexmask.long.byte 0xA8 24.--31. 1. " CP1_42 A ,Color palette 1_42 blend ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP1_42 R ,Color palette 1_42 red" hexmask.long.byte 0xA8 10.--15. 1. " CP1_42 G ,Color palette 1_42 green" hexmask.long.byte 0xA8 2.--7. 1. " CP1_42 B ,Color palette 1_42 blue" line.long 0xAC "CP1_43 R,Color Palette 1 Register 43 " hexmask.long.byte 0xAC 24.--31. 1. " CP1_43 A ,Color palette 1_43 blend ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP1_43 R ,Color palette 1_43 red" hexmask.long.byte 0xAC 10.--15. 1. " CP1_43 G ,Color palette 1_43 green" hexmask.long.byte 0xAC 2.--7. 1. " CP1_43 B ,Color palette 1_43 blue" line.long 0xB0 "CP1_44 R,Color Palette 1 Register 44 " hexmask.long.byte 0xB0 24.--31. 1. " CP1_44 A ,Color palette 1_44 blend ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP1_44 R ,Color palette 1_44 red" hexmask.long.byte 0xB0 10.--15. 1. " CP1_44 G ,Color palette 1_44 green" hexmask.long.byte 0xB0 2.--7. 1. " CP1_44 B ,Color palette 1_44 blue" line.long 0xB4 "CP1_45 R,Color Palette 1 Register 45 " hexmask.long.byte 0xB4 24.--31. 1. " CP1_45 A ,Color palette 1_45 blend ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP1_45 R ,Color palette 1_45 red" hexmask.long.byte 0xB4 10.--15. 1. " CP1_45 G ,Color palette 1_45 green" hexmask.long.byte 0xB4 2.--7. 1. " CP1_45 B ,Color palette 1_45 blue" line.long 0xB8 "CP1_46 R,Color Palette 1 Register 46 " hexmask.long.byte 0xB8 24.--31. 1. " CP1_46 A ,Color palette 1_46 blend ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP1_46 R ,Color palette 1_46 red" hexmask.long.byte 0xB8 10.--15. 1. " CP1_46 G ,Color palette 1_46 green" hexmask.long.byte 0xB8 2.--7. 1. " CP1_46 B ,Color palette 1_46 blue" line.long 0xBC "CP1_47 R,Color Palette 1 Register 47 " hexmask.long.byte 0xBC 24.--31. 1. " CP1_47 A ,Color palette 1_47 blend ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP1_47 R ,Color palette 1_47 red" hexmask.long.byte 0xBC 10.--15. 1. " CP1_47 G ,Color palette 1_47 green" hexmask.long.byte 0xBC 2.--7. 1. " CP1_47 B ,Color palette 1_47 blue" line.long 0xC0 "CP1_48 R,Color Palette 1 Register 48 " hexmask.long.byte 0xC0 24.--31. 1. " CP1_48 A ,Color palette 1_48 blend ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP1_48 R ,Color palette 1_48 red" hexmask.long.byte 0xC0 10.--15. 1. " CP1_48 G ,Color palette 1_48 green" hexmask.long.byte 0xC0 2.--7. 1. " CP1_48 B ,Color palette 1_48 blue" line.long 0xC4 "CP1_49 R,Color Palette 1 Register 49 " hexmask.long.byte 0xC4 24.--31. 1. " CP1_49 A ,Color palette 1_49 blend ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP1_49 R ,Color palette 1_49 red" hexmask.long.byte 0xC4 10.--15. 1. " CP1_49 G ,Color palette 1_49 green" hexmask.long.byte 0xC4 2.--7. 1. " CP1_49 B ,Color palette 1_49 blue" line.long 0xC8 "CP1_50 R,Color Palette 1 Register 50 " hexmask.long.byte 0xC8 24.--31. 1. " CP1_50 A ,Color palette 1_50 blend ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP1_50 R ,Color palette 1_50 red" hexmask.long.byte 0xC8 10.--15. 1. " CP1_50 G ,Color palette 1_50 green" hexmask.long.byte 0xC8 2.--7. 1. " CP1_50 B ,Color palette 1_50 blue" line.long 0xCC "CP1_51 R,Color Palette 1 Register 51 " hexmask.long.byte 0xCC 24.--31. 1. " CP1_51 A ,Color palette 1_51 blend ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP1_51 R ,Color palette 1_51 red" hexmask.long.byte 0xCC 10.--15. 1. " CP1_51 G ,Color palette 1_51 green" hexmask.long.byte 0xCC 2.--7. 1. " CP1_51 B ,Color palette 1_51 blue" line.long 0xD0 "CP1_52 R,Color Palette 1 Register 52 " hexmask.long.byte 0xD0 24.--31. 1. " CP1_52 A ,Color palette 1_52 blend ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP1_52 R ,Color palette 1_52 red" hexmask.long.byte 0xD0 10.--15. 1. " CP1_52 G ,Color palette 1_52 green" hexmask.long.byte 0xD0 2.--7. 1. " CP1_52 B ,Color palette 1_52 blue" line.long 0xD4 "CP1_53 R,Color Palette 1 Register 53 " hexmask.long.byte 0xD4 24.--31. 1. " CP1_53 A ,Color palette 1_53 blend ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP1_53 R ,Color palette 1_53 red" hexmask.long.byte 0xD4 10.--15. 1. " CP1_53 G ,Color palette 1_53 green" hexmask.long.byte 0xD4 2.--7. 1. " CP1_53 B ,Color palette 1_53 blue" line.long 0xD8 "CP1_54 R,Color Palette 1 Register 54 " hexmask.long.byte 0xD8 24.--31. 1. " CP1_54 A ,Color palette 1_54 blend ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP1_54 R ,Color palette 1_54 red" hexmask.long.byte 0xD8 10.--15. 1. " CP1_54 G ,Color palette 1_54 green" hexmask.long.byte 0xD8 2.--7. 1. " CP1_54 B ,Color palette 1_54 blue" line.long 0xDC "CP1_55 R,Color Palette 1 Register 55 " hexmask.long.byte 0xDC 24.--31. 1. " CP1_55 A ,Color palette 1_55 blend ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP1_55 R ,Color palette 1_55 red" hexmask.long.byte 0xDC 10.--15. 1. " CP1_55 G ,Color palette 1_55 green" hexmask.long.byte 0xDC 2.--7. 1. " CP1_55 B ,Color palette 1_55 blue" line.long 0xE0 "CP1_56 R,Color Palette 1 Register 56 " hexmask.long.byte 0xE0 24.--31. 1. " CP1_56 A ,Color palette 1_56 blend ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP1_56 R ,Color palette 1_56 red" hexmask.long.byte 0xE0 10.--15. 1. " CP1_56 G ,Color palette 1_56 green" hexmask.long.byte 0xE0 2.--7. 1. " CP1_56 B ,Color palette 1_56 blue" line.long 0xE4 "CP1_57 R,Color Palette 1 Register 57 " hexmask.long.byte 0xE4 24.--31. 1. " CP1_57 A ,Color palette 1_57 blend ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP1_57 R ,Color palette 1_57 red" hexmask.long.byte 0xE4 10.--15. 1. " CP1_57 G ,Color palette 1_57 green" hexmask.long.byte 0xE4 2.--7. 1. " CP1_57 B ,Color palette 1_57 blue" line.long 0xE8 "CP1_58 R,Color Palette 1 Register 58 " hexmask.long.byte 0xE8 24.--31. 1. " CP1_58 A ,Color palette 1_58 blend ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP1_58 R ,Color palette 1_58 red" hexmask.long.byte 0xE8 10.--15. 1. " CP1_58 G ,Color palette 1_58 green" hexmask.long.byte 0xE8 2.--7. 1. " CP1_58 B ,Color palette 1_58 blue" line.long 0xEC "CP1_59 R,Color Palette 1 Register 59 " hexmask.long.byte 0xEC 24.--31. 1. " CP1_59 A ,Color palette 1_59 blend ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP1_59 R ,Color palette 1_59 red" hexmask.long.byte 0xEC 10.--15. 1. " CP1_59 G ,Color palette 1_59 green" hexmask.long.byte 0xEC 2.--7. 1. " CP1_59 B ,Color palette 1_59 blue" line.long 0xF0 "CP1_60 R,Color Palette 1 Register 60 " hexmask.long.byte 0xF0 24.--31. 1. " CP1_60 A ,Color palette 1_60 blend ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP1_60 R ,Color palette 1_60 red" hexmask.long.byte 0xF0 10.--15. 1. " CP1_60 G ,Color palette 1_60 green" hexmask.long.byte 0xF0 2.--7. 1. " CP1_60 B ,Color palette 1_60 blue" line.long 0xF4 "CP1_61 R,Color Palette 1 Register 61 " hexmask.long.byte 0xF4 24.--31. 1. " CP1_61 A ,Color palette 1_61 blend ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP1_61 R ,Color palette 1_61 red" hexmask.long.byte 0xF4 10.--15. 1. " CP1_61 G ,Color palette 1_61 green" hexmask.long.byte 0xF4 2.--7. 1. " CP1_61 B ,Color palette 1_61 blue" line.long 0xF8 "CP1_62 R,Color Palette 1 Register 62 " hexmask.long.byte 0xF8 24.--31. 1. " CP1_62 A ,Color palette 1_62 blend ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP1_62 R ,Color palette 1_62 red" hexmask.long.byte 0xF8 10.--15. 1. " CP1_62 G ,Color palette 1_62 green" hexmask.long.byte 0xF8 2.--7. 1. " CP1_62 B ,Color palette 1_62 blue" line.long 0xFC "CP1_63 R,Color Palette 1 Register 63 " hexmask.long.byte 0xFC 24.--31. 1. " CP1_63 A ,Color palette 1_63 blend ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP1_63 R ,Color palette 1_63 red" hexmask.long.byte 0xFC 10.--15. 1. " CP1_63 G ,Color palette 1_63 green" hexmask.long.byte 0xFC 2.--7. 1. " CP1_63 B ,Color palette 1_63 blue" line.long 0x100 "CP1_64 R,Color Palette 1 Register 64 " hexmask.long.byte 0x100 24.--31. 1. " CP1_64 A ,Color palette 1_64 blend ratio" hexmask.long.byte 0x100 18.--23. 1. " CP1_64 R ,Color palette 1_64 red" hexmask.long.byte 0x100 10.--15. 1. " CP1_64 G ,Color palette 1_64 green" hexmask.long.byte 0x100 2.--7. 1. " CP1_64 B ,Color palette 1_64 blue" line.long 0x104 "CP1_65 R,Color Palette 1 Register 65 " hexmask.long.byte 0x104 24.--31. 1. " CP1_65 A ,Color palette 1_65 blend ratio" hexmask.long.byte 0x104 18.--23. 1. " CP1_65 R ,Color palette 1_65 red" hexmask.long.byte 0x104 10.--15. 1. " CP1_65 G ,Color palette 1_65 green" hexmask.long.byte 0x104 2.--7. 1. " CP1_65 B ,Color palette 1_65 blue" line.long 0x108 "CP1_66 R,Color Palette 1 Register 66 " hexmask.long.byte 0x108 24.--31. 1. " CP1_66 A ,Color palette 1_66 blend ratio" hexmask.long.byte 0x108 18.--23. 1. " CP1_66 R ,Color palette 1_66 red" hexmask.long.byte 0x108 10.--15. 1. " CP1_66 G ,Color palette 1_66 green" hexmask.long.byte 0x108 2.--7. 1. " CP1_66 B ,Color palette 1_66 blue" line.long 0x10C "CP1_67 R,Color Palette 1 Register 67 " hexmask.long.byte 0x10C 24.--31. 1. " CP1_67 A ,Color palette 1_67 blend ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP1_67 R ,Color palette 1_67 red" hexmask.long.byte 0x10C 10.--15. 1. " CP1_67 G ,Color palette 1_67 green" hexmask.long.byte 0x10C 2.--7. 1. " CP1_67 B ,Color palette 1_67 blue" line.long 0x110 "CP1_68 R,Color Palette 1 Register 68 " hexmask.long.byte 0x110 24.--31. 1. " CP1_68 A ,Color palette 1_68 blend ratio" hexmask.long.byte 0x110 18.--23. 1. " CP1_68 R ,Color palette 1_68 red" hexmask.long.byte 0x110 10.--15. 1. " CP1_68 G ,Color palette 1_68 green" hexmask.long.byte 0x110 2.--7. 1. " CP1_68 B ,Color palette 1_68 blue" line.long 0x114 "CP1_69 R,Color Palette 1 Register 69 " hexmask.long.byte 0x114 24.--31. 1. " CP1_69 A ,Color palette 1_69 blend ratio" hexmask.long.byte 0x114 18.--23. 1. " CP1_69 R ,Color palette 1_69 red" hexmask.long.byte 0x114 10.--15. 1. " CP1_69 G ,Color palette 1_69 green" hexmask.long.byte 0x114 2.--7. 1. " CP1_69 B ,Color palette 1_69 blue" line.long 0x118 "CP1_70 R,Color Palette 1 Register 70 " hexmask.long.byte 0x118 24.--31. 1. " CP1_70 A ,Color palette 1_70 blend ratio" hexmask.long.byte 0x118 18.--23. 1. " CP1_70 R ,Color palette 1_70 red" hexmask.long.byte 0x118 10.--15. 1. " CP1_70 G ,Color palette 1_70 green" hexmask.long.byte 0x118 2.--7. 1. " CP1_70 B ,Color palette 1_70 blue" line.long 0x11C "CP1_71 R,Color Palette 1 Register 71 " hexmask.long.byte 0x11C 24.--31. 1. " CP1_71 A ,Color palette 1_71 blend ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP1_71 R ,Color palette 1_71 red" hexmask.long.byte 0x11C 10.--15. 1. " CP1_71 G ,Color palette 1_71 green" hexmask.long.byte 0x11C 2.--7. 1. " CP1_71 B ,Color palette 1_71 blue" line.long 0x120 "CP1_72 R,Color Palette 1 Register 72 " hexmask.long.byte 0x120 24.--31. 1. " CP1_72 A ,Color palette 1_72 blend ratio" hexmask.long.byte 0x120 18.--23. 1. " CP1_72 R ,Color palette 1_72 red" hexmask.long.byte 0x120 10.--15. 1. " CP1_72 G ,Color palette 1_72 green" hexmask.long.byte 0x120 2.--7. 1. " CP1_72 B ,Color palette 1_72 blue" line.long 0x124 "CP1_73 R,Color Palette 1 Register 73 " hexmask.long.byte 0x124 24.--31. 1. " CP1_73 A ,Color palette 1_73 blend ratio" hexmask.long.byte 0x124 18.--23. 1. " CP1_73 R ,Color palette 1_73 red" hexmask.long.byte 0x124 10.--15. 1. " CP1_73 G ,Color palette 1_73 green" hexmask.long.byte 0x124 2.--7. 1. " CP1_73 B ,Color palette 1_73 blue" line.long 0x128 "CP1_74 R,Color Palette 1 Register 74 " hexmask.long.byte 0x128 24.--31. 1. " CP1_74 A ,Color palette 1_74 blend ratio" hexmask.long.byte 0x128 18.--23. 1. " CP1_74 R ,Color palette 1_74 red" hexmask.long.byte 0x128 10.--15. 1. " CP1_74 G ,Color palette 1_74 green" hexmask.long.byte 0x128 2.--7. 1. " CP1_74 B ,Color palette 1_74 blue" line.long 0x12C "CP1_75 R,Color Palette 1 Register 75 " hexmask.long.byte 0x12C 24.--31. 1. " CP1_75 A ,Color palette 1_75 blend ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP1_75 R ,Color palette 1_75 red" hexmask.long.byte 0x12C 10.--15. 1. " CP1_75 G ,Color palette 1_75 green" hexmask.long.byte 0x12C 2.--7. 1. " CP1_75 B ,Color palette 1_75 blue" line.long 0x130 "CP1_76 R,Color Palette 1 Register 76 " hexmask.long.byte 0x130 24.--31. 1. " CP1_76 A ,Color palette 1_76 blend ratio" hexmask.long.byte 0x130 18.--23. 1. " CP1_76 R ,Color palette 1_76 red" hexmask.long.byte 0x130 10.--15. 1. " CP1_76 G ,Color palette 1_76 green" hexmask.long.byte 0x130 2.--7. 1. " CP1_76 B ,Color palette 1_76 blue" line.long 0x134 "CP1_77 R,Color Palette 1 Register 77 " hexmask.long.byte 0x134 24.--31. 1. " CP1_77 A ,Color palette 1_77 blend ratio" hexmask.long.byte 0x134 18.--23. 1. " CP1_77 R ,Color palette 1_77 red" hexmask.long.byte 0x134 10.--15. 1. " CP1_77 G ,Color palette 1_77 green" hexmask.long.byte 0x134 2.--7. 1. " CP1_77 B ,Color palette 1_77 blue" line.long 0x138 "CP1_78 R,Color Palette 1 Register 78 " hexmask.long.byte 0x138 24.--31. 1. " CP1_78 A ,Color palette 1_78 blend ratio" hexmask.long.byte 0x138 18.--23. 1. " CP1_78 R ,Color palette 1_78 red" hexmask.long.byte 0x138 10.--15. 1. " CP1_78 G ,Color palette 1_78 green" hexmask.long.byte 0x138 2.--7. 1. " CP1_78 B ,Color palette 1_78 blue" line.long 0x13C "CP1_79 R,Color Palette 1 Register 79 " hexmask.long.byte 0x13C 24.--31. 1. " CP1_79 A ,Color palette 1_79 blend ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP1_79 R ,Color palette 1_79 red" hexmask.long.byte 0x13C 10.--15. 1. " CP1_79 G ,Color palette 1_79 green" hexmask.long.byte 0x13C 2.--7. 1. " CP1_79 B ,Color palette 1_79 blue" line.long 0x140 "CP1_80 R,Color Palette 1 Register 80 " hexmask.long.byte 0x140 24.--31. 1. " CP1_80 A ,Color palette 1_80 blend ratio" hexmask.long.byte 0x140 18.--23. 1. " CP1_80 R ,Color palette 1_80 red" hexmask.long.byte 0x140 10.--15. 1. " CP1_80 G ,Color palette 1_80 green" hexmask.long.byte 0x140 2.--7. 1. " CP1_80 B ,Color palette 1_80 blue" line.long 0x144 "CP1_81 R,Color Palette 1 Register 81 " hexmask.long.byte 0x144 24.--31. 1. " CP1_81 A ,Color palette 1_81 blend ratio" hexmask.long.byte 0x144 18.--23. 1. " CP1_81 R ,Color palette 1_81 red" hexmask.long.byte 0x144 10.--15. 1. " CP1_81 G ,Color palette 1_81 green" hexmask.long.byte 0x144 2.--7. 1. " CP1_81 B ,Color palette 1_81 blue" line.long 0x148 "CP1_82 R,Color Palette 1 Register 82 " hexmask.long.byte 0x148 24.--31. 1. " CP1_82 A ,Color palette 1_82 blend ratio" hexmask.long.byte 0x148 18.--23. 1. " CP1_82 R ,Color palette 1_82 red" hexmask.long.byte 0x148 10.--15. 1. " CP1_82 G ,Color palette 1_82 green" hexmask.long.byte 0x148 2.--7. 1. " CP1_82 B ,Color palette 1_82 blue" line.long 0x14C "CP1_83 R,Color Palette 1 Register 83 " hexmask.long.byte 0x14C 24.--31. 1. " CP1_83 A ,Color palette 1_83 blend ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP1_83 R ,Color palette 1_83 red" hexmask.long.byte 0x14C 10.--15. 1. " CP1_83 G ,Color palette 1_83 green" hexmask.long.byte 0x14C 2.--7. 1. " CP1_83 B ,Color palette 1_83 blue" line.long 0x150 "CP1_84 R,Color Palette 1 Register 84 " hexmask.long.byte 0x150 24.--31. 1. " CP1_84 A ,Color palette 1_84 blend ratio" hexmask.long.byte 0x150 18.--23. 1. " CP1_84 R ,Color palette 1_84 red" hexmask.long.byte 0x150 10.--15. 1. " CP1_84 G ,Color palette 1_84 green" hexmask.long.byte 0x150 2.--7. 1. " CP1_84 B ,Color palette 1_84 blue" line.long 0x154 "CP1_85 R,Color Palette 1 Register 85 " hexmask.long.byte 0x154 24.--31. 1. " CP1_85 A ,Color palette 1_85 blend ratio" hexmask.long.byte 0x154 18.--23. 1. " CP1_85 R ,Color palette 1_85 red" hexmask.long.byte 0x154 10.--15. 1. " CP1_85 G ,Color palette 1_85 green" hexmask.long.byte 0x154 2.--7. 1. " CP1_85 B ,Color palette 1_85 blue" line.long 0x158 "CP1_86 R,Color Palette 1 Register 86 " hexmask.long.byte 0x158 24.--31. 1. " CP1_86 A ,Color palette 1_86 blend ratio" hexmask.long.byte 0x158 18.--23. 1. " CP1_86 R ,Color palette 1_86 red" hexmask.long.byte 0x158 10.--15. 1. " CP1_86 G ,Color palette 1_86 green" hexmask.long.byte 0x158 2.--7. 1. " CP1_86 B ,Color palette 1_86 blue" line.long 0x15C "CP1_87 R,Color Palette 1 Register 87 " hexmask.long.byte 0x15C 24.--31. 1. " CP1_87 A ,Color palette 1_87 blend ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP1_87 R ,Color palette 1_87 red" hexmask.long.byte 0x15C 10.--15. 1. " CP1_87 G ,Color palette 1_87 green" hexmask.long.byte 0x15C 2.--7. 1. " CP1_87 B ,Color palette 1_87 blue" line.long 0x160 "CP1_88 R,Color Palette 1 Register 88 " hexmask.long.byte 0x160 24.--31. 1. " CP1_88 A ,Color palette 1_88 blend ratio" hexmask.long.byte 0x160 18.--23. 1. " CP1_88 R ,Color palette 1_88 red" hexmask.long.byte 0x160 10.--15. 1. " CP1_88 G ,Color palette 1_88 green" hexmask.long.byte 0x160 2.--7. 1. " CP1_88 B ,Color palette 1_88 blue" line.long 0x164 "CP1_89 R,Color Palette 1 Register 89 " hexmask.long.byte 0x164 24.--31. 1. " CP1_89 A ,Color palette 1_89 blend ratio" hexmask.long.byte 0x164 18.--23. 1. " CP1_89 R ,Color palette 1_89 red" hexmask.long.byte 0x164 10.--15. 1. " CP1_89 G ,Color palette 1_89 green" hexmask.long.byte 0x164 2.--7. 1. " CP1_89 B ,Color palette 1_89 blue" line.long 0x168 "CP1_90 R,Color Palette 1 Register 90 " hexmask.long.byte 0x168 24.--31. 1. " CP1_90 A ,Color palette 1_90 blend ratio" hexmask.long.byte 0x168 18.--23. 1. " CP1_90 R ,Color palette 1_90 red" hexmask.long.byte 0x168 10.--15. 1. " CP1_90 G ,Color palette 1_90 green" hexmask.long.byte 0x168 2.--7. 1. " CP1_90 B ,Color palette 1_90 blue" line.long 0x16C "CP1_91 R,Color Palette 1 Register 91 " hexmask.long.byte 0x16C 24.--31. 1. " CP1_91 A ,Color palette 1_91 blend ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP1_91 R ,Color palette 1_91 red" hexmask.long.byte 0x16C 10.--15. 1. " CP1_91 G ,Color palette 1_91 green" hexmask.long.byte 0x16C 2.--7. 1. " CP1_91 B ,Color palette 1_91 blue" line.long 0x170 "CP1_92 R,Color Palette 1 Register 92 " hexmask.long.byte 0x170 24.--31. 1. " CP1_92 A ,Color palette 1_92 blend ratio" hexmask.long.byte 0x170 18.--23. 1. " CP1_92 R ,Color palette 1_92 red" hexmask.long.byte 0x170 10.--15. 1. " CP1_92 G ,Color palette 1_92 green" hexmask.long.byte 0x170 2.--7. 1. " CP1_92 B ,Color palette 1_92 blue" line.long 0x174 "CP1_93 R,Color Palette 1 Register 93 " hexmask.long.byte 0x174 24.--31. 1. " CP1_93 A ,Color palette 1_93 blend ratio" hexmask.long.byte 0x174 18.--23. 1. " CP1_93 R ,Color palette 1_93 red" hexmask.long.byte 0x174 10.--15. 1. " CP1_93 G ,Color palette 1_93 green" hexmask.long.byte 0x174 2.--7. 1. " CP1_93 B ,Color palette 1_93 blue" line.long 0x178 "CP1_94 R,Color Palette 1 Register 94 " hexmask.long.byte 0x178 24.--31. 1. " CP1_94 A ,Color palette 1_94 blend ratio" hexmask.long.byte 0x178 18.--23. 1. " CP1_94 R ,Color palette 1_94 red" hexmask.long.byte 0x178 10.--15. 1. " CP1_94 G ,Color palette 1_94 green" hexmask.long.byte 0x178 2.--7. 1. " CP1_94 B ,Color palette 1_94 blue" line.long 0x17C "CP1_95 R,Color Palette 1 Register 95 " hexmask.long.byte 0x17C 24.--31. 1. " CP1_95 A ,Color palette 1_95 blend ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP1_95 R ,Color palette 1_95 red" hexmask.long.byte 0x17C 10.--15. 1. " CP1_95 G ,Color palette 1_95 green" hexmask.long.byte 0x17C 2.--7. 1. " CP1_95 B ,Color palette 1_95 blue" line.long 0x180 "CP1_96 R,Color Palette 1 Register 96 " hexmask.long.byte 0x180 24.--31. 1. " CP1_96 A ,Color palette 1_96 blend ratio" hexmask.long.byte 0x180 18.--23. 1. " CP1_96 R ,Color palette 1_96 red" hexmask.long.byte 0x180 10.--15. 1. " CP1_96 G ,Color palette 1_96 green" hexmask.long.byte 0x180 2.--7. 1. " CP1_96 B ,Color palette 1_96 blue" line.long 0x184 "CP1_97 R,Color Palette 1 Register 97 " hexmask.long.byte 0x184 24.--31. 1. " CP1_97 A ,Color palette 1_97 blend ratio" hexmask.long.byte 0x184 18.--23. 1. " CP1_97 R ,Color palette 1_97 red" hexmask.long.byte 0x184 10.--15. 1. " CP1_97 G ,Color palette 1_97 green" hexmask.long.byte 0x184 2.--7. 1. " CP1_97 B ,Color palette 1_97 blue" line.long 0x188 "CP1_98 R,Color Palette 1 Register 98 " hexmask.long.byte 0x188 24.--31. 1. " CP1_98 A ,Color palette 1_98 blend ratio" hexmask.long.byte 0x188 18.--23. 1. " CP1_98 R ,Color palette 1_98 red" hexmask.long.byte 0x188 10.--15. 1. " CP1_98 G ,Color palette 1_98 green" hexmask.long.byte 0x188 2.--7. 1. " CP1_98 B ,Color palette 1_98 blue" line.long 0x18C "CP1_99 R,Color Palette 1 Register 99 " hexmask.long.byte 0x18C 24.--31. 1. " CP1_99 A ,Color palette 1_99 blend ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP1_99 R ,Color palette 1_99 red" hexmask.long.byte 0x18C 10.--15. 1. " CP1_99 G ,Color palette 1_99 green" hexmask.long.byte 0x18C 2.--7. 1. " CP1_99 B ,Color palette 1_99 blue" line.long 0x190 "CP1_100R,Color Palette 1 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP1_100A ,Color palette 1_100 blend ratio" hexmask.long.byte 0x190 18.--23. 1. " CP1_100R ,Color palette 1_100 red" hexmask.long.byte 0x190 10.--15. 1. " CP1_100G ,Color palette 1_100 green" hexmask.long.byte 0x190 2.--7. 1. " CP1_100B ,Color palette 1_100 blue" line.long 0x194 "CP1_101R,Color Palette 1 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP1_101A ,Color palette 1_101 blend ratio" hexmask.long.byte 0x194 18.--23. 1. " CP1_101R ,Color palette 1_101 red" hexmask.long.byte 0x194 10.--15. 1. " CP1_101G ,Color palette 1_101 green" hexmask.long.byte 0x194 2.--7. 1. " CP1_101B ,Color palette 1_101 blue" line.long 0x198 "CP1_102R,Color Palette 1 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP1_102A ,Color palette 1_102 blend ratio" hexmask.long.byte 0x198 18.--23. 1. " CP1_102R ,Color palette 1_102 red" hexmask.long.byte 0x198 10.--15. 1. " CP1_102G ,Color palette 1_102 green" hexmask.long.byte 0x198 2.--7. 1. " CP1_102B ,Color palette 1_102 blue" line.long 0x19C "CP1_103R,Color Palette 1 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP1_103A ,Color palette 1_103 blend ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP1_103R ,Color palette 1_103 red" hexmask.long.byte 0x19C 10.--15. 1. " CP1_103G ,Color palette 1_103 green" hexmask.long.byte 0x19C 2.--7. 1. " CP1_103B ,Color palette 1_103 blue" line.long 0x1A0 "CP1_104R,Color Palette 1 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP1_104A ,Color palette 1_104 blend ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP1_104R ,Color palette 1_104 red" hexmask.long.byte 0x1A0 10.--15. 1. " CP1_104G ,Color palette 1_104 green" hexmask.long.byte 0x1A0 2.--7. 1. " CP1_104B ,Color palette 1_104 blue" line.long 0x1A4 "CP1_105R,Color Palette 1 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP1_105A ,Color palette 1_105 blend ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP1_105R ,Color palette 1_105 red" hexmask.long.byte 0x1A4 10.--15. 1. " CP1_105G ,Color palette 1_105 green" hexmask.long.byte 0x1A4 2.--7. 1. " CP1_105B ,Color palette 1_105 blue" line.long 0x1A8 "CP1_106R,Color Palette 1 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP1_106A ,Color palette 1_106 blend ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP1_106R ,Color palette 1_106 red" hexmask.long.byte 0x1A8 10.--15. 1. " CP1_106G ,Color palette 1_106 green" hexmask.long.byte 0x1A8 2.--7. 1. " CP1_106B ,Color palette 1_106 blue" line.long 0x1AC "CP1_107R,Color Palette 1 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP1_107A ,Color palette 1_107 blend ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP1_107R ,Color palette 1_107 red" hexmask.long.byte 0x1AC 10.--15. 1. " CP1_107G ,Color palette 1_107 green" hexmask.long.byte 0x1AC 2.--7. 1. " CP1_107B ,Color palette 1_107 blue" line.long 0x1B0 "CP1_108R,Color Palette 1 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP1_108A ,Color palette 1_108 blend ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP1_108R ,Color palette 1_108 red" hexmask.long.byte 0x1B0 10.--15. 1. " CP1_108G ,Color palette 1_108 green" hexmask.long.byte 0x1B0 2.--7. 1. " CP1_108B ,Color palette 1_108 blue" line.long 0x1B4 "CP1_109R,Color Palette 1 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP1_109A ,Color palette 1_109 blend ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP1_109R ,Color palette 1_109 red" hexmask.long.byte 0x1B4 10.--15. 1. " CP1_109G ,Color palette 1_109 green" hexmask.long.byte 0x1B4 2.--7. 1. " CP1_109B ,Color palette 1_109 blue" line.long 0x1B8 "CP1_110R,Color Palette 1 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP1_110A ,Color palette 1_110 blend ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP1_110R ,Color palette 1_110 red" hexmask.long.byte 0x1B8 10.--15. 1. " CP1_110G ,Color palette 1_110 green" hexmask.long.byte 0x1B8 2.--7. 1. " CP1_110B ,Color palette 1_110 blue" line.long 0x1BC "CP1_111R,Color Palette 1 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP1_111A ,Color palette 1_111 blend ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP1_111R ,Color palette 1_111 red" hexmask.long.byte 0x1BC 10.--15. 1. " CP1_111G ,Color palette 1_111 green" hexmask.long.byte 0x1BC 2.--7. 1. " CP1_111B ,Color palette 1_111 blue" line.long 0x1C0 "CP1_112R,Color Palette 1 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP1_112A ,Color palette 1_112 blend ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP1_112R ,Color palette 1_112 red" hexmask.long.byte 0x1C0 10.--15. 1. " CP1_112G ,Color palette 1_112 green" hexmask.long.byte 0x1C0 2.--7. 1. " CP1_112B ,Color palette 1_112 blue" line.long 0x1C4 "CP1_113R,Color Palette 1 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP1_113A ,Color palette 1_113 blend ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP1_113R ,Color palette 1_113 red" hexmask.long.byte 0x1C4 10.--15. 1. " CP1_113G ,Color palette 1_113 green" hexmask.long.byte 0x1C4 2.--7. 1. " CP1_113B ,Color palette 1_113 blue" line.long 0x1C8 "CP1_114R,Color Palette 1 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP1_114A ,Color palette 1_114 blend ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP1_114R ,Color palette 1_114 red" hexmask.long.byte 0x1C8 10.--15. 1. " CP1_114G ,Color palette 1_114 green" hexmask.long.byte 0x1C8 2.--7. 1. " CP1_114B ,Color palette 1_114 blue" line.long 0x1CC "CP1_115R,Color Palette 1 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP1_115A ,Color palette 1_115 blend ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP1_115R ,Color palette 1_115 red" hexmask.long.byte 0x1CC 10.--15. 1. " CP1_115G ,Color palette 1_115 green" hexmask.long.byte 0x1CC 2.--7. 1. " CP1_115B ,Color palette 1_115 blue" line.long 0x1D0 "CP1_116R,Color Palette 1 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP1_116A ,Color palette 1_116 blend ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP1_116R ,Color palette 1_116 red" hexmask.long.byte 0x1D0 10.--15. 1. " CP1_116G ,Color palette 1_116 green" hexmask.long.byte 0x1D0 2.--7. 1. " CP1_116B ,Color palette 1_116 blue" line.long 0x1D4 "CP1_117R,Color Palette 1 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP1_117A ,Color palette 1_117 blend ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP1_117R ,Color palette 1_117 red" hexmask.long.byte 0x1D4 10.--15. 1. " CP1_117G ,Color palette 1_117 green" hexmask.long.byte 0x1D4 2.--7. 1. " CP1_117B ,Color palette 1_117 blue" line.long 0x1D8 "CP1_118R,Color Palette 1 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP1_118A ,Color palette 1_118 blend ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP1_118R ,Color palette 1_118 red" hexmask.long.byte 0x1D8 10.--15. 1. " CP1_118G ,Color palette 1_118 green" hexmask.long.byte 0x1D8 2.--7. 1. " CP1_118B ,Color palette 1_118 blue" line.long 0x1DC "CP1_119R,Color Palette 1 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP1_119A ,Color palette 1_119 blend ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP1_119R ,Color palette 1_119 red" hexmask.long.byte 0x1DC 10.--15. 1. " CP1_119G ,Color palette 1_119 green" hexmask.long.byte 0x1DC 2.--7. 1. " CP1_119B ,Color palette 1_119 blue" line.long 0x1E0 "CP1_120R,Color Palette 1 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP1_120A ,Color palette 1_120 blend ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP1_120R ,Color palette 1_120 red" hexmask.long.byte 0x1E0 10.--15. 1. " CP1_120G ,Color palette 1_120 green" hexmask.long.byte 0x1E0 2.--7. 1. " CP1_120B ,Color palette 1_120 blue" line.long 0x1E4 "CP1_121R,Color Palette 1 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP1_121A ,Color palette 1_121 blend ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP1_121R ,Color palette 1_121 red" hexmask.long.byte 0x1E4 10.--15. 1. " CP1_121G ,Color palette 1_121 green" hexmask.long.byte 0x1E4 2.--7. 1. " CP1_121B ,Color palette 1_121 blue" line.long 0x1E8 "CP1_122R,Color Palette 1 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP1_122A ,Color palette 1_122 blend ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP1_122R ,Color palette 1_122 red" hexmask.long.byte 0x1E8 10.--15. 1. " CP1_122G ,Color palette 1_122 green" hexmask.long.byte 0x1E8 2.--7. 1. " CP1_122B ,Color palette 1_122 blue" line.long 0x1EC "CP1_123R,Color Palette 1 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP1_123A ,Color palette 1_123 blend ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP1_123R ,Color palette 1_123 red" hexmask.long.byte 0x1EC 10.--15. 1. " CP1_123G ,Color palette 1_123 green" hexmask.long.byte 0x1EC 2.--7. 1. " CP1_123B ,Color palette 1_123 blue" line.long 0x1F0 "CP1_124R,Color Palette 1 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP1_124A ,Color palette 1_124 blend ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP1_124R ,Color palette 1_124 red" hexmask.long.byte 0x1F0 10.--15. 1. " CP1_124G ,Color palette 1_124 green" hexmask.long.byte 0x1F0 2.--7. 1. " CP1_124B ,Color palette 1_124 blue" line.long 0x1F4 "CP1_125R,Color Palette 1 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP1_125A ,Color palette 1_125 blend ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP1_125R ,Color palette 1_125 red" hexmask.long.byte 0x1F4 10.--15. 1. " CP1_125G ,Color palette 1_125 green" hexmask.long.byte 0x1F4 2.--7. 1. " CP1_125B ,Color palette 1_125 blue" line.long 0x1F8 "CP1_126R,Color Palette 1 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP1_126A ,Color palette 1_126 blend ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP1_126R ,Color palette 1_126 red" hexmask.long.byte 0x1F8 10.--15. 1. " CP1_126G ,Color palette 1_126 green" hexmask.long.byte 0x1F8 2.--7. 1. " CP1_126B ,Color palette 1_126 blue" line.long 0x1FC "CP1_127R,Color Palette 1 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP1_127A ,Color palette 1_127 blend ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP1_127R ,Color palette 1_127 red" hexmask.long.byte 0x1FC 10.--15. 1. " CP1_127G ,Color palette 1_127 green" hexmask.long.byte 0x1FC 2.--7. 1. " CP1_127B ,Color palette 1_127 blue" line.long 0x200 "CP1_128R,Color Palette 1 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP1_128A ,Color palette 1_128 blend ratio" hexmask.long.byte 0x200 18.--23. 1. " CP1_128R ,Color palette 1_128 red" hexmask.long.byte 0x200 10.--15. 1. " CP1_128G ,Color palette 1_128 green" hexmask.long.byte 0x200 2.--7. 1. " CP1_128B ,Color palette 1_128 blue" line.long 0x204 "CP1_129R,Color Palette 1 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP1_129A ,Color palette 1_129 blend ratio" hexmask.long.byte 0x204 18.--23. 1. " CP1_129R ,Color palette 1_129 red" hexmask.long.byte 0x204 10.--15. 1. " CP1_129G ,Color palette 1_129 green" hexmask.long.byte 0x204 2.--7. 1. " CP1_129B ,Color palette 1_129 blue" line.long 0x208 "CP1_130R,Color Palette 1 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP1_130A ,Color palette 1_130 blend ratio" hexmask.long.byte 0x208 18.--23. 1. " CP1_130R ,Color palette 1_130 red" hexmask.long.byte 0x208 10.--15. 1. " CP1_130G ,Color palette 1_130 green" hexmask.long.byte 0x208 2.--7. 1. " CP1_130B ,Color palette 1_130 blue" line.long 0x20C "CP1_131R,Color Palette 1 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP1_131A ,Color palette 1_131 blend ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP1_131R ,Color palette 1_131 red" hexmask.long.byte 0x20C 10.--15. 1. " CP1_131G ,Color palette 1_131 green" hexmask.long.byte 0x20C 2.--7. 1. " CP1_131B ,Color palette 1_131 blue" line.long 0x210 "CP1_132R,Color Palette 1 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP1_132A ,Color palette 1_132 blend ratio" hexmask.long.byte 0x210 18.--23. 1. " CP1_132R ,Color palette 1_132 red" hexmask.long.byte 0x210 10.--15. 1. " CP1_132G ,Color palette 1_132 green" hexmask.long.byte 0x210 2.--7. 1. " CP1_132B ,Color palette 1_132 blue" line.long 0x214 "CP1_133R,Color Palette 1 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP1_133A ,Color palette 1_133 blend ratio" hexmask.long.byte 0x214 18.--23. 1. " CP1_133R ,Color palette 1_133 red" hexmask.long.byte 0x214 10.--15. 1. " CP1_133G ,Color palette 1_133 green" hexmask.long.byte 0x214 2.--7. 1. " CP1_133B ,Color palette 1_133 blue" line.long 0x218 "CP1_134R,Color Palette 1 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP1_134A ,Color palette 1_134 blend ratio" hexmask.long.byte 0x218 18.--23. 1. " CP1_134R ,Color palette 1_134 red" hexmask.long.byte 0x218 10.--15. 1. " CP1_134G ,Color palette 1_134 green" hexmask.long.byte 0x218 2.--7. 1. " CP1_134B ,Color palette 1_134 blue" line.long 0x21C "CP1_135R,Color Palette 1 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP1_135A ,Color palette 1_135 blend ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP1_135R ,Color palette 1_135 red" hexmask.long.byte 0x21C 10.--15. 1. " CP1_135G ,Color palette 1_135 green" hexmask.long.byte 0x21C 2.--7. 1. " CP1_135B ,Color palette 1_135 blue" line.long 0x220 "CP1_136R,Color Palette 1 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP1_136A ,Color palette 1_136 blend ratio" hexmask.long.byte 0x220 18.--23. 1. " CP1_136R ,Color palette 1_136 red" hexmask.long.byte 0x220 10.--15. 1. " CP1_136G ,Color palette 1_136 green" hexmask.long.byte 0x220 2.--7. 1. " CP1_136B ,Color palette 1_136 blue" line.long 0x224 "CP1_137R,Color Palette 1 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP1_137A ,Color palette 1_137 blend ratio" hexmask.long.byte 0x224 18.--23. 1. " CP1_137R ,Color palette 1_137 red" hexmask.long.byte 0x224 10.--15. 1. " CP1_137G ,Color palette 1_137 green" hexmask.long.byte 0x224 2.--7. 1. " CP1_137B ,Color palette 1_137 blue" line.long 0x228 "CP1_138R,Color Palette 1 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP1_138A ,Color palette 1_138 blend ratio" hexmask.long.byte 0x228 18.--23. 1. " CP1_138R ,Color palette 1_138 red" hexmask.long.byte 0x228 10.--15. 1. " CP1_138G ,Color palette 1_138 green" hexmask.long.byte 0x228 2.--7. 1. " CP1_138B ,Color palette 1_138 blue" line.long 0x22C "CP1_139R,Color Palette 1 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP1_139A ,Color palette 1_139 blend ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP1_139R ,Color palette 1_139 red" hexmask.long.byte 0x22C 10.--15. 1. " CP1_139G ,Color palette 1_139 green" hexmask.long.byte 0x22C 2.--7. 1. " CP1_139B ,Color palette 1_139 blue" line.long 0x230 "CP1_140R,Color Palette 1 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP1_140A ,Color palette 1_140 blend ratio" hexmask.long.byte 0x230 18.--23. 1. " CP1_140R ,Color palette 1_140 red" hexmask.long.byte 0x230 10.--15. 1. " CP1_140G ,Color palette 1_140 green" hexmask.long.byte 0x230 2.--7. 1. " CP1_140B ,Color palette 1_140 blue" line.long 0x234 "CP1_141R,Color Palette 1 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP1_141A ,Color palette 1_141 blend ratio" hexmask.long.byte 0x234 18.--23. 1. " CP1_141R ,Color palette 1_141 red" hexmask.long.byte 0x234 10.--15. 1. " CP1_141G ,Color palette 1_141 green" hexmask.long.byte 0x234 2.--7. 1. " CP1_141B ,Color palette 1_141 blue" line.long 0x238 "CP1_142R,Color Palette 1 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP1_142A ,Color palette 1_142 blend ratio" hexmask.long.byte 0x238 18.--23. 1. " CP1_142R ,Color palette 1_142 red" hexmask.long.byte 0x238 10.--15. 1. " CP1_142G ,Color palette 1_142 green" hexmask.long.byte 0x238 2.--7. 1. " CP1_142B ,Color palette 1_142 blue" line.long 0x23C "CP1_143R,Color Palette 1 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP1_143A ,Color palette 1_143 blend ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP1_143R ,Color palette 1_143 red" hexmask.long.byte 0x23C 10.--15. 1. " CP1_143G ,Color palette 1_143 green" hexmask.long.byte 0x23C 2.--7. 1. " CP1_143B ,Color palette 1_143 blue" line.long 0x240 "CP1_144R,Color Palette 1 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP1_144A ,Color palette 1_144 blend ratio" hexmask.long.byte 0x240 18.--23. 1. " CP1_144R ,Color palette 1_144 red" hexmask.long.byte 0x240 10.--15. 1. " CP1_144G ,Color palette 1_144 green" hexmask.long.byte 0x240 2.--7. 1. " CP1_144B ,Color palette 1_144 blue" line.long 0x244 "CP1_145R,Color Palette 1 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP1_145A ,Color palette 1_145 blend ratio" hexmask.long.byte 0x244 18.--23. 1. " CP1_145R ,Color palette 1_145 red" hexmask.long.byte 0x244 10.--15. 1. " CP1_145G ,Color palette 1_145 green" hexmask.long.byte 0x244 2.--7. 1. " CP1_145B ,Color palette 1_145 blue" line.long 0x248 "CP1_146R,Color Palette 1 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP1_146A ,Color palette 1_146 blend ratio" hexmask.long.byte 0x248 18.--23. 1. " CP1_146R ,Color palette 1_146 red" hexmask.long.byte 0x248 10.--15. 1. " CP1_146G ,Color palette 1_146 green" hexmask.long.byte 0x248 2.--7. 1. " CP1_146B ,Color palette 1_146 blue" line.long 0x24C "CP1_147R,Color Palette 1 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP1_147A ,Color palette 1_147 blend ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP1_147R ,Color palette 1_147 red" hexmask.long.byte 0x24C 10.--15. 1. " CP1_147G ,Color palette 1_147 green" hexmask.long.byte 0x24C 2.--7. 1. " CP1_147B ,Color palette 1_147 blue" line.long 0x250 "CP1_148R,Color Palette 1 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP1_148A ,Color palette 1_148 blend ratio" hexmask.long.byte 0x250 18.--23. 1. " CP1_148R ,Color palette 1_148 red" hexmask.long.byte 0x250 10.--15. 1. " CP1_148G ,Color palette 1_148 green" hexmask.long.byte 0x250 2.--7. 1. " CP1_148B ,Color palette 1_148 blue" line.long 0x254 "CP1_149R,Color Palette 1 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP1_149A ,Color palette 1_149 blend ratio" hexmask.long.byte 0x254 18.--23. 1. " CP1_149R ,Color palette 1_149 red" hexmask.long.byte 0x254 10.--15. 1. " CP1_149G ,Color palette 1_149 green" hexmask.long.byte 0x254 2.--7. 1. " CP1_149B ,Color palette 1_149 blue" line.long 0x258 "CP1_150R,Color Palette 1 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP1_150A ,Color palette 1_150 blend ratio" hexmask.long.byte 0x258 18.--23. 1. " CP1_150R ,Color palette 1_150 red" hexmask.long.byte 0x258 10.--15. 1. " CP1_150G ,Color palette 1_150 green" hexmask.long.byte 0x258 2.--7. 1. " CP1_150B ,Color palette 1_150 blue" line.long 0x25C "CP1_151R,Color Palette 1 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP1_151A ,Color palette 1_151 blend ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP1_151R ,Color palette 1_151 red" hexmask.long.byte 0x25C 10.--15. 1. " CP1_151G ,Color palette 1_151 green" hexmask.long.byte 0x25C 2.--7. 1. " CP1_151B ,Color palette 1_151 blue" line.long 0x260 "CP1_152R,Color Palette 1 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP1_152A ,Color palette 1_152 blend ratio" hexmask.long.byte 0x260 18.--23. 1. " CP1_152R ,Color palette 1_152 red" hexmask.long.byte 0x260 10.--15. 1. " CP1_152G ,Color palette 1_152 green" hexmask.long.byte 0x260 2.--7. 1. " CP1_152B ,Color palette 1_152 blue" line.long 0x264 "CP1_153R,Color Palette 1 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP1_153A ,Color palette 1_153 blend ratio" hexmask.long.byte 0x264 18.--23. 1. " CP1_153R ,Color palette 1_153 red" hexmask.long.byte 0x264 10.--15. 1. " CP1_153G ,Color palette 1_153 green" hexmask.long.byte 0x264 2.--7. 1. " CP1_153B ,Color palette 1_153 blue" line.long 0x268 "CP1_154R,Color Palette 1 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP1_154A ,Color palette 1_154 blend ratio" hexmask.long.byte 0x268 18.--23. 1. " CP1_154R ,Color palette 1_154 red" hexmask.long.byte 0x268 10.--15. 1. " CP1_154G ,Color palette 1_154 green" hexmask.long.byte 0x268 2.--7. 1. " CP1_154B ,Color palette 1_154 blue" line.long 0x26C "CP1_155R,Color Palette 1 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP1_155A ,Color palette 1_155 blend ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP1_155R ,Color palette 1_155 red" hexmask.long.byte 0x26C 10.--15. 1. " CP1_155G ,Color palette 1_155 green" hexmask.long.byte 0x26C 2.--7. 1. " CP1_155B ,Color palette 1_155 blue" line.long 0x270 "CP1_156R,Color Palette 1 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP1_156A ,Color palette 1_156 blend ratio" hexmask.long.byte 0x270 18.--23. 1. " CP1_156R ,Color palette 1_156 red" hexmask.long.byte 0x270 10.--15. 1. " CP1_156G ,Color palette 1_156 green" hexmask.long.byte 0x270 2.--7. 1. " CP1_156B ,Color palette 1_156 blue" line.long 0x274 "CP1_157R,Color Palette 1 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP1_157A ,Color palette 1_157 blend ratio" hexmask.long.byte 0x274 18.--23. 1. " CP1_157R ,Color palette 1_157 red" hexmask.long.byte 0x274 10.--15. 1. " CP1_157G ,Color palette 1_157 green" hexmask.long.byte 0x274 2.--7. 1. " CP1_157B ,Color palette 1_157 blue" line.long 0x278 "CP1_158R,Color Palette 1 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP1_158A ,Color palette 1_158 blend ratio" hexmask.long.byte 0x278 18.--23. 1. " CP1_158R ,Color palette 1_158 red" hexmask.long.byte 0x278 10.--15. 1. " CP1_158G ,Color palette 1_158 green" hexmask.long.byte 0x278 2.--7. 1. " CP1_158B ,Color palette 1_158 blue" line.long 0x27C "CP1_159R,Color Palette 1 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP1_159A ,Color palette 1_159 blend ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP1_159R ,Color palette 1_159 red" hexmask.long.byte 0x27C 10.--15. 1. " CP1_159G ,Color palette 1_159 green" hexmask.long.byte 0x27C 2.--7. 1. " CP1_159B ,Color palette 1_159 blue" line.long 0x280 "CP1_160R,Color Palette 1 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP1_160A ,Color palette 1_160 blend ratio" hexmask.long.byte 0x280 18.--23. 1. " CP1_160R ,Color palette 1_160 red" hexmask.long.byte 0x280 10.--15. 1. " CP1_160G ,Color palette 1_160 green" hexmask.long.byte 0x280 2.--7. 1. " CP1_160B ,Color palette 1_160 blue" line.long 0x284 "CP1_161R,Color Palette 1 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP1_161A ,Color palette 1_161 blend ratio" hexmask.long.byte 0x284 18.--23. 1. " CP1_161R ,Color palette 1_161 red" hexmask.long.byte 0x284 10.--15. 1. " CP1_161G ,Color palette 1_161 green" hexmask.long.byte 0x284 2.--7. 1. " CP1_161B ,Color palette 1_161 blue" line.long 0x288 "CP1_162R,Color Palette 1 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP1_162A ,Color palette 1_162 blend ratio" hexmask.long.byte 0x288 18.--23. 1. " CP1_162R ,Color palette 1_162 red" hexmask.long.byte 0x288 10.--15. 1. " CP1_162G ,Color palette 1_162 green" hexmask.long.byte 0x288 2.--7. 1. " CP1_162B ,Color palette 1_162 blue" line.long 0x28C "CP1_163R,Color Palette 1 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP1_163A ,Color palette 1_163 blend ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP1_163R ,Color palette 1_163 red" hexmask.long.byte 0x28C 10.--15. 1. " CP1_163G ,Color palette 1_163 green" hexmask.long.byte 0x28C 2.--7. 1. " CP1_163B ,Color palette 1_163 blue" line.long 0x290 "CP1_164R,Color Palette 1 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP1_164A ,Color palette 1_164 blend ratio" hexmask.long.byte 0x290 18.--23. 1. " CP1_164R ,Color palette 1_164 red" hexmask.long.byte 0x290 10.--15. 1. " CP1_164G ,Color palette 1_164 green" hexmask.long.byte 0x290 2.--7. 1. " CP1_164B ,Color palette 1_164 blue" line.long 0x294 "CP1_165R,Color Palette 1 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP1_165A ,Color palette 1_165 blend ratio" hexmask.long.byte 0x294 18.--23. 1. " CP1_165R ,Color palette 1_165 red" hexmask.long.byte 0x294 10.--15. 1. " CP1_165G ,Color palette 1_165 green" hexmask.long.byte 0x294 2.--7. 1. " CP1_165B ,Color palette 1_165 blue" line.long 0x298 "CP1_166R,Color Palette 1 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP1_166A ,Color palette 1_166 blend ratio" hexmask.long.byte 0x298 18.--23. 1. " CP1_166R ,Color palette 1_166 red" hexmask.long.byte 0x298 10.--15. 1. " CP1_166G ,Color palette 1_166 green" hexmask.long.byte 0x298 2.--7. 1. " CP1_166B ,Color palette 1_166 blue" line.long 0x29C "CP1_167R,Color Palette 1 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP1_167A ,Color palette 1_167 blend ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP1_167R ,Color palette 1_167 red" hexmask.long.byte 0x29C 10.--15. 1. " CP1_167G ,Color palette 1_167 green" hexmask.long.byte 0x29C 2.--7. 1. " CP1_167B ,Color palette 1_167 blue" line.long 0x2A0 "CP1_168R,Color Palette 1 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP1_168A ,Color palette 1_168 blend ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP1_168R ,Color palette 1_168 red" hexmask.long.byte 0x2A0 10.--15. 1. " CP1_168G ,Color palette 1_168 green" hexmask.long.byte 0x2A0 2.--7. 1. " CP1_168B ,Color palette 1_168 blue" line.long 0x2A4 "CP1_169R,Color Palette 1 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP1_169A ,Color palette 1_169 blend ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP1_169R ,Color palette 1_169 red" hexmask.long.byte 0x2A4 10.--15. 1. " CP1_169G ,Color palette 1_169 green" hexmask.long.byte 0x2A4 2.--7. 1. " CP1_169B ,Color palette 1_169 blue" line.long 0x2A8 "CP1_170R,Color Palette 1 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP1_170A ,Color palette 1_170 blend ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP1_170R ,Color palette 1_170 red" hexmask.long.byte 0x2A8 10.--15. 1. " CP1_170G ,Color palette 1_170 green" hexmask.long.byte 0x2A8 2.--7. 1. " CP1_170B ,Color palette 1_170 blue" line.long 0x2AC "CP1_171R,Color Palette 1 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP1_171A ,Color palette 1_171 blend ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP1_171R ,Color palette 1_171 red" hexmask.long.byte 0x2AC 10.--15. 1. " CP1_171G ,Color palette 1_171 green" hexmask.long.byte 0x2AC 2.--7. 1. " CP1_171B ,Color palette 1_171 blue" line.long 0x2B0 "CP1_172R,Color Palette 1 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP1_172A ,Color palette 1_172 blend ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP1_172R ,Color palette 1_172 red" hexmask.long.byte 0x2B0 10.--15. 1. " CP1_172G ,Color palette 1_172 green" hexmask.long.byte 0x2B0 2.--7. 1. " CP1_172B ,Color palette 1_172 blue" line.long 0x2B4 "CP1_173R,Color Palette 1 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP1_173A ,Color palette 1_173 blend ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP1_173R ,Color palette 1_173 red" hexmask.long.byte 0x2B4 10.--15. 1. " CP1_173G ,Color palette 1_173 green" hexmask.long.byte 0x2B4 2.--7. 1. " CP1_173B ,Color palette 1_173 blue" line.long 0x2B8 "CP1_174R,Color Palette 1 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP1_174A ,Color palette 1_174 blend ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP1_174R ,Color palette 1_174 red" hexmask.long.byte 0x2B8 10.--15. 1. " CP1_174G ,Color palette 1_174 green" hexmask.long.byte 0x2B8 2.--7. 1. " CP1_174B ,Color palette 1_174 blue" line.long 0x2BC "CP1_175R,Color Palette 1 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP1_175A ,Color palette 1_175 blend ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP1_175R ,Color palette 1_175 red" hexmask.long.byte 0x2BC 10.--15. 1. " CP1_175G ,Color palette 1_175 green" hexmask.long.byte 0x2BC 2.--7. 1. " CP1_175B ,Color palette 1_175 blue" line.long 0x2C0 "CP1_176R,Color Palette 1 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP1_176A ,Color palette 1_176 blend ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP1_176R ,Color palette 1_176 red" hexmask.long.byte 0x2C0 10.--15. 1. " CP1_176G ,Color palette 1_176 green" hexmask.long.byte 0x2C0 2.--7. 1. " CP1_176B ,Color palette 1_176 blue" line.long 0x2C4 "CP1_177R,Color Palette 1 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP1_177A ,Color palette 1_177 blend ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP1_177R ,Color palette 1_177 red" hexmask.long.byte 0x2C4 10.--15. 1. " CP1_177G ,Color palette 1_177 green" hexmask.long.byte 0x2C4 2.--7. 1. " CP1_177B ,Color palette 1_177 blue" line.long 0x2C8 "CP1_178R,Color Palette 1 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP1_178A ,Color palette 1_178 blend ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP1_178R ,Color palette 1_178 red" hexmask.long.byte 0x2C8 10.--15. 1. " CP1_178G ,Color palette 1_178 green" hexmask.long.byte 0x2C8 2.--7. 1. " CP1_178B ,Color palette 1_178 blue" line.long 0x2CC "CP1_179R,Color Palette 1 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP1_179A ,Color palette 1_179 blend ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP1_179R ,Color palette 1_179 red" hexmask.long.byte 0x2CC 10.--15. 1. " CP1_179G ,Color palette 1_179 green" hexmask.long.byte 0x2CC 2.--7. 1. " CP1_179B ,Color palette 1_179 blue" line.long 0x2D0 "CP1_180R,Color Palette 1 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP1_180A ,Color palette 1_180 blend ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP1_180R ,Color palette 1_180 red" hexmask.long.byte 0x2D0 10.--15. 1. " CP1_180G ,Color palette 1_180 green" hexmask.long.byte 0x2D0 2.--7. 1. " CP1_180B ,Color palette 1_180 blue" line.long 0x2D4 "CP1_181R,Color Palette 1 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP1_181A ,Color palette 1_181 blend ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP1_181R ,Color palette 1_181 red" hexmask.long.byte 0x2D4 10.--15. 1. " CP1_181G ,Color palette 1_181 green" hexmask.long.byte 0x2D4 2.--7. 1. " CP1_181B ,Color palette 1_181 blue" line.long 0x2D8 "CP1_182R,Color Palette 1 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP1_182A ,Color palette 1_182 blend ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP1_182R ,Color palette 1_182 red" hexmask.long.byte 0x2D8 10.--15. 1. " CP1_182G ,Color palette 1_182 green" hexmask.long.byte 0x2D8 2.--7. 1. " CP1_182B ,Color palette 1_182 blue" line.long 0x2DC "CP1_183R,Color Palette 1 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP1_183A ,Color palette 1_183 blend ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP1_183R ,Color palette 1_183 red" hexmask.long.byte 0x2DC 10.--15. 1. " CP1_183G ,Color palette 1_183 green" hexmask.long.byte 0x2DC 2.--7. 1. " CP1_183B ,Color palette 1_183 blue" line.long 0x2E0 "CP1_184R,Color Palette 1 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP1_184A ,Color palette 1_184 blend ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP1_184R ,Color palette 1_184 red" hexmask.long.byte 0x2E0 10.--15. 1. " CP1_184G ,Color palette 1_184 green" hexmask.long.byte 0x2E0 2.--7. 1. " CP1_184B ,Color palette 1_184 blue" line.long 0x2E4 "CP1_185R,Color Palette 1 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP1_185A ,Color palette 1_185 blend ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP1_185R ,Color palette 1_185 red" hexmask.long.byte 0x2E4 10.--15. 1. " CP1_185G ,Color palette 1_185 green" hexmask.long.byte 0x2E4 2.--7. 1. " CP1_185B ,Color palette 1_185 blue" line.long 0x2E8 "CP1_186R,Color Palette 1 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP1_186A ,Color palette 1_186 blend ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP1_186R ,Color palette 1_186 red" hexmask.long.byte 0x2E8 10.--15. 1. " CP1_186G ,Color palette 1_186 green" hexmask.long.byte 0x2E8 2.--7. 1. " CP1_186B ,Color palette 1_186 blue" line.long 0x2EC "CP1_187R,Color Palette 1 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP1_187A ,Color palette 1_187 blend ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP1_187R ,Color palette 1_187 red" hexmask.long.byte 0x2EC 10.--15. 1. " CP1_187G ,Color palette 1_187 green" hexmask.long.byte 0x2EC 2.--7. 1. " CP1_187B ,Color palette 1_187 blue" line.long 0x2F0 "CP1_188R,Color Palette 1 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP1_188A ,Color palette 1_188 blend ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP1_188R ,Color palette 1_188 red" hexmask.long.byte 0x2F0 10.--15. 1. " CP1_188G ,Color palette 1_188 green" hexmask.long.byte 0x2F0 2.--7. 1. " CP1_188B ,Color palette 1_188 blue" line.long 0x2F4 "CP1_189R,Color Palette 1 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP1_189A ,Color palette 1_189 blend ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP1_189R ,Color palette 1_189 red" hexmask.long.byte 0x2F4 10.--15. 1. " CP1_189G ,Color palette 1_189 green" hexmask.long.byte 0x2F4 2.--7. 1. " CP1_189B ,Color palette 1_189 blue" line.long 0x2F8 "CP1_190R,Color Palette 1 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP1_190A ,Color palette 1_190 blend ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP1_190R ,Color palette 1_190 red" hexmask.long.byte 0x2F8 10.--15. 1. " CP1_190G ,Color palette 1_190 green" hexmask.long.byte 0x2F8 2.--7. 1. " CP1_190B ,Color palette 1_190 blue" line.long 0x2FC "CP1_191R,Color Palette 1 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP1_191A ,Color palette 1_191 blend ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP1_191R ,Color palette 1_191 red" hexmask.long.byte 0x2FC 10.--15. 1. " CP1_191G ,Color palette 1_191 green" hexmask.long.byte 0x2FC 2.--7. 1. " CP1_191B ,Color palette 1_191 blue" line.long 0x300 "CP1_192R,Color Palette 1 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP1_192A ,Color palette 1_192 blend ratio" hexmask.long.byte 0x300 18.--23. 1. " CP1_192R ,Color palette 1_192 red" hexmask.long.byte 0x300 10.--15. 1. " CP1_192G ,Color palette 1_192 green" hexmask.long.byte 0x300 2.--7. 1. " CP1_192B ,Color palette 1_192 blue" line.long 0x304 "CP1_193R,Color Palette 1 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP1_193A ,Color palette 1_193 blend ratio" hexmask.long.byte 0x304 18.--23. 1. " CP1_193R ,Color palette 1_193 red" hexmask.long.byte 0x304 10.--15. 1. " CP1_193G ,Color palette 1_193 green" hexmask.long.byte 0x304 2.--7. 1. " CP1_193B ,Color palette 1_193 blue" line.long 0x308 "CP1_194R,Color Palette 1 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP1_194A ,Color palette 1_194 blend ratio" hexmask.long.byte 0x308 18.--23. 1. " CP1_194R ,Color palette 1_194 red" hexmask.long.byte 0x308 10.--15. 1. " CP1_194G ,Color palette 1_194 green" hexmask.long.byte 0x308 2.--7. 1. " CP1_194B ,Color palette 1_194 blue" line.long 0x30C "CP1_195R,Color Palette 1 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP1_195A ,Color palette 1_195 blend ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP1_195R ,Color palette 1_195 red" hexmask.long.byte 0x30C 10.--15. 1. " CP1_195G ,Color palette 1_195 green" hexmask.long.byte 0x30C 2.--7. 1. " CP1_195B ,Color palette 1_195 blue" line.long 0x310 "CP1_196R,Color Palette 1 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP1_196A ,Color palette 1_196 blend ratio" hexmask.long.byte 0x310 18.--23. 1. " CP1_196R ,Color palette 1_196 red" hexmask.long.byte 0x310 10.--15. 1. " CP1_196G ,Color palette 1_196 green" hexmask.long.byte 0x310 2.--7. 1. " CP1_196B ,Color palette 1_196 blue" line.long 0x314 "CP1_197R,Color Palette 1 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP1_197A ,Color palette 1_197 blend ratio" hexmask.long.byte 0x314 18.--23. 1. " CP1_197R ,Color palette 1_197 red" hexmask.long.byte 0x314 10.--15. 1. " CP1_197G ,Color palette 1_197 green" hexmask.long.byte 0x314 2.--7. 1. " CP1_197B ,Color palette 1_197 blue" line.long 0x318 "CP1_198R,Color Palette 1 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP1_198A ,Color palette 1_198 blend ratio" hexmask.long.byte 0x318 18.--23. 1. " CP1_198R ,Color palette 1_198 red" hexmask.long.byte 0x318 10.--15. 1. " CP1_198G ,Color palette 1_198 green" hexmask.long.byte 0x318 2.--7. 1. " CP1_198B ,Color palette 1_198 blue" line.long 0x31C "CP1_199R,Color Palette 1 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP1_199A ,Color palette 1_199 blend ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP1_199R ,Color palette 1_199 red" hexmask.long.byte 0x31C 10.--15. 1. " CP1_199G ,Color palette 1_199 green" hexmask.long.byte 0x31C 2.--7. 1. " CP1_199B ,Color palette 1_199 blue" line.long 0x320 "CP1_200R,Color Palette 1 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP1_200A ,Color palette 1_200 blend ratio" hexmask.long.byte 0x320 18.--23. 1. " CP1_200R ,Color palette 1_200 red" hexmask.long.byte 0x320 10.--15. 1. " CP1_200G ,Color palette 1_200 green" hexmask.long.byte 0x320 2.--7. 1. " CP1_200B ,Color palette 1_200 blue" line.long 0x324 "CP1_201R,Color Palette 1 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP1_201A ,Color palette 1_201 blend ratio" hexmask.long.byte 0x324 18.--23. 1. " CP1_201R ,Color palette 1_201 red" hexmask.long.byte 0x324 10.--15. 1. " CP1_201G ,Color palette 1_201 green" hexmask.long.byte 0x324 2.--7. 1. " CP1_201B ,Color palette 1_201 blue" line.long 0x328 "CP1_202R,Color Palette 1 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP1_202A ,Color palette 1_202 blend ratio" hexmask.long.byte 0x328 18.--23. 1. " CP1_202R ,Color palette 1_202 red" hexmask.long.byte 0x328 10.--15. 1. " CP1_202G ,Color palette 1_202 green" hexmask.long.byte 0x328 2.--7. 1. " CP1_202B ,Color palette 1_202 blue" line.long 0x32C "CP1_203R,Color Palette 1 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP1_203A ,Color palette 1_203 blend ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP1_203R ,Color palette 1_203 red" hexmask.long.byte 0x32C 10.--15. 1. " CP1_203G ,Color palette 1_203 green" hexmask.long.byte 0x32C 2.--7. 1. " CP1_203B ,Color palette 1_203 blue" line.long 0x330 "CP1_204R,Color Palette 1 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP1_204A ,Color palette 1_204 blend ratio" hexmask.long.byte 0x330 18.--23. 1. " CP1_204R ,Color palette 1_204 red" hexmask.long.byte 0x330 10.--15. 1. " CP1_204G ,Color palette 1_204 green" hexmask.long.byte 0x330 2.--7. 1. " CP1_204B ,Color palette 1_204 blue" line.long 0x334 "CP1_205R,Color Palette 1 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP1_205A ,Color palette 1_205 blend ratio" hexmask.long.byte 0x334 18.--23. 1. " CP1_205R ,Color palette 1_205 red" hexmask.long.byte 0x334 10.--15. 1. " CP1_205G ,Color palette 1_205 green" hexmask.long.byte 0x334 2.--7. 1. " CP1_205B ,Color palette 1_205 blue" line.long 0x338 "CP1_206R,Color Palette 1 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP1_206A ,Color palette 1_206 blend ratio" hexmask.long.byte 0x338 18.--23. 1. " CP1_206R ,Color palette 1_206 red" hexmask.long.byte 0x338 10.--15. 1. " CP1_206G ,Color palette 1_206 green" hexmask.long.byte 0x338 2.--7. 1. " CP1_206B ,Color palette 1_206 blue" line.long 0x33C "CP1_207R,Color Palette 1 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP1_207A ,Color palette 1_207 blend ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP1_207R ,Color palette 1_207 red" hexmask.long.byte 0x33C 10.--15. 1. " CP1_207G ,Color palette 1_207 green" hexmask.long.byte 0x33C 2.--7. 1. " CP1_207B ,Color palette 1_207 blue" line.long 0x340 "CP1_208R,Color Palette 1 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP1_208A ,Color palette 1_208 blend ratio" hexmask.long.byte 0x340 18.--23. 1. " CP1_208R ,Color palette 1_208 red" hexmask.long.byte 0x340 10.--15. 1. " CP1_208G ,Color palette 1_208 green" hexmask.long.byte 0x340 2.--7. 1. " CP1_208B ,Color palette 1_208 blue" line.long 0x344 "CP1_209R,Color Palette 1 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP1_209A ,Color palette 1_209 blend ratio" hexmask.long.byte 0x344 18.--23. 1. " CP1_209R ,Color palette 1_209 red" hexmask.long.byte 0x344 10.--15. 1. " CP1_209G ,Color palette 1_209 green" hexmask.long.byte 0x344 2.--7. 1. " CP1_209B ,Color palette 1_209 blue" line.long 0x348 "CP1_210R,Color Palette 1 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP1_210A ,Color palette 1_210 blend ratio" hexmask.long.byte 0x348 18.--23. 1. " CP1_210R ,Color palette 1_210 red" hexmask.long.byte 0x348 10.--15. 1. " CP1_210G ,Color palette 1_210 green" hexmask.long.byte 0x348 2.--7. 1. " CP1_210B ,Color palette 1_210 blue" line.long 0x34C "CP1_211R,Color Palette 1 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP1_211A ,Color palette 1_211 blend ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP1_211R ,Color palette 1_211 red" hexmask.long.byte 0x34C 10.--15. 1. " CP1_211G ,Color palette 1_211 green" hexmask.long.byte 0x34C 2.--7. 1. " CP1_211B ,Color palette 1_211 blue" line.long 0x350 "CP1_212R,Color Palette 1 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP1_212A ,Color palette 1_212 blend ratio" hexmask.long.byte 0x350 18.--23. 1. " CP1_212R ,Color palette 1_212 red" hexmask.long.byte 0x350 10.--15. 1. " CP1_212G ,Color palette 1_212 green" hexmask.long.byte 0x350 2.--7. 1. " CP1_212B ,Color palette 1_212 blue" line.long 0x354 "CP1_213R,Color Palette 1 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP1_213A ,Color palette 1_213 blend ratio" hexmask.long.byte 0x354 18.--23. 1. " CP1_213R ,Color palette 1_213 red" hexmask.long.byte 0x354 10.--15. 1. " CP1_213G ,Color palette 1_213 green" hexmask.long.byte 0x354 2.--7. 1. " CP1_213B ,Color palette 1_213 blue" line.long 0x358 "CP1_214R,Color Palette 1 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP1_214A ,Color palette 1_214 blend ratio" hexmask.long.byte 0x358 18.--23. 1. " CP1_214R ,Color palette 1_214 red" hexmask.long.byte 0x358 10.--15. 1. " CP1_214G ,Color palette 1_214 green" hexmask.long.byte 0x358 2.--7. 1. " CP1_214B ,Color palette 1_214 blue" line.long 0x35C "CP1_215R,Color Palette 1 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP1_215A ,Color palette 1_215 blend ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP1_215R ,Color palette 1_215 red" hexmask.long.byte 0x35C 10.--15. 1. " CP1_215G ,Color palette 1_215 green" hexmask.long.byte 0x35C 2.--7. 1. " CP1_215B ,Color palette 1_215 blue" line.long 0x360 "CP1_216R,Color Palette 1 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP1_216A ,Color palette 1_216 blend ratio" hexmask.long.byte 0x360 18.--23. 1. " CP1_216R ,Color palette 1_216 red" hexmask.long.byte 0x360 10.--15. 1. " CP1_216G ,Color palette 1_216 green" hexmask.long.byte 0x360 2.--7. 1. " CP1_216B ,Color palette 1_216 blue" line.long 0x364 "CP1_217R,Color Palette 1 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP1_217A ,Color palette 1_217 blend ratio" hexmask.long.byte 0x364 18.--23. 1. " CP1_217R ,Color palette 1_217 red" hexmask.long.byte 0x364 10.--15. 1. " CP1_217G ,Color palette 1_217 green" hexmask.long.byte 0x364 2.--7. 1. " CP1_217B ,Color palette 1_217 blue" line.long 0x368 "CP1_218R,Color Palette 1 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP1_218A ,Color palette 1_218 blend ratio" hexmask.long.byte 0x368 18.--23. 1. " CP1_218R ,Color palette 1_218 red" hexmask.long.byte 0x368 10.--15. 1. " CP1_218G ,Color palette 1_218 green" hexmask.long.byte 0x368 2.--7. 1. " CP1_218B ,Color palette 1_218 blue" line.long 0x36C "CP1_219R,Color Palette 1 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP1_219A ,Color palette 1_219 blend ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP1_219R ,Color palette 1_219 red" hexmask.long.byte 0x36C 10.--15. 1. " CP1_219G ,Color palette 1_219 green" hexmask.long.byte 0x36C 2.--7. 1. " CP1_219B ,Color palette 1_219 blue" line.long 0x370 "CP1_220R,Color Palette 1 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP1_220A ,Color palette 1_220 blend ratio" hexmask.long.byte 0x370 18.--23. 1. " CP1_220R ,Color palette 1_220 red" hexmask.long.byte 0x370 10.--15. 1. " CP1_220G ,Color palette 1_220 green" hexmask.long.byte 0x370 2.--7. 1. " CP1_220B ,Color palette 1_220 blue" line.long 0x374 "CP1_221R,Color Palette 1 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP1_221A ,Color palette 1_221 blend ratio" hexmask.long.byte 0x374 18.--23. 1. " CP1_221R ,Color palette 1_221 red" hexmask.long.byte 0x374 10.--15. 1. " CP1_221G ,Color palette 1_221 green" hexmask.long.byte 0x374 2.--7. 1. " CP1_221B ,Color palette 1_221 blue" line.long 0x378 "CP1_222R,Color Palette 1 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP1_222A ,Color palette 1_222 blend ratio" hexmask.long.byte 0x378 18.--23. 1. " CP1_222R ,Color palette 1_222 red" hexmask.long.byte 0x378 10.--15. 1. " CP1_222G ,Color palette 1_222 green" hexmask.long.byte 0x378 2.--7. 1. " CP1_222B ,Color palette 1_222 blue" line.long 0x37C "CP1_223R,Color Palette 1 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP1_223A ,Color palette 1_223 blend ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP1_223R ,Color palette 1_223 red" hexmask.long.byte 0x37C 10.--15. 1. " CP1_223G ,Color palette 1_223 green" hexmask.long.byte 0x37C 2.--7. 1. " CP1_223B ,Color palette 1_223 blue" line.long 0x380 "CP1_224R,Color Palette 1 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP1_224A ,Color palette 1_224 blend ratio" hexmask.long.byte 0x380 18.--23. 1. " CP1_224R ,Color palette 1_224 red" hexmask.long.byte 0x380 10.--15. 1. " CP1_224G ,Color palette 1_224 green" hexmask.long.byte 0x380 2.--7. 1. " CP1_224B ,Color palette 1_224 blue" line.long 0x384 "CP1_225R,Color Palette 1 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP1_225A ,Color palette 1_225 blend ratio" hexmask.long.byte 0x384 18.--23. 1. " CP1_225R ,Color palette 1_225 red" hexmask.long.byte 0x384 10.--15. 1. " CP1_225G ,Color palette 1_225 green" hexmask.long.byte 0x384 2.--7. 1. " CP1_225B ,Color palette 1_225 blue" line.long 0x388 "CP1_226R,Color Palette 1 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP1_226A ,Color palette 1_226 blend ratio" hexmask.long.byte 0x388 18.--23. 1. " CP1_226R ,Color palette 1_226 red" hexmask.long.byte 0x388 10.--15. 1. " CP1_226G ,Color palette 1_226 green" hexmask.long.byte 0x388 2.--7. 1. " CP1_226B ,Color palette 1_226 blue" line.long 0x38C "CP1_227R,Color Palette 1 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP1_227A ,Color palette 1_227 blend ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP1_227R ,Color palette 1_227 red" hexmask.long.byte 0x38C 10.--15. 1. " CP1_227G ,Color palette 1_227 green" hexmask.long.byte 0x38C 2.--7. 1. " CP1_227B ,Color palette 1_227 blue" line.long 0x390 "CP1_228R,Color Palette 1 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP1_228A ,Color palette 1_228 blend ratio" hexmask.long.byte 0x390 18.--23. 1. " CP1_228R ,Color palette 1_228 red" hexmask.long.byte 0x390 10.--15. 1. " CP1_228G ,Color palette 1_228 green" hexmask.long.byte 0x390 2.--7. 1. " CP1_228B ,Color palette 1_228 blue" line.long 0x394 "CP1_229R,Color Palette 1 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP1_229A ,Color palette 1_229 blend ratio" hexmask.long.byte 0x394 18.--23. 1. " CP1_229R ,Color palette 1_229 red" hexmask.long.byte 0x394 10.--15. 1. " CP1_229G ,Color palette 1_229 green" hexmask.long.byte 0x394 2.--7. 1. " CP1_229B ,Color palette 1_229 blue" line.long 0x398 "CP1_230R,Color Palette 1 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP1_230A ,Color palette 1_230 blend ratio" hexmask.long.byte 0x398 18.--23. 1. " CP1_230R ,Color palette 1_230 red" hexmask.long.byte 0x398 10.--15. 1. " CP1_230G ,Color palette 1_230 green" hexmask.long.byte 0x398 2.--7. 1. " CP1_230B ,Color palette 1_230 blue" line.long 0x39C "CP1_231R,Color Palette 1 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP1_231A ,Color palette 1_231 blend ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP1_231R ,Color palette 1_231 red" hexmask.long.byte 0x39C 10.--15. 1. " CP1_231G ,Color palette 1_231 green" hexmask.long.byte 0x39C 2.--7. 1. " CP1_231B ,Color palette 1_231 blue" line.long 0x3A0 "CP1_232R,Color Palette 1 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP1_232A ,Color palette 1_232 blend ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP1_232R ,Color palette 1_232 red" hexmask.long.byte 0x3A0 10.--15. 1. " CP1_232G ,Color palette 1_232 green" hexmask.long.byte 0x3A0 2.--7. 1. " CP1_232B ,Color palette 1_232 blue" line.long 0x3A4 "CP1_233R,Color Palette 1 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP1_233A ,Color palette 1_233 blend ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP1_233R ,Color palette 1_233 red" hexmask.long.byte 0x3A4 10.--15. 1. " CP1_233G ,Color palette 1_233 green" hexmask.long.byte 0x3A4 2.--7. 1. " CP1_233B ,Color palette 1_233 blue" line.long 0x3A8 "CP1_234R,Color Palette 1 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP1_234A ,Color palette 1_234 blend ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP1_234R ,Color palette 1_234 red" hexmask.long.byte 0x3A8 10.--15. 1. " CP1_234G ,Color palette 1_234 green" hexmask.long.byte 0x3A8 2.--7. 1. " CP1_234B ,Color palette 1_234 blue" line.long 0x3AC "CP1_235R,Color Palette 1 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP1_235A ,Color palette 1_235 blend ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP1_235R ,Color palette 1_235 red" hexmask.long.byte 0x3AC 10.--15. 1. " CP1_235G ,Color palette 1_235 green" hexmask.long.byte 0x3AC 2.--7. 1. " CP1_235B ,Color palette 1_235 blue" line.long 0x3B0 "CP1_236R,Color Palette 1 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP1_236A ,Color palette 1_236 blend ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP1_236R ,Color palette 1_236 red" hexmask.long.byte 0x3B0 10.--15. 1. " CP1_236G ,Color palette 1_236 green" hexmask.long.byte 0x3B0 2.--7. 1. " CP1_236B ,Color palette 1_236 blue" line.long 0x3B4 "CP1_237R,Color Palette 1 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP1_237A ,Color palette 1_237 blend ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP1_237R ,Color palette 1_237 red" hexmask.long.byte 0x3B4 10.--15. 1. " CP1_237G ,Color palette 1_237 green" hexmask.long.byte 0x3B4 2.--7. 1. " CP1_237B ,Color palette 1_237 blue" line.long 0x3B8 "CP1_238R,Color Palette 1 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP1_238A ,Color palette 1_238 blend ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP1_238R ,Color palette 1_238 red" hexmask.long.byte 0x3B8 10.--15. 1. " CP1_238G ,Color palette 1_238 green" hexmask.long.byte 0x3B8 2.--7. 1. " CP1_238B ,Color palette 1_238 blue" line.long 0x3BC "CP1_239R,Color Palette 1 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP1_239A ,Color palette 1_239 blend ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP1_239R ,Color palette 1_239 red" hexmask.long.byte 0x3BC 10.--15. 1. " CP1_239G ,Color palette 1_239 green" hexmask.long.byte 0x3BC 2.--7. 1. " CP1_239B ,Color palette 1_239 blue" line.long 0x3C0 "CP1_240R,Color Palette 1 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP1_240A ,Color palette 1_240 blend ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP1_240R ,Color palette 1_240 red" hexmask.long.byte 0x3C0 10.--15. 1. " CP1_240G ,Color palette 1_240 green" hexmask.long.byte 0x3C0 2.--7. 1. " CP1_240B ,Color palette 1_240 blue" line.long 0x3C4 "CP1_241R,Color Palette 1 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP1_241A ,Color palette 1_241 blend ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP1_241R ,Color palette 1_241 red" hexmask.long.byte 0x3C4 10.--15. 1. " CP1_241G ,Color palette 1_241 green" hexmask.long.byte 0x3C4 2.--7. 1. " CP1_241B ,Color palette 1_241 blue" line.long 0x3C8 "CP1_242R,Color Palette 1 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP1_242A ,Color palette 1_242 blend ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP1_242R ,Color palette 1_242 red" hexmask.long.byte 0x3C8 10.--15. 1. " CP1_242G ,Color palette 1_242 green" hexmask.long.byte 0x3C8 2.--7. 1. " CP1_242B ,Color palette 1_242 blue" line.long 0x3CC "CP1_243R,Color Palette 1 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP1_243A ,Color palette 1_243 blend ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP1_243R ,Color palette 1_243 red" hexmask.long.byte 0x3CC 10.--15. 1. " CP1_243G ,Color palette 1_243 green" hexmask.long.byte 0x3CC 2.--7. 1. " CP1_243B ,Color palette 1_243 blue" line.long 0x3D0 "CP1_244R,Color Palette 1 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP1_244A ,Color palette 1_244 blend ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP1_244R ,Color palette 1_244 red" hexmask.long.byte 0x3D0 10.--15. 1. " CP1_244G ,Color palette 1_244 green" hexmask.long.byte 0x3D0 2.--7. 1. " CP1_244B ,Color palette 1_244 blue" line.long 0x3D4 "CP1_245R,Color Palette 1 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP1_245A ,Color palette 1_245 blend ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP1_245R ,Color palette 1_245 red" hexmask.long.byte 0x3D4 10.--15. 1. " CP1_245G ,Color palette 1_245 green" hexmask.long.byte 0x3D4 2.--7. 1. " CP1_245B ,Color palette 1_245 blue" line.long 0x3D8 "CP1_246R,Color Palette 1 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP1_246A ,Color palette 1_246 blend ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP1_246R ,Color palette 1_246 red" hexmask.long.byte 0x3D8 10.--15. 1. " CP1_246G ,Color palette 1_246 green" hexmask.long.byte 0x3D8 2.--7. 1. " CP1_246B ,Color palette 1_246 blue" line.long 0x3DC "CP1_247R,Color Palette 1 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP1_247A ,Color palette 1_247 blend ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP1_247R ,Color palette 1_247 red" hexmask.long.byte 0x3DC 10.--15. 1. " CP1_247G ,Color palette 1_247 green" hexmask.long.byte 0x3DC 2.--7. 1. " CP1_247B ,Color palette 1_247 blue" line.long 0x3E0 "CP1_248R,Color Palette 1 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP1_248A ,Color palette 1_248 blend ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP1_248R ,Color palette 1_248 red" hexmask.long.byte 0x3E0 10.--15. 1. " CP1_248G ,Color palette 1_248 green" hexmask.long.byte 0x3E0 2.--7. 1. " CP1_248B ,Color palette 1_248 blue" line.long 0x3E4 "CP1_249R,Color Palette 1 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP1_249A ,Color palette 1_249 blend ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP1_249R ,Color palette 1_249 red" hexmask.long.byte 0x3E4 10.--15. 1. " CP1_249G ,Color palette 1_249 green" hexmask.long.byte 0x3E4 2.--7. 1. " CP1_249B ,Color palette 1_249 blue" line.long 0x3E8 "CP1_250R,Color Palette 1 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP1_250A ,Color palette 1_250 blend ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP1_250R ,Color palette 1_250 red" hexmask.long.byte 0x3E8 10.--15. 1. " CP1_250G ,Color palette 1_250 green" hexmask.long.byte 0x3E8 2.--7. 1. " CP1_250B ,Color palette 1_250 blue" line.long 0x3EC "CP1_251R,Color Palette 1 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP1_251A ,Color palette 1_251 blend ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP1_251R ,Color palette 1_251 red" hexmask.long.byte 0x3EC 10.--15. 1. " CP1_251G ,Color palette 1_251 green" hexmask.long.byte 0x3EC 2.--7. 1. " CP1_251B ,Color palette 1_251 blue" line.long 0x3F0 "CP1_252R,Color Palette 1 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP1_252A ,Color palette 1_252 blend ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP1_252R ,Color palette 1_252 red" hexmask.long.byte 0x3F0 10.--15. 1. " CP1_252G ,Color palette 1_252 green" hexmask.long.byte 0x3F0 2.--7. 1. " CP1_252B ,Color palette 1_252 blue" line.long 0x3F4 "CP1_253R,Color Palette 1 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP1_253A ,Color palette 1_253 blend ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP1_253R ,Color palette 1_253 red" hexmask.long.byte 0x3F4 10.--15. 1. " CP1_253G ,Color palette 1_253 green" hexmask.long.byte 0x3F4 2.--7. 1. " CP1_253B ,Color palette 1_253 blue" line.long 0x3F8 "CP1_254R,Color Palette 1 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP1_254A ,Color palette 1_254 blend ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP1_254R ,Color palette 1_254 red" hexmask.long.byte 0x3F8 10.--15. 1. " CP1_254G ,Color palette 1_254 green" hexmask.long.byte 0x3F8 2.--7. 1. " CP1_254B ,Color palette 1_254 blue" line.long 0x3FC "CP1_255R,Color Palette 1 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP1_255A ,Color palette 1_255 blend ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP1_255R ,Color palette 1_255 red" hexmask.long.byte 0x3FC 10.--15. 1. " CP1_255G ,Color palette 1_255 green" hexmask.long.byte 0x3FC 2.--7. 1. " CP1_255B ,Color palette 1_255 blue" tree.end tree "Color Palette 2 Registers" width 10. group.long 0x2000++0x3ff line.long 0x0 "CP2_0 R,Color Palette 2 Register 0 " hexmask.long.byte 0x0 24.--31. 1. " CP2_0 A ,Color palette 2_0 blend ratio" hexmask.long.byte 0x0 18.--23. 1. " CP2_0 R ,Color palette 2_0 red" hexmask.long.byte 0x0 10.--15. 1. " CP2_0 G ,Color palette 2_0 green" hexmask.long.byte 0x0 2.--7. 1. " CP2_0 B ,Color palette 2_0 blue" line.long 0x4 "CP2_1 R,Color Palette 2 Register 1 " hexmask.long.byte 0x4 24.--31. 1. " CP2_1 A ,Color palette 2_1 blend ratio" hexmask.long.byte 0x4 18.--23. 1. " CP2_1 R ,Color palette 2_1 red" hexmask.long.byte 0x4 10.--15. 1. " CP2_1 G ,Color palette 2_1 green" hexmask.long.byte 0x4 2.--7. 1. " CP2_1 B ,Color palette 2_1 blue" line.long 0x8 "CP2_2 R,Color Palette 2 Register 2 " hexmask.long.byte 0x8 24.--31. 1. " CP2_2 A ,Color palette 2_2 blend ratio" hexmask.long.byte 0x8 18.--23. 1. " CP2_2 R ,Color palette 2_2 red" hexmask.long.byte 0x8 10.--15. 1. " CP2_2 G ,Color palette 2_2 green" hexmask.long.byte 0x8 2.--7. 1. " CP2_2 B ,Color palette 2_2 blue" line.long 0xC "CP2_3 R,Color Palette 2 Register 3 " hexmask.long.byte 0xC 24.--31. 1. " CP2_3 A ,Color palette 2_3 blend ratio" hexmask.long.byte 0xC 18.--23. 1. " CP2_3 R ,Color palette 2_3 red" hexmask.long.byte 0xC 10.--15. 1. " CP2_3 G ,Color palette 2_3 green" hexmask.long.byte 0xC 2.--7. 1. " CP2_3 B ,Color palette 2_3 blue" line.long 0x10 "CP2_4 R,Color Palette 2 Register 4 " hexmask.long.byte 0x10 24.--31. 1. " CP2_4 A ,Color palette 2_4 blend ratio" hexmask.long.byte 0x10 18.--23. 1. " CP2_4 R ,Color palette 2_4 red" hexmask.long.byte 0x10 10.--15. 1. " CP2_4 G ,Color palette 2_4 green" hexmask.long.byte 0x10 2.--7. 1. " CP2_4 B ,Color palette 2_4 blue" line.long 0x14 "CP2_5 R,Color Palette 2 Register 5 " hexmask.long.byte 0x14 24.--31. 1. " CP2_5 A ,Color palette 2_5 blend ratio" hexmask.long.byte 0x14 18.--23. 1. " CP2_5 R ,Color palette 2_5 red" hexmask.long.byte 0x14 10.--15. 1. " CP2_5 G ,Color palette 2_5 green" hexmask.long.byte 0x14 2.--7. 1. " CP2_5 B ,Color palette 2_5 blue" line.long 0x18 "CP2_6 R,Color Palette 2 Register 6 " hexmask.long.byte 0x18 24.--31. 1. " CP2_6 A ,Color palette 2_6 blend ratio" hexmask.long.byte 0x18 18.--23. 1. " CP2_6 R ,Color palette 2_6 red" hexmask.long.byte 0x18 10.--15. 1. " CP2_6 G ,Color palette 2_6 green" hexmask.long.byte 0x18 2.--7. 1. " CP2_6 B ,Color palette 2_6 blue" line.long 0x1C "CP2_7 R,Color Palette 2 Register 7 " hexmask.long.byte 0x1C 24.--31. 1. " CP2_7 A ,Color palette 2_7 blend ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP2_7 R ,Color palette 2_7 red" hexmask.long.byte 0x1C 10.--15. 1. " CP2_7 G ,Color palette 2_7 green" hexmask.long.byte 0x1C 2.--7. 1. " CP2_7 B ,Color palette 2_7 blue" line.long 0x20 "CP2_8 R,Color Palette 2 Register 8 " hexmask.long.byte 0x20 24.--31. 1. " CP2_8 A ,Color palette 2_8 blend ratio" hexmask.long.byte 0x20 18.--23. 1. " CP2_8 R ,Color palette 2_8 red" hexmask.long.byte 0x20 10.--15. 1. " CP2_8 G ,Color palette 2_8 green" hexmask.long.byte 0x20 2.--7. 1. " CP2_8 B ,Color palette 2_8 blue" line.long 0x24 "CP2_9 R,Color Palette 2 Register 9 " hexmask.long.byte 0x24 24.--31. 1. " CP2_9 A ,Color palette 2_9 blend ratio" hexmask.long.byte 0x24 18.--23. 1. " CP2_9 R ,Color palette 2_9 red" hexmask.long.byte 0x24 10.--15. 1. " CP2_9 G ,Color palette 2_9 green" hexmask.long.byte 0x24 2.--7. 1. " CP2_9 B ,Color palette 2_9 blue" line.long 0x28 "CP2_10 R,Color Palette 2 Register 10 " hexmask.long.byte 0x28 24.--31. 1. " CP2_10 A ,Color palette 2_10 blend ratio" hexmask.long.byte 0x28 18.--23. 1. " CP2_10 R ,Color palette 2_10 red" hexmask.long.byte 0x28 10.--15. 1. " CP2_10 G ,Color palette 2_10 green" hexmask.long.byte 0x28 2.--7. 1. " CP2_10 B ,Color palette 2_10 blue" line.long 0x2C "CP2_11 R,Color Palette 2 Register 11 " hexmask.long.byte 0x2C 24.--31. 1. " CP2_11 A ,Color palette 2_11 blend ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP2_11 R ,Color palette 2_11 red" hexmask.long.byte 0x2C 10.--15. 1. " CP2_11 G ,Color palette 2_11 green" hexmask.long.byte 0x2C 2.--7. 1. " CP2_11 B ,Color palette 2_11 blue" line.long 0x30 "CP2_12 R,Color Palette 2 Register 12 " hexmask.long.byte 0x30 24.--31. 1. " CP2_12 A ,Color palette 2_12 blend ratio" hexmask.long.byte 0x30 18.--23. 1. " CP2_12 R ,Color palette 2_12 red" hexmask.long.byte 0x30 10.--15. 1. " CP2_12 G ,Color palette 2_12 green" hexmask.long.byte 0x30 2.--7. 1. " CP2_12 B ,Color palette 2_12 blue" line.long 0x34 "CP2_13 R,Color Palette 2 Register 13 " hexmask.long.byte 0x34 24.--31. 1. " CP2_13 A ,Color palette 2_13 blend ratio" hexmask.long.byte 0x34 18.--23. 1. " CP2_13 R ,Color palette 2_13 red" hexmask.long.byte 0x34 10.--15. 1. " CP2_13 G ,Color palette 2_13 green" hexmask.long.byte 0x34 2.--7. 1. " CP2_13 B ,Color palette 2_13 blue" line.long 0x38 "CP2_14 R,Color Palette 2 Register 14 " hexmask.long.byte 0x38 24.--31. 1. " CP2_14 A ,Color palette 2_14 blend ratio" hexmask.long.byte 0x38 18.--23. 1. " CP2_14 R ,Color palette 2_14 red" hexmask.long.byte 0x38 10.--15. 1. " CP2_14 G ,Color palette 2_14 green" hexmask.long.byte 0x38 2.--7. 1. " CP2_14 B ,Color palette 2_14 blue" line.long 0x3C "CP2_15 R,Color Palette 2 Register 15 " hexmask.long.byte 0x3C 24.--31. 1. " CP2_15 A ,Color palette 2_15 blend ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP2_15 R ,Color palette 2_15 red" hexmask.long.byte 0x3C 10.--15. 1. " CP2_15 G ,Color palette 2_15 green" hexmask.long.byte 0x3C 2.--7. 1. " CP2_15 B ,Color palette 2_15 blue" line.long 0x40 "CP2_16 R,Color Palette 2 Register 16 " hexmask.long.byte 0x40 24.--31. 1. " CP2_16 A ,Color palette 2_16 blend ratio" hexmask.long.byte 0x40 18.--23. 1. " CP2_16 R ,Color palette 2_16 red" hexmask.long.byte 0x40 10.--15. 1. " CP2_16 G ,Color palette 2_16 green" hexmask.long.byte 0x40 2.--7. 1. " CP2_16 B ,Color palette 2_16 blue" line.long 0x44 "CP2_17 R,Color Palette 2 Register 17 " hexmask.long.byte 0x44 24.--31. 1. " CP2_17 A ,Color palette 2_17 blend ratio" hexmask.long.byte 0x44 18.--23. 1. " CP2_17 R ,Color palette 2_17 red" hexmask.long.byte 0x44 10.--15. 1. " CP2_17 G ,Color palette 2_17 green" hexmask.long.byte 0x44 2.--7. 1. " CP2_17 B ,Color palette 2_17 blue" line.long 0x48 "CP2_18 R,Color Palette 2 Register 18 " hexmask.long.byte 0x48 24.--31. 1. " CP2_18 A ,Color palette 2_18 blend ratio" hexmask.long.byte 0x48 18.--23. 1. " CP2_18 R ,Color palette 2_18 red" hexmask.long.byte 0x48 10.--15. 1. " CP2_18 G ,Color palette 2_18 green" hexmask.long.byte 0x48 2.--7. 1. " CP2_18 B ,Color palette 2_18 blue" line.long 0x4C "CP2_19 R,Color Palette 2 Register 19 " hexmask.long.byte 0x4C 24.--31. 1. " CP2_19 A ,Color palette 2_19 blend ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP2_19 R ,Color palette 2_19 red" hexmask.long.byte 0x4C 10.--15. 1. " CP2_19 G ,Color palette 2_19 green" hexmask.long.byte 0x4C 2.--7. 1. " CP2_19 B ,Color palette 2_19 blue" line.long 0x50 "CP2_20 R,Color Palette 2 Register 20 " hexmask.long.byte 0x50 24.--31. 1. " CP2_20 A ,Color palette 2_20 blend ratio" hexmask.long.byte 0x50 18.--23. 1. " CP2_20 R ,Color palette 2_20 red" hexmask.long.byte 0x50 10.--15. 1. " CP2_20 G ,Color palette 2_20 green" hexmask.long.byte 0x50 2.--7. 1. " CP2_20 B ,Color palette 2_20 blue" line.long 0x54 "CP2_21 R,Color Palette 2 Register 21 " hexmask.long.byte 0x54 24.--31. 1. " CP2_21 A ,Color palette 2_21 blend ratio" hexmask.long.byte 0x54 18.--23. 1. " CP2_21 R ,Color palette 2_21 red" hexmask.long.byte 0x54 10.--15. 1. " CP2_21 G ,Color palette 2_21 green" hexmask.long.byte 0x54 2.--7. 1. " CP2_21 B ,Color palette 2_21 blue" line.long 0x58 "CP2_22 R,Color Palette 2 Register 22 " hexmask.long.byte 0x58 24.--31. 1. " CP2_22 A ,Color palette 2_22 blend ratio" hexmask.long.byte 0x58 18.--23. 1. " CP2_22 R ,Color palette 2_22 red" hexmask.long.byte 0x58 10.--15. 1. " CP2_22 G ,Color palette 2_22 green" hexmask.long.byte 0x58 2.--7. 1. " CP2_22 B ,Color palette 2_22 blue" line.long 0x5C "CP2_23 R,Color Palette 2 Register 23 " hexmask.long.byte 0x5C 24.--31. 1. " CP2_23 A ,Color palette 2_23 blend ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP2_23 R ,Color palette 2_23 red" hexmask.long.byte 0x5C 10.--15. 1. " CP2_23 G ,Color palette 2_23 green" hexmask.long.byte 0x5C 2.--7. 1. " CP2_23 B ,Color palette 2_23 blue" line.long 0x60 "CP2_24 R,Color Palette 2 Register 24 " hexmask.long.byte 0x60 24.--31. 1. " CP2_24 A ,Color palette 2_24 blend ratio" hexmask.long.byte 0x60 18.--23. 1. " CP2_24 R ,Color palette 2_24 red" hexmask.long.byte 0x60 10.--15. 1. " CP2_24 G ,Color palette 2_24 green" hexmask.long.byte 0x60 2.--7. 1. " CP2_24 B ,Color palette 2_24 blue" line.long 0x64 "CP2_25 R,Color Palette 2 Register 25 " hexmask.long.byte 0x64 24.--31. 1. " CP2_25 A ,Color palette 2_25 blend ratio" hexmask.long.byte 0x64 18.--23. 1. " CP2_25 R ,Color palette 2_25 red" hexmask.long.byte 0x64 10.--15. 1. " CP2_25 G ,Color palette 2_25 green" hexmask.long.byte 0x64 2.--7. 1. " CP2_25 B ,Color palette 2_25 blue" line.long 0x68 "CP2_26 R,Color Palette 2 Register 26 " hexmask.long.byte 0x68 24.--31. 1. " CP2_26 A ,Color palette 2_26 blend ratio" hexmask.long.byte 0x68 18.--23. 1. " CP2_26 R ,Color palette 2_26 red" hexmask.long.byte 0x68 10.--15. 1. " CP2_26 G ,Color palette 2_26 green" hexmask.long.byte 0x68 2.--7. 1. " CP2_26 B ,Color palette 2_26 blue" line.long 0x6C "CP2_27 R,Color Palette 2 Register 27 " hexmask.long.byte 0x6C 24.--31. 1. " CP2_27 A ,Color palette 2_27 blend ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP2_27 R ,Color palette 2_27 red" hexmask.long.byte 0x6C 10.--15. 1. " CP2_27 G ,Color palette 2_27 green" hexmask.long.byte 0x6C 2.--7. 1. " CP2_27 B ,Color palette 2_27 blue" line.long 0x70 "CP2_28 R,Color Palette 2 Register 28 " hexmask.long.byte 0x70 24.--31. 1. " CP2_28 A ,Color palette 2_28 blend ratio" hexmask.long.byte 0x70 18.--23. 1. " CP2_28 R ,Color palette 2_28 red" hexmask.long.byte 0x70 10.--15. 1. " CP2_28 G ,Color palette 2_28 green" hexmask.long.byte 0x70 2.--7. 1. " CP2_28 B ,Color palette 2_28 blue" line.long 0x74 "CP2_29 R,Color Palette 2 Register 29 " hexmask.long.byte 0x74 24.--31. 1. " CP2_29 A ,Color palette 2_29 blend ratio" hexmask.long.byte 0x74 18.--23. 1. " CP2_29 R ,Color palette 2_29 red" hexmask.long.byte 0x74 10.--15. 1. " CP2_29 G ,Color palette 2_29 green" hexmask.long.byte 0x74 2.--7. 1. " CP2_29 B ,Color palette 2_29 blue" line.long 0x78 "CP2_30 R,Color Palette 2 Register 30 " hexmask.long.byte 0x78 24.--31. 1. " CP2_30 A ,Color palette 2_30 blend ratio" hexmask.long.byte 0x78 18.--23. 1. " CP2_30 R ,Color palette 2_30 red" hexmask.long.byte 0x78 10.--15. 1. " CP2_30 G ,Color palette 2_30 green" hexmask.long.byte 0x78 2.--7. 1. " CP2_30 B ,Color palette 2_30 blue" line.long 0x7C "CP2_31 R,Color Palette 2 Register 31 " hexmask.long.byte 0x7C 24.--31. 1. " CP2_31 A ,Color palette 2_31 blend ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP2_31 R ,Color palette 2_31 red" hexmask.long.byte 0x7C 10.--15. 1. " CP2_31 G ,Color palette 2_31 green" hexmask.long.byte 0x7C 2.--7. 1. " CP2_31 B ,Color palette 2_31 blue" line.long 0x80 "CP2_32 R,Color Palette 2 Register 32 " hexmask.long.byte 0x80 24.--31. 1. " CP2_32 A ,Color palette 2_32 blend ratio" hexmask.long.byte 0x80 18.--23. 1. " CP2_32 R ,Color palette 2_32 red" hexmask.long.byte 0x80 10.--15. 1. " CP2_32 G ,Color palette 2_32 green" hexmask.long.byte 0x80 2.--7. 1. " CP2_32 B ,Color palette 2_32 blue" line.long 0x84 "CP2_33 R,Color Palette 2 Register 33 " hexmask.long.byte 0x84 24.--31. 1. " CP2_33 A ,Color palette 2_33 blend ratio" hexmask.long.byte 0x84 18.--23. 1. " CP2_33 R ,Color palette 2_33 red" hexmask.long.byte 0x84 10.--15. 1. " CP2_33 G ,Color palette 2_33 green" hexmask.long.byte 0x84 2.--7. 1. " CP2_33 B ,Color palette 2_33 blue" line.long 0x88 "CP2_34 R,Color Palette 2 Register 34 " hexmask.long.byte 0x88 24.--31. 1. " CP2_34 A ,Color palette 2_34 blend ratio" hexmask.long.byte 0x88 18.--23. 1. " CP2_34 R ,Color palette 2_34 red" hexmask.long.byte 0x88 10.--15. 1. " CP2_34 G ,Color palette 2_34 green" hexmask.long.byte 0x88 2.--7. 1. " CP2_34 B ,Color palette 2_34 blue" line.long 0x8C "CP2_35 R,Color Palette 2 Register 35 " hexmask.long.byte 0x8C 24.--31. 1. " CP2_35 A ,Color palette 2_35 blend ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP2_35 R ,Color palette 2_35 red" hexmask.long.byte 0x8C 10.--15. 1. " CP2_35 G ,Color palette 2_35 green" hexmask.long.byte 0x8C 2.--7. 1. " CP2_35 B ,Color palette 2_35 blue" line.long 0x90 "CP2_36 R,Color Palette 2 Register 36 " hexmask.long.byte 0x90 24.--31. 1. " CP2_36 A ,Color palette 2_36 blend ratio" hexmask.long.byte 0x90 18.--23. 1. " CP2_36 R ,Color palette 2_36 red" hexmask.long.byte 0x90 10.--15. 1. " CP2_36 G ,Color palette 2_36 green" hexmask.long.byte 0x90 2.--7. 1. " CP2_36 B ,Color palette 2_36 blue" line.long 0x94 "CP2_37 R,Color Palette 2 Register 37 " hexmask.long.byte 0x94 24.--31. 1. " CP2_37 A ,Color palette 2_37 blend ratio" hexmask.long.byte 0x94 18.--23. 1. " CP2_37 R ,Color palette 2_37 red" hexmask.long.byte 0x94 10.--15. 1. " CP2_37 G ,Color palette 2_37 green" hexmask.long.byte 0x94 2.--7. 1. " CP2_37 B ,Color palette 2_37 blue" line.long 0x98 "CP2_38 R,Color Palette 2 Register 38 " hexmask.long.byte 0x98 24.--31. 1. " CP2_38 A ,Color palette 2_38 blend ratio" hexmask.long.byte 0x98 18.--23. 1. " CP2_38 R ,Color palette 2_38 red" hexmask.long.byte 0x98 10.--15. 1. " CP2_38 G ,Color palette 2_38 green" hexmask.long.byte 0x98 2.--7. 1. " CP2_38 B ,Color palette 2_38 blue" line.long 0x9C "CP2_39 R,Color Palette 2 Register 39 " hexmask.long.byte 0x9C 24.--31. 1. " CP2_39 A ,Color palette 2_39 blend ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP2_39 R ,Color palette 2_39 red" hexmask.long.byte 0x9C 10.--15. 1. " CP2_39 G ,Color palette 2_39 green" hexmask.long.byte 0x9C 2.--7. 1. " CP2_39 B ,Color palette 2_39 blue" line.long 0xA0 "CP2_40 R,Color Palette 2 Register 40 " hexmask.long.byte 0xA0 24.--31. 1. " CP2_40 A ,Color palette 2_40 blend ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP2_40 R ,Color palette 2_40 red" hexmask.long.byte 0xA0 10.--15. 1. " CP2_40 G ,Color palette 2_40 green" hexmask.long.byte 0xA0 2.--7. 1. " CP2_40 B ,Color palette 2_40 blue" line.long 0xA4 "CP2_41 R,Color Palette 2 Register 41 " hexmask.long.byte 0xA4 24.--31. 1. " CP2_41 A ,Color palette 2_41 blend ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP2_41 R ,Color palette 2_41 red" hexmask.long.byte 0xA4 10.--15. 1. " CP2_41 G ,Color palette 2_41 green" hexmask.long.byte 0xA4 2.--7. 1. " CP2_41 B ,Color palette 2_41 blue" line.long 0xA8 "CP2_42 R,Color Palette 2 Register 42 " hexmask.long.byte 0xA8 24.--31. 1. " CP2_42 A ,Color palette 2_42 blend ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP2_42 R ,Color palette 2_42 red" hexmask.long.byte 0xA8 10.--15. 1. " CP2_42 G ,Color palette 2_42 green" hexmask.long.byte 0xA8 2.--7. 1. " CP2_42 B ,Color palette 2_42 blue" line.long 0xAC "CP2_43 R,Color Palette 2 Register 43 " hexmask.long.byte 0xAC 24.--31. 1. " CP2_43 A ,Color palette 2_43 blend ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP2_43 R ,Color palette 2_43 red" hexmask.long.byte 0xAC 10.--15. 1. " CP2_43 G ,Color palette 2_43 green" hexmask.long.byte 0xAC 2.--7. 1. " CP2_43 B ,Color palette 2_43 blue" line.long 0xB0 "CP2_44 R,Color Palette 2 Register 44 " hexmask.long.byte 0xB0 24.--31. 1. " CP2_44 A ,Color palette 2_44 blend ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP2_44 R ,Color palette 2_44 red" hexmask.long.byte 0xB0 10.--15. 1. " CP2_44 G ,Color palette 2_44 green" hexmask.long.byte 0xB0 2.--7. 1. " CP2_44 B ,Color palette 2_44 blue" line.long 0xB4 "CP2_45 R,Color Palette 2 Register 45 " hexmask.long.byte 0xB4 24.--31. 1. " CP2_45 A ,Color palette 2_45 blend ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP2_45 R ,Color palette 2_45 red" hexmask.long.byte 0xB4 10.--15. 1. " CP2_45 G ,Color palette 2_45 green" hexmask.long.byte 0xB4 2.--7. 1. " CP2_45 B ,Color palette 2_45 blue" line.long 0xB8 "CP2_46 R,Color Palette 2 Register 46 " hexmask.long.byte 0xB8 24.--31. 1. " CP2_46 A ,Color palette 2_46 blend ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP2_46 R ,Color palette 2_46 red" hexmask.long.byte 0xB8 10.--15. 1. " CP2_46 G ,Color palette 2_46 green" hexmask.long.byte 0xB8 2.--7. 1. " CP2_46 B ,Color palette 2_46 blue" line.long 0xBC "CP2_47 R,Color Palette 2 Register 47 " hexmask.long.byte 0xBC 24.--31. 1. " CP2_47 A ,Color palette 2_47 blend ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP2_47 R ,Color palette 2_47 red" hexmask.long.byte 0xBC 10.--15. 1. " CP2_47 G ,Color palette 2_47 green" hexmask.long.byte 0xBC 2.--7. 1. " CP2_47 B ,Color palette 2_47 blue" line.long 0xC0 "CP2_48 R,Color Palette 2 Register 48 " hexmask.long.byte 0xC0 24.--31. 1. " CP2_48 A ,Color palette 2_48 blend ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP2_48 R ,Color palette 2_48 red" hexmask.long.byte 0xC0 10.--15. 1. " CP2_48 G ,Color palette 2_48 green" hexmask.long.byte 0xC0 2.--7. 1. " CP2_48 B ,Color palette 2_48 blue" line.long 0xC4 "CP2_49 R,Color Palette 2 Register 49 " hexmask.long.byte 0xC4 24.--31. 1. " CP2_49 A ,Color palette 2_49 blend ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP2_49 R ,Color palette 2_49 red" hexmask.long.byte 0xC4 10.--15. 1. " CP2_49 G ,Color palette 2_49 green" hexmask.long.byte 0xC4 2.--7. 1. " CP2_49 B ,Color palette 2_49 blue" line.long 0xC8 "CP2_50 R,Color Palette 2 Register 50 " hexmask.long.byte 0xC8 24.--31. 1. " CP2_50 A ,Color palette 2_50 blend ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP2_50 R ,Color palette 2_50 red" hexmask.long.byte 0xC8 10.--15. 1. " CP2_50 G ,Color palette 2_50 green" hexmask.long.byte 0xC8 2.--7. 1. " CP2_50 B ,Color palette 2_50 blue" line.long 0xCC "CP2_51 R,Color Palette 2 Register 51 " hexmask.long.byte 0xCC 24.--31. 1. " CP2_51 A ,Color palette 2_51 blend ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP2_51 R ,Color palette 2_51 red" hexmask.long.byte 0xCC 10.--15. 1. " CP2_51 G ,Color palette 2_51 green" hexmask.long.byte 0xCC 2.--7. 1. " CP2_51 B ,Color palette 2_51 blue" line.long 0xD0 "CP2_52 R,Color Palette 2 Register 52 " hexmask.long.byte 0xD0 24.--31. 1. " CP2_52 A ,Color palette 2_52 blend ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP2_52 R ,Color palette 2_52 red" hexmask.long.byte 0xD0 10.--15. 1. " CP2_52 G ,Color palette 2_52 green" hexmask.long.byte 0xD0 2.--7. 1. " CP2_52 B ,Color palette 2_52 blue" line.long 0xD4 "CP2_53 R,Color Palette 2 Register 53 " hexmask.long.byte 0xD4 24.--31. 1. " CP2_53 A ,Color palette 2_53 blend ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP2_53 R ,Color palette 2_53 red" hexmask.long.byte 0xD4 10.--15. 1. " CP2_53 G ,Color palette 2_53 green" hexmask.long.byte 0xD4 2.--7. 1. " CP2_53 B ,Color palette 2_53 blue" line.long 0xD8 "CP2_54 R,Color Palette 2 Register 54 " hexmask.long.byte 0xD8 24.--31. 1. " CP2_54 A ,Color palette 2_54 blend ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP2_54 R ,Color palette 2_54 red" hexmask.long.byte 0xD8 10.--15. 1. " CP2_54 G ,Color palette 2_54 green" hexmask.long.byte 0xD8 2.--7. 1. " CP2_54 B ,Color palette 2_54 blue" line.long 0xDC "CP2_55 R,Color Palette 2 Register 55 " hexmask.long.byte 0xDC 24.--31. 1. " CP2_55 A ,Color palette 2_55 blend ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP2_55 R ,Color palette 2_55 red" hexmask.long.byte 0xDC 10.--15. 1. " CP2_55 G ,Color palette 2_55 green" hexmask.long.byte 0xDC 2.--7. 1. " CP2_55 B ,Color palette 2_55 blue" line.long 0xE0 "CP2_56 R,Color Palette 2 Register 56 " hexmask.long.byte 0xE0 24.--31. 1. " CP2_56 A ,Color palette 2_56 blend ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP2_56 R ,Color palette 2_56 red" hexmask.long.byte 0xE0 10.--15. 1. " CP2_56 G ,Color palette 2_56 green" hexmask.long.byte 0xE0 2.--7. 1. " CP2_56 B ,Color palette 2_56 blue" line.long 0xE4 "CP2_57 R,Color Palette 2 Register 57 " hexmask.long.byte 0xE4 24.--31. 1. " CP2_57 A ,Color palette 2_57 blend ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP2_57 R ,Color palette 2_57 red" hexmask.long.byte 0xE4 10.--15. 1. " CP2_57 G ,Color palette 2_57 green" hexmask.long.byte 0xE4 2.--7. 1. " CP2_57 B ,Color palette 2_57 blue" line.long 0xE8 "CP2_58 R,Color Palette 2 Register 58 " hexmask.long.byte 0xE8 24.--31. 1. " CP2_58 A ,Color palette 2_58 blend ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP2_58 R ,Color palette 2_58 red" hexmask.long.byte 0xE8 10.--15. 1. " CP2_58 G ,Color palette 2_58 green" hexmask.long.byte 0xE8 2.--7. 1. " CP2_58 B ,Color palette 2_58 blue" line.long 0xEC "CP2_59 R,Color Palette 2 Register 59 " hexmask.long.byte 0xEC 24.--31. 1. " CP2_59 A ,Color palette 2_59 blend ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP2_59 R ,Color palette 2_59 red" hexmask.long.byte 0xEC 10.--15. 1. " CP2_59 G ,Color palette 2_59 green" hexmask.long.byte 0xEC 2.--7. 1. " CP2_59 B ,Color palette 2_59 blue" line.long 0xF0 "CP2_60 R,Color Palette 2 Register 60 " hexmask.long.byte 0xF0 24.--31. 1. " CP2_60 A ,Color palette 2_60 blend ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP2_60 R ,Color palette 2_60 red" hexmask.long.byte 0xF0 10.--15. 1. " CP2_60 G ,Color palette 2_60 green" hexmask.long.byte 0xF0 2.--7. 1. " CP2_60 B ,Color palette 2_60 blue" line.long 0xF4 "CP2_61 R,Color Palette 2 Register 61 " hexmask.long.byte 0xF4 24.--31. 1. " CP2_61 A ,Color palette 2_61 blend ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP2_61 R ,Color palette 2_61 red" hexmask.long.byte 0xF4 10.--15. 1. " CP2_61 G ,Color palette 2_61 green" hexmask.long.byte 0xF4 2.--7. 1. " CP2_61 B ,Color palette 2_61 blue" line.long 0xF8 "CP2_62 R,Color Palette 2 Register 62 " hexmask.long.byte 0xF8 24.--31. 1. " CP2_62 A ,Color palette 2_62 blend ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP2_62 R ,Color palette 2_62 red" hexmask.long.byte 0xF8 10.--15. 1. " CP2_62 G ,Color palette 2_62 green" hexmask.long.byte 0xF8 2.--7. 1. " CP2_62 B ,Color palette 2_62 blue" line.long 0xFC "CP2_63 R,Color Palette 2 Register 63 " hexmask.long.byte 0xFC 24.--31. 1. " CP2_63 A ,Color palette 2_63 blend ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP2_63 R ,Color palette 2_63 red" hexmask.long.byte 0xFC 10.--15. 1. " CP2_63 G ,Color palette 2_63 green" hexmask.long.byte 0xFC 2.--7. 1. " CP2_63 B ,Color palette 2_63 blue" line.long 0x100 "CP2_64 R,Color Palette 2 Register 64 " hexmask.long.byte 0x100 24.--31. 1. " CP2_64 A ,Color palette 2_64 blend ratio" hexmask.long.byte 0x100 18.--23. 1. " CP2_64 R ,Color palette 2_64 red" hexmask.long.byte 0x100 10.--15. 1. " CP2_64 G ,Color palette 2_64 green" hexmask.long.byte 0x100 2.--7. 1. " CP2_64 B ,Color palette 2_64 blue" line.long 0x104 "CP2_65 R,Color Palette 2 Register 65 " hexmask.long.byte 0x104 24.--31. 1. " CP2_65 A ,Color palette 2_65 blend ratio" hexmask.long.byte 0x104 18.--23. 1. " CP2_65 R ,Color palette 2_65 red" hexmask.long.byte 0x104 10.--15. 1. " CP2_65 G ,Color palette 2_65 green" hexmask.long.byte 0x104 2.--7. 1. " CP2_65 B ,Color palette 2_65 blue" line.long 0x108 "CP2_66 R,Color Palette 2 Register 66 " hexmask.long.byte 0x108 24.--31. 1. " CP2_66 A ,Color palette 2_66 blend ratio" hexmask.long.byte 0x108 18.--23. 1. " CP2_66 R ,Color palette 2_66 red" hexmask.long.byte 0x108 10.--15. 1. " CP2_66 G ,Color palette 2_66 green" hexmask.long.byte 0x108 2.--7. 1. " CP2_66 B ,Color palette 2_66 blue" line.long 0x10C "CP2_67 R,Color Palette 2 Register 67 " hexmask.long.byte 0x10C 24.--31. 1. " CP2_67 A ,Color palette 2_67 blend ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP2_67 R ,Color palette 2_67 red" hexmask.long.byte 0x10C 10.--15. 1. " CP2_67 G ,Color palette 2_67 green" hexmask.long.byte 0x10C 2.--7. 1. " CP2_67 B ,Color palette 2_67 blue" line.long 0x110 "CP2_68 R,Color Palette 2 Register 68 " hexmask.long.byte 0x110 24.--31. 1. " CP2_68 A ,Color palette 2_68 blend ratio" hexmask.long.byte 0x110 18.--23. 1. " CP2_68 R ,Color palette 2_68 red" hexmask.long.byte 0x110 10.--15. 1. " CP2_68 G ,Color palette 2_68 green" hexmask.long.byte 0x110 2.--7. 1. " CP2_68 B ,Color palette 2_68 blue" line.long 0x114 "CP2_69 R,Color Palette 2 Register 69 " hexmask.long.byte 0x114 24.--31. 1. " CP2_69 A ,Color palette 2_69 blend ratio" hexmask.long.byte 0x114 18.--23. 1. " CP2_69 R ,Color palette 2_69 red" hexmask.long.byte 0x114 10.--15. 1. " CP2_69 G ,Color palette 2_69 green" hexmask.long.byte 0x114 2.--7. 1. " CP2_69 B ,Color palette 2_69 blue" line.long 0x118 "CP2_70 R,Color Palette 2 Register 70 " hexmask.long.byte 0x118 24.--31. 1. " CP2_70 A ,Color palette 2_70 blend ratio" hexmask.long.byte 0x118 18.--23. 1. " CP2_70 R ,Color palette 2_70 red" hexmask.long.byte 0x118 10.--15. 1. " CP2_70 G ,Color palette 2_70 green" hexmask.long.byte 0x118 2.--7. 1. " CP2_70 B ,Color palette 2_70 blue" line.long 0x11C "CP2_71 R,Color Palette 2 Register 71 " hexmask.long.byte 0x11C 24.--31. 1. " CP2_71 A ,Color palette 2_71 blend ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP2_71 R ,Color palette 2_71 red" hexmask.long.byte 0x11C 10.--15. 1. " CP2_71 G ,Color palette 2_71 green" hexmask.long.byte 0x11C 2.--7. 1. " CP2_71 B ,Color palette 2_71 blue" line.long 0x120 "CP2_72 R,Color Palette 2 Register 72 " hexmask.long.byte 0x120 24.--31. 1. " CP2_72 A ,Color palette 2_72 blend ratio" hexmask.long.byte 0x120 18.--23. 1. " CP2_72 R ,Color palette 2_72 red" hexmask.long.byte 0x120 10.--15. 1. " CP2_72 G ,Color palette 2_72 green" hexmask.long.byte 0x120 2.--7. 1. " CP2_72 B ,Color palette 2_72 blue" line.long 0x124 "CP2_73 R,Color Palette 2 Register 73 " hexmask.long.byte 0x124 24.--31. 1. " CP2_73 A ,Color palette 2_73 blend ratio" hexmask.long.byte 0x124 18.--23. 1. " CP2_73 R ,Color palette 2_73 red" hexmask.long.byte 0x124 10.--15. 1. " CP2_73 G ,Color palette 2_73 green" hexmask.long.byte 0x124 2.--7. 1. " CP2_73 B ,Color palette 2_73 blue" line.long 0x128 "CP2_74 R,Color Palette 2 Register 74 " hexmask.long.byte 0x128 24.--31. 1. " CP2_74 A ,Color palette 2_74 blend ratio" hexmask.long.byte 0x128 18.--23. 1. " CP2_74 R ,Color palette 2_74 red" hexmask.long.byte 0x128 10.--15. 1. " CP2_74 G ,Color palette 2_74 green" hexmask.long.byte 0x128 2.--7. 1. " CP2_74 B ,Color palette 2_74 blue" line.long 0x12C "CP2_75 R,Color Palette 2 Register 75 " hexmask.long.byte 0x12C 24.--31. 1. " CP2_75 A ,Color palette 2_75 blend ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP2_75 R ,Color palette 2_75 red" hexmask.long.byte 0x12C 10.--15. 1. " CP2_75 G ,Color palette 2_75 green" hexmask.long.byte 0x12C 2.--7. 1. " CP2_75 B ,Color palette 2_75 blue" line.long 0x130 "CP2_76 R,Color Palette 2 Register 76 " hexmask.long.byte 0x130 24.--31. 1. " CP2_76 A ,Color palette 2_76 blend ratio" hexmask.long.byte 0x130 18.--23. 1. " CP2_76 R ,Color palette 2_76 red" hexmask.long.byte 0x130 10.--15. 1. " CP2_76 G ,Color palette 2_76 green" hexmask.long.byte 0x130 2.--7. 1. " CP2_76 B ,Color palette 2_76 blue" line.long 0x134 "CP2_77 R,Color Palette 2 Register 77 " hexmask.long.byte 0x134 24.--31. 1. " CP2_77 A ,Color palette 2_77 blend ratio" hexmask.long.byte 0x134 18.--23. 1. " CP2_77 R ,Color palette 2_77 red" hexmask.long.byte 0x134 10.--15. 1. " CP2_77 G ,Color palette 2_77 green" hexmask.long.byte 0x134 2.--7. 1. " CP2_77 B ,Color palette 2_77 blue" line.long 0x138 "CP2_78 R,Color Palette 2 Register 78 " hexmask.long.byte 0x138 24.--31. 1. " CP2_78 A ,Color palette 2_78 blend ratio" hexmask.long.byte 0x138 18.--23. 1. " CP2_78 R ,Color palette 2_78 red" hexmask.long.byte 0x138 10.--15. 1. " CP2_78 G ,Color palette 2_78 green" hexmask.long.byte 0x138 2.--7. 1. " CP2_78 B ,Color palette 2_78 blue" line.long 0x13C "CP2_79 R,Color Palette 2 Register 79 " hexmask.long.byte 0x13C 24.--31. 1. " CP2_79 A ,Color palette 2_79 blend ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP2_79 R ,Color palette 2_79 red" hexmask.long.byte 0x13C 10.--15. 1. " CP2_79 G ,Color palette 2_79 green" hexmask.long.byte 0x13C 2.--7. 1. " CP2_79 B ,Color palette 2_79 blue" line.long 0x140 "CP2_80 R,Color Palette 2 Register 80 " hexmask.long.byte 0x140 24.--31. 1. " CP2_80 A ,Color palette 2_80 blend ratio" hexmask.long.byte 0x140 18.--23. 1. " CP2_80 R ,Color palette 2_80 red" hexmask.long.byte 0x140 10.--15. 1. " CP2_80 G ,Color palette 2_80 green" hexmask.long.byte 0x140 2.--7. 1. " CP2_80 B ,Color palette 2_80 blue" line.long 0x144 "CP2_81 R,Color Palette 2 Register 81 " hexmask.long.byte 0x144 24.--31. 1. " CP2_81 A ,Color palette 2_81 blend ratio" hexmask.long.byte 0x144 18.--23. 1. " CP2_81 R ,Color palette 2_81 red" hexmask.long.byte 0x144 10.--15. 1. " CP2_81 G ,Color palette 2_81 green" hexmask.long.byte 0x144 2.--7. 1. " CP2_81 B ,Color palette 2_81 blue" line.long 0x148 "CP2_82 R,Color Palette 2 Register 82 " hexmask.long.byte 0x148 24.--31. 1. " CP2_82 A ,Color palette 2_82 blend ratio" hexmask.long.byte 0x148 18.--23. 1. " CP2_82 R ,Color palette 2_82 red" hexmask.long.byte 0x148 10.--15. 1. " CP2_82 G ,Color palette 2_82 green" hexmask.long.byte 0x148 2.--7. 1. " CP2_82 B ,Color palette 2_82 blue" line.long 0x14C "CP2_83 R,Color Palette 2 Register 83 " hexmask.long.byte 0x14C 24.--31. 1. " CP2_83 A ,Color palette 2_83 blend ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP2_83 R ,Color palette 2_83 red" hexmask.long.byte 0x14C 10.--15. 1. " CP2_83 G ,Color palette 2_83 green" hexmask.long.byte 0x14C 2.--7. 1. " CP2_83 B ,Color palette 2_83 blue" line.long 0x150 "CP2_84 R,Color Palette 2 Register 84 " hexmask.long.byte 0x150 24.--31. 1. " CP2_84 A ,Color palette 2_84 blend ratio" hexmask.long.byte 0x150 18.--23. 1. " CP2_84 R ,Color palette 2_84 red" hexmask.long.byte 0x150 10.--15. 1. " CP2_84 G ,Color palette 2_84 green" hexmask.long.byte 0x150 2.--7. 1. " CP2_84 B ,Color palette 2_84 blue" line.long 0x154 "CP2_85 R,Color Palette 2 Register 85 " hexmask.long.byte 0x154 24.--31. 1. " CP2_85 A ,Color palette 2_85 blend ratio" hexmask.long.byte 0x154 18.--23. 1. " CP2_85 R ,Color palette 2_85 red" hexmask.long.byte 0x154 10.--15. 1. " CP2_85 G ,Color palette 2_85 green" hexmask.long.byte 0x154 2.--7. 1. " CP2_85 B ,Color palette 2_85 blue" line.long 0x158 "CP2_86 R,Color Palette 2 Register 86 " hexmask.long.byte 0x158 24.--31. 1. " CP2_86 A ,Color palette 2_86 blend ratio" hexmask.long.byte 0x158 18.--23. 1. " CP2_86 R ,Color palette 2_86 red" hexmask.long.byte 0x158 10.--15. 1. " CP2_86 G ,Color palette 2_86 green" hexmask.long.byte 0x158 2.--7. 1. " CP2_86 B ,Color palette 2_86 blue" line.long 0x15C "CP2_87 R,Color Palette 2 Register 87 " hexmask.long.byte 0x15C 24.--31. 1. " CP2_87 A ,Color palette 2_87 blend ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP2_87 R ,Color palette 2_87 red" hexmask.long.byte 0x15C 10.--15. 1. " CP2_87 G ,Color palette 2_87 green" hexmask.long.byte 0x15C 2.--7. 1. " CP2_87 B ,Color palette 2_87 blue" line.long 0x160 "CP2_88 R,Color Palette 2 Register 88 " hexmask.long.byte 0x160 24.--31. 1. " CP2_88 A ,Color palette 2_88 blend ratio" hexmask.long.byte 0x160 18.--23. 1. " CP2_88 R ,Color palette 2_88 red" hexmask.long.byte 0x160 10.--15. 1. " CP2_88 G ,Color palette 2_88 green" hexmask.long.byte 0x160 2.--7. 1. " CP2_88 B ,Color palette 2_88 blue" line.long 0x164 "CP2_89 R,Color Palette 2 Register 89 " hexmask.long.byte 0x164 24.--31. 1. " CP2_89 A ,Color palette 2_89 blend ratio" hexmask.long.byte 0x164 18.--23. 1. " CP2_89 R ,Color palette 2_89 red" hexmask.long.byte 0x164 10.--15. 1. " CP2_89 G ,Color palette 2_89 green" hexmask.long.byte 0x164 2.--7. 1. " CP2_89 B ,Color palette 2_89 blue" line.long 0x168 "CP2_90 R,Color Palette 2 Register 90 " hexmask.long.byte 0x168 24.--31. 1. " CP2_90 A ,Color palette 2_90 blend ratio" hexmask.long.byte 0x168 18.--23. 1. " CP2_90 R ,Color palette 2_90 red" hexmask.long.byte 0x168 10.--15. 1. " CP2_90 G ,Color palette 2_90 green" hexmask.long.byte 0x168 2.--7. 1. " CP2_90 B ,Color palette 2_90 blue" line.long 0x16C "CP2_91 R,Color Palette 2 Register 91 " hexmask.long.byte 0x16C 24.--31. 1. " CP2_91 A ,Color palette 2_91 blend ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP2_91 R ,Color palette 2_91 red" hexmask.long.byte 0x16C 10.--15. 1. " CP2_91 G ,Color palette 2_91 green" hexmask.long.byte 0x16C 2.--7. 1. " CP2_91 B ,Color palette 2_91 blue" line.long 0x170 "CP2_92 R,Color Palette 2 Register 92 " hexmask.long.byte 0x170 24.--31. 1. " CP2_92 A ,Color palette 2_92 blend ratio" hexmask.long.byte 0x170 18.--23. 1. " CP2_92 R ,Color palette 2_92 red" hexmask.long.byte 0x170 10.--15. 1. " CP2_92 G ,Color palette 2_92 green" hexmask.long.byte 0x170 2.--7. 1. " CP2_92 B ,Color palette 2_92 blue" line.long 0x174 "CP2_93 R,Color Palette 2 Register 93 " hexmask.long.byte 0x174 24.--31. 1. " CP2_93 A ,Color palette 2_93 blend ratio" hexmask.long.byte 0x174 18.--23. 1. " CP2_93 R ,Color palette 2_93 red" hexmask.long.byte 0x174 10.--15. 1. " CP2_93 G ,Color palette 2_93 green" hexmask.long.byte 0x174 2.--7. 1. " CP2_93 B ,Color palette 2_93 blue" line.long 0x178 "CP2_94 R,Color Palette 2 Register 94 " hexmask.long.byte 0x178 24.--31. 1. " CP2_94 A ,Color palette 2_94 blend ratio" hexmask.long.byte 0x178 18.--23. 1. " CP2_94 R ,Color palette 2_94 red" hexmask.long.byte 0x178 10.--15. 1. " CP2_94 G ,Color palette 2_94 green" hexmask.long.byte 0x178 2.--7. 1. " CP2_94 B ,Color palette 2_94 blue" line.long 0x17C "CP2_95 R,Color Palette 2 Register 95 " hexmask.long.byte 0x17C 24.--31. 1. " CP2_95 A ,Color palette 2_95 blend ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP2_95 R ,Color palette 2_95 red" hexmask.long.byte 0x17C 10.--15. 1. " CP2_95 G ,Color palette 2_95 green" hexmask.long.byte 0x17C 2.--7. 1. " CP2_95 B ,Color palette 2_95 blue" line.long 0x180 "CP2_96 R,Color Palette 2 Register 96 " hexmask.long.byte 0x180 24.--31. 1. " CP2_96 A ,Color palette 2_96 blend ratio" hexmask.long.byte 0x180 18.--23. 1. " CP2_96 R ,Color palette 2_96 red" hexmask.long.byte 0x180 10.--15. 1. " CP2_96 G ,Color palette 2_96 green" hexmask.long.byte 0x180 2.--7. 1. " CP2_96 B ,Color palette 2_96 blue" line.long 0x184 "CP2_97 R,Color Palette 2 Register 97 " hexmask.long.byte 0x184 24.--31. 1. " CP2_97 A ,Color palette 2_97 blend ratio" hexmask.long.byte 0x184 18.--23. 1. " CP2_97 R ,Color palette 2_97 red" hexmask.long.byte 0x184 10.--15. 1. " CP2_97 G ,Color palette 2_97 green" hexmask.long.byte 0x184 2.--7. 1. " CP2_97 B ,Color palette 2_97 blue" line.long 0x188 "CP2_98 R,Color Palette 2 Register 98 " hexmask.long.byte 0x188 24.--31. 1. " CP2_98 A ,Color palette 2_98 blend ratio" hexmask.long.byte 0x188 18.--23. 1. " CP2_98 R ,Color palette 2_98 red" hexmask.long.byte 0x188 10.--15. 1. " CP2_98 G ,Color palette 2_98 green" hexmask.long.byte 0x188 2.--7. 1. " CP2_98 B ,Color palette 2_98 blue" line.long 0x18C "CP2_99 R,Color Palette 2 Register 99 " hexmask.long.byte 0x18C 24.--31. 1. " CP2_99 A ,Color palette 2_99 blend ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP2_99 R ,Color palette 2_99 red" hexmask.long.byte 0x18C 10.--15. 1. " CP2_99 G ,Color palette 2_99 green" hexmask.long.byte 0x18C 2.--7. 1. " CP2_99 B ,Color palette 2_99 blue" line.long 0x190 "CP2_100R,Color Palette 2 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP2_100A ,Color palette 2_100 blend ratio" hexmask.long.byte 0x190 18.--23. 1. " CP2_100R ,Color palette 2_100 red" hexmask.long.byte 0x190 10.--15. 1. " CP2_100G ,Color palette 2_100 green" hexmask.long.byte 0x190 2.--7. 1. " CP2_100B ,Color palette 2_100 blue" line.long 0x194 "CP2_101R,Color Palette 2 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP2_101A ,Color palette 2_101 blend ratio" hexmask.long.byte 0x194 18.--23. 1. " CP2_101R ,Color palette 2_101 red" hexmask.long.byte 0x194 10.--15. 1. " CP2_101G ,Color palette 2_101 green" hexmask.long.byte 0x194 2.--7. 1. " CP2_101B ,Color palette 2_101 blue" line.long 0x198 "CP2_102R,Color Palette 2 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP2_102A ,Color palette 2_102 blend ratio" hexmask.long.byte 0x198 18.--23. 1. " CP2_102R ,Color palette 2_102 red" hexmask.long.byte 0x198 10.--15. 1. " CP2_102G ,Color palette 2_102 green" hexmask.long.byte 0x198 2.--7. 1. " CP2_102B ,Color palette 2_102 blue" line.long 0x19C "CP2_103R,Color Palette 2 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP2_103A ,Color palette 2_103 blend ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP2_103R ,Color palette 2_103 red" hexmask.long.byte 0x19C 10.--15. 1. " CP2_103G ,Color palette 2_103 green" hexmask.long.byte 0x19C 2.--7. 1. " CP2_103B ,Color palette 2_103 blue" line.long 0x1A0 "CP2_104R,Color Palette 2 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP2_104A ,Color palette 2_104 blend ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP2_104R ,Color palette 2_104 red" hexmask.long.byte 0x1A0 10.--15. 1. " CP2_104G ,Color palette 2_104 green" hexmask.long.byte 0x1A0 2.--7. 1. " CP2_104B ,Color palette 2_104 blue" line.long 0x1A4 "CP2_105R,Color Palette 2 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP2_105A ,Color palette 2_105 blend ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP2_105R ,Color palette 2_105 red" hexmask.long.byte 0x1A4 10.--15. 1. " CP2_105G ,Color palette 2_105 green" hexmask.long.byte 0x1A4 2.--7. 1. " CP2_105B ,Color palette 2_105 blue" line.long 0x1A8 "CP2_106R,Color Palette 2 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP2_106A ,Color palette 2_106 blend ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP2_106R ,Color palette 2_106 red" hexmask.long.byte 0x1A8 10.--15. 1. " CP2_106G ,Color palette 2_106 green" hexmask.long.byte 0x1A8 2.--7. 1. " CP2_106B ,Color palette 2_106 blue" line.long 0x1AC "CP2_107R,Color Palette 2 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP2_107A ,Color palette 2_107 blend ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP2_107R ,Color palette 2_107 red" hexmask.long.byte 0x1AC 10.--15. 1. " CP2_107G ,Color palette 2_107 green" hexmask.long.byte 0x1AC 2.--7. 1. " CP2_107B ,Color palette 2_107 blue" line.long 0x1B0 "CP2_108R,Color Palette 2 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP2_108A ,Color palette 2_108 blend ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP2_108R ,Color palette 2_108 red" hexmask.long.byte 0x1B0 10.--15. 1. " CP2_108G ,Color palette 2_108 green" hexmask.long.byte 0x1B0 2.--7. 1. " CP2_108B ,Color palette 2_108 blue" line.long 0x1B4 "CP2_109R,Color Palette 2 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP2_109A ,Color palette 2_109 blend ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP2_109R ,Color palette 2_109 red" hexmask.long.byte 0x1B4 10.--15. 1. " CP2_109G ,Color palette 2_109 green" hexmask.long.byte 0x1B4 2.--7. 1. " CP2_109B ,Color palette 2_109 blue" line.long 0x1B8 "CP2_110R,Color Palette 2 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP2_110A ,Color palette 2_110 blend ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP2_110R ,Color palette 2_110 red" hexmask.long.byte 0x1B8 10.--15. 1. " CP2_110G ,Color palette 2_110 green" hexmask.long.byte 0x1B8 2.--7. 1. " CP2_110B ,Color palette 2_110 blue" line.long 0x1BC "CP2_111R,Color Palette 2 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP2_111A ,Color palette 2_111 blend ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP2_111R ,Color palette 2_111 red" hexmask.long.byte 0x1BC 10.--15. 1. " CP2_111G ,Color palette 2_111 green" hexmask.long.byte 0x1BC 2.--7. 1. " CP2_111B ,Color palette 2_111 blue" line.long 0x1C0 "CP2_112R,Color Palette 2 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP2_112A ,Color palette 2_112 blend ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP2_112R ,Color palette 2_112 red" hexmask.long.byte 0x1C0 10.--15. 1. " CP2_112G ,Color palette 2_112 green" hexmask.long.byte 0x1C0 2.--7. 1. " CP2_112B ,Color palette 2_112 blue" line.long 0x1C4 "CP2_113R,Color Palette 2 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP2_113A ,Color palette 2_113 blend ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP2_113R ,Color palette 2_113 red" hexmask.long.byte 0x1C4 10.--15. 1. " CP2_113G ,Color palette 2_113 green" hexmask.long.byte 0x1C4 2.--7. 1. " CP2_113B ,Color palette 2_113 blue" line.long 0x1C8 "CP2_114R,Color Palette 2 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP2_114A ,Color palette 2_114 blend ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP2_114R ,Color palette 2_114 red" hexmask.long.byte 0x1C8 10.--15. 1. " CP2_114G ,Color palette 2_114 green" hexmask.long.byte 0x1C8 2.--7. 1. " CP2_114B ,Color palette 2_114 blue" line.long 0x1CC "CP2_115R,Color Palette 2 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP2_115A ,Color palette 2_115 blend ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP2_115R ,Color palette 2_115 red" hexmask.long.byte 0x1CC 10.--15. 1. " CP2_115G ,Color palette 2_115 green" hexmask.long.byte 0x1CC 2.--7. 1. " CP2_115B ,Color palette 2_115 blue" line.long 0x1D0 "CP2_116R,Color Palette 2 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP2_116A ,Color palette 2_116 blend ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP2_116R ,Color palette 2_116 red" hexmask.long.byte 0x1D0 10.--15. 1. " CP2_116G ,Color palette 2_116 green" hexmask.long.byte 0x1D0 2.--7. 1. " CP2_116B ,Color palette 2_116 blue" line.long 0x1D4 "CP2_117R,Color Palette 2 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP2_117A ,Color palette 2_117 blend ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP2_117R ,Color palette 2_117 red" hexmask.long.byte 0x1D4 10.--15. 1. " CP2_117G ,Color palette 2_117 green" hexmask.long.byte 0x1D4 2.--7. 1. " CP2_117B ,Color palette 2_117 blue" line.long 0x1D8 "CP2_118R,Color Palette 2 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP2_118A ,Color palette 2_118 blend ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP2_118R ,Color palette 2_118 red" hexmask.long.byte 0x1D8 10.--15. 1. " CP2_118G ,Color palette 2_118 green" hexmask.long.byte 0x1D8 2.--7. 1. " CP2_118B ,Color palette 2_118 blue" line.long 0x1DC "CP2_119R,Color Palette 2 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP2_119A ,Color palette 2_119 blend ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP2_119R ,Color palette 2_119 red" hexmask.long.byte 0x1DC 10.--15. 1. " CP2_119G ,Color palette 2_119 green" hexmask.long.byte 0x1DC 2.--7. 1. " CP2_119B ,Color palette 2_119 blue" line.long 0x1E0 "CP2_120R,Color Palette 2 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP2_120A ,Color palette 2_120 blend ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP2_120R ,Color palette 2_120 red" hexmask.long.byte 0x1E0 10.--15. 1. " CP2_120G ,Color palette 2_120 green" hexmask.long.byte 0x1E0 2.--7. 1. " CP2_120B ,Color palette 2_120 blue" line.long 0x1E4 "CP2_121R,Color Palette 2 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP2_121A ,Color palette 2_121 blend ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP2_121R ,Color palette 2_121 red" hexmask.long.byte 0x1E4 10.--15. 1. " CP2_121G ,Color palette 2_121 green" hexmask.long.byte 0x1E4 2.--7. 1. " CP2_121B ,Color palette 2_121 blue" line.long 0x1E8 "CP2_122R,Color Palette 2 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP2_122A ,Color palette 2_122 blend ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP2_122R ,Color palette 2_122 red" hexmask.long.byte 0x1E8 10.--15. 1. " CP2_122G ,Color palette 2_122 green" hexmask.long.byte 0x1E8 2.--7. 1. " CP2_122B ,Color palette 2_122 blue" line.long 0x1EC "CP2_123R,Color Palette 2 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP2_123A ,Color palette 2_123 blend ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP2_123R ,Color palette 2_123 red" hexmask.long.byte 0x1EC 10.--15. 1. " CP2_123G ,Color palette 2_123 green" hexmask.long.byte 0x1EC 2.--7. 1. " CP2_123B ,Color palette 2_123 blue" line.long 0x1F0 "CP2_124R,Color Palette 2 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP2_124A ,Color palette 2_124 blend ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP2_124R ,Color palette 2_124 red" hexmask.long.byte 0x1F0 10.--15. 1. " CP2_124G ,Color palette 2_124 green" hexmask.long.byte 0x1F0 2.--7. 1. " CP2_124B ,Color palette 2_124 blue" line.long 0x1F4 "CP2_125R,Color Palette 2 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP2_125A ,Color palette 2_125 blend ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP2_125R ,Color palette 2_125 red" hexmask.long.byte 0x1F4 10.--15. 1. " CP2_125G ,Color palette 2_125 green" hexmask.long.byte 0x1F4 2.--7. 1. " CP2_125B ,Color palette 2_125 blue" line.long 0x1F8 "CP2_126R,Color Palette 2 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP2_126A ,Color palette 2_126 blend ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP2_126R ,Color palette 2_126 red" hexmask.long.byte 0x1F8 10.--15. 1. " CP2_126G ,Color palette 2_126 green" hexmask.long.byte 0x1F8 2.--7. 1. " CP2_126B ,Color palette 2_126 blue" line.long 0x1FC "CP2_127R,Color Palette 2 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP2_127A ,Color palette 2_127 blend ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP2_127R ,Color palette 2_127 red" hexmask.long.byte 0x1FC 10.--15. 1. " CP2_127G ,Color palette 2_127 green" hexmask.long.byte 0x1FC 2.--7. 1. " CP2_127B ,Color palette 2_127 blue" line.long 0x200 "CP2_128R,Color Palette 2 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP2_128A ,Color palette 2_128 blend ratio" hexmask.long.byte 0x200 18.--23. 1. " CP2_128R ,Color palette 2_128 red" hexmask.long.byte 0x200 10.--15. 1. " CP2_128G ,Color palette 2_128 green" hexmask.long.byte 0x200 2.--7. 1. " CP2_128B ,Color palette 2_128 blue" line.long 0x204 "CP2_129R,Color Palette 2 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP2_129A ,Color palette 2_129 blend ratio" hexmask.long.byte 0x204 18.--23. 1. " CP2_129R ,Color palette 2_129 red" hexmask.long.byte 0x204 10.--15. 1. " CP2_129G ,Color palette 2_129 green" hexmask.long.byte 0x204 2.--7. 1. " CP2_129B ,Color palette 2_129 blue" line.long 0x208 "CP2_130R,Color Palette 2 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP2_130A ,Color palette 2_130 blend ratio" hexmask.long.byte 0x208 18.--23. 1. " CP2_130R ,Color palette 2_130 red" hexmask.long.byte 0x208 10.--15. 1. " CP2_130G ,Color palette 2_130 green" hexmask.long.byte 0x208 2.--7. 1. " CP2_130B ,Color palette 2_130 blue" line.long 0x20C "CP2_131R,Color Palette 2 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP2_131A ,Color palette 2_131 blend ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP2_131R ,Color palette 2_131 red" hexmask.long.byte 0x20C 10.--15. 1. " CP2_131G ,Color palette 2_131 green" hexmask.long.byte 0x20C 2.--7. 1. " CP2_131B ,Color palette 2_131 blue" line.long 0x210 "CP2_132R,Color Palette 2 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP2_132A ,Color palette 2_132 blend ratio" hexmask.long.byte 0x210 18.--23. 1. " CP2_132R ,Color palette 2_132 red" hexmask.long.byte 0x210 10.--15. 1. " CP2_132G ,Color palette 2_132 green" hexmask.long.byte 0x210 2.--7. 1. " CP2_132B ,Color palette 2_132 blue" line.long 0x214 "CP2_133R,Color Palette 2 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP2_133A ,Color palette 2_133 blend ratio" hexmask.long.byte 0x214 18.--23. 1. " CP2_133R ,Color palette 2_133 red" hexmask.long.byte 0x214 10.--15. 1. " CP2_133G ,Color palette 2_133 green" hexmask.long.byte 0x214 2.--7. 1. " CP2_133B ,Color palette 2_133 blue" line.long 0x218 "CP2_134R,Color Palette 2 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP2_134A ,Color palette 2_134 blend ratio" hexmask.long.byte 0x218 18.--23. 1. " CP2_134R ,Color palette 2_134 red" hexmask.long.byte 0x218 10.--15. 1. " CP2_134G ,Color palette 2_134 green" hexmask.long.byte 0x218 2.--7. 1. " CP2_134B ,Color palette 2_134 blue" line.long 0x21C "CP2_135R,Color Palette 2 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP2_135A ,Color palette 2_135 blend ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP2_135R ,Color palette 2_135 red" hexmask.long.byte 0x21C 10.--15. 1. " CP2_135G ,Color palette 2_135 green" hexmask.long.byte 0x21C 2.--7. 1. " CP2_135B ,Color palette 2_135 blue" line.long 0x220 "CP2_136R,Color Palette 2 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP2_136A ,Color palette 2_136 blend ratio" hexmask.long.byte 0x220 18.--23. 1. " CP2_136R ,Color palette 2_136 red" hexmask.long.byte 0x220 10.--15. 1. " CP2_136G ,Color palette 2_136 green" hexmask.long.byte 0x220 2.--7. 1. " CP2_136B ,Color palette 2_136 blue" line.long 0x224 "CP2_137R,Color Palette 2 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP2_137A ,Color palette 2_137 blend ratio" hexmask.long.byte 0x224 18.--23. 1. " CP2_137R ,Color palette 2_137 red" hexmask.long.byte 0x224 10.--15. 1. " CP2_137G ,Color palette 2_137 green" hexmask.long.byte 0x224 2.--7. 1. " CP2_137B ,Color palette 2_137 blue" line.long 0x228 "CP2_138R,Color Palette 2 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP2_138A ,Color palette 2_138 blend ratio" hexmask.long.byte 0x228 18.--23. 1. " CP2_138R ,Color palette 2_138 red" hexmask.long.byte 0x228 10.--15. 1. " CP2_138G ,Color palette 2_138 green" hexmask.long.byte 0x228 2.--7. 1. " CP2_138B ,Color palette 2_138 blue" line.long 0x22C "CP2_139R,Color Palette 2 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP2_139A ,Color palette 2_139 blend ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP2_139R ,Color palette 2_139 red" hexmask.long.byte 0x22C 10.--15. 1. " CP2_139G ,Color palette 2_139 green" hexmask.long.byte 0x22C 2.--7. 1. " CP2_139B ,Color palette 2_139 blue" line.long 0x230 "CP2_140R,Color Palette 2 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP2_140A ,Color palette 2_140 blend ratio" hexmask.long.byte 0x230 18.--23. 1. " CP2_140R ,Color palette 2_140 red" hexmask.long.byte 0x230 10.--15. 1. " CP2_140G ,Color palette 2_140 green" hexmask.long.byte 0x230 2.--7. 1. " CP2_140B ,Color palette 2_140 blue" line.long 0x234 "CP2_141R,Color Palette 2 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP2_141A ,Color palette 2_141 blend ratio" hexmask.long.byte 0x234 18.--23. 1. " CP2_141R ,Color palette 2_141 red" hexmask.long.byte 0x234 10.--15. 1. " CP2_141G ,Color palette 2_141 green" hexmask.long.byte 0x234 2.--7. 1. " CP2_141B ,Color palette 2_141 blue" line.long 0x238 "CP2_142R,Color Palette 2 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP2_142A ,Color palette 2_142 blend ratio" hexmask.long.byte 0x238 18.--23. 1. " CP2_142R ,Color palette 2_142 red" hexmask.long.byte 0x238 10.--15. 1. " CP2_142G ,Color palette 2_142 green" hexmask.long.byte 0x238 2.--7. 1. " CP2_142B ,Color palette 2_142 blue" line.long 0x23C "CP2_143R,Color Palette 2 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP2_143A ,Color palette 2_143 blend ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP2_143R ,Color palette 2_143 red" hexmask.long.byte 0x23C 10.--15. 1. " CP2_143G ,Color palette 2_143 green" hexmask.long.byte 0x23C 2.--7. 1. " CP2_143B ,Color palette 2_143 blue" line.long 0x240 "CP2_144R,Color Palette 2 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP2_144A ,Color palette 2_144 blend ratio" hexmask.long.byte 0x240 18.--23. 1. " CP2_144R ,Color palette 2_144 red" hexmask.long.byte 0x240 10.--15. 1. " CP2_144G ,Color palette 2_144 green" hexmask.long.byte 0x240 2.--7. 1. " CP2_144B ,Color palette 2_144 blue" line.long 0x244 "CP2_145R,Color Palette 2 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP2_145A ,Color palette 2_145 blend ratio" hexmask.long.byte 0x244 18.--23. 1. " CP2_145R ,Color palette 2_145 red" hexmask.long.byte 0x244 10.--15. 1. " CP2_145G ,Color palette 2_145 green" hexmask.long.byte 0x244 2.--7. 1. " CP2_145B ,Color palette 2_145 blue" line.long 0x248 "CP2_146R,Color Palette 2 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP2_146A ,Color palette 2_146 blend ratio" hexmask.long.byte 0x248 18.--23. 1. " CP2_146R ,Color palette 2_146 red" hexmask.long.byte 0x248 10.--15. 1. " CP2_146G ,Color palette 2_146 green" hexmask.long.byte 0x248 2.--7. 1. " CP2_146B ,Color palette 2_146 blue" line.long 0x24C "CP2_147R,Color Palette 2 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP2_147A ,Color palette 2_147 blend ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP2_147R ,Color palette 2_147 red" hexmask.long.byte 0x24C 10.--15. 1. " CP2_147G ,Color palette 2_147 green" hexmask.long.byte 0x24C 2.--7. 1. " CP2_147B ,Color palette 2_147 blue" line.long 0x250 "CP2_148R,Color Palette 2 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP2_148A ,Color palette 2_148 blend ratio" hexmask.long.byte 0x250 18.--23. 1. " CP2_148R ,Color palette 2_148 red" hexmask.long.byte 0x250 10.--15. 1. " CP2_148G ,Color palette 2_148 green" hexmask.long.byte 0x250 2.--7. 1. " CP2_148B ,Color palette 2_148 blue" line.long 0x254 "CP2_149R,Color Palette 2 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP2_149A ,Color palette 2_149 blend ratio" hexmask.long.byte 0x254 18.--23. 1. " CP2_149R ,Color palette 2_149 red" hexmask.long.byte 0x254 10.--15. 1. " CP2_149G ,Color palette 2_149 green" hexmask.long.byte 0x254 2.--7. 1. " CP2_149B ,Color palette 2_149 blue" line.long 0x258 "CP2_150R,Color Palette 2 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP2_150A ,Color palette 2_150 blend ratio" hexmask.long.byte 0x258 18.--23. 1. " CP2_150R ,Color palette 2_150 red" hexmask.long.byte 0x258 10.--15. 1. " CP2_150G ,Color palette 2_150 green" hexmask.long.byte 0x258 2.--7. 1. " CP2_150B ,Color palette 2_150 blue" line.long 0x25C "CP2_151R,Color Palette 2 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP2_151A ,Color palette 2_151 blend ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP2_151R ,Color palette 2_151 red" hexmask.long.byte 0x25C 10.--15. 1. " CP2_151G ,Color palette 2_151 green" hexmask.long.byte 0x25C 2.--7. 1. " CP2_151B ,Color palette 2_151 blue" line.long 0x260 "CP2_152R,Color Palette 2 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP2_152A ,Color palette 2_152 blend ratio" hexmask.long.byte 0x260 18.--23. 1. " CP2_152R ,Color palette 2_152 red" hexmask.long.byte 0x260 10.--15. 1. " CP2_152G ,Color palette 2_152 green" hexmask.long.byte 0x260 2.--7. 1. " CP2_152B ,Color palette 2_152 blue" line.long 0x264 "CP2_153R,Color Palette 2 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP2_153A ,Color palette 2_153 blend ratio" hexmask.long.byte 0x264 18.--23. 1. " CP2_153R ,Color palette 2_153 red" hexmask.long.byte 0x264 10.--15. 1. " CP2_153G ,Color palette 2_153 green" hexmask.long.byte 0x264 2.--7. 1. " CP2_153B ,Color palette 2_153 blue" line.long 0x268 "CP2_154R,Color Palette 2 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP2_154A ,Color palette 2_154 blend ratio" hexmask.long.byte 0x268 18.--23. 1. " CP2_154R ,Color palette 2_154 red" hexmask.long.byte 0x268 10.--15. 1. " CP2_154G ,Color palette 2_154 green" hexmask.long.byte 0x268 2.--7. 1. " CP2_154B ,Color palette 2_154 blue" line.long 0x26C "CP2_155R,Color Palette 2 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP2_155A ,Color palette 2_155 blend ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP2_155R ,Color palette 2_155 red" hexmask.long.byte 0x26C 10.--15. 1. " CP2_155G ,Color palette 2_155 green" hexmask.long.byte 0x26C 2.--7. 1. " CP2_155B ,Color palette 2_155 blue" line.long 0x270 "CP2_156R,Color Palette 2 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP2_156A ,Color palette 2_156 blend ratio" hexmask.long.byte 0x270 18.--23. 1. " CP2_156R ,Color palette 2_156 red" hexmask.long.byte 0x270 10.--15. 1. " CP2_156G ,Color palette 2_156 green" hexmask.long.byte 0x270 2.--7. 1. " CP2_156B ,Color palette 2_156 blue" line.long 0x274 "CP2_157R,Color Palette 2 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP2_157A ,Color palette 2_157 blend ratio" hexmask.long.byte 0x274 18.--23. 1. " CP2_157R ,Color palette 2_157 red" hexmask.long.byte 0x274 10.--15. 1. " CP2_157G ,Color palette 2_157 green" hexmask.long.byte 0x274 2.--7. 1. " CP2_157B ,Color palette 2_157 blue" line.long 0x278 "CP2_158R,Color Palette 2 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP2_158A ,Color palette 2_158 blend ratio" hexmask.long.byte 0x278 18.--23. 1. " CP2_158R ,Color palette 2_158 red" hexmask.long.byte 0x278 10.--15. 1. " CP2_158G ,Color palette 2_158 green" hexmask.long.byte 0x278 2.--7. 1. " CP2_158B ,Color palette 2_158 blue" line.long 0x27C "CP2_159R,Color Palette 2 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP2_159A ,Color palette 2_159 blend ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP2_159R ,Color palette 2_159 red" hexmask.long.byte 0x27C 10.--15. 1. " CP2_159G ,Color palette 2_159 green" hexmask.long.byte 0x27C 2.--7. 1. " CP2_159B ,Color palette 2_159 blue" line.long 0x280 "CP2_160R,Color Palette 2 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP2_160A ,Color palette 2_160 blend ratio" hexmask.long.byte 0x280 18.--23. 1. " CP2_160R ,Color palette 2_160 red" hexmask.long.byte 0x280 10.--15. 1. " CP2_160G ,Color palette 2_160 green" hexmask.long.byte 0x280 2.--7. 1. " CP2_160B ,Color palette 2_160 blue" line.long 0x284 "CP2_161R,Color Palette 2 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP2_161A ,Color palette 2_161 blend ratio" hexmask.long.byte 0x284 18.--23. 1. " CP2_161R ,Color palette 2_161 red" hexmask.long.byte 0x284 10.--15. 1. " CP2_161G ,Color palette 2_161 green" hexmask.long.byte 0x284 2.--7. 1. " CP2_161B ,Color palette 2_161 blue" line.long 0x288 "CP2_162R,Color Palette 2 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP2_162A ,Color palette 2_162 blend ratio" hexmask.long.byte 0x288 18.--23. 1. " CP2_162R ,Color palette 2_162 red" hexmask.long.byte 0x288 10.--15. 1. " CP2_162G ,Color palette 2_162 green" hexmask.long.byte 0x288 2.--7. 1. " CP2_162B ,Color palette 2_162 blue" line.long 0x28C "CP2_163R,Color Palette 2 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP2_163A ,Color palette 2_163 blend ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP2_163R ,Color palette 2_163 red" hexmask.long.byte 0x28C 10.--15. 1. " CP2_163G ,Color palette 2_163 green" hexmask.long.byte 0x28C 2.--7. 1. " CP2_163B ,Color palette 2_163 blue" line.long 0x290 "CP2_164R,Color Palette 2 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP2_164A ,Color palette 2_164 blend ratio" hexmask.long.byte 0x290 18.--23. 1. " CP2_164R ,Color palette 2_164 red" hexmask.long.byte 0x290 10.--15. 1. " CP2_164G ,Color palette 2_164 green" hexmask.long.byte 0x290 2.--7. 1. " CP2_164B ,Color palette 2_164 blue" line.long 0x294 "CP2_165R,Color Palette 2 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP2_165A ,Color palette 2_165 blend ratio" hexmask.long.byte 0x294 18.--23. 1. " CP2_165R ,Color palette 2_165 red" hexmask.long.byte 0x294 10.--15. 1. " CP2_165G ,Color palette 2_165 green" hexmask.long.byte 0x294 2.--7. 1. " CP2_165B ,Color palette 2_165 blue" line.long 0x298 "CP2_166R,Color Palette 2 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP2_166A ,Color palette 2_166 blend ratio" hexmask.long.byte 0x298 18.--23. 1. " CP2_166R ,Color palette 2_166 red" hexmask.long.byte 0x298 10.--15. 1. " CP2_166G ,Color palette 2_166 green" hexmask.long.byte 0x298 2.--7. 1. " CP2_166B ,Color palette 2_166 blue" line.long 0x29C "CP2_167R,Color Palette 2 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP2_167A ,Color palette 2_167 blend ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP2_167R ,Color palette 2_167 red" hexmask.long.byte 0x29C 10.--15. 1. " CP2_167G ,Color palette 2_167 green" hexmask.long.byte 0x29C 2.--7. 1. " CP2_167B ,Color palette 2_167 blue" line.long 0x2A0 "CP2_168R,Color Palette 2 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP2_168A ,Color palette 2_168 blend ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP2_168R ,Color palette 2_168 red" hexmask.long.byte 0x2A0 10.--15. 1. " CP2_168G ,Color palette 2_168 green" hexmask.long.byte 0x2A0 2.--7. 1. " CP2_168B ,Color palette 2_168 blue" line.long 0x2A4 "CP2_169R,Color Palette 2 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP2_169A ,Color palette 2_169 blend ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP2_169R ,Color palette 2_169 red" hexmask.long.byte 0x2A4 10.--15. 1. " CP2_169G ,Color palette 2_169 green" hexmask.long.byte 0x2A4 2.--7. 1. " CP2_169B ,Color palette 2_169 blue" line.long 0x2A8 "CP2_170R,Color Palette 2 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP2_170A ,Color palette 2_170 blend ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP2_170R ,Color palette 2_170 red" hexmask.long.byte 0x2A8 10.--15. 1. " CP2_170G ,Color palette 2_170 green" hexmask.long.byte 0x2A8 2.--7. 1. " CP2_170B ,Color palette 2_170 blue" line.long 0x2AC "CP2_171R,Color Palette 2 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP2_171A ,Color palette 2_171 blend ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP2_171R ,Color palette 2_171 red" hexmask.long.byte 0x2AC 10.--15. 1. " CP2_171G ,Color palette 2_171 green" hexmask.long.byte 0x2AC 2.--7. 1. " CP2_171B ,Color palette 2_171 blue" line.long 0x2B0 "CP2_172R,Color Palette 2 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP2_172A ,Color palette 2_172 blend ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP2_172R ,Color palette 2_172 red" hexmask.long.byte 0x2B0 10.--15. 1. " CP2_172G ,Color palette 2_172 green" hexmask.long.byte 0x2B0 2.--7. 1. " CP2_172B ,Color palette 2_172 blue" line.long 0x2B4 "CP2_173R,Color Palette 2 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP2_173A ,Color palette 2_173 blend ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP2_173R ,Color palette 2_173 red" hexmask.long.byte 0x2B4 10.--15. 1. " CP2_173G ,Color palette 2_173 green" hexmask.long.byte 0x2B4 2.--7. 1. " CP2_173B ,Color palette 2_173 blue" line.long 0x2B8 "CP2_174R,Color Palette 2 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP2_174A ,Color palette 2_174 blend ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP2_174R ,Color palette 2_174 red" hexmask.long.byte 0x2B8 10.--15. 1. " CP2_174G ,Color palette 2_174 green" hexmask.long.byte 0x2B8 2.--7. 1. " CP2_174B ,Color palette 2_174 blue" line.long 0x2BC "CP2_175R,Color Palette 2 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP2_175A ,Color palette 2_175 blend ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP2_175R ,Color palette 2_175 red" hexmask.long.byte 0x2BC 10.--15. 1. " CP2_175G ,Color palette 2_175 green" hexmask.long.byte 0x2BC 2.--7. 1. " CP2_175B ,Color palette 2_175 blue" line.long 0x2C0 "CP2_176R,Color Palette 2 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP2_176A ,Color palette 2_176 blend ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP2_176R ,Color palette 2_176 red" hexmask.long.byte 0x2C0 10.--15. 1. " CP2_176G ,Color palette 2_176 green" hexmask.long.byte 0x2C0 2.--7. 1. " CP2_176B ,Color palette 2_176 blue" line.long 0x2C4 "CP2_177R,Color Palette 2 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP2_177A ,Color palette 2_177 blend ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP2_177R ,Color palette 2_177 red" hexmask.long.byte 0x2C4 10.--15. 1. " CP2_177G ,Color palette 2_177 green" hexmask.long.byte 0x2C4 2.--7. 1. " CP2_177B ,Color palette 2_177 blue" line.long 0x2C8 "CP2_178R,Color Palette 2 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP2_178A ,Color palette 2_178 blend ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP2_178R ,Color palette 2_178 red" hexmask.long.byte 0x2C8 10.--15. 1. " CP2_178G ,Color palette 2_178 green" hexmask.long.byte 0x2C8 2.--7. 1. " CP2_178B ,Color palette 2_178 blue" line.long 0x2CC "CP2_179R,Color Palette 2 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP2_179A ,Color palette 2_179 blend ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP2_179R ,Color palette 2_179 red" hexmask.long.byte 0x2CC 10.--15. 1. " CP2_179G ,Color palette 2_179 green" hexmask.long.byte 0x2CC 2.--7. 1. " CP2_179B ,Color palette 2_179 blue" line.long 0x2D0 "CP2_180R,Color Palette 2 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP2_180A ,Color palette 2_180 blend ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP2_180R ,Color palette 2_180 red" hexmask.long.byte 0x2D0 10.--15. 1. " CP2_180G ,Color palette 2_180 green" hexmask.long.byte 0x2D0 2.--7. 1. " CP2_180B ,Color palette 2_180 blue" line.long 0x2D4 "CP2_181R,Color Palette 2 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP2_181A ,Color palette 2_181 blend ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP2_181R ,Color palette 2_181 red" hexmask.long.byte 0x2D4 10.--15. 1. " CP2_181G ,Color palette 2_181 green" hexmask.long.byte 0x2D4 2.--7. 1. " CP2_181B ,Color palette 2_181 blue" line.long 0x2D8 "CP2_182R,Color Palette 2 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP2_182A ,Color palette 2_182 blend ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP2_182R ,Color palette 2_182 red" hexmask.long.byte 0x2D8 10.--15. 1. " CP2_182G ,Color palette 2_182 green" hexmask.long.byte 0x2D8 2.--7. 1. " CP2_182B ,Color palette 2_182 blue" line.long 0x2DC "CP2_183R,Color Palette 2 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP2_183A ,Color palette 2_183 blend ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP2_183R ,Color palette 2_183 red" hexmask.long.byte 0x2DC 10.--15. 1. " CP2_183G ,Color palette 2_183 green" hexmask.long.byte 0x2DC 2.--7. 1. " CP2_183B ,Color palette 2_183 blue" line.long 0x2E0 "CP2_184R,Color Palette 2 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP2_184A ,Color palette 2_184 blend ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP2_184R ,Color palette 2_184 red" hexmask.long.byte 0x2E0 10.--15. 1. " CP2_184G ,Color palette 2_184 green" hexmask.long.byte 0x2E0 2.--7. 1. " CP2_184B ,Color palette 2_184 blue" line.long 0x2E4 "CP2_185R,Color Palette 2 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP2_185A ,Color palette 2_185 blend ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP2_185R ,Color palette 2_185 red" hexmask.long.byte 0x2E4 10.--15. 1. " CP2_185G ,Color palette 2_185 green" hexmask.long.byte 0x2E4 2.--7. 1. " CP2_185B ,Color palette 2_185 blue" line.long 0x2E8 "CP2_186R,Color Palette 2 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP2_186A ,Color palette 2_186 blend ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP2_186R ,Color palette 2_186 red" hexmask.long.byte 0x2E8 10.--15. 1. " CP2_186G ,Color palette 2_186 green" hexmask.long.byte 0x2E8 2.--7. 1. " CP2_186B ,Color palette 2_186 blue" line.long 0x2EC "CP2_187R,Color Palette 2 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP2_187A ,Color palette 2_187 blend ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP2_187R ,Color palette 2_187 red" hexmask.long.byte 0x2EC 10.--15. 1. " CP2_187G ,Color palette 2_187 green" hexmask.long.byte 0x2EC 2.--7. 1. " CP2_187B ,Color palette 2_187 blue" line.long 0x2F0 "CP2_188R,Color Palette 2 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP2_188A ,Color palette 2_188 blend ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP2_188R ,Color palette 2_188 red" hexmask.long.byte 0x2F0 10.--15. 1. " CP2_188G ,Color palette 2_188 green" hexmask.long.byte 0x2F0 2.--7. 1. " CP2_188B ,Color palette 2_188 blue" line.long 0x2F4 "CP2_189R,Color Palette 2 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP2_189A ,Color palette 2_189 blend ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP2_189R ,Color palette 2_189 red" hexmask.long.byte 0x2F4 10.--15. 1. " CP2_189G ,Color palette 2_189 green" hexmask.long.byte 0x2F4 2.--7. 1. " CP2_189B ,Color palette 2_189 blue" line.long 0x2F8 "CP2_190R,Color Palette 2 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP2_190A ,Color palette 2_190 blend ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP2_190R ,Color palette 2_190 red" hexmask.long.byte 0x2F8 10.--15. 1. " CP2_190G ,Color palette 2_190 green" hexmask.long.byte 0x2F8 2.--7. 1. " CP2_190B ,Color palette 2_190 blue" line.long 0x2FC "CP2_191R,Color Palette 2 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP2_191A ,Color palette 2_191 blend ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP2_191R ,Color palette 2_191 red" hexmask.long.byte 0x2FC 10.--15. 1. " CP2_191G ,Color palette 2_191 green" hexmask.long.byte 0x2FC 2.--7. 1. " CP2_191B ,Color palette 2_191 blue" line.long 0x300 "CP2_192R,Color Palette 2 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP2_192A ,Color palette 2_192 blend ratio" hexmask.long.byte 0x300 18.--23. 1. " CP2_192R ,Color palette 2_192 red" hexmask.long.byte 0x300 10.--15. 1. " CP2_192G ,Color palette 2_192 green" hexmask.long.byte 0x300 2.--7. 1. " CP2_192B ,Color palette 2_192 blue" line.long 0x304 "CP2_193R,Color Palette 2 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP2_193A ,Color palette 2_193 blend ratio" hexmask.long.byte 0x304 18.--23. 1. " CP2_193R ,Color palette 2_193 red" hexmask.long.byte 0x304 10.--15. 1. " CP2_193G ,Color palette 2_193 green" hexmask.long.byte 0x304 2.--7. 1. " CP2_193B ,Color palette 2_193 blue" line.long 0x308 "CP2_194R,Color Palette 2 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP2_194A ,Color palette 2_194 blend ratio" hexmask.long.byte 0x308 18.--23. 1. " CP2_194R ,Color palette 2_194 red" hexmask.long.byte 0x308 10.--15. 1. " CP2_194G ,Color palette 2_194 green" hexmask.long.byte 0x308 2.--7. 1. " CP2_194B ,Color palette 2_194 blue" line.long 0x30C "CP2_195R,Color Palette 2 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP2_195A ,Color palette 2_195 blend ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP2_195R ,Color palette 2_195 red" hexmask.long.byte 0x30C 10.--15. 1. " CP2_195G ,Color palette 2_195 green" hexmask.long.byte 0x30C 2.--7. 1. " CP2_195B ,Color palette 2_195 blue" line.long 0x310 "CP2_196R,Color Palette 2 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP2_196A ,Color palette 2_196 blend ratio" hexmask.long.byte 0x310 18.--23. 1. " CP2_196R ,Color palette 2_196 red" hexmask.long.byte 0x310 10.--15. 1. " CP2_196G ,Color palette 2_196 green" hexmask.long.byte 0x310 2.--7. 1. " CP2_196B ,Color palette 2_196 blue" line.long 0x314 "CP2_197R,Color Palette 2 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP2_197A ,Color palette 2_197 blend ratio" hexmask.long.byte 0x314 18.--23. 1. " CP2_197R ,Color palette 2_197 red" hexmask.long.byte 0x314 10.--15. 1. " CP2_197G ,Color palette 2_197 green" hexmask.long.byte 0x314 2.--7. 1. " CP2_197B ,Color palette 2_197 blue" line.long 0x318 "CP2_198R,Color Palette 2 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP2_198A ,Color palette 2_198 blend ratio" hexmask.long.byte 0x318 18.--23. 1. " CP2_198R ,Color palette 2_198 red" hexmask.long.byte 0x318 10.--15. 1. " CP2_198G ,Color palette 2_198 green" hexmask.long.byte 0x318 2.--7. 1. " CP2_198B ,Color palette 2_198 blue" line.long 0x31C "CP2_199R,Color Palette 2 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP2_199A ,Color palette 2_199 blend ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP2_199R ,Color palette 2_199 red" hexmask.long.byte 0x31C 10.--15. 1. " CP2_199G ,Color palette 2_199 green" hexmask.long.byte 0x31C 2.--7. 1. " CP2_199B ,Color palette 2_199 blue" line.long 0x320 "CP2_200R,Color Palette 2 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP2_200A ,Color palette 2_200 blend ratio" hexmask.long.byte 0x320 18.--23. 1. " CP2_200R ,Color palette 2_200 red" hexmask.long.byte 0x320 10.--15. 1. " CP2_200G ,Color palette 2_200 green" hexmask.long.byte 0x320 2.--7. 1. " CP2_200B ,Color palette 2_200 blue" line.long 0x324 "CP2_201R,Color Palette 2 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP2_201A ,Color palette 2_201 blend ratio" hexmask.long.byte 0x324 18.--23. 1. " CP2_201R ,Color palette 2_201 red" hexmask.long.byte 0x324 10.--15. 1. " CP2_201G ,Color palette 2_201 green" hexmask.long.byte 0x324 2.--7. 1. " CP2_201B ,Color palette 2_201 blue" line.long 0x328 "CP2_202R,Color Palette 2 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP2_202A ,Color palette 2_202 blend ratio" hexmask.long.byte 0x328 18.--23. 1. " CP2_202R ,Color palette 2_202 red" hexmask.long.byte 0x328 10.--15. 1. " CP2_202G ,Color palette 2_202 green" hexmask.long.byte 0x328 2.--7. 1. " CP2_202B ,Color palette 2_202 blue" line.long 0x32C "CP2_203R,Color Palette 2 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP2_203A ,Color palette 2_203 blend ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP2_203R ,Color palette 2_203 red" hexmask.long.byte 0x32C 10.--15. 1. " CP2_203G ,Color palette 2_203 green" hexmask.long.byte 0x32C 2.--7. 1. " CP2_203B ,Color palette 2_203 blue" line.long 0x330 "CP2_204R,Color Palette 2 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP2_204A ,Color palette 2_204 blend ratio" hexmask.long.byte 0x330 18.--23. 1. " CP2_204R ,Color palette 2_204 red" hexmask.long.byte 0x330 10.--15. 1. " CP2_204G ,Color palette 2_204 green" hexmask.long.byte 0x330 2.--7. 1. " CP2_204B ,Color palette 2_204 blue" line.long 0x334 "CP2_205R,Color Palette 2 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP2_205A ,Color palette 2_205 blend ratio" hexmask.long.byte 0x334 18.--23. 1. " CP2_205R ,Color palette 2_205 red" hexmask.long.byte 0x334 10.--15. 1. " CP2_205G ,Color palette 2_205 green" hexmask.long.byte 0x334 2.--7. 1. " CP2_205B ,Color palette 2_205 blue" line.long 0x338 "CP2_206R,Color Palette 2 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP2_206A ,Color palette 2_206 blend ratio" hexmask.long.byte 0x338 18.--23. 1. " CP2_206R ,Color palette 2_206 red" hexmask.long.byte 0x338 10.--15. 1. " CP2_206G ,Color palette 2_206 green" hexmask.long.byte 0x338 2.--7. 1. " CP2_206B ,Color palette 2_206 blue" line.long 0x33C "CP2_207R,Color Palette 2 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP2_207A ,Color palette 2_207 blend ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP2_207R ,Color palette 2_207 red" hexmask.long.byte 0x33C 10.--15. 1. " CP2_207G ,Color palette 2_207 green" hexmask.long.byte 0x33C 2.--7. 1. " CP2_207B ,Color palette 2_207 blue" line.long 0x340 "CP2_208R,Color Palette 2 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP2_208A ,Color palette 2_208 blend ratio" hexmask.long.byte 0x340 18.--23. 1. " CP2_208R ,Color palette 2_208 red" hexmask.long.byte 0x340 10.--15. 1. " CP2_208G ,Color palette 2_208 green" hexmask.long.byte 0x340 2.--7. 1. " CP2_208B ,Color palette 2_208 blue" line.long 0x344 "CP2_209R,Color Palette 2 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP2_209A ,Color palette 2_209 blend ratio" hexmask.long.byte 0x344 18.--23. 1. " CP2_209R ,Color palette 2_209 red" hexmask.long.byte 0x344 10.--15. 1. " CP2_209G ,Color palette 2_209 green" hexmask.long.byte 0x344 2.--7. 1. " CP2_209B ,Color palette 2_209 blue" line.long 0x348 "CP2_210R,Color Palette 2 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP2_210A ,Color palette 2_210 blend ratio" hexmask.long.byte 0x348 18.--23. 1. " CP2_210R ,Color palette 2_210 red" hexmask.long.byte 0x348 10.--15. 1. " CP2_210G ,Color palette 2_210 green" hexmask.long.byte 0x348 2.--7. 1. " CP2_210B ,Color palette 2_210 blue" line.long 0x34C "CP2_211R,Color Palette 2 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP2_211A ,Color palette 2_211 blend ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP2_211R ,Color palette 2_211 red" hexmask.long.byte 0x34C 10.--15. 1. " CP2_211G ,Color palette 2_211 green" hexmask.long.byte 0x34C 2.--7. 1. " CP2_211B ,Color palette 2_211 blue" line.long 0x350 "CP2_212R,Color Palette 2 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP2_212A ,Color palette 2_212 blend ratio" hexmask.long.byte 0x350 18.--23. 1. " CP2_212R ,Color palette 2_212 red" hexmask.long.byte 0x350 10.--15. 1. " CP2_212G ,Color palette 2_212 green" hexmask.long.byte 0x350 2.--7. 1. " CP2_212B ,Color palette 2_212 blue" line.long 0x354 "CP2_213R,Color Palette 2 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP2_213A ,Color palette 2_213 blend ratio" hexmask.long.byte 0x354 18.--23. 1. " CP2_213R ,Color palette 2_213 red" hexmask.long.byte 0x354 10.--15. 1. " CP2_213G ,Color palette 2_213 green" hexmask.long.byte 0x354 2.--7. 1. " CP2_213B ,Color palette 2_213 blue" line.long 0x358 "CP2_214R,Color Palette 2 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP2_214A ,Color palette 2_214 blend ratio" hexmask.long.byte 0x358 18.--23. 1. " CP2_214R ,Color palette 2_214 red" hexmask.long.byte 0x358 10.--15. 1. " CP2_214G ,Color palette 2_214 green" hexmask.long.byte 0x358 2.--7. 1. " CP2_214B ,Color palette 2_214 blue" line.long 0x35C "CP2_215R,Color Palette 2 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP2_215A ,Color palette 2_215 blend ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP2_215R ,Color palette 2_215 red" hexmask.long.byte 0x35C 10.--15. 1. " CP2_215G ,Color palette 2_215 green" hexmask.long.byte 0x35C 2.--7. 1. " CP2_215B ,Color palette 2_215 blue" line.long 0x360 "CP2_216R,Color Palette 2 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP2_216A ,Color palette 2_216 blend ratio" hexmask.long.byte 0x360 18.--23. 1. " CP2_216R ,Color palette 2_216 red" hexmask.long.byte 0x360 10.--15. 1. " CP2_216G ,Color palette 2_216 green" hexmask.long.byte 0x360 2.--7. 1. " CP2_216B ,Color palette 2_216 blue" line.long 0x364 "CP2_217R,Color Palette 2 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP2_217A ,Color palette 2_217 blend ratio" hexmask.long.byte 0x364 18.--23. 1. " CP2_217R ,Color palette 2_217 red" hexmask.long.byte 0x364 10.--15. 1. " CP2_217G ,Color palette 2_217 green" hexmask.long.byte 0x364 2.--7. 1. " CP2_217B ,Color palette 2_217 blue" line.long 0x368 "CP2_218R,Color Palette 2 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP2_218A ,Color palette 2_218 blend ratio" hexmask.long.byte 0x368 18.--23. 1. " CP2_218R ,Color palette 2_218 red" hexmask.long.byte 0x368 10.--15. 1. " CP2_218G ,Color palette 2_218 green" hexmask.long.byte 0x368 2.--7. 1. " CP2_218B ,Color palette 2_218 blue" line.long 0x36C "CP2_219R,Color Palette 2 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP2_219A ,Color palette 2_219 blend ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP2_219R ,Color palette 2_219 red" hexmask.long.byte 0x36C 10.--15. 1. " CP2_219G ,Color palette 2_219 green" hexmask.long.byte 0x36C 2.--7. 1. " CP2_219B ,Color palette 2_219 blue" line.long 0x370 "CP2_220R,Color Palette 2 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP2_220A ,Color palette 2_220 blend ratio" hexmask.long.byte 0x370 18.--23. 1. " CP2_220R ,Color palette 2_220 red" hexmask.long.byte 0x370 10.--15. 1. " CP2_220G ,Color palette 2_220 green" hexmask.long.byte 0x370 2.--7. 1. " CP2_220B ,Color palette 2_220 blue" line.long 0x374 "CP2_221R,Color Palette 2 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP2_221A ,Color palette 2_221 blend ratio" hexmask.long.byte 0x374 18.--23. 1. " CP2_221R ,Color palette 2_221 red" hexmask.long.byte 0x374 10.--15. 1. " CP2_221G ,Color palette 2_221 green" hexmask.long.byte 0x374 2.--7. 1. " CP2_221B ,Color palette 2_221 blue" line.long 0x378 "CP2_222R,Color Palette 2 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP2_222A ,Color palette 2_222 blend ratio" hexmask.long.byte 0x378 18.--23. 1. " CP2_222R ,Color palette 2_222 red" hexmask.long.byte 0x378 10.--15. 1. " CP2_222G ,Color palette 2_222 green" hexmask.long.byte 0x378 2.--7. 1. " CP2_222B ,Color palette 2_222 blue" line.long 0x37C "CP2_223R,Color Palette 2 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP2_223A ,Color palette 2_223 blend ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP2_223R ,Color palette 2_223 red" hexmask.long.byte 0x37C 10.--15. 1. " CP2_223G ,Color palette 2_223 green" hexmask.long.byte 0x37C 2.--7. 1. " CP2_223B ,Color palette 2_223 blue" line.long 0x380 "CP2_224R,Color Palette 2 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP2_224A ,Color palette 2_224 blend ratio" hexmask.long.byte 0x380 18.--23. 1. " CP2_224R ,Color palette 2_224 red" hexmask.long.byte 0x380 10.--15. 1. " CP2_224G ,Color palette 2_224 green" hexmask.long.byte 0x380 2.--7. 1. " CP2_224B ,Color palette 2_224 blue" line.long 0x384 "CP2_225R,Color Palette 2 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP2_225A ,Color palette 2_225 blend ratio" hexmask.long.byte 0x384 18.--23. 1. " CP2_225R ,Color palette 2_225 red" hexmask.long.byte 0x384 10.--15. 1. " CP2_225G ,Color palette 2_225 green" hexmask.long.byte 0x384 2.--7. 1. " CP2_225B ,Color palette 2_225 blue" line.long 0x388 "CP2_226R,Color Palette 2 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP2_226A ,Color palette 2_226 blend ratio" hexmask.long.byte 0x388 18.--23. 1. " CP2_226R ,Color palette 2_226 red" hexmask.long.byte 0x388 10.--15. 1. " CP2_226G ,Color palette 2_226 green" hexmask.long.byte 0x388 2.--7. 1. " CP2_226B ,Color palette 2_226 blue" line.long 0x38C "CP2_227R,Color Palette 2 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP2_227A ,Color palette 2_227 blend ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP2_227R ,Color palette 2_227 red" hexmask.long.byte 0x38C 10.--15. 1. " CP2_227G ,Color palette 2_227 green" hexmask.long.byte 0x38C 2.--7. 1. " CP2_227B ,Color palette 2_227 blue" line.long 0x390 "CP2_228R,Color Palette 2 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP2_228A ,Color palette 2_228 blend ratio" hexmask.long.byte 0x390 18.--23. 1. " CP2_228R ,Color palette 2_228 red" hexmask.long.byte 0x390 10.--15. 1. " CP2_228G ,Color palette 2_228 green" hexmask.long.byte 0x390 2.--7. 1. " CP2_228B ,Color palette 2_228 blue" line.long 0x394 "CP2_229R,Color Palette 2 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP2_229A ,Color palette 2_229 blend ratio" hexmask.long.byte 0x394 18.--23. 1. " CP2_229R ,Color palette 2_229 red" hexmask.long.byte 0x394 10.--15. 1. " CP2_229G ,Color palette 2_229 green" hexmask.long.byte 0x394 2.--7. 1. " CP2_229B ,Color palette 2_229 blue" line.long 0x398 "CP2_230R,Color Palette 2 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP2_230A ,Color palette 2_230 blend ratio" hexmask.long.byte 0x398 18.--23. 1. " CP2_230R ,Color palette 2_230 red" hexmask.long.byte 0x398 10.--15. 1. " CP2_230G ,Color palette 2_230 green" hexmask.long.byte 0x398 2.--7. 1. " CP2_230B ,Color palette 2_230 blue" line.long 0x39C "CP2_231R,Color Palette 2 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP2_231A ,Color palette 2_231 blend ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP2_231R ,Color palette 2_231 red" hexmask.long.byte 0x39C 10.--15. 1. " CP2_231G ,Color palette 2_231 green" hexmask.long.byte 0x39C 2.--7. 1. " CP2_231B ,Color palette 2_231 blue" line.long 0x3A0 "CP2_232R,Color Palette 2 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP2_232A ,Color palette 2_232 blend ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP2_232R ,Color palette 2_232 red" hexmask.long.byte 0x3A0 10.--15. 1. " CP2_232G ,Color palette 2_232 green" hexmask.long.byte 0x3A0 2.--7. 1. " CP2_232B ,Color palette 2_232 blue" line.long 0x3A4 "CP2_233R,Color Palette 2 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP2_233A ,Color palette 2_233 blend ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP2_233R ,Color palette 2_233 red" hexmask.long.byte 0x3A4 10.--15. 1. " CP2_233G ,Color palette 2_233 green" hexmask.long.byte 0x3A4 2.--7. 1. " CP2_233B ,Color palette 2_233 blue" line.long 0x3A8 "CP2_234R,Color Palette 2 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP2_234A ,Color palette 2_234 blend ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP2_234R ,Color palette 2_234 red" hexmask.long.byte 0x3A8 10.--15. 1. " CP2_234G ,Color palette 2_234 green" hexmask.long.byte 0x3A8 2.--7. 1. " CP2_234B ,Color palette 2_234 blue" line.long 0x3AC "CP2_235R,Color Palette 2 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP2_235A ,Color palette 2_235 blend ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP2_235R ,Color palette 2_235 red" hexmask.long.byte 0x3AC 10.--15. 1. " CP2_235G ,Color palette 2_235 green" hexmask.long.byte 0x3AC 2.--7. 1. " CP2_235B ,Color palette 2_235 blue" line.long 0x3B0 "CP2_236R,Color Palette 2 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP2_236A ,Color palette 2_236 blend ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP2_236R ,Color palette 2_236 red" hexmask.long.byte 0x3B0 10.--15. 1. " CP2_236G ,Color palette 2_236 green" hexmask.long.byte 0x3B0 2.--7. 1. " CP2_236B ,Color palette 2_236 blue" line.long 0x3B4 "CP2_237R,Color Palette 2 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP2_237A ,Color palette 2_237 blend ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP2_237R ,Color palette 2_237 red" hexmask.long.byte 0x3B4 10.--15. 1. " CP2_237G ,Color palette 2_237 green" hexmask.long.byte 0x3B4 2.--7. 1. " CP2_237B ,Color palette 2_237 blue" line.long 0x3B8 "CP2_238R,Color Palette 2 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP2_238A ,Color palette 2_238 blend ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP2_238R ,Color palette 2_238 red" hexmask.long.byte 0x3B8 10.--15. 1. " CP2_238G ,Color palette 2_238 green" hexmask.long.byte 0x3B8 2.--7. 1. " CP2_238B ,Color palette 2_238 blue" line.long 0x3BC "CP2_239R,Color Palette 2 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP2_239A ,Color palette 2_239 blend ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP2_239R ,Color palette 2_239 red" hexmask.long.byte 0x3BC 10.--15. 1. " CP2_239G ,Color palette 2_239 green" hexmask.long.byte 0x3BC 2.--7. 1. " CP2_239B ,Color palette 2_239 blue" line.long 0x3C0 "CP2_240R,Color Palette 2 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP2_240A ,Color palette 2_240 blend ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP2_240R ,Color palette 2_240 red" hexmask.long.byte 0x3C0 10.--15. 1. " CP2_240G ,Color palette 2_240 green" hexmask.long.byte 0x3C0 2.--7. 1. " CP2_240B ,Color palette 2_240 blue" line.long 0x3C4 "CP2_241R,Color Palette 2 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP2_241A ,Color palette 2_241 blend ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP2_241R ,Color palette 2_241 red" hexmask.long.byte 0x3C4 10.--15. 1. " CP2_241G ,Color palette 2_241 green" hexmask.long.byte 0x3C4 2.--7. 1. " CP2_241B ,Color palette 2_241 blue" line.long 0x3C8 "CP2_242R,Color Palette 2 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP2_242A ,Color palette 2_242 blend ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP2_242R ,Color palette 2_242 red" hexmask.long.byte 0x3C8 10.--15. 1. " CP2_242G ,Color palette 2_242 green" hexmask.long.byte 0x3C8 2.--7. 1. " CP2_242B ,Color palette 2_242 blue" line.long 0x3CC "CP2_243R,Color Palette 2 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP2_243A ,Color palette 2_243 blend ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP2_243R ,Color palette 2_243 red" hexmask.long.byte 0x3CC 10.--15. 1. " CP2_243G ,Color palette 2_243 green" hexmask.long.byte 0x3CC 2.--7. 1. " CP2_243B ,Color palette 2_243 blue" line.long 0x3D0 "CP2_244R,Color Palette 2 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP2_244A ,Color palette 2_244 blend ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP2_244R ,Color palette 2_244 red" hexmask.long.byte 0x3D0 10.--15. 1. " CP2_244G ,Color palette 2_244 green" hexmask.long.byte 0x3D0 2.--7. 1. " CP2_244B ,Color palette 2_244 blue" line.long 0x3D4 "CP2_245R,Color Palette 2 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP2_245A ,Color palette 2_245 blend ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP2_245R ,Color palette 2_245 red" hexmask.long.byte 0x3D4 10.--15. 1. " CP2_245G ,Color palette 2_245 green" hexmask.long.byte 0x3D4 2.--7. 1. " CP2_245B ,Color palette 2_245 blue" line.long 0x3D8 "CP2_246R,Color Palette 2 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP2_246A ,Color palette 2_246 blend ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP2_246R ,Color palette 2_246 red" hexmask.long.byte 0x3D8 10.--15. 1. " CP2_246G ,Color palette 2_246 green" hexmask.long.byte 0x3D8 2.--7. 1. " CP2_246B ,Color palette 2_246 blue" line.long 0x3DC "CP2_247R,Color Palette 2 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP2_247A ,Color palette 2_247 blend ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP2_247R ,Color palette 2_247 red" hexmask.long.byte 0x3DC 10.--15. 1. " CP2_247G ,Color palette 2_247 green" hexmask.long.byte 0x3DC 2.--7. 1. " CP2_247B ,Color palette 2_247 blue" line.long 0x3E0 "CP2_248R,Color Palette 2 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP2_248A ,Color palette 2_248 blend ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP2_248R ,Color palette 2_248 red" hexmask.long.byte 0x3E0 10.--15. 1. " CP2_248G ,Color palette 2_248 green" hexmask.long.byte 0x3E0 2.--7. 1. " CP2_248B ,Color palette 2_248 blue" line.long 0x3E4 "CP2_249R,Color Palette 2 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP2_249A ,Color palette 2_249 blend ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP2_249R ,Color palette 2_249 red" hexmask.long.byte 0x3E4 10.--15. 1. " CP2_249G ,Color palette 2_249 green" hexmask.long.byte 0x3E4 2.--7. 1. " CP2_249B ,Color palette 2_249 blue" line.long 0x3E8 "CP2_250R,Color Palette 2 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP2_250A ,Color palette 2_250 blend ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP2_250R ,Color palette 2_250 red" hexmask.long.byte 0x3E8 10.--15. 1. " CP2_250G ,Color palette 2_250 green" hexmask.long.byte 0x3E8 2.--7. 1. " CP2_250B ,Color palette 2_250 blue" line.long 0x3EC "CP2_251R,Color Palette 2 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP2_251A ,Color palette 2_251 blend ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP2_251R ,Color palette 2_251 red" hexmask.long.byte 0x3EC 10.--15. 1. " CP2_251G ,Color palette 2_251 green" hexmask.long.byte 0x3EC 2.--7. 1. " CP2_251B ,Color palette 2_251 blue" line.long 0x3F0 "CP2_252R,Color Palette 2 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP2_252A ,Color palette 2_252 blend ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP2_252R ,Color palette 2_252 red" hexmask.long.byte 0x3F0 10.--15. 1. " CP2_252G ,Color palette 2_252 green" hexmask.long.byte 0x3F0 2.--7. 1. " CP2_252B ,Color palette 2_252 blue" line.long 0x3F4 "CP2_253R,Color Palette 2 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP2_253A ,Color palette 2_253 blend ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP2_253R ,Color palette 2_253 red" hexmask.long.byte 0x3F4 10.--15. 1. " CP2_253G ,Color palette 2_253 green" hexmask.long.byte 0x3F4 2.--7. 1. " CP2_253B ,Color palette 2_253 blue" line.long 0x3F8 "CP2_254R,Color Palette 2 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP2_254A ,Color palette 2_254 blend ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP2_254R ,Color palette 2_254 red" hexmask.long.byte 0x3F8 10.--15. 1. " CP2_254G ,Color palette 2_254 green" hexmask.long.byte 0x3F8 2.--7. 1. " CP2_254B ,Color palette 2_254 blue" line.long 0x3FC "CP2_255R,Color Palette 2 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP2_255A ,Color palette 2_255 blend ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP2_255R ,Color palette 2_255 red" hexmask.long.byte 0x3FC 10.--15. 1. " CP2_255G ,Color palette 2_255 green" hexmask.long.byte 0x3FC 2.--7. 1. " CP2_255B ,Color palette 2_255 blue" tree.end tree "Color Palette 3 Registers" width 10. group.long 0x3000++0x3ff line.long 0x0 "CP3_0 R,Color Palette 3 Register 0 " hexmask.long.byte 0x0 24.--31. 1. " CP3_0 A ,Color palette 3_0 blend ratio" hexmask.long.byte 0x0 18.--23. 1. " CP3_0 R ,Color palette 3_0 red" hexmask.long.byte 0x0 10.--15. 1. " CP3_0 G ,Color palette 3_0 green" hexmask.long.byte 0x0 2.--7. 1. " CP3_0 B ,Color palette 3_0 blue" line.long 0x4 "CP3_1 R,Color Palette 3 Register 1 " hexmask.long.byte 0x4 24.--31. 1. " CP3_1 A ,Color palette 3_1 blend ratio" hexmask.long.byte 0x4 18.--23. 1. " CP3_1 R ,Color palette 3_1 red" hexmask.long.byte 0x4 10.--15. 1. " CP3_1 G ,Color palette 3_1 green" hexmask.long.byte 0x4 2.--7. 1. " CP3_1 B ,Color palette 3_1 blue" line.long 0x8 "CP3_2 R,Color Palette 3 Register 2 " hexmask.long.byte 0x8 24.--31. 1. " CP3_2 A ,Color palette 3_2 blend ratio" hexmask.long.byte 0x8 18.--23. 1. " CP3_2 R ,Color palette 3_2 red" hexmask.long.byte 0x8 10.--15. 1. " CP3_2 G ,Color palette 3_2 green" hexmask.long.byte 0x8 2.--7. 1. " CP3_2 B ,Color palette 3_2 blue" line.long 0xC "CP3_3 R,Color Palette 3 Register 3 " hexmask.long.byte 0xC 24.--31. 1. " CP3_3 A ,Color palette 3_3 blend ratio" hexmask.long.byte 0xC 18.--23. 1. " CP3_3 R ,Color palette 3_3 red" hexmask.long.byte 0xC 10.--15. 1. " CP3_3 G ,Color palette 3_3 green" hexmask.long.byte 0xC 2.--7. 1. " CP3_3 B ,Color palette 3_3 blue" line.long 0x10 "CP3_4 R,Color Palette 3 Register 4 " hexmask.long.byte 0x10 24.--31. 1. " CP3_4 A ,Color palette 3_4 blend ratio" hexmask.long.byte 0x10 18.--23. 1. " CP3_4 R ,Color palette 3_4 red" hexmask.long.byte 0x10 10.--15. 1. " CP3_4 G ,Color palette 3_4 green" hexmask.long.byte 0x10 2.--7. 1. " CP3_4 B ,Color palette 3_4 blue" line.long 0x14 "CP3_5 R,Color Palette 3 Register 5 " hexmask.long.byte 0x14 24.--31. 1. " CP3_5 A ,Color palette 3_5 blend ratio" hexmask.long.byte 0x14 18.--23. 1. " CP3_5 R ,Color palette 3_5 red" hexmask.long.byte 0x14 10.--15. 1. " CP3_5 G ,Color palette 3_5 green" hexmask.long.byte 0x14 2.--7. 1. " CP3_5 B ,Color palette 3_5 blue" line.long 0x18 "CP3_6 R,Color Palette 3 Register 6 " hexmask.long.byte 0x18 24.--31. 1. " CP3_6 A ,Color palette 3_6 blend ratio" hexmask.long.byte 0x18 18.--23. 1. " CP3_6 R ,Color palette 3_6 red" hexmask.long.byte 0x18 10.--15. 1. " CP3_6 G ,Color palette 3_6 green" hexmask.long.byte 0x18 2.--7. 1. " CP3_6 B ,Color palette 3_6 blue" line.long 0x1C "CP3_7 R,Color Palette 3 Register 7 " hexmask.long.byte 0x1C 24.--31. 1. " CP3_7 A ,Color palette 3_7 blend ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP3_7 R ,Color palette 3_7 red" hexmask.long.byte 0x1C 10.--15. 1. " CP3_7 G ,Color palette 3_7 green" hexmask.long.byte 0x1C 2.--7. 1. " CP3_7 B ,Color palette 3_7 blue" line.long 0x20 "CP3_8 R,Color Palette 3 Register 8 " hexmask.long.byte 0x20 24.--31. 1. " CP3_8 A ,Color palette 3_8 blend ratio" hexmask.long.byte 0x20 18.--23. 1. " CP3_8 R ,Color palette 3_8 red" hexmask.long.byte 0x20 10.--15. 1. " CP3_8 G ,Color palette 3_8 green" hexmask.long.byte 0x20 2.--7. 1. " CP3_8 B ,Color palette 3_8 blue" line.long 0x24 "CP3_9 R,Color Palette 3 Register 9 " hexmask.long.byte 0x24 24.--31. 1. " CP3_9 A ,Color palette 3_9 blend ratio" hexmask.long.byte 0x24 18.--23. 1. " CP3_9 R ,Color palette 3_9 red" hexmask.long.byte 0x24 10.--15. 1. " CP3_9 G ,Color palette 3_9 green" hexmask.long.byte 0x24 2.--7. 1. " CP3_9 B ,Color palette 3_9 blue" line.long 0x28 "CP3_10 R,Color Palette 3 Register 10 " hexmask.long.byte 0x28 24.--31. 1. " CP3_10 A ,Color palette 3_10 blend ratio" hexmask.long.byte 0x28 18.--23. 1. " CP3_10 R ,Color palette 3_10 red" hexmask.long.byte 0x28 10.--15. 1. " CP3_10 G ,Color palette 3_10 green" hexmask.long.byte 0x28 2.--7. 1. " CP3_10 B ,Color palette 3_10 blue" line.long 0x2C "CP3_11 R,Color Palette 3 Register 11 " hexmask.long.byte 0x2C 24.--31. 1. " CP3_11 A ,Color palette 3_11 blend ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP3_11 R ,Color palette 3_11 red" hexmask.long.byte 0x2C 10.--15. 1. " CP3_11 G ,Color palette 3_11 green" hexmask.long.byte 0x2C 2.--7. 1. " CP3_11 B ,Color palette 3_11 blue" line.long 0x30 "CP3_12 R,Color Palette 3 Register 12 " hexmask.long.byte 0x30 24.--31. 1. " CP3_12 A ,Color palette 3_12 blend ratio" hexmask.long.byte 0x30 18.--23. 1. " CP3_12 R ,Color palette 3_12 red" hexmask.long.byte 0x30 10.--15. 1. " CP3_12 G ,Color palette 3_12 green" hexmask.long.byte 0x30 2.--7. 1. " CP3_12 B ,Color palette 3_12 blue" line.long 0x34 "CP3_13 R,Color Palette 3 Register 13 " hexmask.long.byte 0x34 24.--31. 1. " CP3_13 A ,Color palette 3_13 blend ratio" hexmask.long.byte 0x34 18.--23. 1. " CP3_13 R ,Color palette 3_13 red" hexmask.long.byte 0x34 10.--15. 1. " CP3_13 G ,Color palette 3_13 green" hexmask.long.byte 0x34 2.--7. 1. " CP3_13 B ,Color palette 3_13 blue" line.long 0x38 "CP3_14 R,Color Palette 3 Register 14 " hexmask.long.byte 0x38 24.--31. 1. " CP3_14 A ,Color palette 3_14 blend ratio" hexmask.long.byte 0x38 18.--23. 1. " CP3_14 R ,Color palette 3_14 red" hexmask.long.byte 0x38 10.--15. 1. " CP3_14 G ,Color palette 3_14 green" hexmask.long.byte 0x38 2.--7. 1. " CP3_14 B ,Color palette 3_14 blue" line.long 0x3C "CP3_15 R,Color Palette 3 Register 15 " hexmask.long.byte 0x3C 24.--31. 1. " CP3_15 A ,Color palette 3_15 blend ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP3_15 R ,Color palette 3_15 red" hexmask.long.byte 0x3C 10.--15. 1. " CP3_15 G ,Color palette 3_15 green" hexmask.long.byte 0x3C 2.--7. 1. " CP3_15 B ,Color palette 3_15 blue" line.long 0x40 "CP3_16 R,Color Palette 3 Register 16 " hexmask.long.byte 0x40 24.--31. 1. " CP3_16 A ,Color palette 3_16 blend ratio" hexmask.long.byte 0x40 18.--23. 1. " CP3_16 R ,Color palette 3_16 red" hexmask.long.byte 0x40 10.--15. 1. " CP3_16 G ,Color palette 3_16 green" hexmask.long.byte 0x40 2.--7. 1. " CP3_16 B ,Color palette 3_16 blue" line.long 0x44 "CP3_17 R,Color Palette 3 Register 17 " hexmask.long.byte 0x44 24.--31. 1. " CP3_17 A ,Color palette 3_17 blend ratio" hexmask.long.byte 0x44 18.--23. 1. " CP3_17 R ,Color palette 3_17 red" hexmask.long.byte 0x44 10.--15. 1. " CP3_17 G ,Color palette 3_17 green" hexmask.long.byte 0x44 2.--7. 1. " CP3_17 B ,Color palette 3_17 blue" line.long 0x48 "CP3_18 R,Color Palette 3 Register 18 " hexmask.long.byte 0x48 24.--31. 1. " CP3_18 A ,Color palette 3_18 blend ratio" hexmask.long.byte 0x48 18.--23. 1. " CP3_18 R ,Color palette 3_18 red" hexmask.long.byte 0x48 10.--15. 1. " CP3_18 G ,Color palette 3_18 green" hexmask.long.byte 0x48 2.--7. 1. " CP3_18 B ,Color palette 3_18 blue" line.long 0x4C "CP3_19 R,Color Palette 3 Register 19 " hexmask.long.byte 0x4C 24.--31. 1. " CP3_19 A ,Color palette 3_19 blend ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP3_19 R ,Color palette 3_19 red" hexmask.long.byte 0x4C 10.--15. 1. " CP3_19 G ,Color palette 3_19 green" hexmask.long.byte 0x4C 2.--7. 1. " CP3_19 B ,Color palette 3_19 blue" line.long 0x50 "CP3_20 R,Color Palette 3 Register 20 " hexmask.long.byte 0x50 24.--31. 1. " CP3_20 A ,Color palette 3_20 blend ratio" hexmask.long.byte 0x50 18.--23. 1. " CP3_20 R ,Color palette 3_20 red" hexmask.long.byte 0x50 10.--15. 1. " CP3_20 G ,Color palette 3_20 green" hexmask.long.byte 0x50 2.--7. 1. " CP3_20 B ,Color palette 3_20 blue" line.long 0x54 "CP3_21 R,Color Palette 3 Register 21 " hexmask.long.byte 0x54 24.--31. 1. " CP3_21 A ,Color palette 3_21 blend ratio" hexmask.long.byte 0x54 18.--23. 1. " CP3_21 R ,Color palette 3_21 red" hexmask.long.byte 0x54 10.--15. 1. " CP3_21 G ,Color palette 3_21 green" hexmask.long.byte 0x54 2.--7. 1. " CP3_21 B ,Color palette 3_21 blue" line.long 0x58 "CP3_22 R,Color Palette 3 Register 22 " hexmask.long.byte 0x58 24.--31. 1. " CP3_22 A ,Color palette 3_22 blend ratio" hexmask.long.byte 0x58 18.--23. 1. " CP3_22 R ,Color palette 3_22 red" hexmask.long.byte 0x58 10.--15. 1. " CP3_22 G ,Color palette 3_22 green" hexmask.long.byte 0x58 2.--7. 1. " CP3_22 B ,Color palette 3_22 blue" line.long 0x5C "CP3_23 R,Color Palette 3 Register 23 " hexmask.long.byte 0x5C 24.--31. 1. " CP3_23 A ,Color palette 3_23 blend ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP3_23 R ,Color palette 3_23 red" hexmask.long.byte 0x5C 10.--15. 1. " CP3_23 G ,Color palette 3_23 green" hexmask.long.byte 0x5C 2.--7. 1. " CP3_23 B ,Color palette 3_23 blue" line.long 0x60 "CP3_24 R,Color Palette 3 Register 24 " hexmask.long.byte 0x60 24.--31. 1. " CP3_24 A ,Color palette 3_24 blend ratio" hexmask.long.byte 0x60 18.--23. 1. " CP3_24 R ,Color palette 3_24 red" hexmask.long.byte 0x60 10.--15. 1. " CP3_24 G ,Color palette 3_24 green" hexmask.long.byte 0x60 2.--7. 1. " CP3_24 B ,Color palette 3_24 blue" line.long 0x64 "CP3_25 R,Color Palette 3 Register 25 " hexmask.long.byte 0x64 24.--31. 1. " CP3_25 A ,Color palette 3_25 blend ratio" hexmask.long.byte 0x64 18.--23. 1. " CP3_25 R ,Color palette 3_25 red" hexmask.long.byte 0x64 10.--15. 1. " CP3_25 G ,Color palette 3_25 green" hexmask.long.byte 0x64 2.--7. 1. " CP3_25 B ,Color palette 3_25 blue" line.long 0x68 "CP3_26 R,Color Palette 3 Register 26 " hexmask.long.byte 0x68 24.--31. 1. " CP3_26 A ,Color palette 3_26 blend ratio" hexmask.long.byte 0x68 18.--23. 1. " CP3_26 R ,Color palette 3_26 red" hexmask.long.byte 0x68 10.--15. 1. " CP3_26 G ,Color palette 3_26 green" hexmask.long.byte 0x68 2.--7. 1. " CP3_26 B ,Color palette 3_26 blue" line.long 0x6C "CP3_27 R,Color Palette 3 Register 27 " hexmask.long.byte 0x6C 24.--31. 1. " CP3_27 A ,Color palette 3_27 blend ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP3_27 R ,Color palette 3_27 red" hexmask.long.byte 0x6C 10.--15. 1. " CP3_27 G ,Color palette 3_27 green" hexmask.long.byte 0x6C 2.--7. 1. " CP3_27 B ,Color palette 3_27 blue" line.long 0x70 "CP3_28 R,Color Palette 3 Register 28 " hexmask.long.byte 0x70 24.--31. 1. " CP3_28 A ,Color palette 3_28 blend ratio" hexmask.long.byte 0x70 18.--23. 1. " CP3_28 R ,Color palette 3_28 red" hexmask.long.byte 0x70 10.--15. 1. " CP3_28 G ,Color palette 3_28 green" hexmask.long.byte 0x70 2.--7. 1. " CP3_28 B ,Color palette 3_28 blue" line.long 0x74 "CP3_29 R,Color Palette 3 Register 29 " hexmask.long.byte 0x74 24.--31. 1. " CP3_29 A ,Color palette 3_29 blend ratio" hexmask.long.byte 0x74 18.--23. 1. " CP3_29 R ,Color palette 3_29 red" hexmask.long.byte 0x74 10.--15. 1. " CP3_29 G ,Color palette 3_29 green" hexmask.long.byte 0x74 2.--7. 1. " CP3_29 B ,Color palette 3_29 blue" line.long 0x78 "CP3_30 R,Color Palette 3 Register 30 " hexmask.long.byte 0x78 24.--31. 1. " CP3_30 A ,Color palette 3_30 blend ratio" hexmask.long.byte 0x78 18.--23. 1. " CP3_30 R ,Color palette 3_30 red" hexmask.long.byte 0x78 10.--15. 1. " CP3_30 G ,Color palette 3_30 green" hexmask.long.byte 0x78 2.--7. 1. " CP3_30 B ,Color palette 3_30 blue" line.long 0x7C "CP3_31 R,Color Palette 3 Register 31 " hexmask.long.byte 0x7C 24.--31. 1. " CP3_31 A ,Color palette 3_31 blend ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP3_31 R ,Color palette 3_31 red" hexmask.long.byte 0x7C 10.--15. 1. " CP3_31 G ,Color palette 3_31 green" hexmask.long.byte 0x7C 2.--7. 1. " CP3_31 B ,Color palette 3_31 blue" line.long 0x80 "CP3_32 R,Color Palette 3 Register 32 " hexmask.long.byte 0x80 24.--31. 1. " CP3_32 A ,Color palette 3_32 blend ratio" hexmask.long.byte 0x80 18.--23. 1. " CP3_32 R ,Color palette 3_32 red" hexmask.long.byte 0x80 10.--15. 1. " CP3_32 G ,Color palette 3_32 green" hexmask.long.byte 0x80 2.--7. 1. " CP3_32 B ,Color palette 3_32 blue" line.long 0x84 "CP3_33 R,Color Palette 3 Register 33 " hexmask.long.byte 0x84 24.--31. 1. " CP3_33 A ,Color palette 3_33 blend ratio" hexmask.long.byte 0x84 18.--23. 1. " CP3_33 R ,Color palette 3_33 red" hexmask.long.byte 0x84 10.--15. 1. " CP3_33 G ,Color palette 3_33 green" hexmask.long.byte 0x84 2.--7. 1. " CP3_33 B ,Color palette 3_33 blue" line.long 0x88 "CP3_34 R,Color Palette 3 Register 34 " hexmask.long.byte 0x88 24.--31. 1. " CP3_34 A ,Color palette 3_34 blend ratio" hexmask.long.byte 0x88 18.--23. 1. " CP3_34 R ,Color palette 3_34 red" hexmask.long.byte 0x88 10.--15. 1. " CP3_34 G ,Color palette 3_34 green" hexmask.long.byte 0x88 2.--7. 1. " CP3_34 B ,Color palette 3_34 blue" line.long 0x8C "CP3_35 R,Color Palette 3 Register 35 " hexmask.long.byte 0x8C 24.--31. 1. " CP3_35 A ,Color palette 3_35 blend ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP3_35 R ,Color palette 3_35 red" hexmask.long.byte 0x8C 10.--15. 1. " CP3_35 G ,Color palette 3_35 green" hexmask.long.byte 0x8C 2.--7. 1. " CP3_35 B ,Color palette 3_35 blue" line.long 0x90 "CP3_36 R,Color Palette 3 Register 36 " hexmask.long.byte 0x90 24.--31. 1. " CP3_36 A ,Color palette 3_36 blend ratio" hexmask.long.byte 0x90 18.--23. 1. " CP3_36 R ,Color palette 3_36 red" hexmask.long.byte 0x90 10.--15. 1. " CP3_36 G ,Color palette 3_36 green" hexmask.long.byte 0x90 2.--7. 1. " CP3_36 B ,Color palette 3_36 blue" line.long 0x94 "CP3_37 R,Color Palette 3 Register 37 " hexmask.long.byte 0x94 24.--31. 1. " CP3_37 A ,Color palette 3_37 blend ratio" hexmask.long.byte 0x94 18.--23. 1. " CP3_37 R ,Color palette 3_37 red" hexmask.long.byte 0x94 10.--15. 1. " CP3_37 G ,Color palette 3_37 green" hexmask.long.byte 0x94 2.--7. 1. " CP3_37 B ,Color palette 3_37 blue" line.long 0x98 "CP3_38 R,Color Palette 3 Register 38 " hexmask.long.byte 0x98 24.--31. 1. " CP3_38 A ,Color palette 3_38 blend ratio" hexmask.long.byte 0x98 18.--23. 1. " CP3_38 R ,Color palette 3_38 red" hexmask.long.byte 0x98 10.--15. 1. " CP3_38 G ,Color palette 3_38 green" hexmask.long.byte 0x98 2.--7. 1. " CP3_38 B ,Color palette 3_38 blue" line.long 0x9C "CP3_39 R,Color Palette 3 Register 39 " hexmask.long.byte 0x9C 24.--31. 1. " CP3_39 A ,Color palette 3_39 blend ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP3_39 R ,Color palette 3_39 red" hexmask.long.byte 0x9C 10.--15. 1. " CP3_39 G ,Color palette 3_39 green" hexmask.long.byte 0x9C 2.--7. 1. " CP3_39 B ,Color palette 3_39 blue" line.long 0xA0 "CP3_40 R,Color Palette 3 Register 40 " hexmask.long.byte 0xA0 24.--31. 1. " CP3_40 A ,Color palette 3_40 blend ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP3_40 R ,Color palette 3_40 red" hexmask.long.byte 0xA0 10.--15. 1. " CP3_40 G ,Color palette 3_40 green" hexmask.long.byte 0xA0 2.--7. 1. " CP3_40 B ,Color palette 3_40 blue" line.long 0xA4 "CP3_41 R,Color Palette 3 Register 41 " hexmask.long.byte 0xA4 24.--31. 1. " CP3_41 A ,Color palette 3_41 blend ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP3_41 R ,Color palette 3_41 red" hexmask.long.byte 0xA4 10.--15. 1. " CP3_41 G ,Color palette 3_41 green" hexmask.long.byte 0xA4 2.--7. 1. " CP3_41 B ,Color palette 3_41 blue" line.long 0xA8 "CP3_42 R,Color Palette 3 Register 42 " hexmask.long.byte 0xA8 24.--31. 1. " CP3_42 A ,Color palette 3_42 blend ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP3_42 R ,Color palette 3_42 red" hexmask.long.byte 0xA8 10.--15. 1. " CP3_42 G ,Color palette 3_42 green" hexmask.long.byte 0xA8 2.--7. 1. " CP3_42 B ,Color palette 3_42 blue" line.long 0xAC "CP3_43 R,Color Palette 3 Register 43 " hexmask.long.byte 0xAC 24.--31. 1. " CP3_43 A ,Color palette 3_43 blend ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP3_43 R ,Color palette 3_43 red" hexmask.long.byte 0xAC 10.--15. 1. " CP3_43 G ,Color palette 3_43 green" hexmask.long.byte 0xAC 2.--7. 1. " CP3_43 B ,Color palette 3_43 blue" line.long 0xB0 "CP3_44 R,Color Palette 3 Register 44 " hexmask.long.byte 0xB0 24.--31. 1. " CP3_44 A ,Color palette 3_44 blend ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP3_44 R ,Color palette 3_44 red" hexmask.long.byte 0xB0 10.--15. 1. " CP3_44 G ,Color palette 3_44 green" hexmask.long.byte 0xB0 2.--7. 1. " CP3_44 B ,Color palette 3_44 blue" line.long 0xB4 "CP3_45 R,Color Palette 3 Register 45 " hexmask.long.byte 0xB4 24.--31. 1. " CP3_45 A ,Color palette 3_45 blend ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP3_45 R ,Color palette 3_45 red" hexmask.long.byte 0xB4 10.--15. 1. " CP3_45 G ,Color palette 3_45 green" hexmask.long.byte 0xB4 2.--7. 1. " CP3_45 B ,Color palette 3_45 blue" line.long 0xB8 "CP3_46 R,Color Palette 3 Register 46 " hexmask.long.byte 0xB8 24.--31. 1. " CP3_46 A ,Color palette 3_46 blend ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP3_46 R ,Color palette 3_46 red" hexmask.long.byte 0xB8 10.--15. 1. " CP3_46 G ,Color palette 3_46 green" hexmask.long.byte 0xB8 2.--7. 1. " CP3_46 B ,Color palette 3_46 blue" line.long 0xBC "CP3_47 R,Color Palette 3 Register 47 " hexmask.long.byte 0xBC 24.--31. 1. " CP3_47 A ,Color palette 3_47 blend ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP3_47 R ,Color palette 3_47 red" hexmask.long.byte 0xBC 10.--15. 1. " CP3_47 G ,Color palette 3_47 green" hexmask.long.byte 0xBC 2.--7. 1. " CP3_47 B ,Color palette 3_47 blue" line.long 0xC0 "CP3_48 R,Color Palette 3 Register 48 " hexmask.long.byte 0xC0 24.--31. 1. " CP3_48 A ,Color palette 3_48 blend ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP3_48 R ,Color palette 3_48 red" hexmask.long.byte 0xC0 10.--15. 1. " CP3_48 G ,Color palette 3_48 green" hexmask.long.byte 0xC0 2.--7. 1. " CP3_48 B ,Color palette 3_48 blue" line.long 0xC4 "CP3_49 R,Color Palette 3 Register 49 " hexmask.long.byte 0xC4 24.--31. 1. " CP3_49 A ,Color palette 3_49 blend ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP3_49 R ,Color palette 3_49 red" hexmask.long.byte 0xC4 10.--15. 1. " CP3_49 G ,Color palette 3_49 green" hexmask.long.byte 0xC4 2.--7. 1. " CP3_49 B ,Color palette 3_49 blue" line.long 0xC8 "CP3_50 R,Color Palette 3 Register 50 " hexmask.long.byte 0xC8 24.--31. 1. " CP3_50 A ,Color palette 3_50 blend ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP3_50 R ,Color palette 3_50 red" hexmask.long.byte 0xC8 10.--15. 1. " CP3_50 G ,Color palette 3_50 green" hexmask.long.byte 0xC8 2.--7. 1. " CP3_50 B ,Color palette 3_50 blue" line.long 0xCC "CP3_51 R,Color Palette 3 Register 51 " hexmask.long.byte 0xCC 24.--31. 1. " CP3_51 A ,Color palette 3_51 blend ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP3_51 R ,Color palette 3_51 red" hexmask.long.byte 0xCC 10.--15. 1. " CP3_51 G ,Color palette 3_51 green" hexmask.long.byte 0xCC 2.--7. 1. " CP3_51 B ,Color palette 3_51 blue" line.long 0xD0 "CP3_52 R,Color Palette 3 Register 52 " hexmask.long.byte 0xD0 24.--31. 1. " CP3_52 A ,Color palette 3_52 blend ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP3_52 R ,Color palette 3_52 red" hexmask.long.byte 0xD0 10.--15. 1. " CP3_52 G ,Color palette 3_52 green" hexmask.long.byte 0xD0 2.--7. 1. " CP3_52 B ,Color palette 3_52 blue" line.long 0xD4 "CP3_53 R,Color Palette 3 Register 53 " hexmask.long.byte 0xD4 24.--31. 1. " CP3_53 A ,Color palette 3_53 blend ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP3_53 R ,Color palette 3_53 red" hexmask.long.byte 0xD4 10.--15. 1. " CP3_53 G ,Color palette 3_53 green" hexmask.long.byte 0xD4 2.--7. 1. " CP3_53 B ,Color palette 3_53 blue" line.long 0xD8 "CP3_54 R,Color Palette 3 Register 54 " hexmask.long.byte 0xD8 24.--31. 1. " CP3_54 A ,Color palette 3_54 blend ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP3_54 R ,Color palette 3_54 red" hexmask.long.byte 0xD8 10.--15. 1. " CP3_54 G ,Color palette 3_54 green" hexmask.long.byte 0xD8 2.--7. 1. " CP3_54 B ,Color palette 3_54 blue" line.long 0xDC "CP3_55 R,Color Palette 3 Register 55 " hexmask.long.byte 0xDC 24.--31. 1. " CP3_55 A ,Color palette 3_55 blend ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP3_55 R ,Color palette 3_55 red" hexmask.long.byte 0xDC 10.--15. 1. " CP3_55 G ,Color palette 3_55 green" hexmask.long.byte 0xDC 2.--7. 1. " CP3_55 B ,Color palette 3_55 blue" line.long 0xE0 "CP3_56 R,Color Palette 3 Register 56 " hexmask.long.byte 0xE0 24.--31. 1. " CP3_56 A ,Color palette 3_56 blend ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP3_56 R ,Color palette 3_56 red" hexmask.long.byte 0xE0 10.--15. 1. " CP3_56 G ,Color palette 3_56 green" hexmask.long.byte 0xE0 2.--7. 1. " CP3_56 B ,Color palette 3_56 blue" line.long 0xE4 "CP3_57 R,Color Palette 3 Register 57 " hexmask.long.byte 0xE4 24.--31. 1. " CP3_57 A ,Color palette 3_57 blend ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP3_57 R ,Color palette 3_57 red" hexmask.long.byte 0xE4 10.--15. 1. " CP3_57 G ,Color palette 3_57 green" hexmask.long.byte 0xE4 2.--7. 1. " CP3_57 B ,Color palette 3_57 blue" line.long 0xE8 "CP3_58 R,Color Palette 3 Register 58 " hexmask.long.byte 0xE8 24.--31. 1. " CP3_58 A ,Color palette 3_58 blend ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP3_58 R ,Color palette 3_58 red" hexmask.long.byte 0xE8 10.--15. 1. " CP3_58 G ,Color palette 3_58 green" hexmask.long.byte 0xE8 2.--7. 1. " CP3_58 B ,Color palette 3_58 blue" line.long 0xEC "CP3_59 R,Color Palette 3 Register 59 " hexmask.long.byte 0xEC 24.--31. 1. " CP3_59 A ,Color palette 3_59 blend ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP3_59 R ,Color palette 3_59 red" hexmask.long.byte 0xEC 10.--15. 1. " CP3_59 G ,Color palette 3_59 green" hexmask.long.byte 0xEC 2.--7. 1. " CP3_59 B ,Color palette 3_59 blue" line.long 0xF0 "CP3_60 R,Color Palette 3 Register 60 " hexmask.long.byte 0xF0 24.--31. 1. " CP3_60 A ,Color palette 3_60 blend ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP3_60 R ,Color palette 3_60 red" hexmask.long.byte 0xF0 10.--15. 1. " CP3_60 G ,Color palette 3_60 green" hexmask.long.byte 0xF0 2.--7. 1. " CP3_60 B ,Color palette 3_60 blue" line.long 0xF4 "CP3_61 R,Color Palette 3 Register 61 " hexmask.long.byte 0xF4 24.--31. 1. " CP3_61 A ,Color palette 3_61 blend ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP3_61 R ,Color palette 3_61 red" hexmask.long.byte 0xF4 10.--15. 1. " CP3_61 G ,Color palette 3_61 green" hexmask.long.byte 0xF4 2.--7. 1. " CP3_61 B ,Color palette 3_61 blue" line.long 0xF8 "CP3_62 R,Color Palette 3 Register 62 " hexmask.long.byte 0xF8 24.--31. 1. " CP3_62 A ,Color palette 3_62 blend ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP3_62 R ,Color palette 3_62 red" hexmask.long.byte 0xF8 10.--15. 1. " CP3_62 G ,Color palette 3_62 green" hexmask.long.byte 0xF8 2.--7. 1. " CP3_62 B ,Color palette 3_62 blue" line.long 0xFC "CP3_63 R,Color Palette 3 Register 63 " hexmask.long.byte 0xFC 24.--31. 1. " CP3_63 A ,Color palette 3_63 blend ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP3_63 R ,Color palette 3_63 red" hexmask.long.byte 0xFC 10.--15. 1. " CP3_63 G ,Color palette 3_63 green" hexmask.long.byte 0xFC 2.--7. 1. " CP3_63 B ,Color palette 3_63 blue" line.long 0x100 "CP3_64 R,Color Palette 3 Register 64 " hexmask.long.byte 0x100 24.--31. 1. " CP3_64 A ,Color palette 3_64 blend ratio" hexmask.long.byte 0x100 18.--23. 1. " CP3_64 R ,Color palette 3_64 red" hexmask.long.byte 0x100 10.--15. 1. " CP3_64 G ,Color palette 3_64 green" hexmask.long.byte 0x100 2.--7. 1. " CP3_64 B ,Color palette 3_64 blue" line.long 0x104 "CP3_65 R,Color Palette 3 Register 65 " hexmask.long.byte 0x104 24.--31. 1. " CP3_65 A ,Color palette 3_65 blend ratio" hexmask.long.byte 0x104 18.--23. 1. " CP3_65 R ,Color palette 3_65 red" hexmask.long.byte 0x104 10.--15. 1. " CP3_65 G ,Color palette 3_65 green" hexmask.long.byte 0x104 2.--7. 1. " CP3_65 B ,Color palette 3_65 blue" line.long 0x108 "CP3_66 R,Color Palette 3 Register 66 " hexmask.long.byte 0x108 24.--31. 1. " CP3_66 A ,Color palette 3_66 blend ratio" hexmask.long.byte 0x108 18.--23. 1. " CP3_66 R ,Color palette 3_66 red" hexmask.long.byte 0x108 10.--15. 1. " CP3_66 G ,Color palette 3_66 green" hexmask.long.byte 0x108 2.--7. 1. " CP3_66 B ,Color palette 3_66 blue" line.long 0x10C "CP3_67 R,Color Palette 3 Register 67 " hexmask.long.byte 0x10C 24.--31. 1. " CP3_67 A ,Color palette 3_67 blend ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP3_67 R ,Color palette 3_67 red" hexmask.long.byte 0x10C 10.--15. 1. " CP3_67 G ,Color palette 3_67 green" hexmask.long.byte 0x10C 2.--7. 1. " CP3_67 B ,Color palette 3_67 blue" line.long 0x110 "CP3_68 R,Color Palette 3 Register 68 " hexmask.long.byte 0x110 24.--31. 1. " CP3_68 A ,Color palette 3_68 blend ratio" hexmask.long.byte 0x110 18.--23. 1. " CP3_68 R ,Color palette 3_68 red" hexmask.long.byte 0x110 10.--15. 1. " CP3_68 G ,Color palette 3_68 green" hexmask.long.byte 0x110 2.--7. 1. " CP3_68 B ,Color palette 3_68 blue" line.long 0x114 "CP3_69 R,Color Palette 3 Register 69 " hexmask.long.byte 0x114 24.--31. 1. " CP3_69 A ,Color palette 3_69 blend ratio" hexmask.long.byte 0x114 18.--23. 1. " CP3_69 R ,Color palette 3_69 red" hexmask.long.byte 0x114 10.--15. 1. " CP3_69 G ,Color palette 3_69 green" hexmask.long.byte 0x114 2.--7. 1. " CP3_69 B ,Color palette 3_69 blue" line.long 0x118 "CP3_70 R,Color Palette 3 Register 70 " hexmask.long.byte 0x118 24.--31. 1. " CP3_70 A ,Color palette 3_70 blend ratio" hexmask.long.byte 0x118 18.--23. 1. " CP3_70 R ,Color palette 3_70 red" hexmask.long.byte 0x118 10.--15. 1. " CP3_70 G ,Color palette 3_70 green" hexmask.long.byte 0x118 2.--7. 1. " CP3_70 B ,Color palette 3_70 blue" line.long 0x11C "CP3_71 R,Color Palette 3 Register 71 " hexmask.long.byte 0x11C 24.--31. 1. " CP3_71 A ,Color palette 3_71 blend ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP3_71 R ,Color palette 3_71 red" hexmask.long.byte 0x11C 10.--15. 1. " CP3_71 G ,Color palette 3_71 green" hexmask.long.byte 0x11C 2.--7. 1. " CP3_71 B ,Color palette 3_71 blue" line.long 0x120 "CP3_72 R,Color Palette 3 Register 72 " hexmask.long.byte 0x120 24.--31. 1. " CP3_72 A ,Color palette 3_72 blend ratio" hexmask.long.byte 0x120 18.--23. 1. " CP3_72 R ,Color palette 3_72 red" hexmask.long.byte 0x120 10.--15. 1. " CP3_72 G ,Color palette 3_72 green" hexmask.long.byte 0x120 2.--7. 1. " CP3_72 B ,Color palette 3_72 blue" line.long 0x124 "CP3_73 R,Color Palette 3 Register 73 " hexmask.long.byte 0x124 24.--31. 1. " CP3_73 A ,Color palette 3_73 blend ratio" hexmask.long.byte 0x124 18.--23. 1. " CP3_73 R ,Color palette 3_73 red" hexmask.long.byte 0x124 10.--15. 1. " CP3_73 G ,Color palette 3_73 green" hexmask.long.byte 0x124 2.--7. 1. " CP3_73 B ,Color palette 3_73 blue" line.long 0x128 "CP3_74 R,Color Palette 3 Register 74 " hexmask.long.byte 0x128 24.--31. 1. " CP3_74 A ,Color palette 3_74 blend ratio" hexmask.long.byte 0x128 18.--23. 1. " CP3_74 R ,Color palette 3_74 red" hexmask.long.byte 0x128 10.--15. 1. " CP3_74 G ,Color palette 3_74 green" hexmask.long.byte 0x128 2.--7. 1. " CP3_74 B ,Color palette 3_74 blue" line.long 0x12C "CP3_75 R,Color Palette 3 Register 75 " hexmask.long.byte 0x12C 24.--31. 1. " CP3_75 A ,Color palette 3_75 blend ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP3_75 R ,Color palette 3_75 red" hexmask.long.byte 0x12C 10.--15. 1. " CP3_75 G ,Color palette 3_75 green" hexmask.long.byte 0x12C 2.--7. 1. " CP3_75 B ,Color palette 3_75 blue" line.long 0x130 "CP3_76 R,Color Palette 3 Register 76 " hexmask.long.byte 0x130 24.--31. 1. " CP3_76 A ,Color palette 3_76 blend ratio" hexmask.long.byte 0x130 18.--23. 1. " CP3_76 R ,Color palette 3_76 red" hexmask.long.byte 0x130 10.--15. 1. " CP3_76 G ,Color palette 3_76 green" hexmask.long.byte 0x130 2.--7. 1. " CP3_76 B ,Color palette 3_76 blue" line.long 0x134 "CP3_77 R,Color Palette 3 Register 77 " hexmask.long.byte 0x134 24.--31. 1. " CP3_77 A ,Color palette 3_77 blend ratio" hexmask.long.byte 0x134 18.--23. 1. " CP3_77 R ,Color palette 3_77 red" hexmask.long.byte 0x134 10.--15. 1. " CP3_77 G ,Color palette 3_77 green" hexmask.long.byte 0x134 2.--7. 1. " CP3_77 B ,Color palette 3_77 blue" line.long 0x138 "CP3_78 R,Color Palette 3 Register 78 " hexmask.long.byte 0x138 24.--31. 1. " CP3_78 A ,Color palette 3_78 blend ratio" hexmask.long.byte 0x138 18.--23. 1. " CP3_78 R ,Color palette 3_78 red" hexmask.long.byte 0x138 10.--15. 1. " CP3_78 G ,Color palette 3_78 green" hexmask.long.byte 0x138 2.--7. 1. " CP3_78 B ,Color palette 3_78 blue" line.long 0x13C "CP3_79 R,Color Palette 3 Register 79 " hexmask.long.byte 0x13C 24.--31. 1. " CP3_79 A ,Color palette 3_79 blend ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP3_79 R ,Color palette 3_79 red" hexmask.long.byte 0x13C 10.--15. 1. " CP3_79 G ,Color palette 3_79 green" hexmask.long.byte 0x13C 2.--7. 1. " CP3_79 B ,Color palette 3_79 blue" line.long 0x140 "CP3_80 R,Color Palette 3 Register 80 " hexmask.long.byte 0x140 24.--31. 1. " CP3_80 A ,Color palette 3_80 blend ratio" hexmask.long.byte 0x140 18.--23. 1. " CP3_80 R ,Color palette 3_80 red" hexmask.long.byte 0x140 10.--15. 1. " CP3_80 G ,Color palette 3_80 green" hexmask.long.byte 0x140 2.--7. 1. " CP3_80 B ,Color palette 3_80 blue" line.long 0x144 "CP3_81 R,Color Palette 3 Register 81 " hexmask.long.byte 0x144 24.--31. 1. " CP3_81 A ,Color palette 3_81 blend ratio" hexmask.long.byte 0x144 18.--23. 1. " CP3_81 R ,Color palette 3_81 red" hexmask.long.byte 0x144 10.--15. 1. " CP3_81 G ,Color palette 3_81 green" hexmask.long.byte 0x144 2.--7. 1. " CP3_81 B ,Color palette 3_81 blue" line.long 0x148 "CP3_82 R,Color Palette 3 Register 82 " hexmask.long.byte 0x148 24.--31. 1. " CP3_82 A ,Color palette 3_82 blend ratio" hexmask.long.byte 0x148 18.--23. 1. " CP3_82 R ,Color palette 3_82 red" hexmask.long.byte 0x148 10.--15. 1. " CP3_82 G ,Color palette 3_82 green" hexmask.long.byte 0x148 2.--7. 1. " CP3_82 B ,Color palette 3_82 blue" line.long 0x14C "CP3_83 R,Color Palette 3 Register 83 " hexmask.long.byte 0x14C 24.--31. 1. " CP3_83 A ,Color palette 3_83 blend ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP3_83 R ,Color palette 3_83 red" hexmask.long.byte 0x14C 10.--15. 1. " CP3_83 G ,Color palette 3_83 green" hexmask.long.byte 0x14C 2.--7. 1. " CP3_83 B ,Color palette 3_83 blue" line.long 0x150 "CP3_84 R,Color Palette 3 Register 84 " hexmask.long.byte 0x150 24.--31. 1. " CP3_84 A ,Color palette 3_84 blend ratio" hexmask.long.byte 0x150 18.--23. 1. " CP3_84 R ,Color palette 3_84 red" hexmask.long.byte 0x150 10.--15. 1. " CP3_84 G ,Color palette 3_84 green" hexmask.long.byte 0x150 2.--7. 1. " CP3_84 B ,Color palette 3_84 blue" line.long 0x154 "CP3_85 R,Color Palette 3 Register 85 " hexmask.long.byte 0x154 24.--31. 1. " CP3_85 A ,Color palette 3_85 blend ratio" hexmask.long.byte 0x154 18.--23. 1. " CP3_85 R ,Color palette 3_85 red" hexmask.long.byte 0x154 10.--15. 1. " CP3_85 G ,Color palette 3_85 green" hexmask.long.byte 0x154 2.--7. 1. " CP3_85 B ,Color palette 3_85 blue" line.long 0x158 "CP3_86 R,Color Palette 3 Register 86 " hexmask.long.byte 0x158 24.--31. 1. " CP3_86 A ,Color palette 3_86 blend ratio" hexmask.long.byte 0x158 18.--23. 1. " CP3_86 R ,Color palette 3_86 red" hexmask.long.byte 0x158 10.--15. 1. " CP3_86 G ,Color palette 3_86 green" hexmask.long.byte 0x158 2.--7. 1. " CP3_86 B ,Color palette 3_86 blue" line.long 0x15C "CP3_87 R,Color Palette 3 Register 87 " hexmask.long.byte 0x15C 24.--31. 1. " CP3_87 A ,Color palette 3_87 blend ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP3_87 R ,Color palette 3_87 red" hexmask.long.byte 0x15C 10.--15. 1. " CP3_87 G ,Color palette 3_87 green" hexmask.long.byte 0x15C 2.--7. 1. " CP3_87 B ,Color palette 3_87 blue" line.long 0x160 "CP3_88 R,Color Palette 3 Register 88 " hexmask.long.byte 0x160 24.--31. 1. " CP3_88 A ,Color palette 3_88 blend ratio" hexmask.long.byte 0x160 18.--23. 1. " CP3_88 R ,Color palette 3_88 red" hexmask.long.byte 0x160 10.--15. 1. " CP3_88 G ,Color palette 3_88 green" hexmask.long.byte 0x160 2.--7. 1. " CP3_88 B ,Color palette 3_88 blue" line.long 0x164 "CP3_89 R,Color Palette 3 Register 89 " hexmask.long.byte 0x164 24.--31. 1. " CP3_89 A ,Color palette 3_89 blend ratio" hexmask.long.byte 0x164 18.--23. 1. " CP3_89 R ,Color palette 3_89 red" hexmask.long.byte 0x164 10.--15. 1. " CP3_89 G ,Color palette 3_89 green" hexmask.long.byte 0x164 2.--7. 1. " CP3_89 B ,Color palette 3_89 blue" line.long 0x168 "CP3_90 R,Color Palette 3 Register 90 " hexmask.long.byte 0x168 24.--31. 1. " CP3_90 A ,Color palette 3_90 blend ratio" hexmask.long.byte 0x168 18.--23. 1. " CP3_90 R ,Color palette 3_90 red" hexmask.long.byte 0x168 10.--15. 1. " CP3_90 G ,Color palette 3_90 green" hexmask.long.byte 0x168 2.--7. 1. " CP3_90 B ,Color palette 3_90 blue" line.long 0x16C "CP3_91 R,Color Palette 3 Register 91 " hexmask.long.byte 0x16C 24.--31. 1. " CP3_91 A ,Color palette 3_91 blend ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP3_91 R ,Color palette 3_91 red" hexmask.long.byte 0x16C 10.--15. 1. " CP3_91 G ,Color palette 3_91 green" hexmask.long.byte 0x16C 2.--7. 1. " CP3_91 B ,Color palette 3_91 blue" line.long 0x170 "CP3_92 R,Color Palette 3 Register 92 " hexmask.long.byte 0x170 24.--31. 1. " CP3_92 A ,Color palette 3_92 blend ratio" hexmask.long.byte 0x170 18.--23. 1. " CP3_92 R ,Color palette 3_92 red" hexmask.long.byte 0x170 10.--15. 1. " CP3_92 G ,Color palette 3_92 green" hexmask.long.byte 0x170 2.--7. 1. " CP3_92 B ,Color palette 3_92 blue" line.long 0x174 "CP3_93 R,Color Palette 3 Register 93 " hexmask.long.byte 0x174 24.--31. 1. " CP3_93 A ,Color palette 3_93 blend ratio" hexmask.long.byte 0x174 18.--23. 1. " CP3_93 R ,Color palette 3_93 red" hexmask.long.byte 0x174 10.--15. 1. " CP3_93 G ,Color palette 3_93 green" hexmask.long.byte 0x174 2.--7. 1. " CP3_93 B ,Color palette 3_93 blue" line.long 0x178 "CP3_94 R,Color Palette 3 Register 94 " hexmask.long.byte 0x178 24.--31. 1. " CP3_94 A ,Color palette 3_94 blend ratio" hexmask.long.byte 0x178 18.--23. 1. " CP3_94 R ,Color palette 3_94 red" hexmask.long.byte 0x178 10.--15. 1. " CP3_94 G ,Color palette 3_94 green" hexmask.long.byte 0x178 2.--7. 1. " CP3_94 B ,Color palette 3_94 blue" line.long 0x17C "CP3_95 R,Color Palette 3 Register 95 " hexmask.long.byte 0x17C 24.--31. 1. " CP3_95 A ,Color palette 3_95 blend ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP3_95 R ,Color palette 3_95 red" hexmask.long.byte 0x17C 10.--15. 1. " CP3_95 G ,Color palette 3_95 green" hexmask.long.byte 0x17C 2.--7. 1. " CP3_95 B ,Color palette 3_95 blue" line.long 0x180 "CP3_96 R,Color Palette 3 Register 96 " hexmask.long.byte 0x180 24.--31. 1. " CP3_96 A ,Color palette 3_96 blend ratio" hexmask.long.byte 0x180 18.--23. 1. " CP3_96 R ,Color palette 3_96 red" hexmask.long.byte 0x180 10.--15. 1. " CP3_96 G ,Color palette 3_96 green" hexmask.long.byte 0x180 2.--7. 1. " CP3_96 B ,Color palette 3_96 blue" line.long 0x184 "CP3_97 R,Color Palette 3 Register 97 " hexmask.long.byte 0x184 24.--31. 1. " CP3_97 A ,Color palette 3_97 blend ratio" hexmask.long.byte 0x184 18.--23. 1. " CP3_97 R ,Color palette 3_97 red" hexmask.long.byte 0x184 10.--15. 1. " CP3_97 G ,Color palette 3_97 green" hexmask.long.byte 0x184 2.--7. 1. " CP3_97 B ,Color palette 3_97 blue" line.long 0x188 "CP3_98 R,Color Palette 3 Register 98 " hexmask.long.byte 0x188 24.--31. 1. " CP3_98 A ,Color palette 3_98 blend ratio" hexmask.long.byte 0x188 18.--23. 1. " CP3_98 R ,Color palette 3_98 red" hexmask.long.byte 0x188 10.--15. 1. " CP3_98 G ,Color palette 3_98 green" hexmask.long.byte 0x188 2.--7. 1. " CP3_98 B ,Color palette 3_98 blue" line.long 0x18C "CP3_99 R,Color Palette 3 Register 99 " hexmask.long.byte 0x18C 24.--31. 1. " CP3_99 A ,Color palette 3_99 blend ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP3_99 R ,Color palette 3_99 red" hexmask.long.byte 0x18C 10.--15. 1. " CP3_99 G ,Color palette 3_99 green" hexmask.long.byte 0x18C 2.--7. 1. " CP3_99 B ,Color palette 3_99 blue" line.long 0x190 "CP3_100R,Color Palette 3 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP3_100A ,Color palette 3_100 blend ratio" hexmask.long.byte 0x190 18.--23. 1. " CP3_100R ,Color palette 3_100 red" hexmask.long.byte 0x190 10.--15. 1. " CP3_100G ,Color palette 3_100 green" hexmask.long.byte 0x190 2.--7. 1. " CP3_100B ,Color palette 3_100 blue" line.long 0x194 "CP3_101R,Color Palette 3 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP3_101A ,Color palette 3_101 blend ratio" hexmask.long.byte 0x194 18.--23. 1. " CP3_101R ,Color palette 3_101 red" hexmask.long.byte 0x194 10.--15. 1. " CP3_101G ,Color palette 3_101 green" hexmask.long.byte 0x194 2.--7. 1. " CP3_101B ,Color palette 3_101 blue" line.long 0x198 "CP3_102R,Color Palette 3 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP3_102A ,Color palette 3_102 blend ratio" hexmask.long.byte 0x198 18.--23. 1. " CP3_102R ,Color palette 3_102 red" hexmask.long.byte 0x198 10.--15. 1. " CP3_102G ,Color palette 3_102 green" hexmask.long.byte 0x198 2.--7. 1. " CP3_102B ,Color palette 3_102 blue" line.long 0x19C "CP3_103R,Color Palette 3 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP3_103A ,Color palette 3_103 blend ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP3_103R ,Color palette 3_103 red" hexmask.long.byte 0x19C 10.--15. 1. " CP3_103G ,Color palette 3_103 green" hexmask.long.byte 0x19C 2.--7. 1. " CP3_103B ,Color palette 3_103 blue" line.long 0x1A0 "CP3_104R,Color Palette 3 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP3_104A ,Color palette 3_104 blend ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP3_104R ,Color palette 3_104 red" hexmask.long.byte 0x1A0 10.--15. 1. " CP3_104G ,Color palette 3_104 green" hexmask.long.byte 0x1A0 2.--7. 1. " CP3_104B ,Color palette 3_104 blue" line.long 0x1A4 "CP3_105R,Color Palette 3 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP3_105A ,Color palette 3_105 blend ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP3_105R ,Color palette 3_105 red" hexmask.long.byte 0x1A4 10.--15. 1. " CP3_105G ,Color palette 3_105 green" hexmask.long.byte 0x1A4 2.--7. 1. " CP3_105B ,Color palette 3_105 blue" line.long 0x1A8 "CP3_106R,Color Palette 3 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP3_106A ,Color palette 3_106 blend ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP3_106R ,Color palette 3_106 red" hexmask.long.byte 0x1A8 10.--15. 1. " CP3_106G ,Color palette 3_106 green" hexmask.long.byte 0x1A8 2.--7. 1. " CP3_106B ,Color palette 3_106 blue" line.long 0x1AC "CP3_107R,Color Palette 3 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP3_107A ,Color palette 3_107 blend ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP3_107R ,Color palette 3_107 red" hexmask.long.byte 0x1AC 10.--15. 1. " CP3_107G ,Color palette 3_107 green" hexmask.long.byte 0x1AC 2.--7. 1. " CP3_107B ,Color palette 3_107 blue" line.long 0x1B0 "CP3_108R,Color Palette 3 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP3_108A ,Color palette 3_108 blend ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP3_108R ,Color palette 3_108 red" hexmask.long.byte 0x1B0 10.--15. 1. " CP3_108G ,Color palette 3_108 green" hexmask.long.byte 0x1B0 2.--7. 1. " CP3_108B ,Color palette 3_108 blue" line.long 0x1B4 "CP3_109R,Color Palette 3 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP3_109A ,Color palette 3_109 blend ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP3_109R ,Color palette 3_109 red" hexmask.long.byte 0x1B4 10.--15. 1. " CP3_109G ,Color palette 3_109 green" hexmask.long.byte 0x1B4 2.--7. 1. " CP3_109B ,Color palette 3_109 blue" line.long 0x1B8 "CP3_110R,Color Palette 3 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP3_110A ,Color palette 3_110 blend ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP3_110R ,Color palette 3_110 red" hexmask.long.byte 0x1B8 10.--15. 1. " CP3_110G ,Color palette 3_110 green" hexmask.long.byte 0x1B8 2.--7. 1. " CP3_110B ,Color palette 3_110 blue" line.long 0x1BC "CP3_111R,Color Palette 3 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP3_111A ,Color palette 3_111 blend ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP3_111R ,Color palette 3_111 red" hexmask.long.byte 0x1BC 10.--15. 1. " CP3_111G ,Color palette 3_111 green" hexmask.long.byte 0x1BC 2.--7. 1. " CP3_111B ,Color palette 3_111 blue" line.long 0x1C0 "CP3_112R,Color Palette 3 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP3_112A ,Color palette 3_112 blend ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP3_112R ,Color palette 3_112 red" hexmask.long.byte 0x1C0 10.--15. 1. " CP3_112G ,Color palette 3_112 green" hexmask.long.byte 0x1C0 2.--7. 1. " CP3_112B ,Color palette 3_112 blue" line.long 0x1C4 "CP3_113R,Color Palette 3 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP3_113A ,Color palette 3_113 blend ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP3_113R ,Color palette 3_113 red" hexmask.long.byte 0x1C4 10.--15. 1. " CP3_113G ,Color palette 3_113 green" hexmask.long.byte 0x1C4 2.--7. 1. " CP3_113B ,Color palette 3_113 blue" line.long 0x1C8 "CP3_114R,Color Palette 3 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP3_114A ,Color palette 3_114 blend ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP3_114R ,Color palette 3_114 red" hexmask.long.byte 0x1C8 10.--15. 1. " CP3_114G ,Color palette 3_114 green" hexmask.long.byte 0x1C8 2.--7. 1. " CP3_114B ,Color palette 3_114 blue" line.long 0x1CC "CP3_115R,Color Palette 3 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP3_115A ,Color palette 3_115 blend ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP3_115R ,Color palette 3_115 red" hexmask.long.byte 0x1CC 10.--15. 1. " CP3_115G ,Color palette 3_115 green" hexmask.long.byte 0x1CC 2.--7. 1. " CP3_115B ,Color palette 3_115 blue" line.long 0x1D0 "CP3_116R,Color Palette 3 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP3_116A ,Color palette 3_116 blend ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP3_116R ,Color palette 3_116 red" hexmask.long.byte 0x1D0 10.--15. 1. " CP3_116G ,Color palette 3_116 green" hexmask.long.byte 0x1D0 2.--7. 1. " CP3_116B ,Color palette 3_116 blue" line.long 0x1D4 "CP3_117R,Color Palette 3 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP3_117A ,Color palette 3_117 blend ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP3_117R ,Color palette 3_117 red" hexmask.long.byte 0x1D4 10.--15. 1. " CP3_117G ,Color palette 3_117 green" hexmask.long.byte 0x1D4 2.--7. 1. " CP3_117B ,Color palette 3_117 blue" line.long 0x1D8 "CP3_118R,Color Palette 3 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP3_118A ,Color palette 3_118 blend ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP3_118R ,Color palette 3_118 red" hexmask.long.byte 0x1D8 10.--15. 1. " CP3_118G ,Color palette 3_118 green" hexmask.long.byte 0x1D8 2.--7. 1. " CP3_118B ,Color palette 3_118 blue" line.long 0x1DC "CP3_119R,Color Palette 3 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP3_119A ,Color palette 3_119 blend ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP3_119R ,Color palette 3_119 red" hexmask.long.byte 0x1DC 10.--15. 1. " CP3_119G ,Color palette 3_119 green" hexmask.long.byte 0x1DC 2.--7. 1. " CP3_119B ,Color palette 3_119 blue" line.long 0x1E0 "CP3_120R,Color Palette 3 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP3_120A ,Color palette 3_120 blend ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP3_120R ,Color palette 3_120 red" hexmask.long.byte 0x1E0 10.--15. 1. " CP3_120G ,Color palette 3_120 green" hexmask.long.byte 0x1E0 2.--7. 1. " CP3_120B ,Color palette 3_120 blue" line.long 0x1E4 "CP3_121R,Color Palette 3 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP3_121A ,Color palette 3_121 blend ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP3_121R ,Color palette 3_121 red" hexmask.long.byte 0x1E4 10.--15. 1. " CP3_121G ,Color palette 3_121 green" hexmask.long.byte 0x1E4 2.--7. 1. " CP3_121B ,Color palette 3_121 blue" line.long 0x1E8 "CP3_122R,Color Palette 3 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP3_122A ,Color palette 3_122 blend ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP3_122R ,Color palette 3_122 red" hexmask.long.byte 0x1E8 10.--15. 1. " CP3_122G ,Color palette 3_122 green" hexmask.long.byte 0x1E8 2.--7. 1. " CP3_122B ,Color palette 3_122 blue" line.long 0x1EC "CP3_123R,Color Palette 3 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP3_123A ,Color palette 3_123 blend ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP3_123R ,Color palette 3_123 red" hexmask.long.byte 0x1EC 10.--15. 1. " CP3_123G ,Color palette 3_123 green" hexmask.long.byte 0x1EC 2.--7. 1. " CP3_123B ,Color palette 3_123 blue" line.long 0x1F0 "CP3_124R,Color Palette 3 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP3_124A ,Color palette 3_124 blend ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP3_124R ,Color palette 3_124 red" hexmask.long.byte 0x1F0 10.--15. 1. " CP3_124G ,Color palette 3_124 green" hexmask.long.byte 0x1F0 2.--7. 1. " CP3_124B ,Color palette 3_124 blue" line.long 0x1F4 "CP3_125R,Color Palette 3 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP3_125A ,Color palette 3_125 blend ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP3_125R ,Color palette 3_125 red" hexmask.long.byte 0x1F4 10.--15. 1. " CP3_125G ,Color palette 3_125 green" hexmask.long.byte 0x1F4 2.--7. 1. " CP3_125B ,Color palette 3_125 blue" line.long 0x1F8 "CP3_126R,Color Palette 3 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP3_126A ,Color palette 3_126 blend ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP3_126R ,Color palette 3_126 red" hexmask.long.byte 0x1F8 10.--15. 1. " CP3_126G ,Color palette 3_126 green" hexmask.long.byte 0x1F8 2.--7. 1. " CP3_126B ,Color palette 3_126 blue" line.long 0x1FC "CP3_127R,Color Palette 3 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP3_127A ,Color palette 3_127 blend ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP3_127R ,Color palette 3_127 red" hexmask.long.byte 0x1FC 10.--15. 1. " CP3_127G ,Color palette 3_127 green" hexmask.long.byte 0x1FC 2.--7. 1. " CP3_127B ,Color palette 3_127 blue" line.long 0x200 "CP3_128R,Color Palette 3 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP3_128A ,Color palette 3_128 blend ratio" hexmask.long.byte 0x200 18.--23. 1. " CP3_128R ,Color palette 3_128 red" hexmask.long.byte 0x200 10.--15. 1. " CP3_128G ,Color palette 3_128 green" hexmask.long.byte 0x200 2.--7. 1. " CP3_128B ,Color palette 3_128 blue" line.long 0x204 "CP3_129R,Color Palette 3 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP3_129A ,Color palette 3_129 blend ratio" hexmask.long.byte 0x204 18.--23. 1. " CP3_129R ,Color palette 3_129 red" hexmask.long.byte 0x204 10.--15. 1. " CP3_129G ,Color palette 3_129 green" hexmask.long.byte 0x204 2.--7. 1. " CP3_129B ,Color palette 3_129 blue" line.long 0x208 "CP3_130R,Color Palette 3 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP3_130A ,Color palette 3_130 blend ratio" hexmask.long.byte 0x208 18.--23. 1. " CP3_130R ,Color palette 3_130 red" hexmask.long.byte 0x208 10.--15. 1. " CP3_130G ,Color palette 3_130 green" hexmask.long.byte 0x208 2.--7. 1. " CP3_130B ,Color palette 3_130 blue" line.long 0x20C "CP3_131R,Color Palette 3 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP3_131A ,Color palette 3_131 blend ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP3_131R ,Color palette 3_131 red" hexmask.long.byte 0x20C 10.--15. 1. " CP3_131G ,Color palette 3_131 green" hexmask.long.byte 0x20C 2.--7. 1. " CP3_131B ,Color palette 3_131 blue" line.long 0x210 "CP3_132R,Color Palette 3 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP3_132A ,Color palette 3_132 blend ratio" hexmask.long.byte 0x210 18.--23. 1. " CP3_132R ,Color palette 3_132 red" hexmask.long.byte 0x210 10.--15. 1. " CP3_132G ,Color palette 3_132 green" hexmask.long.byte 0x210 2.--7. 1. " CP3_132B ,Color palette 3_132 blue" line.long 0x214 "CP3_133R,Color Palette 3 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP3_133A ,Color palette 3_133 blend ratio" hexmask.long.byte 0x214 18.--23. 1. " CP3_133R ,Color palette 3_133 red" hexmask.long.byte 0x214 10.--15. 1. " CP3_133G ,Color palette 3_133 green" hexmask.long.byte 0x214 2.--7. 1. " CP3_133B ,Color palette 3_133 blue" line.long 0x218 "CP3_134R,Color Palette 3 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP3_134A ,Color palette 3_134 blend ratio" hexmask.long.byte 0x218 18.--23. 1. " CP3_134R ,Color palette 3_134 red" hexmask.long.byte 0x218 10.--15. 1. " CP3_134G ,Color palette 3_134 green" hexmask.long.byte 0x218 2.--7. 1. " CP3_134B ,Color palette 3_134 blue" line.long 0x21C "CP3_135R,Color Palette 3 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP3_135A ,Color palette 3_135 blend ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP3_135R ,Color palette 3_135 red" hexmask.long.byte 0x21C 10.--15. 1. " CP3_135G ,Color palette 3_135 green" hexmask.long.byte 0x21C 2.--7. 1. " CP3_135B ,Color palette 3_135 blue" line.long 0x220 "CP3_136R,Color Palette 3 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP3_136A ,Color palette 3_136 blend ratio" hexmask.long.byte 0x220 18.--23. 1. " CP3_136R ,Color palette 3_136 red" hexmask.long.byte 0x220 10.--15. 1. " CP3_136G ,Color palette 3_136 green" hexmask.long.byte 0x220 2.--7. 1. " CP3_136B ,Color palette 3_136 blue" line.long 0x224 "CP3_137R,Color Palette 3 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP3_137A ,Color palette 3_137 blend ratio" hexmask.long.byte 0x224 18.--23. 1. " CP3_137R ,Color palette 3_137 red" hexmask.long.byte 0x224 10.--15. 1. " CP3_137G ,Color palette 3_137 green" hexmask.long.byte 0x224 2.--7. 1. " CP3_137B ,Color palette 3_137 blue" line.long 0x228 "CP3_138R,Color Palette 3 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP3_138A ,Color palette 3_138 blend ratio" hexmask.long.byte 0x228 18.--23. 1. " CP3_138R ,Color palette 3_138 red" hexmask.long.byte 0x228 10.--15. 1. " CP3_138G ,Color palette 3_138 green" hexmask.long.byte 0x228 2.--7. 1. " CP3_138B ,Color palette 3_138 blue" line.long 0x22C "CP3_139R,Color Palette 3 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP3_139A ,Color palette 3_139 blend ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP3_139R ,Color palette 3_139 red" hexmask.long.byte 0x22C 10.--15. 1. " CP3_139G ,Color palette 3_139 green" hexmask.long.byte 0x22C 2.--7. 1. " CP3_139B ,Color palette 3_139 blue" line.long 0x230 "CP3_140R,Color Palette 3 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP3_140A ,Color palette 3_140 blend ratio" hexmask.long.byte 0x230 18.--23. 1. " CP3_140R ,Color palette 3_140 red" hexmask.long.byte 0x230 10.--15. 1. " CP3_140G ,Color palette 3_140 green" hexmask.long.byte 0x230 2.--7. 1. " CP3_140B ,Color palette 3_140 blue" line.long 0x234 "CP3_141R,Color Palette 3 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP3_141A ,Color palette 3_141 blend ratio" hexmask.long.byte 0x234 18.--23. 1. " CP3_141R ,Color palette 3_141 red" hexmask.long.byte 0x234 10.--15. 1. " CP3_141G ,Color palette 3_141 green" hexmask.long.byte 0x234 2.--7. 1. " CP3_141B ,Color palette 3_141 blue" line.long 0x238 "CP3_142R,Color Palette 3 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP3_142A ,Color palette 3_142 blend ratio" hexmask.long.byte 0x238 18.--23. 1. " CP3_142R ,Color palette 3_142 red" hexmask.long.byte 0x238 10.--15. 1. " CP3_142G ,Color palette 3_142 green" hexmask.long.byte 0x238 2.--7. 1. " CP3_142B ,Color palette 3_142 blue" line.long 0x23C "CP3_143R,Color Palette 3 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP3_143A ,Color palette 3_143 blend ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP3_143R ,Color palette 3_143 red" hexmask.long.byte 0x23C 10.--15. 1. " CP3_143G ,Color palette 3_143 green" hexmask.long.byte 0x23C 2.--7. 1. " CP3_143B ,Color palette 3_143 blue" line.long 0x240 "CP3_144R,Color Palette 3 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP3_144A ,Color palette 3_144 blend ratio" hexmask.long.byte 0x240 18.--23. 1. " CP3_144R ,Color palette 3_144 red" hexmask.long.byte 0x240 10.--15. 1. " CP3_144G ,Color palette 3_144 green" hexmask.long.byte 0x240 2.--7. 1. " CP3_144B ,Color palette 3_144 blue" line.long 0x244 "CP3_145R,Color Palette 3 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP3_145A ,Color palette 3_145 blend ratio" hexmask.long.byte 0x244 18.--23. 1. " CP3_145R ,Color palette 3_145 red" hexmask.long.byte 0x244 10.--15. 1. " CP3_145G ,Color palette 3_145 green" hexmask.long.byte 0x244 2.--7. 1. " CP3_145B ,Color palette 3_145 blue" line.long 0x248 "CP3_146R,Color Palette 3 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP3_146A ,Color palette 3_146 blend ratio" hexmask.long.byte 0x248 18.--23. 1. " CP3_146R ,Color palette 3_146 red" hexmask.long.byte 0x248 10.--15. 1. " CP3_146G ,Color palette 3_146 green" hexmask.long.byte 0x248 2.--7. 1. " CP3_146B ,Color palette 3_146 blue" line.long 0x24C "CP3_147R,Color Palette 3 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP3_147A ,Color palette 3_147 blend ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP3_147R ,Color palette 3_147 red" hexmask.long.byte 0x24C 10.--15. 1. " CP3_147G ,Color palette 3_147 green" hexmask.long.byte 0x24C 2.--7. 1. " CP3_147B ,Color palette 3_147 blue" line.long 0x250 "CP3_148R,Color Palette 3 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP3_148A ,Color palette 3_148 blend ratio" hexmask.long.byte 0x250 18.--23. 1. " CP3_148R ,Color palette 3_148 red" hexmask.long.byte 0x250 10.--15. 1. " CP3_148G ,Color palette 3_148 green" hexmask.long.byte 0x250 2.--7. 1. " CP3_148B ,Color palette 3_148 blue" line.long 0x254 "CP3_149R,Color Palette 3 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP3_149A ,Color palette 3_149 blend ratio" hexmask.long.byte 0x254 18.--23. 1. " CP3_149R ,Color palette 3_149 red" hexmask.long.byte 0x254 10.--15. 1. " CP3_149G ,Color palette 3_149 green" hexmask.long.byte 0x254 2.--7. 1. " CP3_149B ,Color palette 3_149 blue" line.long 0x258 "CP3_150R,Color Palette 3 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP3_150A ,Color palette 3_150 blend ratio" hexmask.long.byte 0x258 18.--23. 1. " CP3_150R ,Color palette 3_150 red" hexmask.long.byte 0x258 10.--15. 1. " CP3_150G ,Color palette 3_150 green" hexmask.long.byte 0x258 2.--7. 1. " CP3_150B ,Color palette 3_150 blue" line.long 0x25C "CP3_151R,Color Palette 3 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP3_151A ,Color palette 3_151 blend ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP3_151R ,Color palette 3_151 red" hexmask.long.byte 0x25C 10.--15. 1. " CP3_151G ,Color palette 3_151 green" hexmask.long.byte 0x25C 2.--7. 1. " CP3_151B ,Color palette 3_151 blue" line.long 0x260 "CP3_152R,Color Palette 3 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP3_152A ,Color palette 3_152 blend ratio" hexmask.long.byte 0x260 18.--23. 1. " CP3_152R ,Color palette 3_152 red" hexmask.long.byte 0x260 10.--15. 1. " CP3_152G ,Color palette 3_152 green" hexmask.long.byte 0x260 2.--7. 1. " CP3_152B ,Color palette 3_152 blue" line.long 0x264 "CP3_153R,Color Palette 3 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP3_153A ,Color palette 3_153 blend ratio" hexmask.long.byte 0x264 18.--23. 1. " CP3_153R ,Color palette 3_153 red" hexmask.long.byte 0x264 10.--15. 1. " CP3_153G ,Color palette 3_153 green" hexmask.long.byte 0x264 2.--7. 1. " CP3_153B ,Color palette 3_153 blue" line.long 0x268 "CP3_154R,Color Palette 3 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP3_154A ,Color palette 3_154 blend ratio" hexmask.long.byte 0x268 18.--23. 1. " CP3_154R ,Color palette 3_154 red" hexmask.long.byte 0x268 10.--15. 1. " CP3_154G ,Color palette 3_154 green" hexmask.long.byte 0x268 2.--7. 1. " CP3_154B ,Color palette 3_154 blue" line.long 0x26C "CP3_155R,Color Palette 3 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP3_155A ,Color palette 3_155 blend ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP3_155R ,Color palette 3_155 red" hexmask.long.byte 0x26C 10.--15. 1. " CP3_155G ,Color palette 3_155 green" hexmask.long.byte 0x26C 2.--7. 1. " CP3_155B ,Color palette 3_155 blue" line.long 0x270 "CP3_156R,Color Palette 3 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP3_156A ,Color palette 3_156 blend ratio" hexmask.long.byte 0x270 18.--23. 1. " CP3_156R ,Color palette 3_156 red" hexmask.long.byte 0x270 10.--15. 1. " CP3_156G ,Color palette 3_156 green" hexmask.long.byte 0x270 2.--7. 1. " CP3_156B ,Color palette 3_156 blue" line.long 0x274 "CP3_157R,Color Palette 3 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP3_157A ,Color palette 3_157 blend ratio" hexmask.long.byte 0x274 18.--23. 1. " CP3_157R ,Color palette 3_157 red" hexmask.long.byte 0x274 10.--15. 1. " CP3_157G ,Color palette 3_157 green" hexmask.long.byte 0x274 2.--7. 1. " CP3_157B ,Color palette 3_157 blue" line.long 0x278 "CP3_158R,Color Palette 3 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP3_158A ,Color palette 3_158 blend ratio" hexmask.long.byte 0x278 18.--23. 1. " CP3_158R ,Color palette 3_158 red" hexmask.long.byte 0x278 10.--15. 1. " CP3_158G ,Color palette 3_158 green" hexmask.long.byte 0x278 2.--7. 1. " CP3_158B ,Color palette 3_158 blue" line.long 0x27C "CP3_159R,Color Palette 3 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP3_159A ,Color palette 3_159 blend ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP3_159R ,Color palette 3_159 red" hexmask.long.byte 0x27C 10.--15. 1. " CP3_159G ,Color palette 3_159 green" hexmask.long.byte 0x27C 2.--7. 1. " CP3_159B ,Color palette 3_159 blue" line.long 0x280 "CP3_160R,Color Palette 3 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP3_160A ,Color palette 3_160 blend ratio" hexmask.long.byte 0x280 18.--23. 1. " CP3_160R ,Color palette 3_160 red" hexmask.long.byte 0x280 10.--15. 1. " CP3_160G ,Color palette 3_160 green" hexmask.long.byte 0x280 2.--7. 1. " CP3_160B ,Color palette 3_160 blue" line.long 0x284 "CP3_161R,Color Palette 3 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP3_161A ,Color palette 3_161 blend ratio" hexmask.long.byte 0x284 18.--23. 1. " CP3_161R ,Color palette 3_161 red" hexmask.long.byte 0x284 10.--15. 1. " CP3_161G ,Color palette 3_161 green" hexmask.long.byte 0x284 2.--7. 1. " CP3_161B ,Color palette 3_161 blue" line.long 0x288 "CP3_162R,Color Palette 3 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP3_162A ,Color palette 3_162 blend ratio" hexmask.long.byte 0x288 18.--23. 1. " CP3_162R ,Color palette 3_162 red" hexmask.long.byte 0x288 10.--15. 1. " CP3_162G ,Color palette 3_162 green" hexmask.long.byte 0x288 2.--7. 1. " CP3_162B ,Color palette 3_162 blue" line.long 0x28C "CP3_163R,Color Palette 3 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP3_163A ,Color palette 3_163 blend ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP3_163R ,Color palette 3_163 red" hexmask.long.byte 0x28C 10.--15. 1. " CP3_163G ,Color palette 3_163 green" hexmask.long.byte 0x28C 2.--7. 1. " CP3_163B ,Color palette 3_163 blue" line.long 0x290 "CP3_164R,Color Palette 3 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP3_164A ,Color palette 3_164 blend ratio" hexmask.long.byte 0x290 18.--23. 1. " CP3_164R ,Color palette 3_164 red" hexmask.long.byte 0x290 10.--15. 1. " CP3_164G ,Color palette 3_164 green" hexmask.long.byte 0x290 2.--7. 1. " CP3_164B ,Color palette 3_164 blue" line.long 0x294 "CP3_165R,Color Palette 3 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP3_165A ,Color palette 3_165 blend ratio" hexmask.long.byte 0x294 18.--23. 1. " CP3_165R ,Color palette 3_165 red" hexmask.long.byte 0x294 10.--15. 1. " CP3_165G ,Color palette 3_165 green" hexmask.long.byte 0x294 2.--7. 1. " CP3_165B ,Color palette 3_165 blue" line.long 0x298 "CP3_166R,Color Palette 3 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP3_166A ,Color palette 3_166 blend ratio" hexmask.long.byte 0x298 18.--23. 1. " CP3_166R ,Color palette 3_166 red" hexmask.long.byte 0x298 10.--15. 1. " CP3_166G ,Color palette 3_166 green" hexmask.long.byte 0x298 2.--7. 1. " CP3_166B ,Color palette 3_166 blue" line.long 0x29C "CP3_167R,Color Palette 3 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP3_167A ,Color palette 3_167 blend ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP3_167R ,Color palette 3_167 red" hexmask.long.byte 0x29C 10.--15. 1. " CP3_167G ,Color palette 3_167 green" hexmask.long.byte 0x29C 2.--7. 1. " CP3_167B ,Color palette 3_167 blue" line.long 0x2A0 "CP3_168R,Color Palette 3 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP3_168A ,Color palette 3_168 blend ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP3_168R ,Color palette 3_168 red" hexmask.long.byte 0x2A0 10.--15. 1. " CP3_168G ,Color palette 3_168 green" hexmask.long.byte 0x2A0 2.--7. 1. " CP3_168B ,Color palette 3_168 blue" line.long 0x2A4 "CP3_169R,Color Palette 3 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP3_169A ,Color palette 3_169 blend ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP3_169R ,Color palette 3_169 red" hexmask.long.byte 0x2A4 10.--15. 1. " CP3_169G ,Color palette 3_169 green" hexmask.long.byte 0x2A4 2.--7. 1. " CP3_169B ,Color palette 3_169 blue" line.long 0x2A8 "CP3_170R,Color Palette 3 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP3_170A ,Color palette 3_170 blend ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP3_170R ,Color palette 3_170 red" hexmask.long.byte 0x2A8 10.--15. 1. " CP3_170G ,Color palette 3_170 green" hexmask.long.byte 0x2A8 2.--7. 1. " CP3_170B ,Color palette 3_170 blue" line.long 0x2AC "CP3_171R,Color Palette 3 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP3_171A ,Color palette 3_171 blend ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP3_171R ,Color palette 3_171 red" hexmask.long.byte 0x2AC 10.--15. 1. " CP3_171G ,Color palette 3_171 green" hexmask.long.byte 0x2AC 2.--7. 1. " CP3_171B ,Color palette 3_171 blue" line.long 0x2B0 "CP3_172R,Color Palette 3 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP3_172A ,Color palette 3_172 blend ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP3_172R ,Color palette 3_172 red" hexmask.long.byte 0x2B0 10.--15. 1. " CP3_172G ,Color palette 3_172 green" hexmask.long.byte 0x2B0 2.--7. 1. " CP3_172B ,Color palette 3_172 blue" line.long 0x2B4 "CP3_173R,Color Palette 3 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP3_173A ,Color palette 3_173 blend ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP3_173R ,Color palette 3_173 red" hexmask.long.byte 0x2B4 10.--15. 1. " CP3_173G ,Color palette 3_173 green" hexmask.long.byte 0x2B4 2.--7. 1. " CP3_173B ,Color palette 3_173 blue" line.long 0x2B8 "CP3_174R,Color Palette 3 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP3_174A ,Color palette 3_174 blend ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP3_174R ,Color palette 3_174 red" hexmask.long.byte 0x2B8 10.--15. 1. " CP3_174G ,Color palette 3_174 green" hexmask.long.byte 0x2B8 2.--7. 1. " CP3_174B ,Color palette 3_174 blue" line.long 0x2BC "CP3_175R,Color Palette 3 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP3_175A ,Color palette 3_175 blend ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP3_175R ,Color palette 3_175 red" hexmask.long.byte 0x2BC 10.--15. 1. " CP3_175G ,Color palette 3_175 green" hexmask.long.byte 0x2BC 2.--7. 1. " CP3_175B ,Color palette 3_175 blue" line.long 0x2C0 "CP3_176R,Color Palette 3 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP3_176A ,Color palette 3_176 blend ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP3_176R ,Color palette 3_176 red" hexmask.long.byte 0x2C0 10.--15. 1. " CP3_176G ,Color palette 3_176 green" hexmask.long.byte 0x2C0 2.--7. 1. " CP3_176B ,Color palette 3_176 blue" line.long 0x2C4 "CP3_177R,Color Palette 3 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP3_177A ,Color palette 3_177 blend ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP3_177R ,Color palette 3_177 red" hexmask.long.byte 0x2C4 10.--15. 1. " CP3_177G ,Color palette 3_177 green" hexmask.long.byte 0x2C4 2.--7. 1. " CP3_177B ,Color palette 3_177 blue" line.long 0x2C8 "CP3_178R,Color Palette 3 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP3_178A ,Color palette 3_178 blend ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP3_178R ,Color palette 3_178 red" hexmask.long.byte 0x2C8 10.--15. 1. " CP3_178G ,Color palette 3_178 green" hexmask.long.byte 0x2C8 2.--7. 1. " CP3_178B ,Color palette 3_178 blue" line.long 0x2CC "CP3_179R,Color Palette 3 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP3_179A ,Color palette 3_179 blend ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP3_179R ,Color palette 3_179 red" hexmask.long.byte 0x2CC 10.--15. 1. " CP3_179G ,Color palette 3_179 green" hexmask.long.byte 0x2CC 2.--7. 1. " CP3_179B ,Color palette 3_179 blue" line.long 0x2D0 "CP3_180R,Color Palette 3 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP3_180A ,Color palette 3_180 blend ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP3_180R ,Color palette 3_180 red" hexmask.long.byte 0x2D0 10.--15. 1. " CP3_180G ,Color palette 3_180 green" hexmask.long.byte 0x2D0 2.--7. 1. " CP3_180B ,Color palette 3_180 blue" line.long 0x2D4 "CP3_181R,Color Palette 3 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP3_181A ,Color palette 3_181 blend ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP3_181R ,Color palette 3_181 red" hexmask.long.byte 0x2D4 10.--15. 1. " CP3_181G ,Color palette 3_181 green" hexmask.long.byte 0x2D4 2.--7. 1. " CP3_181B ,Color palette 3_181 blue" line.long 0x2D8 "CP3_182R,Color Palette 3 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP3_182A ,Color palette 3_182 blend ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP3_182R ,Color palette 3_182 red" hexmask.long.byte 0x2D8 10.--15. 1. " CP3_182G ,Color palette 3_182 green" hexmask.long.byte 0x2D8 2.--7. 1. " CP3_182B ,Color palette 3_182 blue" line.long 0x2DC "CP3_183R,Color Palette 3 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP3_183A ,Color palette 3_183 blend ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP3_183R ,Color palette 3_183 red" hexmask.long.byte 0x2DC 10.--15. 1. " CP3_183G ,Color palette 3_183 green" hexmask.long.byte 0x2DC 2.--7. 1. " CP3_183B ,Color palette 3_183 blue" line.long 0x2E0 "CP3_184R,Color Palette 3 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP3_184A ,Color palette 3_184 blend ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP3_184R ,Color palette 3_184 red" hexmask.long.byte 0x2E0 10.--15. 1. " CP3_184G ,Color palette 3_184 green" hexmask.long.byte 0x2E0 2.--7. 1. " CP3_184B ,Color palette 3_184 blue" line.long 0x2E4 "CP3_185R,Color Palette 3 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP3_185A ,Color palette 3_185 blend ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP3_185R ,Color palette 3_185 red" hexmask.long.byte 0x2E4 10.--15. 1. " CP3_185G ,Color palette 3_185 green" hexmask.long.byte 0x2E4 2.--7. 1. " CP3_185B ,Color palette 3_185 blue" line.long 0x2E8 "CP3_186R,Color Palette 3 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP3_186A ,Color palette 3_186 blend ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP3_186R ,Color palette 3_186 red" hexmask.long.byte 0x2E8 10.--15. 1. " CP3_186G ,Color palette 3_186 green" hexmask.long.byte 0x2E8 2.--7. 1. " CP3_186B ,Color palette 3_186 blue" line.long 0x2EC "CP3_187R,Color Palette 3 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP3_187A ,Color palette 3_187 blend ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP3_187R ,Color palette 3_187 red" hexmask.long.byte 0x2EC 10.--15. 1. " CP3_187G ,Color palette 3_187 green" hexmask.long.byte 0x2EC 2.--7. 1. " CP3_187B ,Color palette 3_187 blue" line.long 0x2F0 "CP3_188R,Color Palette 3 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP3_188A ,Color palette 3_188 blend ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP3_188R ,Color palette 3_188 red" hexmask.long.byte 0x2F0 10.--15. 1. " CP3_188G ,Color palette 3_188 green" hexmask.long.byte 0x2F0 2.--7. 1. " CP3_188B ,Color palette 3_188 blue" line.long 0x2F4 "CP3_189R,Color Palette 3 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP3_189A ,Color palette 3_189 blend ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP3_189R ,Color palette 3_189 red" hexmask.long.byte 0x2F4 10.--15. 1. " CP3_189G ,Color palette 3_189 green" hexmask.long.byte 0x2F4 2.--7. 1. " CP3_189B ,Color palette 3_189 blue" line.long 0x2F8 "CP3_190R,Color Palette 3 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP3_190A ,Color palette 3_190 blend ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP3_190R ,Color palette 3_190 red" hexmask.long.byte 0x2F8 10.--15. 1. " CP3_190G ,Color palette 3_190 green" hexmask.long.byte 0x2F8 2.--7. 1. " CP3_190B ,Color palette 3_190 blue" line.long 0x2FC "CP3_191R,Color Palette 3 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP3_191A ,Color palette 3_191 blend ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP3_191R ,Color palette 3_191 red" hexmask.long.byte 0x2FC 10.--15. 1. " CP3_191G ,Color palette 3_191 green" hexmask.long.byte 0x2FC 2.--7. 1. " CP3_191B ,Color palette 3_191 blue" line.long 0x300 "CP3_192R,Color Palette 3 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP3_192A ,Color palette 3_192 blend ratio" hexmask.long.byte 0x300 18.--23. 1. " CP3_192R ,Color palette 3_192 red" hexmask.long.byte 0x300 10.--15. 1. " CP3_192G ,Color palette 3_192 green" hexmask.long.byte 0x300 2.--7. 1. " CP3_192B ,Color palette 3_192 blue" line.long 0x304 "CP3_193R,Color Palette 3 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP3_193A ,Color palette 3_193 blend ratio" hexmask.long.byte 0x304 18.--23. 1. " CP3_193R ,Color palette 3_193 red" hexmask.long.byte 0x304 10.--15. 1. " CP3_193G ,Color palette 3_193 green" hexmask.long.byte 0x304 2.--7. 1. " CP3_193B ,Color palette 3_193 blue" line.long 0x308 "CP3_194R,Color Palette 3 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP3_194A ,Color palette 3_194 blend ratio" hexmask.long.byte 0x308 18.--23. 1. " CP3_194R ,Color palette 3_194 red" hexmask.long.byte 0x308 10.--15. 1. " CP3_194G ,Color palette 3_194 green" hexmask.long.byte 0x308 2.--7. 1. " CP3_194B ,Color palette 3_194 blue" line.long 0x30C "CP3_195R,Color Palette 3 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP3_195A ,Color palette 3_195 blend ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP3_195R ,Color palette 3_195 red" hexmask.long.byte 0x30C 10.--15. 1. " CP3_195G ,Color palette 3_195 green" hexmask.long.byte 0x30C 2.--7. 1. " CP3_195B ,Color palette 3_195 blue" line.long 0x310 "CP3_196R,Color Palette 3 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP3_196A ,Color palette 3_196 blend ratio" hexmask.long.byte 0x310 18.--23. 1. " CP3_196R ,Color palette 3_196 red" hexmask.long.byte 0x310 10.--15. 1. " CP3_196G ,Color palette 3_196 green" hexmask.long.byte 0x310 2.--7. 1. " CP3_196B ,Color palette 3_196 blue" line.long 0x314 "CP3_197R,Color Palette 3 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP3_197A ,Color palette 3_197 blend ratio" hexmask.long.byte 0x314 18.--23. 1. " CP3_197R ,Color palette 3_197 red" hexmask.long.byte 0x314 10.--15. 1. " CP3_197G ,Color palette 3_197 green" hexmask.long.byte 0x314 2.--7. 1. " CP3_197B ,Color palette 3_197 blue" line.long 0x318 "CP3_198R,Color Palette 3 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP3_198A ,Color palette 3_198 blend ratio" hexmask.long.byte 0x318 18.--23. 1. " CP3_198R ,Color palette 3_198 red" hexmask.long.byte 0x318 10.--15. 1. " CP3_198G ,Color palette 3_198 green" hexmask.long.byte 0x318 2.--7. 1. " CP3_198B ,Color palette 3_198 blue" line.long 0x31C "CP3_199R,Color Palette 3 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP3_199A ,Color palette 3_199 blend ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP3_199R ,Color palette 3_199 red" hexmask.long.byte 0x31C 10.--15. 1. " CP3_199G ,Color palette 3_199 green" hexmask.long.byte 0x31C 2.--7. 1. " CP3_199B ,Color palette 3_199 blue" line.long 0x320 "CP3_200R,Color Palette 3 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP3_200A ,Color palette 3_200 blend ratio" hexmask.long.byte 0x320 18.--23. 1. " CP3_200R ,Color palette 3_200 red" hexmask.long.byte 0x320 10.--15. 1. " CP3_200G ,Color palette 3_200 green" hexmask.long.byte 0x320 2.--7. 1. " CP3_200B ,Color palette 3_200 blue" line.long 0x324 "CP3_201R,Color Palette 3 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP3_201A ,Color palette 3_201 blend ratio" hexmask.long.byte 0x324 18.--23. 1. " CP3_201R ,Color palette 3_201 red" hexmask.long.byte 0x324 10.--15. 1. " CP3_201G ,Color palette 3_201 green" hexmask.long.byte 0x324 2.--7. 1. " CP3_201B ,Color palette 3_201 blue" line.long 0x328 "CP3_202R,Color Palette 3 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP3_202A ,Color palette 3_202 blend ratio" hexmask.long.byte 0x328 18.--23. 1. " CP3_202R ,Color palette 3_202 red" hexmask.long.byte 0x328 10.--15. 1. " CP3_202G ,Color palette 3_202 green" hexmask.long.byte 0x328 2.--7. 1. " CP3_202B ,Color palette 3_202 blue" line.long 0x32C "CP3_203R,Color Palette 3 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP3_203A ,Color palette 3_203 blend ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP3_203R ,Color palette 3_203 red" hexmask.long.byte 0x32C 10.--15. 1. " CP3_203G ,Color palette 3_203 green" hexmask.long.byte 0x32C 2.--7. 1. " CP3_203B ,Color palette 3_203 blue" line.long 0x330 "CP3_204R,Color Palette 3 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP3_204A ,Color palette 3_204 blend ratio" hexmask.long.byte 0x330 18.--23. 1. " CP3_204R ,Color palette 3_204 red" hexmask.long.byte 0x330 10.--15. 1. " CP3_204G ,Color palette 3_204 green" hexmask.long.byte 0x330 2.--7. 1. " CP3_204B ,Color palette 3_204 blue" line.long 0x334 "CP3_205R,Color Palette 3 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP3_205A ,Color palette 3_205 blend ratio" hexmask.long.byte 0x334 18.--23. 1. " CP3_205R ,Color palette 3_205 red" hexmask.long.byte 0x334 10.--15. 1. " CP3_205G ,Color palette 3_205 green" hexmask.long.byte 0x334 2.--7. 1. " CP3_205B ,Color palette 3_205 blue" line.long 0x338 "CP3_206R,Color Palette 3 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP3_206A ,Color palette 3_206 blend ratio" hexmask.long.byte 0x338 18.--23. 1. " CP3_206R ,Color palette 3_206 red" hexmask.long.byte 0x338 10.--15. 1. " CP3_206G ,Color palette 3_206 green" hexmask.long.byte 0x338 2.--7. 1. " CP3_206B ,Color palette 3_206 blue" line.long 0x33C "CP3_207R,Color Palette 3 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP3_207A ,Color palette 3_207 blend ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP3_207R ,Color palette 3_207 red" hexmask.long.byte 0x33C 10.--15. 1. " CP3_207G ,Color palette 3_207 green" hexmask.long.byte 0x33C 2.--7. 1. " CP3_207B ,Color palette 3_207 blue" line.long 0x340 "CP3_208R,Color Palette 3 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP3_208A ,Color palette 3_208 blend ratio" hexmask.long.byte 0x340 18.--23. 1. " CP3_208R ,Color palette 3_208 red" hexmask.long.byte 0x340 10.--15. 1. " CP3_208G ,Color palette 3_208 green" hexmask.long.byte 0x340 2.--7. 1. " CP3_208B ,Color palette 3_208 blue" line.long 0x344 "CP3_209R,Color Palette 3 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP3_209A ,Color palette 3_209 blend ratio" hexmask.long.byte 0x344 18.--23. 1. " CP3_209R ,Color palette 3_209 red" hexmask.long.byte 0x344 10.--15. 1. " CP3_209G ,Color palette 3_209 green" hexmask.long.byte 0x344 2.--7. 1. " CP3_209B ,Color palette 3_209 blue" line.long 0x348 "CP3_210R,Color Palette 3 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP3_210A ,Color palette 3_210 blend ratio" hexmask.long.byte 0x348 18.--23. 1. " CP3_210R ,Color palette 3_210 red" hexmask.long.byte 0x348 10.--15. 1. " CP3_210G ,Color palette 3_210 green" hexmask.long.byte 0x348 2.--7. 1. " CP3_210B ,Color palette 3_210 blue" line.long 0x34C "CP3_211R,Color Palette 3 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP3_211A ,Color palette 3_211 blend ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP3_211R ,Color palette 3_211 red" hexmask.long.byte 0x34C 10.--15. 1. " CP3_211G ,Color palette 3_211 green" hexmask.long.byte 0x34C 2.--7. 1. " CP3_211B ,Color palette 3_211 blue" line.long 0x350 "CP3_212R,Color Palette 3 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP3_212A ,Color palette 3_212 blend ratio" hexmask.long.byte 0x350 18.--23. 1. " CP3_212R ,Color palette 3_212 red" hexmask.long.byte 0x350 10.--15. 1. " CP3_212G ,Color palette 3_212 green" hexmask.long.byte 0x350 2.--7. 1. " CP3_212B ,Color palette 3_212 blue" line.long 0x354 "CP3_213R,Color Palette 3 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP3_213A ,Color palette 3_213 blend ratio" hexmask.long.byte 0x354 18.--23. 1. " CP3_213R ,Color palette 3_213 red" hexmask.long.byte 0x354 10.--15. 1. " CP3_213G ,Color palette 3_213 green" hexmask.long.byte 0x354 2.--7. 1. " CP3_213B ,Color palette 3_213 blue" line.long 0x358 "CP3_214R,Color Palette 3 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP3_214A ,Color palette 3_214 blend ratio" hexmask.long.byte 0x358 18.--23. 1. " CP3_214R ,Color palette 3_214 red" hexmask.long.byte 0x358 10.--15. 1. " CP3_214G ,Color palette 3_214 green" hexmask.long.byte 0x358 2.--7. 1. " CP3_214B ,Color palette 3_214 blue" line.long 0x35C "CP3_215R,Color Palette 3 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP3_215A ,Color palette 3_215 blend ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP3_215R ,Color palette 3_215 red" hexmask.long.byte 0x35C 10.--15. 1. " CP3_215G ,Color palette 3_215 green" hexmask.long.byte 0x35C 2.--7. 1. " CP3_215B ,Color palette 3_215 blue" line.long 0x360 "CP3_216R,Color Palette 3 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP3_216A ,Color palette 3_216 blend ratio" hexmask.long.byte 0x360 18.--23. 1. " CP3_216R ,Color palette 3_216 red" hexmask.long.byte 0x360 10.--15. 1. " CP3_216G ,Color palette 3_216 green" hexmask.long.byte 0x360 2.--7. 1. " CP3_216B ,Color palette 3_216 blue" line.long 0x364 "CP3_217R,Color Palette 3 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP3_217A ,Color palette 3_217 blend ratio" hexmask.long.byte 0x364 18.--23. 1. " CP3_217R ,Color palette 3_217 red" hexmask.long.byte 0x364 10.--15. 1. " CP3_217G ,Color palette 3_217 green" hexmask.long.byte 0x364 2.--7. 1. " CP3_217B ,Color palette 3_217 blue" line.long 0x368 "CP3_218R,Color Palette 3 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP3_218A ,Color palette 3_218 blend ratio" hexmask.long.byte 0x368 18.--23. 1. " CP3_218R ,Color palette 3_218 red" hexmask.long.byte 0x368 10.--15. 1. " CP3_218G ,Color palette 3_218 green" hexmask.long.byte 0x368 2.--7. 1. " CP3_218B ,Color palette 3_218 blue" line.long 0x36C "CP3_219R,Color Palette 3 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP3_219A ,Color palette 3_219 blend ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP3_219R ,Color palette 3_219 red" hexmask.long.byte 0x36C 10.--15. 1. " CP3_219G ,Color palette 3_219 green" hexmask.long.byte 0x36C 2.--7. 1. " CP3_219B ,Color palette 3_219 blue" line.long 0x370 "CP3_220R,Color Palette 3 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP3_220A ,Color palette 3_220 blend ratio" hexmask.long.byte 0x370 18.--23. 1. " CP3_220R ,Color palette 3_220 red" hexmask.long.byte 0x370 10.--15. 1. " CP3_220G ,Color palette 3_220 green" hexmask.long.byte 0x370 2.--7. 1. " CP3_220B ,Color palette 3_220 blue" line.long 0x374 "CP3_221R,Color Palette 3 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP3_221A ,Color palette 3_221 blend ratio" hexmask.long.byte 0x374 18.--23. 1. " CP3_221R ,Color palette 3_221 red" hexmask.long.byte 0x374 10.--15. 1. " CP3_221G ,Color palette 3_221 green" hexmask.long.byte 0x374 2.--7. 1. " CP3_221B ,Color palette 3_221 blue" line.long 0x378 "CP3_222R,Color Palette 3 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP3_222A ,Color palette 3_222 blend ratio" hexmask.long.byte 0x378 18.--23. 1. " CP3_222R ,Color palette 3_222 red" hexmask.long.byte 0x378 10.--15. 1. " CP3_222G ,Color palette 3_222 green" hexmask.long.byte 0x378 2.--7. 1. " CP3_222B ,Color palette 3_222 blue" line.long 0x37C "CP3_223R,Color Palette 3 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP3_223A ,Color palette 3_223 blend ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP3_223R ,Color palette 3_223 red" hexmask.long.byte 0x37C 10.--15. 1. " CP3_223G ,Color palette 3_223 green" hexmask.long.byte 0x37C 2.--7. 1. " CP3_223B ,Color palette 3_223 blue" line.long 0x380 "CP3_224R,Color Palette 3 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP3_224A ,Color palette 3_224 blend ratio" hexmask.long.byte 0x380 18.--23. 1. " CP3_224R ,Color palette 3_224 red" hexmask.long.byte 0x380 10.--15. 1. " CP3_224G ,Color palette 3_224 green" hexmask.long.byte 0x380 2.--7. 1. " CP3_224B ,Color palette 3_224 blue" line.long 0x384 "CP3_225R,Color Palette 3 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP3_225A ,Color palette 3_225 blend ratio" hexmask.long.byte 0x384 18.--23. 1. " CP3_225R ,Color palette 3_225 red" hexmask.long.byte 0x384 10.--15. 1. " CP3_225G ,Color palette 3_225 green" hexmask.long.byte 0x384 2.--7. 1. " CP3_225B ,Color palette 3_225 blue" line.long 0x388 "CP3_226R,Color Palette 3 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP3_226A ,Color palette 3_226 blend ratio" hexmask.long.byte 0x388 18.--23. 1. " CP3_226R ,Color palette 3_226 red" hexmask.long.byte 0x388 10.--15. 1. " CP3_226G ,Color palette 3_226 green" hexmask.long.byte 0x388 2.--7. 1. " CP3_226B ,Color palette 3_226 blue" line.long 0x38C "CP3_227R,Color Palette 3 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP3_227A ,Color palette 3_227 blend ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP3_227R ,Color palette 3_227 red" hexmask.long.byte 0x38C 10.--15. 1. " CP3_227G ,Color palette 3_227 green" hexmask.long.byte 0x38C 2.--7. 1. " CP3_227B ,Color palette 3_227 blue" line.long 0x390 "CP3_228R,Color Palette 3 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP3_228A ,Color palette 3_228 blend ratio" hexmask.long.byte 0x390 18.--23. 1. " CP3_228R ,Color palette 3_228 red" hexmask.long.byte 0x390 10.--15. 1. " CP3_228G ,Color palette 3_228 green" hexmask.long.byte 0x390 2.--7. 1. " CP3_228B ,Color palette 3_228 blue" line.long 0x394 "CP3_229R,Color Palette 3 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP3_229A ,Color palette 3_229 blend ratio" hexmask.long.byte 0x394 18.--23. 1. " CP3_229R ,Color palette 3_229 red" hexmask.long.byte 0x394 10.--15. 1. " CP3_229G ,Color palette 3_229 green" hexmask.long.byte 0x394 2.--7. 1. " CP3_229B ,Color palette 3_229 blue" line.long 0x398 "CP3_230R,Color Palette 3 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP3_230A ,Color palette 3_230 blend ratio" hexmask.long.byte 0x398 18.--23. 1. " CP3_230R ,Color palette 3_230 red" hexmask.long.byte 0x398 10.--15. 1. " CP3_230G ,Color palette 3_230 green" hexmask.long.byte 0x398 2.--7. 1. " CP3_230B ,Color palette 3_230 blue" line.long 0x39C "CP3_231R,Color Palette 3 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP3_231A ,Color palette 3_231 blend ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP3_231R ,Color palette 3_231 red" hexmask.long.byte 0x39C 10.--15. 1. " CP3_231G ,Color palette 3_231 green" hexmask.long.byte 0x39C 2.--7. 1. " CP3_231B ,Color palette 3_231 blue" line.long 0x3A0 "CP3_232R,Color Palette 3 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP3_232A ,Color palette 3_232 blend ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP3_232R ,Color palette 3_232 red" hexmask.long.byte 0x3A0 10.--15. 1. " CP3_232G ,Color palette 3_232 green" hexmask.long.byte 0x3A0 2.--7. 1. " CP3_232B ,Color palette 3_232 blue" line.long 0x3A4 "CP3_233R,Color Palette 3 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP3_233A ,Color palette 3_233 blend ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP3_233R ,Color palette 3_233 red" hexmask.long.byte 0x3A4 10.--15. 1. " CP3_233G ,Color palette 3_233 green" hexmask.long.byte 0x3A4 2.--7. 1. " CP3_233B ,Color palette 3_233 blue" line.long 0x3A8 "CP3_234R,Color Palette 3 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP3_234A ,Color palette 3_234 blend ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP3_234R ,Color palette 3_234 red" hexmask.long.byte 0x3A8 10.--15. 1. " CP3_234G ,Color palette 3_234 green" hexmask.long.byte 0x3A8 2.--7. 1. " CP3_234B ,Color palette 3_234 blue" line.long 0x3AC "CP3_235R,Color Palette 3 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP3_235A ,Color palette 3_235 blend ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP3_235R ,Color palette 3_235 red" hexmask.long.byte 0x3AC 10.--15. 1. " CP3_235G ,Color palette 3_235 green" hexmask.long.byte 0x3AC 2.--7. 1. " CP3_235B ,Color palette 3_235 blue" line.long 0x3B0 "CP3_236R,Color Palette 3 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP3_236A ,Color palette 3_236 blend ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP3_236R ,Color palette 3_236 red" hexmask.long.byte 0x3B0 10.--15. 1. " CP3_236G ,Color palette 3_236 green" hexmask.long.byte 0x3B0 2.--7. 1. " CP3_236B ,Color palette 3_236 blue" line.long 0x3B4 "CP3_237R,Color Palette 3 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP3_237A ,Color palette 3_237 blend ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP3_237R ,Color palette 3_237 red" hexmask.long.byte 0x3B4 10.--15. 1. " CP3_237G ,Color palette 3_237 green" hexmask.long.byte 0x3B4 2.--7. 1. " CP3_237B ,Color palette 3_237 blue" line.long 0x3B8 "CP3_238R,Color Palette 3 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP3_238A ,Color palette 3_238 blend ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP3_238R ,Color palette 3_238 red" hexmask.long.byte 0x3B8 10.--15. 1. " CP3_238G ,Color palette 3_238 green" hexmask.long.byte 0x3B8 2.--7. 1. " CP3_238B ,Color palette 3_238 blue" line.long 0x3BC "CP3_239R,Color Palette 3 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP3_239A ,Color palette 3_239 blend ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP3_239R ,Color palette 3_239 red" hexmask.long.byte 0x3BC 10.--15. 1. " CP3_239G ,Color palette 3_239 green" hexmask.long.byte 0x3BC 2.--7. 1. " CP3_239B ,Color palette 3_239 blue" line.long 0x3C0 "CP3_240R,Color Palette 3 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP3_240A ,Color palette 3_240 blend ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP3_240R ,Color palette 3_240 red" hexmask.long.byte 0x3C0 10.--15. 1. " CP3_240G ,Color palette 3_240 green" hexmask.long.byte 0x3C0 2.--7. 1. " CP3_240B ,Color palette 3_240 blue" line.long 0x3C4 "CP3_241R,Color Palette 3 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP3_241A ,Color palette 3_241 blend ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP3_241R ,Color palette 3_241 red" hexmask.long.byte 0x3C4 10.--15. 1. " CP3_241G ,Color palette 3_241 green" hexmask.long.byte 0x3C4 2.--7. 1. " CP3_241B ,Color palette 3_241 blue" line.long 0x3C8 "CP3_242R,Color Palette 3 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP3_242A ,Color palette 3_242 blend ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP3_242R ,Color palette 3_242 red" hexmask.long.byte 0x3C8 10.--15. 1. " CP3_242G ,Color palette 3_242 green" hexmask.long.byte 0x3C8 2.--7. 1. " CP3_242B ,Color palette 3_242 blue" line.long 0x3CC "CP3_243R,Color Palette 3 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP3_243A ,Color palette 3_243 blend ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP3_243R ,Color palette 3_243 red" hexmask.long.byte 0x3CC 10.--15. 1. " CP3_243G ,Color palette 3_243 green" hexmask.long.byte 0x3CC 2.--7. 1. " CP3_243B ,Color palette 3_243 blue" line.long 0x3D0 "CP3_244R,Color Palette 3 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP3_244A ,Color palette 3_244 blend ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP3_244R ,Color palette 3_244 red" hexmask.long.byte 0x3D0 10.--15. 1. " CP3_244G ,Color palette 3_244 green" hexmask.long.byte 0x3D0 2.--7. 1. " CP3_244B ,Color palette 3_244 blue" line.long 0x3D4 "CP3_245R,Color Palette 3 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP3_245A ,Color palette 3_245 blend ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP3_245R ,Color palette 3_245 red" hexmask.long.byte 0x3D4 10.--15. 1. " CP3_245G ,Color palette 3_245 green" hexmask.long.byte 0x3D4 2.--7. 1. " CP3_245B ,Color palette 3_245 blue" line.long 0x3D8 "CP3_246R,Color Palette 3 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP3_246A ,Color palette 3_246 blend ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP3_246R ,Color palette 3_246 red" hexmask.long.byte 0x3D8 10.--15. 1. " CP3_246G ,Color palette 3_246 green" hexmask.long.byte 0x3D8 2.--7. 1. " CP3_246B ,Color palette 3_246 blue" line.long 0x3DC "CP3_247R,Color Palette 3 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP3_247A ,Color palette 3_247 blend ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP3_247R ,Color palette 3_247 red" hexmask.long.byte 0x3DC 10.--15. 1. " CP3_247G ,Color palette 3_247 green" hexmask.long.byte 0x3DC 2.--7. 1. " CP3_247B ,Color palette 3_247 blue" line.long 0x3E0 "CP3_248R,Color Palette 3 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP3_248A ,Color palette 3_248 blend ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP3_248R ,Color palette 3_248 red" hexmask.long.byte 0x3E0 10.--15. 1. " CP3_248G ,Color palette 3_248 green" hexmask.long.byte 0x3E0 2.--7. 1. " CP3_248B ,Color palette 3_248 blue" line.long 0x3E4 "CP3_249R,Color Palette 3 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP3_249A ,Color palette 3_249 blend ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP3_249R ,Color palette 3_249 red" hexmask.long.byte 0x3E4 10.--15. 1. " CP3_249G ,Color palette 3_249 green" hexmask.long.byte 0x3E4 2.--7. 1. " CP3_249B ,Color palette 3_249 blue" line.long 0x3E8 "CP3_250R,Color Palette 3 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP3_250A ,Color palette 3_250 blend ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP3_250R ,Color palette 3_250 red" hexmask.long.byte 0x3E8 10.--15. 1. " CP3_250G ,Color palette 3_250 green" hexmask.long.byte 0x3E8 2.--7. 1. " CP3_250B ,Color palette 3_250 blue" line.long 0x3EC "CP3_251R,Color Palette 3 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP3_251A ,Color palette 3_251 blend ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP3_251R ,Color palette 3_251 red" hexmask.long.byte 0x3EC 10.--15. 1. " CP3_251G ,Color palette 3_251 green" hexmask.long.byte 0x3EC 2.--7. 1. " CP3_251B ,Color palette 3_251 blue" line.long 0x3F0 "CP3_252R,Color Palette 3 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP3_252A ,Color palette 3_252 blend ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP3_252R ,Color palette 3_252 red" hexmask.long.byte 0x3F0 10.--15. 1. " CP3_252G ,Color palette 3_252 green" hexmask.long.byte 0x3F0 2.--7. 1. " CP3_252B ,Color palette 3_252 blue" line.long 0x3F4 "CP3_253R,Color Palette 3 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP3_253A ,Color palette 3_253 blend ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP3_253R ,Color palette 3_253 red" hexmask.long.byte 0x3F4 10.--15. 1. " CP3_253G ,Color palette 3_253 green" hexmask.long.byte 0x3F4 2.--7. 1. " CP3_253B ,Color palette 3_253 blue" line.long 0x3F8 "CP3_254R,Color Palette 3 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP3_254A ,Color palette 3_254 blend ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP3_254R ,Color palette 3_254 red" hexmask.long.byte 0x3F8 10.--15. 1. " CP3_254G ,Color palette 3_254 green" hexmask.long.byte 0x3F8 2.--7. 1. " CP3_254B ,Color palette 3_254 blue" line.long 0x3FC "CP3_255R,Color Palette 3 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP3_255A ,Color palette 3_255 blend ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP3_255R ,Color palette 3_255 red" hexmask.long.byte 0x3FC 10.--15. 1. " CP3_255G ,Color palette 3_255 green" hexmask.long.byte 0x3FC 2.--7. 1. " CP3_255B ,Color palette 3_255 blue" tree.end tree "Color Palette 4 Registers" width 10. group.long 0x4000++0x4ff line.long 0x0 "CP4_0 R,Color Palette 4 Register 0 " hexmask.long.byte 0x0 24.--31. 1. " CP4_0 A ,Color palette 4_0 blend ratio" hexmask.long.byte 0x0 18.--23. 1. " CP4_0 R ,Color palette 4_0 red" hexmask.long.byte 0x0 10.--15. 1. " CP4_0 G ,Color palette 4_0 green" hexmask.long.byte 0x0 2.--7. 1. " CP4_0 B ,Color palette 4_0 blue" line.long 0x4 "CP4_1 R,Color Palette 4 Register 1 " hexmask.long.byte 0x4 24.--31. 1. " CP4_1 A ,Color palette 4_1 blend ratio" hexmask.long.byte 0x4 18.--23. 1. " CP4_1 R ,Color palette 4_1 red" hexmask.long.byte 0x4 10.--15. 1. " CP4_1 G ,Color palette 4_1 green" hexmask.long.byte 0x4 2.--7. 1. " CP4_1 B ,Color palette 4_1 blue" line.long 0x8 "CP4_2 R,Color Palette 4 Register 2 " hexmask.long.byte 0x8 24.--31. 1. " CP4_2 A ,Color palette 4_2 blend ratio" hexmask.long.byte 0x8 18.--23. 1. " CP4_2 R ,Color palette 4_2 red" hexmask.long.byte 0x8 10.--15. 1. " CP4_2 G ,Color palette 4_2 green" hexmask.long.byte 0x8 2.--7. 1. " CP4_2 B ,Color palette 4_2 blue" line.long 0xC "CP4_3 R,Color Palette 4 Register 3 " hexmask.long.byte 0xC 24.--31. 1. " CP4_3 A ,Color palette 4_3 blend ratio" hexmask.long.byte 0xC 18.--23. 1. " CP4_3 R ,Color palette 4_3 red" hexmask.long.byte 0xC 10.--15. 1. " CP4_3 G ,Color palette 4_3 green" hexmask.long.byte 0xC 2.--7. 1. " CP4_3 B ,Color palette 4_3 blue" line.long 0x10 "CP4_4 R,Color Palette 4 Register 4 " hexmask.long.byte 0x10 24.--31. 1. " CP4_4 A ,Color palette 4_4 blend ratio" hexmask.long.byte 0x10 18.--23. 1. " CP4_4 R ,Color palette 4_4 red" hexmask.long.byte 0x10 10.--15. 1. " CP4_4 G ,Color palette 4_4 green" hexmask.long.byte 0x10 2.--7. 1. " CP4_4 B ,Color palette 4_4 blue" line.long 0x14 "CP4_5 R,Color Palette 4 Register 5 " hexmask.long.byte 0x14 24.--31. 1. " CP4_5 A ,Color palette 4_5 blend ratio" hexmask.long.byte 0x14 18.--23. 1. " CP4_5 R ,Color palette 4_5 red" hexmask.long.byte 0x14 10.--15. 1. " CP4_5 G ,Color palette 4_5 green" hexmask.long.byte 0x14 2.--7. 1. " CP4_5 B ,Color palette 4_5 blue" line.long 0x18 "CP4_6 R,Color Palette 4 Register 6 " hexmask.long.byte 0x18 24.--31. 1. " CP4_6 A ,Color palette 4_6 blend ratio" hexmask.long.byte 0x18 18.--23. 1. " CP4_6 R ,Color palette 4_6 red" hexmask.long.byte 0x18 10.--15. 1. " CP4_6 G ,Color palette 4_6 green" hexmask.long.byte 0x18 2.--7. 1. " CP4_6 B ,Color palette 4_6 blue" line.long 0x1C "CP4_7 R,Color Palette 4 Register 7 " hexmask.long.byte 0x1C 24.--31. 1. " CP4_7 A ,Color palette 4_7 blend ratio" hexmask.long.byte 0x1C 18.--23. 1. " CP4_7 R ,Color palette 4_7 red" hexmask.long.byte 0x1C 10.--15. 1. " CP4_7 G ,Color palette 4_7 green" hexmask.long.byte 0x1C 2.--7. 1. " CP4_7 B ,Color palette 4_7 blue" line.long 0x20 "CP4_8 R,Color Palette 4 Register 8 " hexmask.long.byte 0x20 24.--31. 1. " CP4_8 A ,Color palette 4_8 blend ratio" hexmask.long.byte 0x20 18.--23. 1. " CP4_8 R ,Color palette 4_8 red" hexmask.long.byte 0x20 10.--15. 1. " CP4_8 G ,Color palette 4_8 green" hexmask.long.byte 0x20 2.--7. 1. " CP4_8 B ,Color palette 4_8 blue" line.long 0x24 "CP4_9 R,Color Palette 4 Register 9 " hexmask.long.byte 0x24 24.--31. 1. " CP4_9 A ,Color palette 4_9 blend ratio" hexmask.long.byte 0x24 18.--23. 1. " CP4_9 R ,Color palette 4_9 red" hexmask.long.byte 0x24 10.--15. 1. " CP4_9 G ,Color palette 4_9 green" hexmask.long.byte 0x24 2.--7. 1. " CP4_9 B ,Color palette 4_9 blue" line.long 0x28 "CP4_10 R,Color Palette 4 Register 10 " hexmask.long.byte 0x28 24.--31. 1. " CP4_10 A ,Color palette 4_10 blend ratio" hexmask.long.byte 0x28 18.--23. 1. " CP4_10 R ,Color palette 4_10 red" hexmask.long.byte 0x28 10.--15. 1. " CP4_10 G ,Color palette 4_10 green" hexmask.long.byte 0x28 2.--7. 1. " CP4_10 B ,Color palette 4_10 blue" line.long 0x2C "CP4_11 R,Color Palette 4 Register 11 " hexmask.long.byte 0x2C 24.--31. 1. " CP4_11 A ,Color palette 4_11 blend ratio" hexmask.long.byte 0x2C 18.--23. 1. " CP4_11 R ,Color palette 4_11 red" hexmask.long.byte 0x2C 10.--15. 1. " CP4_11 G ,Color palette 4_11 green" hexmask.long.byte 0x2C 2.--7. 1. " CP4_11 B ,Color palette 4_11 blue" line.long 0x30 "CP4_12 R,Color Palette 4 Register 12 " hexmask.long.byte 0x30 24.--31. 1. " CP4_12 A ,Color palette 4_12 blend ratio" hexmask.long.byte 0x30 18.--23. 1. " CP4_12 R ,Color palette 4_12 red" hexmask.long.byte 0x30 10.--15. 1. " CP4_12 G ,Color palette 4_12 green" hexmask.long.byte 0x30 2.--7. 1. " CP4_12 B ,Color palette 4_12 blue" line.long 0x34 "CP4_13 R,Color Palette 4 Register 13 " hexmask.long.byte 0x34 24.--31. 1. " CP4_13 A ,Color palette 4_13 blend ratio" hexmask.long.byte 0x34 18.--23. 1. " CP4_13 R ,Color palette 4_13 red" hexmask.long.byte 0x34 10.--15. 1. " CP4_13 G ,Color palette 4_13 green" hexmask.long.byte 0x34 2.--7. 1. " CP4_13 B ,Color palette 4_13 blue" line.long 0x38 "CP4_14 R,Color Palette 4 Register 14 " hexmask.long.byte 0x38 24.--31. 1. " CP4_14 A ,Color palette 4_14 blend ratio" hexmask.long.byte 0x38 18.--23. 1. " CP4_14 R ,Color palette 4_14 red" hexmask.long.byte 0x38 10.--15. 1. " CP4_14 G ,Color palette 4_14 green" hexmask.long.byte 0x38 2.--7. 1. " CP4_14 B ,Color palette 4_14 blue" line.long 0x3C "CP4_15 R,Color Palette 4 Register 15 " hexmask.long.byte 0x3C 24.--31. 1. " CP4_15 A ,Color palette 4_15 blend ratio" hexmask.long.byte 0x3C 18.--23. 1. " CP4_15 R ,Color palette 4_15 red" hexmask.long.byte 0x3C 10.--15. 1. " CP4_15 G ,Color palette 4_15 green" hexmask.long.byte 0x3C 2.--7. 1. " CP4_15 B ,Color palette 4_15 blue" line.long 0x40 "CP4_16 R,Color Palette 4 Register 16 " hexmask.long.byte 0x40 24.--31. 1. " CP4_16 A ,Color palette 4_16 blend ratio" hexmask.long.byte 0x40 18.--23. 1. " CP4_16 R ,Color palette 4_16 red" hexmask.long.byte 0x40 10.--15. 1. " CP4_16 G ,Color palette 4_16 green" hexmask.long.byte 0x40 2.--7. 1. " CP4_16 B ,Color palette 4_16 blue" line.long 0x44 "CP4_17 R,Color Palette 4 Register 17 " hexmask.long.byte 0x44 24.--31. 1. " CP4_17 A ,Color palette 4_17 blend ratio" hexmask.long.byte 0x44 18.--23. 1. " CP4_17 R ,Color palette 4_17 red" hexmask.long.byte 0x44 10.--15. 1. " CP4_17 G ,Color palette 4_17 green" hexmask.long.byte 0x44 2.--7. 1. " CP4_17 B ,Color palette 4_17 blue" line.long 0x48 "CP4_18 R,Color Palette 4 Register 18 " hexmask.long.byte 0x48 24.--31. 1. " CP4_18 A ,Color palette 4_18 blend ratio" hexmask.long.byte 0x48 18.--23. 1. " CP4_18 R ,Color palette 4_18 red" hexmask.long.byte 0x48 10.--15. 1. " CP4_18 G ,Color palette 4_18 green" hexmask.long.byte 0x48 2.--7. 1. " CP4_18 B ,Color palette 4_18 blue" line.long 0x4C "CP4_19 R,Color Palette 4 Register 19 " hexmask.long.byte 0x4C 24.--31. 1. " CP4_19 A ,Color palette 4_19 blend ratio" hexmask.long.byte 0x4C 18.--23. 1. " CP4_19 R ,Color palette 4_19 red" hexmask.long.byte 0x4C 10.--15. 1. " CP4_19 G ,Color palette 4_19 green" hexmask.long.byte 0x4C 2.--7. 1. " CP4_19 B ,Color palette 4_19 blue" line.long 0x50 "CP4_20 R,Color Palette 4 Register 20 " hexmask.long.byte 0x50 24.--31. 1. " CP4_20 A ,Color palette 4_20 blend ratio" hexmask.long.byte 0x50 18.--23. 1. " CP4_20 R ,Color palette 4_20 red" hexmask.long.byte 0x50 10.--15. 1. " CP4_20 G ,Color palette 4_20 green" hexmask.long.byte 0x50 2.--7. 1. " CP4_20 B ,Color palette 4_20 blue" line.long 0x54 "CP4_21 R,Color Palette 4 Register 21 " hexmask.long.byte 0x54 24.--31. 1. " CP4_21 A ,Color palette 4_21 blend ratio" hexmask.long.byte 0x54 18.--23. 1. " CP4_21 R ,Color palette 4_21 red" hexmask.long.byte 0x54 10.--15. 1. " CP4_21 G ,Color palette 4_21 green" hexmask.long.byte 0x54 2.--7. 1. " CP4_21 B ,Color palette 4_21 blue" line.long 0x58 "CP4_22 R,Color Palette 4 Register 22 " hexmask.long.byte 0x58 24.--31. 1. " CP4_22 A ,Color palette 4_22 blend ratio" hexmask.long.byte 0x58 18.--23. 1. " CP4_22 R ,Color palette 4_22 red" hexmask.long.byte 0x58 10.--15. 1. " CP4_22 G ,Color palette 4_22 green" hexmask.long.byte 0x58 2.--7. 1. " CP4_22 B ,Color palette 4_22 blue" line.long 0x5C "CP4_23 R,Color Palette 4 Register 23 " hexmask.long.byte 0x5C 24.--31. 1. " CP4_23 A ,Color palette 4_23 blend ratio" hexmask.long.byte 0x5C 18.--23. 1. " CP4_23 R ,Color palette 4_23 red" hexmask.long.byte 0x5C 10.--15. 1. " CP4_23 G ,Color palette 4_23 green" hexmask.long.byte 0x5C 2.--7. 1. " CP4_23 B ,Color palette 4_23 blue" line.long 0x60 "CP4_24 R,Color Palette 4 Register 24 " hexmask.long.byte 0x60 24.--31. 1. " CP4_24 A ,Color palette 4_24 blend ratio" hexmask.long.byte 0x60 18.--23. 1. " CP4_24 R ,Color palette 4_24 red" hexmask.long.byte 0x60 10.--15. 1. " CP4_24 G ,Color palette 4_24 green" hexmask.long.byte 0x60 2.--7. 1. " CP4_24 B ,Color palette 4_24 blue" line.long 0x64 "CP4_25 R,Color Palette 4 Register 25 " hexmask.long.byte 0x64 24.--31. 1. " CP4_25 A ,Color palette 4_25 blend ratio" hexmask.long.byte 0x64 18.--23. 1. " CP4_25 R ,Color palette 4_25 red" hexmask.long.byte 0x64 10.--15. 1. " CP4_25 G ,Color palette 4_25 green" hexmask.long.byte 0x64 2.--7. 1. " CP4_25 B ,Color palette 4_25 blue" line.long 0x68 "CP4_26 R,Color Palette 4 Register 26 " hexmask.long.byte 0x68 24.--31. 1. " CP4_26 A ,Color palette 4_26 blend ratio" hexmask.long.byte 0x68 18.--23. 1. " CP4_26 R ,Color palette 4_26 red" hexmask.long.byte 0x68 10.--15. 1. " CP4_26 G ,Color palette 4_26 green" hexmask.long.byte 0x68 2.--7. 1. " CP4_26 B ,Color palette 4_26 blue" line.long 0x6C "CP4_27 R,Color Palette 4 Register 27 " hexmask.long.byte 0x6C 24.--31. 1. " CP4_27 A ,Color palette 4_27 blend ratio" hexmask.long.byte 0x6C 18.--23. 1. " CP4_27 R ,Color palette 4_27 red" hexmask.long.byte 0x6C 10.--15. 1. " CP4_27 G ,Color palette 4_27 green" hexmask.long.byte 0x6C 2.--7. 1. " CP4_27 B ,Color palette 4_27 blue" line.long 0x70 "CP4_28 R,Color Palette 4 Register 28 " hexmask.long.byte 0x70 24.--31. 1. " CP4_28 A ,Color palette 4_28 blend ratio" hexmask.long.byte 0x70 18.--23. 1. " CP4_28 R ,Color palette 4_28 red" hexmask.long.byte 0x70 10.--15. 1. " CP4_28 G ,Color palette 4_28 green" hexmask.long.byte 0x70 2.--7. 1. " CP4_28 B ,Color palette 4_28 blue" line.long 0x74 "CP4_29 R,Color Palette 4 Register 29 " hexmask.long.byte 0x74 24.--31. 1. " CP4_29 A ,Color palette 4_29 blend ratio" hexmask.long.byte 0x74 18.--23. 1. " CP4_29 R ,Color palette 4_29 red" hexmask.long.byte 0x74 10.--15. 1. " CP4_29 G ,Color palette 4_29 green" hexmask.long.byte 0x74 2.--7. 1. " CP4_29 B ,Color palette 4_29 blue" line.long 0x78 "CP4_30 R,Color Palette 4 Register 30 " hexmask.long.byte 0x78 24.--31. 1. " CP4_30 A ,Color palette 4_30 blend ratio" hexmask.long.byte 0x78 18.--23. 1. " CP4_30 R ,Color palette 4_30 red" hexmask.long.byte 0x78 10.--15. 1. " CP4_30 G ,Color palette 4_30 green" hexmask.long.byte 0x78 2.--7. 1. " CP4_30 B ,Color palette 4_30 blue" line.long 0x7C "CP4_31 R,Color Palette 4 Register 31 " hexmask.long.byte 0x7C 24.--31. 1. " CP4_31 A ,Color palette 4_31 blend ratio" hexmask.long.byte 0x7C 18.--23. 1. " CP4_31 R ,Color palette 4_31 red" hexmask.long.byte 0x7C 10.--15. 1. " CP4_31 G ,Color palette 4_31 green" hexmask.long.byte 0x7C 2.--7. 1. " CP4_31 B ,Color palette 4_31 blue" line.long 0x80 "CP4_32 R,Color Palette 4 Register 32 " hexmask.long.byte 0x80 24.--31. 1. " CP4_32 A ,Color palette 4_32 blend ratio" hexmask.long.byte 0x80 18.--23. 1. " CP4_32 R ,Color palette 4_32 red" hexmask.long.byte 0x80 10.--15. 1. " CP4_32 G ,Color palette 4_32 green" hexmask.long.byte 0x80 2.--7. 1. " CP4_32 B ,Color palette 4_32 blue" line.long 0x84 "CP4_33 R,Color Palette 4 Register 33 " hexmask.long.byte 0x84 24.--31. 1. " CP4_33 A ,Color palette 4_33 blend ratio" hexmask.long.byte 0x84 18.--23. 1. " CP4_33 R ,Color palette 4_33 red" hexmask.long.byte 0x84 10.--15. 1. " CP4_33 G ,Color palette 4_33 green" hexmask.long.byte 0x84 2.--7. 1. " CP4_33 B ,Color palette 4_33 blue" line.long 0x88 "CP4_34 R,Color Palette 4 Register 34 " hexmask.long.byte 0x88 24.--31. 1. " CP4_34 A ,Color palette 4_34 blend ratio" hexmask.long.byte 0x88 18.--23. 1. " CP4_34 R ,Color palette 4_34 red" hexmask.long.byte 0x88 10.--15. 1. " CP4_34 G ,Color palette 4_34 green" hexmask.long.byte 0x88 2.--7. 1. " CP4_34 B ,Color palette 4_34 blue" line.long 0x8C "CP4_35 R,Color Palette 4 Register 35 " hexmask.long.byte 0x8C 24.--31. 1. " CP4_35 A ,Color palette 4_35 blend ratio" hexmask.long.byte 0x8C 18.--23. 1. " CP4_35 R ,Color palette 4_35 red" hexmask.long.byte 0x8C 10.--15. 1. " CP4_35 G ,Color palette 4_35 green" hexmask.long.byte 0x8C 2.--7. 1. " CP4_35 B ,Color palette 4_35 blue" line.long 0x90 "CP4_36 R,Color Palette 4 Register 36 " hexmask.long.byte 0x90 24.--31. 1. " CP4_36 A ,Color palette 4_36 blend ratio" hexmask.long.byte 0x90 18.--23. 1. " CP4_36 R ,Color palette 4_36 red" hexmask.long.byte 0x90 10.--15. 1. " CP4_36 G ,Color palette 4_36 green" hexmask.long.byte 0x90 2.--7. 1. " CP4_36 B ,Color palette 4_36 blue" line.long 0x94 "CP4_37 R,Color Palette 4 Register 37 " hexmask.long.byte 0x94 24.--31. 1. " CP4_37 A ,Color palette 4_37 blend ratio" hexmask.long.byte 0x94 18.--23. 1. " CP4_37 R ,Color palette 4_37 red" hexmask.long.byte 0x94 10.--15. 1. " CP4_37 G ,Color palette 4_37 green" hexmask.long.byte 0x94 2.--7. 1. " CP4_37 B ,Color palette 4_37 blue" line.long 0x98 "CP4_38 R,Color Palette 4 Register 38 " hexmask.long.byte 0x98 24.--31. 1. " CP4_38 A ,Color palette 4_38 blend ratio" hexmask.long.byte 0x98 18.--23. 1. " CP4_38 R ,Color palette 4_38 red" hexmask.long.byte 0x98 10.--15. 1. " CP4_38 G ,Color palette 4_38 green" hexmask.long.byte 0x98 2.--7. 1. " CP4_38 B ,Color palette 4_38 blue" line.long 0x9C "CP4_39 R,Color Palette 4 Register 39 " hexmask.long.byte 0x9C 24.--31. 1. " CP4_39 A ,Color palette 4_39 blend ratio" hexmask.long.byte 0x9C 18.--23. 1. " CP4_39 R ,Color palette 4_39 red" hexmask.long.byte 0x9C 10.--15. 1. " CP4_39 G ,Color palette 4_39 green" hexmask.long.byte 0x9C 2.--7. 1. " CP4_39 B ,Color palette 4_39 blue" line.long 0xA0 "CP4_40 R,Color Palette 4 Register 40 " hexmask.long.byte 0xA0 24.--31. 1. " CP4_40 A ,Color palette 4_40 blend ratio" hexmask.long.byte 0xA0 18.--23. 1. " CP4_40 R ,Color palette 4_40 red" hexmask.long.byte 0xA0 10.--15. 1. " CP4_40 G ,Color palette 4_40 green" hexmask.long.byte 0xA0 2.--7. 1. " CP4_40 B ,Color palette 4_40 blue" line.long 0xA4 "CP4_41 R,Color Palette 4 Register 41 " hexmask.long.byte 0xA4 24.--31. 1. " CP4_41 A ,Color palette 4_41 blend ratio" hexmask.long.byte 0xA4 18.--23. 1. " CP4_41 R ,Color palette 4_41 red" hexmask.long.byte 0xA4 10.--15. 1. " CP4_41 G ,Color palette 4_41 green" hexmask.long.byte 0xA4 2.--7. 1. " CP4_41 B ,Color palette 4_41 blue" line.long 0xA8 "CP4_42 R,Color Palette 4 Register 42 " hexmask.long.byte 0xA8 24.--31. 1. " CP4_42 A ,Color palette 4_42 blend ratio" hexmask.long.byte 0xA8 18.--23. 1. " CP4_42 R ,Color palette 4_42 red" hexmask.long.byte 0xA8 10.--15. 1. " CP4_42 G ,Color palette 4_42 green" hexmask.long.byte 0xA8 2.--7. 1. " CP4_42 B ,Color palette 4_42 blue" line.long 0xAC "CP4_43 R,Color Palette 4 Register 43 " hexmask.long.byte 0xAC 24.--31. 1. " CP4_43 A ,Color palette 4_43 blend ratio" hexmask.long.byte 0xAC 18.--23. 1. " CP4_43 R ,Color palette 4_43 red" hexmask.long.byte 0xAC 10.--15. 1. " CP4_43 G ,Color palette 4_43 green" hexmask.long.byte 0xAC 2.--7. 1. " CP4_43 B ,Color palette 4_43 blue" line.long 0xB0 "CP4_44 R,Color Palette 4 Register 44 " hexmask.long.byte 0xB0 24.--31. 1. " CP4_44 A ,Color palette 4_44 blend ratio" hexmask.long.byte 0xB0 18.--23. 1. " CP4_44 R ,Color palette 4_44 red" hexmask.long.byte 0xB0 10.--15. 1. " CP4_44 G ,Color palette 4_44 green" hexmask.long.byte 0xB0 2.--7. 1. " CP4_44 B ,Color palette 4_44 blue" line.long 0xB4 "CP4_45 R,Color Palette 4 Register 45 " hexmask.long.byte 0xB4 24.--31. 1. " CP4_45 A ,Color palette 4_45 blend ratio" hexmask.long.byte 0xB4 18.--23. 1. " CP4_45 R ,Color palette 4_45 red" hexmask.long.byte 0xB4 10.--15. 1. " CP4_45 G ,Color palette 4_45 green" hexmask.long.byte 0xB4 2.--7. 1. " CP4_45 B ,Color palette 4_45 blue" line.long 0xB8 "CP4_46 R,Color Palette 4 Register 46 " hexmask.long.byte 0xB8 24.--31. 1. " CP4_46 A ,Color palette 4_46 blend ratio" hexmask.long.byte 0xB8 18.--23. 1. " CP4_46 R ,Color palette 4_46 red" hexmask.long.byte 0xB8 10.--15. 1. " CP4_46 G ,Color palette 4_46 green" hexmask.long.byte 0xB8 2.--7. 1. " CP4_46 B ,Color palette 4_46 blue" line.long 0xBC "CP4_47 R,Color Palette 4 Register 47 " hexmask.long.byte 0xBC 24.--31. 1. " CP4_47 A ,Color palette 4_47 blend ratio" hexmask.long.byte 0xBC 18.--23. 1. " CP4_47 R ,Color palette 4_47 red" hexmask.long.byte 0xBC 10.--15. 1. " CP4_47 G ,Color palette 4_47 green" hexmask.long.byte 0xBC 2.--7. 1. " CP4_47 B ,Color palette 4_47 blue" line.long 0xC0 "CP4_48 R,Color Palette 4 Register 48 " hexmask.long.byte 0xC0 24.--31. 1. " CP4_48 A ,Color palette 4_48 blend ratio" hexmask.long.byte 0xC0 18.--23. 1. " CP4_48 R ,Color palette 4_48 red" hexmask.long.byte 0xC0 10.--15. 1. " CP4_48 G ,Color palette 4_48 green" hexmask.long.byte 0xC0 2.--7. 1. " CP4_48 B ,Color palette 4_48 blue" line.long 0xC4 "CP4_49 R,Color Palette 4 Register 49 " hexmask.long.byte 0xC4 24.--31. 1. " CP4_49 A ,Color palette 4_49 blend ratio" hexmask.long.byte 0xC4 18.--23. 1. " CP4_49 R ,Color palette 4_49 red" hexmask.long.byte 0xC4 10.--15. 1. " CP4_49 G ,Color palette 4_49 green" hexmask.long.byte 0xC4 2.--7. 1. " CP4_49 B ,Color palette 4_49 blue" line.long 0xC8 "CP4_50 R,Color Palette 4 Register 50 " hexmask.long.byte 0xC8 24.--31. 1. " CP4_50 A ,Color palette 4_50 blend ratio" hexmask.long.byte 0xC8 18.--23. 1. " CP4_50 R ,Color palette 4_50 red" hexmask.long.byte 0xC8 10.--15. 1. " CP4_50 G ,Color palette 4_50 green" hexmask.long.byte 0xC8 2.--7. 1. " CP4_50 B ,Color palette 4_50 blue" line.long 0xCC "CP4_51 R,Color Palette 4 Register 51 " hexmask.long.byte 0xCC 24.--31. 1. " CP4_51 A ,Color palette 4_51 blend ratio" hexmask.long.byte 0xCC 18.--23. 1. " CP4_51 R ,Color palette 4_51 red" hexmask.long.byte 0xCC 10.--15. 1. " CP4_51 G ,Color palette 4_51 green" hexmask.long.byte 0xCC 2.--7. 1. " CP4_51 B ,Color palette 4_51 blue" line.long 0xD0 "CP4_52 R,Color Palette 4 Register 52 " hexmask.long.byte 0xD0 24.--31. 1. " CP4_52 A ,Color palette 4_52 blend ratio" hexmask.long.byte 0xD0 18.--23. 1. " CP4_52 R ,Color palette 4_52 red" hexmask.long.byte 0xD0 10.--15. 1. " CP4_52 G ,Color palette 4_52 green" hexmask.long.byte 0xD0 2.--7. 1. " CP4_52 B ,Color palette 4_52 blue" line.long 0xD4 "CP4_53 R,Color Palette 4 Register 53 " hexmask.long.byte 0xD4 24.--31. 1. " CP4_53 A ,Color palette 4_53 blend ratio" hexmask.long.byte 0xD4 18.--23. 1. " CP4_53 R ,Color palette 4_53 red" hexmask.long.byte 0xD4 10.--15. 1. " CP4_53 G ,Color palette 4_53 green" hexmask.long.byte 0xD4 2.--7. 1. " CP4_53 B ,Color palette 4_53 blue" line.long 0xD8 "CP4_54 R,Color Palette 4 Register 54 " hexmask.long.byte 0xD8 24.--31. 1. " CP4_54 A ,Color palette 4_54 blend ratio" hexmask.long.byte 0xD8 18.--23. 1. " CP4_54 R ,Color palette 4_54 red" hexmask.long.byte 0xD8 10.--15. 1. " CP4_54 G ,Color palette 4_54 green" hexmask.long.byte 0xD8 2.--7. 1. " CP4_54 B ,Color palette 4_54 blue" line.long 0xDC "CP4_55 R,Color Palette 4 Register 55 " hexmask.long.byte 0xDC 24.--31. 1. " CP4_55 A ,Color palette 4_55 blend ratio" hexmask.long.byte 0xDC 18.--23. 1. " CP4_55 R ,Color palette 4_55 red" hexmask.long.byte 0xDC 10.--15. 1. " CP4_55 G ,Color palette 4_55 green" hexmask.long.byte 0xDC 2.--7. 1. " CP4_55 B ,Color palette 4_55 blue" line.long 0xE0 "CP4_56 R,Color Palette 4 Register 56 " hexmask.long.byte 0xE0 24.--31. 1. " CP4_56 A ,Color palette 4_56 blend ratio" hexmask.long.byte 0xE0 18.--23. 1. " CP4_56 R ,Color palette 4_56 red" hexmask.long.byte 0xE0 10.--15. 1. " CP4_56 G ,Color palette 4_56 green" hexmask.long.byte 0xE0 2.--7. 1. " CP4_56 B ,Color palette 4_56 blue" line.long 0xE4 "CP4_57 R,Color Palette 4 Register 57 " hexmask.long.byte 0xE4 24.--31. 1. " CP4_57 A ,Color palette 4_57 blend ratio" hexmask.long.byte 0xE4 18.--23. 1. " CP4_57 R ,Color palette 4_57 red" hexmask.long.byte 0xE4 10.--15. 1. " CP4_57 G ,Color palette 4_57 green" hexmask.long.byte 0xE4 2.--7. 1. " CP4_57 B ,Color palette 4_57 blue" line.long 0xE8 "CP4_58 R,Color Palette 4 Register 58 " hexmask.long.byte 0xE8 24.--31. 1. " CP4_58 A ,Color palette 4_58 blend ratio" hexmask.long.byte 0xE8 18.--23. 1. " CP4_58 R ,Color palette 4_58 red" hexmask.long.byte 0xE8 10.--15. 1. " CP4_58 G ,Color palette 4_58 green" hexmask.long.byte 0xE8 2.--7. 1. " CP4_58 B ,Color palette 4_58 blue" line.long 0xEC "CP4_59 R,Color Palette 4 Register 59 " hexmask.long.byte 0xEC 24.--31. 1. " CP4_59 A ,Color palette 4_59 blend ratio" hexmask.long.byte 0xEC 18.--23. 1. " CP4_59 R ,Color palette 4_59 red" hexmask.long.byte 0xEC 10.--15. 1. " CP4_59 G ,Color palette 4_59 green" hexmask.long.byte 0xEC 2.--7. 1. " CP4_59 B ,Color palette 4_59 blue" line.long 0xF0 "CP4_60 R,Color Palette 4 Register 60 " hexmask.long.byte 0xF0 24.--31. 1. " CP4_60 A ,Color palette 4_60 blend ratio" hexmask.long.byte 0xF0 18.--23. 1. " CP4_60 R ,Color palette 4_60 red" hexmask.long.byte 0xF0 10.--15. 1. " CP4_60 G ,Color palette 4_60 green" hexmask.long.byte 0xF0 2.--7. 1. " CP4_60 B ,Color palette 4_60 blue" line.long 0xF4 "CP4_61 R,Color Palette 4 Register 61 " hexmask.long.byte 0xF4 24.--31. 1. " CP4_61 A ,Color palette 4_61 blend ratio" hexmask.long.byte 0xF4 18.--23. 1. " CP4_61 R ,Color palette 4_61 red" hexmask.long.byte 0xF4 10.--15. 1. " CP4_61 G ,Color palette 4_61 green" hexmask.long.byte 0xF4 2.--7. 1. " CP4_61 B ,Color palette 4_61 blue" line.long 0xF8 "CP4_62 R,Color Palette 4 Register 62 " hexmask.long.byte 0xF8 24.--31. 1. " CP4_62 A ,Color palette 4_62 blend ratio" hexmask.long.byte 0xF8 18.--23. 1. " CP4_62 R ,Color palette 4_62 red" hexmask.long.byte 0xF8 10.--15. 1. " CP4_62 G ,Color palette 4_62 green" hexmask.long.byte 0xF8 2.--7. 1. " CP4_62 B ,Color palette 4_62 blue" line.long 0xFC "CP4_63 R,Color Palette 4 Register 63 " hexmask.long.byte 0xFC 24.--31. 1. " CP4_63 A ,Color palette 4_63 blend ratio" hexmask.long.byte 0xFC 18.--23. 1. " CP4_63 R ,Color palette 4_63 red" hexmask.long.byte 0xFC 10.--15. 1. " CP4_63 G ,Color palette 4_63 green" hexmask.long.byte 0xFC 2.--7. 1. " CP4_63 B ,Color palette 4_63 blue" line.long 0x100 "CP4_64 R,Color Palette 4 Register 64 " hexmask.long.byte 0x100 24.--31. 1. " CP4_64 A ,Color palette 4_64 blend ratio" hexmask.long.byte 0x100 18.--23. 1. " CP4_64 R ,Color palette 4_64 red" hexmask.long.byte 0x100 10.--15. 1. " CP4_64 G ,Color palette 4_64 green" hexmask.long.byte 0x100 2.--7. 1. " CP4_64 B ,Color palette 4_64 blue" line.long 0x104 "CP4_65 R,Color Palette 4 Register 65 " hexmask.long.byte 0x104 24.--31. 1. " CP4_65 A ,Color palette 4_65 blend ratio" hexmask.long.byte 0x104 18.--23. 1. " CP4_65 R ,Color palette 4_65 red" hexmask.long.byte 0x104 10.--15. 1. " CP4_65 G ,Color palette 4_65 green" hexmask.long.byte 0x104 2.--7. 1. " CP4_65 B ,Color palette 4_65 blue" line.long 0x108 "CP4_66 R,Color Palette 4 Register 66 " hexmask.long.byte 0x108 24.--31. 1. " CP4_66 A ,Color palette 4_66 blend ratio" hexmask.long.byte 0x108 18.--23. 1. " CP4_66 R ,Color palette 4_66 red" hexmask.long.byte 0x108 10.--15. 1. " CP4_66 G ,Color palette 4_66 green" hexmask.long.byte 0x108 2.--7. 1. " CP4_66 B ,Color palette 4_66 blue" line.long 0x10C "CP4_67 R,Color Palette 4 Register 67 " hexmask.long.byte 0x10C 24.--31. 1. " CP4_67 A ,Color palette 4_67 blend ratio" hexmask.long.byte 0x10C 18.--23. 1. " CP4_67 R ,Color palette 4_67 red" hexmask.long.byte 0x10C 10.--15. 1. " CP4_67 G ,Color palette 4_67 green" hexmask.long.byte 0x10C 2.--7. 1. " CP4_67 B ,Color palette 4_67 blue" line.long 0x110 "CP4_68 R,Color Palette 4 Register 68 " hexmask.long.byte 0x110 24.--31. 1. " CP4_68 A ,Color palette 4_68 blend ratio" hexmask.long.byte 0x110 18.--23. 1. " CP4_68 R ,Color palette 4_68 red" hexmask.long.byte 0x110 10.--15. 1. " CP4_68 G ,Color palette 4_68 green" hexmask.long.byte 0x110 2.--7. 1. " CP4_68 B ,Color palette 4_68 blue" line.long 0x114 "CP4_69 R,Color Palette 4 Register 69 " hexmask.long.byte 0x114 24.--31. 1. " CP4_69 A ,Color palette 4_69 blend ratio" hexmask.long.byte 0x114 18.--23. 1. " CP4_69 R ,Color palette 4_69 red" hexmask.long.byte 0x114 10.--15. 1. " CP4_69 G ,Color palette 4_69 green" hexmask.long.byte 0x114 2.--7. 1. " CP4_69 B ,Color palette 4_69 blue" line.long 0x118 "CP4_70 R,Color Palette 4 Register 70 " hexmask.long.byte 0x118 24.--31. 1. " CP4_70 A ,Color palette 4_70 blend ratio" hexmask.long.byte 0x118 18.--23. 1. " CP4_70 R ,Color palette 4_70 red" hexmask.long.byte 0x118 10.--15. 1. " CP4_70 G ,Color palette 4_70 green" hexmask.long.byte 0x118 2.--7. 1. " CP4_70 B ,Color palette 4_70 blue" line.long 0x11C "CP4_71 R,Color Palette 4 Register 71 " hexmask.long.byte 0x11C 24.--31. 1. " CP4_71 A ,Color palette 4_71 blend ratio" hexmask.long.byte 0x11C 18.--23. 1. " CP4_71 R ,Color palette 4_71 red" hexmask.long.byte 0x11C 10.--15. 1. " CP4_71 G ,Color palette 4_71 green" hexmask.long.byte 0x11C 2.--7. 1. " CP4_71 B ,Color palette 4_71 blue" line.long 0x120 "CP4_72 R,Color Palette 4 Register 72 " hexmask.long.byte 0x120 24.--31. 1. " CP4_72 A ,Color palette 4_72 blend ratio" hexmask.long.byte 0x120 18.--23. 1. " CP4_72 R ,Color palette 4_72 red" hexmask.long.byte 0x120 10.--15. 1. " CP4_72 G ,Color palette 4_72 green" hexmask.long.byte 0x120 2.--7. 1. " CP4_72 B ,Color palette 4_72 blue" line.long 0x124 "CP4_73 R,Color Palette 4 Register 73 " hexmask.long.byte 0x124 24.--31. 1. " CP4_73 A ,Color palette 4_73 blend ratio" hexmask.long.byte 0x124 18.--23. 1. " CP4_73 R ,Color palette 4_73 red" hexmask.long.byte 0x124 10.--15. 1. " CP4_73 G ,Color palette 4_73 green" hexmask.long.byte 0x124 2.--7. 1. " CP4_73 B ,Color palette 4_73 blue" line.long 0x128 "CP4_74 R,Color Palette 4 Register 74 " hexmask.long.byte 0x128 24.--31. 1. " CP4_74 A ,Color palette 4_74 blend ratio" hexmask.long.byte 0x128 18.--23. 1. " CP4_74 R ,Color palette 4_74 red" hexmask.long.byte 0x128 10.--15. 1. " CP4_74 G ,Color palette 4_74 green" hexmask.long.byte 0x128 2.--7. 1. " CP4_74 B ,Color palette 4_74 blue" line.long 0x12C "CP4_75 R,Color Palette 4 Register 75 " hexmask.long.byte 0x12C 24.--31. 1. " CP4_75 A ,Color palette 4_75 blend ratio" hexmask.long.byte 0x12C 18.--23. 1. " CP4_75 R ,Color palette 4_75 red" hexmask.long.byte 0x12C 10.--15. 1. " CP4_75 G ,Color palette 4_75 green" hexmask.long.byte 0x12C 2.--7. 1. " CP4_75 B ,Color palette 4_75 blue" line.long 0x130 "CP4_76 R,Color Palette 4 Register 76 " hexmask.long.byte 0x130 24.--31. 1. " CP4_76 A ,Color palette 4_76 blend ratio" hexmask.long.byte 0x130 18.--23. 1. " CP4_76 R ,Color palette 4_76 red" hexmask.long.byte 0x130 10.--15. 1. " CP4_76 G ,Color palette 4_76 green" hexmask.long.byte 0x130 2.--7. 1. " CP4_76 B ,Color palette 4_76 blue" line.long 0x134 "CP4_77 R,Color Palette 4 Register 77 " hexmask.long.byte 0x134 24.--31. 1. " CP4_77 A ,Color palette 4_77 blend ratio" hexmask.long.byte 0x134 18.--23. 1. " CP4_77 R ,Color palette 4_77 red" hexmask.long.byte 0x134 10.--15. 1. " CP4_77 G ,Color palette 4_77 green" hexmask.long.byte 0x134 2.--7. 1. " CP4_77 B ,Color palette 4_77 blue" line.long 0x138 "CP4_78 R,Color Palette 4 Register 78 " hexmask.long.byte 0x138 24.--31. 1. " CP4_78 A ,Color palette 4_78 blend ratio" hexmask.long.byte 0x138 18.--23. 1. " CP4_78 R ,Color palette 4_78 red" hexmask.long.byte 0x138 10.--15. 1. " CP4_78 G ,Color palette 4_78 green" hexmask.long.byte 0x138 2.--7. 1. " CP4_78 B ,Color palette 4_78 blue" line.long 0x13C "CP4_79 R,Color Palette 4 Register 79 " hexmask.long.byte 0x13C 24.--31. 1. " CP4_79 A ,Color palette 4_79 blend ratio" hexmask.long.byte 0x13C 18.--23. 1. " CP4_79 R ,Color palette 4_79 red" hexmask.long.byte 0x13C 10.--15. 1. " CP4_79 G ,Color palette 4_79 green" hexmask.long.byte 0x13C 2.--7. 1. " CP4_79 B ,Color palette 4_79 blue" line.long 0x140 "CP4_80 R,Color Palette 4 Register 80 " hexmask.long.byte 0x140 24.--31. 1. " CP4_80 A ,Color palette 4_80 blend ratio" hexmask.long.byte 0x140 18.--23. 1. " CP4_80 R ,Color palette 4_80 red" hexmask.long.byte 0x140 10.--15. 1. " CP4_80 G ,Color palette 4_80 green" hexmask.long.byte 0x140 2.--7. 1. " CP4_80 B ,Color palette 4_80 blue" line.long 0x144 "CP4_81 R,Color Palette 4 Register 81 " hexmask.long.byte 0x144 24.--31. 1. " CP4_81 A ,Color palette 4_81 blend ratio" hexmask.long.byte 0x144 18.--23. 1. " CP4_81 R ,Color palette 4_81 red" hexmask.long.byte 0x144 10.--15. 1. " CP4_81 G ,Color palette 4_81 green" hexmask.long.byte 0x144 2.--7. 1. " CP4_81 B ,Color palette 4_81 blue" line.long 0x148 "CP4_82 R,Color Palette 4 Register 82 " hexmask.long.byte 0x148 24.--31. 1. " CP4_82 A ,Color palette 4_82 blend ratio" hexmask.long.byte 0x148 18.--23. 1. " CP4_82 R ,Color palette 4_82 red" hexmask.long.byte 0x148 10.--15. 1. " CP4_82 G ,Color palette 4_82 green" hexmask.long.byte 0x148 2.--7. 1. " CP4_82 B ,Color palette 4_82 blue" line.long 0x14C "CP4_83 R,Color Palette 4 Register 83 " hexmask.long.byte 0x14C 24.--31. 1. " CP4_83 A ,Color palette 4_83 blend ratio" hexmask.long.byte 0x14C 18.--23. 1. " CP4_83 R ,Color palette 4_83 red" hexmask.long.byte 0x14C 10.--15. 1. " CP4_83 G ,Color palette 4_83 green" hexmask.long.byte 0x14C 2.--7. 1. " CP4_83 B ,Color palette 4_83 blue" line.long 0x150 "CP4_84 R,Color Palette 4 Register 84 " hexmask.long.byte 0x150 24.--31. 1. " CP4_84 A ,Color palette 4_84 blend ratio" hexmask.long.byte 0x150 18.--23. 1. " CP4_84 R ,Color palette 4_84 red" hexmask.long.byte 0x150 10.--15. 1. " CP4_84 G ,Color palette 4_84 green" hexmask.long.byte 0x150 2.--7. 1. " CP4_84 B ,Color palette 4_84 blue" line.long 0x154 "CP4_85 R,Color Palette 4 Register 85 " hexmask.long.byte 0x154 24.--31. 1. " CP4_85 A ,Color palette 4_85 blend ratio" hexmask.long.byte 0x154 18.--23. 1. " CP4_85 R ,Color palette 4_85 red" hexmask.long.byte 0x154 10.--15. 1. " CP4_85 G ,Color palette 4_85 green" hexmask.long.byte 0x154 2.--7. 1. " CP4_85 B ,Color palette 4_85 blue" line.long 0x158 "CP4_86 R,Color Palette 4 Register 86 " hexmask.long.byte 0x158 24.--31. 1. " CP4_86 A ,Color palette 4_86 blend ratio" hexmask.long.byte 0x158 18.--23. 1. " CP4_86 R ,Color palette 4_86 red" hexmask.long.byte 0x158 10.--15. 1. " CP4_86 G ,Color palette 4_86 green" hexmask.long.byte 0x158 2.--7. 1. " CP4_86 B ,Color palette 4_86 blue" line.long 0x15C "CP4_87 R,Color Palette 4 Register 87 " hexmask.long.byte 0x15C 24.--31. 1. " CP4_87 A ,Color palette 4_87 blend ratio" hexmask.long.byte 0x15C 18.--23. 1. " CP4_87 R ,Color palette 4_87 red" hexmask.long.byte 0x15C 10.--15. 1. " CP4_87 G ,Color palette 4_87 green" hexmask.long.byte 0x15C 2.--7. 1. " CP4_87 B ,Color palette 4_87 blue" line.long 0x160 "CP4_88 R,Color Palette 4 Register 88 " hexmask.long.byte 0x160 24.--31. 1. " CP4_88 A ,Color palette 4_88 blend ratio" hexmask.long.byte 0x160 18.--23. 1. " CP4_88 R ,Color palette 4_88 red" hexmask.long.byte 0x160 10.--15. 1. " CP4_88 G ,Color palette 4_88 green" hexmask.long.byte 0x160 2.--7. 1. " CP4_88 B ,Color palette 4_88 blue" line.long 0x164 "CP4_89 R,Color Palette 4 Register 89 " hexmask.long.byte 0x164 24.--31. 1. " CP4_89 A ,Color palette 4_89 blend ratio" hexmask.long.byte 0x164 18.--23. 1. " CP4_89 R ,Color palette 4_89 red" hexmask.long.byte 0x164 10.--15. 1. " CP4_89 G ,Color palette 4_89 green" hexmask.long.byte 0x164 2.--7. 1. " CP4_89 B ,Color palette 4_89 blue" line.long 0x168 "CP4_90 R,Color Palette 4 Register 90 " hexmask.long.byte 0x168 24.--31. 1. " CP4_90 A ,Color palette 4_90 blend ratio" hexmask.long.byte 0x168 18.--23. 1. " CP4_90 R ,Color palette 4_90 red" hexmask.long.byte 0x168 10.--15. 1. " CP4_90 G ,Color palette 4_90 green" hexmask.long.byte 0x168 2.--7. 1. " CP4_90 B ,Color palette 4_90 blue" line.long 0x16C "CP4_91 R,Color Palette 4 Register 91 " hexmask.long.byte 0x16C 24.--31. 1. " CP4_91 A ,Color palette 4_91 blend ratio" hexmask.long.byte 0x16C 18.--23. 1. " CP4_91 R ,Color palette 4_91 red" hexmask.long.byte 0x16C 10.--15. 1. " CP4_91 G ,Color palette 4_91 green" hexmask.long.byte 0x16C 2.--7. 1. " CP4_91 B ,Color palette 4_91 blue" line.long 0x170 "CP4_92 R,Color Palette 4 Register 92 " hexmask.long.byte 0x170 24.--31. 1. " CP4_92 A ,Color palette 4_92 blend ratio" hexmask.long.byte 0x170 18.--23. 1. " CP4_92 R ,Color palette 4_92 red" hexmask.long.byte 0x170 10.--15. 1. " CP4_92 G ,Color palette 4_92 green" hexmask.long.byte 0x170 2.--7. 1. " CP4_92 B ,Color palette 4_92 blue" line.long 0x174 "CP4_93 R,Color Palette 4 Register 93 " hexmask.long.byte 0x174 24.--31. 1. " CP4_93 A ,Color palette 4_93 blend ratio" hexmask.long.byte 0x174 18.--23. 1. " CP4_93 R ,Color palette 4_93 red" hexmask.long.byte 0x174 10.--15. 1. " CP4_93 G ,Color palette 4_93 green" hexmask.long.byte 0x174 2.--7. 1. " CP4_93 B ,Color palette 4_93 blue" line.long 0x178 "CP4_94 R,Color Palette 4 Register 94 " hexmask.long.byte 0x178 24.--31. 1. " CP4_94 A ,Color palette 4_94 blend ratio" hexmask.long.byte 0x178 18.--23. 1. " CP4_94 R ,Color palette 4_94 red" hexmask.long.byte 0x178 10.--15. 1. " CP4_94 G ,Color palette 4_94 green" hexmask.long.byte 0x178 2.--7. 1. " CP4_94 B ,Color palette 4_94 blue" line.long 0x17C "CP4_95 R,Color Palette 4 Register 95 " hexmask.long.byte 0x17C 24.--31. 1. " CP4_95 A ,Color palette 4_95 blend ratio" hexmask.long.byte 0x17C 18.--23. 1. " CP4_95 R ,Color palette 4_95 red" hexmask.long.byte 0x17C 10.--15. 1. " CP4_95 G ,Color palette 4_95 green" hexmask.long.byte 0x17C 2.--7. 1. " CP4_95 B ,Color palette 4_95 blue" line.long 0x180 "CP4_96 R,Color Palette 4 Register 96 " hexmask.long.byte 0x180 24.--31. 1. " CP4_96 A ,Color palette 4_96 blend ratio" hexmask.long.byte 0x180 18.--23. 1. " CP4_96 R ,Color palette 4_96 red" hexmask.long.byte 0x180 10.--15. 1. " CP4_96 G ,Color palette 4_96 green" hexmask.long.byte 0x180 2.--7. 1. " CP4_96 B ,Color palette 4_96 blue" line.long 0x184 "CP4_97 R,Color Palette 4 Register 97 " hexmask.long.byte 0x184 24.--31. 1. " CP4_97 A ,Color palette 4_97 blend ratio" hexmask.long.byte 0x184 18.--23. 1. " CP4_97 R ,Color palette 4_97 red" hexmask.long.byte 0x184 10.--15. 1. " CP4_97 G ,Color palette 4_97 green" hexmask.long.byte 0x184 2.--7. 1. " CP4_97 B ,Color palette 4_97 blue" line.long 0x188 "CP4_98 R,Color Palette 4 Register 98 " hexmask.long.byte 0x188 24.--31. 1. " CP4_98 A ,Color palette 4_98 blend ratio" hexmask.long.byte 0x188 18.--23. 1. " CP4_98 R ,Color palette 4_98 red" hexmask.long.byte 0x188 10.--15. 1. " CP4_98 G ,Color palette 4_98 green" hexmask.long.byte 0x188 2.--7. 1. " CP4_98 B ,Color palette 4_98 blue" line.long 0x18C "CP4_99 R,Color Palette 4 Register 99 " hexmask.long.byte 0x18C 24.--31. 1. " CP4_99 A ,Color palette 4_99 blend ratio" hexmask.long.byte 0x18C 18.--23. 1. " CP4_99 R ,Color palette 4_99 red" hexmask.long.byte 0x18C 10.--15. 1. " CP4_99 G ,Color palette 4_99 green" hexmask.long.byte 0x18C 2.--7. 1. " CP4_99 B ,Color palette 4_99 blue" line.long 0x190 "CP4_100R,Color Palette 4 Register 100" hexmask.long.byte 0x190 24.--31. 1. " CP4_100A ,Color palette 4_100 blend ratio" hexmask.long.byte 0x190 18.--23. 1. " CP4_100R ,Color palette 4_100 red" hexmask.long.byte 0x190 10.--15. 1. " CP4_100G ,Color palette 4_100 green" hexmask.long.byte 0x190 2.--7. 1. " CP4_100B ,Color palette 4_100 blue" line.long 0x194 "CP4_101R,Color Palette 4 Register 101" hexmask.long.byte 0x194 24.--31. 1. " CP4_101A ,Color palette 4_101 blend ratio" hexmask.long.byte 0x194 18.--23. 1. " CP4_101R ,Color palette 4_101 red" hexmask.long.byte 0x194 10.--15. 1. " CP4_101G ,Color palette 4_101 green" hexmask.long.byte 0x194 2.--7. 1. " CP4_101B ,Color palette 4_101 blue" line.long 0x198 "CP4_102R,Color Palette 4 Register 102" hexmask.long.byte 0x198 24.--31. 1. " CP4_102A ,Color palette 4_102 blend ratio" hexmask.long.byte 0x198 18.--23. 1. " CP4_102R ,Color palette 4_102 red" hexmask.long.byte 0x198 10.--15. 1. " CP4_102G ,Color palette 4_102 green" hexmask.long.byte 0x198 2.--7. 1. " CP4_102B ,Color palette 4_102 blue" line.long 0x19C "CP4_103R,Color Palette 4 Register 103" hexmask.long.byte 0x19C 24.--31. 1. " CP4_103A ,Color palette 4_103 blend ratio" hexmask.long.byte 0x19C 18.--23. 1. " CP4_103R ,Color palette 4_103 red" hexmask.long.byte 0x19C 10.--15. 1. " CP4_103G ,Color palette 4_103 green" hexmask.long.byte 0x19C 2.--7. 1. " CP4_103B ,Color palette 4_103 blue" line.long 0x1A0 "CP4_104R,Color Palette 4 Register 104" hexmask.long.byte 0x1A0 24.--31. 1. " CP4_104A ,Color palette 4_104 blend ratio" hexmask.long.byte 0x1A0 18.--23. 1. " CP4_104R ,Color palette 4_104 red" hexmask.long.byte 0x1A0 10.--15. 1. " CP4_104G ,Color palette 4_104 green" hexmask.long.byte 0x1A0 2.--7. 1. " CP4_104B ,Color palette 4_104 blue" line.long 0x1A4 "CP4_105R,Color Palette 4 Register 105" hexmask.long.byte 0x1A4 24.--31. 1. " CP4_105A ,Color palette 4_105 blend ratio" hexmask.long.byte 0x1A4 18.--23. 1. " CP4_105R ,Color palette 4_105 red" hexmask.long.byte 0x1A4 10.--15. 1. " CP4_105G ,Color palette 4_105 green" hexmask.long.byte 0x1A4 2.--7. 1. " CP4_105B ,Color palette 4_105 blue" line.long 0x1A8 "CP4_106R,Color Palette 4 Register 106" hexmask.long.byte 0x1A8 24.--31. 1. " CP4_106A ,Color palette 4_106 blend ratio" hexmask.long.byte 0x1A8 18.--23. 1. " CP4_106R ,Color palette 4_106 red" hexmask.long.byte 0x1A8 10.--15. 1. " CP4_106G ,Color palette 4_106 green" hexmask.long.byte 0x1A8 2.--7. 1. " CP4_106B ,Color palette 4_106 blue" line.long 0x1AC "CP4_107R,Color Palette 4 Register 107" hexmask.long.byte 0x1AC 24.--31. 1. " CP4_107A ,Color palette 4_107 blend ratio" hexmask.long.byte 0x1AC 18.--23. 1. " CP4_107R ,Color palette 4_107 red" hexmask.long.byte 0x1AC 10.--15. 1. " CP4_107G ,Color palette 4_107 green" hexmask.long.byte 0x1AC 2.--7. 1. " CP4_107B ,Color palette 4_107 blue" line.long 0x1B0 "CP4_108R,Color Palette 4 Register 108" hexmask.long.byte 0x1B0 24.--31. 1. " CP4_108A ,Color palette 4_108 blend ratio" hexmask.long.byte 0x1B0 18.--23. 1. " CP4_108R ,Color palette 4_108 red" hexmask.long.byte 0x1B0 10.--15. 1. " CP4_108G ,Color palette 4_108 green" hexmask.long.byte 0x1B0 2.--7. 1. " CP4_108B ,Color palette 4_108 blue" line.long 0x1B4 "CP4_109R,Color Palette 4 Register 109" hexmask.long.byte 0x1B4 24.--31. 1. " CP4_109A ,Color palette 4_109 blend ratio" hexmask.long.byte 0x1B4 18.--23. 1. " CP4_109R ,Color palette 4_109 red" hexmask.long.byte 0x1B4 10.--15. 1. " CP4_109G ,Color palette 4_109 green" hexmask.long.byte 0x1B4 2.--7. 1. " CP4_109B ,Color palette 4_109 blue" line.long 0x1B8 "CP4_110R,Color Palette 4 Register 110" hexmask.long.byte 0x1B8 24.--31. 1. " CP4_110A ,Color palette 4_110 blend ratio" hexmask.long.byte 0x1B8 18.--23. 1. " CP4_110R ,Color palette 4_110 red" hexmask.long.byte 0x1B8 10.--15. 1. " CP4_110G ,Color palette 4_110 green" hexmask.long.byte 0x1B8 2.--7. 1. " CP4_110B ,Color palette 4_110 blue" line.long 0x1BC "CP4_111R,Color Palette 4 Register 111" hexmask.long.byte 0x1BC 24.--31. 1. " CP4_111A ,Color palette 4_111 blend ratio" hexmask.long.byte 0x1BC 18.--23. 1. " CP4_111R ,Color palette 4_111 red" hexmask.long.byte 0x1BC 10.--15. 1. " CP4_111G ,Color palette 4_111 green" hexmask.long.byte 0x1BC 2.--7. 1. " CP4_111B ,Color palette 4_111 blue" line.long 0x1C0 "CP4_112R,Color Palette 4 Register 112" hexmask.long.byte 0x1C0 24.--31. 1. " CP4_112A ,Color palette 4_112 blend ratio" hexmask.long.byte 0x1C0 18.--23. 1. " CP4_112R ,Color palette 4_112 red" hexmask.long.byte 0x1C0 10.--15. 1. " CP4_112G ,Color palette 4_112 green" hexmask.long.byte 0x1C0 2.--7. 1. " CP4_112B ,Color palette 4_112 blue" line.long 0x1C4 "CP4_113R,Color Palette 4 Register 113" hexmask.long.byte 0x1C4 24.--31. 1. " CP4_113A ,Color palette 4_113 blend ratio" hexmask.long.byte 0x1C4 18.--23. 1. " CP4_113R ,Color palette 4_113 red" hexmask.long.byte 0x1C4 10.--15. 1. " CP4_113G ,Color palette 4_113 green" hexmask.long.byte 0x1C4 2.--7. 1. " CP4_113B ,Color palette 4_113 blue" line.long 0x1C8 "CP4_114R,Color Palette 4 Register 114" hexmask.long.byte 0x1C8 24.--31. 1. " CP4_114A ,Color palette 4_114 blend ratio" hexmask.long.byte 0x1C8 18.--23. 1. " CP4_114R ,Color palette 4_114 red" hexmask.long.byte 0x1C8 10.--15. 1. " CP4_114G ,Color palette 4_114 green" hexmask.long.byte 0x1C8 2.--7. 1. " CP4_114B ,Color palette 4_114 blue" line.long 0x1CC "CP4_115R,Color Palette 4 Register 115" hexmask.long.byte 0x1CC 24.--31. 1. " CP4_115A ,Color palette 4_115 blend ratio" hexmask.long.byte 0x1CC 18.--23. 1. " CP4_115R ,Color palette 4_115 red" hexmask.long.byte 0x1CC 10.--15. 1. " CP4_115G ,Color palette 4_115 green" hexmask.long.byte 0x1CC 2.--7. 1. " CP4_115B ,Color palette 4_115 blue" line.long 0x1D0 "CP4_116R,Color Palette 4 Register 116" hexmask.long.byte 0x1D0 24.--31. 1. " CP4_116A ,Color palette 4_116 blend ratio" hexmask.long.byte 0x1D0 18.--23. 1. " CP4_116R ,Color palette 4_116 red" hexmask.long.byte 0x1D0 10.--15. 1. " CP4_116G ,Color palette 4_116 green" hexmask.long.byte 0x1D0 2.--7. 1. " CP4_116B ,Color palette 4_116 blue" line.long 0x1D4 "CP4_117R,Color Palette 4 Register 117" hexmask.long.byte 0x1D4 24.--31. 1. " CP4_117A ,Color palette 4_117 blend ratio" hexmask.long.byte 0x1D4 18.--23. 1. " CP4_117R ,Color palette 4_117 red" hexmask.long.byte 0x1D4 10.--15. 1. " CP4_117G ,Color palette 4_117 green" hexmask.long.byte 0x1D4 2.--7. 1. " CP4_117B ,Color palette 4_117 blue" line.long 0x1D8 "CP4_118R,Color Palette 4 Register 118" hexmask.long.byte 0x1D8 24.--31. 1. " CP4_118A ,Color palette 4_118 blend ratio" hexmask.long.byte 0x1D8 18.--23. 1. " CP4_118R ,Color palette 4_118 red" hexmask.long.byte 0x1D8 10.--15. 1. " CP4_118G ,Color palette 4_118 green" hexmask.long.byte 0x1D8 2.--7. 1. " CP4_118B ,Color palette 4_118 blue" line.long 0x1DC "CP4_119R,Color Palette 4 Register 119" hexmask.long.byte 0x1DC 24.--31. 1. " CP4_119A ,Color palette 4_119 blend ratio" hexmask.long.byte 0x1DC 18.--23. 1. " CP4_119R ,Color palette 4_119 red" hexmask.long.byte 0x1DC 10.--15. 1. " CP4_119G ,Color palette 4_119 green" hexmask.long.byte 0x1DC 2.--7. 1. " CP4_119B ,Color palette 4_119 blue" line.long 0x1E0 "CP4_120R,Color Palette 4 Register 120" hexmask.long.byte 0x1E0 24.--31. 1. " CP4_120A ,Color palette 4_120 blend ratio" hexmask.long.byte 0x1E0 18.--23. 1. " CP4_120R ,Color palette 4_120 red" hexmask.long.byte 0x1E0 10.--15. 1. " CP4_120G ,Color palette 4_120 green" hexmask.long.byte 0x1E0 2.--7. 1. " CP4_120B ,Color palette 4_120 blue" line.long 0x1E4 "CP4_121R,Color Palette 4 Register 121" hexmask.long.byte 0x1E4 24.--31. 1. " CP4_121A ,Color palette 4_121 blend ratio" hexmask.long.byte 0x1E4 18.--23. 1. " CP4_121R ,Color palette 4_121 red" hexmask.long.byte 0x1E4 10.--15. 1. " CP4_121G ,Color palette 4_121 green" hexmask.long.byte 0x1E4 2.--7. 1. " CP4_121B ,Color palette 4_121 blue" line.long 0x1E8 "CP4_122R,Color Palette 4 Register 122" hexmask.long.byte 0x1E8 24.--31. 1. " CP4_122A ,Color palette 4_122 blend ratio" hexmask.long.byte 0x1E8 18.--23. 1. " CP4_122R ,Color palette 4_122 red" hexmask.long.byte 0x1E8 10.--15. 1. " CP4_122G ,Color palette 4_122 green" hexmask.long.byte 0x1E8 2.--7. 1. " CP4_122B ,Color palette 4_122 blue" line.long 0x1EC "CP4_123R,Color Palette 4 Register 123" hexmask.long.byte 0x1EC 24.--31. 1. " CP4_123A ,Color palette 4_123 blend ratio" hexmask.long.byte 0x1EC 18.--23. 1. " CP4_123R ,Color palette 4_123 red" hexmask.long.byte 0x1EC 10.--15. 1. " CP4_123G ,Color palette 4_123 green" hexmask.long.byte 0x1EC 2.--7. 1. " CP4_123B ,Color palette 4_123 blue" line.long 0x1F0 "CP4_124R,Color Palette 4 Register 124" hexmask.long.byte 0x1F0 24.--31. 1. " CP4_124A ,Color palette 4_124 blend ratio" hexmask.long.byte 0x1F0 18.--23. 1. " CP4_124R ,Color palette 4_124 red" hexmask.long.byte 0x1F0 10.--15. 1. " CP4_124G ,Color palette 4_124 green" hexmask.long.byte 0x1F0 2.--7. 1. " CP4_124B ,Color palette 4_124 blue" line.long 0x1F4 "CP4_125R,Color Palette 4 Register 125" hexmask.long.byte 0x1F4 24.--31. 1. " CP4_125A ,Color palette 4_125 blend ratio" hexmask.long.byte 0x1F4 18.--23. 1. " CP4_125R ,Color palette 4_125 red" hexmask.long.byte 0x1F4 10.--15. 1. " CP4_125G ,Color palette 4_125 green" hexmask.long.byte 0x1F4 2.--7. 1. " CP4_125B ,Color palette 4_125 blue" line.long 0x1F8 "CP4_126R,Color Palette 4 Register 126" hexmask.long.byte 0x1F8 24.--31. 1. " CP4_126A ,Color palette 4_126 blend ratio" hexmask.long.byte 0x1F8 18.--23. 1. " CP4_126R ,Color palette 4_126 red" hexmask.long.byte 0x1F8 10.--15. 1. " CP4_126G ,Color palette 4_126 green" hexmask.long.byte 0x1F8 2.--7. 1. " CP4_126B ,Color palette 4_126 blue" line.long 0x1FC "CP4_127R,Color Palette 4 Register 127" hexmask.long.byte 0x1FC 24.--31. 1. " CP4_127A ,Color palette 4_127 blend ratio" hexmask.long.byte 0x1FC 18.--23. 1. " CP4_127R ,Color palette 4_127 red" hexmask.long.byte 0x1FC 10.--15. 1. " CP4_127G ,Color palette 4_127 green" hexmask.long.byte 0x1FC 2.--7. 1. " CP4_127B ,Color palette 4_127 blue" line.long 0x200 "CP4_128R,Color Palette 4 Register 128" hexmask.long.byte 0x200 24.--31. 1. " CP4_128A ,Color palette 4_128 blend ratio" hexmask.long.byte 0x200 18.--23. 1. " CP4_128R ,Color palette 4_128 red" hexmask.long.byte 0x200 10.--15. 1. " CP4_128G ,Color palette 4_128 green" hexmask.long.byte 0x200 2.--7. 1. " CP4_128B ,Color palette 4_128 blue" line.long 0x204 "CP4_129R,Color Palette 4 Register 129" hexmask.long.byte 0x204 24.--31. 1. " CP4_129A ,Color palette 4_129 blend ratio" hexmask.long.byte 0x204 18.--23. 1. " CP4_129R ,Color palette 4_129 red" hexmask.long.byte 0x204 10.--15. 1. " CP4_129G ,Color palette 4_129 green" hexmask.long.byte 0x204 2.--7. 1. " CP4_129B ,Color palette 4_129 blue" line.long 0x208 "CP4_130R,Color Palette 4 Register 130" hexmask.long.byte 0x208 24.--31. 1. " CP4_130A ,Color palette 4_130 blend ratio" hexmask.long.byte 0x208 18.--23. 1. " CP4_130R ,Color palette 4_130 red" hexmask.long.byte 0x208 10.--15. 1. " CP4_130G ,Color palette 4_130 green" hexmask.long.byte 0x208 2.--7. 1. " CP4_130B ,Color palette 4_130 blue" line.long 0x20C "CP4_131R,Color Palette 4 Register 131" hexmask.long.byte 0x20C 24.--31. 1. " CP4_131A ,Color palette 4_131 blend ratio" hexmask.long.byte 0x20C 18.--23. 1. " CP4_131R ,Color palette 4_131 red" hexmask.long.byte 0x20C 10.--15. 1. " CP4_131G ,Color palette 4_131 green" hexmask.long.byte 0x20C 2.--7. 1. " CP4_131B ,Color palette 4_131 blue" line.long 0x210 "CP4_132R,Color Palette 4 Register 132" hexmask.long.byte 0x210 24.--31. 1. " CP4_132A ,Color palette 4_132 blend ratio" hexmask.long.byte 0x210 18.--23. 1. " CP4_132R ,Color palette 4_132 red" hexmask.long.byte 0x210 10.--15. 1. " CP4_132G ,Color palette 4_132 green" hexmask.long.byte 0x210 2.--7. 1. " CP4_132B ,Color palette 4_132 blue" line.long 0x214 "CP4_133R,Color Palette 4 Register 133" hexmask.long.byte 0x214 24.--31. 1. " CP4_133A ,Color palette 4_133 blend ratio" hexmask.long.byte 0x214 18.--23. 1. " CP4_133R ,Color palette 4_133 red" hexmask.long.byte 0x214 10.--15. 1. " CP4_133G ,Color palette 4_133 green" hexmask.long.byte 0x214 2.--7. 1. " CP4_133B ,Color palette 4_133 blue" line.long 0x218 "CP4_134R,Color Palette 4 Register 134" hexmask.long.byte 0x218 24.--31. 1. " CP4_134A ,Color palette 4_134 blend ratio" hexmask.long.byte 0x218 18.--23. 1. " CP4_134R ,Color palette 4_134 red" hexmask.long.byte 0x218 10.--15. 1. " CP4_134G ,Color palette 4_134 green" hexmask.long.byte 0x218 2.--7. 1. " CP4_134B ,Color palette 4_134 blue" line.long 0x21C "CP4_135R,Color Palette 4 Register 135" hexmask.long.byte 0x21C 24.--31. 1. " CP4_135A ,Color palette 4_135 blend ratio" hexmask.long.byte 0x21C 18.--23. 1. " CP4_135R ,Color palette 4_135 red" hexmask.long.byte 0x21C 10.--15. 1. " CP4_135G ,Color palette 4_135 green" hexmask.long.byte 0x21C 2.--7. 1. " CP4_135B ,Color palette 4_135 blue" line.long 0x220 "CP4_136R,Color Palette 4 Register 136" hexmask.long.byte 0x220 24.--31. 1. " CP4_136A ,Color palette 4_136 blend ratio" hexmask.long.byte 0x220 18.--23. 1. " CP4_136R ,Color palette 4_136 red" hexmask.long.byte 0x220 10.--15. 1. " CP4_136G ,Color palette 4_136 green" hexmask.long.byte 0x220 2.--7. 1. " CP4_136B ,Color palette 4_136 blue" line.long 0x224 "CP4_137R,Color Palette 4 Register 137" hexmask.long.byte 0x224 24.--31. 1. " CP4_137A ,Color palette 4_137 blend ratio" hexmask.long.byte 0x224 18.--23. 1. " CP4_137R ,Color palette 4_137 red" hexmask.long.byte 0x224 10.--15. 1. " CP4_137G ,Color palette 4_137 green" hexmask.long.byte 0x224 2.--7. 1. " CP4_137B ,Color palette 4_137 blue" line.long 0x228 "CP4_138R,Color Palette 4 Register 138" hexmask.long.byte 0x228 24.--31. 1. " CP4_138A ,Color palette 4_138 blend ratio" hexmask.long.byte 0x228 18.--23. 1. " CP4_138R ,Color palette 4_138 red" hexmask.long.byte 0x228 10.--15. 1. " CP4_138G ,Color palette 4_138 green" hexmask.long.byte 0x228 2.--7. 1. " CP4_138B ,Color palette 4_138 blue" line.long 0x22C "CP4_139R,Color Palette 4 Register 139" hexmask.long.byte 0x22C 24.--31. 1. " CP4_139A ,Color palette 4_139 blend ratio" hexmask.long.byte 0x22C 18.--23. 1. " CP4_139R ,Color palette 4_139 red" hexmask.long.byte 0x22C 10.--15. 1. " CP4_139G ,Color palette 4_139 green" hexmask.long.byte 0x22C 2.--7. 1. " CP4_139B ,Color palette 4_139 blue" line.long 0x230 "CP4_140R,Color Palette 4 Register 140" hexmask.long.byte 0x230 24.--31. 1. " CP4_140A ,Color palette 4_140 blend ratio" hexmask.long.byte 0x230 18.--23. 1. " CP4_140R ,Color palette 4_140 red" hexmask.long.byte 0x230 10.--15. 1. " CP4_140G ,Color palette 4_140 green" hexmask.long.byte 0x230 2.--7. 1. " CP4_140B ,Color palette 4_140 blue" line.long 0x234 "CP4_141R,Color Palette 4 Register 141" hexmask.long.byte 0x234 24.--31. 1. " CP4_141A ,Color palette 4_141 blend ratio" hexmask.long.byte 0x234 18.--23. 1. " CP4_141R ,Color palette 4_141 red" hexmask.long.byte 0x234 10.--15. 1. " CP4_141G ,Color palette 4_141 green" hexmask.long.byte 0x234 2.--7. 1. " CP4_141B ,Color palette 4_141 blue" line.long 0x238 "CP4_142R,Color Palette 4 Register 142" hexmask.long.byte 0x238 24.--31. 1. " CP4_142A ,Color palette 4_142 blend ratio" hexmask.long.byte 0x238 18.--23. 1. " CP4_142R ,Color palette 4_142 red" hexmask.long.byte 0x238 10.--15. 1. " CP4_142G ,Color palette 4_142 green" hexmask.long.byte 0x238 2.--7. 1. " CP4_142B ,Color palette 4_142 blue" line.long 0x23C "CP4_143R,Color Palette 4 Register 143" hexmask.long.byte 0x23C 24.--31. 1. " CP4_143A ,Color palette 4_143 blend ratio" hexmask.long.byte 0x23C 18.--23. 1. " CP4_143R ,Color palette 4_143 red" hexmask.long.byte 0x23C 10.--15. 1. " CP4_143G ,Color palette 4_143 green" hexmask.long.byte 0x23C 2.--7. 1. " CP4_143B ,Color palette 4_143 blue" line.long 0x240 "CP4_144R,Color Palette 4 Register 144" hexmask.long.byte 0x240 24.--31. 1. " CP4_144A ,Color palette 4_144 blend ratio" hexmask.long.byte 0x240 18.--23. 1. " CP4_144R ,Color palette 4_144 red" hexmask.long.byte 0x240 10.--15. 1. " CP4_144G ,Color palette 4_144 green" hexmask.long.byte 0x240 2.--7. 1. " CP4_144B ,Color palette 4_144 blue" line.long 0x244 "CP4_145R,Color Palette 4 Register 145" hexmask.long.byte 0x244 24.--31. 1. " CP4_145A ,Color palette 4_145 blend ratio" hexmask.long.byte 0x244 18.--23. 1. " CP4_145R ,Color palette 4_145 red" hexmask.long.byte 0x244 10.--15. 1. " CP4_145G ,Color palette 4_145 green" hexmask.long.byte 0x244 2.--7. 1. " CP4_145B ,Color palette 4_145 blue" line.long 0x248 "CP4_146R,Color Palette 4 Register 146" hexmask.long.byte 0x248 24.--31. 1. " CP4_146A ,Color palette 4_146 blend ratio" hexmask.long.byte 0x248 18.--23. 1. " CP4_146R ,Color palette 4_146 red" hexmask.long.byte 0x248 10.--15. 1. " CP4_146G ,Color palette 4_146 green" hexmask.long.byte 0x248 2.--7. 1. " CP4_146B ,Color palette 4_146 blue" line.long 0x24C "CP4_147R,Color Palette 4 Register 147" hexmask.long.byte 0x24C 24.--31. 1. " CP4_147A ,Color palette 4_147 blend ratio" hexmask.long.byte 0x24C 18.--23. 1. " CP4_147R ,Color palette 4_147 red" hexmask.long.byte 0x24C 10.--15. 1. " CP4_147G ,Color palette 4_147 green" hexmask.long.byte 0x24C 2.--7. 1. " CP4_147B ,Color palette 4_147 blue" line.long 0x250 "CP4_148R,Color Palette 4 Register 148" hexmask.long.byte 0x250 24.--31. 1. " CP4_148A ,Color palette 4_148 blend ratio" hexmask.long.byte 0x250 18.--23. 1. " CP4_148R ,Color palette 4_148 red" hexmask.long.byte 0x250 10.--15. 1. " CP4_148G ,Color palette 4_148 green" hexmask.long.byte 0x250 2.--7. 1. " CP4_148B ,Color palette 4_148 blue" line.long 0x254 "CP4_149R,Color Palette 4 Register 149" hexmask.long.byte 0x254 24.--31. 1. " CP4_149A ,Color palette 4_149 blend ratio" hexmask.long.byte 0x254 18.--23. 1. " CP4_149R ,Color palette 4_149 red" hexmask.long.byte 0x254 10.--15. 1. " CP4_149G ,Color palette 4_149 green" hexmask.long.byte 0x254 2.--7. 1. " CP4_149B ,Color palette 4_149 blue" line.long 0x258 "CP4_150R,Color Palette 4 Register 150" hexmask.long.byte 0x258 24.--31. 1. " CP4_150A ,Color palette 4_150 blend ratio" hexmask.long.byte 0x258 18.--23. 1. " CP4_150R ,Color palette 4_150 red" hexmask.long.byte 0x258 10.--15. 1. " CP4_150G ,Color palette 4_150 green" hexmask.long.byte 0x258 2.--7. 1. " CP4_150B ,Color palette 4_150 blue" line.long 0x25C "CP4_151R,Color Palette 4 Register 151" hexmask.long.byte 0x25C 24.--31. 1. " CP4_151A ,Color palette 4_151 blend ratio" hexmask.long.byte 0x25C 18.--23. 1. " CP4_151R ,Color palette 4_151 red" hexmask.long.byte 0x25C 10.--15. 1. " CP4_151G ,Color palette 4_151 green" hexmask.long.byte 0x25C 2.--7. 1. " CP4_151B ,Color palette 4_151 blue" line.long 0x260 "CP4_152R,Color Palette 4 Register 152" hexmask.long.byte 0x260 24.--31. 1. " CP4_152A ,Color palette 4_152 blend ratio" hexmask.long.byte 0x260 18.--23. 1. " CP4_152R ,Color palette 4_152 red" hexmask.long.byte 0x260 10.--15. 1. " CP4_152G ,Color palette 4_152 green" hexmask.long.byte 0x260 2.--7. 1. " CP4_152B ,Color palette 4_152 blue" line.long 0x264 "CP4_153R,Color Palette 4 Register 153" hexmask.long.byte 0x264 24.--31. 1. " CP4_153A ,Color palette 4_153 blend ratio" hexmask.long.byte 0x264 18.--23. 1. " CP4_153R ,Color palette 4_153 red" hexmask.long.byte 0x264 10.--15. 1. " CP4_153G ,Color palette 4_153 green" hexmask.long.byte 0x264 2.--7. 1. " CP4_153B ,Color palette 4_153 blue" line.long 0x268 "CP4_154R,Color Palette 4 Register 154" hexmask.long.byte 0x268 24.--31. 1. " CP4_154A ,Color palette 4_154 blend ratio" hexmask.long.byte 0x268 18.--23. 1. " CP4_154R ,Color palette 4_154 red" hexmask.long.byte 0x268 10.--15. 1. " CP4_154G ,Color palette 4_154 green" hexmask.long.byte 0x268 2.--7. 1. " CP4_154B ,Color palette 4_154 blue" line.long 0x26C "CP4_155R,Color Palette 4 Register 155" hexmask.long.byte 0x26C 24.--31. 1. " CP4_155A ,Color palette 4_155 blend ratio" hexmask.long.byte 0x26C 18.--23. 1. " CP4_155R ,Color palette 4_155 red" hexmask.long.byte 0x26C 10.--15. 1. " CP4_155G ,Color palette 4_155 green" hexmask.long.byte 0x26C 2.--7. 1. " CP4_155B ,Color palette 4_155 blue" line.long 0x270 "CP4_156R,Color Palette 4 Register 156" hexmask.long.byte 0x270 24.--31. 1. " CP4_156A ,Color palette 4_156 blend ratio" hexmask.long.byte 0x270 18.--23. 1. " CP4_156R ,Color palette 4_156 red" hexmask.long.byte 0x270 10.--15. 1. " CP4_156G ,Color palette 4_156 green" hexmask.long.byte 0x270 2.--7. 1. " CP4_156B ,Color palette 4_156 blue" line.long 0x274 "CP4_157R,Color Palette 4 Register 157" hexmask.long.byte 0x274 24.--31. 1. " CP4_157A ,Color palette 4_157 blend ratio" hexmask.long.byte 0x274 18.--23. 1. " CP4_157R ,Color palette 4_157 red" hexmask.long.byte 0x274 10.--15. 1. " CP4_157G ,Color palette 4_157 green" hexmask.long.byte 0x274 2.--7. 1. " CP4_157B ,Color palette 4_157 blue" line.long 0x278 "CP4_158R,Color Palette 4 Register 158" hexmask.long.byte 0x278 24.--31. 1. " CP4_158A ,Color palette 4_158 blend ratio" hexmask.long.byte 0x278 18.--23. 1. " CP4_158R ,Color palette 4_158 red" hexmask.long.byte 0x278 10.--15. 1. " CP4_158G ,Color palette 4_158 green" hexmask.long.byte 0x278 2.--7. 1. " CP4_158B ,Color palette 4_158 blue" line.long 0x27C "CP4_159R,Color Palette 4 Register 159" hexmask.long.byte 0x27C 24.--31. 1. " CP4_159A ,Color palette 4_159 blend ratio" hexmask.long.byte 0x27C 18.--23. 1. " CP4_159R ,Color palette 4_159 red" hexmask.long.byte 0x27C 10.--15. 1. " CP4_159G ,Color palette 4_159 green" hexmask.long.byte 0x27C 2.--7. 1. " CP4_159B ,Color palette 4_159 blue" line.long 0x280 "CP4_160R,Color Palette 4 Register 160" hexmask.long.byte 0x280 24.--31. 1. " CP4_160A ,Color palette 4_160 blend ratio" hexmask.long.byte 0x280 18.--23. 1. " CP4_160R ,Color palette 4_160 red" hexmask.long.byte 0x280 10.--15. 1. " CP4_160G ,Color palette 4_160 green" hexmask.long.byte 0x280 2.--7. 1. " CP4_160B ,Color palette 4_160 blue" line.long 0x284 "CP4_161R,Color Palette 4 Register 161" hexmask.long.byte 0x284 24.--31. 1. " CP4_161A ,Color palette 4_161 blend ratio" hexmask.long.byte 0x284 18.--23. 1. " CP4_161R ,Color palette 4_161 red" hexmask.long.byte 0x284 10.--15. 1. " CP4_161G ,Color palette 4_161 green" hexmask.long.byte 0x284 2.--7. 1. " CP4_161B ,Color palette 4_161 blue" line.long 0x288 "CP4_162R,Color Palette 4 Register 162" hexmask.long.byte 0x288 24.--31. 1. " CP4_162A ,Color palette 4_162 blend ratio" hexmask.long.byte 0x288 18.--23. 1. " CP4_162R ,Color palette 4_162 red" hexmask.long.byte 0x288 10.--15. 1. " CP4_162G ,Color palette 4_162 green" hexmask.long.byte 0x288 2.--7. 1. " CP4_162B ,Color palette 4_162 blue" line.long 0x28C "CP4_163R,Color Palette 4 Register 163" hexmask.long.byte 0x28C 24.--31. 1. " CP4_163A ,Color palette 4_163 blend ratio" hexmask.long.byte 0x28C 18.--23. 1. " CP4_163R ,Color palette 4_163 red" hexmask.long.byte 0x28C 10.--15. 1. " CP4_163G ,Color palette 4_163 green" hexmask.long.byte 0x28C 2.--7. 1. " CP4_163B ,Color palette 4_163 blue" line.long 0x290 "CP4_164R,Color Palette 4 Register 164" hexmask.long.byte 0x290 24.--31. 1. " CP4_164A ,Color palette 4_164 blend ratio" hexmask.long.byte 0x290 18.--23. 1. " CP4_164R ,Color palette 4_164 red" hexmask.long.byte 0x290 10.--15. 1. " CP4_164G ,Color palette 4_164 green" hexmask.long.byte 0x290 2.--7. 1. " CP4_164B ,Color palette 4_164 blue" line.long 0x294 "CP4_165R,Color Palette 4 Register 165" hexmask.long.byte 0x294 24.--31. 1. " CP4_165A ,Color palette 4_165 blend ratio" hexmask.long.byte 0x294 18.--23. 1. " CP4_165R ,Color palette 4_165 red" hexmask.long.byte 0x294 10.--15. 1. " CP4_165G ,Color palette 4_165 green" hexmask.long.byte 0x294 2.--7. 1. " CP4_165B ,Color palette 4_165 blue" line.long 0x298 "CP4_166R,Color Palette 4 Register 166" hexmask.long.byte 0x298 24.--31. 1. " CP4_166A ,Color palette 4_166 blend ratio" hexmask.long.byte 0x298 18.--23. 1. " CP4_166R ,Color palette 4_166 red" hexmask.long.byte 0x298 10.--15. 1. " CP4_166G ,Color palette 4_166 green" hexmask.long.byte 0x298 2.--7. 1. " CP4_166B ,Color palette 4_166 blue" line.long 0x29C "CP4_167R,Color Palette 4 Register 167" hexmask.long.byte 0x29C 24.--31. 1. " CP4_167A ,Color palette 4_167 blend ratio" hexmask.long.byte 0x29C 18.--23. 1. " CP4_167R ,Color palette 4_167 red" hexmask.long.byte 0x29C 10.--15. 1. " CP4_167G ,Color palette 4_167 green" hexmask.long.byte 0x29C 2.--7. 1. " CP4_167B ,Color palette 4_167 blue" line.long 0x2A0 "CP4_168R,Color Palette 4 Register 168" hexmask.long.byte 0x2A0 24.--31. 1. " CP4_168A ,Color palette 4_168 blend ratio" hexmask.long.byte 0x2A0 18.--23. 1. " CP4_168R ,Color palette 4_168 red" hexmask.long.byte 0x2A0 10.--15. 1. " CP4_168G ,Color palette 4_168 green" hexmask.long.byte 0x2A0 2.--7. 1. " CP4_168B ,Color palette 4_168 blue" line.long 0x2A4 "CP4_169R,Color Palette 4 Register 169" hexmask.long.byte 0x2A4 24.--31. 1. " CP4_169A ,Color palette 4_169 blend ratio" hexmask.long.byte 0x2A4 18.--23. 1. " CP4_169R ,Color palette 4_169 red" hexmask.long.byte 0x2A4 10.--15. 1. " CP4_169G ,Color palette 4_169 green" hexmask.long.byte 0x2A4 2.--7. 1. " CP4_169B ,Color palette 4_169 blue" line.long 0x2A8 "CP4_170R,Color Palette 4 Register 170" hexmask.long.byte 0x2A8 24.--31. 1. " CP4_170A ,Color palette 4_170 blend ratio" hexmask.long.byte 0x2A8 18.--23. 1. " CP4_170R ,Color palette 4_170 red" hexmask.long.byte 0x2A8 10.--15. 1. " CP4_170G ,Color palette 4_170 green" hexmask.long.byte 0x2A8 2.--7. 1. " CP4_170B ,Color palette 4_170 blue" line.long 0x2AC "CP4_171R,Color Palette 4 Register 171" hexmask.long.byte 0x2AC 24.--31. 1. " CP4_171A ,Color palette 4_171 blend ratio" hexmask.long.byte 0x2AC 18.--23. 1. " CP4_171R ,Color palette 4_171 red" hexmask.long.byte 0x2AC 10.--15. 1. " CP4_171G ,Color palette 4_171 green" hexmask.long.byte 0x2AC 2.--7. 1. " CP4_171B ,Color palette 4_171 blue" line.long 0x2B0 "CP4_172R,Color Palette 4 Register 172" hexmask.long.byte 0x2B0 24.--31. 1. " CP4_172A ,Color palette 4_172 blend ratio" hexmask.long.byte 0x2B0 18.--23. 1. " CP4_172R ,Color palette 4_172 red" hexmask.long.byte 0x2B0 10.--15. 1. " CP4_172G ,Color palette 4_172 green" hexmask.long.byte 0x2B0 2.--7. 1. " CP4_172B ,Color palette 4_172 blue" line.long 0x2B4 "CP4_173R,Color Palette 4 Register 173" hexmask.long.byte 0x2B4 24.--31. 1. " CP4_173A ,Color palette 4_173 blend ratio" hexmask.long.byte 0x2B4 18.--23. 1. " CP4_173R ,Color palette 4_173 red" hexmask.long.byte 0x2B4 10.--15. 1. " CP4_173G ,Color palette 4_173 green" hexmask.long.byte 0x2B4 2.--7. 1. " CP4_173B ,Color palette 4_173 blue" line.long 0x2B8 "CP4_174R,Color Palette 4 Register 174" hexmask.long.byte 0x2B8 24.--31. 1. " CP4_174A ,Color palette 4_174 blend ratio" hexmask.long.byte 0x2B8 18.--23. 1. " CP4_174R ,Color palette 4_174 red" hexmask.long.byte 0x2B8 10.--15. 1. " CP4_174G ,Color palette 4_174 green" hexmask.long.byte 0x2B8 2.--7. 1. " CP4_174B ,Color palette 4_174 blue" line.long 0x2BC "CP4_175R,Color Palette 4 Register 175" hexmask.long.byte 0x2BC 24.--31. 1. " CP4_175A ,Color palette 4_175 blend ratio" hexmask.long.byte 0x2BC 18.--23. 1. " CP4_175R ,Color palette 4_175 red" hexmask.long.byte 0x2BC 10.--15. 1. " CP4_175G ,Color palette 4_175 green" hexmask.long.byte 0x2BC 2.--7. 1. " CP4_175B ,Color palette 4_175 blue" line.long 0x2C0 "CP4_176R,Color Palette 4 Register 176" hexmask.long.byte 0x2C0 24.--31. 1. " CP4_176A ,Color palette 4_176 blend ratio" hexmask.long.byte 0x2C0 18.--23. 1. " CP4_176R ,Color palette 4_176 red" hexmask.long.byte 0x2C0 10.--15. 1. " CP4_176G ,Color palette 4_176 green" hexmask.long.byte 0x2C0 2.--7. 1. " CP4_176B ,Color palette 4_176 blue" line.long 0x2C4 "CP4_177R,Color Palette 4 Register 177" hexmask.long.byte 0x2C4 24.--31. 1. " CP4_177A ,Color palette 4_177 blend ratio" hexmask.long.byte 0x2C4 18.--23. 1. " CP4_177R ,Color palette 4_177 red" hexmask.long.byte 0x2C4 10.--15. 1. " CP4_177G ,Color palette 4_177 green" hexmask.long.byte 0x2C4 2.--7. 1. " CP4_177B ,Color palette 4_177 blue" line.long 0x2C8 "CP4_178R,Color Palette 4 Register 178" hexmask.long.byte 0x2C8 24.--31. 1. " CP4_178A ,Color palette 4_178 blend ratio" hexmask.long.byte 0x2C8 18.--23. 1. " CP4_178R ,Color palette 4_178 red" hexmask.long.byte 0x2C8 10.--15. 1. " CP4_178G ,Color palette 4_178 green" hexmask.long.byte 0x2C8 2.--7. 1. " CP4_178B ,Color palette 4_178 blue" line.long 0x2CC "CP4_179R,Color Palette 4 Register 179" hexmask.long.byte 0x2CC 24.--31. 1. " CP4_179A ,Color palette 4_179 blend ratio" hexmask.long.byte 0x2CC 18.--23. 1. " CP4_179R ,Color palette 4_179 red" hexmask.long.byte 0x2CC 10.--15. 1. " CP4_179G ,Color palette 4_179 green" hexmask.long.byte 0x2CC 2.--7. 1. " CP4_179B ,Color palette 4_179 blue" line.long 0x2D0 "CP4_180R,Color Palette 4 Register 180" hexmask.long.byte 0x2D0 24.--31. 1. " CP4_180A ,Color palette 4_180 blend ratio" hexmask.long.byte 0x2D0 18.--23. 1. " CP4_180R ,Color palette 4_180 red" hexmask.long.byte 0x2D0 10.--15. 1. " CP4_180G ,Color palette 4_180 green" hexmask.long.byte 0x2D0 2.--7. 1. " CP4_180B ,Color palette 4_180 blue" line.long 0x2D4 "CP4_181R,Color Palette 4 Register 181" hexmask.long.byte 0x2D4 24.--31. 1. " CP4_181A ,Color palette 4_181 blend ratio" hexmask.long.byte 0x2D4 18.--23. 1. " CP4_181R ,Color palette 4_181 red" hexmask.long.byte 0x2D4 10.--15. 1. " CP4_181G ,Color palette 4_181 green" hexmask.long.byte 0x2D4 2.--7. 1. " CP4_181B ,Color palette 4_181 blue" line.long 0x2D8 "CP4_182R,Color Palette 4 Register 182" hexmask.long.byte 0x2D8 24.--31. 1. " CP4_182A ,Color palette 4_182 blend ratio" hexmask.long.byte 0x2D8 18.--23. 1. " CP4_182R ,Color palette 4_182 red" hexmask.long.byte 0x2D8 10.--15. 1. " CP4_182G ,Color palette 4_182 green" hexmask.long.byte 0x2D8 2.--7. 1. " CP4_182B ,Color palette 4_182 blue" line.long 0x2DC "CP4_183R,Color Palette 4 Register 183" hexmask.long.byte 0x2DC 24.--31. 1. " CP4_183A ,Color palette 4_183 blend ratio" hexmask.long.byte 0x2DC 18.--23. 1. " CP4_183R ,Color palette 4_183 red" hexmask.long.byte 0x2DC 10.--15. 1. " CP4_183G ,Color palette 4_183 green" hexmask.long.byte 0x2DC 2.--7. 1. " CP4_183B ,Color palette 4_183 blue" line.long 0x2E0 "CP4_184R,Color Palette 4 Register 184" hexmask.long.byte 0x2E0 24.--31. 1. " CP4_184A ,Color palette 4_184 blend ratio" hexmask.long.byte 0x2E0 18.--23. 1. " CP4_184R ,Color palette 4_184 red" hexmask.long.byte 0x2E0 10.--15. 1. " CP4_184G ,Color palette 4_184 green" hexmask.long.byte 0x2E0 2.--7. 1. " CP4_184B ,Color palette 4_184 blue" line.long 0x2E4 "CP4_185R,Color Palette 4 Register 185" hexmask.long.byte 0x2E4 24.--31. 1. " CP4_185A ,Color palette 4_185 blend ratio" hexmask.long.byte 0x2E4 18.--23. 1. " CP4_185R ,Color palette 4_185 red" hexmask.long.byte 0x2E4 10.--15. 1. " CP4_185G ,Color palette 4_185 green" hexmask.long.byte 0x2E4 2.--7. 1. " CP4_185B ,Color palette 4_185 blue" line.long 0x2E8 "CP4_186R,Color Palette 4 Register 186" hexmask.long.byte 0x2E8 24.--31. 1. " CP4_186A ,Color palette 4_186 blend ratio" hexmask.long.byte 0x2E8 18.--23. 1. " CP4_186R ,Color palette 4_186 red" hexmask.long.byte 0x2E8 10.--15. 1. " CP4_186G ,Color palette 4_186 green" hexmask.long.byte 0x2E8 2.--7. 1. " CP4_186B ,Color palette 4_186 blue" line.long 0x2EC "CP4_187R,Color Palette 4 Register 187" hexmask.long.byte 0x2EC 24.--31. 1. " CP4_187A ,Color palette 4_187 blend ratio" hexmask.long.byte 0x2EC 18.--23. 1. " CP4_187R ,Color palette 4_187 red" hexmask.long.byte 0x2EC 10.--15. 1. " CP4_187G ,Color palette 4_187 green" hexmask.long.byte 0x2EC 2.--7. 1. " CP4_187B ,Color palette 4_187 blue" line.long 0x2F0 "CP4_188R,Color Palette 4 Register 188" hexmask.long.byte 0x2F0 24.--31. 1. " CP4_188A ,Color palette 4_188 blend ratio" hexmask.long.byte 0x2F0 18.--23. 1. " CP4_188R ,Color palette 4_188 red" hexmask.long.byte 0x2F0 10.--15. 1. " CP4_188G ,Color palette 4_188 green" hexmask.long.byte 0x2F0 2.--7. 1. " CP4_188B ,Color palette 4_188 blue" line.long 0x2F4 "CP4_189R,Color Palette 4 Register 189" hexmask.long.byte 0x2F4 24.--31. 1. " CP4_189A ,Color palette 4_189 blend ratio" hexmask.long.byte 0x2F4 18.--23. 1. " CP4_189R ,Color palette 4_189 red" hexmask.long.byte 0x2F4 10.--15. 1. " CP4_189G ,Color palette 4_189 green" hexmask.long.byte 0x2F4 2.--7. 1. " CP4_189B ,Color palette 4_189 blue" line.long 0x2F8 "CP4_190R,Color Palette 4 Register 190" hexmask.long.byte 0x2F8 24.--31. 1. " CP4_190A ,Color palette 4_190 blend ratio" hexmask.long.byte 0x2F8 18.--23. 1. " CP4_190R ,Color palette 4_190 red" hexmask.long.byte 0x2F8 10.--15. 1. " CP4_190G ,Color palette 4_190 green" hexmask.long.byte 0x2F8 2.--7. 1. " CP4_190B ,Color palette 4_190 blue" line.long 0x2FC "CP4_191R,Color Palette 4 Register 191" hexmask.long.byte 0x2FC 24.--31. 1. " CP4_191A ,Color palette 4_191 blend ratio" hexmask.long.byte 0x2FC 18.--23. 1. " CP4_191R ,Color palette 4_191 red" hexmask.long.byte 0x2FC 10.--15. 1. " CP4_191G ,Color palette 4_191 green" hexmask.long.byte 0x2FC 2.--7. 1. " CP4_191B ,Color palette 4_191 blue" line.long 0x300 "CP4_192R,Color Palette 4 Register 192" hexmask.long.byte 0x300 24.--31. 1. " CP4_192A ,Color palette 4_192 blend ratio" hexmask.long.byte 0x300 18.--23. 1. " CP4_192R ,Color palette 4_192 red" hexmask.long.byte 0x300 10.--15. 1. " CP4_192G ,Color palette 4_192 green" hexmask.long.byte 0x300 2.--7. 1. " CP4_192B ,Color palette 4_192 blue" line.long 0x304 "CP4_193R,Color Palette 4 Register 193" hexmask.long.byte 0x304 24.--31. 1. " CP4_193A ,Color palette 4_193 blend ratio" hexmask.long.byte 0x304 18.--23. 1. " CP4_193R ,Color palette 4_193 red" hexmask.long.byte 0x304 10.--15. 1. " CP4_193G ,Color palette 4_193 green" hexmask.long.byte 0x304 2.--7. 1. " CP4_193B ,Color palette 4_193 blue" line.long 0x308 "CP4_194R,Color Palette 4 Register 194" hexmask.long.byte 0x308 24.--31. 1. " CP4_194A ,Color palette 4_194 blend ratio" hexmask.long.byte 0x308 18.--23. 1. " CP4_194R ,Color palette 4_194 red" hexmask.long.byte 0x308 10.--15. 1. " CP4_194G ,Color palette 4_194 green" hexmask.long.byte 0x308 2.--7. 1. " CP4_194B ,Color palette 4_194 blue" line.long 0x30C "CP4_195R,Color Palette 4 Register 195" hexmask.long.byte 0x30C 24.--31. 1. " CP4_195A ,Color palette 4_195 blend ratio" hexmask.long.byte 0x30C 18.--23. 1. " CP4_195R ,Color palette 4_195 red" hexmask.long.byte 0x30C 10.--15. 1. " CP4_195G ,Color palette 4_195 green" hexmask.long.byte 0x30C 2.--7. 1. " CP4_195B ,Color palette 4_195 blue" line.long 0x310 "CP4_196R,Color Palette 4 Register 196" hexmask.long.byte 0x310 24.--31. 1. " CP4_196A ,Color palette 4_196 blend ratio" hexmask.long.byte 0x310 18.--23. 1. " CP4_196R ,Color palette 4_196 red" hexmask.long.byte 0x310 10.--15. 1. " CP4_196G ,Color palette 4_196 green" hexmask.long.byte 0x310 2.--7. 1. " CP4_196B ,Color palette 4_196 blue" line.long 0x314 "CP4_197R,Color Palette 4 Register 197" hexmask.long.byte 0x314 24.--31. 1. " CP4_197A ,Color palette 4_197 blend ratio" hexmask.long.byte 0x314 18.--23. 1. " CP4_197R ,Color palette 4_197 red" hexmask.long.byte 0x314 10.--15. 1. " CP4_197G ,Color palette 4_197 green" hexmask.long.byte 0x314 2.--7. 1. " CP4_197B ,Color palette 4_197 blue" line.long 0x318 "CP4_198R,Color Palette 4 Register 198" hexmask.long.byte 0x318 24.--31. 1. " CP4_198A ,Color palette 4_198 blend ratio" hexmask.long.byte 0x318 18.--23. 1. " CP4_198R ,Color palette 4_198 red" hexmask.long.byte 0x318 10.--15. 1. " CP4_198G ,Color palette 4_198 green" hexmask.long.byte 0x318 2.--7. 1. " CP4_198B ,Color palette 4_198 blue" line.long 0x31C "CP4_199R,Color Palette 4 Register 199" hexmask.long.byte 0x31C 24.--31. 1. " CP4_199A ,Color palette 4_199 blend ratio" hexmask.long.byte 0x31C 18.--23. 1. " CP4_199R ,Color palette 4_199 red" hexmask.long.byte 0x31C 10.--15. 1. " CP4_199G ,Color palette 4_199 green" hexmask.long.byte 0x31C 2.--7. 1. " CP4_199B ,Color palette 4_199 blue" line.long 0x320 "CP4_200R,Color Palette 4 Register 200" hexmask.long.byte 0x320 24.--31. 1. " CP4_200A ,Color palette 4_200 blend ratio" hexmask.long.byte 0x320 18.--23. 1. " CP4_200R ,Color palette 4_200 red" hexmask.long.byte 0x320 10.--15. 1. " CP4_200G ,Color palette 4_200 green" hexmask.long.byte 0x320 2.--7. 1. " CP4_200B ,Color palette 4_200 blue" line.long 0x324 "CP4_201R,Color Palette 4 Register 201" hexmask.long.byte 0x324 24.--31. 1. " CP4_201A ,Color palette 4_201 blend ratio" hexmask.long.byte 0x324 18.--23. 1. " CP4_201R ,Color palette 4_201 red" hexmask.long.byte 0x324 10.--15. 1. " CP4_201G ,Color palette 4_201 green" hexmask.long.byte 0x324 2.--7. 1. " CP4_201B ,Color palette 4_201 blue" line.long 0x328 "CP4_202R,Color Palette 4 Register 202" hexmask.long.byte 0x328 24.--31. 1. " CP4_202A ,Color palette 4_202 blend ratio" hexmask.long.byte 0x328 18.--23. 1. " CP4_202R ,Color palette 4_202 red" hexmask.long.byte 0x328 10.--15. 1. " CP4_202G ,Color palette 4_202 green" hexmask.long.byte 0x328 2.--7. 1. " CP4_202B ,Color palette 4_202 blue" line.long 0x32C "CP4_203R,Color Palette 4 Register 203" hexmask.long.byte 0x32C 24.--31. 1. " CP4_203A ,Color palette 4_203 blend ratio" hexmask.long.byte 0x32C 18.--23. 1. " CP4_203R ,Color palette 4_203 red" hexmask.long.byte 0x32C 10.--15. 1. " CP4_203G ,Color palette 4_203 green" hexmask.long.byte 0x32C 2.--7. 1. " CP4_203B ,Color palette 4_203 blue" line.long 0x330 "CP4_204R,Color Palette 4 Register 204" hexmask.long.byte 0x330 24.--31. 1. " CP4_204A ,Color palette 4_204 blend ratio" hexmask.long.byte 0x330 18.--23. 1. " CP4_204R ,Color palette 4_204 red" hexmask.long.byte 0x330 10.--15. 1. " CP4_204G ,Color palette 4_204 green" hexmask.long.byte 0x330 2.--7. 1. " CP4_204B ,Color palette 4_204 blue" line.long 0x334 "CP4_205R,Color Palette 4 Register 205" hexmask.long.byte 0x334 24.--31. 1. " CP4_205A ,Color palette 4_205 blend ratio" hexmask.long.byte 0x334 18.--23. 1. " CP4_205R ,Color palette 4_205 red" hexmask.long.byte 0x334 10.--15. 1. " CP4_205G ,Color palette 4_205 green" hexmask.long.byte 0x334 2.--7. 1. " CP4_205B ,Color palette 4_205 blue" line.long 0x338 "CP4_206R,Color Palette 4 Register 206" hexmask.long.byte 0x338 24.--31. 1. " CP4_206A ,Color palette 4_206 blend ratio" hexmask.long.byte 0x338 18.--23. 1. " CP4_206R ,Color palette 4_206 red" hexmask.long.byte 0x338 10.--15. 1. " CP4_206G ,Color palette 4_206 green" hexmask.long.byte 0x338 2.--7. 1. " CP4_206B ,Color palette 4_206 blue" line.long 0x33C "CP4_207R,Color Palette 4 Register 207" hexmask.long.byte 0x33C 24.--31. 1. " CP4_207A ,Color palette 4_207 blend ratio" hexmask.long.byte 0x33C 18.--23. 1. " CP4_207R ,Color palette 4_207 red" hexmask.long.byte 0x33C 10.--15. 1. " CP4_207G ,Color palette 4_207 green" hexmask.long.byte 0x33C 2.--7. 1. " CP4_207B ,Color palette 4_207 blue" line.long 0x340 "CP4_208R,Color Palette 4 Register 208" hexmask.long.byte 0x340 24.--31. 1. " CP4_208A ,Color palette 4_208 blend ratio" hexmask.long.byte 0x340 18.--23. 1. " CP4_208R ,Color palette 4_208 red" hexmask.long.byte 0x340 10.--15. 1. " CP4_208G ,Color palette 4_208 green" hexmask.long.byte 0x340 2.--7. 1. " CP4_208B ,Color palette 4_208 blue" line.long 0x344 "CP4_209R,Color Palette 4 Register 209" hexmask.long.byte 0x344 24.--31. 1. " CP4_209A ,Color palette 4_209 blend ratio" hexmask.long.byte 0x344 18.--23. 1. " CP4_209R ,Color palette 4_209 red" hexmask.long.byte 0x344 10.--15. 1. " CP4_209G ,Color palette 4_209 green" hexmask.long.byte 0x344 2.--7. 1. " CP4_209B ,Color palette 4_209 blue" line.long 0x348 "CP4_210R,Color Palette 4 Register 210" hexmask.long.byte 0x348 24.--31. 1. " CP4_210A ,Color palette 4_210 blend ratio" hexmask.long.byte 0x348 18.--23. 1. " CP4_210R ,Color palette 4_210 red" hexmask.long.byte 0x348 10.--15. 1. " CP4_210G ,Color palette 4_210 green" hexmask.long.byte 0x348 2.--7. 1. " CP4_210B ,Color palette 4_210 blue" line.long 0x34C "CP4_211R,Color Palette 4 Register 211" hexmask.long.byte 0x34C 24.--31. 1. " CP4_211A ,Color palette 4_211 blend ratio" hexmask.long.byte 0x34C 18.--23. 1. " CP4_211R ,Color palette 4_211 red" hexmask.long.byte 0x34C 10.--15. 1. " CP4_211G ,Color palette 4_211 green" hexmask.long.byte 0x34C 2.--7. 1. " CP4_211B ,Color palette 4_211 blue" line.long 0x350 "CP4_212R,Color Palette 4 Register 212" hexmask.long.byte 0x350 24.--31. 1. " CP4_212A ,Color palette 4_212 blend ratio" hexmask.long.byte 0x350 18.--23. 1. " CP4_212R ,Color palette 4_212 red" hexmask.long.byte 0x350 10.--15. 1. " CP4_212G ,Color palette 4_212 green" hexmask.long.byte 0x350 2.--7. 1. " CP4_212B ,Color palette 4_212 blue" line.long 0x354 "CP4_213R,Color Palette 4 Register 213" hexmask.long.byte 0x354 24.--31. 1. " CP4_213A ,Color palette 4_213 blend ratio" hexmask.long.byte 0x354 18.--23. 1. " CP4_213R ,Color palette 4_213 red" hexmask.long.byte 0x354 10.--15. 1. " CP4_213G ,Color palette 4_213 green" hexmask.long.byte 0x354 2.--7. 1. " CP4_213B ,Color palette 4_213 blue" line.long 0x358 "CP4_214R,Color Palette 4 Register 214" hexmask.long.byte 0x358 24.--31. 1. " CP4_214A ,Color palette 4_214 blend ratio" hexmask.long.byte 0x358 18.--23. 1. " CP4_214R ,Color palette 4_214 red" hexmask.long.byte 0x358 10.--15. 1. " CP4_214G ,Color palette 4_214 green" hexmask.long.byte 0x358 2.--7. 1. " CP4_214B ,Color palette 4_214 blue" line.long 0x35C "CP4_215R,Color Palette 4 Register 215" hexmask.long.byte 0x35C 24.--31. 1. " CP4_215A ,Color palette 4_215 blend ratio" hexmask.long.byte 0x35C 18.--23. 1. " CP4_215R ,Color palette 4_215 red" hexmask.long.byte 0x35C 10.--15. 1. " CP4_215G ,Color palette 4_215 green" hexmask.long.byte 0x35C 2.--7. 1. " CP4_215B ,Color palette 4_215 blue" line.long 0x360 "CP4_216R,Color Palette 4 Register 216" hexmask.long.byte 0x360 24.--31. 1. " CP4_216A ,Color palette 4_216 blend ratio" hexmask.long.byte 0x360 18.--23. 1. " CP4_216R ,Color palette 4_216 red" hexmask.long.byte 0x360 10.--15. 1. " CP4_216G ,Color palette 4_216 green" hexmask.long.byte 0x360 2.--7. 1. " CP4_216B ,Color palette 4_216 blue" line.long 0x364 "CP4_217R,Color Palette 4 Register 217" hexmask.long.byte 0x364 24.--31. 1. " CP4_217A ,Color palette 4_217 blend ratio" hexmask.long.byte 0x364 18.--23. 1. " CP4_217R ,Color palette 4_217 red" hexmask.long.byte 0x364 10.--15. 1. " CP4_217G ,Color palette 4_217 green" hexmask.long.byte 0x364 2.--7. 1. " CP4_217B ,Color palette 4_217 blue" line.long 0x368 "CP4_218R,Color Palette 4 Register 218" hexmask.long.byte 0x368 24.--31. 1. " CP4_218A ,Color palette 4_218 blend ratio" hexmask.long.byte 0x368 18.--23. 1. " CP4_218R ,Color palette 4_218 red" hexmask.long.byte 0x368 10.--15. 1. " CP4_218G ,Color palette 4_218 green" hexmask.long.byte 0x368 2.--7. 1. " CP4_218B ,Color palette 4_218 blue" line.long 0x36C "CP4_219R,Color Palette 4 Register 219" hexmask.long.byte 0x36C 24.--31. 1. " CP4_219A ,Color palette 4_219 blend ratio" hexmask.long.byte 0x36C 18.--23. 1. " CP4_219R ,Color palette 4_219 red" hexmask.long.byte 0x36C 10.--15. 1. " CP4_219G ,Color palette 4_219 green" hexmask.long.byte 0x36C 2.--7. 1. " CP4_219B ,Color palette 4_219 blue" line.long 0x370 "CP4_220R,Color Palette 4 Register 220" hexmask.long.byte 0x370 24.--31. 1. " CP4_220A ,Color palette 4_220 blend ratio" hexmask.long.byte 0x370 18.--23. 1. " CP4_220R ,Color palette 4_220 red" hexmask.long.byte 0x370 10.--15. 1. " CP4_220G ,Color palette 4_220 green" hexmask.long.byte 0x370 2.--7. 1. " CP4_220B ,Color palette 4_220 blue" line.long 0x374 "CP4_221R,Color Palette 4 Register 221" hexmask.long.byte 0x374 24.--31. 1. " CP4_221A ,Color palette 4_221 blend ratio" hexmask.long.byte 0x374 18.--23. 1. " CP4_221R ,Color palette 4_221 red" hexmask.long.byte 0x374 10.--15. 1. " CP4_221G ,Color palette 4_221 green" hexmask.long.byte 0x374 2.--7. 1. " CP4_221B ,Color palette 4_221 blue" line.long 0x378 "CP4_222R,Color Palette 4 Register 222" hexmask.long.byte 0x378 24.--31. 1. " CP4_222A ,Color palette 4_222 blend ratio" hexmask.long.byte 0x378 18.--23. 1. " CP4_222R ,Color palette 4_222 red" hexmask.long.byte 0x378 10.--15. 1. " CP4_222G ,Color palette 4_222 green" hexmask.long.byte 0x378 2.--7. 1. " CP4_222B ,Color palette 4_222 blue" line.long 0x37C "CP4_223R,Color Palette 4 Register 223" hexmask.long.byte 0x37C 24.--31. 1. " CP4_223A ,Color palette 4_223 blend ratio" hexmask.long.byte 0x37C 18.--23. 1. " CP4_223R ,Color palette 4_223 red" hexmask.long.byte 0x37C 10.--15. 1. " CP4_223G ,Color palette 4_223 green" hexmask.long.byte 0x37C 2.--7. 1. " CP4_223B ,Color palette 4_223 blue" line.long 0x380 "CP4_224R,Color Palette 4 Register 224" hexmask.long.byte 0x380 24.--31. 1. " CP4_224A ,Color palette 4_224 blend ratio" hexmask.long.byte 0x380 18.--23. 1. " CP4_224R ,Color palette 4_224 red" hexmask.long.byte 0x380 10.--15. 1. " CP4_224G ,Color palette 4_224 green" hexmask.long.byte 0x380 2.--7. 1. " CP4_224B ,Color palette 4_224 blue" line.long 0x384 "CP4_225R,Color Palette 4 Register 225" hexmask.long.byte 0x384 24.--31. 1. " CP4_225A ,Color palette 4_225 blend ratio" hexmask.long.byte 0x384 18.--23. 1. " CP4_225R ,Color palette 4_225 red" hexmask.long.byte 0x384 10.--15. 1. " CP4_225G ,Color palette 4_225 green" hexmask.long.byte 0x384 2.--7. 1. " CP4_225B ,Color palette 4_225 blue" line.long 0x388 "CP4_226R,Color Palette 4 Register 226" hexmask.long.byte 0x388 24.--31. 1. " CP4_226A ,Color palette 4_226 blend ratio" hexmask.long.byte 0x388 18.--23. 1. " CP4_226R ,Color palette 4_226 red" hexmask.long.byte 0x388 10.--15. 1. " CP4_226G ,Color palette 4_226 green" hexmask.long.byte 0x388 2.--7. 1. " CP4_226B ,Color palette 4_226 blue" line.long 0x38C "CP4_227R,Color Palette 4 Register 227" hexmask.long.byte 0x38C 24.--31. 1. " CP4_227A ,Color palette 4_227 blend ratio" hexmask.long.byte 0x38C 18.--23. 1. " CP4_227R ,Color palette 4_227 red" hexmask.long.byte 0x38C 10.--15. 1. " CP4_227G ,Color palette 4_227 green" hexmask.long.byte 0x38C 2.--7. 1. " CP4_227B ,Color palette 4_227 blue" line.long 0x390 "CP4_228R,Color Palette 4 Register 228" hexmask.long.byte 0x390 24.--31. 1. " CP4_228A ,Color palette 4_228 blend ratio" hexmask.long.byte 0x390 18.--23. 1. " CP4_228R ,Color palette 4_228 red" hexmask.long.byte 0x390 10.--15. 1. " CP4_228G ,Color palette 4_228 green" hexmask.long.byte 0x390 2.--7. 1. " CP4_228B ,Color palette 4_228 blue" line.long 0x394 "CP4_229R,Color Palette 4 Register 229" hexmask.long.byte 0x394 24.--31. 1. " CP4_229A ,Color palette 4_229 blend ratio" hexmask.long.byte 0x394 18.--23. 1. " CP4_229R ,Color palette 4_229 red" hexmask.long.byte 0x394 10.--15. 1. " CP4_229G ,Color palette 4_229 green" hexmask.long.byte 0x394 2.--7. 1. " CP4_229B ,Color palette 4_229 blue" line.long 0x398 "CP4_230R,Color Palette 4 Register 230" hexmask.long.byte 0x398 24.--31. 1. " CP4_230A ,Color palette 4_230 blend ratio" hexmask.long.byte 0x398 18.--23. 1. " CP4_230R ,Color palette 4_230 red" hexmask.long.byte 0x398 10.--15. 1. " CP4_230G ,Color palette 4_230 green" hexmask.long.byte 0x398 2.--7. 1. " CP4_230B ,Color palette 4_230 blue" line.long 0x39C "CP4_231R,Color Palette 4 Register 231" hexmask.long.byte 0x39C 24.--31. 1. " CP4_231A ,Color palette 4_231 blend ratio" hexmask.long.byte 0x39C 18.--23. 1. " CP4_231R ,Color palette 4_231 red" hexmask.long.byte 0x39C 10.--15. 1. " CP4_231G ,Color palette 4_231 green" hexmask.long.byte 0x39C 2.--7. 1. " CP4_231B ,Color palette 4_231 blue" line.long 0x3A0 "CP4_232R,Color Palette 4 Register 232" hexmask.long.byte 0x3A0 24.--31. 1. " CP4_232A ,Color palette 4_232 blend ratio" hexmask.long.byte 0x3A0 18.--23. 1. " CP4_232R ,Color palette 4_232 red" hexmask.long.byte 0x3A0 10.--15. 1. " CP4_232G ,Color palette 4_232 green" hexmask.long.byte 0x3A0 2.--7. 1. " CP4_232B ,Color palette 4_232 blue" line.long 0x3A4 "CP4_233R,Color Palette 4 Register 233" hexmask.long.byte 0x3A4 24.--31. 1. " CP4_233A ,Color palette 4_233 blend ratio" hexmask.long.byte 0x3A4 18.--23. 1. " CP4_233R ,Color palette 4_233 red" hexmask.long.byte 0x3A4 10.--15. 1. " CP4_233G ,Color palette 4_233 green" hexmask.long.byte 0x3A4 2.--7. 1. " CP4_233B ,Color palette 4_233 blue" line.long 0x3A8 "CP4_234R,Color Palette 4 Register 234" hexmask.long.byte 0x3A8 24.--31. 1. " CP4_234A ,Color palette 4_234 blend ratio" hexmask.long.byte 0x3A8 18.--23. 1. " CP4_234R ,Color palette 4_234 red" hexmask.long.byte 0x3A8 10.--15. 1. " CP4_234G ,Color palette 4_234 green" hexmask.long.byte 0x3A8 2.--7. 1. " CP4_234B ,Color palette 4_234 blue" line.long 0x3AC "CP4_235R,Color Palette 4 Register 235" hexmask.long.byte 0x3AC 24.--31. 1. " CP4_235A ,Color palette 4_235 blend ratio" hexmask.long.byte 0x3AC 18.--23. 1. " CP4_235R ,Color palette 4_235 red" hexmask.long.byte 0x3AC 10.--15. 1. " CP4_235G ,Color palette 4_235 green" hexmask.long.byte 0x3AC 2.--7. 1. " CP4_235B ,Color palette 4_235 blue" line.long 0x3B0 "CP4_236R,Color Palette 4 Register 236" hexmask.long.byte 0x3B0 24.--31. 1. " CP4_236A ,Color palette 4_236 blend ratio" hexmask.long.byte 0x3B0 18.--23. 1. " CP4_236R ,Color palette 4_236 red" hexmask.long.byte 0x3B0 10.--15. 1. " CP4_236G ,Color palette 4_236 green" hexmask.long.byte 0x3B0 2.--7. 1. " CP4_236B ,Color palette 4_236 blue" line.long 0x3B4 "CP4_237R,Color Palette 4 Register 237" hexmask.long.byte 0x3B4 24.--31. 1. " CP4_237A ,Color palette 4_237 blend ratio" hexmask.long.byte 0x3B4 18.--23. 1. " CP4_237R ,Color palette 4_237 red" hexmask.long.byte 0x3B4 10.--15. 1. " CP4_237G ,Color palette 4_237 green" hexmask.long.byte 0x3B4 2.--7. 1. " CP4_237B ,Color palette 4_237 blue" line.long 0x3B8 "CP4_238R,Color Palette 4 Register 238" hexmask.long.byte 0x3B8 24.--31. 1. " CP4_238A ,Color palette 4_238 blend ratio" hexmask.long.byte 0x3B8 18.--23. 1. " CP4_238R ,Color palette 4_238 red" hexmask.long.byte 0x3B8 10.--15. 1. " CP4_238G ,Color palette 4_238 green" hexmask.long.byte 0x3B8 2.--7. 1. " CP4_238B ,Color palette 4_238 blue" line.long 0x3BC "CP4_239R,Color Palette 4 Register 239" hexmask.long.byte 0x3BC 24.--31. 1. " CP4_239A ,Color palette 4_239 blend ratio" hexmask.long.byte 0x3BC 18.--23. 1. " CP4_239R ,Color palette 4_239 red" hexmask.long.byte 0x3BC 10.--15. 1. " CP4_239G ,Color palette 4_239 green" hexmask.long.byte 0x3BC 2.--7. 1. " CP4_239B ,Color palette 4_239 blue" line.long 0x3C0 "CP4_240R,Color Palette 4 Register 240" hexmask.long.byte 0x3C0 24.--31. 1. " CP4_240A ,Color palette 4_240 blend ratio" hexmask.long.byte 0x3C0 18.--23. 1. " CP4_240R ,Color palette 4_240 red" hexmask.long.byte 0x3C0 10.--15. 1. " CP4_240G ,Color palette 4_240 green" hexmask.long.byte 0x3C0 2.--7. 1. " CP4_240B ,Color palette 4_240 blue" line.long 0x3C4 "CP4_241R,Color Palette 4 Register 241" hexmask.long.byte 0x3C4 24.--31. 1. " CP4_241A ,Color palette 4_241 blend ratio" hexmask.long.byte 0x3C4 18.--23. 1. " CP4_241R ,Color palette 4_241 red" hexmask.long.byte 0x3C4 10.--15. 1. " CP4_241G ,Color palette 4_241 green" hexmask.long.byte 0x3C4 2.--7. 1. " CP4_241B ,Color palette 4_241 blue" line.long 0x3C8 "CP4_242R,Color Palette 4 Register 242" hexmask.long.byte 0x3C8 24.--31. 1. " CP4_242A ,Color palette 4_242 blend ratio" hexmask.long.byte 0x3C8 18.--23. 1. " CP4_242R ,Color palette 4_242 red" hexmask.long.byte 0x3C8 10.--15. 1. " CP4_242G ,Color palette 4_242 green" hexmask.long.byte 0x3C8 2.--7. 1. " CP4_242B ,Color palette 4_242 blue" line.long 0x3CC "CP4_243R,Color Palette 4 Register 243" hexmask.long.byte 0x3CC 24.--31. 1. " CP4_243A ,Color palette 4_243 blend ratio" hexmask.long.byte 0x3CC 18.--23. 1. " CP4_243R ,Color palette 4_243 red" hexmask.long.byte 0x3CC 10.--15. 1. " CP4_243G ,Color palette 4_243 green" hexmask.long.byte 0x3CC 2.--7. 1. " CP4_243B ,Color palette 4_243 blue" line.long 0x3D0 "CP4_244R,Color Palette 4 Register 244" hexmask.long.byte 0x3D0 24.--31. 1. " CP4_244A ,Color palette 4_244 blend ratio" hexmask.long.byte 0x3D0 18.--23. 1. " CP4_244R ,Color palette 4_244 red" hexmask.long.byte 0x3D0 10.--15. 1. " CP4_244G ,Color palette 4_244 green" hexmask.long.byte 0x3D0 2.--7. 1. " CP4_244B ,Color palette 4_244 blue" line.long 0x3D4 "CP4_245R,Color Palette 4 Register 245" hexmask.long.byte 0x3D4 24.--31. 1. " CP4_245A ,Color palette 4_245 blend ratio" hexmask.long.byte 0x3D4 18.--23. 1. " CP4_245R ,Color palette 4_245 red" hexmask.long.byte 0x3D4 10.--15. 1. " CP4_245G ,Color palette 4_245 green" hexmask.long.byte 0x3D4 2.--7. 1. " CP4_245B ,Color palette 4_245 blue" line.long 0x3D8 "CP4_246R,Color Palette 4 Register 246" hexmask.long.byte 0x3D8 24.--31. 1. " CP4_246A ,Color palette 4_246 blend ratio" hexmask.long.byte 0x3D8 18.--23. 1. " CP4_246R ,Color palette 4_246 red" hexmask.long.byte 0x3D8 10.--15. 1. " CP4_246G ,Color palette 4_246 green" hexmask.long.byte 0x3D8 2.--7. 1. " CP4_246B ,Color palette 4_246 blue" line.long 0x3DC "CP4_247R,Color Palette 4 Register 247" hexmask.long.byte 0x3DC 24.--31. 1. " CP4_247A ,Color palette 4_247 blend ratio" hexmask.long.byte 0x3DC 18.--23. 1. " CP4_247R ,Color palette 4_247 red" hexmask.long.byte 0x3DC 10.--15. 1. " CP4_247G ,Color palette 4_247 green" hexmask.long.byte 0x3DC 2.--7. 1. " CP4_247B ,Color palette 4_247 blue" line.long 0x3E0 "CP4_248R,Color Palette 4 Register 248" hexmask.long.byte 0x3E0 24.--31. 1. " CP4_248A ,Color palette 4_248 blend ratio" hexmask.long.byte 0x3E0 18.--23. 1. " CP4_248R ,Color palette 4_248 red" hexmask.long.byte 0x3E0 10.--15. 1. " CP4_248G ,Color palette 4_248 green" hexmask.long.byte 0x3E0 2.--7. 1. " CP4_248B ,Color palette 4_248 blue" line.long 0x3E4 "CP4_249R,Color Palette 4 Register 249" hexmask.long.byte 0x3E4 24.--31. 1. " CP4_249A ,Color palette 4_249 blend ratio" hexmask.long.byte 0x3E4 18.--23. 1. " CP4_249R ,Color palette 4_249 red" hexmask.long.byte 0x3E4 10.--15. 1. " CP4_249G ,Color palette 4_249 green" hexmask.long.byte 0x3E4 2.--7. 1. " CP4_249B ,Color palette 4_249 blue" line.long 0x3E8 "CP4_250R,Color Palette 4 Register 250" hexmask.long.byte 0x3E8 24.--31. 1. " CP4_250A ,Color palette 4_250 blend ratio" hexmask.long.byte 0x3E8 18.--23. 1. " CP4_250R ,Color palette 4_250 red" hexmask.long.byte 0x3E8 10.--15. 1. " CP4_250G ,Color palette 4_250 green" hexmask.long.byte 0x3E8 2.--7. 1. " CP4_250B ,Color palette 4_250 blue" line.long 0x3EC "CP4_251R,Color Palette 4 Register 251" hexmask.long.byte 0x3EC 24.--31. 1. " CP4_251A ,Color palette 4_251 blend ratio" hexmask.long.byte 0x3EC 18.--23. 1. " CP4_251R ,Color palette 4_251 red" hexmask.long.byte 0x3EC 10.--15. 1. " CP4_251G ,Color palette 4_251 green" hexmask.long.byte 0x3EC 2.--7. 1. " CP4_251B ,Color palette 4_251 blue" line.long 0x3F0 "CP4_252R,Color Palette 4 Register 252" hexmask.long.byte 0x3F0 24.--31. 1. " CP4_252A ,Color palette 4_252 blend ratio" hexmask.long.byte 0x3F0 18.--23. 1. " CP4_252R ,Color palette 4_252 red" hexmask.long.byte 0x3F0 10.--15. 1. " CP4_252G ,Color palette 4_252 green" hexmask.long.byte 0x3F0 2.--7. 1. " CP4_252B ,Color palette 4_252 blue" line.long 0x3F4 "CP4_253R,Color Palette 4 Register 253" hexmask.long.byte 0x3F4 24.--31. 1. " CP4_253A ,Color palette 4_253 blend ratio" hexmask.long.byte 0x3F4 18.--23. 1. " CP4_253R ,Color palette 4_253 red" hexmask.long.byte 0x3F4 10.--15. 1. " CP4_253G ,Color palette 4_253 green" hexmask.long.byte 0x3F4 2.--7. 1. " CP4_253B ,Color palette 4_253 blue" line.long 0x3F8 "CP4_254R,Color Palette 4 Register 254" hexmask.long.byte 0x3F8 24.--31. 1. " CP4_254A ,Color palette 4_254 blend ratio" hexmask.long.byte 0x3F8 18.--23. 1. " CP4_254R ,Color palette 4_254 red" hexmask.long.byte 0x3F8 10.--15. 1. " CP4_254G ,Color palette 4_254 green" hexmask.long.byte 0x3F8 2.--7. 1. " CP4_254B ,Color palette 4_254 blue" line.long 0x3FC "CP4_255R,Color Palette 4 Register 255" hexmask.long.byte 0x3FC 24.--31. 1. " CP4_255A ,Color palette 4_255 blend ratio" hexmask.long.byte 0x3FC 18.--23. 1. " CP4_255R ,Color palette 4_255 red" hexmask.long.byte 0x3FC 10.--15. 1. " CP4_255G ,Color palette 4_255 green" hexmask.long.byte 0x3FC 2.--7. 1. " CP4_255B ,Color palette 4_255 blue" tree.end base ad:0xFEB10000 tree "External Synchronization Control Registers" width 8. if (((per.l(ad:0xFEB00000+0x20))&0x01)==0X01) group.long 0x00++0x03 line.long 0x00 "ESCR_0,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT invert" "Not inverted,Inverted" sif cpu()=="R8A77470" bitfld.long 0x00 24. "DCKOSEL,Output dot clock select" "By 5-0 bits,Regardless" endif bitfld.long 0x00 20. " DCLKSEL ,DCLKIN select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--5. " FRQSEL ,Dot clock frequency ratio selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else group.long 0x00++0x03 line.long 0x00 "ESCR_0,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT invert" "Not inverted,Inverted" sif cpu()=="R8A77470" bitfld.long 0x00 24. "DCKOSEL,Output dot clock select" "By 5-0 bits,Regardless" endif bitfld.long 0x00 20. " DCLKSEL ,DCLKIN select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--4. " FRQSEL ,Dot clock frequency ratio selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" endif group.long 0x04++0x03 line.long 0x00 "OTAR_0,Output Signal Timing Adjustment Register" bitfld.long 0x00 28.--30. " DEA ,DE output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 24.--26. " CLAMPA ,CLAMP output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 20.--22. " DRGBA ,Digital RGB output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 8.--10. " CDEA ,CDE output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 4.--6. " DISPA ,DISP output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 0.--2. " SYNCA ,SYNC output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" tree.end tree "Dual Display Output Control Registers" width 10. group.long 0x1000++0x3 line.long 0x00 "DORCR_0,Display Unit Output Route Control Register" bitfld.long 0x00 30. " PG_1_T ,Pin generate 1 timing select" "Generator 0,Generator 1" bitfld.long 0x00 28. " DK_1_S ,Dot clock select 1" "Generator 0,Generator 1" textline " " bitfld.long 0x00 24.--25. " PG_1_D ,Pin generate 1 input data select" "Superposition processor 1,Superposition processor 2,Fixed to 0,DOOR" bitfld.long 0x00 21. " DR_0_D ,Display output route 0 data select" "Pin controller 1,Pin controller 1 at rising edge/Pin controller 2 at falling edge" textline " " bitfld.long 0x00 16.--17. " PG_0_D ,Pin generate 0 input data select" "Superposition processor 1,Superposition processor 2,Fixed to 0,DOOR" textline " " sif cpu()!="R8A77470" bitfld.long 0x00 4. " RGPV ,R-GP_2 V blank timing select" "Generator 0,Generator 1" endif bitfld.long 0x00 0. " DPRS ,Display priority register select" "DPPR,DS_1_PR/DS_2_PR" textline "" group.long 0x1004++0x7 line.long 0x00 "DPTSR_0,Display Unit Plane Timing Select Register" bitfld.long 0x00 23. " P_8_DK ,Plane 8 dot clock select" "Generator 0,Generator 1" bitfld.long 0x00 22. " P_7_DK ,Plane 7 dot clock select" "Generator 0,Generator 1" bitfld.long 0x00 21. " P_6_DK ,Plane 6 dot clock select" "Generator 0,Generator 1" bitfld.long 0x00 20. " P_5_DK ,Plane 5 dot clock select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 19. " P_4_DK ,Plane 4 dot clock select" "Generator 0,Generator 1" bitfld.long 0x00 18. " P_3_DK ,Plane 3 dot clock select" "Generator 0,Generator 1" bitfld.long 0x00 17. " P_2_DK ,Plane 2 dot clock select" "Generator 0,Generator 1" bitfld.long 0x00 16. " P_1_DK ,Plane 1 dot clock select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 7. " P_8_TS ,Plane 8 Timing select" "Generator 0,Generator 1" bitfld.long 0x00 6. " P_7_TS ,Plane 7 Timing select" "Generator 0,Generator 1" bitfld.long 0x00 5. " P_6_TS ,Plane 6 Timing select" "Generator 0,Generator 1" bitfld.long 0x00 4. " P_5_TS ,Plane 5 Timing select" "Generator 0,Generator 1" textline " " bitfld.long 0x00 3. " P_4_TS ,Plane 4 Timing select" "Generator 0,Generator 1" bitfld.long 0x00 2. " P_3_TS ,Plane 3 Timing select" "Generator 0,Generator 1" bitfld.long 0x00 1. " P_2_TS ,Plane 2 Timing select" "Generator 0,Generator 1" bitfld.long 0x00 0. " P_1_TS ,Plane 1 Timing select" "Generator 0,Generator 1" line.long 0x04 "DAPTSR_0,Display Unit Alpha Plane Timing Select Register" bitfld.long 0x04 17. " AP_2_DK ,Alpha plane 2 dot clock select" "Generator 0,Generator 1" bitfld.long 0x04 16. " AP_1_DK ,Alpha plane 1 dot clock select" "Generator 0,Generator 1" bitfld.long 0x04 1. " AP_2_TS ,Alpha plane 2 dot clock select" "Generator 0,Generator 1" bitfld.long 0x04 0. " AP_1_TS ,Alpha plane 1 dot clock select" "Generator 0,Generator 1" group.long 0x1020++0x3 line.long 0x00 "DS_0_PR,Display Superimpose 0 Priority Register" bitfld.long 0x00 28.--31. " S0S_8 ,Display superimposition 0 priority 8 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 24.--27. " S0S_7 ,Display superimposition 0 priority 7 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 20.--23. " S0S_6 ,Display superimposition 0 priority 6 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 16.--19. " S0S_5 ,Display superimposition 0 priority 5 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 12.--15. " S0S_4 ,Display superimposition 0 priority 4 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 8.--11. " S0S_3 ,Display superimposition 0 priority 3 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 4.--7. " S0S_2 ,Display superimposition 0 priority 2 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 0.--3. " S0S_1 ,Display superimposition 0 priority 1 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." group.long 0x1024++0x3 line.long 0x00 "DS_1_PR,Display Superimpose 1 Priority Register" bitfld.long 0x00 28.--31. " S1S_8 ,Display superimposition 1 priority 8 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 24.--27. " S1S_7 ,Display superimposition 1 priority 7 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 20.--23. " S1S_6 ,Display superimposition 1 priority 6 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 16.--19. " S1S_5 ,Display superimposition 1 priority 5 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." textline " " bitfld.long 0x00 12.--15. " S1S_4 ,Display superimposition 1 priority 4 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 8.--11. " S1S_3 ,Display superimposition 1 priority 3 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 4.--7. " S1S_2 ,Display superimposition 1 priority 2 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." bitfld.long 0x00 0.--3. " S1S_1 ,Display superimposition 1 priority 1 select" "Not used,Plane 1,Plane 2,Plane 3,Plane 4,Plane 5,Plane 6,Plane 7,Plane 8,?..." tree.end width 7. tree "YC-RGB Conversion Coefficient Registers" tree "YC-RGB Conversion Before Superpositioning" group.long 0x1080++0x1f line.long 0x00 "YNCR,Y Normalization Coefficient Register" hexmask.long.word 0x00 16.--27. 1. " YNC_2 ,Y normalization coefficient 2" hexmask.long.word 0x00 0.--11. 1. " YNC_1 ,Y normalization coefficient 1" line.long 0x04 "YNOR,Y Normalization Offset Register" hexmask.long.byte 0x04 16.--23. 1. " YNO_2 ,Y normalization offset 2" hexmask.long.byte 0x04 0.--7. 1. " YNO_1 ,Y normalization offset 1" line.long 0x08 "CRNOR,Cr Normalization Offset Register" hexmask.long.byte 0x08 16.--23. 1. " CRNO_2 ,Cr normalization offset 2" hexmask.long.byte 0x08 0.--7. 1. " CRNO_1 ,Cr normalization offset 1" line.long 0x0c "CBNOR,Cb Normalization Offset Register" hexmask.long.byte 0x0c 16.--23. 1. " CBNO_2 ,Cb normalization offset 2" hexmask.long.byte 0x0c 0.--7. 1. " CBNO_1 ,Cb normalization offset 1" line.long 0x10 "RCRCR,Red Cr Coefficient Register" hexmask.long.word 0x10 16.--27. 1. " RCRC_2 ,Red Cr coefficient 2" hexmask.long.word 0x10 0.--11. 1. " RCRC_1 ,Red Cr coefficient 1" line.long 0x14 "GCRCR,Green Cr Coefficient Register" hexmask.long.word 0x14 16.--27. 1. " GCRC_2 ,Green Cr coefficient 2" hexmask.long.word 0x14 0.--11. 1. " GCRC_1 ,Green Cr coefficient 1" line.long 0x18 "GCBCR,Green Cb Coefficient Register" hexmask.long.word 0x18 16.--27. 1. " GCBC_2 ,Green Cb coefficient 2" hexmask.long.word 0x18 0.--11. 1. " GCBC_1 ,Green Cb coefficient 1" line.long 0x1c "BCRCR,Blue Cr Coefficient Register" hexmask.long.word 0x1c 16.--27. 1. " BCRC_2 ,Blue Cr coefficient 2" hexmask.long.word 0x1c 0.--11. 1. " BCRC_1 ,Blue Cr coefficient 1" tree.end tree "YC-RGB Conversion After Superpositioning" group.long 0x4080++0x1f line.long 0x00 "YNCR,Y Normalization Coefficient Register" hexmask.long.word 0x00 16.--27. 1. " YNC_2 ,Y normalization coefficient 2" hexmask.long.word 0x00 0.--11. 1. " YNC_1 ,Y normalization coefficient 1" line.long 0x04 "YNOR,Y Normalization Offset Register" hexmask.long.byte 0x04 16.--23. 1. " YNO_2 ,Y normalization offset 2" hexmask.long.byte 0x04 0.--7. 1. " YNO_1 ,Y normalization offset 1" line.long 0x08 "CRNOR,Cr Normalization Offset Register" hexmask.long.byte 0x08 16.--23. 1. " CRNO_2 ,Cr normalization offset 2" hexmask.long.byte 0x08 0.--7. 1. " CRNO_1 ,Cr normalization offset 1" line.long 0x0c "CBNOR,Cb Normalization Offset Register" hexmask.long.byte 0x0c 16.--23. 1. " CBNO_2 ,Cb normalization offset 2" hexmask.long.byte 0x0c 0.--7. 1. " CBNO_1 ,Cb normalization offset 1" line.long 0x10 "RCRCR,Red Cr Coefficient Register" hexmask.long.word 0x10 16.--27. 1. " RCRC_2 ,Red Cr coefficient 2" hexmask.long.word 0x10 0.--11. 1. " RCRC_1 ,Red Cr coefficient 1" line.long 0x14 "GCRCR,Green Cr Coefficient Register" hexmask.long.word 0x14 16.--27. 1. " GCRC_2 ,Green Cr coefficient 2" hexmask.long.word 0x14 0.--11. 1. " GCRC_1 ,Green Cr coefficient 1" line.long 0x18 "GCBCR,Green Cb Coefficient Register" hexmask.long.word 0x18 16.--27. 1. " GCBC_2 ,Green Cb coefficient 2" hexmask.long.word 0x18 0.--11. 1. " GCBC_1 ,Green Cb coefficient 1" line.long 0x1c "BCRCR,Blue Cr Coefficient Register" hexmask.long.word 0x1c 16.--27. 1. " BCRC_2 ,Blue Cr coefficient 2" hexmask.long.word 0x1c 0.--11. 1. " BCRC_1 ,Blue Cr coefficient 1" tree.end tree.end sif cpu()=="R8A77470" width 13. tree "YC-RGB Conversion Coefficient Registers" group.long 0x10000++0x2f line.long 0x00 "YCLRP,Y Calculation R Coefficient Register" hexmask.long.word 0x00 16.--28. 1. " YCLRP1 ,Y calculation R coefficient 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP0 ,Y calculation R coefficient 0" line.long 0x04 "YCLGP,Y Calculation G Coefficient Register" hexmask.long.word 0x04 16.--28. 1. " YCLGP1 ,Y calculation G coefficient 1" hexmask.long.word 0x04 0.--12. 1. " YCLGP0 ,Y calculation G coefficient 0" line.long 0x08 "YCLBP,Y Calculation B Coefficient Register" hexmask.long.word 0x08 16.--28. 1. " YCLBP1 ,Y calculation B coefficient 1" hexmask.long.word 0x08 0.--12. 1. " YCLBP0 ,Y calculation B coefficient 0" line.long 0x0C "YCLAP,Y Calculation Addition Constant Register" hexmask.long.byte 0x0c 16.--23. 1. " YCLAP1 ,Y calculation addition constant 1" hexmask.long.byte 0x0c 0.--7. 1. " YCLAP0 ,Y calculation addition constant 0" line.long 0x10 "CBCLRP,Cb Calculation R Coefficient Register" hexmask.long.word 0x10 16.--28. 1. " CBCLRP1 ,Cb calculation R coefficient 1" hexmask.long.word 0x10 0.--12. 1. " CBCLRP0 ,Cb calculation R coefficient 0" line.long 0x14 "CBCLGP,Cb Calculation G Coefficient Register" hexmask.long.word 0x14 16.--28. 1. " CBCLGP1 ,Cb calculation G coefficient 1" hexmask.long.word 0x14 0.--12. 1. " CBCLGP0 ,Cb calculation G coefficient 0" line.long 0x18 "CBCLBP,Cb Calculation B Coefficient Register" hexmask.long.word 0x18 16.--28. 1. " CBCLBP1 ,Cb calculation B coefficient 1" hexmask.long.word 0x18 0.--12. 1. " CBCLBP0 ,Cb calculation B coefficient 0" line.long 0x1C "CBCLAP,Cb Calculation Addition Constant Register" hexmask.long.byte 0x1c 16.--23. 1. " CBCLAP1 ,Cb calculation addition constant 1" hexmask.long.byte 0x1c 0.--7. 1. " CBCLAP0 ,Cb calculation addition constant 0" line.long 0x20 "CRCLRP,Cr Calculation R Coefficient Register" hexmask.long.word 0x20 16.--28. 1. " CRCLRP1 ,Cr calculation R coefficient 1" hexmask.long.word 0x20 0.--12. 1. " CRCLRP0 ,Cr calculation R coefficient 0" line.long 0x24 "CRCLRP,Cr Calculation R Coefficient Register" hexmask.long.word 0x24 16.--28. 1. " CRCLGP0 ,Cr calculation G coefficient 1" hexmask.long.word 0x24 0.--12. 1. " CRCLGP0 ,Cr calculation G coefficient 0" line.long 0x28 "CRCLRP,Cr Calculation R Coefficient Register" hexmask.long.word 0x28 16.--28. 1. " CRCLBP1 ,Cr calculation B coefficient 1" hexmask.long.word 0x28 0.--12. 1. " CRCLBP0 ,Cr calculation B coefficient 0" line.long 0x2C "CRCLRP,Cr Calculation R Coefficient Register" hexmask.long.byte 0x2C 16.--23. 1. " CRCLAP1 ,Cr calculation addition constant 1" hexmask.long.byte 0x2C 0.--7. 1. " CRCLAP0 ,Cr calculation addition constant 0" group.long 0x14000++0x2f line.long 0x00 "YCLRP,Y Calculation R Coefficient Register" hexmask.long.word 0x00 16.--28. 1. " YCLRP1 ,Y calculation R coefficient 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP0 ,Y calculation R coefficient 0" line.long 0x04 "YCLGP,Y Calculation G Coefficient Register" hexmask.long.word 0x04 16.--28. 1. " YCLGP1 ,Y calculation G coefficient 1" hexmask.long.word 0x04 0.--12. 1. " YCLGP0 ,Y calculation G coefficient 0" line.long 0x08 "YCLBP,Y Calculation B Coefficient Register" hexmask.long.word 0x08 16.--28. 1. " YCLBP1 ,Y calculation B coefficient 1" hexmask.long.word 0x08 0.--12. 1. " YCLBP0 ,Y calculation B coefficient 0" line.long 0x0C "YCLAP,Y Calculation Addition Constant Register" hexmask.long.byte 0x0c 16.--23. 1. " YCLAP1 ,Y calculation addition constant 1" hexmask.long.byte 0x0c 0.--7. 1. " YCLAP0 ,Y calculation addition constant 0" line.long 0x10 "CBCLRP,Cb Calculation R Coefficient Register" hexmask.long.word 0x10 16.--28. 1. " CBCLRP1 ,Cb calculation R coefficient 1" hexmask.long.word 0x10 0.--12. 1. " CBCLRP0 ,Cb calculation R coefficient 0" line.long 0x14 "CBCLGP,Cb Calculation G Coefficient Register" hexmask.long.word 0x14 16.--28. 1. " CBCLGP1 ,Cb calculation G coefficient 1" hexmask.long.word 0x14 0.--12. 1. " CBCLGP0 ,Cb calculation G coefficient 0" line.long 0x18 "CBCLBP,Cb Calculation B Coefficient Register" hexmask.long.word 0x18 16.--28. 1. " CBCLBP1 ,Cb calculation B coefficient 1" hexmask.long.word 0x18 0.--12. 1. " CBCLBP0 ,Cb calculation B coefficient 0" line.long 0x1C "CBCLAP,Cb Calculation Addition Constant Register" hexmask.long.byte 0x1c 16.--23. 1. " CBCLAP1 ,Cb calculation addition constant 1" hexmask.long.byte 0x1c 0.--7. 1. " CBCLAP0 ,Cb calculation addition constant 0" line.long 0x20 "CRCLRP,Cr Calculation R Coefficient Register" hexmask.long.word 0x20 16.--28. 1. " CRCLRP1 ,Cr calculation R coefficient 1" hexmask.long.word 0x20 0.--12. 1. " CRCLRP0 ,Cr calculation R coefficient 0" line.long 0x24 "CRCLRP,Cr Calculation R Coefficient Register" hexmask.long.word 0x24 16.--28. 1. " CRCLGP0 ,Cr calculation G coefficient 1" hexmask.long.word 0x24 0.--12. 1. " CRCLGP0 ,Cr calculation G coefficient 0" line.long 0x28 "CRCLRP,Cr Calculation R Coefficient Register" hexmask.long.word 0x28 16.--28. 1. " CRCLBP1 ,Cr calculation B coefficient 1" hexmask.long.word 0x28 0.--12. 1. " CRCLBP0 ,Cr calculation B coefficient 0" line.long 0x2C "CRCLRP,Cr Calculation R Coefficient Register" hexmask.long.byte 0x2C 16.--23. 1. " CRCLAP1 ,Cr calculation addition constant 1" hexmask.long.byte 0x2C 0.--7. 1. " CRCLAP0 ,Cr calculation addition constant 0" tree.end endif width 0x0B tree.end tree "DU 1" base ad:0xFEB00000 width 13. tree "Display Control Registers" if (((per.l(ad:0xFEB00000+0x20))&0x01)==0x01) group.long 0x00++0x03 line.long 0x00 "DSYSR_1,Display Unit System Control Register" bitfld.long 0x00 29. " ILTS ,Input pad latch timing select" "Rising,Falling" bitfld.long 0x00 20. " DSEC ,Display data endian change" "Not performed,Performed" sif cpu()!="R8A77470" bitfld.long 0x00 16. " IUPD ,Internal updating disable" "No,Yes" textline " " bitfld.long 0x00 8.--9. " DRES/DEN ,Display reset/display enable" "Started (display DOOR),Started (display memory),Stopped,?..." bitfld.long 0x00 6.--7. " TVM ,TV synchronization mode" "Master mode,Synchronous mode,TV synchronization mode,?..." else bitfld.long 0x00 6.--7. " TVM ,TV synchronization mode" "Master mode,Synchronization method switching mode,TV synchronization mode,?..." bitfld.long 0x00 4.--5. " SCM_1 ,Scan mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" endif else group.long 0x00++0x03 line.long 0x00 "DSYSR_1,Display Unit System Control Register" bitfld.long 0x00 20. " DSEC ,Display data endian change" "Not performed,Performed" sif cpu()!="R8A77470" bitfld.long 0x00 16. " IUPD ,Internal updating disable" "No,Yes" bitfld.long 0x00 8.--9. " DRES/DEN ,Display reset/display enable" "Started (display DOOR),Started (display memory),Stopped,?..." textline " " bitfld.long 0x00 6.--7. " TVM ,TV synchronization mode" "Master mode,Synchronous mode,TV synchronization mode,?..." else bitfld.long 0x00 6.--7. " TVM ,TV synchronization mode" "Master mode,Synchronous mode,TV synchronization mode,?..." bitfld.long 0x00 4.--5. " SCM_1 ,Scan mode" "Non-interlaced mode,,Interlaced sync mode,Interlaced sync & video mode" endif endif textline "" group.long 0x04++0x03 line.long 0x00 "DSMR_1,Display Mode Register" bitfld.long 0x00 28. " VSPM ,VSYNC pin mode" "VSYNC,CSYNC" bitfld.long 0x00 27. " ODPM ,ODDF pin mode" "ODDF,CLAMP" bitfld.long 0x00 25.--26. " DIPM ,DISP pin mode" "DISP,CSYNC,,DE" textline " " bitfld.long 0x00 24. " CSPM ,CSYNC pin mode" "CSYNC,HSYNC" bitfld.long 0x00 19. " DIL ,DISP polarity selection" "High-active,Polarity inverted" bitfld.long 0x00 18. " VSL ,VSYNC polarity selection" "Low-active,Polarity inverted" textline " " bitfld.long 0x00 17. " HSL ,HSYNC polarity selection" "Low-active,Polarity inverted" bitfld.long 0x00 16. " DDIS ,DISP output disable" "No,Yes" bitfld.long 0x00 15. " CDEL ,CDE polarity selection" "High-active,Polarity inverted" textline " " bitfld.long 0x00 13.--14. " CDEM ,CDE output mode" "Normal mode,Normal mode,Low level,High level" bitfld.long 0x00 12. " CDED ,CDE disable" "No,Yes" bitfld.long 0x00 8. " ODEV ,ODD signal polarity selection" "Low level,High level" textline " " bitfld.long 0x00 6.--7. " CSY ,CSYNC mode" "Mode 0,,Mode 2,Mode 3" rgroup.long 0x08++0x03 line.long 0x00 "DSSR_1,Display Status Register" bitfld.long 0x00 15. " TVR1 ,TV synchronization error flag 1" "Detected,Not detected" bitfld.long 0x00 14. " FRM1 ,Frame flag" "Low,High" bitfld.long 0x00 11. " VBK1 ,Vertical blanking flag" "Low,High" textline " " bitfld.long 0x00 9. " RINT1 ,Raster Interrupt Flag" "No interrupt,Interrupt" bitfld.long 0x00 8. " HBK1 ,Horizontal Blanking Flag" "Low,High" wgroup.long 0x0C++0x03 line.long 0x00 "DSRCR_1,Display Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV synchronization signal error flag clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame flag clear" "No effect,Clear" bitfld.long 0x00 11. " VBCL ,Vertical blanking flag clear" "No effect,Clear" textline " " bitfld.long 0x00 9. " RICL ,Raster interrupt flag clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal blanking flag clear" "No effect,Clear" group.long 0x10++0x03 line.long 0x00 "DIER_1,Display Unit Interrupt Enable Register" bitfld.long 0x00 15. " TVE1 ,TV synchronous signal error flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE1 ,Frame flag interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " VBE1 ,Vertical blanking flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " RIE1 ,Raster interrupt flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE1 ,HBK flag interrupt enable" "Disabled,Enabled" group.long 0x20++0x03 line.long 0x00 "DEFR_1,Display Unit Extensional Function Enable Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DEFR enabling code [0x7773]" bitfld.long 0x00 12. " EXSL ,External sync signal select" "Post-division clocks,Pre-division clocks" bitfld.long 0x00 11. " EXVL ,External vsync latch select" "Every clock cycle,Rising edge" textline " " bitfld.long 0x00 8.--9. " DODF1 ,Display output data format" "RGB,,Non-multiplexed YC,Multiplexed YC" bitfld.long 0x00 4. " VCUP ,Vertical cycle register update timing select" "Falling VSYNC,Rising VSYNC" base ad:0xFEB20000 rgroup.long 0x8008++0x3 line.long 0x00 "DD_1_SSR_1,Display Unit Domain 1 Status Register 1" bitfld.long 0x00 15. " TVR1 ,TV synchronization error flag" "Not occurred,Occurred" bitfld.long 0x00 14. " FRM1 ,Frame flag" "Not occurred,Occurred" sif cpu()!="R8A77470" bitfld.long 0x00 12. " BUF ,Buffer underflow flag" "Not occurred,Occurred" endif textline " " bitfld.long 0x00 11. " VBK1 ,Vertical blanking flag" "Not occurred,Occurred" bitfld.long 0x00 9. " RINT1 ,Raster interrupt flag" "Not occurred,Occurred" bitfld.long 0x00 8. " HBK1 ,Horizontal blanking flag" "Not occurred,Occurred" textline " " sif cpu()!="R8A77470" bitfld.long 0x00 7. " ADC_8 ,Auto rendering display change flag 8" "Not switched,Switched" bitfld.long 0x00 6. " ADC_7 ,Auto rendering display change flag 7" "Not switched,Switched" bitfld.long 0x00 5. " ADC_6 ,Auto rendering display change flag 6" "Not switched,Switched" textline " " bitfld.long 0x00 4. " ADC_5 ,Auto rendering display change flag 5" "Not switched,Switched" bitfld.long 0x00 3. " ADC_4 ,Auto rendering display change flag 4" "Not switched,Switched" bitfld.long 0x00 2. " ADC_3 ,Auto rendering display change flag 3" "Not switched,Switched" textline " " bitfld.long 0x00 1. " ADC_2 ,Auto rendering display change flag 2" "Not switched,Switched" bitfld.long 0x00 0. " ADC_1 ,Auto rendering display change flag 1" "Not switched,Switched" endif wgroup.long 0x800C++0x03 line.long 0x00 "DD_1_DSRCR_1,Display Unit Domain 1 Status Register Clear Register" bitfld.long 0x00 15. " TVCL ,TV synchronization signal error flag clear" "No effect,Clear" bitfld.long 0x00 14. " FRCL ,Frame flag clear" "No effect,Clear" bitfld.long 0x00 11. " VBCL ,Vertical blanking flag clear" "No effect,Clear" textline " " bitfld.long 0x00 9. " RICL ,Raster Interrupt flag clear" "No effect,Clear" bitfld.long 0x00 8. " HBCL ,Horizontal blanking flag clear" "No effect,Clear" group.long 0x10++0x3 line.long 0x00 "DD_1_IER_1,Display Unit Domain 1 Interrupt Enable Register" bitfld.long 0x00 15. " TVE ,TV Synchronous Signal error flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " FRE ,Frame flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " VBE ,Vertical blanking flag interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " RIE ,Raster interrupt flag interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " HBE ,HBK flag interrupt enable" "Disabled,Enabled" group.long 0x28++0x3 line.long 0x00 "DIDSR,Display Unit Input Dot Clock Select Register" hexmask.long.word 0x00 16.--31. 1. " CODE ,DIDSR enabling code" sif cpu()=="R8A77470" bitfld.long 0x00 10.--11. " LDCS_1 ,DU_1 LVDS dot clock select" "DU1_DOTCLKIN,DU1_DOTCLKIN,LVDS 1,DVENC 1" textline " " bitfld.long 0x00 8.--9. " LDCS_0 ,DU_0 LVDS dot clock select" "DU0_DOTCLKIN,DU0_DOTCLKIN,LVDS 0,DVENC 0" bitfld.long 0x00 2.--3. " PDCS_1 ,DU_1 pad dot clock select" "DU0_DOTCLKIN,DU1_DOTCLKIN,DU1_DOTCLKIN,?..." textline " " bitfld.long 0x00 0.--1. " PDCS_0 ,DU_0 pad dot clock select" "DU0_DOTCLKIN,DU1_DOTCLKIN,DU0_DOTCLKIN,?..." else bitfld.long 0x00 12.--13. " LDCS_2 ,DU_2 LVDS dot clock select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" bitfld.long 0x00 10.--11. " LDCS_1 ,DU_1 LVDS dot clock select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" textline " " bitfld.long 0x00 8.--9. " LDCS_0 ,DU_0 LVDS dot clock select" "DCLKIN,DCLKIN,LVDS 0,LVDS 1" bitfld.long 0x00 4.--5. " PDCS_2 ,DU_2 pad dot clock select" "DU_DOTCLKIN2,DU_DOTCLKIN0,DU_DOTCLKIN2,DU_DOTCLKIN1" bitfld.long 0x00 2.--3. " PDCS_1 ,DU_1 pad dot clock select" "DU_DOTCLKIN1,DU_DOTCLKIN0,DU_DOTCLKIN1,DU_DOTCLKIN2" textline " " bitfld.long 0x00 0.--1. " PDCS_0 ,DU_0 pad dot clock select" "DU_DOTCLKIN0,DU_DOTCLKIN1,DU_DOTCLKIN0,DU_DOTCLKIN2" endif tree.end base ad:0xFEB30000 tree "Display Timing Generation Registers" width 11. group.long 0x40++0x1F line.long 0x00 "HDSR_1,Horizontal Display Start Register" hexmask.long.word 0x00 0.--9. 1. " HDS ,Horizontal display start" line.long 0x04 "HDER_1,Horizontal Display End Register" hexmask.long.word 0x04 0.--11. 1. " HDE ,Horizontal display end" line.long 0x08 "VDSR_1,Vertical Display Start Register" hexmask.long.word 0x08 0.--8. 1. " VDS ,Vertical display start" line.long 0x0c "VDER_1,Vertical Display End Register" hexmask.long.word 0x0c 0.--10. 1. " VDE ,Vertical display end" line.long 0x10 "HCR_1,Horizontal Cycle Register" hexmask.long.word 0x10 0.--11. 1. " HC ,Horizontal cycle" line.long 0x14 "HSWR_1,Horizontal Sync Width Register" hexmask.long.word 0x14 0.--8. 1. " HSW ,Horizontal sync width" line.long 0x18 "VCR_1,Vertical Cycle Register" hexmask.long.word 0x18 0.--10. 1. " VC ,Vertical cycle" line.long 0x1c "VSPR_1,Vertical Sync Point Register" hexmask.long.word 0x1c 0.--10. 1. " VSP ,Vertical sync point" if (((per.l(ad:0xFEB30000+0x04))&0x80)==0x80) group.long (0x60)++0x7 line.long 0x00 "EQWR_1,Equal Pulse Width Register" hexmask.long.byte 0x00 0.--6. 1. " EQW ,Equal pulse width" line.long 0x04 "SPWR_1,Serration Width Register" hexmask.long.word 0x04 0.--9. 1. " SPW ,Serration width" else hgroup.long 0x60++0x3 hide.long 0x00 "EQWR_1,Equal Pulse Width Register" hgroup.long 0x64++0x3 hide.long 0x00 "SPWR_1,Separation Width Register" endif group.long 0x70++0xF line.long 0x00 "CLAMPSR_1,CLAMP Signal Start Register" hexmask.long.word 0x00 0.--11. 1. " CLAMPS ,CLAMP signal start" line.long 0x04 "CLAMPWR_1,CLAMP Signal Width Register" hexmask.long.word 0x04 0.--11. 1. " CLAMPW ,CLAMP signal width" line.long 0x08 "DESR_1,DE Signal Start Register" hexmask.long.word 0x08 0.--11. 1. " DES ,DE signal start" line.long 0x0c "DEWR_1,DE Signal Width Register" hexmask.long.word 0x0c 0.--11. 1. " DEW ,DE signal width" tree.end width 12. tree "Display Attribute Registers" group.long 0x80++0xF line.long 0x0 "CP_1_TR_1,Color Palette Transparent Color Register" bitfld.long 0x0 15. " CP_1_IF ,Color palette index F" "Not set,Set" bitfld.long 0x0 14. " CP_1_IE ,Color palette index E" "Not set,Set" bitfld.long 0x0 13. " CP_1_ID ,Color palette index D" "Not set,Set" bitfld.long 0x0 12. " CP_1_IC ,Color palette index C" "Not set,Set" textline " " bitfld.long 0x0 11. " CP_1_IB ,Color palette index B" "Not set,Set" bitfld.long 0x0 10. " CP_1_IA ,Color palette index A" "Not set,Set" bitfld.long 0x0 9. " CP_1_I9 ,Color palette index 9" "Not set,Set" bitfld.long 0x0 8. " CP_1_I8 ,Color palette index 8" "Not set,Set" textline " " bitfld.long 0x0 7. " CP_1_I7 ,Color palette index 7" "Not set,Set" bitfld.long 0x0 6. " CP_1_I6 ,Color palette index 6" "Not set,Set" bitfld.long 0x0 5. " CP_1_I5 ,Color palette index 5" "Not set,Set" bitfld.long 0x0 4. " CP_1_I4 ,Color palette index 4" "Not set,Set" textline " " bitfld.long 0x0 3. " CP_1_I3 ,Color palette index 3" "Not set,Set" bitfld.long 0x0 2. " CP_1_I2 ,Color palette index 2" "Not set,Set" bitfld.long 0x0 1. " CP_1_I1 ,Color palette index 1" "Not set,Set" bitfld.long 0x0 0. " CP_1_I0 ,Color palette index 0" "Not set,Set" line.long 0x4 "CP_2_TR_1,Color Palette Transparent Color Register" bitfld.long 0x4 15. " CP_2_IF ,Color palette index F" "Not set,Set" bitfld.long 0x4 14. " CP_2_IE ,Color palette index E" "Not set,Set" bitfld.long 0x4 13. " CP_2_ID ,Color palette index D" "Not set,Set" bitfld.long 0x4 12. " CP_2_IC ,Color palette index C" "Not set,Set" textline " " bitfld.long 0x4 11. " CP_2_IB ,Color palette index B" "Not set,Set" bitfld.long 0x4 10. " CP_2_IA ,Color palette index A" "Not set,Set" bitfld.long 0x4 9. " CP_2_I9 ,Color palette index 9" "Not set,Set" bitfld.long 0x4 8. " CP_2_I8 ,Color palette index 8" "Not set,Set" textline " " bitfld.long 0x4 7. " CP_2_I7 ,Color palette index 7" "Not set,Set" bitfld.long 0x4 6. " CP_2_I6 ,Color palette index 6" "Not set,Set" bitfld.long 0x4 5. " CP_2_I5 ,Color palette index 5" "Not set,Set" bitfld.long 0x4 4. " CP_2_I4 ,Color palette index 4" "Not set,Set" textline " " bitfld.long 0x4 3. " CP_2_I3 ,Color palette index 3" "Not set,Set" bitfld.long 0x4 2. " CP_2_I2 ,Color palette index 2" "Not set,Set" bitfld.long 0x4 1. " CP_2_I1 ,Color palette index 1" "Not set,Set" bitfld.long 0x4 0. " CP_2_I0 ,Color palette index 0" "Not set,Set" line.long 0x8 "CP_3_TR_1,Color Palette Transparent Color Register" bitfld.long 0x8 15. " CP_3_IF ,Color palette index F" "Not set,Set" bitfld.long 0x8 14. " CP_3_IE ,Color palette index E" "Not set,Set" bitfld.long 0x8 13. " CP_3_ID ,Color palette index D" "Not set,Set" bitfld.long 0x8 12. " CP_3_IC ,Color palette index C" "Not set,Set" textline " " bitfld.long 0x8 11. " CP_3_IB ,Color palette index B" "Not set,Set" bitfld.long 0x8 10. " CP_3_IA ,Color palette index A" "Not set,Set" bitfld.long 0x8 9. " CP_3_I9 ,Color palette index 9" "Not set,Set" bitfld.long 0x8 8. " CP_3_I8 ,Color palette index 8" "Not set,Set" textline " " bitfld.long 0x8 7. " CP_3_I7 ,Color palette index 7" "Not set,Set" bitfld.long 0x8 6. " CP_3_I6 ,Color palette index 6" "Not set,Set" bitfld.long 0x8 5. " CP_3_I5 ,Color palette index 5" "Not set,Set" bitfld.long 0x8 4. " CP_3_I4 ,Color palette index 4" "Not set,Set" textline " " bitfld.long 0x8 3. " CP_3_I3 ,Color palette index 3" "Not set,Set" bitfld.long 0x8 2. " CP_3_I2 ,Color palette index 2" "Not set,Set" bitfld.long 0x8 1. " CP_3_I1 ,Color palette index 1" "Not set,Set" bitfld.long 0x8 0. " CP_3_I0 ,Color palette index 0" "Not set,Set" line.long 0xC "CP_4_TR_1,Color Palette Transparent Color Register" bitfld.long 0xC 15. " CP_4_IF ,Color palette index F" "Not set,Set" bitfld.long 0xC 14. " CP_4_IE ,Color palette index E" "Not set,Set" bitfld.long 0xC 13. " CP_4_ID ,Color palette index D" "Not set,Set" bitfld.long 0xC 12. " CP_4_IC ,Color palette index C" "Not set,Set" textline " " bitfld.long 0xC 11. " CP_4_IB ,Color palette index B" "Not set,Set" bitfld.long 0xC 10. " CP_4_IA ,Color palette index A" "Not set,Set" bitfld.long 0xC 9. " CP_4_I9 ,Color palette index 9" "Not set,Set" bitfld.long 0xC 8. " CP_4_I8 ,Color palette index 8" "Not set,Set" textline " " bitfld.long 0xC 7. " CP_4_I7 ,Color palette index 7" "Not set,Set" bitfld.long 0xC 6. " CP_4_I6 ,Color palette index 6" "Not set,Set" bitfld.long 0xC 5. " CP_4_I5 ,Color palette index 5" "Not set,Set" bitfld.long 0xC 4. " CP_4_I4 ,Color palette index 4" "Not set,Set" textline " " bitfld.long 0xC 3. " CP_4_I3 ,Color palette index 3" "Not set,Set" bitfld.long 0xC 2. " CP_4_I2 ,Color palette index 2" "Not set,Set" bitfld.long 0xC 1. " CP_4_I1 ,Color palette index 1" "Not set,Set" bitfld.long 0xC 0. " CP_4_I0 ,Color palette index 0" "Not set,Set" textline " " group.long 0x90++0xF line.long 0x00 "DOOR_1,Display-Off Mode Output Register" hexmask.long.byte 0x00 18.--23. 1. " DOR ,Display off mode output red" hexmask.long.byte 0x00 10.--15. 1. " DOG ,Display off mode output green" hexmask.long.byte 0x00 2.--7. 1. " DOB ,Display off mode output blue" line.long 0x04 "CDER_1,Color Detection Register" hexmask.long.byte 0x04 18.--23. 1. " CDR ,Color detection red" hexmask.long.byte 0x04 10.--15. 1. " CDG ,Color detection green" hexmask.long.byte 0x04 2.--7. 1. " CDB ,Color detection blue" line.long 0x08 "BPOR_1,Ground Color Register" hexmask.long.byte 0x08 18.--23. 1. " BPOR ,Background plane output red" hexmask.long.byte 0x08 10.--15. 1. " BPOG ,Background plane output green" hexmask.long.byte 0x08 2.--7. 1. " BPOB ,Background plane output blue" line.long 0x0c "RINTOFSR_1,Raster Interrupt Offset Register" hexmask.long.word 0x0c 0.--10. 1. " RINTOFS ,Raster interrupt offset" tree.end tree "Display Planes 1-8" tree.end tree "Alpha-Ratio Planes 1-8" sif cpu()=="R8A77470" else endif tree.end base ad:0xFEB30000 tree "Display Capture Registers" tree.end tree "Color Palette 1 Registers" tree.end tree "Color Palette 2 Registers" tree.end tree "Color Palette 3 Registers" tree.end tree "Color Palette 4 Registers" tree.end base ad:0xFEB30000 tree "External Synchronization Control Registers" width 8. if (((per.l(ad:0xFEB30000+0x20))&0x01)==0X01) group.long 0x00++0x03 line.long 0x00 "ESCR_1,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT invert" "Not inverted,Inverted" sif cpu()=="R8A77470" bitfld.long 0x00 24. "DCKOSEL,Output dot clock select" "By 5-0 bits,Regardless" endif bitfld.long 0x00 20. " DCLKSEL ,DCLKIN select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--5. " FRQSEL ,Dot clock frequency ratio selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32,/33,/34,/35,/36,/37,/38,/39,/40,/41,/42,/43,/44,/45,/46,/47,/48,/49,/50,/51,/52,/53,/54,/55,/56,/57,/58,/59,/60,/61,/62,/63,/64" else group.long 0x00++0x03 line.long 0x00 "ESCR_1,External Synchronization Control Register" bitfld.long 0x00 25. " DCKOINV ,DCLKOUT invert" "Not inverted,Inverted" sif cpu()=="R8A77470" bitfld.long 0x00 24. "DCKOSEL,Output dot clock select" "By 5-0 bits,Regardless" endif bitfld.long 0x00 20. " DCLKSEL ,DCLKIN select" "DCLKIN,CLKS" textline " " bitfld.long 0x00 16. " DCLKDIS ,DCLKOUT disable" "No,Yes" bitfld.long 0x00 8.--9. " SYNCSEL ,SYNC select" "Not synchronized,Not synchronized,EXVSYNC synchronized,EXHSYNC synchronized" textline " " bitfld.long 0x00 0.--4. " FRQSEL ,Dot clock frequency ratio selection" "Not performed,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" endif group.long 0x04++0x03 line.long 0x00 "OTAR_1,Output Signal Timing Adjustment Register" bitfld.long 0x00 28.--30. " DEA ,DE output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 24.--26. " CLAMPA ,CLAMP output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 20.--22. " DRGBA ,Digital RGB output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 8.--10. " CDEA ,CDE output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" textline " " bitfld.long 0x00 4.--6. " DISPA ,DISP output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" bitfld.long 0x00 0.--2. " SYNCA ,SYNC output timing adjustment" "No adjustment,Rising/delayed 1 cycle,Rising/delayed 2 cycles,Rising/delayed 3 cycles,Falling/preceded 0.5 cycle,Falling/delayed 0.5 cycle,Falling/delayed 1.5 cycles,Falling/delayed 2.5 cycles" tree.end textline "" width 7. tree "YC-RGB Conversion Coefficient Registers" tree "YC-RGB Conversion Before Superpositioning" tree.end tree "YC-RGB Conversion After Superpositioning" tree.end tree.end sif cpu()=="R8A77470" width 13. endif width 0x0B tree.end tree.end tree.open "CMM" tree "CMM 0" base ad:0xFE600000 width 16. group.long 0x000++0x03 "LUT Control Register" line.long 0x00 "LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT Enable/Disable" "Disabled,Enabled" group.long 0x100++0x03 "CLU and Control Registers" line.long 0x00 "CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Manually,Automatically" bitfld.long 0x00 24. " MVS ,Max value stretch - calculation method select" "Method 0,Method 1" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable" "Disabled,Enabled" group.long 0x180++0x03 line.long 0x00 "CTL0,CMM Control Register 0" sif cpuis("R8A77960*")||(cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") bitfld.long 0x00 24. 0. " CLUDB ,CLU Double Buffer Mode" "All single,?,CLU single/LUT and HGO double,All double" bitfld.long 0x00 20. " HISTS ,Histogram selector - measure point select" "Before CLU,Before LUT" bitfld.long 0x00 16.--17. " TM1 ,YCbCr -> RGB format conversion expression (color format)" "BT.601 RGB[0 255] -> YCbCr[16 235/240],BT.601 RGB[0 255] -> YCbCr[0 255],BT.709 RGB[0 255] -> YCbCr[16 235/240],BT.709 RGB[16 235] -> YCbCr[16 235/240]" textline " " bitfld.long 0x00 12.--13. " TM0 ,RGB -> YCbCr format conversion expression (color format)" "BT.601 YCbCr[16 235/240] -> RGB[0 255],BT.601 YCbCr[0 255] -> RGB[0 255],BT.709 YCbCr[16 235/240] -> RGB[0 255],BT.709 YCbCr[16 235/240] -> RGB[16 235]" bitfld.long 0x00 8. " YC ,CMM processing format" "RGB,YCbCr" bitfld.long 0x00 4. " VPOL ,Polarity of VSYNC" "Negative edge,Positive edge" textline " " bitfld.long 0x00 0. " DBUF ,LUT/HGO Double buffer mode enable/disable" "Single buffer,Double buffer" elif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 20. " HISTS ,Histogram selector - measure point select" "Before CLU,Before LUT" bitfld.long 0x00 16.--17. " TM1 ,YCbCr -> RGB format conversion expression (color format)" "BT.601 RGB[0 255] -> YCbCr[16 235/240],BT.601 RGB[0 255] -> YCbCr[0 255],BT.709 RGB[0 255] -> YCbCr[16 235/240],BT.709 RGB[16 235] -> YCbCr[16 235/240]" bitfld.long 0x00 12.--13. " TM0 ,RGB -> YCbCr format conversion expression (color format)" "BT.601 YCbCr[16 235/240] -> RGB[0 255],BT.601 YCbCr[0 255] -> RGB[0 255],BT.709 YCbCr[16 235/240] -> RGB[0 255],BT.709 YCbCr[16 235/240] -> RGB[16 235]" textline " " bitfld.long 0x00 8. " YC ,CMM processing format" "RGB,YCbCr" bitfld.long 0x00 4. " VPOL ,Polarity of VSYNC" "Negative edge,Positive edge" bitfld.long 0x00 0. " DBUF ,LUT/HGO Double buffer mode enable/disable" "Single buffer,Double buffer" else bitfld.long 0x00 4. " VPOL ,Polarity of VSYNC" "Negative edge,Positive edge" bitfld.long 0x00 0. " DBUF ,LUT/HGO Double buffer mode enable/disable" "Single buffer,Double buffer" endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") if (((per.l(ad:0xFE600000+0x180))&0x01)==0x00) group.long 0x184++0x03 line.long 0x00 "CTL1,CMM Control Register 1" bitfld.long 0x00 0. " BFS ,Buffer side. This bit specifies reference plane of 1D-LUT and 3D-LUT" "LUT buffer A | CLU buffer A,?..." else group.long 0x184++0x03 line.long 0x00 "CTL1,CMM Control Register 1" bitfld.long 0x00 0. " BFS ,Buffer side. This bit specifies reference plane of 1D-LUT and 3D-LUT" "A-Hardware B-Software,B-Hardware A-Software" endif else group.long 0x184++0x03 line.long 0x00 "CTL1,CMM Control Register 1" bitfld.long 0x00 0. " BFS ,Buffer side. This bit specifies reference plane of 1D-LUT" "A-Hardware B-Software,B-Hardware A-Software" endif group.long 0x188++0x03 line.long 0x00 "CTL2,CMM Control Register 2" bitfld.long 0x00 0.--3. " VSCNT[3:0] ,Frame counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x200++0x0F "HGO Control Registers" line.long 0x00 "HGO_OFFSET,HGO Detection Window Offset Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HOFFSET[13:0] ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET[13:0] ,Vertical offset of histogram detection window" else hexmask.long.word 0x00 16.--28. 1. " HOFFSET[12:0] ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--12. 1. " VOFFSET[12:0] ,Vertical offset of histogram detection window" endif line.long 0x04 "HGO_SIZE,HGO Detection Window Size Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " HSIZE[13:0] ,Horizontal Size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE[13:0] ,Vertical size of histogram detection window" else hexmask.long.word 0x04 16.--28. 1. " HSIZE[12:0] ,Horizontal Size of histogram detection window" hexmask.long.word 0x04 0.--15. 1. " VSIZE[12:0] ,Vertical size of histogram detection window" endif line.long 0x08 "HGO_MODE,HGO Mode Register" bitfld.long 0x08 7. " MAXRGB ,Histogram source component setting" "3 colors indep.,Max of R/G/B" bitfld.long 0x08 6. " OFSB_R ,Offset binary mode for R component" "Straight binary,Offset binary" bitfld.long 0x08 5. " OFSB_G ,Offset binary mode for G component" "Straight binary,Offset binary" textline " " bitfld.long 0x08 4. " OFSB_B ,Offset binary mode for B component" "Straight binary,Offset binary" bitfld.long 0x08 2.--3. " HRATIO[1:0] ,Horizontal pixel skipping mode for histogram detection" "No skipping,1/2 skipping,1/4 skipping,?..." bitfld.long 0x08 0.--1. " VRATIO[1:0] ,Vertical pixel skipping mode for histogram detection" "No skipping,1/2 skipping,1/4 skipping,?..." line.long 0x0C "HGO_LB_TH,HGO LB Detection Threshold Register" hexmask.long.byte 0x0C 0.--7. 1. " BLACK_TH[7:0] ,Threshold for black level determination in letter box detection" group.long 0x210++0x07 line.long 0x00 "HGO_LB0_H,HGO Horizontal Position Register for LB Detection Zone-0" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HPOS_0[13:0] ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x00 0.--13. 1. " HPOS_1[13:0] ,Horizontal end position for letter box detection zone-0" else hexmask.long.word 0x00 16.--28. 1. " HPOS_0[12:0] ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x00 0.--12. 1. " HPOS_1[12:0] ,Horizontal end position for letter box detection zone-0" endif line.long 0x04 "HGO_LB0_V,HGO Vertical Position Register for LB detection zone-0" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " VPOS_0[13:0] ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x04 0.--13. 1. " VPOS_1[13:0] ,Vertical end position for letter box detection zone-0" else hexmask.long.word 0x04 16.--28. 1. " VPOS_0[12:0] ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x04 0.--12. 1. " VPOS_1[12:0] ,Vertical end position for letter box detection zone-0" endif group.long 0x218++0x07 line.long 0x00 "HGO_LB1_H,HGO Horizontal Position Register for LB Detection Zone-1" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HPOS_0[13:0] ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x00 0.--13. 1. " HPOS_1[13:0] ,Horizontal end position for letter box detection zone-1" else hexmask.long.word 0x00 16.--28. 1. " HPOS_0[12:0] ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x00 0.--12. 1. " HPOS_1[12:0] ,Horizontal end position for letter box detection zone-1" endif line.long 0x04 "HGO_LB1_V,HGO Vertical Position Register for LB detection zone-1" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " VPOS_0[13:0] ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x04 0.--13. 1. " VPOS_1[13:0] ,Vertical end position for letter box detection zone-1" else hexmask.long.word 0x04 16.--28. 1. " VPOS_0[12:0] ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x04 0.--12. 1. " VPOS_1[12:0] ,Vertical end position for letter box detection zone-1" endif group.long 0x220++0x07 line.long 0x00 "HGO_LB2_H,HGO Horizontal Position Register for LB Detection Zone-2" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HPOS_0[13:0] ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x00 0.--13. 1. " HPOS_1[13:0] ,Horizontal end position for letter box detection zone-2" else hexmask.long.word 0x00 16.--28. 1. " HPOS_0[12:0] ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x00 0.--12. 1. " HPOS_1[12:0] ,Horizontal end position for letter box detection zone-2" endif line.long 0x04 "HGO_LB2_V,HGO Vertical Position Register for LB detection zone-2" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " VPOS_0[13:0] ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x04 0.--13. 1. " VPOS_1[13:0] ,Vertical end position for letter box detection zone-2" else hexmask.long.word 0x04 16.--28. 1. " VPOS_0[12:0] ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x04 0.--12. 1. " VPOS_1[12:0] ,Vertical end position for letter box detection zone-2" endif group.long 0x228++0x07 line.long 0x00 "HGO_LB3_H,HGO Horizontal Position Register for LB Detection Zone-3" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HPOS_0[13:0] ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x00 0.--13. 1. " HPOS_1[13:0] ,Horizontal end position for letter box detection zone-3" else hexmask.long.word 0x00 16.--28. 1. " HPOS_0[12:0] ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x00 0.--12. 1. " HPOS_1[12:0] ,Horizontal end position for letter box detection zone-3" endif line.long 0x04 "HGO_LB3_V,HGO Vertical Position Register for LB detection zone-3" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " VPOS_0[13:0] ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x04 0.--13. 1. " VPOS_1[13:0] ,Vertical end position for letter box detection zone-3" else hexmask.long.word 0x04 16.--28. 1. " VPOS_0[12:0] ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x04 0.--12. 1. " VPOS_1[12:0] ,Vertical end position for letter box detection zone-3" endif sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*") wgroup.long 0x5FC++0x03 line.long 0x00 "HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Writing 1 to this bit resets all read-only HGO registers to their initial values" "No effect,Clear" endif tree "R Histogram" width 20. rgroup.long 0x230++0x03 line.long 0x00 "HGO_R_HISTO_0,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-0" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-0" endif rgroup.long 0x234++0x03 line.long 0x00 "HGO_R_HISTO_1,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-1" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-1" endif rgroup.long 0x238++0x03 line.long 0x00 "HGO_R_HISTO_2,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-2" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-2" endif rgroup.long 0x23C++0x03 line.long 0x00 "HGO_R_HISTO_3,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-3" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-3" endif rgroup.long 0x240++0x03 line.long 0x00 "HGO_R_HISTO_4,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-4" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-4" endif rgroup.long 0x244++0x03 line.long 0x00 "HGO_R_HISTO_5,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-5" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-5" endif rgroup.long 0x248++0x03 line.long 0x00 "HGO_R_HISTO_6,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-6" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-6" endif rgroup.long 0x24C++0x03 line.long 0x00 "HGO_R_HISTO_7,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-7" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-7" endif rgroup.long 0x250++0x03 line.long 0x00 "HGO_R_HISTO_8,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-8" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-8" endif rgroup.long 0x254++0x03 line.long 0x00 "HGO_R_HISTO_9,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-9" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-9" endif rgroup.long 0x258++0x03 line.long 0x00 "HGO_R_HISTO_10,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-10" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-10" endif rgroup.long 0x25C++0x03 line.long 0x00 "HGO_R_HISTO_11,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-11" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-11" endif rgroup.long 0x260++0x03 line.long 0x00 "HGO_R_HISTO_12,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-12" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-12" endif rgroup.long 0x264++0x03 line.long 0x00 "HGO_R_HISTO_13,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-13" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-13" endif rgroup.long 0x268++0x03 line.long 0x00 "HGO_R_HISTO_14,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-14" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-14" endif rgroup.long 0x26C++0x03 line.long 0x00 "HGO_R_HISTO_15,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-15" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-15" endif rgroup.long 0x270++0x03 line.long 0x00 "HGO_R_HISTO_16,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-16" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-16" endif rgroup.long 0x274++0x03 line.long 0x00 "HGO_R_HISTO_17,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-17" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-17" endif rgroup.long 0x278++0x03 line.long 0x00 "HGO_R_HISTO_18,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-18" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-18" endif rgroup.long 0x27C++0x03 line.long 0x00 "HGO_R_HISTO_19,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-19" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-19" endif rgroup.long 0x280++0x03 line.long 0x00 "HGO_R_HISTO_20,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-20" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-20" endif rgroup.long 0x284++0x03 line.long 0x00 "HGO_R_HISTO_21,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-21" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-21" endif rgroup.long 0x288++0x03 line.long 0x00 "HGO_R_HISTO_22,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-22" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-22" endif rgroup.long 0x28C++0x03 line.long 0x00 "HGO_R_HISTO_23,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-23" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-23" endif rgroup.long 0x290++0x03 line.long 0x00 "HGO_R_HISTO_24,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-24" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-24" endif rgroup.long 0x294++0x03 line.long 0x00 "HGO_R_HISTO_25,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-25" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-25" endif rgroup.long 0x298++0x03 line.long 0x00 "HGO_R_HISTO_26,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-26" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-26" endif rgroup.long 0x29C++0x03 line.long 0x00 "HGO_R_HISTO_27,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-27" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-27" endif rgroup.long 0x2A0++0x03 line.long 0x00 "HGO_R_HISTO_28,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-28" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-28" endif rgroup.long 0x2A4++0x03 line.long 0x00 "HGO_R_HISTO_29,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-29" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-29" endif rgroup.long 0x2A8++0x03 line.long 0x00 "HGO_R_HISTO_30,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-30" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-30" endif rgroup.long 0x2AC++0x03 line.long 0x00 "HGO_R_HISTO_31,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-31" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-31" endif rgroup.long 0x2B0++0x03 line.long 0x00 "HGO_R_HISTO_32,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-32" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-32" endif rgroup.long 0x2B4++0x03 line.long 0x00 "HGO_R_HISTO_33,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-33" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-33" endif rgroup.long 0x2B8++0x03 line.long 0x00 "HGO_R_HISTO_34,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-34" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-34" endif rgroup.long 0x2BC++0x03 line.long 0x00 "HGO_R_HISTO_35,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-35" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-35" endif rgroup.long 0x2C0++0x03 line.long 0x00 "HGO_R_HISTO_36,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-36" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-36" endif rgroup.long 0x2C4++0x03 line.long 0x00 "HGO_R_HISTO_37,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-37" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-37" endif rgroup.long 0x2C8++0x03 line.long 0x00 "HGO_R_HISTO_38,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-38" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-38" endif rgroup.long 0x2CC++0x03 line.long 0x00 "HGO_R_HISTO_39,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-39" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-39" endif rgroup.long 0x2D0++0x03 line.long 0x00 "HGO_R_HISTO_40,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-40" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-40" endif rgroup.long 0x2D4++0x03 line.long 0x00 "HGO_R_HISTO_41,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-41" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-41" endif rgroup.long 0x2D8++0x03 line.long 0x00 "HGO_R_HISTO_42,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-42" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-42" endif rgroup.long 0x2DC++0x03 line.long 0x00 "HGO_R_HISTO_43,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-43" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-43" endif rgroup.long 0x2E0++0x03 line.long 0x00 "HGO_R_HISTO_44,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-44" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-44" endif rgroup.long 0x2E4++0x03 line.long 0x00 "HGO_R_HISTO_45,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-45" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-45" endif rgroup.long 0x2E8++0x03 line.long 0x00 "HGO_R_HISTO_46,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-46" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-46" endif rgroup.long 0x2EC++0x03 line.long 0x00 "HGO_R_HISTO_47,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-47" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-47" endif rgroup.long 0x2F0++0x03 line.long 0x00 "HGO_R_HISTO_48,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-48" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-48" endif rgroup.long 0x2F4++0x03 line.long 0x00 "HGO_R_HISTO_49,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-49" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-49" endif rgroup.long 0x2F8++0x03 line.long 0x00 "HGO_R_HISTO_50,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-50" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-50" endif rgroup.long 0x2FC++0x03 line.long 0x00 "HGO_R_HISTO_51,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-51" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-51" endif rgroup.long 0x300++0x03 line.long 0x00 "HGO_R_HISTO_52,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-52" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-52" endif rgroup.long 0x304++0x03 line.long 0x00 "HGO_R_HISTO_53,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-53" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-53" endif rgroup.long 0x308++0x03 line.long 0x00 "HGO_R_HISTO_54,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-54" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-54" endif rgroup.long 0x30C++0x03 line.long 0x00 "HGO_R_HISTO_55,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-55" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-55" endif rgroup.long 0x310++0x03 line.long 0x00 "HGO_R_HISTO_56,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-56" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-56" endif rgroup.long 0x314++0x03 line.long 0x00 "HGO_R_HISTO_57,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-57" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-57" endif rgroup.long 0x318++0x03 line.long 0x00 "HGO_R_HISTO_58,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-58" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-58" endif rgroup.long 0x31C++0x03 line.long 0x00 "HGO_R_HISTO_59,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-59" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-59" endif rgroup.long 0x320++0x03 line.long 0x00 "HGO_R_HISTO_60,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-60" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-60" endif rgroup.long 0x324++0x03 line.long 0x00 "HGO_R_HISTO_61,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-61" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-61" endif rgroup.long 0x328++0x03 line.long 0x00 "HGO_R_HISTO_62,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-62" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-62" endif rgroup.long 0x32C++0x03 line.long 0x00 "HGO_R_HISTO_63,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-63" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-63" endif textline " " rgroup.long 0x330++0x0B line.long 0x00 "HGO_R_MAXMIN,HGO Component-R Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL[7:0] ,Maximum value of Component-R" hexmask.long.byte 0x00 0.--7. 1. " MINVAL[7:0] ,Minimum value of Component-R" line.long 0x04 "HGO_R_SUM,HGO Component-R Sum Register" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*") hexmask.long 0x04 0.--29. 1. " SUMVAL[29:0] ,Sum of Component-R" endif line.long 0x08 "HGO_R_LB_DET,HGO Component-R LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX_1 ,Letter box detection result #1 of zone-0/1 for component-R" "Exceeded,Not exceeded" bitfld.long 0x08 1. " LTRBOX_2 ,Letter box detection result #2 of zone-0/1 for component-R" "Exceeded,Not exceeded" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-R" "Exceeded,Not exceeded" tree.end tree "G Histogram" width 20. rgroup.long 0x340++0x03 line.long 0x00 "HGO_G_HISTO_0,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-0" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-0" endif rgroup.long 0x344++0x03 line.long 0x00 "HGO_G_HISTO_1,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-1" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-1" endif rgroup.long 0x348++0x03 line.long 0x00 "HGO_G_HISTO_2,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-2" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-2" endif rgroup.long 0x34C++0x03 line.long 0x00 "HGO_G_HISTO_3,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-3" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-3" endif rgroup.long 0x350++0x03 line.long 0x00 "HGO_G_HISTO_4,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-4" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-4" endif rgroup.long 0x354++0x03 line.long 0x00 "HGO_G_HISTO_5,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-5" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-5" endif rgroup.long 0x358++0x03 line.long 0x00 "HGO_G_HISTO_6,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-6" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-6" endif rgroup.long 0x35C++0x03 line.long 0x00 "HGO_G_HISTO_7,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-7" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-7" endif rgroup.long 0x360++0x03 line.long 0x00 "HGO_G_HISTO_8,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-8" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-8" endif rgroup.long 0x364++0x03 line.long 0x00 "HGO_G_HISTO_9,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-9" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-9" endif rgroup.long 0x368++0x03 line.long 0x00 "HGO_G_HISTO_10,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-10" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-10" endif rgroup.long 0x36C++0x03 line.long 0x00 "HGO_G_HISTO_11,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-11" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-11" endif rgroup.long 0x370++0x03 line.long 0x00 "HGO_G_HISTO_12,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-12" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-12" endif rgroup.long 0x374++0x03 line.long 0x00 "HGO_G_HISTO_13,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-13" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-13" endif rgroup.long 0x378++0x03 line.long 0x00 "HGO_G_HISTO_14,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-14" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-14" endif rgroup.long 0x37C++0x03 line.long 0x00 "HGO_G_HISTO_15,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-15" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-15" endif rgroup.long 0x380++0x03 line.long 0x00 "HGO_G_HISTO_16,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-16" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-16" endif rgroup.long 0x384++0x03 line.long 0x00 "HGO_G_HISTO_17,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-17" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-17" endif rgroup.long 0x388++0x03 line.long 0x00 "HGO_G_HISTO_18,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-18" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-18" endif rgroup.long 0x38C++0x03 line.long 0x00 "HGO_G_HISTO_19,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-19" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-19" endif rgroup.long 0x390++0x03 line.long 0x00 "HGO_G_HISTO_20,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-20" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-20" endif rgroup.long 0x394++0x03 line.long 0x00 "HGO_G_HISTO_21,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-21" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-21" endif rgroup.long 0x398++0x03 line.long 0x00 "HGO_G_HISTO_22,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-22" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-22" endif rgroup.long 0x39C++0x03 line.long 0x00 "HGO_G_HISTO_23,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-23" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-23" endif rgroup.long 0x3A0++0x03 line.long 0x00 "HGO_G_HISTO_24,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-24" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-24" endif rgroup.long 0x3A4++0x03 line.long 0x00 "HGO_G_HISTO_25,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-25" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-25" endif rgroup.long 0x3A8++0x03 line.long 0x00 "HGO_G_HISTO_26,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-26" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-26" endif rgroup.long 0x3AC++0x03 line.long 0x00 "HGO_G_HISTO_27,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-27" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-27" endif rgroup.long 0x3B0++0x03 line.long 0x00 "HGO_G_HISTO_28,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-28" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-28" endif rgroup.long 0x3B4++0x03 line.long 0x00 "HGO_G_HISTO_29,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-29" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-29" endif rgroup.long 0x3B8++0x03 line.long 0x00 "HGO_G_HISTO_30,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-30" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-30" endif rgroup.long 0x3BC++0x03 line.long 0x00 "HGO_G_HISTO_31,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-31" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-31" endif rgroup.long 0x3C0++0x03 line.long 0x00 "HGO_G_HISTO_32,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-32" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-32" endif rgroup.long 0x3C4++0x03 line.long 0x00 "HGO_G_HISTO_33,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-33" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-33" endif rgroup.long 0x3C8++0x03 line.long 0x00 "HGO_G_HISTO_34,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-34" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-34" endif rgroup.long 0x3CC++0x03 line.long 0x00 "HGO_G_HISTO_35,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-35" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-35" endif rgroup.long 0x3D0++0x03 line.long 0x00 "HGO_G_HISTO_36,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-36" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-36" endif rgroup.long 0x3D4++0x03 line.long 0x00 "HGO_G_HISTO_37,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-37" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-37" endif rgroup.long 0x3D8++0x03 line.long 0x00 "HGO_G_HISTO_38,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-38" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-38" endif rgroup.long 0x3DC++0x03 line.long 0x00 "HGO_G_HISTO_39,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-39" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-39" endif rgroup.long 0x3E0++0x03 line.long 0x00 "HGO_G_HISTO_40,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-40" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-40" endif rgroup.long 0x3E4++0x03 line.long 0x00 "HGO_G_HISTO_41,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-41" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-41" endif rgroup.long 0x3E8++0x03 line.long 0x00 "HGO_G_HISTO_42,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-42" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-42" endif rgroup.long 0x3EC++0x03 line.long 0x00 "HGO_G_HISTO_43,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-43" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-43" endif rgroup.long 0x3F0++0x03 line.long 0x00 "HGO_G_HISTO_44,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-44" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-44" endif rgroup.long 0x3F4++0x03 line.long 0x00 "HGO_G_HISTO_45,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-45" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-45" endif rgroup.long 0x3F8++0x03 line.long 0x00 "HGO_G_HISTO_46,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-46" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-46" endif rgroup.long 0x3FC++0x03 line.long 0x00 "HGO_G_HISTO_47,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-47" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-47" endif rgroup.long 0x400++0x03 line.long 0x00 "HGO_G_HISTO_48,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-48" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-48" endif rgroup.long 0x404++0x03 line.long 0x00 "HGO_G_HISTO_49,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-49" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-49" endif rgroup.long 0x408++0x03 line.long 0x00 "HGO_G_HISTO_50,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-50" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-50" endif rgroup.long 0x40C++0x03 line.long 0x00 "HGO_G_HISTO_51,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-51" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-51" endif rgroup.long 0x410++0x03 line.long 0x00 "HGO_G_HISTO_52,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-52" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-52" endif rgroup.long 0x414++0x03 line.long 0x00 "HGO_G_HISTO_53,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-53" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-53" endif rgroup.long 0x418++0x03 line.long 0x00 "HGO_G_HISTO_54,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-54" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-54" endif rgroup.long 0x41C++0x03 line.long 0x00 "HGO_G_HISTO_55,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-55" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-55" endif rgroup.long 0x420++0x03 line.long 0x00 "HGO_G_HISTO_56,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-56" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-56" endif rgroup.long 0x424++0x03 line.long 0x00 "HGO_G_HISTO_57,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-57" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-57" endif rgroup.long 0x428++0x03 line.long 0x00 "HGO_G_HISTO_58,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-58" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-58" endif rgroup.long 0x42C++0x03 line.long 0x00 "HGO_G_HISTO_59,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-59" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-59" endif rgroup.long 0x430++0x03 line.long 0x00 "HGO_G_HISTO_60,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-60" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-60" endif rgroup.long 0x434++0x03 line.long 0x00 "HGO_G_HISTO_61,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-61" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-61" endif rgroup.long 0x438++0x03 line.long 0x00 "HGO_G_HISTO_62,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-62" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-62" endif rgroup.long 0x43C++0x03 line.long 0x00 "HGO_G_HISTO_63,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-63" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-63" endif textline " " rgroup.long 0x440++0x0B line.long 0x00 "HGO_G_MAXMIN,HGO Component-G Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL[7:0] ,Maximum value of component-G" hexmask.long.byte 0x00 0.--7. 1. " MINVAL[7:0] ,Minimum value of component-G" line.long 0x04 "HGO_G_SUM,HGO Component-G SumRegister" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*") hexmask.long 0x04 0.--29. 1. " SUMVAL[29:0] ,Sum of component-G" endif line.long 0x08 "HGO_G_LB_DET,HGO Component-G LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX_1 ,Letter box detection result g1 of zone-0/1 for component-G" "Exceeded,Not exceeded" bitfld.long 0x08 1. " LTRBOX_2 ,Letter box detection result g2 of zone-0/1 for component-G" "Exceeded,Not exceeded" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-G" "Exceeded,Not exceeded" tree.end tree "B Histogram" width 20. rgroup.long 0x450++0x03 line.long 0x00 "HGO_B_HISTO_0,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-0" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-0" endif rgroup.long 0x454++0x03 line.long 0x00 "HGO_B_HISTO_1,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-1" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-1" endif rgroup.long 0x458++0x03 line.long 0x00 "HGO_B_HISTO_2,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-2" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-2" endif rgroup.long 0x45C++0x03 line.long 0x00 "HGO_B_HISTO_3,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-3" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-3" endif rgroup.long 0x460++0x03 line.long 0x00 "HGO_B_HISTO_4,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-4" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-4" endif rgroup.long 0x464++0x03 line.long 0x00 "HGO_B_HISTO_5,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-5" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-5" endif rgroup.long 0x468++0x03 line.long 0x00 "HGO_B_HISTO_6,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-6" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-6" endif rgroup.long 0x46C++0x03 line.long 0x00 "HGO_B_HISTO_7,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-7" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-7" endif rgroup.long 0x470++0x03 line.long 0x00 "HGO_B_HISTO_8,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-8" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-8" endif rgroup.long 0x474++0x03 line.long 0x00 "HGO_B_HISTO_9,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-9" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-9" endif rgroup.long 0x478++0x03 line.long 0x00 "HGO_B_HISTO_10,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-10" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-10" endif rgroup.long 0x47C++0x03 line.long 0x00 "HGO_B_HISTO_11,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-11" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-11" endif rgroup.long 0x480++0x03 line.long 0x00 "HGO_B_HISTO_12,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-12" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-12" endif rgroup.long 0x484++0x03 line.long 0x00 "HGO_B_HISTO_13,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-13" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-13" endif rgroup.long 0x488++0x03 line.long 0x00 "HGO_B_HISTO_14,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-14" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-14" endif rgroup.long 0x48C++0x03 line.long 0x00 "HGO_B_HISTO_15,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-15" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-15" endif rgroup.long 0x490++0x03 line.long 0x00 "HGO_B_HISTO_16,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-16" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-16" endif rgroup.long 0x494++0x03 line.long 0x00 "HGO_B_HISTO_17,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-17" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-17" endif rgroup.long 0x498++0x03 line.long 0x00 "HGO_B_HISTO_18,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-18" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-18" endif rgroup.long 0x49C++0x03 line.long 0x00 "HGO_B_HISTO_19,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-19" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-19" endif rgroup.long 0x4A0++0x03 line.long 0x00 "HGO_B_HISTO_20,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-20" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-20" endif rgroup.long 0x4A4++0x03 line.long 0x00 "HGO_B_HISTO_21,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-21" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-21" endif rgroup.long 0x4A8++0x03 line.long 0x00 "HGO_B_HISTO_22,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-22" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-22" endif rgroup.long 0x4AC++0x03 line.long 0x00 "HGO_B_HISTO_23,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-23" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-23" endif rgroup.long 0x4B0++0x03 line.long 0x00 "HGO_B_HISTO_24,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-24" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-24" endif rgroup.long 0x4B4++0x03 line.long 0x00 "HGO_B_HISTO_25,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-25" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-25" endif rgroup.long 0x4B8++0x03 line.long 0x00 "HGO_B_HISTO_26,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-26" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-26" endif rgroup.long 0x4BC++0x03 line.long 0x00 "HGO_B_HISTO_27,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-27" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-27" endif rgroup.long 0x4C0++0x03 line.long 0x00 "HGO_B_HISTO_28,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-28" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-28" endif rgroup.long 0x4C4++0x03 line.long 0x00 "HGO_B_HISTO_29,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-29" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-29" endif rgroup.long 0x4C8++0x03 line.long 0x00 "HGO_B_HISTO_30,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-30" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-30" endif rgroup.long 0x4CC++0x03 line.long 0x00 "HGO_B_HISTO_31,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-31" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-31" endif rgroup.long 0x4D0++0x03 line.long 0x00 "HGO_B_HISTO_32,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-32" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-32" endif rgroup.long 0x4D4++0x03 line.long 0x00 "HGO_B_HISTO_33,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-33" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-33" endif rgroup.long 0x4D8++0x03 line.long 0x00 "HGO_B_HISTO_34,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-34" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-34" endif rgroup.long 0x4DC++0x03 line.long 0x00 "HGO_B_HISTO_35,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-35" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-35" endif rgroup.long 0x4E0++0x03 line.long 0x00 "HGO_B_HISTO_36,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-36" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-36" endif rgroup.long 0x4E4++0x03 line.long 0x00 "HGO_B_HISTO_37,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-37" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-37" endif rgroup.long 0x4E8++0x03 line.long 0x00 "HGO_B_HISTO_38,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-38" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-38" endif rgroup.long 0x4EC++0x03 line.long 0x00 "HGO_B_HISTO_39,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-39" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-39" endif rgroup.long 0x4F0++0x03 line.long 0x00 "HGO_B_HISTO_40,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-40" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-40" endif rgroup.long 0x4F4++0x03 line.long 0x00 "HGO_B_HISTO_41,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-41" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-41" endif rgroup.long 0x4F8++0x03 line.long 0x00 "HGO_B_HISTO_42,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-42" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-42" endif rgroup.long 0x4FC++0x03 line.long 0x00 "HGO_B_HISTO_43,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-43" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-43" endif rgroup.long 0x500++0x03 line.long 0x00 "HGO_B_HISTO_44,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-44" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-44" endif rgroup.long 0x504++0x03 line.long 0x00 "HGO_B_HISTO_45,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-45" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-45" endif rgroup.long 0x508++0x03 line.long 0x00 "HGO_B_HISTO_46,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-46" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-46" endif rgroup.long 0x50C++0x03 line.long 0x00 "HGO_B_HISTO_47,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-47" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-47" endif rgroup.long 0x510++0x03 line.long 0x00 "HGO_B_HISTO_48,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-48" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-48" endif rgroup.long 0x514++0x03 line.long 0x00 "HGO_B_HISTO_49,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-49" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-49" endif rgroup.long 0x518++0x03 line.long 0x00 "HGO_B_HISTO_50,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-50" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-50" endif rgroup.long 0x51C++0x03 line.long 0x00 "HGO_B_HISTO_51,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-51" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-51" endif rgroup.long 0x520++0x03 line.long 0x00 "HGO_B_HISTO_52,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-52" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-52" endif rgroup.long 0x524++0x03 line.long 0x00 "HGO_B_HISTO_53,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-53" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-53" endif rgroup.long 0x528++0x03 line.long 0x00 "HGO_B_HISTO_54,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-54" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-54" endif rgroup.long 0x52C++0x03 line.long 0x00 "HGO_B_HISTO_55,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-55" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-55" endif rgroup.long 0x530++0x03 line.long 0x00 "HGO_B_HISTO_56,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-56" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-56" endif rgroup.long 0x534++0x03 line.long 0x00 "HGO_B_HISTO_57,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-57" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-57" endif rgroup.long 0x538++0x03 line.long 0x00 "HGO_B_HISTO_58,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-58" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-58" endif rgroup.long 0x53C++0x03 line.long 0x00 "HGO_B_HISTO_59,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-59" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-59" endif rgroup.long 0x540++0x03 line.long 0x00 "HGO_B_HISTO_60,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-60" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-60" endif rgroup.long 0x544++0x03 line.long 0x00 "HGO_B_HISTO_61,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-61" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-61" endif rgroup.long 0x548++0x03 line.long 0x00 "HGO_B_HISTO_62,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-62" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-62" endif rgroup.long 0x54C++0x03 line.long 0x00 "HGO_B_HISTO_63,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-63" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-63" endif textline " " rgroup.long 0x550++0x0B line.long 0x00 "HGO_B_MAXMIN,HGO Component-B Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL[7:0] ,Maximum value of component-B" hexmask.long.byte 0x00 0.--7. 1. " MINVAL[7:0] ,Minimum value of component-B" line.long 0x04 "HGO_B_SUM,HGO Component-B SumRegister" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*") hexmask.long 0x04 0.--29. 1. " SUMVAL[29:0] ,Sum of component-B" endif line.long 0x08 "HGO_B_LB_DET,HGO Component-B LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX_1 ,Letter box detection result b1 of zone-0/1 for component-B" "Exceeded,Not exceeded" bitfld.long 0x08 1. " LTRBOX_2 ,Letter box detection result b2 of zone-0/1 for component-B" "Exceeded,Not exceeded" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-B" "Exceeded,Not exceeded" tree.end textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") wgroup.long 0x5FC++0x03 line.long 0x00 "HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Reset all read-only HGO registers to their initial values" "No effect,Clear" endif sif !cpuis("R8J7795*") tree.open "LUT space" width 14. hgroup.long 0xA00++0x07 hide.long 0x00 "CLU_ADDR1,CLU Table Address Register" hide.long 0x04 "CLU_DATA1,CLU Table DATA Register" hgroup.long 0xF00++0x07 hide.long 0x00 "CLU_ADDR2,CLU Table Address Register" hide.long 0x04 "CLU_DATA2,CLU Table DATA Register" tree "1D-LUT Table A-Side (Entries 0 - 256)" width 11. if (((per.l(ad:0xFE600000+0x000)&0x1))==0x01) rgroup.long 0x600++0x3 line.long 0x00 "ENTRY_0,LUT Table A-Side Entry 0" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x604++0x3 line.long 0x00 "ENTRY_1,LUT Table A-Side Entry 1" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x608++0x3 line.long 0x00 "ENTRY_2,LUT Table A-Side Entry 2" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x60C++0x3 line.long 0x00 "ENTRY_3,LUT Table A-Side Entry 3" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x610++0x3 line.long 0x00 "ENTRY_4,LUT Table A-Side Entry 4" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x614++0x3 line.long 0x00 "ENTRY_5,LUT Table A-Side Entry 5" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x618++0x3 line.long 0x00 "ENTRY_6,LUT Table A-Side Entry 6" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x61C++0x3 line.long 0x00 "ENTRY_7,LUT Table A-Side Entry 7" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x620++0x3 line.long 0x00 "ENTRY_8,LUT Table A-Side Entry 8" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x624++0x3 line.long 0x00 "ENTRY_9,LUT Table A-Side Entry 9" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x628++0x3 line.long 0x00 "ENTRY_10,LUT Table A-Side Entry 10" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x62C++0x3 line.long 0x00 "ENTRY_11,LUT Table A-Side Entry 11" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x630++0x3 line.long 0x00 "ENTRY_12,LUT Table A-Side Entry 12" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x634++0x3 line.long 0x00 "ENTRY_13,LUT Table A-Side Entry 13" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x638++0x3 line.long 0x00 "ENTRY_14,LUT Table A-Side Entry 14" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x63C++0x3 line.long 0x00 "ENTRY_15,LUT Table A-Side Entry 15" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x640++0x3 line.long 0x00 "ENTRY_16,LUT Table A-Side Entry 16" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x644++0x3 line.long 0x00 "ENTRY_17,LUT Table A-Side Entry 17" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x648++0x3 line.long 0x00 "ENTRY_18,LUT Table A-Side Entry 18" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x64C++0x3 line.long 0x00 "ENTRY_19,LUT Table A-Side Entry 19" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x650++0x3 line.long 0x00 "ENTRY_20,LUT Table A-Side Entry 20" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x654++0x3 line.long 0x00 "ENTRY_21,LUT Table A-Side Entry 21" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x658++0x3 line.long 0x00 "ENTRY_22,LUT Table A-Side Entry 22" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x65C++0x3 line.long 0x00 "ENTRY_23,LUT Table A-Side Entry 23" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x660++0x3 line.long 0x00 "ENTRY_24,LUT Table A-Side Entry 24" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x664++0x3 line.long 0x00 "ENTRY_25,LUT Table A-Side Entry 25" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x668++0x3 line.long 0x00 "ENTRY_26,LUT Table A-Side Entry 26" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x66C++0x3 line.long 0x00 "ENTRY_27,LUT Table A-Side Entry 27" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x670++0x3 line.long 0x00 "ENTRY_28,LUT Table A-Side Entry 28" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x674++0x3 line.long 0x00 "ENTRY_29,LUT Table A-Side Entry 29" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x678++0x3 line.long 0x00 "ENTRY_30,LUT Table A-Side Entry 30" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x67C++0x3 line.long 0x00 "ENTRY_31,LUT Table A-Side Entry 31" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x680++0x3 line.long 0x00 "ENTRY_32,LUT Table A-Side Entry 32" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x684++0x3 line.long 0x00 "ENTRY_33,LUT Table A-Side Entry 33" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x688++0x3 line.long 0x00 "ENTRY_34,LUT Table A-Side Entry 34" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x68C++0x3 line.long 0x00 "ENTRY_35,LUT Table A-Side Entry 35" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x690++0x3 line.long 0x00 "ENTRY_36,LUT Table A-Side Entry 36" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x694++0x3 line.long 0x00 "ENTRY_37,LUT Table A-Side Entry 37" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x698++0x3 line.long 0x00 "ENTRY_38,LUT Table A-Side Entry 38" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x69C++0x3 line.long 0x00 "ENTRY_39,LUT Table A-Side Entry 39" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6A0++0x3 line.long 0x00 "ENTRY_40,LUT Table A-Side Entry 40" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6A4++0x3 line.long 0x00 "ENTRY_41,LUT Table A-Side Entry 41" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6A8++0x3 line.long 0x00 "ENTRY_42,LUT Table A-Side Entry 42" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6AC++0x3 line.long 0x00 "ENTRY_43,LUT Table A-Side Entry 43" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6B0++0x3 line.long 0x00 "ENTRY_44,LUT Table A-Side Entry 44" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6B4++0x3 line.long 0x00 "ENTRY_45,LUT Table A-Side Entry 45" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6B8++0x3 line.long 0x00 "ENTRY_46,LUT Table A-Side Entry 46" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6BC++0x3 line.long 0x00 "ENTRY_47,LUT Table A-Side Entry 47" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6C0++0x3 line.long 0x00 "ENTRY_48,LUT Table A-Side Entry 48" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6C4++0x3 line.long 0x00 "ENTRY_49,LUT Table A-Side Entry 49" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6C8++0x3 line.long 0x00 "ENTRY_50,LUT Table A-Side Entry 50" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6CC++0x3 line.long 0x00 "ENTRY_51,LUT Table A-Side Entry 51" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6D0++0x3 line.long 0x00 "ENTRY_52,LUT Table A-Side Entry 52" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6D4++0x3 line.long 0x00 "ENTRY_53,LUT Table A-Side Entry 53" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6D8++0x3 line.long 0x00 "ENTRY_54,LUT Table A-Side Entry 54" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6DC++0x3 line.long 0x00 "ENTRY_55,LUT Table A-Side Entry 55" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6E0++0x3 line.long 0x00 "ENTRY_56,LUT Table A-Side Entry 56" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6E4++0x3 line.long 0x00 "ENTRY_57,LUT Table A-Side Entry 57" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6E8++0x3 line.long 0x00 "ENTRY_58,LUT Table A-Side Entry 58" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6EC++0x3 line.long 0x00 "ENTRY_59,LUT Table A-Side Entry 59" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6F0++0x3 line.long 0x00 "ENTRY_60,LUT Table A-Side Entry 60" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6F4++0x3 line.long 0x00 "ENTRY_61,LUT Table A-Side Entry 61" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6F8++0x3 line.long 0x00 "ENTRY_62,LUT Table A-Side Entry 62" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6FC++0x3 line.long 0x00 "ENTRY_63,LUT Table A-Side Entry 63" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x700++0x3 line.long 0x00 "ENTRY_64,LUT Table A-Side Entry 64" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x704++0x3 line.long 0x00 "ENTRY_65,LUT Table A-Side Entry 65" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x708++0x3 line.long 0x00 "ENTRY_66,LUT Table A-Side Entry 66" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x70C++0x3 line.long 0x00 "ENTRY_67,LUT Table A-Side Entry 67" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x710++0x3 line.long 0x00 "ENTRY_68,LUT Table A-Side Entry 68" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x714++0x3 line.long 0x00 "ENTRY_69,LUT Table A-Side Entry 69" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x718++0x3 line.long 0x00 "ENTRY_70,LUT Table A-Side Entry 70" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x71C++0x3 line.long 0x00 "ENTRY_71,LUT Table A-Side Entry 71" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x720++0x3 line.long 0x00 "ENTRY_72,LUT Table A-Side Entry 72" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x724++0x3 line.long 0x00 "ENTRY_73,LUT Table A-Side Entry 73" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x728++0x3 line.long 0x00 "ENTRY_74,LUT Table A-Side Entry 74" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x72C++0x3 line.long 0x00 "ENTRY_75,LUT Table A-Side Entry 75" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x730++0x3 line.long 0x00 "ENTRY_76,LUT Table A-Side Entry 76" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x734++0x3 line.long 0x00 "ENTRY_77,LUT Table A-Side Entry 77" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x738++0x3 line.long 0x00 "ENTRY_78,LUT Table A-Side Entry 78" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x73C++0x3 line.long 0x00 "ENTRY_79,LUT Table A-Side Entry 79" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x740++0x3 line.long 0x00 "ENTRY_80,LUT Table A-Side Entry 80" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x744++0x3 line.long 0x00 "ENTRY_81,LUT Table A-Side Entry 81" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x748++0x3 line.long 0x00 "ENTRY_82,LUT Table A-Side Entry 82" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x74C++0x3 line.long 0x00 "ENTRY_83,LUT Table A-Side Entry 83" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x750++0x3 line.long 0x00 "ENTRY_84,LUT Table A-Side Entry 84" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x754++0x3 line.long 0x00 "ENTRY_85,LUT Table A-Side Entry 85" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x758++0x3 line.long 0x00 "ENTRY_86,LUT Table A-Side Entry 86" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x75C++0x3 line.long 0x00 "ENTRY_87,LUT Table A-Side Entry 87" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x760++0x3 line.long 0x00 "ENTRY_88,LUT Table A-Side Entry 88" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x764++0x3 line.long 0x00 "ENTRY_89,LUT Table A-Side Entry 89" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x768++0x3 line.long 0x00 "ENTRY_90,LUT Table A-Side Entry 90" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x76C++0x3 line.long 0x00 "ENTRY_91,LUT Table A-Side Entry 91" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x770++0x3 line.long 0x00 "ENTRY_92,LUT Table A-Side Entry 92" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x774++0x3 line.long 0x00 "ENTRY_93,LUT Table A-Side Entry 93" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x778++0x3 line.long 0x00 "ENTRY_94,LUT Table A-Side Entry 94" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x77C++0x3 line.long 0x00 "ENTRY_95,LUT Table A-Side Entry 95" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x780++0x3 line.long 0x00 "ENTRY_96,LUT Table A-Side Entry 96" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x784++0x3 line.long 0x00 "ENTRY_97,LUT Table A-Side Entry 97" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x788++0x3 line.long 0x00 "ENTRY_98,LUT Table A-Side Entry 98" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x78C++0x3 line.long 0x00 "ENTRY_99,LUT Table A-Side Entry 99" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x790++0x3 line.long 0x00 "ENTRY_100,LUT Table A-Side Entry 100" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x794++0x3 line.long 0x00 "ENTRY_101,LUT Table A-Side Entry 101" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x798++0x3 line.long 0x00 "ENTRY_102,LUT Table A-Side Entry 102" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x79C++0x3 line.long 0x00 "ENTRY_103,LUT Table A-Side Entry 103" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7A0++0x3 line.long 0x00 "ENTRY_104,LUT Table A-Side Entry 104" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7A4++0x3 line.long 0x00 "ENTRY_105,LUT Table A-Side Entry 105" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7A8++0x3 line.long 0x00 "ENTRY_106,LUT Table A-Side Entry 106" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7AC++0x3 line.long 0x00 "ENTRY_107,LUT Table A-Side Entry 107" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7B0++0x3 line.long 0x00 "ENTRY_108,LUT Table A-Side Entry 108" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7B4++0x3 line.long 0x00 "ENTRY_109,LUT Table A-Side Entry 109" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7B8++0x3 line.long 0x00 "ENTRY_110,LUT Table A-Side Entry 110" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7BC++0x3 line.long 0x00 "ENTRY_111,LUT Table A-Side Entry 111" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7C0++0x3 line.long 0x00 "ENTRY_112,LUT Table A-Side Entry 112" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7C4++0x3 line.long 0x00 "ENTRY_113,LUT Table A-Side Entry 113" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7C8++0x3 line.long 0x00 "ENTRY_114,LUT Table A-Side Entry 114" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7CC++0x3 line.long 0x00 "ENTRY_115,LUT Table A-Side Entry 115" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7D0++0x3 line.long 0x00 "ENTRY_116,LUT Table A-Side Entry 116" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7D4++0x3 line.long 0x00 "ENTRY_117,LUT Table A-Side Entry 117" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7D8++0x3 line.long 0x00 "ENTRY_118,LUT Table A-Side Entry 118" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7DC++0x3 line.long 0x00 "ENTRY_119,LUT Table A-Side Entry 119" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7E0++0x3 line.long 0x00 "ENTRY_120,LUT Table A-Side Entry 120" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7E4++0x3 line.long 0x00 "ENTRY_121,LUT Table A-Side Entry 121" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7E8++0x3 line.long 0x00 "ENTRY_122,LUT Table A-Side Entry 122" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7EC++0x3 line.long 0x00 "ENTRY_123,LUT Table A-Side Entry 123" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7F0++0x3 line.long 0x00 "ENTRY_124,LUT Table A-Side Entry 124" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7F4++0x3 line.long 0x00 "ENTRY_125,LUT Table A-Side Entry 125" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7F8++0x3 line.long 0x00 "ENTRY_126,LUT Table A-Side Entry 126" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7FC++0x3 line.long 0x00 "ENTRY_127,LUT Table A-Side Entry 127" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x800++0x3 line.long 0x00 "ENTRY_128,LUT Table A-Side Entry 128" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x804++0x3 line.long 0x00 "ENTRY_129,LUT Table A-Side Entry 129" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x808++0x3 line.long 0x00 "ENTRY_130,LUT Table A-Side Entry 130" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x80C++0x3 line.long 0x00 "ENTRY_131,LUT Table A-Side Entry 131" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x810++0x3 line.long 0x00 "ENTRY_132,LUT Table A-Side Entry 132" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x814++0x3 line.long 0x00 "ENTRY_133,LUT Table A-Side Entry 133" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x818++0x3 line.long 0x00 "ENTRY_134,LUT Table A-Side Entry 134" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x81C++0x3 line.long 0x00 "ENTRY_135,LUT Table A-Side Entry 135" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x820++0x3 line.long 0x00 "ENTRY_136,LUT Table A-Side Entry 136" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x824++0x3 line.long 0x00 "ENTRY_137,LUT Table A-Side Entry 137" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x828++0x3 line.long 0x00 "ENTRY_138,LUT Table A-Side Entry 138" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x82C++0x3 line.long 0x00 "ENTRY_139,LUT Table A-Side Entry 139" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x830++0x3 line.long 0x00 "ENTRY_140,LUT Table A-Side Entry 140" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x834++0x3 line.long 0x00 "ENTRY_141,LUT Table A-Side Entry 141" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x838++0x3 line.long 0x00 "ENTRY_142,LUT Table A-Side Entry 142" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x83C++0x3 line.long 0x00 "ENTRY_143,LUT Table A-Side Entry 143" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x840++0x3 line.long 0x00 "ENTRY_144,LUT Table A-Side Entry 144" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x844++0x3 line.long 0x00 "ENTRY_145,LUT Table A-Side Entry 145" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x848++0x3 line.long 0x00 "ENTRY_146,LUT Table A-Side Entry 146" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x84C++0x3 line.long 0x00 "ENTRY_147,LUT Table A-Side Entry 147" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x850++0x3 line.long 0x00 "ENTRY_148,LUT Table A-Side Entry 148" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x854++0x3 line.long 0x00 "ENTRY_149,LUT Table A-Side Entry 149" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x858++0x3 line.long 0x00 "ENTRY_150,LUT Table A-Side Entry 150" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x85C++0x3 line.long 0x00 "ENTRY_151,LUT Table A-Side Entry 151" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x860++0x3 line.long 0x00 "ENTRY_152,LUT Table A-Side Entry 152" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x864++0x3 line.long 0x00 "ENTRY_153,LUT Table A-Side Entry 153" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x868++0x3 line.long 0x00 "ENTRY_154,LUT Table A-Side Entry 154" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x86C++0x3 line.long 0x00 "ENTRY_155,LUT Table A-Side Entry 155" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x870++0x3 line.long 0x00 "ENTRY_156,LUT Table A-Side Entry 156" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x874++0x3 line.long 0x00 "ENTRY_157,LUT Table A-Side Entry 157" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x878++0x3 line.long 0x00 "ENTRY_158,LUT Table A-Side Entry 158" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x87C++0x3 line.long 0x00 "ENTRY_159,LUT Table A-Side Entry 159" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x880++0x3 line.long 0x00 "ENTRY_160,LUT Table A-Side Entry 160" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x884++0x3 line.long 0x00 "ENTRY_161,LUT Table A-Side Entry 161" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x888++0x3 line.long 0x00 "ENTRY_162,LUT Table A-Side Entry 162" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x88C++0x3 line.long 0x00 "ENTRY_163,LUT Table A-Side Entry 163" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x890++0x3 line.long 0x00 "ENTRY_164,LUT Table A-Side Entry 164" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x894++0x3 line.long 0x00 "ENTRY_165,LUT Table A-Side Entry 165" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x898++0x3 line.long 0x00 "ENTRY_166,LUT Table A-Side Entry 166" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x89C++0x3 line.long 0x00 "ENTRY_167,LUT Table A-Side Entry 167" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8A0++0x3 line.long 0x00 "ENTRY_168,LUT Table A-Side Entry 168" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8A4++0x3 line.long 0x00 "ENTRY_169,LUT Table A-Side Entry 169" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8A8++0x3 line.long 0x00 "ENTRY_170,LUT Table A-Side Entry 170" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8AC++0x3 line.long 0x00 "ENTRY_171,LUT Table A-Side Entry 171" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8B0++0x3 line.long 0x00 "ENTRY_172,LUT Table A-Side Entry 172" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8B4++0x3 line.long 0x00 "ENTRY_173,LUT Table A-Side Entry 173" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8B8++0x3 line.long 0x00 "ENTRY_174,LUT Table A-Side Entry 174" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8BC++0x3 line.long 0x00 "ENTRY_175,LUT Table A-Side Entry 175" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8C0++0x3 line.long 0x00 "ENTRY_176,LUT Table A-Side Entry 176" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8C4++0x3 line.long 0x00 "ENTRY_177,LUT Table A-Side Entry 177" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8C8++0x3 line.long 0x00 "ENTRY_178,LUT Table A-Side Entry 178" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8CC++0x3 line.long 0x00 "ENTRY_179,LUT Table A-Side Entry 179" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8D0++0x3 line.long 0x00 "ENTRY_180,LUT Table A-Side Entry 180" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8D4++0x3 line.long 0x00 "ENTRY_181,LUT Table A-Side Entry 181" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8D8++0x3 line.long 0x00 "ENTRY_182,LUT Table A-Side Entry 182" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8DC++0x3 line.long 0x00 "ENTRY_183,LUT Table A-Side Entry 183" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8E0++0x3 line.long 0x00 "ENTRY_184,LUT Table A-Side Entry 184" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8E4++0x3 line.long 0x00 "ENTRY_185,LUT Table A-Side Entry 185" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8E8++0x3 line.long 0x00 "ENTRY_186,LUT Table A-Side Entry 186" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8EC++0x3 line.long 0x00 "ENTRY_187,LUT Table A-Side Entry 187" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8F0++0x3 line.long 0x00 "ENTRY_188,LUT Table A-Side Entry 188" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8F4++0x3 line.long 0x00 "ENTRY_189,LUT Table A-Side Entry 189" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8F8++0x3 line.long 0x00 "ENTRY_190,LUT Table A-Side Entry 190" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8FC++0x3 line.long 0x00 "ENTRY_191,LUT Table A-Side Entry 191" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x900++0x3 line.long 0x00 "ENTRY_192,LUT Table A-Side Entry 192" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x904++0x3 line.long 0x00 "ENTRY_193,LUT Table A-Side Entry 193" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x908++0x3 line.long 0x00 "ENTRY_194,LUT Table A-Side Entry 194" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x90C++0x3 line.long 0x00 "ENTRY_195,LUT Table A-Side Entry 195" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x910++0x3 line.long 0x00 "ENTRY_196,LUT Table A-Side Entry 196" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x914++0x3 line.long 0x00 "ENTRY_197,LUT Table A-Side Entry 197" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x918++0x3 line.long 0x00 "ENTRY_198,LUT Table A-Side Entry 198" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x91C++0x3 line.long 0x00 "ENTRY_199,LUT Table A-Side Entry 199" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x920++0x3 line.long 0x00 "ENTRY_200,LUT Table A-Side Entry 200" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x924++0x3 line.long 0x00 "ENTRY_201,LUT Table A-Side Entry 201" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x928++0x3 line.long 0x00 "ENTRY_202,LUT Table A-Side Entry 202" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x92C++0x3 line.long 0x00 "ENTRY_203,LUT Table A-Side Entry 203" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x930++0x3 line.long 0x00 "ENTRY_204,LUT Table A-Side Entry 204" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x934++0x3 line.long 0x00 "ENTRY_205,LUT Table A-Side Entry 205" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x938++0x3 line.long 0x00 "ENTRY_206,LUT Table A-Side Entry 206" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x93C++0x3 line.long 0x00 "ENTRY_207,LUT Table A-Side Entry 207" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x940++0x3 line.long 0x00 "ENTRY_208,LUT Table A-Side Entry 208" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x944++0x3 line.long 0x00 "ENTRY_209,LUT Table A-Side Entry 209" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x948++0x3 line.long 0x00 "ENTRY_210,LUT Table A-Side Entry 210" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x94C++0x3 line.long 0x00 "ENTRY_211,LUT Table A-Side Entry 211" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x950++0x3 line.long 0x00 "ENTRY_212,LUT Table A-Side Entry 212" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x954++0x3 line.long 0x00 "ENTRY_213,LUT Table A-Side Entry 213" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x958++0x3 line.long 0x00 "ENTRY_214,LUT Table A-Side Entry 214" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x95C++0x3 line.long 0x00 "ENTRY_215,LUT Table A-Side Entry 215" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x960++0x3 line.long 0x00 "ENTRY_216,LUT Table A-Side Entry 216" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x964++0x3 line.long 0x00 "ENTRY_217,LUT Table A-Side Entry 217" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x968++0x3 line.long 0x00 "ENTRY_218,LUT Table A-Side Entry 218" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x96C++0x3 line.long 0x00 "ENTRY_219,LUT Table A-Side Entry 219" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x970++0x3 line.long 0x00 "ENTRY_220,LUT Table A-Side Entry 220" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x974++0x3 line.long 0x00 "ENTRY_221,LUT Table A-Side Entry 221" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x978++0x3 line.long 0x00 "ENTRY_222,LUT Table A-Side Entry 222" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x97C++0x3 line.long 0x00 "ENTRY_223,LUT Table A-Side Entry 223" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x980++0x3 line.long 0x00 "ENTRY_224,LUT Table A-Side Entry 224" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x984++0x3 line.long 0x00 "ENTRY_225,LUT Table A-Side Entry 225" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x988++0x3 line.long 0x00 "ENTRY_226,LUT Table A-Side Entry 226" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x98C++0x3 line.long 0x00 "ENTRY_227,LUT Table A-Side Entry 227" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x990++0x3 line.long 0x00 "ENTRY_228,LUT Table A-Side Entry 228" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x994++0x3 line.long 0x00 "ENTRY_229,LUT Table A-Side Entry 229" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x998++0x3 line.long 0x00 "ENTRY_230,LUT Table A-Side Entry 230" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x99C++0x3 line.long 0x00 "ENTRY_231,LUT Table A-Side Entry 231" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9A0++0x3 line.long 0x00 "ENTRY_232,LUT Table A-Side Entry 232" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9A4++0x3 line.long 0x00 "ENTRY_233,LUT Table A-Side Entry 233" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9A8++0x3 line.long 0x00 "ENTRY_234,LUT Table A-Side Entry 234" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9AC++0x3 line.long 0x00 "ENTRY_235,LUT Table A-Side Entry 235" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9B0++0x3 line.long 0x00 "ENTRY_236,LUT Table A-Side Entry 236" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9B4++0x3 line.long 0x00 "ENTRY_237,LUT Table A-Side Entry 237" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9B8++0x3 line.long 0x00 "ENTRY_238,LUT Table A-Side Entry 238" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9BC++0x3 line.long 0x00 "ENTRY_239,LUT Table A-Side Entry 239" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9C0++0x3 line.long 0x00 "ENTRY_240,LUT Table A-Side Entry 240" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9C4++0x3 line.long 0x00 "ENTRY_241,LUT Table A-Side Entry 241" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9C8++0x3 line.long 0x00 "ENTRY_242,LUT Table A-Side Entry 242" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9CC++0x3 line.long 0x00 "ENTRY_243,LUT Table A-Side Entry 243" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9D0++0x3 line.long 0x00 "ENTRY_244,LUT Table A-Side Entry 244" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9D4++0x3 line.long 0x00 "ENTRY_245,LUT Table A-Side Entry 245" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9D8++0x3 line.long 0x00 "ENTRY_246,LUT Table A-Side Entry 246" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9DC++0x3 line.long 0x00 "ENTRY_247,LUT Table A-Side Entry 247" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9E0++0x3 line.long 0x00 "ENTRY_248,LUT Table A-Side Entry 248" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9E4++0x3 line.long 0x00 "ENTRY_249,LUT Table A-Side Entry 249" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9E8++0x3 line.long 0x00 "ENTRY_250,LUT Table A-Side Entry 250" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9EC++0x3 line.long 0x00 "ENTRY_251,LUT Table A-Side Entry 251" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9F0++0x3 line.long 0x00 "ENTRY_252,LUT Table A-Side Entry 252" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9F4++0x3 line.long 0x00 "ENTRY_253,LUT Table A-Side Entry 253" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9F8++0x3 line.long 0x00 "ENTRY_254,LUT Table A-Side Entry 254" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9FC++0x3 line.long 0x00 "ENTRY_255,LUT Table A-Side Entry 255" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" else group.long 0x600++0x3 line.long 0x00 "ENTRY_0,LUT Table A-Side Entry 0" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x604++0x3 line.long 0x00 "ENTRY_1,LUT Table A-Side Entry 1" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x608++0x3 line.long 0x00 "ENTRY_2,LUT Table A-Side Entry 2" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x60C++0x3 line.long 0x00 "ENTRY_3,LUT Table A-Side Entry 3" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x610++0x3 line.long 0x00 "ENTRY_4,LUT Table A-Side Entry 4" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x614++0x3 line.long 0x00 "ENTRY_5,LUT Table A-Side Entry 5" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x618++0x3 line.long 0x00 "ENTRY_6,LUT Table A-Side Entry 6" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x61C++0x3 line.long 0x00 "ENTRY_7,LUT Table A-Side Entry 7" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x620++0x3 line.long 0x00 "ENTRY_8,LUT Table A-Side Entry 8" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x624++0x3 line.long 0x00 "ENTRY_9,LUT Table A-Side Entry 9" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x628++0x3 line.long 0x00 "ENTRY_10,LUT Table A-Side Entry 10" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x62C++0x3 line.long 0x00 "ENTRY_11,LUT Table A-Side Entry 11" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x630++0x3 line.long 0x00 "ENTRY_12,LUT Table A-Side Entry 12" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x634++0x3 line.long 0x00 "ENTRY_13,LUT Table A-Side Entry 13" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x638++0x3 line.long 0x00 "ENTRY_14,LUT Table A-Side Entry 14" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x63C++0x3 line.long 0x00 "ENTRY_15,LUT Table A-Side Entry 15" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x640++0x3 line.long 0x00 "ENTRY_16,LUT Table A-Side Entry 16" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x644++0x3 line.long 0x00 "ENTRY_17,LUT Table A-Side Entry 17" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x648++0x3 line.long 0x00 "ENTRY_18,LUT Table A-Side Entry 18" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x64C++0x3 line.long 0x00 "ENTRY_19,LUT Table A-Side Entry 19" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x650++0x3 line.long 0x00 "ENTRY_20,LUT Table A-Side Entry 20" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x654++0x3 line.long 0x00 "ENTRY_21,LUT Table A-Side Entry 21" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x658++0x3 line.long 0x00 "ENTRY_22,LUT Table A-Side Entry 22" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x65C++0x3 line.long 0x00 "ENTRY_23,LUT Table A-Side Entry 23" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x660++0x3 line.long 0x00 "ENTRY_24,LUT Table A-Side Entry 24" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x664++0x3 line.long 0x00 "ENTRY_25,LUT Table A-Side Entry 25" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x668++0x3 line.long 0x00 "ENTRY_26,LUT Table A-Side Entry 26" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x66C++0x3 line.long 0x00 "ENTRY_27,LUT Table A-Side Entry 27" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x670++0x3 line.long 0x00 "ENTRY_28,LUT Table A-Side Entry 28" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x674++0x3 line.long 0x00 "ENTRY_29,LUT Table A-Side Entry 29" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x678++0x3 line.long 0x00 "ENTRY_30,LUT Table A-Side Entry 30" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x67C++0x3 line.long 0x00 "ENTRY_31,LUT Table A-Side Entry 31" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x680++0x3 line.long 0x00 "ENTRY_32,LUT Table A-Side Entry 32" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x684++0x3 line.long 0x00 "ENTRY_33,LUT Table A-Side Entry 33" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x688++0x3 line.long 0x00 "ENTRY_34,LUT Table A-Side Entry 34" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x68C++0x3 line.long 0x00 "ENTRY_35,LUT Table A-Side Entry 35" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x690++0x3 line.long 0x00 "ENTRY_36,LUT Table A-Side Entry 36" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x694++0x3 line.long 0x00 "ENTRY_37,LUT Table A-Side Entry 37" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x698++0x3 line.long 0x00 "ENTRY_38,LUT Table A-Side Entry 38" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x69C++0x3 line.long 0x00 "ENTRY_39,LUT Table A-Side Entry 39" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6A0++0x3 line.long 0x00 "ENTRY_40,LUT Table A-Side Entry 40" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6A4++0x3 line.long 0x00 "ENTRY_41,LUT Table A-Side Entry 41" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6A8++0x3 line.long 0x00 "ENTRY_42,LUT Table A-Side Entry 42" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6AC++0x3 line.long 0x00 "ENTRY_43,LUT Table A-Side Entry 43" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6B0++0x3 line.long 0x00 "ENTRY_44,LUT Table A-Side Entry 44" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6B4++0x3 line.long 0x00 "ENTRY_45,LUT Table A-Side Entry 45" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6B8++0x3 line.long 0x00 "ENTRY_46,LUT Table A-Side Entry 46" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6BC++0x3 line.long 0x00 "ENTRY_47,LUT Table A-Side Entry 47" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6C0++0x3 line.long 0x00 "ENTRY_48,LUT Table A-Side Entry 48" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6C4++0x3 line.long 0x00 "ENTRY_49,LUT Table A-Side Entry 49" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6C8++0x3 line.long 0x00 "ENTRY_50,LUT Table A-Side Entry 50" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6CC++0x3 line.long 0x00 "ENTRY_51,LUT Table A-Side Entry 51" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6D0++0x3 line.long 0x00 "ENTRY_52,LUT Table A-Side Entry 52" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6D4++0x3 line.long 0x00 "ENTRY_53,LUT Table A-Side Entry 53" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6D8++0x3 line.long 0x00 "ENTRY_54,LUT Table A-Side Entry 54" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6DC++0x3 line.long 0x00 "ENTRY_55,LUT Table A-Side Entry 55" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6E0++0x3 line.long 0x00 "ENTRY_56,LUT Table A-Side Entry 56" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6E4++0x3 line.long 0x00 "ENTRY_57,LUT Table A-Side Entry 57" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6E8++0x3 line.long 0x00 "ENTRY_58,LUT Table A-Side Entry 58" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6EC++0x3 line.long 0x00 "ENTRY_59,LUT Table A-Side Entry 59" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6F0++0x3 line.long 0x00 "ENTRY_60,LUT Table A-Side Entry 60" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6F4++0x3 line.long 0x00 "ENTRY_61,LUT Table A-Side Entry 61" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6F8++0x3 line.long 0x00 "ENTRY_62,LUT Table A-Side Entry 62" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6FC++0x3 line.long 0x00 "ENTRY_63,LUT Table A-Side Entry 63" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x700++0x3 line.long 0x00 "ENTRY_64,LUT Table A-Side Entry 64" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x704++0x3 line.long 0x00 "ENTRY_65,LUT Table A-Side Entry 65" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x708++0x3 line.long 0x00 "ENTRY_66,LUT Table A-Side Entry 66" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x70C++0x3 line.long 0x00 "ENTRY_67,LUT Table A-Side Entry 67" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x710++0x3 line.long 0x00 "ENTRY_68,LUT Table A-Side Entry 68" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x714++0x3 line.long 0x00 "ENTRY_69,LUT Table A-Side Entry 69" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x718++0x3 line.long 0x00 "ENTRY_70,LUT Table A-Side Entry 70" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x71C++0x3 line.long 0x00 "ENTRY_71,LUT Table A-Side Entry 71" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x720++0x3 line.long 0x00 "ENTRY_72,LUT Table A-Side Entry 72" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x724++0x3 line.long 0x00 "ENTRY_73,LUT Table A-Side Entry 73" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x728++0x3 line.long 0x00 "ENTRY_74,LUT Table A-Side Entry 74" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x72C++0x3 line.long 0x00 "ENTRY_75,LUT Table A-Side Entry 75" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x730++0x3 line.long 0x00 "ENTRY_76,LUT Table A-Side Entry 76" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x734++0x3 line.long 0x00 "ENTRY_77,LUT Table A-Side Entry 77" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x738++0x3 line.long 0x00 "ENTRY_78,LUT Table A-Side Entry 78" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x73C++0x3 line.long 0x00 "ENTRY_79,LUT Table A-Side Entry 79" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x740++0x3 line.long 0x00 "ENTRY_80,LUT Table A-Side Entry 80" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x744++0x3 line.long 0x00 "ENTRY_81,LUT Table A-Side Entry 81" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x748++0x3 line.long 0x00 "ENTRY_82,LUT Table A-Side Entry 82" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x74C++0x3 line.long 0x00 "ENTRY_83,LUT Table A-Side Entry 83" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x750++0x3 line.long 0x00 "ENTRY_84,LUT Table A-Side Entry 84" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x754++0x3 line.long 0x00 "ENTRY_85,LUT Table A-Side Entry 85" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x758++0x3 line.long 0x00 "ENTRY_86,LUT Table A-Side Entry 86" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x75C++0x3 line.long 0x00 "ENTRY_87,LUT Table A-Side Entry 87" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x760++0x3 line.long 0x00 "ENTRY_88,LUT Table A-Side Entry 88" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x764++0x3 line.long 0x00 "ENTRY_89,LUT Table A-Side Entry 89" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x768++0x3 line.long 0x00 "ENTRY_90,LUT Table A-Side Entry 90" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x76C++0x3 line.long 0x00 "ENTRY_91,LUT Table A-Side Entry 91" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x770++0x3 line.long 0x00 "ENTRY_92,LUT Table A-Side Entry 92" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x774++0x3 line.long 0x00 "ENTRY_93,LUT Table A-Side Entry 93" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x778++0x3 line.long 0x00 "ENTRY_94,LUT Table A-Side Entry 94" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x77C++0x3 line.long 0x00 "ENTRY_95,LUT Table A-Side Entry 95" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x780++0x3 line.long 0x00 "ENTRY_96,LUT Table A-Side Entry 96" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x784++0x3 line.long 0x00 "ENTRY_97,LUT Table A-Side Entry 97" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x788++0x3 line.long 0x00 "ENTRY_98,LUT Table A-Side Entry 98" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x78C++0x3 line.long 0x00 "ENTRY_99,LUT Table A-Side Entry 99" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x790++0x3 line.long 0x00 "ENTRY_100,LUT Table A-Side Entry 100" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x794++0x3 line.long 0x00 "ENTRY_101,LUT Table A-Side Entry 101" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x798++0x3 line.long 0x00 "ENTRY_102,LUT Table A-Side Entry 102" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x79C++0x3 line.long 0x00 "ENTRY_103,LUT Table A-Side Entry 103" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7A0++0x3 line.long 0x00 "ENTRY_104,LUT Table A-Side Entry 104" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7A4++0x3 line.long 0x00 "ENTRY_105,LUT Table A-Side Entry 105" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7A8++0x3 line.long 0x00 "ENTRY_106,LUT Table A-Side Entry 106" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7AC++0x3 line.long 0x00 "ENTRY_107,LUT Table A-Side Entry 107" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7B0++0x3 line.long 0x00 "ENTRY_108,LUT Table A-Side Entry 108" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7B4++0x3 line.long 0x00 "ENTRY_109,LUT Table A-Side Entry 109" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7B8++0x3 line.long 0x00 "ENTRY_110,LUT Table A-Side Entry 110" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7BC++0x3 line.long 0x00 "ENTRY_111,LUT Table A-Side Entry 111" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7C0++0x3 line.long 0x00 "ENTRY_112,LUT Table A-Side Entry 112" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7C4++0x3 line.long 0x00 "ENTRY_113,LUT Table A-Side Entry 113" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7C8++0x3 line.long 0x00 "ENTRY_114,LUT Table A-Side Entry 114" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7CC++0x3 line.long 0x00 "ENTRY_115,LUT Table A-Side Entry 115" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7D0++0x3 line.long 0x00 "ENTRY_116,LUT Table A-Side Entry 116" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7D4++0x3 line.long 0x00 "ENTRY_117,LUT Table A-Side Entry 117" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7D8++0x3 line.long 0x00 "ENTRY_118,LUT Table A-Side Entry 118" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7DC++0x3 line.long 0x00 "ENTRY_119,LUT Table A-Side Entry 119" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7E0++0x3 line.long 0x00 "ENTRY_120,LUT Table A-Side Entry 120" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7E4++0x3 line.long 0x00 "ENTRY_121,LUT Table A-Side Entry 121" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7E8++0x3 line.long 0x00 "ENTRY_122,LUT Table A-Side Entry 122" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7EC++0x3 line.long 0x00 "ENTRY_123,LUT Table A-Side Entry 123" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7F0++0x3 line.long 0x00 "ENTRY_124,LUT Table A-Side Entry 124" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7F4++0x3 line.long 0x00 "ENTRY_125,LUT Table A-Side Entry 125" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7F8++0x3 line.long 0x00 "ENTRY_126,LUT Table A-Side Entry 126" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7FC++0x3 line.long 0x00 "ENTRY_127,LUT Table A-Side Entry 127" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x800++0x3 line.long 0x00 "ENTRY_128,LUT Table A-Side Entry 128" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x804++0x3 line.long 0x00 "ENTRY_129,LUT Table A-Side Entry 129" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x808++0x3 line.long 0x00 "ENTRY_130,LUT Table A-Side Entry 130" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x80C++0x3 line.long 0x00 "ENTRY_131,LUT Table A-Side Entry 131" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x810++0x3 line.long 0x00 "ENTRY_132,LUT Table A-Side Entry 132" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x814++0x3 line.long 0x00 "ENTRY_133,LUT Table A-Side Entry 133" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x818++0x3 line.long 0x00 "ENTRY_134,LUT Table A-Side Entry 134" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x81C++0x3 line.long 0x00 "ENTRY_135,LUT Table A-Side Entry 135" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x820++0x3 line.long 0x00 "ENTRY_136,LUT Table A-Side Entry 136" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x824++0x3 line.long 0x00 "ENTRY_137,LUT Table A-Side Entry 137" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x828++0x3 line.long 0x00 "ENTRY_138,LUT Table A-Side Entry 138" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x82C++0x3 line.long 0x00 "ENTRY_139,LUT Table A-Side Entry 139" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x830++0x3 line.long 0x00 "ENTRY_140,LUT Table A-Side Entry 140" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x834++0x3 line.long 0x00 "ENTRY_141,LUT Table A-Side Entry 141" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x838++0x3 line.long 0x00 "ENTRY_142,LUT Table A-Side Entry 142" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x83C++0x3 line.long 0x00 "ENTRY_143,LUT Table A-Side Entry 143" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x840++0x3 line.long 0x00 "ENTRY_144,LUT Table A-Side Entry 144" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x844++0x3 line.long 0x00 "ENTRY_145,LUT Table A-Side Entry 145" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x848++0x3 line.long 0x00 "ENTRY_146,LUT Table A-Side Entry 146" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x84C++0x3 line.long 0x00 "ENTRY_147,LUT Table A-Side Entry 147" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x850++0x3 line.long 0x00 "ENTRY_148,LUT Table A-Side Entry 148" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x854++0x3 line.long 0x00 "ENTRY_149,LUT Table A-Side Entry 149" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x858++0x3 line.long 0x00 "ENTRY_150,LUT Table A-Side Entry 150" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x85C++0x3 line.long 0x00 "ENTRY_151,LUT Table A-Side Entry 151" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x860++0x3 line.long 0x00 "ENTRY_152,LUT Table A-Side Entry 152" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x864++0x3 line.long 0x00 "ENTRY_153,LUT Table A-Side Entry 153" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x868++0x3 line.long 0x00 "ENTRY_154,LUT Table A-Side Entry 154" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x86C++0x3 line.long 0x00 "ENTRY_155,LUT Table A-Side Entry 155" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x870++0x3 line.long 0x00 "ENTRY_156,LUT Table A-Side Entry 156" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x874++0x3 line.long 0x00 "ENTRY_157,LUT Table A-Side Entry 157" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x878++0x3 line.long 0x00 "ENTRY_158,LUT Table A-Side Entry 158" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x87C++0x3 line.long 0x00 "ENTRY_159,LUT Table A-Side Entry 159" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x880++0x3 line.long 0x00 "ENTRY_160,LUT Table A-Side Entry 160" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x884++0x3 line.long 0x00 "ENTRY_161,LUT Table A-Side Entry 161" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x888++0x3 line.long 0x00 "ENTRY_162,LUT Table A-Side Entry 162" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x88C++0x3 line.long 0x00 "ENTRY_163,LUT Table A-Side Entry 163" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x890++0x3 line.long 0x00 "ENTRY_164,LUT Table A-Side Entry 164" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x894++0x3 line.long 0x00 "ENTRY_165,LUT Table A-Side Entry 165" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x898++0x3 line.long 0x00 "ENTRY_166,LUT Table A-Side Entry 166" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x89C++0x3 line.long 0x00 "ENTRY_167,LUT Table A-Side Entry 167" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8A0++0x3 line.long 0x00 "ENTRY_168,LUT Table A-Side Entry 168" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8A4++0x3 line.long 0x00 "ENTRY_169,LUT Table A-Side Entry 169" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8A8++0x3 line.long 0x00 "ENTRY_170,LUT Table A-Side Entry 170" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8AC++0x3 line.long 0x00 "ENTRY_171,LUT Table A-Side Entry 171" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8B0++0x3 line.long 0x00 "ENTRY_172,LUT Table A-Side Entry 172" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8B4++0x3 line.long 0x00 "ENTRY_173,LUT Table A-Side Entry 173" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8B8++0x3 line.long 0x00 "ENTRY_174,LUT Table A-Side Entry 174" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8BC++0x3 line.long 0x00 "ENTRY_175,LUT Table A-Side Entry 175" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8C0++0x3 line.long 0x00 "ENTRY_176,LUT Table A-Side Entry 176" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8C4++0x3 line.long 0x00 "ENTRY_177,LUT Table A-Side Entry 177" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8C8++0x3 line.long 0x00 "ENTRY_178,LUT Table A-Side Entry 178" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8CC++0x3 line.long 0x00 "ENTRY_179,LUT Table A-Side Entry 179" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8D0++0x3 line.long 0x00 "ENTRY_180,LUT Table A-Side Entry 180" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8D4++0x3 line.long 0x00 "ENTRY_181,LUT Table A-Side Entry 181" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8D8++0x3 line.long 0x00 "ENTRY_182,LUT Table A-Side Entry 182" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8DC++0x3 line.long 0x00 "ENTRY_183,LUT Table A-Side Entry 183" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8E0++0x3 line.long 0x00 "ENTRY_184,LUT Table A-Side Entry 184" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8E4++0x3 line.long 0x00 "ENTRY_185,LUT Table A-Side Entry 185" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8E8++0x3 line.long 0x00 "ENTRY_186,LUT Table A-Side Entry 186" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8EC++0x3 line.long 0x00 "ENTRY_187,LUT Table A-Side Entry 187" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8F0++0x3 line.long 0x00 "ENTRY_188,LUT Table A-Side Entry 188" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8F4++0x3 line.long 0x00 "ENTRY_189,LUT Table A-Side Entry 189" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8F8++0x3 line.long 0x00 "ENTRY_190,LUT Table A-Side Entry 190" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8FC++0x3 line.long 0x00 "ENTRY_191,LUT Table A-Side Entry 191" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x900++0x3 line.long 0x00 "ENTRY_192,LUT Table A-Side Entry 192" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x904++0x3 line.long 0x00 "ENTRY_193,LUT Table A-Side Entry 193" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x908++0x3 line.long 0x00 "ENTRY_194,LUT Table A-Side Entry 194" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x90C++0x3 line.long 0x00 "ENTRY_195,LUT Table A-Side Entry 195" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x910++0x3 line.long 0x00 "ENTRY_196,LUT Table A-Side Entry 196" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x914++0x3 line.long 0x00 "ENTRY_197,LUT Table A-Side Entry 197" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x918++0x3 line.long 0x00 "ENTRY_198,LUT Table A-Side Entry 198" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x91C++0x3 line.long 0x00 "ENTRY_199,LUT Table A-Side Entry 199" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x920++0x3 line.long 0x00 "ENTRY_200,LUT Table A-Side Entry 200" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x924++0x3 line.long 0x00 "ENTRY_201,LUT Table A-Side Entry 201" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x928++0x3 line.long 0x00 "ENTRY_202,LUT Table A-Side Entry 202" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x92C++0x3 line.long 0x00 "ENTRY_203,LUT Table A-Side Entry 203" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x930++0x3 line.long 0x00 "ENTRY_204,LUT Table A-Side Entry 204" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x934++0x3 line.long 0x00 "ENTRY_205,LUT Table A-Side Entry 205" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x938++0x3 line.long 0x00 "ENTRY_206,LUT Table A-Side Entry 206" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x93C++0x3 line.long 0x00 "ENTRY_207,LUT Table A-Side Entry 207" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x940++0x3 line.long 0x00 "ENTRY_208,LUT Table A-Side Entry 208" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x944++0x3 line.long 0x00 "ENTRY_209,LUT Table A-Side Entry 209" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x948++0x3 line.long 0x00 "ENTRY_210,LUT Table A-Side Entry 210" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x94C++0x3 line.long 0x00 "ENTRY_211,LUT Table A-Side Entry 211" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x950++0x3 line.long 0x00 "ENTRY_212,LUT Table A-Side Entry 212" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x954++0x3 line.long 0x00 "ENTRY_213,LUT Table A-Side Entry 213" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x958++0x3 line.long 0x00 "ENTRY_214,LUT Table A-Side Entry 214" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x95C++0x3 line.long 0x00 "ENTRY_215,LUT Table A-Side Entry 215" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x960++0x3 line.long 0x00 "ENTRY_216,LUT Table A-Side Entry 216" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x964++0x3 line.long 0x00 "ENTRY_217,LUT Table A-Side Entry 217" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x968++0x3 line.long 0x00 "ENTRY_218,LUT Table A-Side Entry 218" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x96C++0x3 line.long 0x00 "ENTRY_219,LUT Table A-Side Entry 219" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x970++0x3 line.long 0x00 "ENTRY_220,LUT Table A-Side Entry 220" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x974++0x3 line.long 0x00 "ENTRY_221,LUT Table A-Side Entry 221" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x978++0x3 line.long 0x00 "ENTRY_222,LUT Table A-Side Entry 222" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x97C++0x3 line.long 0x00 "ENTRY_223,LUT Table A-Side Entry 223" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x980++0x3 line.long 0x00 "ENTRY_224,LUT Table A-Side Entry 224" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x984++0x3 line.long 0x00 "ENTRY_225,LUT Table A-Side Entry 225" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x988++0x3 line.long 0x00 "ENTRY_226,LUT Table A-Side Entry 226" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x98C++0x3 line.long 0x00 "ENTRY_227,LUT Table A-Side Entry 227" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x990++0x3 line.long 0x00 "ENTRY_228,LUT Table A-Side Entry 228" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x994++0x3 line.long 0x00 "ENTRY_229,LUT Table A-Side Entry 229" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x998++0x3 line.long 0x00 "ENTRY_230,LUT Table A-Side Entry 230" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x99C++0x3 line.long 0x00 "ENTRY_231,LUT Table A-Side Entry 231" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9A0++0x3 line.long 0x00 "ENTRY_232,LUT Table A-Side Entry 232" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9A4++0x3 line.long 0x00 "ENTRY_233,LUT Table A-Side Entry 233" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9A8++0x3 line.long 0x00 "ENTRY_234,LUT Table A-Side Entry 234" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9AC++0x3 line.long 0x00 "ENTRY_235,LUT Table A-Side Entry 235" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9B0++0x3 line.long 0x00 "ENTRY_236,LUT Table A-Side Entry 236" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9B4++0x3 line.long 0x00 "ENTRY_237,LUT Table A-Side Entry 237" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9B8++0x3 line.long 0x00 "ENTRY_238,LUT Table A-Side Entry 238" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9BC++0x3 line.long 0x00 "ENTRY_239,LUT Table A-Side Entry 239" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9C0++0x3 line.long 0x00 "ENTRY_240,LUT Table A-Side Entry 240" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9C4++0x3 line.long 0x00 "ENTRY_241,LUT Table A-Side Entry 241" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9C8++0x3 line.long 0x00 "ENTRY_242,LUT Table A-Side Entry 242" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9CC++0x3 line.long 0x00 "ENTRY_243,LUT Table A-Side Entry 243" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9D0++0x3 line.long 0x00 "ENTRY_244,LUT Table A-Side Entry 244" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9D4++0x3 line.long 0x00 "ENTRY_245,LUT Table A-Side Entry 245" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9D8++0x3 line.long 0x00 "ENTRY_246,LUT Table A-Side Entry 246" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9DC++0x3 line.long 0x00 "ENTRY_247,LUT Table A-Side Entry 247" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9E0++0x3 line.long 0x00 "ENTRY_248,LUT Table A-Side Entry 248" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9E4++0x3 line.long 0x00 "ENTRY_249,LUT Table A-Side Entry 249" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9E8++0x3 line.long 0x00 "ENTRY_250,LUT Table A-Side Entry 250" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9EC++0x3 line.long 0x00 "ENTRY_251,LUT Table A-Side Entry 251" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9F0++0x3 line.long 0x00 "ENTRY_252,LUT Table A-Side Entry 252" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9F4++0x3 line.long 0x00 "ENTRY_253,LUT Table A-Side Entry 253" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9F8++0x3 line.long 0x00 "ENTRY_254,LUT Table A-Side Entry 254" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9FC++0x3 line.long 0x00 "ENTRY_255,LUT Table A-Side Entry 255" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" endif tree.end tree "1D-LUT Table B-Side (Entries 0 - 256)" width 11. if (((per.l(ad:0xFE600000+0x000)&0x1))==0x01) rgroup.long 0xB00++0x03 line.long 0x00 "ENTRY_0,LUT Table B-Side Entry 0" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB04++0x03 line.long 0x00 "ENTRY_1,LUT Table B-Side Entry 1" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB08++0x03 line.long 0x00 "ENTRY_2,LUT Table B-Side Entry 2" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB0C++0x03 line.long 0x00 "ENTRY_3,LUT Table B-Side Entry 3" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB10++0x03 line.long 0x00 "ENTRY_4,LUT Table B-Side Entry 4" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB14++0x03 line.long 0x00 "ENTRY_5,LUT Table B-Side Entry 5" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB18++0x03 line.long 0x00 "ENTRY_6,LUT Table B-Side Entry 6" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB1C++0x03 line.long 0x00 "ENTRY_7,LUT Table B-Side Entry 7" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB20++0x03 line.long 0x00 "ENTRY_8,LUT Table B-Side Entry 8" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB24++0x03 line.long 0x00 "ENTRY_9,LUT Table B-Side Entry 9" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB28++0x03 line.long 0x00 "ENTRY_10,LUT Table B-Side Entry 10" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB2C++0x03 line.long 0x00 "ENTRY_11,LUT Table B-Side Entry 11" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB30++0x03 line.long 0x00 "ENTRY_12,LUT Table B-Side Entry 12" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB34++0x03 line.long 0x00 "ENTRY_13,LUT Table B-Side Entry 13" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB38++0x03 line.long 0x00 "ENTRY_14,LUT Table B-Side Entry 14" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB3C++0x03 line.long 0x00 "ENTRY_15,LUT Table B-Side Entry 15" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB40++0x03 line.long 0x00 "ENTRY_16,LUT Table B-Side Entry 16" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB44++0x03 line.long 0x00 "ENTRY_17,LUT Table B-Side Entry 17" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB48++0x03 line.long 0x00 "ENTRY_18,LUT Table B-Side Entry 18" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB4C++0x03 line.long 0x00 "ENTRY_19,LUT Table B-Side Entry 19" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB50++0x03 line.long 0x00 "ENTRY_20,LUT Table B-Side Entry 20" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB54++0x03 line.long 0x00 "ENTRY_21,LUT Table B-Side Entry 21" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB58++0x03 line.long 0x00 "ENTRY_22,LUT Table B-Side Entry 22" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB5C++0x03 line.long 0x00 "ENTRY_23,LUT Table B-Side Entry 23" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB60++0x03 line.long 0x00 "ENTRY_24,LUT Table B-Side Entry 24" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB64++0x03 line.long 0x00 "ENTRY_25,LUT Table B-Side Entry 25" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB68++0x03 line.long 0x00 "ENTRY_26,LUT Table B-Side Entry 26" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB6C++0x03 line.long 0x00 "ENTRY_27,LUT Table B-Side Entry 27" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB70++0x03 line.long 0x00 "ENTRY_28,LUT Table B-Side Entry 28" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB74++0x03 line.long 0x00 "ENTRY_29,LUT Table B-Side Entry 29" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB78++0x03 line.long 0x00 "ENTRY_30,LUT Table B-Side Entry 30" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB7C++0x03 line.long 0x00 "ENTRY_31,LUT Table B-Side Entry 31" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB80++0x03 line.long 0x00 "ENTRY_32,LUT Table B-Side Entry 32" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB84++0x03 line.long 0x00 "ENTRY_33,LUT Table B-Side Entry 33" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB88++0x03 line.long 0x00 "ENTRY_34,LUT Table B-Side Entry 34" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB8C++0x03 line.long 0x00 "ENTRY_35,LUT Table B-Side Entry 35" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB90++0x03 line.long 0x00 "ENTRY_36,LUT Table B-Side Entry 36" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB94++0x03 line.long 0x00 "ENTRY_37,LUT Table B-Side Entry 37" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB98++0x03 line.long 0x00 "ENTRY_38,LUT Table B-Side Entry 38" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB9C++0x03 line.long 0x00 "ENTRY_39,LUT Table B-Side Entry 39" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBA0++0x03 line.long 0x00 "ENTRY_40,LUT Table B-Side Entry 40" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBA4++0x03 line.long 0x00 "ENTRY_41,LUT Table B-Side Entry 41" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBA8++0x03 line.long 0x00 "ENTRY_42,LUT Table B-Side Entry 42" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBAC++0x03 line.long 0x00 "ENTRY_43,LUT Table B-Side Entry 43" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBB0++0x03 line.long 0x00 "ENTRY_44,LUT Table B-Side Entry 44" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBB4++0x03 line.long 0x00 "ENTRY_45,LUT Table B-Side Entry 45" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBB8++0x03 line.long 0x00 "ENTRY_46,LUT Table B-Side Entry 46" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBBC++0x03 line.long 0x00 "ENTRY_47,LUT Table B-Side Entry 47" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBC0++0x03 line.long 0x00 "ENTRY_48,LUT Table B-Side Entry 48" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBC4++0x03 line.long 0x00 "ENTRY_49,LUT Table B-Side Entry 49" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBC8++0x03 line.long 0x00 "ENTRY_50,LUT Table B-Side Entry 50" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBCC++0x03 line.long 0x00 "ENTRY_51,LUT Table B-Side Entry 51" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBD0++0x03 line.long 0x00 "ENTRY_52,LUT Table B-Side Entry 52" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBD4++0x03 line.long 0x00 "ENTRY_53,LUT Table B-Side Entry 53" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBD8++0x03 line.long 0x00 "ENTRY_54,LUT Table B-Side Entry 54" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBDC++0x03 line.long 0x00 "ENTRY_55,LUT Table B-Side Entry 55" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBE0++0x03 line.long 0x00 "ENTRY_56,LUT Table B-Side Entry 56" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBE4++0x03 line.long 0x00 "ENTRY_57,LUT Table B-Side Entry 57" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBE8++0x03 line.long 0x00 "ENTRY_58,LUT Table B-Side Entry 58" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBEC++0x03 line.long 0x00 "ENTRY_59,LUT Table B-Side Entry 59" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBF0++0x03 line.long 0x00 "ENTRY_60,LUT Table B-Side Entry 60" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBF4++0x03 line.long 0x00 "ENTRY_61,LUT Table B-Side Entry 61" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBF8++0x03 line.long 0x00 "ENTRY_62,LUT Table B-Side Entry 62" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBFC++0x03 line.long 0x00 "ENTRY_63,LUT Table B-Side Entry 63" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC00++0x03 line.long 0x00 "ENTRY_64,LUT Table B-Side Entry 64" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC04++0x03 line.long 0x00 "ENTRY_65,LUT Table B-Side Entry 65" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC08++0x03 line.long 0x00 "ENTRY_66,LUT Table B-Side Entry 66" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC0C++0x03 line.long 0x00 "ENTRY_67,LUT Table B-Side Entry 67" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC10++0x03 line.long 0x00 "ENTRY_68,LUT Table B-Side Entry 68" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC14++0x03 line.long 0x00 "ENTRY_69,LUT Table B-Side Entry 69" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC18++0x03 line.long 0x00 "ENTRY_70,LUT Table B-Side Entry 70" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC1C++0x03 line.long 0x00 "ENTRY_71,LUT Table B-Side Entry 71" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC20++0x03 line.long 0x00 "ENTRY_72,LUT Table B-Side Entry 72" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC24++0x03 line.long 0x00 "ENTRY_73,LUT Table B-Side Entry 73" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC28++0x03 line.long 0x00 "ENTRY_74,LUT Table B-Side Entry 74" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC2C++0x03 line.long 0x00 "ENTRY_75,LUT Table B-Side Entry 75" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC30++0x03 line.long 0x00 "ENTRY_76,LUT Table B-Side Entry 76" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC34++0x03 line.long 0x00 "ENTRY_77,LUT Table B-Side Entry 77" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC38++0x03 line.long 0x00 "ENTRY_78,LUT Table B-Side Entry 78" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC3C++0x03 line.long 0x00 "ENTRY_79,LUT Table B-Side Entry 79" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC40++0x03 line.long 0x00 "ENTRY_80,LUT Table B-Side Entry 80" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC44++0x03 line.long 0x00 "ENTRY_81,LUT Table B-Side Entry 81" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC48++0x03 line.long 0x00 "ENTRY_82,LUT Table B-Side Entry 82" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC4C++0x03 line.long 0x00 "ENTRY_83,LUT Table B-Side Entry 83" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC50++0x03 line.long 0x00 "ENTRY_84,LUT Table B-Side Entry 84" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC54++0x03 line.long 0x00 "ENTRY_85,LUT Table B-Side Entry 85" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC58++0x03 line.long 0x00 "ENTRY_86,LUT Table B-Side Entry 86" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC5C++0x03 line.long 0x00 "ENTRY_87,LUT Table B-Side Entry 87" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC60++0x03 line.long 0x00 "ENTRY_88,LUT Table B-Side Entry 88" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC64++0x03 line.long 0x00 "ENTRY_89,LUT Table B-Side Entry 89" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC68++0x03 line.long 0x00 "ENTRY_90,LUT Table B-Side Entry 90" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC6C++0x03 line.long 0x00 "ENTRY_91,LUT Table B-Side Entry 91" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC70++0x03 line.long 0x00 "ENTRY_92,LUT Table B-Side Entry 92" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC74++0x03 line.long 0x00 "ENTRY_93,LUT Table B-Side Entry 93" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC78++0x03 line.long 0x00 "ENTRY_94,LUT Table B-Side Entry 94" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC7C++0x03 line.long 0x00 "ENTRY_95,LUT Table B-Side Entry 95" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC80++0x03 line.long 0x00 "ENTRY_96,LUT Table B-Side Entry 96" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC84++0x03 line.long 0x00 "ENTRY_97,LUT Table B-Side Entry 97" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC88++0x03 line.long 0x00 "ENTRY_98,LUT Table B-Side Entry 98" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC8C++0x03 line.long 0x00 "ENTRY_99,LUT Table B-Side Entry 99" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC90++0x03 line.long 0x00 "ENTRY_100,LUT Table B-Side Entry 100" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC94++0x03 line.long 0x00 "ENTRY_101,LUT Table B-Side Entry 101" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC98++0x03 line.long 0x00 "ENTRY_102,LUT Table B-Side Entry 102" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC9C++0x03 line.long 0x00 "ENTRY_103,LUT Table B-Side Entry 103" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCA0++0x03 line.long 0x00 "ENTRY_104,LUT Table B-Side Entry 104" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCA4++0x03 line.long 0x00 "ENTRY_105,LUT Table B-Side Entry 105" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCA8++0x03 line.long 0x00 "ENTRY_106,LUT Table B-Side Entry 106" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCAC++0x03 line.long 0x00 "ENTRY_107,LUT Table B-Side Entry 107" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCB0++0x03 line.long 0x00 "ENTRY_108,LUT Table B-Side Entry 108" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCB4++0x03 line.long 0x00 "ENTRY_109,LUT Table B-Side Entry 109" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCB8++0x03 line.long 0x00 "ENTRY_110,LUT Table B-Side Entry 110" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCBC++0x03 line.long 0x00 "ENTRY_111,LUT Table B-Side Entry 111" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCC0++0x03 line.long 0x00 "ENTRY_112,LUT Table B-Side Entry 112" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCC4++0x03 line.long 0x00 "ENTRY_113,LUT Table B-Side Entry 113" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCC8++0x03 line.long 0x00 "ENTRY_114,LUT Table B-Side Entry 114" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCCC++0x03 line.long 0x00 "ENTRY_115,LUT Table B-Side Entry 115" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCD0++0x03 line.long 0x00 "ENTRY_116,LUT Table B-Side Entry 116" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCD4++0x03 line.long 0x00 "ENTRY_117,LUT Table B-Side Entry 117" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCD8++0x03 line.long 0x00 "ENTRY_118,LUT Table B-Side Entry 118" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCDC++0x03 line.long 0x00 "ENTRY_119,LUT Table B-Side Entry 119" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCE0++0x03 line.long 0x00 "ENTRY_120,LUT Table B-Side Entry 120" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCE4++0x03 line.long 0x00 "ENTRY_121,LUT Table B-Side Entry 121" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCE8++0x03 line.long 0x00 "ENTRY_122,LUT Table B-Side Entry 122" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCEC++0x03 line.long 0x00 "ENTRY_123,LUT Table B-Side Entry 123" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCF0++0x03 line.long 0x00 "ENTRY_124,LUT Table B-Side Entry 124" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCF4++0x03 line.long 0x00 "ENTRY_125,LUT Table B-Side Entry 125" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCF8++0x03 line.long 0x00 "ENTRY_126,LUT Table B-Side Entry 126" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCFC++0x03 line.long 0x00 "ENTRY_127,LUT Table B-Side Entry 127" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD00++0x03 line.long 0x00 "ENTRY_128,LUT Table B-Side Entry 128" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD04++0x03 line.long 0x00 "ENTRY_129,LUT Table B-Side Entry 129" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD08++0x03 line.long 0x00 "ENTRY_130,LUT Table B-Side Entry 130" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD0C++0x03 line.long 0x00 "ENTRY_131,LUT Table B-Side Entry 131" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD10++0x03 line.long 0x00 "ENTRY_132,LUT Table B-Side Entry 132" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD14++0x03 line.long 0x00 "ENTRY_133,LUT Table B-Side Entry 133" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD18++0x03 line.long 0x00 "ENTRY_134,LUT Table B-Side Entry 134" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD1C++0x03 line.long 0x00 "ENTRY_135,LUT Table B-Side Entry 135" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD20++0x03 line.long 0x00 "ENTRY_136,LUT Table B-Side Entry 136" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD24++0x03 line.long 0x00 "ENTRY_137,LUT Table B-Side Entry 137" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD28++0x03 line.long 0x00 "ENTRY_138,LUT Table B-Side Entry 138" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD2C++0x03 line.long 0x00 "ENTRY_139,LUT Table B-Side Entry 139" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD30++0x03 line.long 0x00 "ENTRY_140,LUT Table B-Side Entry 140" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD34++0x03 line.long 0x00 "ENTRY_141,LUT Table B-Side Entry 141" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD38++0x03 line.long 0x00 "ENTRY_142,LUT Table B-Side Entry 142" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD3C++0x03 line.long 0x00 "ENTRY_143,LUT Table B-Side Entry 143" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD40++0x03 line.long 0x00 "ENTRY_144,LUT Table B-Side Entry 144" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD44++0x03 line.long 0x00 "ENTRY_145,LUT Table B-Side Entry 145" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD48++0x03 line.long 0x00 "ENTRY_146,LUT Table B-Side Entry 146" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD4C++0x03 line.long 0x00 "ENTRY_147,LUT Table B-Side Entry 147" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD50++0x03 line.long 0x00 "ENTRY_148,LUT Table B-Side Entry 148" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD54++0x03 line.long 0x00 "ENTRY_149,LUT Table B-Side Entry 149" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD58++0x03 line.long 0x00 "ENTRY_150,LUT Table B-Side Entry 150" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD5C++0x03 line.long 0x00 "ENTRY_151,LUT Table B-Side Entry 151" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD60++0x03 line.long 0x00 "ENTRY_152,LUT Table B-Side Entry 152" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD64++0x03 line.long 0x00 "ENTRY_153,LUT Table B-Side Entry 153" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD68++0x03 line.long 0x00 "ENTRY_154,LUT Table B-Side Entry 154" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD6C++0x03 line.long 0x00 "ENTRY_155,LUT Table B-Side Entry 155" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD70++0x03 line.long 0x00 "ENTRY_156,LUT Table B-Side Entry 156" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD74++0x03 line.long 0x00 "ENTRY_157,LUT Table B-Side Entry 157" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD78++0x03 line.long 0x00 "ENTRY_158,LUT Table B-Side Entry 158" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD7C++0x03 line.long 0x00 "ENTRY_159,LUT Table B-Side Entry 159" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD80++0x03 line.long 0x00 "ENTRY_160,LUT Table B-Side Entry 160" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD84++0x03 line.long 0x00 "ENTRY_161,LUT Table B-Side Entry 161" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD88++0x03 line.long 0x00 "ENTRY_162,LUT Table B-Side Entry 162" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD8C++0x03 line.long 0x00 "ENTRY_163,LUT Table B-Side Entry 163" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD90++0x03 line.long 0x00 "ENTRY_164,LUT Table B-Side Entry 164" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD94++0x03 line.long 0x00 "ENTRY_165,LUT Table B-Side Entry 165" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD98++0x03 line.long 0x00 "ENTRY_166,LUT Table B-Side Entry 166" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD9C++0x03 line.long 0x00 "ENTRY_167,LUT Table B-Side Entry 167" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDA0++0x03 line.long 0x00 "ENTRY_168,LUT Table B-Side Entry 168" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDA4++0x03 line.long 0x00 "ENTRY_169,LUT Table B-Side Entry 169" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDA8++0x03 line.long 0x00 "ENTRY_170,LUT Table B-Side Entry 170" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDAC++0x03 line.long 0x00 "ENTRY_171,LUT Table B-Side Entry 171" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDB0++0x03 line.long 0x00 "ENTRY_172,LUT Table B-Side Entry 172" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDB4++0x03 line.long 0x00 "ENTRY_173,LUT Table B-Side Entry 173" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDB8++0x03 line.long 0x00 "ENTRY_174,LUT Table B-Side Entry 174" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDBC++0x03 line.long 0x00 "ENTRY_175,LUT Table B-Side Entry 175" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDC0++0x03 line.long 0x00 "ENTRY_176,LUT Table B-Side Entry 176" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDC4++0x03 line.long 0x00 "ENTRY_177,LUT Table B-Side Entry 177" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDC8++0x03 line.long 0x00 "ENTRY_178,LUT Table B-Side Entry 178" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDCC++0x03 line.long 0x00 "ENTRY_179,LUT Table B-Side Entry 179" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDD0++0x03 line.long 0x00 "ENTRY_180,LUT Table B-Side Entry 180" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDD4++0x03 line.long 0x00 "ENTRY_181,LUT Table B-Side Entry 181" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDD8++0x03 line.long 0x00 "ENTRY_182,LUT Table B-Side Entry 182" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDDC++0x03 line.long 0x00 "ENTRY_183,LUT Table B-Side Entry 183" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDE0++0x03 line.long 0x00 "ENTRY_184,LUT Table B-Side Entry 184" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDE4++0x03 line.long 0x00 "ENTRY_185,LUT Table B-Side Entry 185" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDE8++0x03 line.long 0x00 "ENTRY_186,LUT Table B-Side Entry 186" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDEC++0x03 line.long 0x00 "ENTRY_187,LUT Table B-Side Entry 187" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDF0++0x03 line.long 0x00 "ENTRY_188,LUT Table B-Side Entry 188" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDF4++0x03 line.long 0x00 "ENTRY_189,LUT Table B-Side Entry 189" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDF8++0x03 line.long 0x00 "ENTRY_190,LUT Table B-Side Entry 190" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDFC++0x03 line.long 0x00 "ENTRY_191,LUT Table B-Side Entry 191" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE00++0x03 line.long 0x00 "ENTRY_192,LUT Table B-Side Entry 192" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE04++0x03 line.long 0x00 "ENTRY_193,LUT Table B-Side Entry 193" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE08++0x03 line.long 0x00 "ENTRY_194,LUT Table B-Side Entry 194" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE0C++0x03 line.long 0x00 "ENTRY_195,LUT Table B-Side Entry 195" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE10++0x03 line.long 0x00 "ENTRY_196,LUT Table B-Side Entry 196" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE14++0x03 line.long 0x00 "ENTRY_197,LUT Table B-Side Entry 197" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE18++0x03 line.long 0x00 "ENTRY_198,LUT Table B-Side Entry 198" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE1C++0x03 line.long 0x00 "ENTRY_199,LUT Table B-Side Entry 199" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE20++0x03 line.long 0x00 "ENTRY_200,LUT Table B-Side Entry 200" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE24++0x03 line.long 0x00 "ENTRY_201,LUT Table B-Side Entry 201" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE28++0x03 line.long 0x00 "ENTRY_202,LUT Table B-Side Entry 202" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE2C++0x03 line.long 0x00 "ENTRY_203,LUT Table B-Side Entry 203" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE30++0x03 line.long 0x00 "ENTRY_204,LUT Table B-Side Entry 204" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE34++0x03 line.long 0x00 "ENTRY_205,LUT Table B-Side Entry 205" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE38++0x03 line.long 0x00 "ENTRY_206,LUT Table B-Side Entry 206" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE3C++0x03 line.long 0x00 "ENTRY_207,LUT Table B-Side Entry 207" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE40++0x03 line.long 0x00 "ENTRY_208,LUT Table B-Side Entry 208" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE44++0x03 line.long 0x00 "ENTRY_209,LUT Table B-Side Entry 209" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE48++0x03 line.long 0x00 "ENTRY_210,LUT Table B-Side Entry 210" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE4C++0x03 line.long 0x00 "ENTRY_211,LUT Table B-Side Entry 211" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE50++0x03 line.long 0x00 "ENTRY_212,LUT Table B-Side Entry 212" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE54++0x03 line.long 0x00 "ENTRY_213,LUT Table B-Side Entry 213" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE58++0x03 line.long 0x00 "ENTRY_214,LUT Table B-Side Entry 214" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE5C++0x03 line.long 0x00 "ENTRY_215,LUT Table B-Side Entry 215" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE60++0x03 line.long 0x00 "ENTRY_216,LUT Table B-Side Entry 216" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE64++0x03 line.long 0x00 "ENTRY_217,LUT Table B-Side Entry 217" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE68++0x03 line.long 0x00 "ENTRY_218,LUT Table B-Side Entry 218" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE6C++0x03 line.long 0x00 "ENTRY_219,LUT Table B-Side Entry 219" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE70++0x03 line.long 0x00 "ENTRY_220,LUT Table B-Side Entry 220" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE74++0x03 line.long 0x00 "ENTRY_221,LUT Table B-Side Entry 221" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE78++0x03 line.long 0x00 "ENTRY_222,LUT Table B-Side Entry 222" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE7C++0x03 line.long 0x00 "ENTRY_223,LUT Table B-Side Entry 223" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE80++0x03 line.long 0x00 "ENTRY_224,LUT Table B-Side Entry 224" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE84++0x03 line.long 0x00 "ENTRY_225,LUT Table B-Side Entry 225" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE88++0x03 line.long 0x00 "ENTRY_226,LUT Table B-Side Entry 226" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE8C++0x03 line.long 0x00 "ENTRY_227,LUT Table B-Side Entry 227" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE90++0x03 line.long 0x00 "ENTRY_228,LUT Table B-Side Entry 228" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE94++0x03 line.long 0x00 "ENTRY_229,LUT Table B-Side Entry 229" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE98++0x03 line.long 0x00 "ENTRY_230,LUT Table B-Side Entry 230" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE9C++0x03 line.long 0x00 "ENTRY_231,LUT Table B-Side Entry 231" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEA0++0x03 line.long 0x00 "ENTRY_232,LUT Table B-Side Entry 232" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEA4++0x03 line.long 0x00 "ENTRY_233,LUT Table B-Side Entry 233" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEA8++0x03 line.long 0x00 "ENTRY_234,LUT Table B-Side Entry 234" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEAC++0x03 line.long 0x00 "ENTRY_235,LUT Table B-Side Entry 235" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEB0++0x03 line.long 0x00 "ENTRY_236,LUT Table B-Side Entry 236" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEB4++0x03 line.long 0x00 "ENTRY_237,LUT Table B-Side Entry 237" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEB8++0x03 line.long 0x00 "ENTRY_238,LUT Table B-Side Entry 238" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEBC++0x03 line.long 0x00 "ENTRY_239,LUT Table B-Side Entry 239" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEC0++0x03 line.long 0x00 "ENTRY_240,LUT Table B-Side Entry 240" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEC4++0x03 line.long 0x00 "ENTRY_241,LUT Table B-Side Entry 241" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEC8++0x03 line.long 0x00 "ENTRY_242,LUT Table B-Side Entry 242" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xECC++0x03 line.long 0x00 "ENTRY_243,LUT Table B-Side Entry 243" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xED0++0x03 line.long 0x00 "ENTRY_244,LUT Table B-Side Entry 244" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xED4++0x03 line.long 0x00 "ENTRY_245,LUT Table B-Side Entry 245" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xED8++0x03 line.long 0x00 "ENTRY_246,LUT Table B-Side Entry 246" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEDC++0x03 line.long 0x00 "ENTRY_247,LUT Table B-Side Entry 247" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEE0++0x03 line.long 0x00 "ENTRY_248,LUT Table B-Side Entry 248" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEE4++0x03 line.long 0x00 "ENTRY_249,LUT Table B-Side Entry 249" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEE8++0x03 line.long 0x00 "ENTRY_250,LUT Table B-Side Entry 250" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEEC++0x03 line.long 0x00 "ENTRY_251,LUT Table B-Side Entry 251" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEF0++0x03 line.long 0x00 "ENTRY_252,LUT Table B-Side Entry 252" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEF4++0x03 line.long 0x00 "ENTRY_253,LUT Table B-Side Entry 253" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEF8++0x03 line.long 0x00 "ENTRY_254,LUT Table B-Side Entry 254" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEFC++0x03 line.long 0x00 "ENTRY_255,LUT Table B-Side Entry 255" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" else group.long 0xB00++0x03 line.long 0x00 "ENTRY_0,LUT Table B-Side Entry 0" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB04++0x03 line.long 0x00 "ENTRY_1,LUT Table B-Side Entry 1" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB08++0x03 line.long 0x00 "ENTRY_2,LUT Table B-Side Entry 2" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB0C++0x03 line.long 0x00 "ENTRY_3,LUT Table B-Side Entry 3" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB10++0x03 line.long 0x00 "ENTRY_4,LUT Table B-Side Entry 4" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB14++0x03 line.long 0x00 "ENTRY_5,LUT Table B-Side Entry 5" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB18++0x03 line.long 0x00 "ENTRY_6,LUT Table B-Side Entry 6" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB1C++0x03 line.long 0x00 "ENTRY_7,LUT Table B-Side Entry 7" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB20++0x03 line.long 0x00 "ENTRY_8,LUT Table B-Side Entry 8" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB24++0x03 line.long 0x00 "ENTRY_9,LUT Table B-Side Entry 9" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB28++0x03 line.long 0x00 "ENTRY_10,LUT Table B-Side Entry 10" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB2C++0x03 line.long 0x00 "ENTRY_11,LUT Table B-Side Entry 11" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB30++0x03 line.long 0x00 "ENTRY_12,LUT Table B-Side Entry 12" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB34++0x03 line.long 0x00 "ENTRY_13,LUT Table B-Side Entry 13" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB38++0x03 line.long 0x00 "ENTRY_14,LUT Table B-Side Entry 14" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB3C++0x03 line.long 0x00 "ENTRY_15,LUT Table B-Side Entry 15" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB40++0x03 line.long 0x00 "ENTRY_16,LUT Table B-Side Entry 16" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB44++0x03 line.long 0x00 "ENTRY_17,LUT Table B-Side Entry 17" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB48++0x03 line.long 0x00 "ENTRY_18,LUT Table B-Side Entry 18" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB4C++0x03 line.long 0x00 "ENTRY_19,LUT Table B-Side Entry 19" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB50++0x03 line.long 0x00 "ENTRY_20,LUT Table B-Side Entry 20" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB54++0x03 line.long 0x00 "ENTRY_21,LUT Table B-Side Entry 21" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB58++0x03 line.long 0x00 "ENTRY_22,LUT Table B-Side Entry 22" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB5C++0x03 line.long 0x00 "ENTRY_23,LUT Table B-Side Entry 23" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB60++0x03 line.long 0x00 "ENTRY_24,LUT Table B-Side Entry 24" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB64++0x03 line.long 0x00 "ENTRY_25,LUT Table B-Side Entry 25" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB68++0x03 line.long 0x00 "ENTRY_26,LUT Table B-Side Entry 26" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB6C++0x03 line.long 0x00 "ENTRY_27,LUT Table B-Side Entry 27" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB70++0x03 line.long 0x00 "ENTRY_28,LUT Table B-Side Entry 28" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB74++0x03 line.long 0x00 "ENTRY_29,LUT Table B-Side Entry 29" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB78++0x03 line.long 0x00 "ENTRY_30,LUT Table B-Side Entry 30" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB7C++0x03 line.long 0x00 "ENTRY_31,LUT Table B-Side Entry 31" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB80++0x03 line.long 0x00 "ENTRY_32,LUT Table B-Side Entry 32" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB84++0x03 line.long 0x00 "ENTRY_33,LUT Table B-Side Entry 33" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB88++0x03 line.long 0x00 "ENTRY_34,LUT Table B-Side Entry 34" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB8C++0x03 line.long 0x00 "ENTRY_35,LUT Table B-Side Entry 35" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB90++0x03 line.long 0x00 "ENTRY_36,LUT Table B-Side Entry 36" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB94++0x03 line.long 0x00 "ENTRY_37,LUT Table B-Side Entry 37" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB98++0x03 line.long 0x00 "ENTRY_38,LUT Table B-Side Entry 38" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB9C++0x03 line.long 0x00 "ENTRY_39,LUT Table B-Side Entry 39" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBA0++0x03 line.long 0x00 "ENTRY_40,LUT Table B-Side Entry 40" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBA4++0x03 line.long 0x00 "ENTRY_41,LUT Table B-Side Entry 41" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBA8++0x03 line.long 0x00 "ENTRY_42,LUT Table B-Side Entry 42" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBAC++0x03 line.long 0x00 "ENTRY_43,LUT Table B-Side Entry 43" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBB0++0x03 line.long 0x00 "ENTRY_44,LUT Table B-Side Entry 44" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBB4++0x03 line.long 0x00 "ENTRY_45,LUT Table B-Side Entry 45" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBB8++0x03 line.long 0x00 "ENTRY_46,LUT Table B-Side Entry 46" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBBC++0x03 line.long 0x00 "ENTRY_47,LUT Table B-Side Entry 47" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBC0++0x03 line.long 0x00 "ENTRY_48,LUT Table B-Side Entry 48" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBC4++0x03 line.long 0x00 "ENTRY_49,LUT Table B-Side Entry 49" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBC8++0x03 line.long 0x00 "ENTRY_50,LUT Table B-Side Entry 50" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBCC++0x03 line.long 0x00 "ENTRY_51,LUT Table B-Side Entry 51" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBD0++0x03 line.long 0x00 "ENTRY_52,LUT Table B-Side Entry 52" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBD4++0x03 line.long 0x00 "ENTRY_53,LUT Table B-Side Entry 53" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBD8++0x03 line.long 0x00 "ENTRY_54,LUT Table B-Side Entry 54" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBDC++0x03 line.long 0x00 "ENTRY_55,LUT Table B-Side Entry 55" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBE0++0x03 line.long 0x00 "ENTRY_56,LUT Table B-Side Entry 56" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBE4++0x03 line.long 0x00 "ENTRY_57,LUT Table B-Side Entry 57" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBE8++0x03 line.long 0x00 "ENTRY_58,LUT Table B-Side Entry 58" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBEC++0x03 line.long 0x00 "ENTRY_59,LUT Table B-Side Entry 59" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBF0++0x03 line.long 0x00 "ENTRY_60,LUT Table B-Side Entry 60" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBF4++0x03 line.long 0x00 "ENTRY_61,LUT Table B-Side Entry 61" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBF8++0x03 line.long 0x00 "ENTRY_62,LUT Table B-Side Entry 62" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBFC++0x03 line.long 0x00 "ENTRY_63,LUT Table B-Side Entry 63" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC00++0x03 line.long 0x00 "ENTRY_64,LUT Table B-Side Entry 64" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC04++0x03 line.long 0x00 "ENTRY_65,LUT Table B-Side Entry 65" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC08++0x03 line.long 0x00 "ENTRY_66,LUT Table B-Side Entry 66" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC0C++0x03 line.long 0x00 "ENTRY_67,LUT Table B-Side Entry 67" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC10++0x03 line.long 0x00 "ENTRY_68,LUT Table B-Side Entry 68" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC14++0x03 line.long 0x00 "ENTRY_69,LUT Table B-Side Entry 69" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC18++0x03 line.long 0x00 "ENTRY_70,LUT Table B-Side Entry 70" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC1C++0x03 line.long 0x00 "ENTRY_71,LUT Table B-Side Entry 71" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC20++0x03 line.long 0x00 "ENTRY_72,LUT Table B-Side Entry 72" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC24++0x03 line.long 0x00 "ENTRY_73,LUT Table B-Side Entry 73" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC28++0x03 line.long 0x00 "ENTRY_74,LUT Table B-Side Entry 74" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC2C++0x03 line.long 0x00 "ENTRY_75,LUT Table B-Side Entry 75" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC30++0x03 line.long 0x00 "ENTRY_76,LUT Table B-Side Entry 76" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC34++0x03 line.long 0x00 "ENTRY_77,LUT Table B-Side Entry 77" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC38++0x03 line.long 0x00 "ENTRY_78,LUT Table B-Side Entry 78" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC3C++0x03 line.long 0x00 "ENTRY_79,LUT Table B-Side Entry 79" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC40++0x03 line.long 0x00 "ENTRY_80,LUT Table B-Side Entry 80" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC44++0x03 line.long 0x00 "ENTRY_81,LUT Table B-Side Entry 81" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC48++0x03 line.long 0x00 "ENTRY_82,LUT Table B-Side Entry 82" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC4C++0x03 line.long 0x00 "ENTRY_83,LUT Table B-Side Entry 83" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC50++0x03 line.long 0x00 "ENTRY_84,LUT Table B-Side Entry 84" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC54++0x03 line.long 0x00 "ENTRY_85,LUT Table B-Side Entry 85" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC58++0x03 line.long 0x00 "ENTRY_86,LUT Table B-Side Entry 86" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC5C++0x03 line.long 0x00 "ENTRY_87,LUT Table B-Side Entry 87" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC60++0x03 line.long 0x00 "ENTRY_88,LUT Table B-Side Entry 88" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC64++0x03 line.long 0x00 "ENTRY_89,LUT Table B-Side Entry 89" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC68++0x03 line.long 0x00 "ENTRY_90,LUT Table B-Side Entry 90" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC6C++0x03 line.long 0x00 "ENTRY_91,LUT Table B-Side Entry 91" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC70++0x03 line.long 0x00 "ENTRY_92,LUT Table B-Side Entry 92" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC74++0x03 line.long 0x00 "ENTRY_93,LUT Table B-Side Entry 93" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC78++0x03 line.long 0x00 "ENTRY_94,LUT Table B-Side Entry 94" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC7C++0x03 line.long 0x00 "ENTRY_95,LUT Table B-Side Entry 95" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC80++0x03 line.long 0x00 "ENTRY_96,LUT Table B-Side Entry 96" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC84++0x03 line.long 0x00 "ENTRY_97,LUT Table B-Side Entry 97" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC88++0x03 line.long 0x00 "ENTRY_98,LUT Table B-Side Entry 98" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC8C++0x03 line.long 0x00 "ENTRY_99,LUT Table B-Side Entry 99" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC90++0x03 line.long 0x00 "ENTRY_100,LUT Table B-Side Entry 100" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC94++0x03 line.long 0x00 "ENTRY_101,LUT Table B-Side Entry 101" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC98++0x03 line.long 0x00 "ENTRY_102,LUT Table B-Side Entry 102" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC9C++0x03 line.long 0x00 "ENTRY_103,LUT Table B-Side Entry 103" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCA0++0x03 line.long 0x00 "ENTRY_104,LUT Table B-Side Entry 104" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCA4++0x03 line.long 0x00 "ENTRY_105,LUT Table B-Side Entry 105" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCA8++0x03 line.long 0x00 "ENTRY_106,LUT Table B-Side Entry 106" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCAC++0x03 line.long 0x00 "ENTRY_107,LUT Table B-Side Entry 107" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCB0++0x03 line.long 0x00 "ENTRY_108,LUT Table B-Side Entry 108" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCB4++0x03 line.long 0x00 "ENTRY_109,LUT Table B-Side Entry 109" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCB8++0x03 line.long 0x00 "ENTRY_110,LUT Table B-Side Entry 110" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCBC++0x03 line.long 0x00 "ENTRY_111,LUT Table B-Side Entry 111" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCC0++0x03 line.long 0x00 "ENTRY_112,LUT Table B-Side Entry 112" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCC4++0x03 line.long 0x00 "ENTRY_113,LUT Table B-Side Entry 113" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCC8++0x03 line.long 0x00 "ENTRY_114,LUT Table B-Side Entry 114" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCCC++0x03 line.long 0x00 "ENTRY_115,LUT Table B-Side Entry 115" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCD0++0x03 line.long 0x00 "ENTRY_116,LUT Table B-Side Entry 116" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCD4++0x03 line.long 0x00 "ENTRY_117,LUT Table B-Side Entry 117" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCD8++0x03 line.long 0x00 "ENTRY_118,LUT Table B-Side Entry 118" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCDC++0x03 line.long 0x00 "ENTRY_119,LUT Table B-Side Entry 119" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCE0++0x03 line.long 0x00 "ENTRY_120,LUT Table B-Side Entry 120" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCE4++0x03 line.long 0x00 "ENTRY_121,LUT Table B-Side Entry 121" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCE8++0x03 line.long 0x00 "ENTRY_122,LUT Table B-Side Entry 122" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCEC++0x03 line.long 0x00 "ENTRY_123,LUT Table B-Side Entry 123" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCF0++0x03 line.long 0x00 "ENTRY_124,LUT Table B-Side Entry 124" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCF4++0x03 line.long 0x00 "ENTRY_125,LUT Table B-Side Entry 125" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCF8++0x03 line.long 0x00 "ENTRY_126,LUT Table B-Side Entry 126" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCFC++0x03 line.long 0x00 "ENTRY_127,LUT Table B-Side Entry 127" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD00++0x03 line.long 0x00 "ENTRY_128,LUT Table B-Side Entry 128" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD04++0x03 line.long 0x00 "ENTRY_129,LUT Table B-Side Entry 129" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD08++0x03 line.long 0x00 "ENTRY_130,LUT Table B-Side Entry 130" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD0C++0x03 line.long 0x00 "ENTRY_131,LUT Table B-Side Entry 131" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD10++0x03 line.long 0x00 "ENTRY_132,LUT Table B-Side Entry 132" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD14++0x03 line.long 0x00 "ENTRY_133,LUT Table B-Side Entry 133" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD18++0x03 line.long 0x00 "ENTRY_134,LUT Table B-Side Entry 134" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD1C++0x03 line.long 0x00 "ENTRY_135,LUT Table B-Side Entry 135" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD20++0x03 line.long 0x00 "ENTRY_136,LUT Table B-Side Entry 136" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD24++0x03 line.long 0x00 "ENTRY_137,LUT Table B-Side Entry 137" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD28++0x03 line.long 0x00 "ENTRY_138,LUT Table B-Side Entry 138" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD2C++0x03 line.long 0x00 "ENTRY_139,LUT Table B-Side Entry 139" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD30++0x03 line.long 0x00 "ENTRY_140,LUT Table B-Side Entry 140" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD34++0x03 line.long 0x00 "ENTRY_141,LUT Table B-Side Entry 141" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD38++0x03 line.long 0x00 "ENTRY_142,LUT Table B-Side Entry 142" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD3C++0x03 line.long 0x00 "ENTRY_143,LUT Table B-Side Entry 143" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD40++0x03 line.long 0x00 "ENTRY_144,LUT Table B-Side Entry 144" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD44++0x03 line.long 0x00 "ENTRY_145,LUT Table B-Side Entry 145" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD48++0x03 line.long 0x00 "ENTRY_146,LUT Table B-Side Entry 146" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD4C++0x03 line.long 0x00 "ENTRY_147,LUT Table B-Side Entry 147" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD50++0x03 line.long 0x00 "ENTRY_148,LUT Table B-Side Entry 148" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD54++0x03 line.long 0x00 "ENTRY_149,LUT Table B-Side Entry 149" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD58++0x03 line.long 0x00 "ENTRY_150,LUT Table B-Side Entry 150" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD5C++0x03 line.long 0x00 "ENTRY_151,LUT Table B-Side Entry 151" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD60++0x03 line.long 0x00 "ENTRY_152,LUT Table B-Side Entry 152" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD64++0x03 line.long 0x00 "ENTRY_153,LUT Table B-Side Entry 153" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD68++0x03 line.long 0x00 "ENTRY_154,LUT Table B-Side Entry 154" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD6C++0x03 line.long 0x00 "ENTRY_155,LUT Table B-Side Entry 155" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD70++0x03 line.long 0x00 "ENTRY_156,LUT Table B-Side Entry 156" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD74++0x03 line.long 0x00 "ENTRY_157,LUT Table B-Side Entry 157" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD78++0x03 line.long 0x00 "ENTRY_158,LUT Table B-Side Entry 158" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD7C++0x03 line.long 0x00 "ENTRY_159,LUT Table B-Side Entry 159" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD80++0x03 line.long 0x00 "ENTRY_160,LUT Table B-Side Entry 160" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD84++0x03 line.long 0x00 "ENTRY_161,LUT Table B-Side Entry 161" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD88++0x03 line.long 0x00 "ENTRY_162,LUT Table B-Side Entry 162" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD8C++0x03 line.long 0x00 "ENTRY_163,LUT Table B-Side Entry 163" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD90++0x03 line.long 0x00 "ENTRY_164,LUT Table B-Side Entry 164" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD94++0x03 line.long 0x00 "ENTRY_165,LUT Table B-Side Entry 165" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD98++0x03 line.long 0x00 "ENTRY_166,LUT Table B-Side Entry 166" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD9C++0x03 line.long 0x00 "ENTRY_167,LUT Table B-Side Entry 167" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDA0++0x03 line.long 0x00 "ENTRY_168,LUT Table B-Side Entry 168" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDA4++0x03 line.long 0x00 "ENTRY_169,LUT Table B-Side Entry 169" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDA8++0x03 line.long 0x00 "ENTRY_170,LUT Table B-Side Entry 170" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDAC++0x03 line.long 0x00 "ENTRY_171,LUT Table B-Side Entry 171" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDB0++0x03 line.long 0x00 "ENTRY_172,LUT Table B-Side Entry 172" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDB4++0x03 line.long 0x00 "ENTRY_173,LUT Table B-Side Entry 173" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDB8++0x03 line.long 0x00 "ENTRY_174,LUT Table B-Side Entry 174" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDBC++0x03 line.long 0x00 "ENTRY_175,LUT Table B-Side Entry 175" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDC0++0x03 line.long 0x00 "ENTRY_176,LUT Table B-Side Entry 176" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDC4++0x03 line.long 0x00 "ENTRY_177,LUT Table B-Side Entry 177" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDC8++0x03 line.long 0x00 "ENTRY_178,LUT Table B-Side Entry 178" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDCC++0x03 line.long 0x00 "ENTRY_179,LUT Table B-Side Entry 179" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDD0++0x03 line.long 0x00 "ENTRY_180,LUT Table B-Side Entry 180" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDD4++0x03 line.long 0x00 "ENTRY_181,LUT Table B-Side Entry 181" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDD8++0x03 line.long 0x00 "ENTRY_182,LUT Table B-Side Entry 182" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDDC++0x03 line.long 0x00 "ENTRY_183,LUT Table B-Side Entry 183" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDE0++0x03 line.long 0x00 "ENTRY_184,LUT Table B-Side Entry 184" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDE4++0x03 line.long 0x00 "ENTRY_185,LUT Table B-Side Entry 185" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDE8++0x03 line.long 0x00 "ENTRY_186,LUT Table B-Side Entry 186" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDEC++0x03 line.long 0x00 "ENTRY_187,LUT Table B-Side Entry 187" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDF0++0x03 line.long 0x00 "ENTRY_188,LUT Table B-Side Entry 188" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDF4++0x03 line.long 0x00 "ENTRY_189,LUT Table B-Side Entry 189" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDF8++0x03 line.long 0x00 "ENTRY_190,LUT Table B-Side Entry 190" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDFC++0x03 line.long 0x00 "ENTRY_191,LUT Table B-Side Entry 191" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE00++0x03 line.long 0x00 "ENTRY_192,LUT Table B-Side Entry 192" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE04++0x03 line.long 0x00 "ENTRY_193,LUT Table B-Side Entry 193" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE08++0x03 line.long 0x00 "ENTRY_194,LUT Table B-Side Entry 194" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE0C++0x03 line.long 0x00 "ENTRY_195,LUT Table B-Side Entry 195" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE10++0x03 line.long 0x00 "ENTRY_196,LUT Table B-Side Entry 196" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE14++0x03 line.long 0x00 "ENTRY_197,LUT Table B-Side Entry 197" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE18++0x03 line.long 0x00 "ENTRY_198,LUT Table B-Side Entry 198" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE1C++0x03 line.long 0x00 "ENTRY_199,LUT Table B-Side Entry 199" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE20++0x03 line.long 0x00 "ENTRY_200,LUT Table B-Side Entry 200" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE24++0x03 line.long 0x00 "ENTRY_201,LUT Table B-Side Entry 201" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE28++0x03 line.long 0x00 "ENTRY_202,LUT Table B-Side Entry 202" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE2C++0x03 line.long 0x00 "ENTRY_203,LUT Table B-Side Entry 203" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE30++0x03 line.long 0x00 "ENTRY_204,LUT Table B-Side Entry 204" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE34++0x03 line.long 0x00 "ENTRY_205,LUT Table B-Side Entry 205" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE38++0x03 line.long 0x00 "ENTRY_206,LUT Table B-Side Entry 206" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE3C++0x03 line.long 0x00 "ENTRY_207,LUT Table B-Side Entry 207" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE40++0x03 line.long 0x00 "ENTRY_208,LUT Table B-Side Entry 208" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE44++0x03 line.long 0x00 "ENTRY_209,LUT Table B-Side Entry 209" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE48++0x03 line.long 0x00 "ENTRY_210,LUT Table B-Side Entry 210" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE4C++0x03 line.long 0x00 "ENTRY_211,LUT Table B-Side Entry 211" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE50++0x03 line.long 0x00 "ENTRY_212,LUT Table B-Side Entry 212" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE54++0x03 line.long 0x00 "ENTRY_213,LUT Table B-Side Entry 213" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE58++0x03 line.long 0x00 "ENTRY_214,LUT Table B-Side Entry 214" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE5C++0x03 line.long 0x00 "ENTRY_215,LUT Table B-Side Entry 215" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE60++0x03 line.long 0x00 "ENTRY_216,LUT Table B-Side Entry 216" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE64++0x03 line.long 0x00 "ENTRY_217,LUT Table B-Side Entry 217" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE68++0x03 line.long 0x00 "ENTRY_218,LUT Table B-Side Entry 218" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE6C++0x03 line.long 0x00 "ENTRY_219,LUT Table B-Side Entry 219" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE70++0x03 line.long 0x00 "ENTRY_220,LUT Table B-Side Entry 220" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE74++0x03 line.long 0x00 "ENTRY_221,LUT Table B-Side Entry 221" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE78++0x03 line.long 0x00 "ENTRY_222,LUT Table B-Side Entry 222" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE7C++0x03 line.long 0x00 "ENTRY_223,LUT Table B-Side Entry 223" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE80++0x03 line.long 0x00 "ENTRY_224,LUT Table B-Side Entry 224" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE84++0x03 line.long 0x00 "ENTRY_225,LUT Table B-Side Entry 225" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE88++0x03 line.long 0x00 "ENTRY_226,LUT Table B-Side Entry 226" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE8C++0x03 line.long 0x00 "ENTRY_227,LUT Table B-Side Entry 227" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE90++0x03 line.long 0x00 "ENTRY_228,LUT Table B-Side Entry 228" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE94++0x03 line.long 0x00 "ENTRY_229,LUT Table B-Side Entry 229" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE98++0x03 line.long 0x00 "ENTRY_230,LUT Table B-Side Entry 230" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE9C++0x03 line.long 0x00 "ENTRY_231,LUT Table B-Side Entry 231" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEA0++0x03 line.long 0x00 "ENTRY_232,LUT Table B-Side Entry 232" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEA4++0x03 line.long 0x00 "ENTRY_233,LUT Table B-Side Entry 233" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEA8++0x03 line.long 0x00 "ENTRY_234,LUT Table B-Side Entry 234" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEAC++0x03 line.long 0x00 "ENTRY_235,LUT Table B-Side Entry 235" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEB0++0x03 line.long 0x00 "ENTRY_236,LUT Table B-Side Entry 236" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEB4++0x03 line.long 0x00 "ENTRY_237,LUT Table B-Side Entry 237" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEB8++0x03 line.long 0x00 "ENTRY_238,LUT Table B-Side Entry 238" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEBC++0x03 line.long 0x00 "ENTRY_239,LUT Table B-Side Entry 239" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEC0++0x03 line.long 0x00 "ENTRY_240,LUT Table B-Side Entry 240" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEC4++0x03 line.long 0x00 "ENTRY_241,LUT Table B-Side Entry 241" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEC8++0x03 line.long 0x00 "ENTRY_242,LUT Table B-Side Entry 242" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xECC++0x03 line.long 0x00 "ENTRY_243,LUT Table B-Side Entry 243" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xED0++0x03 line.long 0x00 "ENTRY_244,LUT Table B-Side Entry 244" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xED4++0x03 line.long 0x00 "ENTRY_245,LUT Table B-Side Entry 245" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xED8++0x03 line.long 0x00 "ENTRY_246,LUT Table B-Side Entry 246" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEDC++0x03 line.long 0x00 "ENTRY_247,LUT Table B-Side Entry 247" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEE0++0x03 line.long 0x00 "ENTRY_248,LUT Table B-Side Entry 248" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEE4++0x03 line.long 0x00 "ENTRY_249,LUT Table B-Side Entry 249" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEE8++0x03 line.long 0x00 "ENTRY_250,LUT Table B-Side Entry 250" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEEC++0x03 line.long 0x00 "ENTRY_251,LUT Table B-Side Entry 251" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEF0++0x03 line.long 0x00 "ENTRY_252,LUT Table B-Side Entry 252" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEF4++0x03 line.long 0x00 "ENTRY_253,LUT Table B-Side Entry 253" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEF8++0x03 line.long 0x00 "ENTRY_254,LUT Table B-Side Entry 254" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEFC++0x03 line.long 0x00 "ENTRY_255,LUT Table B-Side Entry 255" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" endif tree.end tree.end endif width 0x0B tree.end tree "CMM 1" base ad:0xFE680000 width 16. group.long 0x000++0x03 "LUT Control Register" line.long 0x00 "LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT Enable/Disable" "Disabled,Enabled" group.long 0x100++0x03 "CLU and Control Registers" line.long 0x00 "CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic table address increment" "Manually,Automatically" bitfld.long 0x00 24. " MVS ,Max value stretch - calculation method select" "Method 0,Method 1" bitfld.long 0x00 0. " CLU_EN ,CLU processing enable" "Disabled,Enabled" group.long 0x180++0x03 line.long 0x00 "CTL0,CMM Control Register 0" sif cpuis("R8A77960*")||(cpuis("R8A77951")||cpuis("R8A77951-*"))||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") bitfld.long 0x00 24. 0. " CLUDB ,CLU Double Buffer Mode" "All single,?,CLU single/LUT and HGO double,All double" bitfld.long 0x00 20. " HISTS ,Histogram selector - measure point select" "Before CLU,Before LUT" bitfld.long 0x00 16.--17. " TM1 ,YCbCr -> RGB format conversion expression (color format)" "BT.601 RGB[0 255] -> YCbCr[16 235/240],BT.601 RGB[0 255] -> YCbCr[0 255],BT.709 RGB[0 255] -> YCbCr[16 235/240],BT.709 RGB[16 235] -> YCbCr[16 235/240]" textline " " bitfld.long 0x00 12.--13. " TM0 ,RGB -> YCbCr format conversion expression (color format)" "BT.601 YCbCr[16 235/240] -> RGB[0 255],BT.601 YCbCr[0 255] -> RGB[0 255],BT.709 YCbCr[16 235/240] -> RGB[0 255],BT.709 YCbCr[16 235/240] -> RGB[16 235]" bitfld.long 0x00 8. " YC ,CMM processing format" "RGB,YCbCr" bitfld.long 0x00 4. " VPOL ,Polarity of VSYNC" "Negative edge,Positive edge" textline " " bitfld.long 0x00 0. " DBUF ,LUT/HGO Double buffer mode enable/disable" "Single buffer,Double buffer" elif cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 20. " HISTS ,Histogram selector - measure point select" "Before CLU,Before LUT" bitfld.long 0x00 16.--17. " TM1 ,YCbCr -> RGB format conversion expression (color format)" "BT.601 RGB[0 255] -> YCbCr[16 235/240],BT.601 RGB[0 255] -> YCbCr[0 255],BT.709 RGB[0 255] -> YCbCr[16 235/240],BT.709 RGB[16 235] -> YCbCr[16 235/240]" bitfld.long 0x00 12.--13. " TM0 ,RGB -> YCbCr format conversion expression (color format)" "BT.601 YCbCr[16 235/240] -> RGB[0 255],BT.601 YCbCr[0 255] -> RGB[0 255],BT.709 YCbCr[16 235/240] -> RGB[0 255],BT.709 YCbCr[16 235/240] -> RGB[16 235]" textline " " bitfld.long 0x00 8. " YC ,CMM processing format" "RGB,YCbCr" bitfld.long 0x00 4. " VPOL ,Polarity of VSYNC" "Negative edge,Positive edge" bitfld.long 0x00 0. " DBUF ,LUT/HGO Double buffer mode enable/disable" "Single buffer,Double buffer" else bitfld.long 0x00 4. " VPOL ,Polarity of VSYNC" "Negative edge,Positive edge" bitfld.long 0x00 0. " DBUF ,LUT/HGO Double buffer mode enable/disable" "Single buffer,Double buffer" endif sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") if (((per.l(ad:0xFE680000+0x180))&0x01)==0x00) group.long 0x184++0x03 line.long 0x00 "CTL1,CMM Control Register 1" bitfld.long 0x00 0. " BFS ,Buffer side. This bit specifies reference plane of 1D-LUT and 3D-LUT" "LUT buffer A | CLU buffer A,?..." else group.long 0x184++0x03 line.long 0x00 "CTL1,CMM Control Register 1" bitfld.long 0x00 0. " BFS ,Buffer side. This bit specifies reference plane of 1D-LUT and 3D-LUT" "A-Hardware B-Software,B-Hardware A-Software" endif else group.long 0x184++0x03 line.long 0x00 "CTL1,CMM Control Register 1" bitfld.long 0x00 0. " BFS ,Buffer side. This bit specifies reference plane of 1D-LUT" "A-Hardware B-Software,B-Hardware A-Software" endif group.long 0x188++0x03 line.long 0x00 "CTL2,CMM Control Register 2" bitfld.long 0x00 0.--3. " VSCNT[3:0] ,Frame counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" group.long 0x200++0x0F "HGO Control Registers" line.long 0x00 "HGO_OFFSET,HGO Detection Window Offset Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HOFFSET[13:0] ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET[13:0] ,Vertical offset of histogram detection window" else hexmask.long.word 0x00 16.--28. 1. " HOFFSET[12:0] ,Horizontal offset of histogram detection window" hexmask.long.word 0x00 0.--12. 1. " VOFFSET[12:0] ,Vertical offset of histogram detection window" endif line.long 0x04 "HGO_SIZE,HGO Detection Window Size Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " HSIZE[13:0] ,Horizontal Size of histogram detection window" hexmask.long.word 0x04 0.--13. 1. " VSIZE[13:0] ,Vertical size of histogram detection window" else hexmask.long.word 0x04 16.--28. 1. " HSIZE[12:0] ,Horizontal Size of histogram detection window" hexmask.long.word 0x04 0.--15. 1. " VSIZE[12:0] ,Vertical size of histogram detection window" endif line.long 0x08 "HGO_MODE,HGO Mode Register" bitfld.long 0x08 7. " MAXRGB ,Histogram source component setting" "3 colors indep.,Max of R/G/B" bitfld.long 0x08 6. " OFSB_R ,Offset binary mode for R component" "Straight binary,Offset binary" bitfld.long 0x08 5. " OFSB_G ,Offset binary mode for G component" "Straight binary,Offset binary" textline " " bitfld.long 0x08 4. " OFSB_B ,Offset binary mode for B component" "Straight binary,Offset binary" bitfld.long 0x08 2.--3. " HRATIO[1:0] ,Horizontal pixel skipping mode for histogram detection" "No skipping,1/2 skipping,1/4 skipping,?..." bitfld.long 0x08 0.--1. " VRATIO[1:0] ,Vertical pixel skipping mode for histogram detection" "No skipping,1/2 skipping,1/4 skipping,?..." line.long 0x0C "HGO_LB_TH,HGO LB Detection Threshold Register" hexmask.long.byte 0x0C 0.--7. 1. " BLACK_TH[7:0] ,Threshold for black level determination in letter box detection" group.long 0x210++0x07 line.long 0x00 "HGO_LB0_H,HGO Horizontal Position Register for LB Detection Zone-0" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HPOS_0[13:0] ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x00 0.--13. 1. " HPOS_1[13:0] ,Horizontal end position for letter box detection zone-0" else hexmask.long.word 0x00 16.--28. 1. " HPOS_0[12:0] ,Horizontal start position for letter box detection zone-0" hexmask.long.word 0x00 0.--12. 1. " HPOS_1[12:0] ,Horizontal end position for letter box detection zone-0" endif line.long 0x04 "HGO_LB0_V,HGO Vertical Position Register for LB detection zone-0" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " VPOS_0[13:0] ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x04 0.--13. 1. " VPOS_1[13:0] ,Vertical end position for letter box detection zone-0" else hexmask.long.word 0x04 16.--28. 1. " VPOS_0[12:0] ,Vertical start position for letter box detection zone-0" hexmask.long.word 0x04 0.--12. 1. " VPOS_1[12:0] ,Vertical end position for letter box detection zone-0" endif group.long 0x218++0x07 line.long 0x00 "HGO_LB1_H,HGO Horizontal Position Register for LB Detection Zone-1" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HPOS_0[13:0] ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x00 0.--13. 1. " HPOS_1[13:0] ,Horizontal end position for letter box detection zone-1" else hexmask.long.word 0x00 16.--28. 1. " HPOS_0[12:0] ,Horizontal start position for letter box detection zone-1" hexmask.long.word 0x00 0.--12. 1. " HPOS_1[12:0] ,Horizontal end position for letter box detection zone-1" endif line.long 0x04 "HGO_LB1_V,HGO Vertical Position Register for LB detection zone-1" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " VPOS_0[13:0] ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x04 0.--13. 1. " VPOS_1[13:0] ,Vertical end position for letter box detection zone-1" else hexmask.long.word 0x04 16.--28. 1. " VPOS_0[12:0] ,Vertical start position for letter box detection zone-1" hexmask.long.word 0x04 0.--12. 1. " VPOS_1[12:0] ,Vertical end position for letter box detection zone-1" endif group.long 0x220++0x07 line.long 0x00 "HGO_LB2_H,HGO Horizontal Position Register for LB Detection Zone-2" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HPOS_0[13:0] ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x00 0.--13. 1. " HPOS_1[13:0] ,Horizontal end position for letter box detection zone-2" else hexmask.long.word 0x00 16.--28. 1. " HPOS_0[12:0] ,Horizontal start position for letter box detection zone-2" hexmask.long.word 0x00 0.--12. 1. " HPOS_1[12:0] ,Horizontal end position for letter box detection zone-2" endif line.long 0x04 "HGO_LB2_V,HGO Vertical Position Register for LB detection zone-2" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " VPOS_0[13:0] ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x04 0.--13. 1. " VPOS_1[13:0] ,Vertical end position for letter box detection zone-2" else hexmask.long.word 0x04 16.--28. 1. " VPOS_0[12:0] ,Vertical start position for letter box detection zone-2" hexmask.long.word 0x04 0.--12. 1. " VPOS_1[12:0] ,Vertical end position for letter box detection zone-2" endif group.long 0x228++0x07 line.long 0x00 "HGO_LB3_H,HGO Horizontal Position Register for LB Detection Zone-3" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x00 16.--29. 1. " HPOS_0[13:0] ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x00 0.--13. 1. " HPOS_1[13:0] ,Horizontal end position for letter box detection zone-3" else hexmask.long.word 0x00 16.--28. 1. " HPOS_0[12:0] ,Horizontal start position for letter box detection zone-3" hexmask.long.word 0x00 0.--12. 1. " HPOS_1[12:0] ,Horizontal end position for letter box detection zone-3" endif line.long 0x04 "HGO_LB3_V,HGO Vertical Position Register for LB detection zone-3" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.word 0x04 16.--29. 1. " VPOS_0[13:0] ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x04 0.--13. 1. " VPOS_1[13:0] ,Vertical end position for letter box detection zone-3" else hexmask.long.word 0x04 16.--28. 1. " VPOS_0[12:0] ,Vertical start position for letter box detection zone-3" hexmask.long.word 0x04 0.--12. 1. " VPOS_1[12:0] ,Vertical end position for letter box detection zone-3" endif sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*") wgroup.long 0x5FC++0x03 line.long 0x00 "HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Writing 1 to this bit resets all read-only HGO registers to their initial values" "No effect,Clear" endif tree "R Histogram" width 20. rgroup.long 0x230++0x03 line.long 0x00 "HGO_R_HISTO_0,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-0" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-0" endif rgroup.long 0x234++0x03 line.long 0x00 "HGO_R_HISTO_1,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-1" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-1" endif rgroup.long 0x238++0x03 line.long 0x00 "HGO_R_HISTO_2,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-2" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-2" endif rgroup.long 0x23C++0x03 line.long 0x00 "HGO_R_HISTO_3,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-3" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-3" endif rgroup.long 0x240++0x03 line.long 0x00 "HGO_R_HISTO_4,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-4" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-4" endif rgroup.long 0x244++0x03 line.long 0x00 "HGO_R_HISTO_5,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-5" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-5" endif rgroup.long 0x248++0x03 line.long 0x00 "HGO_R_HISTO_6,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-6" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-6" endif rgroup.long 0x24C++0x03 line.long 0x00 "HGO_R_HISTO_7,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-7" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-7" endif rgroup.long 0x250++0x03 line.long 0x00 "HGO_R_HISTO_8,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-8" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-8" endif rgroup.long 0x254++0x03 line.long 0x00 "HGO_R_HISTO_9,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-9" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-9" endif rgroup.long 0x258++0x03 line.long 0x00 "HGO_R_HISTO_10,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-10" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-10" endif rgroup.long 0x25C++0x03 line.long 0x00 "HGO_R_HISTO_11,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-11" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-11" endif rgroup.long 0x260++0x03 line.long 0x00 "HGO_R_HISTO_12,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-12" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-12" endif rgroup.long 0x264++0x03 line.long 0x00 "HGO_R_HISTO_13,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-13" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-13" endif rgroup.long 0x268++0x03 line.long 0x00 "HGO_R_HISTO_14,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-14" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-14" endif rgroup.long 0x26C++0x03 line.long 0x00 "HGO_R_HISTO_15,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-15" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-15" endif rgroup.long 0x270++0x03 line.long 0x00 "HGO_R_HISTO_16,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-16" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-16" endif rgroup.long 0x274++0x03 line.long 0x00 "HGO_R_HISTO_17,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-17" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-17" endif rgroup.long 0x278++0x03 line.long 0x00 "HGO_R_HISTO_18,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-18" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-18" endif rgroup.long 0x27C++0x03 line.long 0x00 "HGO_R_HISTO_19,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-19" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-19" endif rgroup.long 0x280++0x03 line.long 0x00 "HGO_R_HISTO_20,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-20" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-20" endif rgroup.long 0x284++0x03 line.long 0x00 "HGO_R_HISTO_21,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-21" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-21" endif rgroup.long 0x288++0x03 line.long 0x00 "HGO_R_HISTO_22,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-22" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-22" endif rgroup.long 0x28C++0x03 line.long 0x00 "HGO_R_HISTO_23,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-23" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-23" endif rgroup.long 0x290++0x03 line.long 0x00 "HGO_R_HISTO_24,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-24" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-24" endif rgroup.long 0x294++0x03 line.long 0x00 "HGO_R_HISTO_25,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-25" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-25" endif rgroup.long 0x298++0x03 line.long 0x00 "HGO_R_HISTO_26,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-26" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-26" endif rgroup.long 0x29C++0x03 line.long 0x00 "HGO_R_HISTO_27,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-27" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-27" endif rgroup.long 0x2A0++0x03 line.long 0x00 "HGO_R_HISTO_28,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-28" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-28" endif rgroup.long 0x2A4++0x03 line.long 0x00 "HGO_R_HISTO_29,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-29" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-29" endif rgroup.long 0x2A8++0x03 line.long 0x00 "HGO_R_HISTO_30,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-30" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-30" endif rgroup.long 0x2AC++0x03 line.long 0x00 "HGO_R_HISTO_31,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-31" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-31" endif rgroup.long 0x2B0++0x03 line.long 0x00 "HGO_R_HISTO_32,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-32" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-32" endif rgroup.long 0x2B4++0x03 line.long 0x00 "HGO_R_HISTO_33,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-33" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-33" endif rgroup.long 0x2B8++0x03 line.long 0x00 "HGO_R_HISTO_34,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-34" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-34" endif rgroup.long 0x2BC++0x03 line.long 0x00 "HGO_R_HISTO_35,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-35" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-35" endif rgroup.long 0x2C0++0x03 line.long 0x00 "HGO_R_HISTO_36,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-36" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-36" endif rgroup.long 0x2C4++0x03 line.long 0x00 "HGO_R_HISTO_37,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-37" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-37" endif rgroup.long 0x2C8++0x03 line.long 0x00 "HGO_R_HISTO_38,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-38" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-38" endif rgroup.long 0x2CC++0x03 line.long 0x00 "HGO_R_HISTO_39,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-39" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-39" endif rgroup.long 0x2D0++0x03 line.long 0x00 "HGO_R_HISTO_40,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-40" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-40" endif rgroup.long 0x2D4++0x03 line.long 0x00 "HGO_R_HISTO_41,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-41" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-41" endif rgroup.long 0x2D8++0x03 line.long 0x00 "HGO_R_HISTO_42,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-42" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-42" endif rgroup.long 0x2DC++0x03 line.long 0x00 "HGO_R_HISTO_43,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-43" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-43" endif rgroup.long 0x2E0++0x03 line.long 0x00 "HGO_R_HISTO_44,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-44" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-44" endif rgroup.long 0x2E4++0x03 line.long 0x00 "HGO_R_HISTO_45,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-45" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-45" endif rgroup.long 0x2E8++0x03 line.long 0x00 "HGO_R_HISTO_46,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-46" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-46" endif rgroup.long 0x2EC++0x03 line.long 0x00 "HGO_R_HISTO_47,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-47" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-47" endif rgroup.long 0x2F0++0x03 line.long 0x00 "HGO_R_HISTO_48,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-48" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-48" endif rgroup.long 0x2F4++0x03 line.long 0x00 "HGO_R_HISTO_49,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-49" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-49" endif rgroup.long 0x2F8++0x03 line.long 0x00 "HGO_R_HISTO_50,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-50" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-50" endif rgroup.long 0x2FC++0x03 line.long 0x00 "HGO_R_HISTO_51,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-51" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-51" endif rgroup.long 0x300++0x03 line.long 0x00 "HGO_R_HISTO_52,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-52" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-52" endif rgroup.long 0x304++0x03 line.long 0x00 "HGO_R_HISTO_53,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-53" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-53" endif rgroup.long 0x308++0x03 line.long 0x00 "HGO_R_HISTO_54,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-54" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-54" endif rgroup.long 0x30C++0x03 line.long 0x00 "HGO_R_HISTO_55,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-55" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-55" endif rgroup.long 0x310++0x03 line.long 0x00 "HGO_R_HISTO_56,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-56" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-56" endif rgroup.long 0x314++0x03 line.long 0x00 "HGO_R_HISTO_57,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-57" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-57" endif rgroup.long 0x318++0x03 line.long 0x00 "HGO_R_HISTO_58,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-58" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-58" endif rgroup.long 0x31C++0x03 line.long 0x00 "HGO_R_HISTO_59,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-59" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-59" endif rgroup.long 0x320++0x03 line.long 0x00 "HGO_R_HISTO_60,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-60" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-60" endif rgroup.long 0x324++0x03 line.long 0x00 "HGO_R_HISTO_61,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-61" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-61" endif rgroup.long 0x328++0x03 line.long 0x00 "HGO_R_HISTO_62,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-62" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-62" endif rgroup.long 0x32C++0x03 line.long 0x00 "HGO_R_HISTO_63,HGO Component-R Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_R[23:0] ,Frequency of component-R in the value range-63" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_R[21:0] ,Frequency of component-R in the value range-63" endif textline " " rgroup.long 0x330++0x0B line.long 0x00 "HGO_R_MAXMIN,HGO Component-R Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL[7:0] ,Maximum value of Component-R" hexmask.long.byte 0x00 0.--7. 1. " MINVAL[7:0] ,Minimum value of Component-R" line.long 0x04 "HGO_R_SUM,HGO Component-R Sum Register" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*") hexmask.long 0x04 0.--29. 1. " SUMVAL[29:0] ,Sum of Component-R" endif line.long 0x08 "HGO_R_LB_DET,HGO Component-R LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX_1 ,Letter box detection result #1 of zone-0/1 for component-R" "Exceeded,Not exceeded" bitfld.long 0x08 1. " LTRBOX_2 ,Letter box detection result #2 of zone-0/1 for component-R" "Exceeded,Not exceeded" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-R" "Exceeded,Not exceeded" tree.end tree "G Histogram" width 20. rgroup.long 0x340++0x03 line.long 0x00 "HGO_G_HISTO_0,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-0" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-0" endif rgroup.long 0x344++0x03 line.long 0x00 "HGO_G_HISTO_1,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-1" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-1" endif rgroup.long 0x348++0x03 line.long 0x00 "HGO_G_HISTO_2,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-2" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-2" endif rgroup.long 0x34C++0x03 line.long 0x00 "HGO_G_HISTO_3,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-3" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-3" endif rgroup.long 0x350++0x03 line.long 0x00 "HGO_G_HISTO_4,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-4" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-4" endif rgroup.long 0x354++0x03 line.long 0x00 "HGO_G_HISTO_5,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-5" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-5" endif rgroup.long 0x358++0x03 line.long 0x00 "HGO_G_HISTO_6,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-6" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-6" endif rgroup.long 0x35C++0x03 line.long 0x00 "HGO_G_HISTO_7,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-7" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-7" endif rgroup.long 0x360++0x03 line.long 0x00 "HGO_G_HISTO_8,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-8" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-8" endif rgroup.long 0x364++0x03 line.long 0x00 "HGO_G_HISTO_9,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-9" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-9" endif rgroup.long 0x368++0x03 line.long 0x00 "HGO_G_HISTO_10,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-10" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-10" endif rgroup.long 0x36C++0x03 line.long 0x00 "HGO_G_HISTO_11,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-11" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-11" endif rgroup.long 0x370++0x03 line.long 0x00 "HGO_G_HISTO_12,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-12" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-12" endif rgroup.long 0x374++0x03 line.long 0x00 "HGO_G_HISTO_13,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-13" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-13" endif rgroup.long 0x378++0x03 line.long 0x00 "HGO_G_HISTO_14,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-14" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-14" endif rgroup.long 0x37C++0x03 line.long 0x00 "HGO_G_HISTO_15,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-15" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-15" endif rgroup.long 0x380++0x03 line.long 0x00 "HGO_G_HISTO_16,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-16" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-16" endif rgroup.long 0x384++0x03 line.long 0x00 "HGO_G_HISTO_17,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-17" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-17" endif rgroup.long 0x388++0x03 line.long 0x00 "HGO_G_HISTO_18,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-18" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-18" endif rgroup.long 0x38C++0x03 line.long 0x00 "HGO_G_HISTO_19,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-19" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-19" endif rgroup.long 0x390++0x03 line.long 0x00 "HGO_G_HISTO_20,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-20" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-20" endif rgroup.long 0x394++0x03 line.long 0x00 "HGO_G_HISTO_21,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-21" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-21" endif rgroup.long 0x398++0x03 line.long 0x00 "HGO_G_HISTO_22,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-22" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-22" endif rgroup.long 0x39C++0x03 line.long 0x00 "HGO_G_HISTO_23,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-23" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-23" endif rgroup.long 0x3A0++0x03 line.long 0x00 "HGO_G_HISTO_24,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-24" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-24" endif rgroup.long 0x3A4++0x03 line.long 0x00 "HGO_G_HISTO_25,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-25" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-25" endif rgroup.long 0x3A8++0x03 line.long 0x00 "HGO_G_HISTO_26,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-26" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-26" endif rgroup.long 0x3AC++0x03 line.long 0x00 "HGO_G_HISTO_27,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-27" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-27" endif rgroup.long 0x3B0++0x03 line.long 0x00 "HGO_G_HISTO_28,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-28" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-28" endif rgroup.long 0x3B4++0x03 line.long 0x00 "HGO_G_HISTO_29,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-29" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-29" endif rgroup.long 0x3B8++0x03 line.long 0x00 "HGO_G_HISTO_30,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-30" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-30" endif rgroup.long 0x3BC++0x03 line.long 0x00 "HGO_G_HISTO_31,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-31" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-31" endif rgroup.long 0x3C0++0x03 line.long 0x00 "HGO_G_HISTO_32,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-32" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-32" endif rgroup.long 0x3C4++0x03 line.long 0x00 "HGO_G_HISTO_33,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-33" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-33" endif rgroup.long 0x3C8++0x03 line.long 0x00 "HGO_G_HISTO_34,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-34" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-34" endif rgroup.long 0x3CC++0x03 line.long 0x00 "HGO_G_HISTO_35,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-35" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-35" endif rgroup.long 0x3D0++0x03 line.long 0x00 "HGO_G_HISTO_36,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-36" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-36" endif rgroup.long 0x3D4++0x03 line.long 0x00 "HGO_G_HISTO_37,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-37" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-37" endif rgroup.long 0x3D8++0x03 line.long 0x00 "HGO_G_HISTO_38,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-38" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-38" endif rgroup.long 0x3DC++0x03 line.long 0x00 "HGO_G_HISTO_39,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-39" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-39" endif rgroup.long 0x3E0++0x03 line.long 0x00 "HGO_G_HISTO_40,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-40" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-40" endif rgroup.long 0x3E4++0x03 line.long 0x00 "HGO_G_HISTO_41,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-41" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-41" endif rgroup.long 0x3E8++0x03 line.long 0x00 "HGO_G_HISTO_42,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-42" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-42" endif rgroup.long 0x3EC++0x03 line.long 0x00 "HGO_G_HISTO_43,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-43" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-43" endif rgroup.long 0x3F0++0x03 line.long 0x00 "HGO_G_HISTO_44,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-44" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-44" endif rgroup.long 0x3F4++0x03 line.long 0x00 "HGO_G_HISTO_45,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-45" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-45" endif rgroup.long 0x3F8++0x03 line.long 0x00 "HGO_G_HISTO_46,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-46" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-46" endif rgroup.long 0x3FC++0x03 line.long 0x00 "HGO_G_HISTO_47,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-47" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-47" endif rgroup.long 0x400++0x03 line.long 0x00 "HGO_G_HISTO_48,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-48" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-48" endif rgroup.long 0x404++0x03 line.long 0x00 "HGO_G_HISTO_49,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-49" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-49" endif rgroup.long 0x408++0x03 line.long 0x00 "HGO_G_HISTO_50,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-50" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-50" endif rgroup.long 0x40C++0x03 line.long 0x00 "HGO_G_HISTO_51,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-51" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-51" endif rgroup.long 0x410++0x03 line.long 0x00 "HGO_G_HISTO_52,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-52" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-52" endif rgroup.long 0x414++0x03 line.long 0x00 "HGO_G_HISTO_53,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-53" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-53" endif rgroup.long 0x418++0x03 line.long 0x00 "HGO_G_HISTO_54,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-54" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-54" endif rgroup.long 0x41C++0x03 line.long 0x00 "HGO_G_HISTO_55,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-55" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-55" endif rgroup.long 0x420++0x03 line.long 0x00 "HGO_G_HISTO_56,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-56" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-56" endif rgroup.long 0x424++0x03 line.long 0x00 "HGO_G_HISTO_57,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-57" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-57" endif rgroup.long 0x428++0x03 line.long 0x00 "HGO_G_HISTO_58,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-58" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-58" endif rgroup.long 0x42C++0x03 line.long 0x00 "HGO_G_HISTO_59,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-59" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-59" endif rgroup.long 0x430++0x03 line.long 0x00 "HGO_G_HISTO_60,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-60" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-60" endif rgroup.long 0x434++0x03 line.long 0x00 "HGO_G_HISTO_61,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-61" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-61" endif rgroup.long 0x438++0x03 line.long 0x00 "HGO_G_HISTO_62,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-62" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-62" endif rgroup.long 0x43C++0x03 line.long 0x00 "HGO_G_HISTO_63,HGO Component-G Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_G[23:0] ,Frequency of component-G in the value range-63" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_G[21:0] ,Frequency of component-G in the value range-63" endif textline " " rgroup.long 0x440++0x0B line.long 0x00 "HGO_G_MAXMIN,HGO Component-G Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL[7:0] ,Maximum value of component-G" hexmask.long.byte 0x00 0.--7. 1. " MINVAL[7:0] ,Minimum value of component-G" line.long 0x04 "HGO_G_SUM,HGO Component-G SumRegister" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*") hexmask.long 0x04 0.--29. 1. " SUMVAL[29:0] ,Sum of component-G" endif line.long 0x08 "HGO_G_LB_DET,HGO Component-G LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX_1 ,Letter box detection result g1 of zone-0/1 for component-G" "Exceeded,Not exceeded" bitfld.long 0x08 1. " LTRBOX_2 ,Letter box detection result g2 of zone-0/1 for component-G" "Exceeded,Not exceeded" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-G" "Exceeded,Not exceeded" tree.end tree "B Histogram" width 20. rgroup.long 0x450++0x03 line.long 0x00 "HGO_B_HISTO_0,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-0" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-0" endif rgroup.long 0x454++0x03 line.long 0x00 "HGO_B_HISTO_1,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-1" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-1" endif rgroup.long 0x458++0x03 line.long 0x00 "HGO_B_HISTO_2,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-2" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-2" endif rgroup.long 0x45C++0x03 line.long 0x00 "HGO_B_HISTO_3,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-3" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-3" endif rgroup.long 0x460++0x03 line.long 0x00 "HGO_B_HISTO_4,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-4" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-4" endif rgroup.long 0x464++0x03 line.long 0x00 "HGO_B_HISTO_5,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-5" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-5" endif rgroup.long 0x468++0x03 line.long 0x00 "HGO_B_HISTO_6,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-6" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-6" endif rgroup.long 0x46C++0x03 line.long 0x00 "HGO_B_HISTO_7,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-7" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-7" endif rgroup.long 0x470++0x03 line.long 0x00 "HGO_B_HISTO_8,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-8" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-8" endif rgroup.long 0x474++0x03 line.long 0x00 "HGO_B_HISTO_9,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-9" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-9" endif rgroup.long 0x478++0x03 line.long 0x00 "HGO_B_HISTO_10,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-10" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-10" endif rgroup.long 0x47C++0x03 line.long 0x00 "HGO_B_HISTO_11,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-11" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-11" endif rgroup.long 0x480++0x03 line.long 0x00 "HGO_B_HISTO_12,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-12" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-12" endif rgroup.long 0x484++0x03 line.long 0x00 "HGO_B_HISTO_13,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-13" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-13" endif rgroup.long 0x488++0x03 line.long 0x00 "HGO_B_HISTO_14,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-14" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-14" endif rgroup.long 0x48C++0x03 line.long 0x00 "HGO_B_HISTO_15,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-15" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-15" endif rgroup.long 0x490++0x03 line.long 0x00 "HGO_B_HISTO_16,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-16" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-16" endif rgroup.long 0x494++0x03 line.long 0x00 "HGO_B_HISTO_17,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-17" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-17" endif rgroup.long 0x498++0x03 line.long 0x00 "HGO_B_HISTO_18,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-18" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-18" endif rgroup.long 0x49C++0x03 line.long 0x00 "HGO_B_HISTO_19,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-19" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-19" endif rgroup.long 0x4A0++0x03 line.long 0x00 "HGO_B_HISTO_20,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-20" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-20" endif rgroup.long 0x4A4++0x03 line.long 0x00 "HGO_B_HISTO_21,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-21" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-21" endif rgroup.long 0x4A8++0x03 line.long 0x00 "HGO_B_HISTO_22,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-22" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-22" endif rgroup.long 0x4AC++0x03 line.long 0x00 "HGO_B_HISTO_23,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-23" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-23" endif rgroup.long 0x4B0++0x03 line.long 0x00 "HGO_B_HISTO_24,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-24" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-24" endif rgroup.long 0x4B4++0x03 line.long 0x00 "HGO_B_HISTO_25,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-25" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-25" endif rgroup.long 0x4B8++0x03 line.long 0x00 "HGO_B_HISTO_26,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-26" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-26" endif rgroup.long 0x4BC++0x03 line.long 0x00 "HGO_B_HISTO_27,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-27" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-27" endif rgroup.long 0x4C0++0x03 line.long 0x00 "HGO_B_HISTO_28,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-28" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-28" endif rgroup.long 0x4C4++0x03 line.long 0x00 "HGO_B_HISTO_29,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-29" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-29" endif rgroup.long 0x4C8++0x03 line.long 0x00 "HGO_B_HISTO_30,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-30" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-30" endif rgroup.long 0x4CC++0x03 line.long 0x00 "HGO_B_HISTO_31,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-31" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-31" endif rgroup.long 0x4D0++0x03 line.long 0x00 "HGO_B_HISTO_32,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-32" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-32" endif rgroup.long 0x4D4++0x03 line.long 0x00 "HGO_B_HISTO_33,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-33" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-33" endif rgroup.long 0x4D8++0x03 line.long 0x00 "HGO_B_HISTO_34,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-34" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-34" endif rgroup.long 0x4DC++0x03 line.long 0x00 "HGO_B_HISTO_35,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-35" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-35" endif rgroup.long 0x4E0++0x03 line.long 0x00 "HGO_B_HISTO_36,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-36" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-36" endif rgroup.long 0x4E4++0x03 line.long 0x00 "HGO_B_HISTO_37,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-37" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-37" endif rgroup.long 0x4E8++0x03 line.long 0x00 "HGO_B_HISTO_38,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-38" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-38" endif rgroup.long 0x4EC++0x03 line.long 0x00 "HGO_B_HISTO_39,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-39" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-39" endif rgroup.long 0x4F0++0x03 line.long 0x00 "HGO_B_HISTO_40,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-40" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-40" endif rgroup.long 0x4F4++0x03 line.long 0x00 "HGO_B_HISTO_41,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-41" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-41" endif rgroup.long 0x4F8++0x03 line.long 0x00 "HGO_B_HISTO_42,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-42" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-42" endif rgroup.long 0x4FC++0x03 line.long 0x00 "HGO_B_HISTO_43,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-43" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-43" endif rgroup.long 0x500++0x03 line.long 0x00 "HGO_B_HISTO_44,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-44" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-44" endif rgroup.long 0x504++0x03 line.long 0x00 "HGO_B_HISTO_45,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-45" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-45" endif rgroup.long 0x508++0x03 line.long 0x00 "HGO_B_HISTO_46,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-46" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-46" endif rgroup.long 0x50C++0x03 line.long 0x00 "HGO_B_HISTO_47,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-47" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-47" endif rgroup.long 0x510++0x03 line.long 0x00 "HGO_B_HISTO_48,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-48" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-48" endif rgroup.long 0x514++0x03 line.long 0x00 "HGO_B_HISTO_49,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-49" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-49" endif rgroup.long 0x518++0x03 line.long 0x00 "HGO_B_HISTO_50,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-50" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-50" endif rgroup.long 0x51C++0x03 line.long 0x00 "HGO_B_HISTO_51,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-51" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-51" endif rgroup.long 0x520++0x03 line.long 0x00 "HGO_B_HISTO_52,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-52" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-52" endif rgroup.long 0x524++0x03 line.long 0x00 "HGO_B_HISTO_53,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-53" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-53" endif rgroup.long 0x528++0x03 line.long 0x00 "HGO_B_HISTO_54,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-54" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-54" endif rgroup.long 0x52C++0x03 line.long 0x00 "HGO_B_HISTO_55,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-55" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-55" endif rgroup.long 0x530++0x03 line.long 0x00 "HGO_B_HISTO_56,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-56" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-56" endif rgroup.long 0x534++0x03 line.long 0x00 "HGO_B_HISTO_57,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-57" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-57" endif rgroup.long 0x538++0x03 line.long 0x00 "HGO_B_HISTO_58,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-58" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-58" endif rgroup.long 0x53C++0x03 line.long 0x00 "HGO_B_HISTO_59,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-59" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-59" endif rgroup.long 0x540++0x03 line.long 0x00 "HGO_B_HISTO_60,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-60" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-60" endif rgroup.long 0x544++0x03 line.long 0x00 "HGO_B_HISTO_61,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-61" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-61" endif rgroup.long 0x548++0x03 line.long 0x00 "HGO_B_HISTO_62,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-62" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-62" endif rgroup.long 0x54C++0x03 line.long 0x00 "HGO_B_HISTO_63,HGO Component-B Histogram Register" sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") hexmask.long.tbyte 0x00 0.--23. 1. " HISTOGRAM_B[23:0] ,Frequency of component-B in the value range-63" else hexmask.long.tbyte 0x00 0.--21. 1. " HISTOGRAM_B[21:0] ,Frequency of component-B in the value range-63" endif textline " " rgroup.long 0x550++0x0B line.long 0x00 "HGO_B_MAXMIN,HGO Component-B Min/Max Value Register" hexmask.long.byte 0x00 16.--23. 1. " MAXVAL[7:0] ,Maximum value of component-B" hexmask.long.byte 0x00 0.--7. 1. " MINVAL[7:0] ,Minimum value of component-B" line.long 0x04 "HGO_B_SUM,HGO Component-B SumRegister" sif !cpuis("R8J7795*")&&!cpuis("R8A7795*")&&!cpuis("R8A77960*")&&!cpuis("R8A77965*")&&!cpuis("R8A77990*")&&!cpuis("R8A77995*") hexmask.long 0x04 0.--29. 1. " SUMVAL[29:0] ,Sum of component-B" endif line.long 0x08 "HGO_B_LB_DET,HGO Component-B LB Detection Result Register" bitfld.long 0x08 2. " LTRBOX_1 ,Letter box detection result b1 of zone-0/1 for component-B" "Exceeded,Not exceeded" bitfld.long 0x08 1. " LTRBOX_2 ,Letter box detection result b2 of zone-0/1 for component-B" "Exceeded,Not exceeded" bitfld.long 0x08 0. " SIDE ,Letter box detection result of zone-2/3 for component-B" "Exceeded,Not exceeded" tree.end textline " " sif cpuis("R8J7795*")||cpuis("R8A7795*")||cpuis("R8A77960*")||cpuis("R8A77965*")||cpuis("R8A77990*")||cpuis("R8A77995*") wgroup.long 0x5FC++0x03 line.long 0x00 "HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Reset all read-only HGO registers to their initial values" "No effect,Clear" endif sif !cpuis("R8J7795*") tree.open "LUT space" width 14. hgroup.long 0xA00++0x07 hide.long 0x00 "CLU_ADDR1,CLU Table Address Register" hide.long 0x04 "CLU_DATA1,CLU Table DATA Register" hgroup.long 0xF00++0x07 hide.long 0x00 "CLU_ADDR2,CLU Table Address Register" hide.long 0x04 "CLU_DATA2,CLU Table DATA Register" tree "1D-LUT Table A-Side (Entries 0 - 256)" width 11. if (((per.l(ad:0xFE680000+0x000)&0x1))==0x01) rgroup.long 0x600++0x3 line.long 0x00 "ENTRY_0,LUT Table A-Side Entry 0" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x604++0x3 line.long 0x00 "ENTRY_1,LUT Table A-Side Entry 1" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x608++0x3 line.long 0x00 "ENTRY_2,LUT Table A-Side Entry 2" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x60C++0x3 line.long 0x00 "ENTRY_3,LUT Table A-Side Entry 3" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x610++0x3 line.long 0x00 "ENTRY_4,LUT Table A-Side Entry 4" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x614++0x3 line.long 0x00 "ENTRY_5,LUT Table A-Side Entry 5" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x618++0x3 line.long 0x00 "ENTRY_6,LUT Table A-Side Entry 6" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x61C++0x3 line.long 0x00 "ENTRY_7,LUT Table A-Side Entry 7" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x620++0x3 line.long 0x00 "ENTRY_8,LUT Table A-Side Entry 8" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x624++0x3 line.long 0x00 "ENTRY_9,LUT Table A-Side Entry 9" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x628++0x3 line.long 0x00 "ENTRY_10,LUT Table A-Side Entry 10" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x62C++0x3 line.long 0x00 "ENTRY_11,LUT Table A-Side Entry 11" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x630++0x3 line.long 0x00 "ENTRY_12,LUT Table A-Side Entry 12" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x634++0x3 line.long 0x00 "ENTRY_13,LUT Table A-Side Entry 13" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x638++0x3 line.long 0x00 "ENTRY_14,LUT Table A-Side Entry 14" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x63C++0x3 line.long 0x00 "ENTRY_15,LUT Table A-Side Entry 15" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x640++0x3 line.long 0x00 "ENTRY_16,LUT Table A-Side Entry 16" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x644++0x3 line.long 0x00 "ENTRY_17,LUT Table A-Side Entry 17" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x648++0x3 line.long 0x00 "ENTRY_18,LUT Table A-Side Entry 18" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x64C++0x3 line.long 0x00 "ENTRY_19,LUT Table A-Side Entry 19" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x650++0x3 line.long 0x00 "ENTRY_20,LUT Table A-Side Entry 20" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x654++0x3 line.long 0x00 "ENTRY_21,LUT Table A-Side Entry 21" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x658++0x3 line.long 0x00 "ENTRY_22,LUT Table A-Side Entry 22" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x65C++0x3 line.long 0x00 "ENTRY_23,LUT Table A-Side Entry 23" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x660++0x3 line.long 0x00 "ENTRY_24,LUT Table A-Side Entry 24" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x664++0x3 line.long 0x00 "ENTRY_25,LUT Table A-Side Entry 25" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x668++0x3 line.long 0x00 "ENTRY_26,LUT Table A-Side Entry 26" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x66C++0x3 line.long 0x00 "ENTRY_27,LUT Table A-Side Entry 27" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x670++0x3 line.long 0x00 "ENTRY_28,LUT Table A-Side Entry 28" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x674++0x3 line.long 0x00 "ENTRY_29,LUT Table A-Side Entry 29" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x678++0x3 line.long 0x00 "ENTRY_30,LUT Table A-Side Entry 30" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x67C++0x3 line.long 0x00 "ENTRY_31,LUT Table A-Side Entry 31" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x680++0x3 line.long 0x00 "ENTRY_32,LUT Table A-Side Entry 32" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x684++0x3 line.long 0x00 "ENTRY_33,LUT Table A-Side Entry 33" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x688++0x3 line.long 0x00 "ENTRY_34,LUT Table A-Side Entry 34" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x68C++0x3 line.long 0x00 "ENTRY_35,LUT Table A-Side Entry 35" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x690++0x3 line.long 0x00 "ENTRY_36,LUT Table A-Side Entry 36" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x694++0x3 line.long 0x00 "ENTRY_37,LUT Table A-Side Entry 37" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x698++0x3 line.long 0x00 "ENTRY_38,LUT Table A-Side Entry 38" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x69C++0x3 line.long 0x00 "ENTRY_39,LUT Table A-Side Entry 39" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6A0++0x3 line.long 0x00 "ENTRY_40,LUT Table A-Side Entry 40" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6A4++0x3 line.long 0x00 "ENTRY_41,LUT Table A-Side Entry 41" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6A8++0x3 line.long 0x00 "ENTRY_42,LUT Table A-Side Entry 42" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6AC++0x3 line.long 0x00 "ENTRY_43,LUT Table A-Side Entry 43" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6B0++0x3 line.long 0x00 "ENTRY_44,LUT Table A-Side Entry 44" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6B4++0x3 line.long 0x00 "ENTRY_45,LUT Table A-Side Entry 45" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6B8++0x3 line.long 0x00 "ENTRY_46,LUT Table A-Side Entry 46" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6BC++0x3 line.long 0x00 "ENTRY_47,LUT Table A-Side Entry 47" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6C0++0x3 line.long 0x00 "ENTRY_48,LUT Table A-Side Entry 48" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6C4++0x3 line.long 0x00 "ENTRY_49,LUT Table A-Side Entry 49" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6C8++0x3 line.long 0x00 "ENTRY_50,LUT Table A-Side Entry 50" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6CC++0x3 line.long 0x00 "ENTRY_51,LUT Table A-Side Entry 51" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6D0++0x3 line.long 0x00 "ENTRY_52,LUT Table A-Side Entry 52" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6D4++0x3 line.long 0x00 "ENTRY_53,LUT Table A-Side Entry 53" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6D8++0x3 line.long 0x00 "ENTRY_54,LUT Table A-Side Entry 54" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6DC++0x3 line.long 0x00 "ENTRY_55,LUT Table A-Side Entry 55" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6E0++0x3 line.long 0x00 "ENTRY_56,LUT Table A-Side Entry 56" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6E4++0x3 line.long 0x00 "ENTRY_57,LUT Table A-Side Entry 57" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6E8++0x3 line.long 0x00 "ENTRY_58,LUT Table A-Side Entry 58" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6EC++0x3 line.long 0x00 "ENTRY_59,LUT Table A-Side Entry 59" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6F0++0x3 line.long 0x00 "ENTRY_60,LUT Table A-Side Entry 60" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6F4++0x3 line.long 0x00 "ENTRY_61,LUT Table A-Side Entry 61" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6F8++0x3 line.long 0x00 "ENTRY_62,LUT Table A-Side Entry 62" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x6FC++0x3 line.long 0x00 "ENTRY_63,LUT Table A-Side Entry 63" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x700++0x3 line.long 0x00 "ENTRY_64,LUT Table A-Side Entry 64" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x704++0x3 line.long 0x00 "ENTRY_65,LUT Table A-Side Entry 65" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x708++0x3 line.long 0x00 "ENTRY_66,LUT Table A-Side Entry 66" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x70C++0x3 line.long 0x00 "ENTRY_67,LUT Table A-Side Entry 67" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x710++0x3 line.long 0x00 "ENTRY_68,LUT Table A-Side Entry 68" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x714++0x3 line.long 0x00 "ENTRY_69,LUT Table A-Side Entry 69" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x718++0x3 line.long 0x00 "ENTRY_70,LUT Table A-Side Entry 70" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x71C++0x3 line.long 0x00 "ENTRY_71,LUT Table A-Side Entry 71" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x720++0x3 line.long 0x00 "ENTRY_72,LUT Table A-Side Entry 72" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x724++0x3 line.long 0x00 "ENTRY_73,LUT Table A-Side Entry 73" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x728++0x3 line.long 0x00 "ENTRY_74,LUT Table A-Side Entry 74" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x72C++0x3 line.long 0x00 "ENTRY_75,LUT Table A-Side Entry 75" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x730++0x3 line.long 0x00 "ENTRY_76,LUT Table A-Side Entry 76" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x734++0x3 line.long 0x00 "ENTRY_77,LUT Table A-Side Entry 77" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x738++0x3 line.long 0x00 "ENTRY_78,LUT Table A-Side Entry 78" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x73C++0x3 line.long 0x00 "ENTRY_79,LUT Table A-Side Entry 79" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x740++0x3 line.long 0x00 "ENTRY_80,LUT Table A-Side Entry 80" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x744++0x3 line.long 0x00 "ENTRY_81,LUT Table A-Side Entry 81" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x748++0x3 line.long 0x00 "ENTRY_82,LUT Table A-Side Entry 82" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x74C++0x3 line.long 0x00 "ENTRY_83,LUT Table A-Side Entry 83" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x750++0x3 line.long 0x00 "ENTRY_84,LUT Table A-Side Entry 84" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x754++0x3 line.long 0x00 "ENTRY_85,LUT Table A-Side Entry 85" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x758++0x3 line.long 0x00 "ENTRY_86,LUT Table A-Side Entry 86" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x75C++0x3 line.long 0x00 "ENTRY_87,LUT Table A-Side Entry 87" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x760++0x3 line.long 0x00 "ENTRY_88,LUT Table A-Side Entry 88" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x764++0x3 line.long 0x00 "ENTRY_89,LUT Table A-Side Entry 89" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x768++0x3 line.long 0x00 "ENTRY_90,LUT Table A-Side Entry 90" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x76C++0x3 line.long 0x00 "ENTRY_91,LUT Table A-Side Entry 91" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x770++0x3 line.long 0x00 "ENTRY_92,LUT Table A-Side Entry 92" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x774++0x3 line.long 0x00 "ENTRY_93,LUT Table A-Side Entry 93" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x778++0x3 line.long 0x00 "ENTRY_94,LUT Table A-Side Entry 94" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x77C++0x3 line.long 0x00 "ENTRY_95,LUT Table A-Side Entry 95" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x780++0x3 line.long 0x00 "ENTRY_96,LUT Table A-Side Entry 96" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x784++0x3 line.long 0x00 "ENTRY_97,LUT Table A-Side Entry 97" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x788++0x3 line.long 0x00 "ENTRY_98,LUT Table A-Side Entry 98" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x78C++0x3 line.long 0x00 "ENTRY_99,LUT Table A-Side Entry 99" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x790++0x3 line.long 0x00 "ENTRY_100,LUT Table A-Side Entry 100" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x794++0x3 line.long 0x00 "ENTRY_101,LUT Table A-Side Entry 101" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x798++0x3 line.long 0x00 "ENTRY_102,LUT Table A-Side Entry 102" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x79C++0x3 line.long 0x00 "ENTRY_103,LUT Table A-Side Entry 103" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7A0++0x3 line.long 0x00 "ENTRY_104,LUT Table A-Side Entry 104" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7A4++0x3 line.long 0x00 "ENTRY_105,LUT Table A-Side Entry 105" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7A8++0x3 line.long 0x00 "ENTRY_106,LUT Table A-Side Entry 106" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7AC++0x3 line.long 0x00 "ENTRY_107,LUT Table A-Side Entry 107" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7B0++0x3 line.long 0x00 "ENTRY_108,LUT Table A-Side Entry 108" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7B4++0x3 line.long 0x00 "ENTRY_109,LUT Table A-Side Entry 109" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7B8++0x3 line.long 0x00 "ENTRY_110,LUT Table A-Side Entry 110" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7BC++0x3 line.long 0x00 "ENTRY_111,LUT Table A-Side Entry 111" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7C0++0x3 line.long 0x00 "ENTRY_112,LUT Table A-Side Entry 112" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7C4++0x3 line.long 0x00 "ENTRY_113,LUT Table A-Side Entry 113" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7C8++0x3 line.long 0x00 "ENTRY_114,LUT Table A-Side Entry 114" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7CC++0x3 line.long 0x00 "ENTRY_115,LUT Table A-Side Entry 115" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7D0++0x3 line.long 0x00 "ENTRY_116,LUT Table A-Side Entry 116" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7D4++0x3 line.long 0x00 "ENTRY_117,LUT Table A-Side Entry 117" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7D8++0x3 line.long 0x00 "ENTRY_118,LUT Table A-Side Entry 118" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7DC++0x3 line.long 0x00 "ENTRY_119,LUT Table A-Side Entry 119" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7E0++0x3 line.long 0x00 "ENTRY_120,LUT Table A-Side Entry 120" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7E4++0x3 line.long 0x00 "ENTRY_121,LUT Table A-Side Entry 121" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7E8++0x3 line.long 0x00 "ENTRY_122,LUT Table A-Side Entry 122" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7EC++0x3 line.long 0x00 "ENTRY_123,LUT Table A-Side Entry 123" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7F0++0x3 line.long 0x00 "ENTRY_124,LUT Table A-Side Entry 124" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7F4++0x3 line.long 0x00 "ENTRY_125,LUT Table A-Side Entry 125" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7F8++0x3 line.long 0x00 "ENTRY_126,LUT Table A-Side Entry 126" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x7FC++0x3 line.long 0x00 "ENTRY_127,LUT Table A-Side Entry 127" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x800++0x3 line.long 0x00 "ENTRY_128,LUT Table A-Side Entry 128" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x804++0x3 line.long 0x00 "ENTRY_129,LUT Table A-Side Entry 129" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x808++0x3 line.long 0x00 "ENTRY_130,LUT Table A-Side Entry 130" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x80C++0x3 line.long 0x00 "ENTRY_131,LUT Table A-Side Entry 131" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x810++0x3 line.long 0x00 "ENTRY_132,LUT Table A-Side Entry 132" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x814++0x3 line.long 0x00 "ENTRY_133,LUT Table A-Side Entry 133" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x818++0x3 line.long 0x00 "ENTRY_134,LUT Table A-Side Entry 134" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x81C++0x3 line.long 0x00 "ENTRY_135,LUT Table A-Side Entry 135" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x820++0x3 line.long 0x00 "ENTRY_136,LUT Table A-Side Entry 136" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x824++0x3 line.long 0x00 "ENTRY_137,LUT Table A-Side Entry 137" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x828++0x3 line.long 0x00 "ENTRY_138,LUT Table A-Side Entry 138" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x82C++0x3 line.long 0x00 "ENTRY_139,LUT Table A-Side Entry 139" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x830++0x3 line.long 0x00 "ENTRY_140,LUT Table A-Side Entry 140" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x834++0x3 line.long 0x00 "ENTRY_141,LUT Table A-Side Entry 141" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x838++0x3 line.long 0x00 "ENTRY_142,LUT Table A-Side Entry 142" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x83C++0x3 line.long 0x00 "ENTRY_143,LUT Table A-Side Entry 143" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x840++0x3 line.long 0x00 "ENTRY_144,LUT Table A-Side Entry 144" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x844++0x3 line.long 0x00 "ENTRY_145,LUT Table A-Side Entry 145" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x848++0x3 line.long 0x00 "ENTRY_146,LUT Table A-Side Entry 146" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x84C++0x3 line.long 0x00 "ENTRY_147,LUT Table A-Side Entry 147" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x850++0x3 line.long 0x00 "ENTRY_148,LUT Table A-Side Entry 148" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x854++0x3 line.long 0x00 "ENTRY_149,LUT Table A-Side Entry 149" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x858++0x3 line.long 0x00 "ENTRY_150,LUT Table A-Side Entry 150" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x85C++0x3 line.long 0x00 "ENTRY_151,LUT Table A-Side Entry 151" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x860++0x3 line.long 0x00 "ENTRY_152,LUT Table A-Side Entry 152" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x864++0x3 line.long 0x00 "ENTRY_153,LUT Table A-Side Entry 153" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x868++0x3 line.long 0x00 "ENTRY_154,LUT Table A-Side Entry 154" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x86C++0x3 line.long 0x00 "ENTRY_155,LUT Table A-Side Entry 155" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x870++0x3 line.long 0x00 "ENTRY_156,LUT Table A-Side Entry 156" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x874++0x3 line.long 0x00 "ENTRY_157,LUT Table A-Side Entry 157" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x878++0x3 line.long 0x00 "ENTRY_158,LUT Table A-Side Entry 158" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x87C++0x3 line.long 0x00 "ENTRY_159,LUT Table A-Side Entry 159" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x880++0x3 line.long 0x00 "ENTRY_160,LUT Table A-Side Entry 160" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x884++0x3 line.long 0x00 "ENTRY_161,LUT Table A-Side Entry 161" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x888++0x3 line.long 0x00 "ENTRY_162,LUT Table A-Side Entry 162" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x88C++0x3 line.long 0x00 "ENTRY_163,LUT Table A-Side Entry 163" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x890++0x3 line.long 0x00 "ENTRY_164,LUT Table A-Side Entry 164" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x894++0x3 line.long 0x00 "ENTRY_165,LUT Table A-Side Entry 165" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x898++0x3 line.long 0x00 "ENTRY_166,LUT Table A-Side Entry 166" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x89C++0x3 line.long 0x00 "ENTRY_167,LUT Table A-Side Entry 167" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8A0++0x3 line.long 0x00 "ENTRY_168,LUT Table A-Side Entry 168" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8A4++0x3 line.long 0x00 "ENTRY_169,LUT Table A-Side Entry 169" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8A8++0x3 line.long 0x00 "ENTRY_170,LUT Table A-Side Entry 170" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8AC++0x3 line.long 0x00 "ENTRY_171,LUT Table A-Side Entry 171" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8B0++0x3 line.long 0x00 "ENTRY_172,LUT Table A-Side Entry 172" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8B4++0x3 line.long 0x00 "ENTRY_173,LUT Table A-Side Entry 173" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8B8++0x3 line.long 0x00 "ENTRY_174,LUT Table A-Side Entry 174" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8BC++0x3 line.long 0x00 "ENTRY_175,LUT Table A-Side Entry 175" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8C0++0x3 line.long 0x00 "ENTRY_176,LUT Table A-Side Entry 176" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8C4++0x3 line.long 0x00 "ENTRY_177,LUT Table A-Side Entry 177" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8C8++0x3 line.long 0x00 "ENTRY_178,LUT Table A-Side Entry 178" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8CC++0x3 line.long 0x00 "ENTRY_179,LUT Table A-Side Entry 179" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8D0++0x3 line.long 0x00 "ENTRY_180,LUT Table A-Side Entry 180" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8D4++0x3 line.long 0x00 "ENTRY_181,LUT Table A-Side Entry 181" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8D8++0x3 line.long 0x00 "ENTRY_182,LUT Table A-Side Entry 182" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8DC++0x3 line.long 0x00 "ENTRY_183,LUT Table A-Side Entry 183" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8E0++0x3 line.long 0x00 "ENTRY_184,LUT Table A-Side Entry 184" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8E4++0x3 line.long 0x00 "ENTRY_185,LUT Table A-Side Entry 185" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8E8++0x3 line.long 0x00 "ENTRY_186,LUT Table A-Side Entry 186" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8EC++0x3 line.long 0x00 "ENTRY_187,LUT Table A-Side Entry 187" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8F0++0x3 line.long 0x00 "ENTRY_188,LUT Table A-Side Entry 188" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8F4++0x3 line.long 0x00 "ENTRY_189,LUT Table A-Side Entry 189" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8F8++0x3 line.long 0x00 "ENTRY_190,LUT Table A-Side Entry 190" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x8FC++0x3 line.long 0x00 "ENTRY_191,LUT Table A-Side Entry 191" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x900++0x3 line.long 0x00 "ENTRY_192,LUT Table A-Side Entry 192" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x904++0x3 line.long 0x00 "ENTRY_193,LUT Table A-Side Entry 193" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x908++0x3 line.long 0x00 "ENTRY_194,LUT Table A-Side Entry 194" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x90C++0x3 line.long 0x00 "ENTRY_195,LUT Table A-Side Entry 195" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x910++0x3 line.long 0x00 "ENTRY_196,LUT Table A-Side Entry 196" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x914++0x3 line.long 0x00 "ENTRY_197,LUT Table A-Side Entry 197" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x918++0x3 line.long 0x00 "ENTRY_198,LUT Table A-Side Entry 198" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x91C++0x3 line.long 0x00 "ENTRY_199,LUT Table A-Side Entry 199" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x920++0x3 line.long 0x00 "ENTRY_200,LUT Table A-Side Entry 200" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x924++0x3 line.long 0x00 "ENTRY_201,LUT Table A-Side Entry 201" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x928++0x3 line.long 0x00 "ENTRY_202,LUT Table A-Side Entry 202" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x92C++0x3 line.long 0x00 "ENTRY_203,LUT Table A-Side Entry 203" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x930++0x3 line.long 0x00 "ENTRY_204,LUT Table A-Side Entry 204" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x934++0x3 line.long 0x00 "ENTRY_205,LUT Table A-Side Entry 205" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x938++0x3 line.long 0x00 "ENTRY_206,LUT Table A-Side Entry 206" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x93C++0x3 line.long 0x00 "ENTRY_207,LUT Table A-Side Entry 207" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x940++0x3 line.long 0x00 "ENTRY_208,LUT Table A-Side Entry 208" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x944++0x3 line.long 0x00 "ENTRY_209,LUT Table A-Side Entry 209" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x948++0x3 line.long 0x00 "ENTRY_210,LUT Table A-Side Entry 210" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x94C++0x3 line.long 0x00 "ENTRY_211,LUT Table A-Side Entry 211" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x950++0x3 line.long 0x00 "ENTRY_212,LUT Table A-Side Entry 212" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x954++0x3 line.long 0x00 "ENTRY_213,LUT Table A-Side Entry 213" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x958++0x3 line.long 0x00 "ENTRY_214,LUT Table A-Side Entry 214" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x95C++0x3 line.long 0x00 "ENTRY_215,LUT Table A-Side Entry 215" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x960++0x3 line.long 0x00 "ENTRY_216,LUT Table A-Side Entry 216" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x964++0x3 line.long 0x00 "ENTRY_217,LUT Table A-Side Entry 217" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x968++0x3 line.long 0x00 "ENTRY_218,LUT Table A-Side Entry 218" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x96C++0x3 line.long 0x00 "ENTRY_219,LUT Table A-Side Entry 219" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x970++0x3 line.long 0x00 "ENTRY_220,LUT Table A-Side Entry 220" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x974++0x3 line.long 0x00 "ENTRY_221,LUT Table A-Side Entry 221" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x978++0x3 line.long 0x00 "ENTRY_222,LUT Table A-Side Entry 222" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x97C++0x3 line.long 0x00 "ENTRY_223,LUT Table A-Side Entry 223" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x980++0x3 line.long 0x00 "ENTRY_224,LUT Table A-Side Entry 224" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x984++0x3 line.long 0x00 "ENTRY_225,LUT Table A-Side Entry 225" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x988++0x3 line.long 0x00 "ENTRY_226,LUT Table A-Side Entry 226" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x98C++0x3 line.long 0x00 "ENTRY_227,LUT Table A-Side Entry 227" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x990++0x3 line.long 0x00 "ENTRY_228,LUT Table A-Side Entry 228" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x994++0x3 line.long 0x00 "ENTRY_229,LUT Table A-Side Entry 229" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x998++0x3 line.long 0x00 "ENTRY_230,LUT Table A-Side Entry 230" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x99C++0x3 line.long 0x00 "ENTRY_231,LUT Table A-Side Entry 231" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9A0++0x3 line.long 0x00 "ENTRY_232,LUT Table A-Side Entry 232" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9A4++0x3 line.long 0x00 "ENTRY_233,LUT Table A-Side Entry 233" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9A8++0x3 line.long 0x00 "ENTRY_234,LUT Table A-Side Entry 234" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9AC++0x3 line.long 0x00 "ENTRY_235,LUT Table A-Side Entry 235" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9B0++0x3 line.long 0x00 "ENTRY_236,LUT Table A-Side Entry 236" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9B4++0x3 line.long 0x00 "ENTRY_237,LUT Table A-Side Entry 237" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9B8++0x3 line.long 0x00 "ENTRY_238,LUT Table A-Side Entry 238" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9BC++0x3 line.long 0x00 "ENTRY_239,LUT Table A-Side Entry 239" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9C0++0x3 line.long 0x00 "ENTRY_240,LUT Table A-Side Entry 240" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9C4++0x3 line.long 0x00 "ENTRY_241,LUT Table A-Side Entry 241" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9C8++0x3 line.long 0x00 "ENTRY_242,LUT Table A-Side Entry 242" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9CC++0x3 line.long 0x00 "ENTRY_243,LUT Table A-Side Entry 243" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9D0++0x3 line.long 0x00 "ENTRY_244,LUT Table A-Side Entry 244" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9D4++0x3 line.long 0x00 "ENTRY_245,LUT Table A-Side Entry 245" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9D8++0x3 line.long 0x00 "ENTRY_246,LUT Table A-Side Entry 246" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9DC++0x3 line.long 0x00 "ENTRY_247,LUT Table A-Side Entry 247" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9E0++0x3 line.long 0x00 "ENTRY_248,LUT Table A-Side Entry 248" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9E4++0x3 line.long 0x00 "ENTRY_249,LUT Table A-Side Entry 249" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9E8++0x3 line.long 0x00 "ENTRY_250,LUT Table A-Side Entry 250" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9EC++0x3 line.long 0x00 "ENTRY_251,LUT Table A-Side Entry 251" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9F0++0x3 line.long 0x00 "ENTRY_252,LUT Table A-Side Entry 252" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9F4++0x3 line.long 0x00 "ENTRY_253,LUT Table A-Side Entry 253" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9F8++0x3 line.long 0x00 "ENTRY_254,LUT Table A-Side Entry 254" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0x9FC++0x3 line.long 0x00 "ENTRY_255,LUT Table A-Side Entry 255" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" else group.long 0x600++0x3 line.long 0x00 "ENTRY_0,LUT Table A-Side Entry 0" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x604++0x3 line.long 0x00 "ENTRY_1,LUT Table A-Side Entry 1" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x608++0x3 line.long 0x00 "ENTRY_2,LUT Table A-Side Entry 2" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x60C++0x3 line.long 0x00 "ENTRY_3,LUT Table A-Side Entry 3" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x610++0x3 line.long 0x00 "ENTRY_4,LUT Table A-Side Entry 4" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x614++0x3 line.long 0x00 "ENTRY_5,LUT Table A-Side Entry 5" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x618++0x3 line.long 0x00 "ENTRY_6,LUT Table A-Side Entry 6" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x61C++0x3 line.long 0x00 "ENTRY_7,LUT Table A-Side Entry 7" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x620++0x3 line.long 0x00 "ENTRY_8,LUT Table A-Side Entry 8" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x624++0x3 line.long 0x00 "ENTRY_9,LUT Table A-Side Entry 9" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x628++0x3 line.long 0x00 "ENTRY_10,LUT Table A-Side Entry 10" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x62C++0x3 line.long 0x00 "ENTRY_11,LUT Table A-Side Entry 11" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x630++0x3 line.long 0x00 "ENTRY_12,LUT Table A-Side Entry 12" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x634++0x3 line.long 0x00 "ENTRY_13,LUT Table A-Side Entry 13" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x638++0x3 line.long 0x00 "ENTRY_14,LUT Table A-Side Entry 14" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x63C++0x3 line.long 0x00 "ENTRY_15,LUT Table A-Side Entry 15" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x640++0x3 line.long 0x00 "ENTRY_16,LUT Table A-Side Entry 16" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x644++0x3 line.long 0x00 "ENTRY_17,LUT Table A-Side Entry 17" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x648++0x3 line.long 0x00 "ENTRY_18,LUT Table A-Side Entry 18" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x64C++0x3 line.long 0x00 "ENTRY_19,LUT Table A-Side Entry 19" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x650++0x3 line.long 0x00 "ENTRY_20,LUT Table A-Side Entry 20" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x654++0x3 line.long 0x00 "ENTRY_21,LUT Table A-Side Entry 21" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x658++0x3 line.long 0x00 "ENTRY_22,LUT Table A-Side Entry 22" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x65C++0x3 line.long 0x00 "ENTRY_23,LUT Table A-Side Entry 23" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x660++0x3 line.long 0x00 "ENTRY_24,LUT Table A-Side Entry 24" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x664++0x3 line.long 0x00 "ENTRY_25,LUT Table A-Side Entry 25" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x668++0x3 line.long 0x00 "ENTRY_26,LUT Table A-Side Entry 26" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x66C++0x3 line.long 0x00 "ENTRY_27,LUT Table A-Side Entry 27" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x670++0x3 line.long 0x00 "ENTRY_28,LUT Table A-Side Entry 28" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x674++0x3 line.long 0x00 "ENTRY_29,LUT Table A-Side Entry 29" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x678++0x3 line.long 0x00 "ENTRY_30,LUT Table A-Side Entry 30" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x67C++0x3 line.long 0x00 "ENTRY_31,LUT Table A-Side Entry 31" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x680++0x3 line.long 0x00 "ENTRY_32,LUT Table A-Side Entry 32" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x684++0x3 line.long 0x00 "ENTRY_33,LUT Table A-Side Entry 33" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x688++0x3 line.long 0x00 "ENTRY_34,LUT Table A-Side Entry 34" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x68C++0x3 line.long 0x00 "ENTRY_35,LUT Table A-Side Entry 35" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x690++0x3 line.long 0x00 "ENTRY_36,LUT Table A-Side Entry 36" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x694++0x3 line.long 0x00 "ENTRY_37,LUT Table A-Side Entry 37" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x698++0x3 line.long 0x00 "ENTRY_38,LUT Table A-Side Entry 38" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x69C++0x3 line.long 0x00 "ENTRY_39,LUT Table A-Side Entry 39" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6A0++0x3 line.long 0x00 "ENTRY_40,LUT Table A-Side Entry 40" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6A4++0x3 line.long 0x00 "ENTRY_41,LUT Table A-Side Entry 41" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6A8++0x3 line.long 0x00 "ENTRY_42,LUT Table A-Side Entry 42" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6AC++0x3 line.long 0x00 "ENTRY_43,LUT Table A-Side Entry 43" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6B0++0x3 line.long 0x00 "ENTRY_44,LUT Table A-Side Entry 44" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6B4++0x3 line.long 0x00 "ENTRY_45,LUT Table A-Side Entry 45" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6B8++0x3 line.long 0x00 "ENTRY_46,LUT Table A-Side Entry 46" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6BC++0x3 line.long 0x00 "ENTRY_47,LUT Table A-Side Entry 47" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6C0++0x3 line.long 0x00 "ENTRY_48,LUT Table A-Side Entry 48" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6C4++0x3 line.long 0x00 "ENTRY_49,LUT Table A-Side Entry 49" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6C8++0x3 line.long 0x00 "ENTRY_50,LUT Table A-Side Entry 50" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6CC++0x3 line.long 0x00 "ENTRY_51,LUT Table A-Side Entry 51" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6D0++0x3 line.long 0x00 "ENTRY_52,LUT Table A-Side Entry 52" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6D4++0x3 line.long 0x00 "ENTRY_53,LUT Table A-Side Entry 53" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6D8++0x3 line.long 0x00 "ENTRY_54,LUT Table A-Side Entry 54" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6DC++0x3 line.long 0x00 "ENTRY_55,LUT Table A-Side Entry 55" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6E0++0x3 line.long 0x00 "ENTRY_56,LUT Table A-Side Entry 56" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6E4++0x3 line.long 0x00 "ENTRY_57,LUT Table A-Side Entry 57" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6E8++0x3 line.long 0x00 "ENTRY_58,LUT Table A-Side Entry 58" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6EC++0x3 line.long 0x00 "ENTRY_59,LUT Table A-Side Entry 59" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6F0++0x3 line.long 0x00 "ENTRY_60,LUT Table A-Side Entry 60" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6F4++0x3 line.long 0x00 "ENTRY_61,LUT Table A-Side Entry 61" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6F8++0x3 line.long 0x00 "ENTRY_62,LUT Table A-Side Entry 62" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x6FC++0x3 line.long 0x00 "ENTRY_63,LUT Table A-Side Entry 63" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x700++0x3 line.long 0x00 "ENTRY_64,LUT Table A-Side Entry 64" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x704++0x3 line.long 0x00 "ENTRY_65,LUT Table A-Side Entry 65" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x708++0x3 line.long 0x00 "ENTRY_66,LUT Table A-Side Entry 66" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x70C++0x3 line.long 0x00 "ENTRY_67,LUT Table A-Side Entry 67" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x710++0x3 line.long 0x00 "ENTRY_68,LUT Table A-Side Entry 68" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x714++0x3 line.long 0x00 "ENTRY_69,LUT Table A-Side Entry 69" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x718++0x3 line.long 0x00 "ENTRY_70,LUT Table A-Side Entry 70" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x71C++0x3 line.long 0x00 "ENTRY_71,LUT Table A-Side Entry 71" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x720++0x3 line.long 0x00 "ENTRY_72,LUT Table A-Side Entry 72" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x724++0x3 line.long 0x00 "ENTRY_73,LUT Table A-Side Entry 73" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x728++0x3 line.long 0x00 "ENTRY_74,LUT Table A-Side Entry 74" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x72C++0x3 line.long 0x00 "ENTRY_75,LUT Table A-Side Entry 75" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x730++0x3 line.long 0x00 "ENTRY_76,LUT Table A-Side Entry 76" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x734++0x3 line.long 0x00 "ENTRY_77,LUT Table A-Side Entry 77" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x738++0x3 line.long 0x00 "ENTRY_78,LUT Table A-Side Entry 78" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x73C++0x3 line.long 0x00 "ENTRY_79,LUT Table A-Side Entry 79" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x740++0x3 line.long 0x00 "ENTRY_80,LUT Table A-Side Entry 80" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x744++0x3 line.long 0x00 "ENTRY_81,LUT Table A-Side Entry 81" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x748++0x3 line.long 0x00 "ENTRY_82,LUT Table A-Side Entry 82" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x74C++0x3 line.long 0x00 "ENTRY_83,LUT Table A-Side Entry 83" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x750++0x3 line.long 0x00 "ENTRY_84,LUT Table A-Side Entry 84" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x754++0x3 line.long 0x00 "ENTRY_85,LUT Table A-Side Entry 85" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x758++0x3 line.long 0x00 "ENTRY_86,LUT Table A-Side Entry 86" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x75C++0x3 line.long 0x00 "ENTRY_87,LUT Table A-Side Entry 87" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x760++0x3 line.long 0x00 "ENTRY_88,LUT Table A-Side Entry 88" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x764++0x3 line.long 0x00 "ENTRY_89,LUT Table A-Side Entry 89" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x768++0x3 line.long 0x00 "ENTRY_90,LUT Table A-Side Entry 90" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x76C++0x3 line.long 0x00 "ENTRY_91,LUT Table A-Side Entry 91" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x770++0x3 line.long 0x00 "ENTRY_92,LUT Table A-Side Entry 92" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x774++0x3 line.long 0x00 "ENTRY_93,LUT Table A-Side Entry 93" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x778++0x3 line.long 0x00 "ENTRY_94,LUT Table A-Side Entry 94" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x77C++0x3 line.long 0x00 "ENTRY_95,LUT Table A-Side Entry 95" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x780++0x3 line.long 0x00 "ENTRY_96,LUT Table A-Side Entry 96" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x784++0x3 line.long 0x00 "ENTRY_97,LUT Table A-Side Entry 97" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x788++0x3 line.long 0x00 "ENTRY_98,LUT Table A-Side Entry 98" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x78C++0x3 line.long 0x00 "ENTRY_99,LUT Table A-Side Entry 99" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x790++0x3 line.long 0x00 "ENTRY_100,LUT Table A-Side Entry 100" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x794++0x3 line.long 0x00 "ENTRY_101,LUT Table A-Side Entry 101" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x798++0x3 line.long 0x00 "ENTRY_102,LUT Table A-Side Entry 102" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x79C++0x3 line.long 0x00 "ENTRY_103,LUT Table A-Side Entry 103" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7A0++0x3 line.long 0x00 "ENTRY_104,LUT Table A-Side Entry 104" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7A4++0x3 line.long 0x00 "ENTRY_105,LUT Table A-Side Entry 105" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7A8++0x3 line.long 0x00 "ENTRY_106,LUT Table A-Side Entry 106" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7AC++0x3 line.long 0x00 "ENTRY_107,LUT Table A-Side Entry 107" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7B0++0x3 line.long 0x00 "ENTRY_108,LUT Table A-Side Entry 108" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7B4++0x3 line.long 0x00 "ENTRY_109,LUT Table A-Side Entry 109" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7B8++0x3 line.long 0x00 "ENTRY_110,LUT Table A-Side Entry 110" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7BC++0x3 line.long 0x00 "ENTRY_111,LUT Table A-Side Entry 111" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7C0++0x3 line.long 0x00 "ENTRY_112,LUT Table A-Side Entry 112" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7C4++0x3 line.long 0x00 "ENTRY_113,LUT Table A-Side Entry 113" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7C8++0x3 line.long 0x00 "ENTRY_114,LUT Table A-Side Entry 114" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7CC++0x3 line.long 0x00 "ENTRY_115,LUT Table A-Side Entry 115" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7D0++0x3 line.long 0x00 "ENTRY_116,LUT Table A-Side Entry 116" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7D4++0x3 line.long 0x00 "ENTRY_117,LUT Table A-Side Entry 117" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7D8++0x3 line.long 0x00 "ENTRY_118,LUT Table A-Side Entry 118" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7DC++0x3 line.long 0x00 "ENTRY_119,LUT Table A-Side Entry 119" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7E0++0x3 line.long 0x00 "ENTRY_120,LUT Table A-Side Entry 120" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7E4++0x3 line.long 0x00 "ENTRY_121,LUT Table A-Side Entry 121" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7E8++0x3 line.long 0x00 "ENTRY_122,LUT Table A-Side Entry 122" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7EC++0x3 line.long 0x00 "ENTRY_123,LUT Table A-Side Entry 123" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7F0++0x3 line.long 0x00 "ENTRY_124,LUT Table A-Side Entry 124" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7F4++0x3 line.long 0x00 "ENTRY_125,LUT Table A-Side Entry 125" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7F8++0x3 line.long 0x00 "ENTRY_126,LUT Table A-Side Entry 126" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x7FC++0x3 line.long 0x00 "ENTRY_127,LUT Table A-Side Entry 127" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x800++0x3 line.long 0x00 "ENTRY_128,LUT Table A-Side Entry 128" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x804++0x3 line.long 0x00 "ENTRY_129,LUT Table A-Side Entry 129" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x808++0x3 line.long 0x00 "ENTRY_130,LUT Table A-Side Entry 130" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x80C++0x3 line.long 0x00 "ENTRY_131,LUT Table A-Side Entry 131" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x810++0x3 line.long 0x00 "ENTRY_132,LUT Table A-Side Entry 132" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x814++0x3 line.long 0x00 "ENTRY_133,LUT Table A-Side Entry 133" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x818++0x3 line.long 0x00 "ENTRY_134,LUT Table A-Side Entry 134" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x81C++0x3 line.long 0x00 "ENTRY_135,LUT Table A-Side Entry 135" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x820++0x3 line.long 0x00 "ENTRY_136,LUT Table A-Side Entry 136" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x824++0x3 line.long 0x00 "ENTRY_137,LUT Table A-Side Entry 137" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x828++0x3 line.long 0x00 "ENTRY_138,LUT Table A-Side Entry 138" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x82C++0x3 line.long 0x00 "ENTRY_139,LUT Table A-Side Entry 139" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x830++0x3 line.long 0x00 "ENTRY_140,LUT Table A-Side Entry 140" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x834++0x3 line.long 0x00 "ENTRY_141,LUT Table A-Side Entry 141" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x838++0x3 line.long 0x00 "ENTRY_142,LUT Table A-Side Entry 142" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x83C++0x3 line.long 0x00 "ENTRY_143,LUT Table A-Side Entry 143" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x840++0x3 line.long 0x00 "ENTRY_144,LUT Table A-Side Entry 144" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x844++0x3 line.long 0x00 "ENTRY_145,LUT Table A-Side Entry 145" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x848++0x3 line.long 0x00 "ENTRY_146,LUT Table A-Side Entry 146" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x84C++0x3 line.long 0x00 "ENTRY_147,LUT Table A-Side Entry 147" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x850++0x3 line.long 0x00 "ENTRY_148,LUT Table A-Side Entry 148" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x854++0x3 line.long 0x00 "ENTRY_149,LUT Table A-Side Entry 149" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x858++0x3 line.long 0x00 "ENTRY_150,LUT Table A-Side Entry 150" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x85C++0x3 line.long 0x00 "ENTRY_151,LUT Table A-Side Entry 151" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x860++0x3 line.long 0x00 "ENTRY_152,LUT Table A-Side Entry 152" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x864++0x3 line.long 0x00 "ENTRY_153,LUT Table A-Side Entry 153" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x868++0x3 line.long 0x00 "ENTRY_154,LUT Table A-Side Entry 154" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x86C++0x3 line.long 0x00 "ENTRY_155,LUT Table A-Side Entry 155" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x870++0x3 line.long 0x00 "ENTRY_156,LUT Table A-Side Entry 156" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x874++0x3 line.long 0x00 "ENTRY_157,LUT Table A-Side Entry 157" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x878++0x3 line.long 0x00 "ENTRY_158,LUT Table A-Side Entry 158" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x87C++0x3 line.long 0x00 "ENTRY_159,LUT Table A-Side Entry 159" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x880++0x3 line.long 0x00 "ENTRY_160,LUT Table A-Side Entry 160" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x884++0x3 line.long 0x00 "ENTRY_161,LUT Table A-Side Entry 161" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x888++0x3 line.long 0x00 "ENTRY_162,LUT Table A-Side Entry 162" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x88C++0x3 line.long 0x00 "ENTRY_163,LUT Table A-Side Entry 163" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x890++0x3 line.long 0x00 "ENTRY_164,LUT Table A-Side Entry 164" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x894++0x3 line.long 0x00 "ENTRY_165,LUT Table A-Side Entry 165" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x898++0x3 line.long 0x00 "ENTRY_166,LUT Table A-Side Entry 166" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x89C++0x3 line.long 0x00 "ENTRY_167,LUT Table A-Side Entry 167" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8A0++0x3 line.long 0x00 "ENTRY_168,LUT Table A-Side Entry 168" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8A4++0x3 line.long 0x00 "ENTRY_169,LUT Table A-Side Entry 169" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8A8++0x3 line.long 0x00 "ENTRY_170,LUT Table A-Side Entry 170" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8AC++0x3 line.long 0x00 "ENTRY_171,LUT Table A-Side Entry 171" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8B0++0x3 line.long 0x00 "ENTRY_172,LUT Table A-Side Entry 172" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8B4++0x3 line.long 0x00 "ENTRY_173,LUT Table A-Side Entry 173" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8B8++0x3 line.long 0x00 "ENTRY_174,LUT Table A-Side Entry 174" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8BC++0x3 line.long 0x00 "ENTRY_175,LUT Table A-Side Entry 175" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8C0++0x3 line.long 0x00 "ENTRY_176,LUT Table A-Side Entry 176" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8C4++0x3 line.long 0x00 "ENTRY_177,LUT Table A-Side Entry 177" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8C8++0x3 line.long 0x00 "ENTRY_178,LUT Table A-Side Entry 178" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8CC++0x3 line.long 0x00 "ENTRY_179,LUT Table A-Side Entry 179" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8D0++0x3 line.long 0x00 "ENTRY_180,LUT Table A-Side Entry 180" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8D4++0x3 line.long 0x00 "ENTRY_181,LUT Table A-Side Entry 181" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8D8++0x3 line.long 0x00 "ENTRY_182,LUT Table A-Side Entry 182" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8DC++0x3 line.long 0x00 "ENTRY_183,LUT Table A-Side Entry 183" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8E0++0x3 line.long 0x00 "ENTRY_184,LUT Table A-Side Entry 184" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8E4++0x3 line.long 0x00 "ENTRY_185,LUT Table A-Side Entry 185" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8E8++0x3 line.long 0x00 "ENTRY_186,LUT Table A-Side Entry 186" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8EC++0x3 line.long 0x00 "ENTRY_187,LUT Table A-Side Entry 187" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8F0++0x3 line.long 0x00 "ENTRY_188,LUT Table A-Side Entry 188" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8F4++0x3 line.long 0x00 "ENTRY_189,LUT Table A-Side Entry 189" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8F8++0x3 line.long 0x00 "ENTRY_190,LUT Table A-Side Entry 190" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x8FC++0x3 line.long 0x00 "ENTRY_191,LUT Table A-Side Entry 191" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x900++0x3 line.long 0x00 "ENTRY_192,LUT Table A-Side Entry 192" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x904++0x3 line.long 0x00 "ENTRY_193,LUT Table A-Side Entry 193" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x908++0x3 line.long 0x00 "ENTRY_194,LUT Table A-Side Entry 194" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x90C++0x3 line.long 0x00 "ENTRY_195,LUT Table A-Side Entry 195" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x910++0x3 line.long 0x00 "ENTRY_196,LUT Table A-Side Entry 196" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x914++0x3 line.long 0x00 "ENTRY_197,LUT Table A-Side Entry 197" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x918++0x3 line.long 0x00 "ENTRY_198,LUT Table A-Side Entry 198" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x91C++0x3 line.long 0x00 "ENTRY_199,LUT Table A-Side Entry 199" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x920++0x3 line.long 0x00 "ENTRY_200,LUT Table A-Side Entry 200" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x924++0x3 line.long 0x00 "ENTRY_201,LUT Table A-Side Entry 201" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x928++0x3 line.long 0x00 "ENTRY_202,LUT Table A-Side Entry 202" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x92C++0x3 line.long 0x00 "ENTRY_203,LUT Table A-Side Entry 203" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x930++0x3 line.long 0x00 "ENTRY_204,LUT Table A-Side Entry 204" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x934++0x3 line.long 0x00 "ENTRY_205,LUT Table A-Side Entry 205" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x938++0x3 line.long 0x00 "ENTRY_206,LUT Table A-Side Entry 206" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x93C++0x3 line.long 0x00 "ENTRY_207,LUT Table A-Side Entry 207" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x940++0x3 line.long 0x00 "ENTRY_208,LUT Table A-Side Entry 208" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x944++0x3 line.long 0x00 "ENTRY_209,LUT Table A-Side Entry 209" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x948++0x3 line.long 0x00 "ENTRY_210,LUT Table A-Side Entry 210" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x94C++0x3 line.long 0x00 "ENTRY_211,LUT Table A-Side Entry 211" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x950++0x3 line.long 0x00 "ENTRY_212,LUT Table A-Side Entry 212" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x954++0x3 line.long 0x00 "ENTRY_213,LUT Table A-Side Entry 213" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x958++0x3 line.long 0x00 "ENTRY_214,LUT Table A-Side Entry 214" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x95C++0x3 line.long 0x00 "ENTRY_215,LUT Table A-Side Entry 215" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x960++0x3 line.long 0x00 "ENTRY_216,LUT Table A-Side Entry 216" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x964++0x3 line.long 0x00 "ENTRY_217,LUT Table A-Side Entry 217" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x968++0x3 line.long 0x00 "ENTRY_218,LUT Table A-Side Entry 218" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x96C++0x3 line.long 0x00 "ENTRY_219,LUT Table A-Side Entry 219" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x970++0x3 line.long 0x00 "ENTRY_220,LUT Table A-Side Entry 220" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x974++0x3 line.long 0x00 "ENTRY_221,LUT Table A-Side Entry 221" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x978++0x3 line.long 0x00 "ENTRY_222,LUT Table A-Side Entry 222" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x97C++0x3 line.long 0x00 "ENTRY_223,LUT Table A-Side Entry 223" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x980++0x3 line.long 0x00 "ENTRY_224,LUT Table A-Side Entry 224" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x984++0x3 line.long 0x00 "ENTRY_225,LUT Table A-Side Entry 225" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x988++0x3 line.long 0x00 "ENTRY_226,LUT Table A-Side Entry 226" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x98C++0x3 line.long 0x00 "ENTRY_227,LUT Table A-Side Entry 227" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x990++0x3 line.long 0x00 "ENTRY_228,LUT Table A-Side Entry 228" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x994++0x3 line.long 0x00 "ENTRY_229,LUT Table A-Side Entry 229" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x998++0x3 line.long 0x00 "ENTRY_230,LUT Table A-Side Entry 230" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x99C++0x3 line.long 0x00 "ENTRY_231,LUT Table A-Side Entry 231" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9A0++0x3 line.long 0x00 "ENTRY_232,LUT Table A-Side Entry 232" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9A4++0x3 line.long 0x00 "ENTRY_233,LUT Table A-Side Entry 233" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9A8++0x3 line.long 0x00 "ENTRY_234,LUT Table A-Side Entry 234" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9AC++0x3 line.long 0x00 "ENTRY_235,LUT Table A-Side Entry 235" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9B0++0x3 line.long 0x00 "ENTRY_236,LUT Table A-Side Entry 236" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9B4++0x3 line.long 0x00 "ENTRY_237,LUT Table A-Side Entry 237" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9B8++0x3 line.long 0x00 "ENTRY_238,LUT Table A-Side Entry 238" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9BC++0x3 line.long 0x00 "ENTRY_239,LUT Table A-Side Entry 239" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9C0++0x3 line.long 0x00 "ENTRY_240,LUT Table A-Side Entry 240" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9C4++0x3 line.long 0x00 "ENTRY_241,LUT Table A-Side Entry 241" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9C8++0x3 line.long 0x00 "ENTRY_242,LUT Table A-Side Entry 242" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9CC++0x3 line.long 0x00 "ENTRY_243,LUT Table A-Side Entry 243" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9D0++0x3 line.long 0x00 "ENTRY_244,LUT Table A-Side Entry 244" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9D4++0x3 line.long 0x00 "ENTRY_245,LUT Table A-Side Entry 245" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9D8++0x3 line.long 0x00 "ENTRY_246,LUT Table A-Side Entry 246" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9DC++0x3 line.long 0x00 "ENTRY_247,LUT Table A-Side Entry 247" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9E0++0x3 line.long 0x00 "ENTRY_248,LUT Table A-Side Entry 248" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9E4++0x3 line.long 0x00 "ENTRY_249,LUT Table A-Side Entry 249" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9E8++0x3 line.long 0x00 "ENTRY_250,LUT Table A-Side Entry 250" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9EC++0x3 line.long 0x00 "ENTRY_251,LUT Table A-Side Entry 251" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9F0++0x3 line.long 0x00 "ENTRY_252,LUT Table A-Side Entry 252" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9F4++0x3 line.long 0x00 "ENTRY_253,LUT Table A-Side Entry 253" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9F8++0x3 line.long 0x00 "ENTRY_254,LUT Table A-Side Entry 254" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0x9FC++0x3 line.long 0x00 "ENTRY_255,LUT Table A-Side Entry 255" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" endif tree.end tree "1D-LUT Table B-Side (Entries 0 - 256)" width 11. if (((per.l(ad:0xFE680000+0x000)&0x1))==0x01) rgroup.long 0xB00++0x03 line.long 0x00 "ENTRY_0,LUT Table B-Side Entry 0" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB04++0x03 line.long 0x00 "ENTRY_1,LUT Table B-Side Entry 1" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB08++0x03 line.long 0x00 "ENTRY_2,LUT Table B-Side Entry 2" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB0C++0x03 line.long 0x00 "ENTRY_3,LUT Table B-Side Entry 3" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB10++0x03 line.long 0x00 "ENTRY_4,LUT Table B-Side Entry 4" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB14++0x03 line.long 0x00 "ENTRY_5,LUT Table B-Side Entry 5" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB18++0x03 line.long 0x00 "ENTRY_6,LUT Table B-Side Entry 6" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB1C++0x03 line.long 0x00 "ENTRY_7,LUT Table B-Side Entry 7" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB20++0x03 line.long 0x00 "ENTRY_8,LUT Table B-Side Entry 8" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB24++0x03 line.long 0x00 "ENTRY_9,LUT Table B-Side Entry 9" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB28++0x03 line.long 0x00 "ENTRY_10,LUT Table B-Side Entry 10" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB2C++0x03 line.long 0x00 "ENTRY_11,LUT Table B-Side Entry 11" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB30++0x03 line.long 0x00 "ENTRY_12,LUT Table B-Side Entry 12" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB34++0x03 line.long 0x00 "ENTRY_13,LUT Table B-Side Entry 13" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB38++0x03 line.long 0x00 "ENTRY_14,LUT Table B-Side Entry 14" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB3C++0x03 line.long 0x00 "ENTRY_15,LUT Table B-Side Entry 15" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB40++0x03 line.long 0x00 "ENTRY_16,LUT Table B-Side Entry 16" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB44++0x03 line.long 0x00 "ENTRY_17,LUT Table B-Side Entry 17" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB48++0x03 line.long 0x00 "ENTRY_18,LUT Table B-Side Entry 18" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB4C++0x03 line.long 0x00 "ENTRY_19,LUT Table B-Side Entry 19" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB50++0x03 line.long 0x00 "ENTRY_20,LUT Table B-Side Entry 20" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB54++0x03 line.long 0x00 "ENTRY_21,LUT Table B-Side Entry 21" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB58++0x03 line.long 0x00 "ENTRY_22,LUT Table B-Side Entry 22" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB5C++0x03 line.long 0x00 "ENTRY_23,LUT Table B-Side Entry 23" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB60++0x03 line.long 0x00 "ENTRY_24,LUT Table B-Side Entry 24" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB64++0x03 line.long 0x00 "ENTRY_25,LUT Table B-Side Entry 25" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB68++0x03 line.long 0x00 "ENTRY_26,LUT Table B-Side Entry 26" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB6C++0x03 line.long 0x00 "ENTRY_27,LUT Table B-Side Entry 27" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB70++0x03 line.long 0x00 "ENTRY_28,LUT Table B-Side Entry 28" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB74++0x03 line.long 0x00 "ENTRY_29,LUT Table B-Side Entry 29" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB78++0x03 line.long 0x00 "ENTRY_30,LUT Table B-Side Entry 30" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB7C++0x03 line.long 0x00 "ENTRY_31,LUT Table B-Side Entry 31" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB80++0x03 line.long 0x00 "ENTRY_32,LUT Table B-Side Entry 32" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB84++0x03 line.long 0x00 "ENTRY_33,LUT Table B-Side Entry 33" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB88++0x03 line.long 0x00 "ENTRY_34,LUT Table B-Side Entry 34" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB8C++0x03 line.long 0x00 "ENTRY_35,LUT Table B-Side Entry 35" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB90++0x03 line.long 0x00 "ENTRY_36,LUT Table B-Side Entry 36" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB94++0x03 line.long 0x00 "ENTRY_37,LUT Table B-Side Entry 37" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB98++0x03 line.long 0x00 "ENTRY_38,LUT Table B-Side Entry 38" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xB9C++0x03 line.long 0x00 "ENTRY_39,LUT Table B-Side Entry 39" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBA0++0x03 line.long 0x00 "ENTRY_40,LUT Table B-Side Entry 40" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBA4++0x03 line.long 0x00 "ENTRY_41,LUT Table B-Side Entry 41" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBA8++0x03 line.long 0x00 "ENTRY_42,LUT Table B-Side Entry 42" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBAC++0x03 line.long 0x00 "ENTRY_43,LUT Table B-Side Entry 43" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBB0++0x03 line.long 0x00 "ENTRY_44,LUT Table B-Side Entry 44" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBB4++0x03 line.long 0x00 "ENTRY_45,LUT Table B-Side Entry 45" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBB8++0x03 line.long 0x00 "ENTRY_46,LUT Table B-Side Entry 46" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBBC++0x03 line.long 0x00 "ENTRY_47,LUT Table B-Side Entry 47" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBC0++0x03 line.long 0x00 "ENTRY_48,LUT Table B-Side Entry 48" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBC4++0x03 line.long 0x00 "ENTRY_49,LUT Table B-Side Entry 49" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBC8++0x03 line.long 0x00 "ENTRY_50,LUT Table B-Side Entry 50" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBCC++0x03 line.long 0x00 "ENTRY_51,LUT Table B-Side Entry 51" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBD0++0x03 line.long 0x00 "ENTRY_52,LUT Table B-Side Entry 52" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBD4++0x03 line.long 0x00 "ENTRY_53,LUT Table B-Side Entry 53" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBD8++0x03 line.long 0x00 "ENTRY_54,LUT Table B-Side Entry 54" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBDC++0x03 line.long 0x00 "ENTRY_55,LUT Table B-Side Entry 55" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBE0++0x03 line.long 0x00 "ENTRY_56,LUT Table B-Side Entry 56" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBE4++0x03 line.long 0x00 "ENTRY_57,LUT Table B-Side Entry 57" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBE8++0x03 line.long 0x00 "ENTRY_58,LUT Table B-Side Entry 58" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBEC++0x03 line.long 0x00 "ENTRY_59,LUT Table B-Side Entry 59" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBF0++0x03 line.long 0x00 "ENTRY_60,LUT Table B-Side Entry 60" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBF4++0x03 line.long 0x00 "ENTRY_61,LUT Table B-Side Entry 61" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBF8++0x03 line.long 0x00 "ENTRY_62,LUT Table B-Side Entry 62" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xBFC++0x03 line.long 0x00 "ENTRY_63,LUT Table B-Side Entry 63" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC00++0x03 line.long 0x00 "ENTRY_64,LUT Table B-Side Entry 64" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC04++0x03 line.long 0x00 "ENTRY_65,LUT Table B-Side Entry 65" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC08++0x03 line.long 0x00 "ENTRY_66,LUT Table B-Side Entry 66" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC0C++0x03 line.long 0x00 "ENTRY_67,LUT Table B-Side Entry 67" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC10++0x03 line.long 0x00 "ENTRY_68,LUT Table B-Side Entry 68" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC14++0x03 line.long 0x00 "ENTRY_69,LUT Table B-Side Entry 69" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC18++0x03 line.long 0x00 "ENTRY_70,LUT Table B-Side Entry 70" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC1C++0x03 line.long 0x00 "ENTRY_71,LUT Table B-Side Entry 71" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC20++0x03 line.long 0x00 "ENTRY_72,LUT Table B-Side Entry 72" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC24++0x03 line.long 0x00 "ENTRY_73,LUT Table B-Side Entry 73" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC28++0x03 line.long 0x00 "ENTRY_74,LUT Table B-Side Entry 74" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC2C++0x03 line.long 0x00 "ENTRY_75,LUT Table B-Side Entry 75" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC30++0x03 line.long 0x00 "ENTRY_76,LUT Table B-Side Entry 76" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC34++0x03 line.long 0x00 "ENTRY_77,LUT Table B-Side Entry 77" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC38++0x03 line.long 0x00 "ENTRY_78,LUT Table B-Side Entry 78" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC3C++0x03 line.long 0x00 "ENTRY_79,LUT Table B-Side Entry 79" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC40++0x03 line.long 0x00 "ENTRY_80,LUT Table B-Side Entry 80" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC44++0x03 line.long 0x00 "ENTRY_81,LUT Table B-Side Entry 81" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC48++0x03 line.long 0x00 "ENTRY_82,LUT Table B-Side Entry 82" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC4C++0x03 line.long 0x00 "ENTRY_83,LUT Table B-Side Entry 83" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC50++0x03 line.long 0x00 "ENTRY_84,LUT Table B-Side Entry 84" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC54++0x03 line.long 0x00 "ENTRY_85,LUT Table B-Side Entry 85" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC58++0x03 line.long 0x00 "ENTRY_86,LUT Table B-Side Entry 86" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC5C++0x03 line.long 0x00 "ENTRY_87,LUT Table B-Side Entry 87" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC60++0x03 line.long 0x00 "ENTRY_88,LUT Table B-Side Entry 88" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC64++0x03 line.long 0x00 "ENTRY_89,LUT Table B-Side Entry 89" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC68++0x03 line.long 0x00 "ENTRY_90,LUT Table B-Side Entry 90" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC6C++0x03 line.long 0x00 "ENTRY_91,LUT Table B-Side Entry 91" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC70++0x03 line.long 0x00 "ENTRY_92,LUT Table B-Side Entry 92" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC74++0x03 line.long 0x00 "ENTRY_93,LUT Table B-Side Entry 93" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC78++0x03 line.long 0x00 "ENTRY_94,LUT Table B-Side Entry 94" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC7C++0x03 line.long 0x00 "ENTRY_95,LUT Table B-Side Entry 95" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC80++0x03 line.long 0x00 "ENTRY_96,LUT Table B-Side Entry 96" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC84++0x03 line.long 0x00 "ENTRY_97,LUT Table B-Side Entry 97" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC88++0x03 line.long 0x00 "ENTRY_98,LUT Table B-Side Entry 98" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC8C++0x03 line.long 0x00 "ENTRY_99,LUT Table B-Side Entry 99" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC90++0x03 line.long 0x00 "ENTRY_100,LUT Table B-Side Entry 100" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC94++0x03 line.long 0x00 "ENTRY_101,LUT Table B-Side Entry 101" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC98++0x03 line.long 0x00 "ENTRY_102,LUT Table B-Side Entry 102" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xC9C++0x03 line.long 0x00 "ENTRY_103,LUT Table B-Side Entry 103" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCA0++0x03 line.long 0x00 "ENTRY_104,LUT Table B-Side Entry 104" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCA4++0x03 line.long 0x00 "ENTRY_105,LUT Table B-Side Entry 105" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCA8++0x03 line.long 0x00 "ENTRY_106,LUT Table B-Side Entry 106" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCAC++0x03 line.long 0x00 "ENTRY_107,LUT Table B-Side Entry 107" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCB0++0x03 line.long 0x00 "ENTRY_108,LUT Table B-Side Entry 108" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCB4++0x03 line.long 0x00 "ENTRY_109,LUT Table B-Side Entry 109" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCB8++0x03 line.long 0x00 "ENTRY_110,LUT Table B-Side Entry 110" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCBC++0x03 line.long 0x00 "ENTRY_111,LUT Table B-Side Entry 111" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCC0++0x03 line.long 0x00 "ENTRY_112,LUT Table B-Side Entry 112" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCC4++0x03 line.long 0x00 "ENTRY_113,LUT Table B-Side Entry 113" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCC8++0x03 line.long 0x00 "ENTRY_114,LUT Table B-Side Entry 114" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCCC++0x03 line.long 0x00 "ENTRY_115,LUT Table B-Side Entry 115" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCD0++0x03 line.long 0x00 "ENTRY_116,LUT Table B-Side Entry 116" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCD4++0x03 line.long 0x00 "ENTRY_117,LUT Table B-Side Entry 117" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCD8++0x03 line.long 0x00 "ENTRY_118,LUT Table B-Side Entry 118" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCDC++0x03 line.long 0x00 "ENTRY_119,LUT Table B-Side Entry 119" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCE0++0x03 line.long 0x00 "ENTRY_120,LUT Table B-Side Entry 120" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCE4++0x03 line.long 0x00 "ENTRY_121,LUT Table B-Side Entry 121" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCE8++0x03 line.long 0x00 "ENTRY_122,LUT Table B-Side Entry 122" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCEC++0x03 line.long 0x00 "ENTRY_123,LUT Table B-Side Entry 123" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCF0++0x03 line.long 0x00 "ENTRY_124,LUT Table B-Side Entry 124" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCF4++0x03 line.long 0x00 "ENTRY_125,LUT Table B-Side Entry 125" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCF8++0x03 line.long 0x00 "ENTRY_126,LUT Table B-Side Entry 126" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xCFC++0x03 line.long 0x00 "ENTRY_127,LUT Table B-Side Entry 127" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD00++0x03 line.long 0x00 "ENTRY_128,LUT Table B-Side Entry 128" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD04++0x03 line.long 0x00 "ENTRY_129,LUT Table B-Side Entry 129" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD08++0x03 line.long 0x00 "ENTRY_130,LUT Table B-Side Entry 130" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD0C++0x03 line.long 0x00 "ENTRY_131,LUT Table B-Side Entry 131" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD10++0x03 line.long 0x00 "ENTRY_132,LUT Table B-Side Entry 132" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD14++0x03 line.long 0x00 "ENTRY_133,LUT Table B-Side Entry 133" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD18++0x03 line.long 0x00 "ENTRY_134,LUT Table B-Side Entry 134" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD1C++0x03 line.long 0x00 "ENTRY_135,LUT Table B-Side Entry 135" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD20++0x03 line.long 0x00 "ENTRY_136,LUT Table B-Side Entry 136" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD24++0x03 line.long 0x00 "ENTRY_137,LUT Table B-Side Entry 137" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD28++0x03 line.long 0x00 "ENTRY_138,LUT Table B-Side Entry 138" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD2C++0x03 line.long 0x00 "ENTRY_139,LUT Table B-Side Entry 139" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD30++0x03 line.long 0x00 "ENTRY_140,LUT Table B-Side Entry 140" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD34++0x03 line.long 0x00 "ENTRY_141,LUT Table B-Side Entry 141" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD38++0x03 line.long 0x00 "ENTRY_142,LUT Table B-Side Entry 142" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD3C++0x03 line.long 0x00 "ENTRY_143,LUT Table B-Side Entry 143" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD40++0x03 line.long 0x00 "ENTRY_144,LUT Table B-Side Entry 144" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD44++0x03 line.long 0x00 "ENTRY_145,LUT Table B-Side Entry 145" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD48++0x03 line.long 0x00 "ENTRY_146,LUT Table B-Side Entry 146" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD4C++0x03 line.long 0x00 "ENTRY_147,LUT Table B-Side Entry 147" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD50++0x03 line.long 0x00 "ENTRY_148,LUT Table B-Side Entry 148" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD54++0x03 line.long 0x00 "ENTRY_149,LUT Table B-Side Entry 149" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD58++0x03 line.long 0x00 "ENTRY_150,LUT Table B-Side Entry 150" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD5C++0x03 line.long 0x00 "ENTRY_151,LUT Table B-Side Entry 151" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD60++0x03 line.long 0x00 "ENTRY_152,LUT Table B-Side Entry 152" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD64++0x03 line.long 0x00 "ENTRY_153,LUT Table B-Side Entry 153" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD68++0x03 line.long 0x00 "ENTRY_154,LUT Table B-Side Entry 154" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD6C++0x03 line.long 0x00 "ENTRY_155,LUT Table B-Side Entry 155" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD70++0x03 line.long 0x00 "ENTRY_156,LUT Table B-Side Entry 156" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD74++0x03 line.long 0x00 "ENTRY_157,LUT Table B-Side Entry 157" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD78++0x03 line.long 0x00 "ENTRY_158,LUT Table B-Side Entry 158" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD7C++0x03 line.long 0x00 "ENTRY_159,LUT Table B-Side Entry 159" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD80++0x03 line.long 0x00 "ENTRY_160,LUT Table B-Side Entry 160" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD84++0x03 line.long 0x00 "ENTRY_161,LUT Table B-Side Entry 161" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD88++0x03 line.long 0x00 "ENTRY_162,LUT Table B-Side Entry 162" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD8C++0x03 line.long 0x00 "ENTRY_163,LUT Table B-Side Entry 163" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD90++0x03 line.long 0x00 "ENTRY_164,LUT Table B-Side Entry 164" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD94++0x03 line.long 0x00 "ENTRY_165,LUT Table B-Side Entry 165" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD98++0x03 line.long 0x00 "ENTRY_166,LUT Table B-Side Entry 166" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xD9C++0x03 line.long 0x00 "ENTRY_167,LUT Table B-Side Entry 167" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDA0++0x03 line.long 0x00 "ENTRY_168,LUT Table B-Side Entry 168" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDA4++0x03 line.long 0x00 "ENTRY_169,LUT Table B-Side Entry 169" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDA8++0x03 line.long 0x00 "ENTRY_170,LUT Table B-Side Entry 170" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDAC++0x03 line.long 0x00 "ENTRY_171,LUT Table B-Side Entry 171" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDB0++0x03 line.long 0x00 "ENTRY_172,LUT Table B-Side Entry 172" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDB4++0x03 line.long 0x00 "ENTRY_173,LUT Table B-Side Entry 173" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDB8++0x03 line.long 0x00 "ENTRY_174,LUT Table B-Side Entry 174" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDBC++0x03 line.long 0x00 "ENTRY_175,LUT Table B-Side Entry 175" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDC0++0x03 line.long 0x00 "ENTRY_176,LUT Table B-Side Entry 176" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDC4++0x03 line.long 0x00 "ENTRY_177,LUT Table B-Side Entry 177" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDC8++0x03 line.long 0x00 "ENTRY_178,LUT Table B-Side Entry 178" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDCC++0x03 line.long 0x00 "ENTRY_179,LUT Table B-Side Entry 179" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDD0++0x03 line.long 0x00 "ENTRY_180,LUT Table B-Side Entry 180" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDD4++0x03 line.long 0x00 "ENTRY_181,LUT Table B-Side Entry 181" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDD8++0x03 line.long 0x00 "ENTRY_182,LUT Table B-Side Entry 182" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDDC++0x03 line.long 0x00 "ENTRY_183,LUT Table B-Side Entry 183" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDE0++0x03 line.long 0x00 "ENTRY_184,LUT Table B-Side Entry 184" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDE4++0x03 line.long 0x00 "ENTRY_185,LUT Table B-Side Entry 185" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDE8++0x03 line.long 0x00 "ENTRY_186,LUT Table B-Side Entry 186" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDEC++0x03 line.long 0x00 "ENTRY_187,LUT Table B-Side Entry 187" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDF0++0x03 line.long 0x00 "ENTRY_188,LUT Table B-Side Entry 188" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDF4++0x03 line.long 0x00 "ENTRY_189,LUT Table B-Side Entry 189" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDF8++0x03 line.long 0x00 "ENTRY_190,LUT Table B-Side Entry 190" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xDFC++0x03 line.long 0x00 "ENTRY_191,LUT Table B-Side Entry 191" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE00++0x03 line.long 0x00 "ENTRY_192,LUT Table B-Side Entry 192" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE04++0x03 line.long 0x00 "ENTRY_193,LUT Table B-Side Entry 193" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE08++0x03 line.long 0x00 "ENTRY_194,LUT Table B-Side Entry 194" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE0C++0x03 line.long 0x00 "ENTRY_195,LUT Table B-Side Entry 195" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE10++0x03 line.long 0x00 "ENTRY_196,LUT Table B-Side Entry 196" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE14++0x03 line.long 0x00 "ENTRY_197,LUT Table B-Side Entry 197" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE18++0x03 line.long 0x00 "ENTRY_198,LUT Table B-Side Entry 198" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE1C++0x03 line.long 0x00 "ENTRY_199,LUT Table B-Side Entry 199" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE20++0x03 line.long 0x00 "ENTRY_200,LUT Table B-Side Entry 200" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE24++0x03 line.long 0x00 "ENTRY_201,LUT Table B-Side Entry 201" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE28++0x03 line.long 0x00 "ENTRY_202,LUT Table B-Side Entry 202" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE2C++0x03 line.long 0x00 "ENTRY_203,LUT Table B-Side Entry 203" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE30++0x03 line.long 0x00 "ENTRY_204,LUT Table B-Side Entry 204" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE34++0x03 line.long 0x00 "ENTRY_205,LUT Table B-Side Entry 205" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE38++0x03 line.long 0x00 "ENTRY_206,LUT Table B-Side Entry 206" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE3C++0x03 line.long 0x00 "ENTRY_207,LUT Table B-Side Entry 207" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE40++0x03 line.long 0x00 "ENTRY_208,LUT Table B-Side Entry 208" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE44++0x03 line.long 0x00 "ENTRY_209,LUT Table B-Side Entry 209" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE48++0x03 line.long 0x00 "ENTRY_210,LUT Table B-Side Entry 210" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE4C++0x03 line.long 0x00 "ENTRY_211,LUT Table B-Side Entry 211" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE50++0x03 line.long 0x00 "ENTRY_212,LUT Table B-Side Entry 212" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE54++0x03 line.long 0x00 "ENTRY_213,LUT Table B-Side Entry 213" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE58++0x03 line.long 0x00 "ENTRY_214,LUT Table B-Side Entry 214" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE5C++0x03 line.long 0x00 "ENTRY_215,LUT Table B-Side Entry 215" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE60++0x03 line.long 0x00 "ENTRY_216,LUT Table B-Side Entry 216" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE64++0x03 line.long 0x00 "ENTRY_217,LUT Table B-Side Entry 217" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE68++0x03 line.long 0x00 "ENTRY_218,LUT Table B-Side Entry 218" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE6C++0x03 line.long 0x00 "ENTRY_219,LUT Table B-Side Entry 219" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE70++0x03 line.long 0x00 "ENTRY_220,LUT Table B-Side Entry 220" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE74++0x03 line.long 0x00 "ENTRY_221,LUT Table B-Side Entry 221" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE78++0x03 line.long 0x00 "ENTRY_222,LUT Table B-Side Entry 222" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE7C++0x03 line.long 0x00 "ENTRY_223,LUT Table B-Side Entry 223" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE80++0x03 line.long 0x00 "ENTRY_224,LUT Table B-Side Entry 224" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE84++0x03 line.long 0x00 "ENTRY_225,LUT Table B-Side Entry 225" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE88++0x03 line.long 0x00 "ENTRY_226,LUT Table B-Side Entry 226" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE8C++0x03 line.long 0x00 "ENTRY_227,LUT Table B-Side Entry 227" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE90++0x03 line.long 0x00 "ENTRY_228,LUT Table B-Side Entry 228" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE94++0x03 line.long 0x00 "ENTRY_229,LUT Table B-Side Entry 229" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE98++0x03 line.long 0x00 "ENTRY_230,LUT Table B-Side Entry 230" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xE9C++0x03 line.long 0x00 "ENTRY_231,LUT Table B-Side Entry 231" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEA0++0x03 line.long 0x00 "ENTRY_232,LUT Table B-Side Entry 232" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEA4++0x03 line.long 0x00 "ENTRY_233,LUT Table B-Side Entry 233" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEA8++0x03 line.long 0x00 "ENTRY_234,LUT Table B-Side Entry 234" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEAC++0x03 line.long 0x00 "ENTRY_235,LUT Table B-Side Entry 235" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEB0++0x03 line.long 0x00 "ENTRY_236,LUT Table B-Side Entry 236" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEB4++0x03 line.long 0x00 "ENTRY_237,LUT Table B-Side Entry 237" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEB8++0x03 line.long 0x00 "ENTRY_238,LUT Table B-Side Entry 238" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEBC++0x03 line.long 0x00 "ENTRY_239,LUT Table B-Side Entry 239" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEC0++0x03 line.long 0x00 "ENTRY_240,LUT Table B-Side Entry 240" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEC4++0x03 line.long 0x00 "ENTRY_241,LUT Table B-Side Entry 241" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEC8++0x03 line.long 0x00 "ENTRY_242,LUT Table B-Side Entry 242" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xECC++0x03 line.long 0x00 "ENTRY_243,LUT Table B-Side Entry 243" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xED0++0x03 line.long 0x00 "ENTRY_244,LUT Table B-Side Entry 244" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xED4++0x03 line.long 0x00 "ENTRY_245,LUT Table B-Side Entry 245" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xED8++0x03 line.long 0x00 "ENTRY_246,LUT Table B-Side Entry 246" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEDC++0x03 line.long 0x00 "ENTRY_247,LUT Table B-Side Entry 247" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEE0++0x03 line.long 0x00 "ENTRY_248,LUT Table B-Side Entry 248" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEE4++0x03 line.long 0x00 "ENTRY_249,LUT Table B-Side Entry 249" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEE8++0x03 line.long 0x00 "ENTRY_250,LUT Table B-Side Entry 250" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEEC++0x03 line.long 0x00 "ENTRY_251,LUT Table B-Side Entry 251" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEF0++0x03 line.long 0x00 "ENTRY_252,LUT Table B-Side Entry 252" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEF4++0x03 line.long 0x00 "ENTRY_253,LUT Table B-Side Entry 253" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEF8++0x03 line.long 0x00 "ENTRY_254,LUT Table B-Side Entry 254" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" rgroup.long 0xEFC++0x03 line.long 0x00 "ENTRY_255,LUT Table B-Side Entry 255" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" else group.long 0xB00++0x03 line.long 0x00 "ENTRY_0,LUT Table B-Side Entry 0" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB04++0x03 line.long 0x00 "ENTRY_1,LUT Table B-Side Entry 1" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB08++0x03 line.long 0x00 "ENTRY_2,LUT Table B-Side Entry 2" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB0C++0x03 line.long 0x00 "ENTRY_3,LUT Table B-Side Entry 3" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB10++0x03 line.long 0x00 "ENTRY_4,LUT Table B-Side Entry 4" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB14++0x03 line.long 0x00 "ENTRY_5,LUT Table B-Side Entry 5" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB18++0x03 line.long 0x00 "ENTRY_6,LUT Table B-Side Entry 6" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB1C++0x03 line.long 0x00 "ENTRY_7,LUT Table B-Side Entry 7" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB20++0x03 line.long 0x00 "ENTRY_8,LUT Table B-Side Entry 8" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB24++0x03 line.long 0x00 "ENTRY_9,LUT Table B-Side Entry 9" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB28++0x03 line.long 0x00 "ENTRY_10,LUT Table B-Side Entry 10" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB2C++0x03 line.long 0x00 "ENTRY_11,LUT Table B-Side Entry 11" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB30++0x03 line.long 0x00 "ENTRY_12,LUT Table B-Side Entry 12" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB34++0x03 line.long 0x00 "ENTRY_13,LUT Table B-Side Entry 13" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB38++0x03 line.long 0x00 "ENTRY_14,LUT Table B-Side Entry 14" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB3C++0x03 line.long 0x00 "ENTRY_15,LUT Table B-Side Entry 15" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB40++0x03 line.long 0x00 "ENTRY_16,LUT Table B-Side Entry 16" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB44++0x03 line.long 0x00 "ENTRY_17,LUT Table B-Side Entry 17" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB48++0x03 line.long 0x00 "ENTRY_18,LUT Table B-Side Entry 18" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB4C++0x03 line.long 0x00 "ENTRY_19,LUT Table B-Side Entry 19" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB50++0x03 line.long 0x00 "ENTRY_20,LUT Table B-Side Entry 20" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB54++0x03 line.long 0x00 "ENTRY_21,LUT Table B-Side Entry 21" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB58++0x03 line.long 0x00 "ENTRY_22,LUT Table B-Side Entry 22" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB5C++0x03 line.long 0x00 "ENTRY_23,LUT Table B-Side Entry 23" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB60++0x03 line.long 0x00 "ENTRY_24,LUT Table B-Side Entry 24" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB64++0x03 line.long 0x00 "ENTRY_25,LUT Table B-Side Entry 25" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB68++0x03 line.long 0x00 "ENTRY_26,LUT Table B-Side Entry 26" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB6C++0x03 line.long 0x00 "ENTRY_27,LUT Table B-Side Entry 27" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB70++0x03 line.long 0x00 "ENTRY_28,LUT Table B-Side Entry 28" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB74++0x03 line.long 0x00 "ENTRY_29,LUT Table B-Side Entry 29" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB78++0x03 line.long 0x00 "ENTRY_30,LUT Table B-Side Entry 30" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB7C++0x03 line.long 0x00 "ENTRY_31,LUT Table B-Side Entry 31" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB80++0x03 line.long 0x00 "ENTRY_32,LUT Table B-Side Entry 32" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB84++0x03 line.long 0x00 "ENTRY_33,LUT Table B-Side Entry 33" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB88++0x03 line.long 0x00 "ENTRY_34,LUT Table B-Side Entry 34" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB8C++0x03 line.long 0x00 "ENTRY_35,LUT Table B-Side Entry 35" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB90++0x03 line.long 0x00 "ENTRY_36,LUT Table B-Side Entry 36" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB94++0x03 line.long 0x00 "ENTRY_37,LUT Table B-Side Entry 37" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB98++0x03 line.long 0x00 "ENTRY_38,LUT Table B-Side Entry 38" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xB9C++0x03 line.long 0x00 "ENTRY_39,LUT Table B-Side Entry 39" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBA0++0x03 line.long 0x00 "ENTRY_40,LUT Table B-Side Entry 40" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBA4++0x03 line.long 0x00 "ENTRY_41,LUT Table B-Side Entry 41" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBA8++0x03 line.long 0x00 "ENTRY_42,LUT Table B-Side Entry 42" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBAC++0x03 line.long 0x00 "ENTRY_43,LUT Table B-Side Entry 43" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBB0++0x03 line.long 0x00 "ENTRY_44,LUT Table B-Side Entry 44" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBB4++0x03 line.long 0x00 "ENTRY_45,LUT Table B-Side Entry 45" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBB8++0x03 line.long 0x00 "ENTRY_46,LUT Table B-Side Entry 46" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBBC++0x03 line.long 0x00 "ENTRY_47,LUT Table B-Side Entry 47" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBC0++0x03 line.long 0x00 "ENTRY_48,LUT Table B-Side Entry 48" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBC4++0x03 line.long 0x00 "ENTRY_49,LUT Table B-Side Entry 49" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBC8++0x03 line.long 0x00 "ENTRY_50,LUT Table B-Side Entry 50" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBCC++0x03 line.long 0x00 "ENTRY_51,LUT Table B-Side Entry 51" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBD0++0x03 line.long 0x00 "ENTRY_52,LUT Table B-Side Entry 52" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBD4++0x03 line.long 0x00 "ENTRY_53,LUT Table B-Side Entry 53" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBD8++0x03 line.long 0x00 "ENTRY_54,LUT Table B-Side Entry 54" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBDC++0x03 line.long 0x00 "ENTRY_55,LUT Table B-Side Entry 55" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBE0++0x03 line.long 0x00 "ENTRY_56,LUT Table B-Side Entry 56" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBE4++0x03 line.long 0x00 "ENTRY_57,LUT Table B-Side Entry 57" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBE8++0x03 line.long 0x00 "ENTRY_58,LUT Table B-Side Entry 58" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBEC++0x03 line.long 0x00 "ENTRY_59,LUT Table B-Side Entry 59" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBF0++0x03 line.long 0x00 "ENTRY_60,LUT Table B-Side Entry 60" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBF4++0x03 line.long 0x00 "ENTRY_61,LUT Table B-Side Entry 61" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBF8++0x03 line.long 0x00 "ENTRY_62,LUT Table B-Side Entry 62" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xBFC++0x03 line.long 0x00 "ENTRY_63,LUT Table B-Side Entry 63" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC00++0x03 line.long 0x00 "ENTRY_64,LUT Table B-Side Entry 64" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC04++0x03 line.long 0x00 "ENTRY_65,LUT Table B-Side Entry 65" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC08++0x03 line.long 0x00 "ENTRY_66,LUT Table B-Side Entry 66" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC0C++0x03 line.long 0x00 "ENTRY_67,LUT Table B-Side Entry 67" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC10++0x03 line.long 0x00 "ENTRY_68,LUT Table B-Side Entry 68" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC14++0x03 line.long 0x00 "ENTRY_69,LUT Table B-Side Entry 69" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC18++0x03 line.long 0x00 "ENTRY_70,LUT Table B-Side Entry 70" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC1C++0x03 line.long 0x00 "ENTRY_71,LUT Table B-Side Entry 71" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC20++0x03 line.long 0x00 "ENTRY_72,LUT Table B-Side Entry 72" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC24++0x03 line.long 0x00 "ENTRY_73,LUT Table B-Side Entry 73" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC28++0x03 line.long 0x00 "ENTRY_74,LUT Table B-Side Entry 74" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC2C++0x03 line.long 0x00 "ENTRY_75,LUT Table B-Side Entry 75" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC30++0x03 line.long 0x00 "ENTRY_76,LUT Table B-Side Entry 76" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC34++0x03 line.long 0x00 "ENTRY_77,LUT Table B-Side Entry 77" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC38++0x03 line.long 0x00 "ENTRY_78,LUT Table B-Side Entry 78" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC3C++0x03 line.long 0x00 "ENTRY_79,LUT Table B-Side Entry 79" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC40++0x03 line.long 0x00 "ENTRY_80,LUT Table B-Side Entry 80" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC44++0x03 line.long 0x00 "ENTRY_81,LUT Table B-Side Entry 81" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC48++0x03 line.long 0x00 "ENTRY_82,LUT Table B-Side Entry 82" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC4C++0x03 line.long 0x00 "ENTRY_83,LUT Table B-Side Entry 83" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC50++0x03 line.long 0x00 "ENTRY_84,LUT Table B-Side Entry 84" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC54++0x03 line.long 0x00 "ENTRY_85,LUT Table B-Side Entry 85" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC58++0x03 line.long 0x00 "ENTRY_86,LUT Table B-Side Entry 86" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC5C++0x03 line.long 0x00 "ENTRY_87,LUT Table B-Side Entry 87" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC60++0x03 line.long 0x00 "ENTRY_88,LUT Table B-Side Entry 88" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC64++0x03 line.long 0x00 "ENTRY_89,LUT Table B-Side Entry 89" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC68++0x03 line.long 0x00 "ENTRY_90,LUT Table B-Side Entry 90" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC6C++0x03 line.long 0x00 "ENTRY_91,LUT Table B-Side Entry 91" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC70++0x03 line.long 0x00 "ENTRY_92,LUT Table B-Side Entry 92" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC74++0x03 line.long 0x00 "ENTRY_93,LUT Table B-Side Entry 93" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC78++0x03 line.long 0x00 "ENTRY_94,LUT Table B-Side Entry 94" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC7C++0x03 line.long 0x00 "ENTRY_95,LUT Table B-Side Entry 95" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC80++0x03 line.long 0x00 "ENTRY_96,LUT Table B-Side Entry 96" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC84++0x03 line.long 0x00 "ENTRY_97,LUT Table B-Side Entry 97" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC88++0x03 line.long 0x00 "ENTRY_98,LUT Table B-Side Entry 98" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC8C++0x03 line.long 0x00 "ENTRY_99,LUT Table B-Side Entry 99" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC90++0x03 line.long 0x00 "ENTRY_100,LUT Table B-Side Entry 100" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC94++0x03 line.long 0x00 "ENTRY_101,LUT Table B-Side Entry 101" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC98++0x03 line.long 0x00 "ENTRY_102,LUT Table B-Side Entry 102" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xC9C++0x03 line.long 0x00 "ENTRY_103,LUT Table B-Side Entry 103" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCA0++0x03 line.long 0x00 "ENTRY_104,LUT Table B-Side Entry 104" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCA4++0x03 line.long 0x00 "ENTRY_105,LUT Table B-Side Entry 105" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCA8++0x03 line.long 0x00 "ENTRY_106,LUT Table B-Side Entry 106" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCAC++0x03 line.long 0x00 "ENTRY_107,LUT Table B-Side Entry 107" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCB0++0x03 line.long 0x00 "ENTRY_108,LUT Table B-Side Entry 108" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCB4++0x03 line.long 0x00 "ENTRY_109,LUT Table B-Side Entry 109" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCB8++0x03 line.long 0x00 "ENTRY_110,LUT Table B-Side Entry 110" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCBC++0x03 line.long 0x00 "ENTRY_111,LUT Table B-Side Entry 111" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCC0++0x03 line.long 0x00 "ENTRY_112,LUT Table B-Side Entry 112" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCC4++0x03 line.long 0x00 "ENTRY_113,LUT Table B-Side Entry 113" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCC8++0x03 line.long 0x00 "ENTRY_114,LUT Table B-Side Entry 114" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCCC++0x03 line.long 0x00 "ENTRY_115,LUT Table B-Side Entry 115" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCD0++0x03 line.long 0x00 "ENTRY_116,LUT Table B-Side Entry 116" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCD4++0x03 line.long 0x00 "ENTRY_117,LUT Table B-Side Entry 117" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCD8++0x03 line.long 0x00 "ENTRY_118,LUT Table B-Side Entry 118" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCDC++0x03 line.long 0x00 "ENTRY_119,LUT Table B-Side Entry 119" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCE0++0x03 line.long 0x00 "ENTRY_120,LUT Table B-Side Entry 120" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCE4++0x03 line.long 0x00 "ENTRY_121,LUT Table B-Side Entry 121" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCE8++0x03 line.long 0x00 "ENTRY_122,LUT Table B-Side Entry 122" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCEC++0x03 line.long 0x00 "ENTRY_123,LUT Table B-Side Entry 123" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCF0++0x03 line.long 0x00 "ENTRY_124,LUT Table B-Side Entry 124" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCF4++0x03 line.long 0x00 "ENTRY_125,LUT Table B-Side Entry 125" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCF8++0x03 line.long 0x00 "ENTRY_126,LUT Table B-Side Entry 126" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xCFC++0x03 line.long 0x00 "ENTRY_127,LUT Table B-Side Entry 127" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD00++0x03 line.long 0x00 "ENTRY_128,LUT Table B-Side Entry 128" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD04++0x03 line.long 0x00 "ENTRY_129,LUT Table B-Side Entry 129" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD08++0x03 line.long 0x00 "ENTRY_130,LUT Table B-Side Entry 130" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD0C++0x03 line.long 0x00 "ENTRY_131,LUT Table B-Side Entry 131" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD10++0x03 line.long 0x00 "ENTRY_132,LUT Table B-Side Entry 132" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD14++0x03 line.long 0x00 "ENTRY_133,LUT Table B-Side Entry 133" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD18++0x03 line.long 0x00 "ENTRY_134,LUT Table B-Side Entry 134" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD1C++0x03 line.long 0x00 "ENTRY_135,LUT Table B-Side Entry 135" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD20++0x03 line.long 0x00 "ENTRY_136,LUT Table B-Side Entry 136" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD24++0x03 line.long 0x00 "ENTRY_137,LUT Table B-Side Entry 137" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD28++0x03 line.long 0x00 "ENTRY_138,LUT Table B-Side Entry 138" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD2C++0x03 line.long 0x00 "ENTRY_139,LUT Table B-Side Entry 139" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD30++0x03 line.long 0x00 "ENTRY_140,LUT Table B-Side Entry 140" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD34++0x03 line.long 0x00 "ENTRY_141,LUT Table B-Side Entry 141" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD38++0x03 line.long 0x00 "ENTRY_142,LUT Table B-Side Entry 142" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD3C++0x03 line.long 0x00 "ENTRY_143,LUT Table B-Side Entry 143" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD40++0x03 line.long 0x00 "ENTRY_144,LUT Table B-Side Entry 144" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD44++0x03 line.long 0x00 "ENTRY_145,LUT Table B-Side Entry 145" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD48++0x03 line.long 0x00 "ENTRY_146,LUT Table B-Side Entry 146" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD4C++0x03 line.long 0x00 "ENTRY_147,LUT Table B-Side Entry 147" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD50++0x03 line.long 0x00 "ENTRY_148,LUT Table B-Side Entry 148" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD54++0x03 line.long 0x00 "ENTRY_149,LUT Table B-Side Entry 149" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD58++0x03 line.long 0x00 "ENTRY_150,LUT Table B-Side Entry 150" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD5C++0x03 line.long 0x00 "ENTRY_151,LUT Table B-Side Entry 151" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD60++0x03 line.long 0x00 "ENTRY_152,LUT Table B-Side Entry 152" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD64++0x03 line.long 0x00 "ENTRY_153,LUT Table B-Side Entry 153" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD68++0x03 line.long 0x00 "ENTRY_154,LUT Table B-Side Entry 154" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD6C++0x03 line.long 0x00 "ENTRY_155,LUT Table B-Side Entry 155" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD70++0x03 line.long 0x00 "ENTRY_156,LUT Table B-Side Entry 156" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD74++0x03 line.long 0x00 "ENTRY_157,LUT Table B-Side Entry 157" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD78++0x03 line.long 0x00 "ENTRY_158,LUT Table B-Side Entry 158" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD7C++0x03 line.long 0x00 "ENTRY_159,LUT Table B-Side Entry 159" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD80++0x03 line.long 0x00 "ENTRY_160,LUT Table B-Side Entry 160" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD84++0x03 line.long 0x00 "ENTRY_161,LUT Table B-Side Entry 161" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD88++0x03 line.long 0x00 "ENTRY_162,LUT Table B-Side Entry 162" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD8C++0x03 line.long 0x00 "ENTRY_163,LUT Table B-Side Entry 163" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD90++0x03 line.long 0x00 "ENTRY_164,LUT Table B-Side Entry 164" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD94++0x03 line.long 0x00 "ENTRY_165,LUT Table B-Side Entry 165" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD98++0x03 line.long 0x00 "ENTRY_166,LUT Table B-Side Entry 166" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xD9C++0x03 line.long 0x00 "ENTRY_167,LUT Table B-Side Entry 167" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDA0++0x03 line.long 0x00 "ENTRY_168,LUT Table B-Side Entry 168" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDA4++0x03 line.long 0x00 "ENTRY_169,LUT Table B-Side Entry 169" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDA8++0x03 line.long 0x00 "ENTRY_170,LUT Table B-Side Entry 170" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDAC++0x03 line.long 0x00 "ENTRY_171,LUT Table B-Side Entry 171" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDB0++0x03 line.long 0x00 "ENTRY_172,LUT Table B-Side Entry 172" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDB4++0x03 line.long 0x00 "ENTRY_173,LUT Table B-Side Entry 173" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDB8++0x03 line.long 0x00 "ENTRY_174,LUT Table B-Side Entry 174" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDBC++0x03 line.long 0x00 "ENTRY_175,LUT Table B-Side Entry 175" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDC0++0x03 line.long 0x00 "ENTRY_176,LUT Table B-Side Entry 176" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDC4++0x03 line.long 0x00 "ENTRY_177,LUT Table B-Side Entry 177" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDC8++0x03 line.long 0x00 "ENTRY_178,LUT Table B-Side Entry 178" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDCC++0x03 line.long 0x00 "ENTRY_179,LUT Table B-Side Entry 179" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDD0++0x03 line.long 0x00 "ENTRY_180,LUT Table B-Side Entry 180" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDD4++0x03 line.long 0x00 "ENTRY_181,LUT Table B-Side Entry 181" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDD8++0x03 line.long 0x00 "ENTRY_182,LUT Table B-Side Entry 182" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDDC++0x03 line.long 0x00 "ENTRY_183,LUT Table B-Side Entry 183" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDE0++0x03 line.long 0x00 "ENTRY_184,LUT Table B-Side Entry 184" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDE4++0x03 line.long 0x00 "ENTRY_185,LUT Table B-Side Entry 185" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDE8++0x03 line.long 0x00 "ENTRY_186,LUT Table B-Side Entry 186" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDEC++0x03 line.long 0x00 "ENTRY_187,LUT Table B-Side Entry 187" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDF0++0x03 line.long 0x00 "ENTRY_188,LUT Table B-Side Entry 188" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDF4++0x03 line.long 0x00 "ENTRY_189,LUT Table B-Side Entry 189" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDF8++0x03 line.long 0x00 "ENTRY_190,LUT Table B-Side Entry 190" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xDFC++0x03 line.long 0x00 "ENTRY_191,LUT Table B-Side Entry 191" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE00++0x03 line.long 0x00 "ENTRY_192,LUT Table B-Side Entry 192" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE04++0x03 line.long 0x00 "ENTRY_193,LUT Table B-Side Entry 193" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE08++0x03 line.long 0x00 "ENTRY_194,LUT Table B-Side Entry 194" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE0C++0x03 line.long 0x00 "ENTRY_195,LUT Table B-Side Entry 195" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE10++0x03 line.long 0x00 "ENTRY_196,LUT Table B-Side Entry 196" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE14++0x03 line.long 0x00 "ENTRY_197,LUT Table B-Side Entry 197" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE18++0x03 line.long 0x00 "ENTRY_198,LUT Table B-Side Entry 198" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE1C++0x03 line.long 0x00 "ENTRY_199,LUT Table B-Side Entry 199" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE20++0x03 line.long 0x00 "ENTRY_200,LUT Table B-Side Entry 200" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE24++0x03 line.long 0x00 "ENTRY_201,LUT Table B-Side Entry 201" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE28++0x03 line.long 0x00 "ENTRY_202,LUT Table B-Side Entry 202" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE2C++0x03 line.long 0x00 "ENTRY_203,LUT Table B-Side Entry 203" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE30++0x03 line.long 0x00 "ENTRY_204,LUT Table B-Side Entry 204" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE34++0x03 line.long 0x00 "ENTRY_205,LUT Table B-Side Entry 205" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE38++0x03 line.long 0x00 "ENTRY_206,LUT Table B-Side Entry 206" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE3C++0x03 line.long 0x00 "ENTRY_207,LUT Table B-Side Entry 207" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE40++0x03 line.long 0x00 "ENTRY_208,LUT Table B-Side Entry 208" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE44++0x03 line.long 0x00 "ENTRY_209,LUT Table B-Side Entry 209" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE48++0x03 line.long 0x00 "ENTRY_210,LUT Table B-Side Entry 210" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE4C++0x03 line.long 0x00 "ENTRY_211,LUT Table B-Side Entry 211" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE50++0x03 line.long 0x00 "ENTRY_212,LUT Table B-Side Entry 212" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE54++0x03 line.long 0x00 "ENTRY_213,LUT Table B-Side Entry 213" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE58++0x03 line.long 0x00 "ENTRY_214,LUT Table B-Side Entry 214" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE5C++0x03 line.long 0x00 "ENTRY_215,LUT Table B-Side Entry 215" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE60++0x03 line.long 0x00 "ENTRY_216,LUT Table B-Side Entry 216" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE64++0x03 line.long 0x00 "ENTRY_217,LUT Table B-Side Entry 217" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE68++0x03 line.long 0x00 "ENTRY_218,LUT Table B-Side Entry 218" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE6C++0x03 line.long 0x00 "ENTRY_219,LUT Table B-Side Entry 219" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE70++0x03 line.long 0x00 "ENTRY_220,LUT Table B-Side Entry 220" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE74++0x03 line.long 0x00 "ENTRY_221,LUT Table B-Side Entry 221" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE78++0x03 line.long 0x00 "ENTRY_222,LUT Table B-Side Entry 222" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE7C++0x03 line.long 0x00 "ENTRY_223,LUT Table B-Side Entry 223" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE80++0x03 line.long 0x00 "ENTRY_224,LUT Table B-Side Entry 224" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE84++0x03 line.long 0x00 "ENTRY_225,LUT Table B-Side Entry 225" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE88++0x03 line.long 0x00 "ENTRY_226,LUT Table B-Side Entry 226" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE8C++0x03 line.long 0x00 "ENTRY_227,LUT Table B-Side Entry 227" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE90++0x03 line.long 0x00 "ENTRY_228,LUT Table B-Side Entry 228" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE94++0x03 line.long 0x00 "ENTRY_229,LUT Table B-Side Entry 229" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE98++0x03 line.long 0x00 "ENTRY_230,LUT Table B-Side Entry 230" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xE9C++0x03 line.long 0x00 "ENTRY_231,LUT Table B-Side Entry 231" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEA0++0x03 line.long 0x00 "ENTRY_232,LUT Table B-Side Entry 232" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEA4++0x03 line.long 0x00 "ENTRY_233,LUT Table B-Side Entry 233" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEA8++0x03 line.long 0x00 "ENTRY_234,LUT Table B-Side Entry 234" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEAC++0x03 line.long 0x00 "ENTRY_235,LUT Table B-Side Entry 235" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEB0++0x03 line.long 0x00 "ENTRY_236,LUT Table B-Side Entry 236" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEB4++0x03 line.long 0x00 "ENTRY_237,LUT Table B-Side Entry 237" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEB8++0x03 line.long 0x00 "ENTRY_238,LUT Table B-Side Entry 238" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEBC++0x03 line.long 0x00 "ENTRY_239,LUT Table B-Side Entry 239" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEC0++0x03 line.long 0x00 "ENTRY_240,LUT Table B-Side Entry 240" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEC4++0x03 line.long 0x00 "ENTRY_241,LUT Table B-Side Entry 241" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEC8++0x03 line.long 0x00 "ENTRY_242,LUT Table B-Side Entry 242" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xECC++0x03 line.long 0x00 "ENTRY_243,LUT Table B-Side Entry 243" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xED0++0x03 line.long 0x00 "ENTRY_244,LUT Table B-Side Entry 244" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xED4++0x03 line.long 0x00 "ENTRY_245,LUT Table B-Side Entry 245" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xED8++0x03 line.long 0x00 "ENTRY_246,LUT Table B-Side Entry 246" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEDC++0x03 line.long 0x00 "ENTRY_247,LUT Table B-Side Entry 247" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEE0++0x03 line.long 0x00 "ENTRY_248,LUT Table B-Side Entry 248" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEE4++0x03 line.long 0x00 "ENTRY_249,LUT Table B-Side Entry 249" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEE8++0x03 line.long 0x00 "ENTRY_250,LUT Table B-Side Entry 250" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEEC++0x03 line.long 0x00 "ENTRY_251,LUT Table B-Side Entry 251" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEF0++0x03 line.long 0x00 "ENTRY_252,LUT Table B-Side Entry 252" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEF4++0x03 line.long 0x00 "ENTRY_253,LUT Table B-Side Entry 253" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEF8++0x03 line.long 0x00 "ENTRY_254,LUT Table B-Side Entry 254" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" group.long 0xEFC++0x03 line.long 0x00 "ENTRY_255,LUT Table B-Side Entry 255" hexmask.long.byte 0x00 16.--23. 1. " R ,R component" hexmask.long.byte 0x00 8.--15. 1. " G ,G component" hexmask.long.byte 0x00 0.--7. 1. " B ,B component" endif tree.end tree.end endif width 0x0B tree.end tree.end tree.open "VIN (Video Input Module)" tree "Channel 0" base ad:0xE6EF0000 width 9. group.long 0x00++0x03 line.long 0x00 "V0MC,Video 0 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V0MS,Video 0 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V0FC,Video 0 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V0SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V0ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V0SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V0EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V0SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V0ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V0SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V0EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V0IS,Video 0 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V0MB1,Video 0 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V0MB2,Video 0 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V0MB3,Video 0 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V0LC,Video 0 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V0IE,Video 0 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V0INTS,Video 0 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V0SI,Video 0 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF0000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V0MTC,Video 0 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V0YS,Video 0 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V0XS,Video 0 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V0DMR,Video 0 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V0DMR2,Video 0 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V0UVAOF,Video 0 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V0CSCC1,Video 0 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V0CSCC2,Video 0 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V0CSCC3,Video 0 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V0CSCC1,Video 0 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V0CSCC2,Video 0 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V0CSCC3,Video 0 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V0C1A,Video 0 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C1B,Video 0 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C1C,Video 0 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V0C2A,Video 0 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C2B,Video 0 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C2C,Video 0 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V0C3A,Video 0 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C3B,Video 0 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C3C,Video 0 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V0C4A,Video 0 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C4B,Video 0 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C4C,Video 0 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V0C5A,Video 0 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C5B,Video 0 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C5C,Video 0 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V0C6A,Video 0 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C6B,Video 0 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C6C,Video 0 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V0C7A,Video 0 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C7B,Video 0 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C7C,Video 0 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V0C8A,Video 0 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C8B,Video 0 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C8C,Video 0 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V0C1A,Video 0 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C1B,Video 0 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C1C,Video 0 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V0C2A,Video 0 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C2B,Video 0 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C2C,Video 0 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V0C3A,Video 0 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C3B,Video 0 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C3C,Video 0 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V0C4A,Video 0 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C4B,Video 0 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C4C,Video 0 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V0C5A,Video 0 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C5B,Video 0 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C5C,Video 0 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V0C6A,Video 0 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C6B,Video 0 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C6C,Video 0 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V0C7A,Video 0 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C7B,Video 0 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C7C,Video 0 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V0C8A,Video 0 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V0C8B,Video 0 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V0C8C,Video 0 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V0LUTP,Video 0 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V0LUTD,Video 0 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else group.long 0x100++0x07 line.long 0x00 "V0LUTP,Video 0 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V0LUTD,Video 0 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" endif group.long 0x228++0x23 line.long 0x00 "V0YCCR1,Video 0 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V0YCCR2,Video 0 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V0YCCR3,Video 0 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V0CBCCR1,Video 0 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V0CBCCR2,Video 0 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V0CBCCR3,Video 0 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation Sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V0CRCCR1,Video 0 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V0CRCCR2,Video 0 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V0CRCCR3,Video 0 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift Down Volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" else group.long 0x100++0x07 line.long 0x00 "V0LUTP,Video 0 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V0LUTD,Video 0 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V0YCCR1,Video 0 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V0YCCR2,Video 0 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V0YCCR3,Video 0 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V0CBCCR1,Video 0 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V0CBCCR2,Video 0 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V0CBCCR3,Video 0 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V0CRCCR1,Video 0 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V0CRCCR2,Video 0 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V0CRCCR3,Video 0 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif group.long 0x300++0x0F line.long 0x00 "V0CSCE1,Video 0 YC->RGB Calculation Setting Extension Register 1" hexmask.long.word 0x00 0.--13. 1. " YMUL2 ,Y multiplication coefficient 2 for RGB calculation" line.long 0x04 "V0CSCE2,Video 0 YC->RGB Calculation Setting Extension Register 2" hexmask.long.word 0x04 16.--27. 1. " YSUB2 ,Y subtraction coefficient 2 for RGB calculation" hexmask.long.word 0x04 0.--11. 1. " CSUB2 ,CbCr Subtraction coefficient 2 for RGB calculation" line.long 0x08 "V0CSCE3,Video 0 YC->RGB Calculation Setting Extension Register 3" hexmask.long.word 0x08 16.--29. 1. " RCRMUL2 ,YCr multiplication coefficient 2 for R calculation" hexmask.long.word 0x08 0.--13. 1. " GCRMUL2 ,Cr multiplication coefficient 2 for G calculation" line.long 0x0C "V0CSCE4,Video 0 YC->RGB Calculation Setting Extension Register 4" hexmask.long.word 0x0C 16.--29. 1. " GCBMUL2 ,Cb multiplication coefficient 2 for G calculation" hexmask.long.word 0x0C 0.--13. 1. " BCBMUL2 ,Cb multiplication coefficient 2 for B calculation" sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V0SRCSEL,Video 0 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree "Channel 1" base ad:0xE6EF1000 width 9. group.long 0x00++0x03 line.long 0x00 "V1MC,Video 1 Main Control Register" bitfld.long 0x00 31. " FAST ,High-speed video clock support mode" "Not supported,Supported" textline " " sif (cpuis("R8A774*")||cpuis("R7S7210*")) bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,No clipping" textline " " else bitfld.long 0x00 28.--29. " CLP ,Pixel data clipping" "No clipping,<16 clipped to 16/>=240 clipped to 240,No clipping,<=0 clipped to 1" textline " " endif sif cpu()=="R8A7790X"||cpu()=="R8A77420" bitfld.long 0x00 25. " RIS ,RGB interface select" "Rising edge,Both edges" textline " " endif sif cpu()=="R8A7792X" bitfld.long 0x00 23. " OMI ,Output data mask to IMR" "Enabled,Disabled" bitfld.long 0x00 22. " OMM ,Output data mask to memory" "Enabled,Disabled" textline " " endif bitfld.long 0x00 21. " FOC ,Field order control" "Odd,Even" bitfld.long 0x00 20. " LUTE ,Lookup table enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " YCAL ,YCbCr-422i Input data alignment" "Y upper/CbCr lower,Y lower/CbCr upper" textline " " sif cpuis("R7S7210*") bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601/BT.709 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601/BT.709 10/12-bit YCbCr-422,?,BT.601/BT.709/BT.1358 16/20/24-bit YCbCr-422,BT.601/BT.709 24-bit RGB-888,BT.601/BT.709 18-bit RGB-666" textline " " else bitfld.long 0x00 16.--18. " INF ,Input interface format" "BT.656 8-bit YCbCr-422,BT.601 8-bit YCbCr-422,BT.656 10/12-bit YCbCr-422,BT.601 10/12-bit YCbCr-422,,BT.601/BT.1358 16-bit YCbCr-422,BT.601 24-bit RGB-888,BT.601 18-bit RGB-666/12-bit RGB-888" textline " " endif bitfld.long 0x00 14.--15. " DC ,Dithering mode control" "Dithering with cumulative addition,Ordered dithering,?..." bitfld.long 0x00 12.--13. " EXINF ,Extension interface select" ",8-bit,10-bit,12-bit" textline " " bitfld.long 0x00 10. " VUP ,VIN register update control" "Immediately,On valid data" bitfld.long 0x00 6. " EN ,Endian type" "Little,Big" textline " " bitfld.long 0x00 5. " EC ,Error correction control" "No correction,Correction" bitfld.long 0x00 3.--4. " IM ,Interlace mode" "Odd-field,Odd/even-field,Even-field,Full interlace" textline " " bitfld.long 0x00 1. " BPS ,Color space conversion bypass mode" "Converted,Not converted" bitfld.long 0x00 0. " ME ,Module enable" "Disabled,Enabled" rgroup.long 0x04++0x03 line.long 0x00 "V1MS,Video 1 Module Status Register" bitfld.long 0x00 3.--4. " FBS ,Frame buffer status" "1,2,3,No valid buffer" bitfld.long 0x00 2. " FS ,Field status" "Odd field,Even field" textline " " bitfld.long 0x00 1. " AV ,Active video status" "Not active,Active" bitfld.long 0x00 0. " CA ,Video capture active status" "Inactive,Active" group.long 0x08++0x03 line.long 0x00 "V1FC,Video 1 Frame Capture Register" bitfld.long 0x00 1. " CC ,Continuous frame capture mode" "Disabled,Enabled" bitfld.long 0x00 0. " SC ,Single frame capture mode" "Disabled,Enabled" textline " " group.long 0xC++0x03 line.long 0x00 "V1SLPRC,Start Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPRC ,Start Line Pre-clip" group.long 0x10++0x03 line.long 0x00 "V1ELPRC,End Line Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPRC ,End Line Pre-clip" group.long 0x14++0x03 line.long 0x00 "V1SPPRC,Start Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPRC ,Start Pixel Pre-clip" group.long 0x18++0x03 line.long 0x00 "V1EPPRC,End Pixel Pre-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPRC ,End Pixel Pre-clip" group.long 0x1C++0x03 line.long 0x00 "V1SLPOC,Start Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SLPOC ,Start Line Post-clip" group.long 0x20++0x03 line.long 0x00 "V1ELPOC,End Line Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " ELPOC ,End Line Post-clip" group.long 0x24++0x03 line.long 0x00 "V1SPPOC,Start Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " SPPOC ,Start Pixel Post-clip" group.long 0x28++0x03 line.long 0x00 "V1EPPOC,End Pixel Post-Clip Register" hexmask.long.word 0x00 0.--10. 1. " EPPOC ,End Pixel Post-clip" group.long 0x2C++0x03 line.long 0x00 "V1IS,Video 1 Image Stride Register" hexmask.long.word 0x00 4.--12. 1. " IS ,Image stride" group.long 0x30++0x03 line.long 0x00 "V1MB1,Video 1 Memory Base 1 Register" hexmask.long 0x00 7.--31. 0x80 " MB1 ,Memory base address 1" group.long 0x34++0x03 line.long 0x00 "V1MB2,Video 1 Memory Base 2 Register" hexmask.long 0x00 7.--31. 0x80 " MB2 ,Memory base address 2" group.long 0x38++0x03 line.long 0x00 "V1MB3,Video 1 Memory Base 3 Register" hexmask.long 0x00 7.--31. 0x80 " MB3 ,Memory base address 3" rgroup.long 0x3c++0x03 line.long 0x00 "V1LC,Video 1 Line Count Register" hexmask.long.word 0x00 0.--11. 1. " LC ,Line count" group.long 0x40++0x0B line.long 0x00 "V1IE,Video 1 Interrupt Enable Register" bitfld.long 0x00 31. " FIE2 ,Field interrupt enable 2" "Disabled,Enabled" bitfld.long 0x00 17. " VFE ,VSYNC falling edge detect interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " VRE , VSYNC rising edge detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " FIE ,Field interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " CEE ,Correction error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " SIE ,Scanline interrupt Error" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " EFE ,End of frame interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " FOE ,FIFO overflow interrupt enable" "Disabled,Enabled" line.long 0x04 "V1INTS,Video 1 Interrupt Status Register" bitfld.long 0x04 31. " FIS2 ,Field interrupt status 2" "No interrupt,Interrupt" bitfld.long 0x04 17. " VFS ,VSYNC falling edge detect interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 16. " VRS ,VSYNC rising edge detect interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 4. " FIS ,Field interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x04 3. " CES ,Correction error interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 2. " SIS ,Scanline interrupt error" "No interrupt,Interrupt" textline " " bitfld.long 0x04 1. " EFS ,End of frame interrupt status" "No interrupt,Interrupt" bitfld.long 0x04 0. " FOS ,FIFO overflow interrupt status" "No interrupt,Interrupt" line.long 0x08 "V1SI,Video 1 Scanline Interrupt" hexmask.long.word 0x08 0.--11. 1. " SI ,Scanline interrupt setting" sif (cpu()!="RCARM2")&&(cpu()!="R8A77470") sif cpuis("R8A774*") if (((per.l(ad:0xE6EF1000+0x4C))&0x100)==0x00) group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,16Byte,32Byte,,,,,,,,,,,,,240Byte" else group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " SIZE ,Transaction size unit setting" "16Byte,32Byte" bitfld.long 0x00 0.--3. " BSIZE ,Burst size setting" "No transfer,32Byte,64Byte,,,,,,256Byte,,,,,,,480Byte" endif elif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x00 8. " TUNIT ,Transaction unit setting" "16Byte,?" bitfld.long 0x00 0.--3. " BSIZE ,Burst Size Setting" "#,,,,,,,,8 beat access,,,,,,," else group.long 0x4C++0x03 line.long 0x00 "V1MTC,Video 1 Memory Transfer Control Register" bitfld.long 0x00 24.--27. " PRIH ,Priority high level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 16.--19. " PRIL ,Priority low level value setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif group.long 0x50++0x13 line.long 0x00 "V1YS,Video 1 Y Scale Register" bitfld.long 0x00 12.--15. " MANTISSAY ,Mantissa of scaling ratio in the Y direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 0.--11. 1. " FRACTIONY ,Fraction of scaling ratio in the Y direction" line.long 0x04 "V1XS,Video 1 X Scale Register" bitfld.long 0x04 12.--15. " MANTISSAX ,Mantissa of scaling ratio in the X direction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x04 0.--11. 1. " FRACTIONX ,Fraction of scaling ratio in the X direction" line.long 0x08 "V1DMR,Video 1 Data Mode Register" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") hexmask.long.byte 0x08 24.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " else hexmask.long.byte 0x08 25.--31. 1. " A8BIT ,Alpha 8- alpha value for the ARGB8888 format output" textline " " endif bitfld.long 0x08 16. " EVA ,Even field address offset" "Base address,Base address + memory width" bitfld.long 0x08 12.--14. " YMODE ,YC data transfer mode" "Y and CbCr,Y 8-bit,Y 10->16-bit and CbCr,Y 10->16-bit,Y 12->16-bit and CbCr,Y 12->16-bit,?..." textline " " sif (cpu()=="R8A7792X") bitfld.long 0x08 11. " YC_THR ,YC data through mode" "YMODE[2:0] bits,10-bit/12-bit" textline " " endif bitfld.long 0x08 8. " EXRGB ,Extension RGB conversion mode" "Not extended,Extended" bitfld.long 0x08 4. " BPSM ,Output data byte swap mode" "Not swapped,Swapped" textline " " bitfld.long 0x08 2. " ABIT ,Alpha bit" "0,1" bitfld.long 0x08 0.--1. " DTMD ,Data conversion mode" "Not converted,RGB -> ARGB,YC separated,?..." line.long 0x0C "V1DMR2,Video 1 Data Mode Register 2" sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.long 0x0C 31. " FPS ,Field signal polarity select" "Odd/Even field,Even/Odd field" textline " " endif bitfld.long 0x0C 30. " VPS ,Vsync signal polarity select" "Active low,Active high" textline " " bitfld.long 0x0C 29. " HPS ,Hsync signal polarity select" "Active low,Active high" bitfld.long 0x0C 28. " CES ,Clock enable signal polarity select" "Active high,Active low" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 27. " DES ,Data extension select" "Expanded,Padded" textline " " endif bitfld.long 0x0C 23. " CHS ,Clock enable Hsync select" "VIn_CLKEN,Vin_HSYNC" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") bitfld.long 0x0C 22. " YDS ,YCbCr422 8-bit data input pin select" "VIn_B[7:0] pins,VIn_G[7:0] pins" textline " " endif bitfld.long 0x0C 17. " FTEV ,VSYNC field toggle mode enable" "Disabled,Enabled" textline " " bitfld.long 0x0C 16. " FTEH ,HSYNC field toggle counter enable" "Disabled,Enabled" bitfld.long 0x0C 12.--15. " VLV ,VSYNC field toggle mode transition period" "Every VSYNC,1 signal,2 signals,3 signals,4 signals,5 signals,6 signals,7 signals,8 signals,9 signals,10 signals,11 signals,12 signals,13 signals,14 signals,15 signals" textline " " hexmask.long.word 0x0C 0.--11. 1. " HLV ,HSYNC filed toggle count value" line.long 0x10 "V1UVAOF,Video 1 Address Offset Register" hexmask.long 0x10 7.--31. 0x80 " UVAOF ,UV data address offset" sif cpuis("R8A77420") group.long 0x64++0x0B line.long 0x00 "V1CSCC1,Video 1 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V1CSCC2,Video 1 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V1CSCC3,Video 1 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" else group.long 0x64++0x0B line.long 0x00 "V1CSCC1,Video 1 Color Space Change Coefficient 1 Register" hexmask.long.word 0x00 16.--25. 1. " YMUL ,Y data multiplication coefficient" hexmask.long.byte 0x00 8.--15. 1. " YSUB ,Y data subtraction coefficient" textline " " hexmask.long.byte 0x00 0.--7. 1. " CSUB ,CbCr data subtraction coefficient" line.long 0x04 "V1CSCC2,Video 1 Color Space Change Coefficient 2 Register" hexmask.long.word 0x04 16.--25. 1. " RCRMUL ,Cr multiplication coefficient for R data calculation" hexmask.long.word 0x04 0.--9. 1. " GCRMUL ,Cr multiplication coefficient for G data calculation" line.long 0x08 "V1CSCC3,Video 1 Color Space Change Coefficient 3 Register" hexmask.long.word 0x08 16.--25. 1. " GCBMUL ,Cb multiplication coefficient for G data calculation" hexmask.long.word 0x08 0.--9. 1. " BCBMUL ,Cb multiplication coefficient for B data calculation" endif width 9. tree "Coefficient Set Registers" sif !cpuis("R8A77440") tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V1C1A,Video 1 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C1B,Video 1 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C1C,Video 1 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V1C2A,Video 1 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C2B,Video 1 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C2C,Video 1 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V1C3A,Video 1 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C3B,Video 1 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C3C,Video 1 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V1C4A,Video 1 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C4B,Video 1 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C4C,Video 1 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V1C5A,Video 1 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C5B,Video 1 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C5C,Video 1 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V1C6A,Video 1 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C6B,Video 1 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C6C,Video 1 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V1C7A,Video 1 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C7B,Video 1 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C7C,Video 1 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V1C8A,Video 1 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C8B,Video 1 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C8C,Video 1 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end else tree "Coefficient 1" group.long 0x80++0x0B line.long 0x00 "V1C1A,Video 1 Coefficient Set C1A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C1B,Video 1 Coefficient Set C1B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C1C,Video 1 Coefficient Set C1C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 2" group.long 0x90++0x0B line.long 0x00 "V1C2A,Video 1 Coefficient Set C2A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C2B,Video 1 Coefficient Set C2B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C2C,Video 1 Coefficient Set C2C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 3" group.long 0xA0++0x0B line.long 0x00 "V1C3A,Video 1 Coefficient Set C3A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C3B,Video 1 Coefficient Set C3B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C3C,Video 1 Coefficient Set C3C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 4" group.long 0xB0++0x0B line.long 0x00 "V1C4A,Video 1 Coefficient Set C4A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C4B,Video 1 Coefficient Set C4B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C4C,Video 1 Coefficient Set C4C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 5" group.long 0xC0++0x0B line.long 0x00 "V1C5A,Video 1 Coefficient Set C5A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C5B,Video 1 Coefficient Set C5B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C5C,Video 1 Coefficient Set C5C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 6" group.long 0xD0++0x0B line.long 0x00 "V1C6A,Video 1 Coefficient Set C6A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C6B,Video 1 Coefficient Set C6B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C6C,Video 1 Coefficient Set C6C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 7" group.long 0xE0++0x0B line.long 0x00 "V1C7A,Video 1 Coefficient Set C7A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C7B,Video 1 Coefficient Set C7B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C7C,Video 1 Coefficient Set C7C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end tree "Coefficient 8" group.long 0xF0++0x0B line.long 0x00 "V1C8A,Video 1 Coefficient Set C8A Register" hexmask.long.word 0x00 20.--29. 1. " L1 ,L1 coefficient" hexmask.long.word 0x00 10.--19. 1. " L2 ,L2 coefficient" hexmask.long.word 0x00 0.--9. 1. " L3 ,L3 coefficient" line.long 0x04 "V1C8B,Video 1 Coefficient Set C8B Register" hexmask.long.word 0x04 20.--29. 1. " R1 ,R1 coefficient" hexmask.long.word 0x04 10.--19. 1. " R2 ,R2 coefficient" hexmask.long.word 0x04 0.--9. 1. " R3 ,R3 coefficient" line.long 0x08 "V1C8C,Video 1 Coefficient Set C8C Register" hexmask.long.word 0x08 20.--29. 1. " R4 ,R4 coefficient" hexmask.long.word 0x08 10.--19. 1. " L4 ,L4 coefficient" hexmask.long.word 0x08 0.--9. 1. " M ,M coefficient" tree.end endif tree.end textline " " width 13. sif (cpu()=="R8A7792X")||cpuis("R8A774*")||cpuis("R7S72104*")||cpuis("R7S72106*") sif !cpuis("R8A77440") group.long 0x100++0x07 line.long 0x00 "V1LUTP,Video 1 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V1LUTD,Video 1 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" else group.long 0x100++0x07 line.long 0x00 "V1LUTP,Video 1 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V1LUTD,Video 1 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" endif group.long 0x228++0x23 line.long 0x00 "V1YCCR1,Video 1 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V1YCCR2,Video 1 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V1YCCR3,Video 1 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V1CBCCR1,Video 1 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V1CBCCR2,Video 1 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V1CBCCR3,Video 1 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation Sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V1CRCCR1,Video 1 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V1CRCCR2,Video 1 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V1CRCCR3,Video 1 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift Down Volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" else group.long 0x100++0x07 line.long 0x00 "V1LUTP,Video 1 Lookup Table Pointer" hexmask.long.word 0x00 20.--29. 1. " LTYPR ,Lookup table Y pointer" hexmask.long.word 0x00 10.--19. 1. " LTCBPR ,Lookup table Cb pointer" textline " " hexmask.long.word 0x00 0.--9. 1. " LTCRPR ,Lookup table Cr pointer" line.long 0x04 "V1LUTD,Video 1 Lookup Table Data Register" hexmask.long.byte 0x04 16.--23. 1. " LTYDT ,Lookup table Y data" hexmask.long.byte 0x04 8.--15. 1. " LTCBDT ,Lookup table Cb data" textline " " hexmask.long.byte 0x04 0.--7. 1. " LTCRDT ,Lookup table Cr data" group.long 0x228++0x23 line.long 0x00 "V1YCCR1,Video 1 RGB->YC Calculation Setting Register 1" hexmask.long.word 0x00 0.--12. 1. " YCLRP ,R multiplication coefficient for YC calculation" line.long 0x04 "V1YCCR2,Video 1 RGB->YC Calculation Setting Register 2" hexmask.long.word 0x04 16.--28. 1. " YCLBP ,B multiplication coefficient for YC calculation" hexmask.long.word 0x04 0.--12. 1. " YCLGP ,G multiplication coefficient for YC calculation" line.long 0x08 "V1YCCR3,Video 1 RGB->YC Calculation Setting Register 3" bitfld.long 0x08 31. " YEXPEN ,YC calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x08 24.--28. " YCLSFT ,YC calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x08 23. " YCLHEN ,YC calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x08 16. " YCLCEN ,YC calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x08 0.--11. 1. " YCLAP ,YC calculation data normalized additional value" line.long 0x0C "V1CBCCR1,Video 1 RGB->Cb Calculation Setting Register 1" hexmask.long.word 0x0C 0.--12. 1. " CBCLRP ,R multiplication coefficient for Cb calculation" line.long 0x10 "V1CBCCR2,Video 1 RGB->Cb Calculation Setting Register 2" hexmask.long.word 0x10 16.--28. 1. " CBCLBP ,B multiplication coefficient for CBC calculation" hexmask.long.word 0x10 0.--12. 1. " CBCLGP ,G multiplication coefficient for CBC calculation" line.long 0x14 "V1CBCCR3,Video 1 RGB->Cb Calculation Setting Register 3" bitfld.long 0x14 31. " CBEXPEN ,Cb calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x14 24.--28. " CBCLSFT ,Cb calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x14 23. " CBCLHEN ,Cb calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x14 16. " CBCLCEN ,Cb calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x14 0.--11. 1. " CBCLAP ,Cb calculation data normalized additional value" line.long 0x18 "V1CRCCR1,Video 1 RGB->Cr Calculation Setting Register 1" hexmask.long.word 0x18 0.--12. 1. " CRCLRP ,R multiplication coefficient for Cr calculation" line.long 0x1C "V1CRCCR2,Video 1 RGB->Cr Calculation Setting Register 2" hexmask.long.word 0x1C 16.--28. 1. " CRCLBP ,B multiplication coefficient for CRC calculation" hexmask.long.word 0x1C 0.--12. 1. " CRCLGP ,G multiplication coefficient for CRC calculation" line.long 0x20 "V1CRCCR3,Video 1 RGB->Cr Calculation Setting Register 3" bitfld.long 0x20 31. " CRCEXPEN ,Cr calculation sign extension enable" "Disabled,Enabled" bitfld.long 0x20 24.--28. " CRCLSFT ,Cr calculation shift down volume" "0,1,2,3,4,5,6,7,8,10,11,12,13,14,15,?..." textline " " bitfld.long 0x20 23. " CRCLHEN ,Cr calculation shift down result round-off enable" "Disabled,Enabled" bitfld.long 0x20 16. " CRCLCEN ,Cr calculation data clip enable" "Disabled,Enabled" textline " " hexmask.long.word 0x20 0.--11. 1. " CRCLAP ,Cr calculation data normalized additional value" endif group.long 0x300++0x0F line.long 0x00 "V1CSCE1,Video 1 YC->RGB Calculation Setting Extension Register 1" hexmask.long.word 0x00 0.--13. 1. " YMUL2 ,Y multiplication coefficient 2 for RGB calculation" line.long 0x04 "V1CSCE2,Video 1 YC->RGB Calculation Setting Extension Register 2" hexmask.long.word 0x04 16.--27. 1. " YSUB2 ,Y subtraction coefficient 2 for RGB calculation" hexmask.long.word 0x04 0.--11. 1. " CSUB2 ,CbCr Subtraction coefficient 2 for RGB calculation" line.long 0x08 "V1CSCE3,Video 1 YC->RGB Calculation Setting Extension Register 3" hexmask.long.word 0x08 16.--29. 1. " RCRMUL2 ,YCr multiplication coefficient 2 for R calculation" hexmask.long.word 0x08 0.--13. 1. " GCRMUL2 ,Cr multiplication coefficient 2 for G calculation" line.long 0x0C "V1CSCE4,Video 1 YC->RGB Calculation Setting Extension Register 4" hexmask.long.word 0x0C 16.--29. 1. " GCBMUL2 ,Cb multiplication coefficient 2 for G calculation" hexmask.long.word 0x0C 0.--13. 1. " BCBMUL2 ,Cb multiplication coefficient 2 for B calculation" sif cpuis("R7S72104*")||cpuis("R7S72106*") group.long 0x320++0x03 line.long 0x00 "V1SRCSEL,Video 1 Input Source Selection Register" bitfld.long 0x00 0. " SEL ,Input data selection" "LVTTL,MIPI CSI-2 output signal" endif width 0x0B tree.end tree.end tree "IMR-LSX2 (Distortion Correction Engine)" base ad:0xFE860000 width 6. tree "Control Registers" group.long 0x08++0x03 line.long 0x00 "CR,Control Register" bitfld.long 0x00 15. " SWRST ,Software Reset" "No reset,Reset" bitfld.long 0x00 0. " RS ,Rendering Start" "Not started,Started" rgroup.long 0x0c++0x03 line.long 0x00 "SR,Status Register" bitfld.long 0x00 5. " REN ,Rendering-in-Progress Flag" "Not in progress,In progress" bitfld.long 0x00 2. " INT ,INT Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 1. " IER ,Illegal Instruction Decode" "Not decoded,Decoded" bitfld.long 0x00 0. " TRA ,Trap- rendering operation completed" "Not started/Not completed,Completed" wgroup.long 0x10++0x03 line.long 0x00 "SRCR,Status Clear Register" bitfld.long 0x00 2. " INTCLR ,Clear the INT bit in SR" "No effect,Cleared" bitfld.long 0x00 1. " IERCLR ,Clear the IER bit in SR" "No effect,Cleared" bitfld.long 0x00 0. " TRACLR ,Clear the TRA bit in SR" "No effect,Cleared" group.long 0x14++0x07 line.long 0x00 "ICR,Interrupt Control Register" bitfld.long 0x00 2. " INTENB ,INT Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " IERENB ,IER Interupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " TRAENB ,TRA Interupt Enable" "Disabled,Enabled" line.long 0x04 "IMR,Interrupt Mask Enable" bitfld.long 0x04 2. " INM ,INT Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 1. " IEM ,IER Interrupt Mask" "Not masked,Masked" bitfld.long 0x04 0. " TRAM ,TA Interrupt Mask" "Not masked,Masked" rgroup.long 0x1C++0x7 line.long 0x00 "DLSP,DL Stack Pointer Register" line.long 0x04 "DLPR,DL Status Register" tree.end width 7. tree "Memory Control Registers" group.long 0x30++0x13 line.long 0x00 "DLSAR,DL Start Address Register" hexmask.long 0x00 3.--31. 0x8 " DLSA ,DL Start Address" line.long 0x04 "DSAR,Destination Start Address Register" hexmask.long 0x04 5.--31. 0x20 " DSA ,Destination Start Address" line.long 0x08 "SSAR,Source Start Address Register" hexmask.long 0x08 6.--31. 0x40 " SSAR ,SRC Start Address" line.long 0x0C "DSTR,Destination Stride Register" hexmask.long.byte 0x0C 4.--13. 0x10 " DST ,Memory width of DST" rbitfld.long 0x0C 0.--3. " DST ,Memory width of DST" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x10 "SSTR,Source Stride Register" hexmask.long.word 0x10 4.--12. 0x10 " SSTR ,Memory width of SRC" rbitfld.long 0x10 0.--3. " SSTR ,Memory width of SRC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end tree "Rendering Control Register" width 8. group.long 0x54++0x03 line.long 0x00 "CMRCR,Rendering Mode Register" setclrfld.long 0x00 19. 0x04 19. 0x08 19. " CLSM_set/clr ,Hue Correction Scale" "DL,UBCPR/VRCPR" setclrfld.long 0x00 18. 0x04 18. 0x08 18. " CLOM_set/clr ,Hue Correction Offset Parameter" "DL,UBCPR/VRCPR" setclrfld.long 0x00 17. 0x04 17. 0x08 17. " LUSM_set/clr ,Luminance Correction Scale Parameter" "DL,YLCPR" setclrfld.long 0x00 16. 0x04 16. 0x08 16. " LUOM_set/clr ,Luminance Correction Offset Parameter" "DL,YLCPR" textline " " setclrfld.long 0x00 14. 0x04 14. 0x08 14. " YCM_set/clr ,YC Mode" "Y,UV" setclrfld.long 0x00 11. 0x04 11. 0x08 12. " SY10_set/clr ,Luminance processing precision" "8-bbp,10-bbp" setclrfld.long 0x00 8. 0x04 8. 0x08 8. " Y10_set/clr ,Y data output precision" "8-bbp,10-bbp" setclrfld.long 0x00 2. 0x04 2. 0x08 2. " CLCE_set/clr ,Hue Correction Enable" "Disabled,Enabled" textline " " setclrfld.long 0x00 1. 0x04 1. 0x08 1. " LUCE_set/clr ,Luminance Correction Enable" "Disabled,Enabled" group.long 0x60++0x03 line.long 0x00 "TRIMR,Triangle Mode Register" setclrfld.long 0x00 6. 0x04 6. 0x08 6. " TCM_set/clr ,Triangle Clockwise Mode" "Counterclockwise,Clockwise" setclrfld.long 0x00 5. 0x04 5. 0x08 5. " DUDVM_set/clr ,Relative Source Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 4. 0x04 4. 0x08 4. " DXDYM_set/clr ,Relative Destination Specification Mode" "Disabled,Enabled" setclrfld.long 0x00 3. 0x04 3. 0x08 3. " AUTOSG_set/clr ,Automatic Source Coordinate Generation Mode" "Disabled,Enabled" textline " " setclrfld.long 0x00 2. 0x04 2. 0x08 2. " AUTODG_set/clr ,Automatic Destination Coordinate Generation Mode" "Disabled,Enabled" setclrfld.long 0x00 1. 0x04 1. 0x08 1. " BFE_set/clr ,Bilinear Filter Enable" "Disabled,Enabled" setclrfld.long 0x00 0. 0x04 0. 0x08 0. " TME_set/clr ,Texture Mapping Enable" "Disabled,Enabled" textline "" group.long 0x6C++0xF line.long 0x00 "TRICR,Triangle Color Register" hexmask.long.byte 0x00 0.--7. 1. " TCY ,Y for single-color" hexmask.long.byte 0x00 8.--15. 1. " TCU ,U for single-color" hexmask.long.byte 0x00 16.--23. 1. " TCV ,V for single-color" bitfld.long 0x00 24.--25. " TCY2 , Bits 9 and 8 of Y for single-color" "0,1,2,3" line.long 0x04 "UVDPOR,Source and Destination Coordinate Decimal Point Register" bitfld.long 0x04 8. " DDP ,Destination coordinates" "Integer,Fixed-point" bitfld.long 0x04 0.--2. " UVDPO ,Source Coordinate Decimal Point" "0,1,2,3,4,5,?..." line.long 0x08 "SUSR,Width Register" hexmask.long.word 0x08 16.--26. 1. " SUW ,Source width - 2" hexmask.long.word 0x08 0.--10. 1. " SVW ,Source width - 1" line.long 0x0C "SVSR,Source Height Register" hexmask.long.word 0x0C 0.--10. 1. " SVS ,Height (vertical size) of the source" group.long 0x80++0x1F line.long 0x00 "XMINR,MIN Clipping X Register" hexmask.long.word 0x00 0.--12. 1. " XMIN ,X Clip MIN" line.long 0x04 "YMINR,MIN Clipping Y Register" hexmask.long.word 0x04 0.--12. 1. " YMIN ,Y Clip MIN" line.long 0x08 "XMAXR,MAX Clipping X Register" hexmask.long.word 0x08 0.--12. 1. " XMAX ,X Clip MAX" line.long 0x0C "YMAXR,MAX Clipping Y Register" hexmask.long.word 0x0C 0.--12. 1. " YMAX ,Y Clip MAX" line.long 0x10 "AMXSR,Mesh Generation X Size Register" hexmask.long.word 0x10 0.--12. 1. " AMXS ,Automatic Mesh X Size" line.long 0x14 "AMYSR,Mesh Generation Y Size Register" hexmask.long.word 0x14 0.--12. 1. " AMYS ,Automatic Mesh Y Size" line.long 0x18 "AMXOR,Mesh Generation X Start Register" hexmask.long.word 0x18 0.--12. 1. " AMXO ,Automatic Mesh X Origin" line.long 0x1C "AMYOR,Mesh Generation Y Start Register" hexmask.long.word 0x1C 0.--12. 1. " AMYO ,Automatic Mesh Y Origin" group.long 0xB0++0x17 line.long 0x00 "YLMINR,Minimum Luminance Correction Y Register" hexmask.long.word 0x00 0.--12. 1. " YLMIN ,Y luminance MIN" line.long 0x04 "UBMINR,Minimum Hue Correction U Register" hexmask.long.byte 0x04 0.--7. 1. " UBMIN ,U hue MIN" line.long 0x08 "VRMINR,Minimum Hue Correction V Register" hexmask.long.byte 0x08 0.--7. 1. " VRMIN ,V hue MIN" line.long 0x0C "YLMAXR,Maximum Luminance Correction Y Register" hexmask.long.word 0x0C 0.--11. 1. " YLMAX ,Y luminance MAX" line.long 0x10 "UBMAXR,Maximum Hue Correction U Register" hexmask.long.byte 0x10 0.--7. 1. " UBMAX ,U hue MAX" line.long 0x14 "VRMAXR,Maximum Hue Correction V Register" hexmask.long.byte 0x14 0.--7. 1. " VRMAX ,V hue MINMAX" group.long 0xD0++0xF line.long 0x00 "CPDPOR,Correction Decimal Point Register" bitfld.long 0x00 8.--10. " YLDPO ,Y value scale" "0,1,2,3,4,5,6,7" bitfld.long 0x00 4.--6. " UBDPO ,U value scale" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " VRDPO ,V value scale" "0,1,2,3,4,5,6,7" line.long 0x04 "YLCPR,Luminance Correction Parameter Y Register" hexmask.long.byte 0x04 8.--15. 1. " LSCAL ,Luminance correction scale parameter when LUSM = 1" hexmask.long.byte 0x04 0.--7. 1. " LOFST ,Luminance correction offset parameter when LUOM = 1" line.long 0x08 "UBCPR,Hue Correction Parameter U Register" hexmask.long.byte 0x08 8.--15. 1. " UBSCL ,U value scale parameter when CLSM = 1" hexmask.long.byte 0x08 0.--7. 1. " UBOFS ,U value offset parameter when CLOM = 1" line.long 0x0C "VRCPR,Hue Correction Parameter V Register" hexmask.long.byte 0x0C 8.--15. 1. " VRSCL ,V value scale parameter when CLSM = 1" hexmask.long.byte 0x0C 0.--7. 1. " VROFS ,V value offset parameter when CLOM = 1" tree.end width 0xb tree.end tree "VPC (Video Processing Unit Cache)" base ad:0xFE908000 width 8. group.long 0x04++0x03 line.long 0x00 "VPCCTL,Control Register" bitfld.long 0x00 28. " F64 ,64 Byte/Line cache mode" "Disabled,Enabled" bitfld.long 0x00 12. " LWSWAP ,Longword swap" "Not swapped,Swapped" bitfld.long 0x00 2.--3. " STRIDE ,VPC stride setting" "256-byte,512-byte,1024-byte,2048-byte" textline " " bitfld.long 0x00 1. " CLR ,VPC clear" "No effect,Cleared" bitfld.long 0x00 0. " ENB ,VPC enable" "Disabled,Enabled" rgroup.long 0x08++0x03 line.long 0x00 "VPCSTS,Status Register" bitfld.long 0x00 0. " IDL ,VPC idle" "Busy,Idle" sif (cpu()=="RCARM2")||cpuis("R8A77940") group.long 0x78++0x03 line.long 0x00 "VPCCFG,Configuration Register" bitfld.long 0x00 19.--21. " CTLH ,Tile height size setting for chroma data" "32,64,128,256,512,16,," bitfld.long 0x00 16.--18. " CTLW ,Tile width size setting for chroma data" "32,64,128,256,512,16,," bitfld.long 0x00 5.--7. " YTLH ,Tile height size setting for luminance data" "32,64,128,256,512,16,," textline " " bitfld.long 0x00 2.--4. " YTLW ,Tile width size setting for luminance data" "32,64,128,256,512,16,," bitfld.long 0x00 1. " TL ,Tile mode setting" "Linear,Tile" bitfld.long 0x00 0. " MODE ,VPC addressing mode select" ",XY addressing" elif (cpu()=="R8A77470") textline " " group.long 0x78++0x03 line.long 0x00 "VPCCFG,Configuration Register" bitfld.long 0x00 19.--21. " CTLH ,Tile height size setting for chroma data" "32,64,128,256,512,16,?..." bitfld.long 0x00 16.--18. " CTLW ,Tile width size setting for chroma data" "32,64,128,256,512,16,?..." bitfld.long 0x00 5.--7. " YTLH ,Tile height size setting for luminance data" "32,64,128,256,512,16,?..." textline " " bitfld.long 0x00 2.--4. " YTLW ,Tile width size setting for luminance data" "32,64,128,256,512,16,?..." bitfld.long 0x00 1. " TL ,Tile mode setting" "Linear,Tile" bitfld.long 0x00 0. " MODE ,VPC addressing mode select" "Linear addressing,XY addressing" textline " " base ad:0xFE960380 group.long 0x00++0x03 line.long 0x00 "VPC0XY,XY Setting Register For Ch0" bitfld.long 0x00 4.--11. " STRIDE ,STRIDE bit" "32,64,128,256,512,16,?..." bitfld.long 0x00 3. " AC ,AC bit" "0,1" bitfld.long 0x00 1. " BT ,BT bit" "0,1" bitfld.long 0x00 0. " AD ,AD bit" "0,1" endif width 0x0B tree.end tree "FDP1 (Fine Display Processor)" base ad:0xFE940000 width 21. tree "General Control Registers" group.long 0x00++0x1B line.long 0x00 "FD1_CTL_CMD,FDP1 Start Register" bitfld.long 0x00 0. " STRCMD ,Start Command" "Not started,Started" line.long 0x04 "FD1_CTL_SGCMD,Sync Generator Register" bitfld.long 0x04 0. " SGEN ,V-Sync Generator Enable" "Disabled,Enabled" line.long 0x08 "FD1_CTL_REGEND,Register Set End Register" bitfld.long 0x08 0. " REGEND ,Register Set End Flag" "Not set,Set" line.long 0x0C "FD1_CTL_CHACT,Channel Activation Register" bitfld.long 0x0C 9. " SMW ,SMW" "0,1" bitfld.long 0x0C 8. " WR ,WR" "0,1" bitfld.long 0x0C 3. " SMR ,SMR" "0,1" textline " " bitfld.long 0x0C 2. " RD2 ,RD2" "0,1" bitfld.long 0x0C 1. " RD1 ,RD1" "0,1" bitfld.long 0x0C 0. " RD0 ,RD0" "0,1" line.long 0x10 "FD1_CTL_OPMODE,Operation Mode Register" bitfld.long 0x10 4. " PRG ,Progressive Mode" "Interlace,Progressive" bitfld.long 0x10 0.--1. " VIMD ,V-Sync Interrupt Mod" "Normal,Best Effort,No interrupt,?..." line.long 0x14 "FD1_CTL_VPERIOD,V-Period Register" group.long 0x1C++0x3 line.long 0x00 "FD1_CTL_SRESET,Software Reset Register" bitfld.long 0x00 0. " SRST ,FDP1 Software Reset" "No reset,Reset" rgroup.long 0x24++0x7 line.long 0x00 "FD1_CTL_STATUS,Operating Status Register" hexmask.long.word 0x00 16.--31. 1. " VINT_CNT ,V-Sync Interrupt Counter Status" bitfld.long 0x00 10. " SGREGSET ,Register Set End Status" "Not set,Set" bitfld.long 0x00 9. " SGVERR ,V-Sync End Error Status" "No error,Error" textline " " bitfld.long 0x00 8. " SGFREND ,Frame End Status" "Not finished,Finished" bitfld.long 0x00 0. " BSY ,FDP1 Operating Status" "Stopped,Operated" line.long 0x04 "FD1_CTL_VCYCLE_STAT,V-Cycles Status Register" group.long 0x38++0x7 line.long 0x00 "FD1_CTL_IRQENB,Interrupt Enable Register" bitfld.long 0x00 16. " VERE ,Interrupt Enable for V-Sync End Error" "Disabled,Enabled" bitfld.long 0x00 4. " VINTE ,Interrupt Enable for V-Sync" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt Enable for Frame End" "Disabled,Enabled" line.long 0x04 "FD1_CTL_IRQSTA,Interrupt Status Register" bitfld.long 0x04 16. " VER ,Interrupt status for V-Sync End Error" "No interrupt,Interrupt" bitfld.long 0x04 4. " VINT ,Interrupt status for V-Sync" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for Frame End" "No interrupt,Interrupt" tree.end width 19. tree "RPF Contol Registers" group.long 0x60++0x37 line.long 0x00 "FD1_RPF_SIZE,Source Picture Size Register" hexmask.long.word 0x00 16.--26. 1. " HSIZE ,Horizontal Source Picture Size" hexmask.long.word 0x00 0.--10. 1. " VSIZE ,Vertical Source Picture Size" line.long 0x04 "FD1_RPF_FORMAT,Source Picture Format Register" bitfld.long 0x04 16. " CIPM ,CIPM" "0,1" bitfld.long 0x04 13. " RSPYCS ,RPF Input Mode Setting 1" "0,1" bitfld.long 0x04 12. " RSPUVS ,RPF Input Mode Setting 2" "0,1" textline " " bitfld.long 0x04 8. " CF ,Current Field" "Top,Bottom" hexmask.long.byte 0x04 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x08 "FD1_RPF_PSTRIDE,Source Picture Stride Register" hexmask.long.word 0x08 16.--31. 1. " SRC_STRD_Y ,Memory Stride of Source Picture Y Plane" hexmask.long.word 0x08 0.--15. 1. " SRC_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0xC "FD1_RPF0_ADDR_Y,RPF0 Source Component-Y Address Register" line.long (0xC+0x04) "FD1_RPF0_ADDR_C0,RPF0 Source Component-C0 Address Register" line.long (0xC+0x08) "FD1_RPF0_ADDR_C1,RPF0 Source Component-C1 Address Register" line.long 0x18 "FD1_RPF1_ADDR_Y,RPF1 Source Component-Y Address Register" line.long (0x18+0x04) "FD1_RPF1_ADDR_C0,RPF1 Source Component-C0 Address Register" line.long (0x18+0x08) "FD1_RPF1_ADDR_C1,RPF1 Source Component-C1 Address Register" line.long 0x24 "FD1_RPF2_ADDR_Y,RPF2 Source Component-Y Address Register" line.long (0x24+0x04) "FD1_RPF2_ADDR_C0,RPF2 Source Component-C0 Address Register" line.long (0x24+0x08) "FD1_RPF2_ADDR_C1,RPF2 Source Component-C1 Address Register" line.long 0x30 "FD1_RPF_SMSK_ADDR,Still Mask Address Register" line.long 0x34 "FD1_RPF_SWAP,RPF Data Swap Register" bitfld.long 0x34 3. " ISWAP[3] ,Input Long Long Word (64-bit) Swap" "Not swapped,Swapped" bitfld.long 0x34 2. " ISWAP[2] ,Input Long Word (32-bit) Swap" "Not swapped,Swapped" bitfld.long 0x34 1. " ISWAP[1] ,Input Word (16-bit) Swap" "Not swapped,Swapped" textline " " bitfld.long 0x34 0. " ISWAP[0] ,Input Byte (8-bit) Swap" "Not swapped,Swapped" tree.end width 17. tree "WPF Control Registers" group.long 0xC0++0x1B line.long 0x00 "FD1_WPF_FORMAT,Destination Picture Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 15. " WSPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " WSPUVS ,WPF Output Mode Setting 2" "0,1" textline " " bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,Enabled,?..." bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr[16.235/240]->RGB[0.255],BT.601 YCbCr[0.255]->RGB[0.255],BT.709 YCbCr[16.235/240]->RGB[0.255],BT.709 YCbCr[16.235/240]->RGB[16.235],?..." bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" textline " " hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" line.long 0x04 "FD1_WPF_RNDCTL,Destination Picture Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction Selection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." line.long 0x08 "FD1_WPF_PSTRIDE,Destination Picture Stride Register" hexmask.long.word 0x08 16.--31. 1. " DST_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" hexmask.long.word 0x08 0.--15. 1. " DST_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x0C "FD1_WPF_ADDR_Y,Destination Component-Y Address Register" line.long 0x10 "FD1_WPF_ADDR_C0,Destination Component-C0 Address Register" line.long 0x14 "FD1_WPF_ADDR_C1,Destination Component-C1 Address Register" line.long 0x18 "FD1_WPF_SWAP,WPF Data Swap Register" bitfld.long 0x18 7. " SSWAP[3] ,Long Long Word (64-bit) Swap" "Not swapped,Swapped" bitfld.long 0x18 6. " SSWAP[2] ,Long Word (32-bit) Swap" "Not swapped,Swapped" bitfld.long 0x18 5. " SSWAP[1] ,Word (16-bit) Swap" "Not swapped,Swapped" textline " " bitfld.long 0x18 4. " SSWAP[0] ,Byte (8-bit) Swap" "Not swapped,Swapped" bitfld.long 0x18 3. " 0SWAP[3] ,Output Long Long Word (64-bit) Swap" "Not swapped,Swapped" bitfld.long 0x18 2. " 0SWAP[2] ,Output Long Word (32-bit) Swap" "Not swapped,Swapped" textline " " bitfld.long 0x18 1. " 0SWAP[1] ,Output Word (16-bit) Swap" "Not swapped,Swapped" bitfld.long 0x18 0. " 0SWAP[0] ,Output Byte (8-bit) Swap" "Not swapped,Swapped" tree.end width 21. tree "IPC Control Registers" group.long 0x100++0xF line.long 0x00 "FD1_IPC_MODE,IPC Mode Register" bitfld.long 0x00 8. " DLI ,DLI" "0,1" bitfld.long 0x00 0.--2. " DIM ,De-Interlacing Mode" "Adaptive 2D/3D,Fixed 2D,Fixed 3D,Select previous,Select next,?..." textline " " line.long 0x04 "FD1_IPC_SMSK_THRESH,Still Mask Threshold Register" bitfld.long 0x04 16. " FSM0 ,FSM0" "0,1" hexmask.long.byte 0x04 0.--7. 1. " SMSK_TH ,SMSK_TH" line.long 0x08 "FD1_IPC_COMB_DET,Comb Detection Parameter Register" hexmask.long.byte 0x08 16.--23. 1. " CMB_OFST ,CMB_OFST" hexmask.long.byte 0x08 8.--15. 1. " CMB_MAX ,CMB_MAX" hexmask.long.byte 0x08 0.--7. 1. " CMB_GRAD ,CMB_GRAD" line.long 0x0C "FD1_IPC_MOTDEC,Motion Decision Parameter Register" hexmask.long.byte 0x0C 8.--15. 1. " MOV_COEF ,MOV_COEF" hexmask.long.byte 0x0C 0.--7. 1. " STL_COEF ,STL_COEF" group.long 0x120++0x17 line.long 0x00 "FD1_IPC_DLI_BLEND,DLI Blend Parameter Register" hexmask.long.byte 0x00 16.--23. 1. " BLD_GRAD ,BLD_GRAD" hexmask.long.byte 0x00 8.--15. 1. " BLD_OFST ,BLD_OFST" hexmask.long.byte 0x00 0.--7. 1. " BLD_MAX ,BLD_MAX" line.long 0x04 "FD1_IPC_DLI_HGAIN,DLI Horizontal Frequency Gain Register" hexmask.long.byte 0x04 16.--23. 1. " HG_GRAD ,HG_GRAD" hexmask.long.byte 0x04 8.--15. 1. " HG_OFST ,HG_OFST" hexmask.long.byte 0x04 0.--7. 1. " HG_MAX ,HG_MAX" line.long 0x08 "FD1_IPC_DLI_SPRS,DLI Suppression Parameter register" hexmask.long.byte 0x08 16.--23. 1. " SPRS_GRAD ,SPRS_GRAD" hexmask.long.byte 0x08 8.--15. 1. " SPRS_OFST ,SPRS_OFST" hexmask.long.byte 0x08 0.--7. 1. " SPRS_MAX ,SPRS_MAX" line.long 0x0C "FD1_IPC_DLI_ANGLE,DLI Angle Parameter Register" hexmask.long.byte 0x0C 16.--23. 1. " ASEL45 ,ASEL45" hexmask.long.byte 0x0C 8.--15. 1. " ASEL22 ,ASEL22" hexmask.long.byte 0x0C 0.--7. 1. " ASEL15 ,ASEL15" line.long 0x10 "FD1_IPC_DLI_ISOPIX0,DLI Isolated Pixel Parameter Register 0" hexmask.long.byte 0x10 24.--31. 1. " IPIX_MAX45 ,IPIX_MAX45" hexmask.long.byte 0x10 16.--23. 1. " IPIX_GRAD45 ,IPIX_GRAD45" hexmask.long.byte 0x10 8.--15. 1. " IPIX_MAX22 ,IPIX_MAX22" textline " " hexmask.long.byte 0x10 0.--7. 1. " IPIX_GRAD22 ,IPIX_GRAD22" line.long 0x14 "FD1_IPC_DLI_ISOPIX1,DLI Isolated Pixel Parameter Register 1" hexmask.long.byte 0x14 8.--15. 1. " IPIX_MAX15 ,IPIX_MAX15" hexmask.long.byte 0x14 0.--7. 1. " IPIX_GRAD15 ,IPIX_GRAD15" group.long 0x140++0x7 line.long 0x00 "FD1_IPC_SENSOR_TH0,IPC Sensor Threshold Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAD_TH ,SAD_TH" hexmask.long.byte 0x00 8.--15. 1. " DIF_TH ,DIF_TH" hexmask.long.byte 0x00 16.--23. 1. " HFQ_TH ,HFQ_TH" textline " " hexmask.long.byte 0x00 24.--31. 1. " VFQ_TH ,VFQ_TH" line.long 0x04 "FD1_IPC_SENSOR_TH1,IPC Sensor Threshold Register 1" hexmask.long.byte 0x04 0.--7. 1. " FREQ_TH ,FREQ_TH" hexmask.long.byte 0x04 8.--15. 1. " COMB_TH ,COMB_TH" bitfld.long 0x04 16.--20. " DETECTOR_SEL ,DETECTOR_SEL" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.long 0x170++0xF line.long 0x00 "FD1_SENSOR_CTL0,Sensor Control Register 0" bitfld.long 0x00 0. " FD_EN ,FD_EN" "0,1" bitfld.long 0x00 8.--11. " FLD_LVTH ,FLD_LVTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 12.--15. " FRM_LVTH ,FLD_LVTH" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x04 "FD1_SENSOR_CTL1,Sensor Control Register 1" hexmask.long.word 0x04 0.--12. 1. " YS ,YS" hexmask.long.word 0x04 16.--28. 1. " XS ,XS" line.long 0x08 "FD1_SENSOR_CTL2,Sensor Control Register 2" hexmask.long.word 0x08 0.--12. 1. " YE ,YE" hexmask.long.word 0x08 16.--28. 1. " XE ,XE" line.long 0x0C "FD1_SENSOR_CTL3,Sensor Control Register 3" hexmask.long.word 0x0C 0.--12. 1. " POSX0 ,POSX0" hexmask.long.word 0x0C 16.--28. 1. " POSX1 ,POSX1" tree "Sensor Registers 0-17" width 15. rgroup.long 0x180++0x4 line.long 0x00 "FD1_SENSOR_0,Sensor Register 0" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x184++0x4 line.long 0x00 "FD1_SENSOR_1,Sensor Register 1" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x188++0x4 line.long 0x00 "FD1_SENSOR_2,Sensor Register 2" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x18C++0x4 line.long 0x00 "FD1_SENSOR_3,Sensor Register 3" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x190++0x4 line.long 0x00 "FD1_SENSOR_4,Sensor Register 4" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x194++0x4 line.long 0x00 "FD1_SENSOR_5,Sensor Register 5" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x198++0x4 line.long 0x00 "FD1_SENSOR_6,Sensor Register 6" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x19C++0x4 line.long 0x00 "FD1_SENSOR_7,Sensor Register 7" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A0++0x4 line.long 0x00 "FD1_SENSOR_8,Sensor Register 8" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A4++0x4 line.long 0x00 "FD1_SENSOR_9,Sensor Register 9" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1A8++0x4 line.long 0x00 "FD1_SENSOR_10,Sensor Register 10" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1AC++0x4 line.long 0x00 "FD1_SENSOR_11,Sensor Register 11" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B0++0x4 line.long 0x00 "FD1_SENSOR_12,Sensor Register 12" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B4++0x4 line.long 0x00 "FD1_SENSOR_13,Sensor Register 13" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1B8++0x4 line.long 0x00 "FD1_SENSOR_14,Sensor Register 14" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1BC++0x4 line.long 0x00 "FD1_SENSOR_15,Sensor Register 15" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1C0++0x4 line.long 0x00 "FD1_SENSOR_16,Sensor Register 16" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" rgroup.long 0x1C4++0x4 line.long 0x00 "FD1_SENSOR_17,Sensor Register 17" hexmask.long 0x00 0.--27. 1. " SENSOR_INFO ,Sensor information of FDP1" tree.end width 21. textline "" group.long 0x1E0++0x3 line.long 0x00 "FD1_IPC_LMEM,Line Memory Pixel Number Register" hexmask.long.word 0x00 0.--11. 1. " PNUM ,PNUM" rgroup.long 0x800++0x3 line.long 0x00 "FD1_IP_INDATA, IP Internal Data Register" hexmask.long 0x00 0.--31. 1. " IP_INTERNAL_DATA ,Internal data" tree.end width 10. tree "MDET" group.long 0x2000++0x3 line.long 0x00 "FD1_MDET,2D Likelihood/2D-3D Blending Coefficient (Alpha)" button "MDET" "d (ad:0xFE940000+0x2000)--(ad:0xFE940000+0x23FF) /long" tree.end width 0xB tree.end tree.open "VSP1" tree "VSPS" base ad:0xFE928000 width 19. tree "General control registers" group.long 0x00++0xF line.long 0x0 "VI6_CMD0,VSP1 Start Register 0" bitfld.long 0x0 0. " STRCMD ,Start Command" "Not started,Started" line.long 0x4 "VI6_CMD1,VSP1 Start Register 1" bitfld.long 0x4 0. " STRCMD ,Start Command" "Not started,Started" line.long 0x8 "VI6_CMD2,VSP1 Start Register 2" bitfld.long 0x8 0. " STRCMD ,Start Command" "Not started,Started" line.long 0xC "VI6_CMD3,VSP1 Start Register 3" bitfld.long 0xC 0. " STRCMD ,Start Command" "Not started,Started" group.long 0x18++0x3 line.long 0x00 "VI6_CLK_DCSWT,Dynamic Clock Stop Control Register" hexmask.long.byte 0x00 8.--15. 1. " CSTPW ,Dynamic Clock Stop Control 1" hexmask.long.byte 0x00 0.--7. 1. " CSTRW ,Dynamic Clock Stop Control 2" group.long 0x28++0x3 line.long 0x00 "VI6_SRESET,Software Reset Register" bitfld.long 0x00 3. " SRST3 ,WPF3 Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SRST2 ,WPF2 Software Reset" "No reset,Reset" bitfld.long 0x00 1. " SRST1 ,WPF1 Software Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " SRST0 ,WPF0 Software Reset" "No reset,Reset" rgroup.long 0x38++0x3 line.long 0x00 "VI6_STATUS,Operating Status Register" bitfld.long 0x00 11. " SYS3_ACT ,WPF3 Operating Status" "Stopped,Operated" bitfld.long 0x00 10. " SYS2_ACT ,WPF2 Operating Status" "Stopped,Operated" bitfld.long 0x00 9. " SYS1_ACT ,WPF1 Operating Status" "Stopped,Operated" textline " " bitfld.long 0x00 8. " SYS0_ACT ,WPF0 Operating Status" "Stopped,Operated" group.long 0x48++0x7 line.long 0x00 "VI6_WPF0_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF0 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF0 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF0 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF0 (Frame End)" "No interrupt,Interrupt" group.long 0x54++0x7 line.long 0x00 "VI6_WPF1_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF1 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF1 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF1 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF1 (Frame End)" "No interrupt,Interrupt" group.long 0x60++0x7 line.long 0x00 "VI6_WPF2_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF2 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF2 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF2 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF2 (Frame End)" "No interrupt,Interrupt" group.long 0x6C++0x7 line.long 0x00 "VI6_WPF3_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF3 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF3 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF3 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF3 (Frame End)" "No interrupt,Interrupt" group.long 0x78++0x7 line.long 0x00 "VI6_DISP_IRQ_ENB,Display Interrupt Enable Register" bitfld.long 0x00 8. " DSTE ,Interrupt enable for Display Start" "Disabled,Enabled" bitfld.long 0x00 5. " MAEE ,Interrupt enable for Display Read Data End" "Disabled,Enabled" bitfld.long 0x00 4. " LNE4E ,Interrupt enable for 1 Line Data Read End of RFP4" "Disabled,Enabled" bitfld.long 0x00 3. " LNE3E ,Interrupt enable for 1 Line Data Read End of RFP3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LNE2E ,Interrupt enable for 1 Line Data Read End of RFP2" "Disabled,Enabled" bitfld.long 0x00 1. " LNE1E ,Interrupt enable for 1 Line Data Read End of RFP1" "Disabled,Enabled" bitfld.long 0x00 0. " LNE0E ,Interrupt enable for 1 Line Data Read End of RFP0" "Disabled,Enabled" line.long 0x04 "VI6_DISP_IRQ_STA,Display Interrupt Enable Register" bitfld.long 0x04 8. " DST ,Interrupt status for Display Start" "No interrupt,Interrupt" bitfld.long 0x04 5. " MAE ,Interrupt status for Display Read Data End" "No interrupt,Interrupt" bitfld.long 0x04 4. " LNE4 ,Interrupt status for 1 Line Data Read End of RFP4" "No interrupt,Interrupt" bitfld.long 0x04 3. " LNE3 ,Interrupt status for 1 Line Data Read End of RFP3" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " LNE2 ,Interrupt status for 1 Line Data Read End of RFP2" "No interrupt,Interrupt" bitfld.long 0x04 1. " LNE1 ,Interrupt status for 1 Line Data Read End of RFP1" "No interrupt,Interrupt" bitfld.long 0x04 0. " LNE0 ,Interrupt status for 1 Line Data Read End of RFP0" "No interrupt,Interrupt" group.long 0x84++0xF line.long 0x0 "VI6_WPF0_LINE_CNT,WPF0 Output Line Count Register" hexmask.long.tbyte 0x0 0.--20. 1. " LINE_CNT ,Number of WPF0 Output Lines" line.long 0x4 "VI6_WPF1_LINE_CNT,WPF1 Output Line Count Register" hexmask.long.tbyte 0x4 0.--20. 1. " LINE_CNT ,Number of WPF1 Output Lines" line.long 0x8 "VI6_WPF2_LINE_CNT,WPF2 Output Line Count Register" hexmask.long.tbyte 0x8 0.--20. 1. " LINE_CNT ,Number of WPF2 Output Lines" line.long 0xC "VI6_WPF3_LINE_CNT,WPF3 Output Line Count Register" hexmask.long.tbyte 0xC 0.--20. 1. " LINE_CNT ,Number of WPF3 Output Lines" group.long 0x100++0x17 line.long 0x00 "VI6_DL_CTRL,Display List Control Register" hexmask.long.word 0x00 16.--31. 1. " AR_WAIT ,Display List Control Setting" bitfld.long 0x00 12. " DC2 ,Display List Control 2" "Disabled,Enabled" bitfld.long 0x00 8. " DC1 ,Display List Control 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DC0 ,Display List Control 0" "Disabled,Enabled" bitfld.long 0x00 2. " CFM0 ,Continuous Frame Mode for Header-less Display List" "Disabled,Enabled" bitfld.long 0x00 1. " NH0 ,Header-less Display List Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DLE ,Display List Enable/Disable" "Disabled,Enabled" line.long 0x4 "VI6_DL_HDR_ADDR0,Display List-0 Header Address Register" line.long 0x8 "VI6_DL_HDR_ADDR1,Display List-1 Header Address Register" line.long 0xC "VI6_DL_HDR_ADDR2,Display List-2 Header Address Register" line.long 0x10 "VI6_DL_HDR_ADDR3,Display List-3 Header Address Register" line.long 0x14 "VI6_DL_SWAP,Display List Data Swapping Register" bitfld.long 0x14 2. " LWS ,Display List Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x14 1. " WDS ,Display List Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x14 0. " BTS ,Display List DataSwapping in Byte Units" "Disabled,Enabled" group.long 0x11C++0x7 line.long 0x00 "VI6_DL_EXT_CTRL,Extended Display List Control Register" bitfld.long 0x00 16. " NWE ,No Wait for Polling" "Disabled,Enabled" bitfld.long 0x00 8.--13. " POLINT ,Extended Display List Command Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 5. " DLPRI ,Display List Control 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPRI ,Display List Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " EXT ,Extended Display List" "Disabled,Enabled" line.long 0x04 "VI6_DL_BODY_SIZE0,Display List Body Size Register 0" bitfld.long 0x04 24. " UPD0 ,Update Flag" "Not downloaded,Downloaded" hexmask.long.tbyte 0x04 0.--16. 1. " BS0 ,Header-less Display List Body Size" tree.end width 23. tree "RPF Control Registers" group.long 0x300++0x4B "RPF 0" line.long 0x00 "VI6_RPF0_SRC_BSIZE,RPF0 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF0_SRC_ESIZE,RPF0 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF0_INFMT,RPF0 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbor,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" textline " " bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF0_DSWAP,RPF0 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF0_LOC,RPF0 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" textline " " line.long 0x14 "VI6_RPF0_ALPH_SEL,RPF0 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" textline " " line.long 0x18 "VI6_RPF0_VRTCOL_SET,RPF0 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF0_MSKCTRL,RPF0 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF0_MSKSET0,RPF0 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF0_MSKSET1,RPF0 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF0_CKEY_CTRL,RPF0 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF0_CKEY_SET0,RPF0 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF0_CKEY_SET1,RPF0 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" textline " " line.long 0x34 "VI6_RPF0_SRCM_PSTRIDE,RPF0 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF0_SRCM_ASTRIDE,RPF0 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" textline " " line.long 0x3C "VI6_RPF0_SRCM_ADDR_Y,RPF0 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF0_SRCM_ADDR_C0,RPF0 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF0_SRCM_ADDR_C1,RPF0 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF0_SRCM_ADDR_AI,RPF0 Source Alpha Address Register" group.long 0x400++0x4B "RPF 1" line.long 0x00 "VI6_RPF1_SRC_BSIZE,RPF1 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF1_SRC_ESIZE,RPF1 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF1_INFMT,RPF1 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbor,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" textline " " bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF1_DSWAP,RPF1 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF1_LOC,RPF1 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" textline " " line.long 0x14 "VI6_RPF1_ALPH_SEL,RPF1 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" textline " " line.long 0x18 "VI6_RPF1_VRTCOL_SET,RPF1 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF1_MSKCTRL,RPF1 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF1_MSKSET0,RPF1 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF1_MSKSET1,RPF1 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF1_CKEY_CTRL,RPF1 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF1_CKEY_SET0,RPF1 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF1_CKEY_SET1,RPF1 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" textline " " line.long 0x34 "VI6_RPF1_SRCM_PSTRIDE,RPF1 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF1_SRCM_ASTRIDE,RPF1 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" textline " " line.long 0x3C "VI6_RPF1_SRCM_ADDR_Y,RPF1 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF1_SRCM_ADDR_C0,RPF1 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF1_SRCM_ADDR_C1,RPF1 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF1_SRCM_ADDR_AI,RPF1 Source Alpha Address Register" group.long 0x500++0x4B "RPF 2" line.long 0x00 "VI6_RPF2_SRC_BSIZE,RPF2 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF2_SRC_ESIZE,RPF2 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF2_INFMT,RPF2 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbor,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" textline " " bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF2_DSWAP,RPF2 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF2_LOC,RPF2 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" textline " " line.long 0x14 "VI6_RPF2_ALPH_SEL,RPF2 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" textline " " line.long 0x18 "VI6_RPF2_VRTCOL_SET,RPF2 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF2_MSKCTRL,RPF2 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF2_MSKSET0,RPF2 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF2_MSKSET1,RPF2 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF2_CKEY_CTRL,RPF2 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF2_CKEY_SET0,RPF2 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF2_CKEY_SET1,RPF2 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" textline " " line.long 0x34 "VI6_RPF2_SRCM_PSTRIDE,RPF2 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF2_SRCM_ASTRIDE,RPF2 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" textline " " line.long 0x3C "VI6_RPF2_SRCM_ADDR_Y,RPF2 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF2_SRCM_ADDR_C0,RPF2 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF2_SRCM_ADDR_C1,RPF2 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF2_SRCM_ADDR_AI,RPF2 Source Alpha Address Register" group.long 0x600++0x4B "RPF 3" line.long 0x00 "VI6_RPF3_SRC_BSIZE,RPF3 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF3_SRC_ESIZE,RPF3 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF3_INFMT,RPF3 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbor,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" textline " " bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF3_DSWAP,RPF3 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF3_LOC,RPF3 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" textline " " line.long 0x14 "VI6_RPF3_ALPH_SEL,RPF3 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" textline " " line.long 0x18 "VI6_RPF3_VRTCOL_SET,RPF3 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF3_MSKCTRL,RPF3 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF3_MSKSET0,RPF3 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF3_MSKSET1,RPF3 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF3_CKEY_CTRL,RPF3 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF3_CKEY_SET0,RPF3 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF3_CKEY_SET1,RPF3 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" textline " " line.long 0x34 "VI6_RPF3_SRCM_PSTRIDE,RPF3 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF3_SRCM_ASTRIDE,RPF3 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" textline " " line.long 0x3C "VI6_RPF3_SRCM_ADDR_Y,RPF3 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF3_SRCM_ADDR_C0,RPF3 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF3_SRCM_ADDR_C1,RPF3 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF3_SRCM_ADDR_AI,RPF3 Source Alpha Address Register" group.long 0x700++0x4B "RPF 4" line.long 0x00 "VI6_RPF4_SRC_BSIZE,RPF4 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF4_SRC_ESIZE,RPF4 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF4_INFMT,RPF4 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbor,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" textline " " bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF4_DSWAP,RPF4 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF4_LOC,RPF4 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" textline " " line.long 0x14 "VI6_RPF4_ALPH_SEL,RPF4 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" textline " " line.long 0x18 "VI6_RPF4_VRTCOL_SET,RPF4 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF4_MSKCTRL,RPF4 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF4_MSKSET0,RPF4 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF4_MSKSET1,RPF4 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF4_CKEY_CTRL,RPF4 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF4_CKEY_SET0,RPF4 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF4_CKEY_SET1,RPF4 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" textline " " line.long 0x34 "VI6_RPF4_SRCM_PSTRIDE,RPF4 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF4_SRCM_ASTRIDE,RPF4 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" textline " " line.long 0x3C "VI6_RPF4_SRCM_ADDR_Y,RPF4 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF4_SRCM_ADDR_C0,RPF4 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF4_SRCM_ADDR_C1,RPF4 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF4_SRCM_ADDR_AI,RPF4 Source Alpha Address Register" tree.end width 24. tree "WPF Control Registers" group.long 0x1000++0xB line.long 0x00 "VI6_WPF0_SRCRPF,WPF0-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF0_HSZCLIP,WPF0 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF0_VSZCLIP,WPF0 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1000+0x0C)++0x3 line.long 0x00 "VI6_WPF0_OUTFMT,WPF0 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" bitfld.long 0x00 16. " FLP ,Vertical flipping Select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,Enabled,?..." bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1000+0x10)++0x7 line.long 0x00 "VI6_WPF0_DSWAP,WPF0 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_RNDCTRL,WPF0 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1000+0x1C)++0x13 line.long 0x00 "VI6_WPF0_DSTM_STRIDE_Y,WPF0 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF0_DSTM_STRIDE_C,WPF0 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF0_DSTM_ADDR_Y,WPF0 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF0_DSTM_ADDR_C0,WPF0 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF0_DSTM_ADDR_C1,WPF0 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" endif group.long 0x1100++0xB line.long 0x00 "VI6_WPF1_SRCRPF,WPF1-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF1_HSZCLIP,WPF1 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF1_VSZCLIP,WPF1 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1100+0x0C)++0x3 line.long 0x00 "VI6_WPF1_OUTFMT,WPF1 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,Enabled,?..." bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1100+0x10)++0x7 line.long 0x00 "VI6_WPF1_DSWAP,WPF1 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF1_RNDCTRL,WPF1 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1100+0x1C)++0x13 line.long 0x00 "VI6_WPF1_DSTM_STRIDE_Y,WPF1 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF1_DSTM_STRIDE_C,WPF1 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF1_DSTM_ADDR_Y,WPF1 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF1_DSTM_ADDR_C0,WPF1 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF1_DSTM_ADDR_C1,WPF1 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" endif group.long 0x1200++0xB line.long 0x00 "VI6_WPF2_SRCRPF,WPF2-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF2_HSZCLIP,WPF2 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF2_VSZCLIP,WPF2 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1200+0x0C)++0x3 line.long 0x00 "VI6_WPF2_OUTFMT,WPF2 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,Enabled,?..." bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1200+0x10)++0x7 line.long 0x00 "VI6_WPF2_DSWAP,WPF2 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF2_RNDCTRL,WPF2 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1200+0x1C)++0x13 line.long 0x00 "VI6_WPF2_DSTM_STRIDE_Y,WPF2 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF2_DSTM_STRIDE_C,WPF2 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF2_DSTM_ADDR_Y,WPF2 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF2_DSTM_ADDR_C0,WPF2 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF2_DSTM_ADDR_C1,WPF2 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" endif group.long 0x1300++0xB line.long 0x00 "VI6_WPF3_SRCRPF,WPF3-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF3_HSZCLIP,WPF3 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF3_VSZCLIP,WPF3 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1300+0x0C)++0x3 line.long 0x00 "VI6_WPF3_OUTFMT,WPF3 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,Enabled,?..." bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1300+0x10)++0x7 line.long 0x00 "VI6_WPF3_DSWAP,WPF3 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF3_RNDCTRL,WPF3 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1300+0x1C)++0x13 line.long 0x00 "VI6_WPF3_DSTM_STRIDE_Y,WPF3 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF3_DSTM_STRIDE_C,WPF3 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF3_DSTM_ADDR_Y,WPF3 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF3_DSTM_ADDR_C0,WPF3 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF3_DSTM_ADDR_C1,WPF3 Destination Chroma Address Register 1" if (((per.l(ad:0xFE928000+0x3B00))&0x1)==0x1) group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" endif tree.end width 21. tree "DPR Control Registers" group.long 0x2000++0x23 line.long 0x0 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x0 0.--5. " RT_RPF0 ,RPF0 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x4 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x4 0.--5. " RT_RPF1 ,RPF1 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x8 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x8 0.--5. " RT_RPF2 ,RPF2 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0xC "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0xC 0.--5. " RT_RPF3 ,RPF3 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x10 "VI6_DPR_RPF4_ROUTE,RPF4 Routing Register" bitfld.long 0x10 0.--5. " RT_RPF4 ,RPF4 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x14 8.--13. " FP_WPF0 ,WPF0 Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x18 "VI6_DPR_WPF1_FPORCH,WPF1 Timing Control Register" bitfld.long 0x18 8.--13. " FP_WPF1 ,WPF1 Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x1C "VI6_DPR_WPF2_FPORCH,WPF2 Timing Control Register" bitfld.long 0x1C 8.--13. " FP_WPF2 ,WPF2 Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x20 "VI6_DPR_WPF3_FPORCH,WPF3 Timing Control Register" bitfld.long 0x20 8.--13. " FP_WPF3 ,WPF3 Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " group.long 0x2024++0x3 line.long 0x00 "VI6_DPR_SRU_ROUTE,SRU Routing Register" bitfld.long 0x00 8.--13. " FP ,SRU Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,SRU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2028++0x3 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for UDS0" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2040++0x3 line.long 0x00 "VI6_DPR_CLU_ROUTE,CLU Routing Register" bitfld.long 0x00 8.--13. " FP ,CLU Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,CLU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x3 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" bitfld.long 0x00 8.--13. " FP ,HST Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x3 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" bitfld.long 0x00 8.--13. " FP ,HSI Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x3 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for BRU" textline " " bitfld.long 0x00 8.--13. " FP ,BRU Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2054++0x7 line.long 0x00 "VI6_DPR_HGO_SMPPT,HGO Sampling Point Register" bitfld.long 0x00 8.--10. " TGW ,Target WPF Index for HGO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. " PT ,Target Node Index for HGO Histogram Sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." line.long 0x04 "VI6_DPR_HGT_SMPPT,HGT Sampling Point Register" bitfld.long 0x04 8.--10. " TGW ,Target WPF Index for HGT" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--5. " PT ,Target Node Index for HGT Histogram Sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." tree.end width 15. tree "SRU Control Registers" group.long 0x2200++0xB line.long 0x00 "VI6_SRU_CTRL0,Super Resolution Mode Setting" hexmask.long.word 0x00 16.--24. 1. " SRU_PARAM0 ,Super Resolution Parameter 0" bitfld.long 0x00 8.--12. " SRU_PARAM1 ,Super Resolution Parameter 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.long 0x00 4.--6. " SRU_MODE ,SRU_MODE" "Without scaling,,,,Double scale-up,?..." textline " " bitfld.long 0x00 3. " SRU_PARAM2 ,Super Resolution Parameter 2" "0,1" bitfld.long 0x00 2. " SRU_PARAM3 ,Super Resolution Parameter 3" "0,1" bitfld.long 0x00 1. " SRU_PARAM4 ,Super Resolution Parameter 4" "0,1" textline " " bitfld.long 0x00 0. " SRU_EN ,Super Resolution Processing Enable/Disable" "Disabled,Enabled" line.long 0x04 "VI6_SRU_CTRL1,Super Resolution Control Register 1" hexmask.long.word 0x04 0.--10. 1. " SRU_PARAM5 ,Super Resolution Parameter 5" line.long 0x08 "VI6_SRU_CTRL2,Super Resolution Control Register 2" hexmask.long.byte 0x08 16.--23. 1. " SRU_PARAM6 ,Super Resolution Parameter 6" hexmask.long.byte 0x08 8.--15. 1. " SRU_PARAM7 ,Super Resolution Parameter 7" hexmask.long.byte 0x08 0.--7. 1. " SRU_PARAM8 ,Super Resolution Parameter 8" tree.end width 22. tree "UDS Control Registers" if (((per.l(ad:0xFE928000+0x2300))&0x100000)==0x000000) group.long 0x2300++0x3 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest Neighbor Interpolation Characteristic Control" "Disabled,Enabled" bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbor,Multi tap" bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr Interpolation Method When Bilinear/Nearest Neighbor Interpolation is Selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 17. " NE_GY ,G/Y Interpolation Method When Bilinear/Nearest Neighbor Interpolation is Selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 16. " NE_BCB ,B/Cb Interpolation Method When Bilinear/Nearest Neighbor Interpolation is Selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function Enable/Disable Select" "Disabled,Enabled" else group.long 0x2300++0x3 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest NeighborInterpolation Characteristic Control" "Not improved,Improved" bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Not performed,Performed" textline " " bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disabl" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbor,Multi tap" bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function Enable/Disable Select" "Disabled,Enabled" endif textline " " group.long (0x2300+0x04)++0xF line.long 0x00 "VI6_UDS0_SCALE,Scaling Factor Register 0" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (Integral Part) of Horizontal Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (Fractional Part) of Horizontal Scaling Factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (Integral Part) of Vertical Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (Fractional Part) of Vertical Scaling Factor" line.long 0x04 "VI6_UDS0_ALPTH,Alpha Data Threshold Setting Register 0" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha Data Threshold Setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha Data Threshold Setting 0" line.long 0x08 "VI6_UDS0_ALPVAL,Alpha Data Replacing Value Setting Register 0" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing Alpha Value Setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing Alpha Value Setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing Alpha Value Setting 0" line.long 0x0C "VI6_UDS0_PASS_BWIDTH,Passband Register 0" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal Signal Passband at Image Scale-Up/Down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical Signal Passband at Image Scale-Up/Down" group.long (0x2300+0x18)++0x3 line.long 0x00 "VI6_UDS0_IPC,2D IPC Setting Register 0" bitfld.long 0x00 27. " FIELD ,Top/Bottom Field Select" "Top,Bottom" hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" group.long (0x2300+0x24)++0x7 line.long 0x00 "VI6_UDS0_CLIP_SIZE,UDS Output Size Clipping Register 0" hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping Size of Horizontal Pixel Count after Scale-Up/-Down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping Size of Vertical Pixel Count after Scale-Up/-Down" line.long 0x04 "VI6_UDS0_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr Component of Fill Color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y Component of Fill Color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb Component of Fill Color" tree.end width 14. tree "LUT Control Register" group.long 0x2800++0x3 line.long 0x00 "VI6_LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT Enable/Disable" "Disabled,Enabled" tree.end width 14. tree "CLU Control Register" group.long 0x2900++0x3 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic Table Address Increment" "Disabled,Enabled" bitfld.long 0x00 14.--15. " AX1I ,Input Control 0 in 2D Mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input Control 1 in 2D Mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output Control 0 in 2D Mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output Control 1 in 2D Mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output Control 2 in 2D Mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT Dimension Number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU Processing Enable/Disable" "Disabled,Enabled" tree.end width 14. tree "HST Control Register" group.long 0x2A00++0x3 line.long 0x00 "VI6_HST_CTRL,HST Control Register" bitfld.long 0x00 0. " HST_EN ,HSV Conversion Enable/Disable" "Disabled,Enabled" tree.end width 14. tree "HSI Control Register" group.long 0x2B00++0x3 line.long 0x00 "VI6_HSI_CTRL,HSI Control Register" bitfld.long 0x00 0. " HSI_EN ,Reversed HSV Conversion Enable/Disable" "Disabled,Enabled" tree.end width 21. tree "BRU Control Registers" group.long 0x2C00++0x33 line.long 0x00 "VI6_BRU_INCTRL,BRU Input Control Register" bitfld.long 0x00 28. " NRM ,Color Data Normalization" "Not divided,Divided" bitfld.long 0x00 19. " D3ON ,Dithering Enable of BRU Input 3" "Disabled,Enabled" bitfld.long 0x00 18. " D2ON ,Dithering Enable of BRU Input 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " D1ON ,Dithering Enable of BRU Input 1" "Disabled,Enabled" bitfld.long 0x00 16. " D0ON ,Dithering Enable of BRU Input 0" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DITH3 ,Dithering of CH3 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." textline " " bitfld.long 0x00 8.--10. " DITH2 ,Dithering of CH2 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 4.--6. " DITH1 ,Dithering of CH1 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 0.--2. " DITH0 ,Dithering of CH0 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." line.long 0x04 "VI6_BRU_VIRRPF_SIZE,Size Register of BRU Input Virtual RPF" hexmask.long.word 0x04 16.--28. 1. " VIR_HSIZE ,Virtual RPF Horizontal Size" hexmask.long.word 0x04 0.--12. 1. " VIR_VSIZE ,Virtual RPF Vertical Size" line.long 0x08 "VI6_BRU_VIRRPF_LOC,Display Location Register of BRU Input Virtual RPF" hexmask.long.word 0x08 16.--28. 1. " HCOORD ,Horizontal Coordinate of Virtual RPF Location on Master Layer" hexmask.long.word 0x08 0.--12. 1. " VCOORD ,Vertical Coordinate of Virtual RPF Location on Master Layer" line.long 0x0C "VI6_BRU_VIRRPF_COL,Color Information Register of BRU Input Virtual RPF" hexmask.long.byte 0x0C 24.--31. 1. " COL_A ,Fixed Alpha of Virtual RPF" hexmask.long.byte 0x0C 16.--23. 1. " COL_RCR ,Fixed R/Cr of Virtual RPF" hexmask.long.byte 0x0C 8.--15. 1. " COL_GY ,Fixed G/Y of Virtual RPF" textline " " hexmask.long.byte 0x0C 0.--7. 1. " COL_BCB ,Fixed B/Cb of Virtual RPF" line.long 0x10 "VI6_BRUA_CTRL,BRU Control Register A" bitfld.long 0x10 31. " RBC ,Operation Type of Blending/ROP Unit A" "ROP,Blending" bitfld.long 0x10 20.--22. " DSTSEL ,Input Selection for DST Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x10 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." textline " " bitfld.long 0x10 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "VI6_BRUA_BLD,BRU Blend Control Register A" bitfld.long 0x14 31. " CBES ,Blending Expression Selection" "0,1" bitfld.long 0x14 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x14 23. " ABES ,Blending Alpha Creation Expression" "0,1" bitfld.long 0x14 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x14 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x18 "VI6_BRUB_CTRL,BRU Control Register B" bitfld.long 0x18 31. " RBC ,Operation Type of Blending/ROP Unit B" "ROP,Blending" bitfld.long 0x18 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "VI6_BRUB_BLD,BRU Blend Control Register B" bitfld.long 0x1C 31. " CBES ,Blending Expression Selection" "0,1" bitfld.long 0x1C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x1C 23. " ABES ,Blending Alpha Creation Expression" "0,1" bitfld.long 0x1C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x1C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x1C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x20 "VI6_BRUC_CTRL,BRU Control Register C" bitfld.long 0x20 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x20 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x20 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "VI6_BRUC_BLD,BRU Blend Control Register C" bitfld.long 0x24 31. " CBES ,Blending Expression Selection" "0,1" bitfld.long 0x24 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x24 23. " ABES ,Blending Alpha Creation Expression" "0,1" bitfld.long 0x24 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x24 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x24 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x28 "VI6_BRUD_CTRL,BRU Control Register D" bitfld.long 0x28 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x28 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x28 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x28 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "VI6_BRUD_BLD,BRU Blend Control Register D" bitfld.long 0x2C 31. " CBES ,Blending Expression Selection" "0,1" bitfld.long 0x2C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x2C 23. " ABES ,Blending Alpha Creation Expression" "0,1" bitfld.long 0x2C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x2C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x2C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x30 "VI6_BRU_ROP,BRU Raster Operation Control Register" bitfld.long 0x30 20.--22. " DSTSEL ,Input Selection for DST Side of ROP Unit" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x30 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end width 20. tree "HGO Control Registers" group.long 0x3000++0x2F line.long 0x00 "VI6_HGO_OFFSET,HGO Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal Offset of Histogram Detection Window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Horizontal Offset of Histogram Detection Window" line.long 0x04 "VI6_HGO_SIZE,HGO Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal Size of Histogram Detection Window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical Size of Histogram Detection Window" line.long 0x08 "VI6_HGO_MODE,HGO Mode Register" bitfld.long 0x08 7. " MAXRGB ,Histogram Source Component Setting" "Disabled,Enabled" bitfld.long 0x08 6. " OFSB_R ,Offset Binary Mode for R/Cr/H Component" "Straight,Offset" bitfld.long 0x08 5. " OFSB_G ,Offset Binary Mode for G/Y/S/max(RGB) Component" "Straight,Offset" textline " " bitfld.long 0x08 4. " OFSB_B ,Offset Binary Mode for B/Cb/V Component" "Straight,Offset" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal Pixel Skipping Mode for Histogram Detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical Pixel Skipping Mode for Histogram Detection" "Disabled,1/2,1/4,?..." line.long 0x0C "VI6_HGO_LB_TH,HGO LB Detection Threshold Register" hexmask.long.byte 0x0C 0.--7. 1. " BLACK_TH ,Threshold for Black Level Determination in Letter Box Detection" line.long 0x10 "VI6_HGO_LB0_H,HGO Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x10 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-0" hexmask.long.word 0x10 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-0" line.long 0x14 "VI6_HGO_LB0_V,HGO Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x14 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-0" hexmask.long.word 0x14 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-0" line.long 0x18 "VI6_HGO_LB1_H,HGO Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x18 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-1" hexmask.long.word 0x18 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-1" line.long 0x1C "VI6_HGO_LB1_V,HGO Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x1C 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-1" hexmask.long.word 0x1C 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-1" line.long 0x20 "VI6_HGO_LB2_H,HGO Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x20 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-2" hexmask.long.word 0x20 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-2" line.long 0x24 "VI6_HGO_LB2_V,HGO Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x24 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-2" hexmask.long.word 0x24 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-2" line.long 0x28 "VI6_HGO_LB3_H,HGO Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x28 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-3" hexmask.long.word 0x28 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-3" line.long 0x2C "VI6_HGO_LB3_V,HGO Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x2C 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-3" hexmask.long.word 0x2C 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-3" rgroup.long 0x3030++0x32B line.long 0x0 "VI6_HGO_R_HISTO_0 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x0 0.--21. 1. " HISTOGRAM_0 ,Frequency of Component-R in the value range-0 " line.long 0x4 "VI6_HGO_R_HISTO_1 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x4 0.--21. 1. " HISTOGRAM_1 ,Frequency of Component-R in the value range-1 " line.long 0x8 "VI6_HGO_R_HISTO_2 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x8 0.--21. 1. " HISTOGRAM_2 ,Frequency of Component-R in the value range-2 " line.long 0xC "VI6_HGO_R_HISTO_3 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0xC 0.--21. 1. " HISTOGRAM_3 ,Frequency of Component-R in the value range-3 " line.long 0x10 "VI6_HGO_R_HISTO_4 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x10 0.--21. 1. " HISTOGRAM_4 ,Frequency of Component-R in the value range-4 " line.long 0x14 "VI6_HGO_R_HISTO_5 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x14 0.--21. 1. " HISTOGRAM_5 ,Frequency of Component-R in the value range-5 " line.long 0x18 "VI6_HGO_R_HISTO_6 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x18 0.--21. 1. " HISTOGRAM_6 ,Frequency of Component-R in the value range-6 " line.long 0x1C "VI6_HGO_R_HISTO_7 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x1C 0.--21. 1. " HISTOGRAM_7 ,Frequency of Component-R in the value range-7 " line.long 0x20 "VI6_HGO_R_HISTO_8 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x20 0.--21. 1. " HISTOGRAM_8 ,Frequency of Component-R in the value range-8 " line.long 0x24 "VI6_HGO_R_HISTO_9 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x24 0.--21. 1. " HISTOGRAM_9 ,Frequency of Component-R in the value range-9 " line.long 0x28 "VI6_HGO_R_HISTO_10,HGO Component-R Histogram Register" hexmask.long.tbyte 0x28 0.--21. 1. " HISTOGRAM_10 ,Frequency of Component-R in the value range-10" line.long 0x2C "VI6_HGO_R_HISTO_11,HGO Component-R Histogram Register" hexmask.long.tbyte 0x2C 0.--21. 1. " HISTOGRAM_11 ,Frequency of Component-R in the value range-11" line.long 0x30 "VI6_HGO_R_HISTO_12,HGO Component-R Histogram Register" hexmask.long.tbyte 0x30 0.--21. 1. " HISTOGRAM_12 ,Frequency of Component-R in the value range-12" line.long 0x34 "VI6_HGO_R_HISTO_13,HGO Component-R Histogram Register" hexmask.long.tbyte 0x34 0.--21. 1. " HISTOGRAM_13 ,Frequency of Component-R in the value range-13" line.long 0x38 "VI6_HGO_R_HISTO_14,HGO Component-R Histogram Register" hexmask.long.tbyte 0x38 0.--21. 1. " HISTOGRAM_14 ,Frequency of Component-R in the value range-14" line.long 0x3C "VI6_HGO_R_HISTO_15,HGO Component-R Histogram Register" hexmask.long.tbyte 0x3C 0.--21. 1. " HISTOGRAM_15 ,Frequency of Component-R in the value range-15" line.long 0x40 "VI6_HGO_R_HISTO_16,HGO Component-R Histogram Register" hexmask.long.tbyte 0x40 0.--21. 1. " HISTOGRAM_16 ,Frequency of Component-R in the value range-16" line.long 0x44 "VI6_HGO_R_HISTO_17,HGO Component-R Histogram Register" hexmask.long.tbyte 0x44 0.--21. 1. " HISTOGRAM_17 ,Frequency of Component-R in the value range-17" line.long 0x48 "VI6_HGO_R_HISTO_18,HGO Component-R Histogram Register" hexmask.long.tbyte 0x48 0.--21. 1. " HISTOGRAM_18 ,Frequency of Component-R in the value range-18" line.long 0x4C "VI6_HGO_R_HISTO_19,HGO Component-R Histogram Register" hexmask.long.tbyte 0x4C 0.--21. 1. " HISTOGRAM_19 ,Frequency of Component-R in the value range-19" line.long 0x50 "VI6_HGO_R_HISTO_20,HGO Component-R Histogram Register" hexmask.long.tbyte 0x50 0.--21. 1. " HISTOGRAM_20 ,Frequency of Component-R in the value range-20" line.long 0x54 "VI6_HGO_R_HISTO_21,HGO Component-R Histogram Register" hexmask.long.tbyte 0x54 0.--21. 1. " HISTOGRAM_21 ,Frequency of Component-R in the value range-21" line.long 0x58 "VI6_HGO_R_HISTO_22,HGO Component-R Histogram Register" hexmask.long.tbyte 0x58 0.--21. 1. " HISTOGRAM_22 ,Frequency of Component-R in the value range-22" line.long 0x5C "VI6_HGO_R_HISTO_23,HGO Component-R Histogram Register" hexmask.long.tbyte 0x5C 0.--21. 1. " HISTOGRAM_23 ,Frequency of Component-R in the value range-23" line.long 0x60 "VI6_HGO_R_HISTO_24,HGO Component-R Histogram Register" hexmask.long.tbyte 0x60 0.--21. 1. " HISTOGRAM_24 ,Frequency of Component-R in the value range-24" line.long 0x64 "VI6_HGO_R_HISTO_25,HGO Component-R Histogram Register" hexmask.long.tbyte 0x64 0.--21. 1. " HISTOGRAM_25 ,Frequency of Component-R in the value range-25" line.long 0x68 "VI6_HGO_R_HISTO_26,HGO Component-R Histogram Register" hexmask.long.tbyte 0x68 0.--21. 1. " HISTOGRAM_26 ,Frequency of Component-R in the value range-26" line.long 0x6C "VI6_HGO_R_HISTO_27,HGO Component-R Histogram Register" hexmask.long.tbyte 0x6C 0.--21. 1. " HISTOGRAM_27 ,Frequency of Component-R in the value range-27" line.long 0x70 "VI6_HGO_R_HISTO_28,HGO Component-R Histogram Register" hexmask.long.tbyte 0x70 0.--21. 1. " HISTOGRAM_28 ,Frequency of Component-R in the value range-28" line.long 0x74 "VI6_HGO_R_HISTO_29,HGO Component-R Histogram Register" hexmask.long.tbyte 0x74 0.--21. 1. " HISTOGRAM_29 ,Frequency of Component-R in the value range-29" line.long 0x78 "VI6_HGO_R_HISTO_30,HGO Component-R Histogram Register" hexmask.long.tbyte 0x78 0.--21. 1. " HISTOGRAM_30 ,Frequency of Component-R in the value range-30" line.long 0x7C "VI6_HGO_R_HISTO_31,HGO Component-R Histogram Register" hexmask.long.tbyte 0x7C 0.--21. 1. " HISTOGRAM_31 ,Frequency of Component-R in the value range-31" line.long 0x80 "VI6_HGO_R_HISTO_32,HGO Component-R Histogram Register" hexmask.long.tbyte 0x80 0.--21. 1. " HISTOGRAM_32 ,Frequency of Component-R in the value range-32" line.long 0x84 "VI6_HGO_R_HISTO_33,HGO Component-R Histogram Register" hexmask.long.tbyte 0x84 0.--21. 1. " HISTOGRAM_33 ,Frequency of Component-R in the value range-33" line.long 0x88 "VI6_HGO_R_HISTO_34,HGO Component-R Histogram Register" hexmask.long.tbyte 0x88 0.--21. 1. " HISTOGRAM_34 ,Frequency of Component-R in the value range-34" line.long 0x8C "VI6_HGO_R_HISTO_35,HGO Component-R Histogram Register" hexmask.long.tbyte 0x8C 0.--21. 1. " HISTOGRAM_35 ,Frequency of Component-R in the value range-35" line.long 0x90 "VI6_HGO_R_HISTO_36,HGO Component-R Histogram Register" hexmask.long.tbyte 0x90 0.--21. 1. " HISTOGRAM_36 ,Frequency of Component-R in the value range-36" line.long 0x94 "VI6_HGO_R_HISTO_37,HGO Component-R Histogram Register" hexmask.long.tbyte 0x94 0.--21. 1. " HISTOGRAM_37 ,Frequency of Component-R in the value range-37" line.long 0x98 "VI6_HGO_R_HISTO_38,HGO Component-R Histogram Register" hexmask.long.tbyte 0x98 0.--21. 1. " HISTOGRAM_38 ,Frequency of Component-R in the value range-38" line.long 0x9C "VI6_HGO_R_HISTO_39,HGO Component-R Histogram Register" hexmask.long.tbyte 0x9C 0.--21. 1. " HISTOGRAM_39 ,Frequency of Component-R in the value range-39" line.long 0xA0 "VI6_HGO_R_HISTO_40,HGO Component-R Histogram Register" hexmask.long.tbyte 0xA0 0.--21. 1. " HISTOGRAM_40 ,Frequency of Component-R in the value range-40" line.long 0xA4 "VI6_HGO_R_HISTO_41,HGO Component-R Histogram Register" hexmask.long.tbyte 0xA4 0.--21. 1. " HISTOGRAM_41 ,Frequency of Component-R in the value range-41" line.long 0xA8 "VI6_HGO_R_HISTO_42,HGO Component-R Histogram Register" hexmask.long.tbyte 0xA8 0.--21. 1. " HISTOGRAM_42 ,Frequency of Component-R in the value range-42" line.long 0xAC "VI6_HGO_R_HISTO_43,HGO Component-R Histogram Register" hexmask.long.tbyte 0xAC 0.--21. 1. " HISTOGRAM_43 ,Frequency of Component-R in the value range-43" line.long 0xB0 "VI6_HGO_R_HISTO_44,HGO Component-R Histogram Register" hexmask.long.tbyte 0xB0 0.--21. 1. " HISTOGRAM_44 ,Frequency of Component-R in the value range-44" line.long 0xB4 "VI6_HGO_R_HISTO_45,HGO Component-R Histogram Register" hexmask.long.tbyte 0xB4 0.--21. 1. " HISTOGRAM_45 ,Frequency of Component-R in the value range-45" line.long 0xB8 "VI6_HGO_R_HISTO_46,HGO Component-R Histogram Register" hexmask.long.tbyte 0xB8 0.--21. 1. " HISTOGRAM_46 ,Frequency of Component-R in the value range-46" line.long 0xBC "VI6_HGO_R_HISTO_47,HGO Component-R Histogram Register" hexmask.long.tbyte 0xBC 0.--21. 1. " HISTOGRAM_47 ,Frequency of Component-R in the value range-47" line.long 0xC0 "VI6_HGO_R_HISTO_48,HGO Component-R Histogram Register" hexmask.long.tbyte 0xC0 0.--21. 1. " HISTOGRAM_48 ,Frequency of Component-R in the value range-48" line.long 0xC4 "VI6_HGO_R_HISTO_49,HGO Component-R Histogram Register" hexmask.long.tbyte 0xC4 0.--21. 1. " HISTOGRAM_49 ,Frequency of Component-R in the value range-49" line.long 0xC8 "VI6_HGO_R_HISTO_50,HGO Component-R Histogram Register" hexmask.long.tbyte 0xC8 0.--21. 1. " HISTOGRAM_50 ,Frequency of Component-R in the value range-50" line.long 0xCC "VI6_HGO_R_HISTO_51,HGO Component-R Histogram Register" hexmask.long.tbyte 0xCC 0.--21. 1. " HISTOGRAM_51 ,Frequency of Component-R in the value range-51" line.long 0xD0 "VI6_HGO_R_HISTO_52,HGO Component-R Histogram Register" hexmask.long.tbyte 0xD0 0.--21. 1. " HISTOGRAM_52 ,Frequency of Component-R in the value range-52" line.long 0xD4 "VI6_HGO_R_HISTO_53,HGO Component-R Histogram Register" hexmask.long.tbyte 0xD4 0.--21. 1. " HISTOGRAM_53 ,Frequency of Component-R in the value range-53" line.long 0xD8 "VI6_HGO_R_HISTO_54,HGO Component-R Histogram Register" hexmask.long.tbyte 0xD8 0.--21. 1. " HISTOGRAM_54 ,Frequency of Component-R in the value range-54" line.long 0xDC "VI6_HGO_R_HISTO_55,HGO Component-R Histogram Register" hexmask.long.tbyte 0xDC 0.--21. 1. " HISTOGRAM_55 ,Frequency of Component-R in the value range-55" line.long 0xE0 "VI6_HGO_R_HISTO_56,HGO Component-R Histogram Register" hexmask.long.tbyte 0xE0 0.--21. 1. " HISTOGRAM_56 ,Frequency of Component-R in the value range-56" line.long 0xE4 "VI6_HGO_R_HISTO_57,HGO Component-R Histogram Register" hexmask.long.tbyte 0xE4 0.--21. 1. " HISTOGRAM_57 ,Frequency of Component-R in the value range-57" line.long 0xE8 "VI6_HGO_R_HISTO_58,HGO Component-R Histogram Register" hexmask.long.tbyte 0xE8 0.--21. 1. " HISTOGRAM_58 ,Frequency of Component-R in the value range-58" line.long 0xEC "VI6_HGO_R_HISTO_59,HGO Component-R Histogram Register" hexmask.long.tbyte 0xEC 0.--21. 1. " HISTOGRAM_59 ,Frequency of Component-R in the value range-59" line.long 0xF0 "VI6_HGO_R_HISTO_60,HGO Component-R Histogram Register" hexmask.long.tbyte 0xF0 0.--21. 1. " HISTOGRAM_60 ,Frequency of Component-R in the value range-60" line.long 0xF4 "VI6_HGO_R_HISTO_61,HGO Component-R Histogram Register" hexmask.long.tbyte 0xF4 0.--21. 1. " HISTOGRAM_61 ,Frequency of Component-R in the value range-61" line.long 0xF8 "VI6_HGO_R_HISTO_62,HGO Component-R Histogram Register" hexmask.long.tbyte 0xF8 0.--21. 1. " HISTOGRAM_62 ,Frequency of Component-R in the value range-62" line.long 0xFC "VI6_HGO_R_HISTO_63,HGO Component-R Histogram Register" hexmask.long.tbyte 0xFC 0.--21. 1. " HISTOGRAM_63 ,Frequency of Component-R in the value range-63" line.long 0x100 "VI6_HGO_R_MAXMIN,HGO Component-R Min/Max Value Register" hexmask.long.byte 0x100 16.--23. 1. " MAXVAL ,Maximum Value of Component-R" hexmask.long.byte 0x100 0.--7. 1. " MINVAL ,Minimum Value of Component-R" line.long 0x104 "VI6_HGO_R_SUM,HGO Component-R Sum Register" hexmask.long 0x104 0.--29. 1. " SUMVAL ,Sum of Component-R" line.long 0x108 "VI6_HGO_R_LB_DET,HGO Component-R LB Detection Result Register" bitfld.long 0x108 2. " LTRBOX1 ,Letter Box Detection Result 1 of Zone-0/1 for Component-R" "0,1" bitfld.long 0x108 1. " LTRBOX2 ,Letter Box Detection Result 2 of Zone-0/1 for Component-R" "0,1" bitfld.long 0x108 0. " SIDE ,Letter Box Detection Result of Zone-2/3 for Component-R" "0,1" line.long 0x110 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x110 0.--21. 1. " HISTOGRAM_0 ,Frequency of Component-G in the value range-0 " line.long 0x114 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x114 0.--21. 1. " HISTOGRAM_1 ,Frequency of Component-G in the value range-1 " line.long 0x118 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x118 0.--21. 1. " HISTOGRAM_2 ,Frequency of Component-G in the value range-2 " line.long 0x11C "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x11C 0.--21. 1. " HISTOGRAM_3 ,Frequency of Component-G in the value range-3 " line.long 0x120 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x120 0.--21. 1. " HISTOGRAM_4 ,Frequency of Component-G in the value range-4 " line.long 0x124 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x124 0.--21. 1. " HISTOGRAM_5 ,Frequency of Component-G in the value range-5 " line.long 0x128 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x128 0.--21. 1. " HISTOGRAM_6 ,Frequency of Component-G in the value range-6 " line.long 0x12C "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x12C 0.--21. 1. " HISTOGRAM_7 ,Frequency of Component-G in the value range-7 " line.long 0x130 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x130 0.--21. 1. " HISTOGRAM_8 ,Frequency of Component-G in the value range-8 " line.long 0x134 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x134 0.--21. 1. " HISTOGRAM_9 ,Frequency of Component-G in the value range-9 " line.long 0x138 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x138 0.--21. 1. " HISTOGRAM_10 ,Frequency of Component-G in the value range-10" line.long 0x13C "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x13C 0.--21. 1. " HISTOGRAM_11 ,Frequency of Component-G in the value range-11" line.long 0x140 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x140 0.--21. 1. " HISTOGRAM_12 ,Frequency of Component-G in the value range-12" line.long 0x144 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x144 0.--21. 1. " HISTOGRAM_13 ,Frequency of Component-G in the value range-13" line.long 0x148 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x148 0.--21. 1. " HISTOGRAM_14 ,Frequency of Component-G in the value range-14" line.long 0x14C "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x14C 0.--21. 1. " HISTOGRAM_15 ,Frequency of Component-G in the value range-15" line.long 0x150 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x150 0.--21. 1. " HISTOGRAM_16 ,Frequency of Component-G in the value range-16" line.long 0x154 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x154 0.--21. 1. " HISTOGRAM_17 ,Frequency of Component-G in the value range-17" line.long 0x158 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x158 0.--21. 1. " HISTOGRAM_18 ,Frequency of Component-G in the value range-18" line.long 0x15C "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x15C 0.--21. 1. " HISTOGRAM_19 ,Frequency of Component-G in the value range-19" line.long 0x160 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x160 0.--21. 1. " HISTOGRAM_20 ,Frequency of Component-G in the value range-20" line.long 0x164 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x164 0.--21. 1. " HISTOGRAM_21 ,Frequency of Component-G in the value range-21" line.long 0x168 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x168 0.--21. 1. " HISTOGRAM_22 ,Frequency of Component-G in the value range-22" line.long 0x16C "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x16C 0.--21. 1. " HISTOGRAM_23 ,Frequency of Component-G in the value range-23" line.long 0x170 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x170 0.--21. 1. " HISTOGRAM_24 ,Frequency of Component-G in the value range-24" line.long 0x174 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x174 0.--21. 1. " HISTOGRAM_25 ,Frequency of Component-G in the value range-25" line.long 0x178 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x178 0.--21. 1. " HISTOGRAM_26 ,Frequency of Component-G in the value range-26" line.long 0x17C "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x17C 0.--21. 1. " HISTOGRAM_27 ,Frequency of Component-G in the value range-27" line.long 0x180 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x180 0.--21. 1. " HISTOGRAM_28 ,Frequency of Component-G in the value range-28" line.long 0x184 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x184 0.--21. 1. " HISTOGRAM_29 ,Frequency of Component-G in the value range-29" line.long 0x188 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x188 0.--21. 1. " HISTOGRAM_30 ,Frequency of Component-G in the value range-30" line.long 0x18C "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x18C 0.--21. 1. " HISTOGRAM_31 ,Frequency of Component-G in the value range-31" line.long 0x190 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x190 0.--21. 1. " HISTOGRAM_32 ,Frequency of Component-G in the value range-32" line.long 0x194 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x194 0.--21. 1. " HISTOGRAM_33 ,Frequency of Component-G in the value range-33" line.long 0x198 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x198 0.--21. 1. " HISTOGRAM_34 ,Frequency of Component-G in the value range-34" line.long 0x19C "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x19C 0.--21. 1. " HISTOGRAM_35 ,Frequency of Component-G in the value range-35" line.long 0x1A0 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1A0 0.--21. 1. " HISTOGRAM_36 ,Frequency of Component-G in the value range-36" line.long 0x1A4 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1A4 0.--21. 1. " HISTOGRAM_37 ,Frequency of Component-G in the value range-37" line.long 0x1A8 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1A8 0.--21. 1. " HISTOGRAM_38 ,Frequency of Component-G in the value range-38" line.long 0x1AC "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1AC 0.--21. 1. " HISTOGRAM_39 ,Frequency of Component-G in the value range-39" line.long 0x1B0 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1B0 0.--21. 1. " HISTOGRAM_40 ,Frequency of Component-G in the value range-40" line.long 0x1B4 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1B4 0.--21. 1. " HISTOGRAM_41 ,Frequency of Component-G in the value range-41" line.long 0x1B8 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1B8 0.--21. 1. " HISTOGRAM_42 ,Frequency of Component-G in the value range-42" line.long 0x1BC "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1BC 0.--21. 1. " HISTOGRAM_43 ,Frequency of Component-G in the value range-43" line.long 0x1C0 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1C0 0.--21. 1. " HISTOGRAM_44 ,Frequency of Component-G in the value range-44" line.long 0x1C4 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1C4 0.--21. 1. " HISTOGRAM_45 ,Frequency of Component-G in the value range-45" line.long 0x1C8 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1C8 0.--21. 1. " HISTOGRAM_46 ,Frequency of Component-G in the value range-46" line.long 0x1CC "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1CC 0.--21. 1. " HISTOGRAM_47 ,Frequency of Component-G in the value range-47" line.long 0x1D0 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1D0 0.--21. 1. " HISTOGRAM_48 ,Frequency of Component-G in the value range-48" line.long 0x1D4 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1D4 0.--21. 1. " HISTOGRAM_49 ,Frequency of Component-G in the value range-49" line.long 0x1D8 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1D8 0.--21. 1. " HISTOGRAM_50 ,Frequency of Component-G in the value range-50" line.long 0x1DC "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1DC 0.--21. 1. " HISTOGRAM_51 ,Frequency of Component-G in the value range-51" line.long 0x1E0 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1E0 0.--21. 1. " HISTOGRAM_52 ,Frequency of Component-G in the value range-52" line.long 0x1E4 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1E4 0.--21. 1. " HISTOGRAM_53 ,Frequency of Component-G in the value range-53" line.long 0x1E8 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1E8 0.--21. 1. " HISTOGRAM_54 ,Frequency of Component-G in the value range-54" line.long 0x1EC "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1EC 0.--21. 1. " HISTOGRAM_55 ,Frequency of Component-G in the value range-55" line.long 0x1F0 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1F0 0.--21. 1. " HISTOGRAM_56 ,Frequency of Component-G in the value range-56" line.long 0x1F4 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1F4 0.--21. 1. " HISTOGRAM_57 ,Frequency of Component-G in the value range-57" line.long 0x1F8 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1F8 0.--21. 1. " HISTOGRAM_58 ,Frequency of Component-G in the value range-58" line.long 0x1FC "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1FC 0.--21. 1. " HISTOGRAM_59 ,Frequency of Component-G in the value range-59" line.long 0x200 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x200 0.--21. 1. " HISTOGRAM_60 ,Frequency of Component-G in the value range-60" line.long 0x204 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x204 0.--21. 1. " HISTOGRAM_61 ,Frequency of Component-G in the value range-61" line.long 0x208 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x208 0.--21. 1. " HISTOGRAM_62 ,Frequency of Component-G in the value range-62" line.long 0x20C "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x20C 0.--21. 1. " HISTOGRAM_63 ,Frequency of Component-G in the value range-63" line.long 0x210 "VI6_HGO_G_MAXMIN,HGO Component-G Min/Max Value Register" hexmask.long.byte 0x210 16.--23. 1. " MAXVAL ,Maximum Value of Component-G" hexmask.long.byte 0x210 0.--7. 1. " MINVAL ,Minimum Value of Component-G" line.long 0x214 "VI6_HGO_G_SUM,HGO Component-G Sum Register" hexmask.long 0x214 0.--29. 1. " SUMVAL ,Sum of Component-G" line.long 0x218 "VI6_HGO_G_LB_DET,HGO Component-G LB Detection Result Register" bitfld.long 0x218 2. " LTRBOX1 ,Letter Box Detection Result 1 of Zone-0/1 for Component-G" "0,1" bitfld.long 0x218 1. " LTRBOX2 ,Letter Box Detection Result 2 of Zone-0/1 for Component-G" "0,1" bitfld.long 0x218 0. " SIDE ,Letter Box Detection Result of Zone-2/3 for Component-G" "0,1" line.long 0x220 "VI6_HGO_B_HISTO_0 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x220 0.--21. 1. " HISTOGRAM_0 ,Frequency of Component-B in the value range-0 " line.long 0x224 "VI6_HGO_B_HISTO_1 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x224 0.--21. 1. " HISTOGRAM_1 ,Frequency of Component-B in the value range-1 " line.long 0x228 "VI6_HGO_B_HISTO_2 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x228 0.--21. 1. " HISTOGRAM_2 ,Frequency of Component-B in the value range-2 " line.long 0x22C "VI6_HGO_B_HISTO_3 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x22C 0.--21. 1. " HISTOGRAM_3 ,Frequency of Component-B in the value range-3 " line.long 0x230 "VI6_HGO_B_HISTO_4 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x230 0.--21. 1. " HISTOGRAM_4 ,Frequency of Component-B in the value range-4 " line.long 0x234 "VI6_HGO_B_HISTO_5 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x234 0.--21. 1. " HISTOGRAM_5 ,Frequency of Component-B in the value range-5 " line.long 0x238 "VI6_HGO_B_HISTO_6 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x238 0.--21. 1. " HISTOGRAM_6 ,Frequency of Component-B in the value range-6 " line.long 0x23C "VI6_HGO_B_HISTO_7 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x23C 0.--21. 1. " HISTOGRAM_7 ,Frequency of Component-B in the value range-7 " line.long 0x240 "VI6_HGO_B_HISTO_8 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x240 0.--21. 1. " HISTOGRAM_8 ,Frequency of Component-B in the value range-8 " line.long 0x244 "VI6_HGO_B_HISTO_9 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x244 0.--21. 1. " HISTOGRAM_9 ,Frequency of Component-B in the value range-9 " line.long 0x248 "VI6_HGO_B_HISTO_10,HGO Component-B Histogram Register" hexmask.long.tbyte 0x248 0.--21. 1. " HISTOGRAM_10 ,Frequency of Component-B in the value range-10" line.long 0x24C "VI6_HGO_B_HISTO_11,HGO Component-B Histogram Register" hexmask.long.tbyte 0x24C 0.--21. 1. " HISTOGRAM_11 ,Frequency of Component-B in the value range-11" line.long 0x250 "VI6_HGO_B_HISTO_12,HGO Component-B Histogram Register" hexmask.long.tbyte 0x250 0.--21. 1. " HISTOGRAM_12 ,Frequency of Component-B in the value range-12" line.long 0x254 "VI6_HGO_B_HISTO_13,HGO Component-B Histogram Register" hexmask.long.tbyte 0x254 0.--21. 1. " HISTOGRAM_13 ,Frequency of Component-B in the value range-13" line.long 0x258 "VI6_HGO_B_HISTO_14,HGO Component-B Histogram Register" hexmask.long.tbyte 0x258 0.--21. 1. " HISTOGRAM_14 ,Frequency of Component-B in the value range-14" line.long 0x25C "VI6_HGO_B_HISTO_15,HGO Component-B Histogram Register" hexmask.long.tbyte 0x25C 0.--21. 1. " HISTOGRAM_15 ,Frequency of Component-B in the value range-15" line.long 0x260 "VI6_HGO_B_HISTO_16,HGO Component-B Histogram Register" hexmask.long.tbyte 0x260 0.--21. 1. " HISTOGRAM_16 ,Frequency of Component-B in the value range-16" line.long 0x264 "VI6_HGO_B_HISTO_17,HGO Component-B Histogram Register" hexmask.long.tbyte 0x264 0.--21. 1. " HISTOGRAM_17 ,Frequency of Component-B in the value range-17" line.long 0x268 "VI6_HGO_B_HISTO_18,HGO Component-B Histogram Register" hexmask.long.tbyte 0x268 0.--21. 1. " HISTOGRAM_18 ,Frequency of Component-B in the value range-18" line.long 0x26C "VI6_HGO_B_HISTO_19,HGO Component-B Histogram Register" hexmask.long.tbyte 0x26C 0.--21. 1. " HISTOGRAM_19 ,Frequency of Component-B in the value range-19" line.long 0x270 "VI6_HGO_B_HISTO_20,HGO Component-B Histogram Register" hexmask.long.tbyte 0x270 0.--21. 1. " HISTOGRAM_20 ,Frequency of Component-B in the value range-20" line.long 0x274 "VI6_HGO_B_HISTO_21,HGO Component-B Histogram Register" hexmask.long.tbyte 0x274 0.--21. 1. " HISTOGRAM_21 ,Frequency of Component-B in the value range-21" line.long 0x278 "VI6_HGO_B_HISTO_22,HGO Component-B Histogram Register" hexmask.long.tbyte 0x278 0.--21. 1. " HISTOGRAM_22 ,Frequency of Component-B in the value range-22" line.long 0x27C "VI6_HGO_B_HISTO_23,HGO Component-B Histogram Register" hexmask.long.tbyte 0x27C 0.--21. 1. " HISTOGRAM_23 ,Frequency of Component-B in the value range-23" line.long 0x280 "VI6_HGO_B_HISTO_24,HGO Component-B Histogram Register" hexmask.long.tbyte 0x280 0.--21. 1. " HISTOGRAM_24 ,Frequency of Component-B in the value range-24" line.long 0x284 "VI6_HGO_B_HISTO_25,HGO Component-B Histogram Register" hexmask.long.tbyte 0x284 0.--21. 1. " HISTOGRAM_25 ,Frequency of Component-B in the value range-25" line.long 0x288 "VI6_HGO_B_HISTO_26,HGO Component-B Histogram Register" hexmask.long.tbyte 0x288 0.--21. 1. " HISTOGRAM_26 ,Frequency of Component-B in the value range-26" line.long 0x28C "VI6_HGO_B_HISTO_27,HGO Component-B Histogram Register" hexmask.long.tbyte 0x28C 0.--21. 1. " HISTOGRAM_27 ,Frequency of Component-B in the value range-27" line.long 0x290 "VI6_HGO_B_HISTO_28,HGO Component-B Histogram Register" hexmask.long.tbyte 0x290 0.--21. 1. " HISTOGRAM_28 ,Frequency of Component-B in the value range-28" line.long 0x294 "VI6_HGO_B_HISTO_29,HGO Component-B Histogram Register" hexmask.long.tbyte 0x294 0.--21. 1. " HISTOGRAM_29 ,Frequency of Component-B in the value range-29" line.long 0x298 "VI6_HGO_B_HISTO_30,HGO Component-B Histogram Register" hexmask.long.tbyte 0x298 0.--21. 1. " HISTOGRAM_30 ,Frequency of Component-B in the value range-30" line.long 0x29C "VI6_HGO_B_HISTO_31,HGO Component-B Histogram Register" hexmask.long.tbyte 0x29C 0.--21. 1. " HISTOGRAM_31 ,Frequency of Component-B in the value range-31" line.long 0x2A0 "VI6_HGO_B_HISTO_32,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2A0 0.--21. 1. " HISTOGRAM_32 ,Frequency of Component-B in the value range-32" line.long 0x2A4 "VI6_HGO_B_HISTO_33,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2A4 0.--21. 1. " HISTOGRAM_33 ,Frequency of Component-B in the value range-33" line.long 0x2A8 "VI6_HGO_B_HISTO_34,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2A8 0.--21. 1. " HISTOGRAM_34 ,Frequency of Component-B in the value range-34" line.long 0x2AC "VI6_HGO_B_HISTO_35,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2AC 0.--21. 1. " HISTOGRAM_35 ,Frequency of Component-B in the value range-35" line.long 0x2B0 "VI6_HGO_B_HISTO_36,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2B0 0.--21. 1. " HISTOGRAM_36 ,Frequency of Component-B in the value range-36" line.long 0x2B4 "VI6_HGO_B_HISTO_37,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2B4 0.--21. 1. " HISTOGRAM_37 ,Frequency of Component-B in the value range-37" line.long 0x2B8 "VI6_HGO_B_HISTO_38,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2B8 0.--21. 1. " HISTOGRAM_38 ,Frequency of Component-B in the value range-38" line.long 0x2BC "VI6_HGO_B_HISTO_39,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2BC 0.--21. 1. " HISTOGRAM_39 ,Frequency of Component-B in the value range-39" line.long 0x2C0 "VI6_HGO_B_HISTO_40,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2C0 0.--21. 1. " HISTOGRAM_40 ,Frequency of Component-B in the value range-40" line.long 0x2C4 "VI6_HGO_B_HISTO_41,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2C4 0.--21. 1. " HISTOGRAM_41 ,Frequency of Component-B in the value range-41" line.long 0x2C8 "VI6_HGO_B_HISTO_42,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2C8 0.--21. 1. " HISTOGRAM_42 ,Frequency of Component-B in the value range-42" line.long 0x2CC "VI6_HGO_B_HISTO_43,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2CC 0.--21. 1. " HISTOGRAM_43 ,Frequency of Component-B in the value range-43" line.long 0x2D0 "VI6_HGO_B_HISTO_44,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2D0 0.--21. 1. " HISTOGRAM_44 ,Frequency of Component-B in the value range-44" line.long 0x2D4 "VI6_HGO_B_HISTO_45,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2D4 0.--21. 1. " HISTOGRAM_45 ,Frequency of Component-B in the value range-45" line.long 0x2D8 "VI6_HGO_B_HISTO_46,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2D8 0.--21. 1. " HISTOGRAM_46 ,Frequency of Component-B in the value range-46" line.long 0x2DC "VI6_HGO_B_HISTO_47,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2DC 0.--21. 1. " HISTOGRAM_47 ,Frequency of Component-B in the value range-47" line.long 0x2E0 "VI6_HGO_B_HISTO_48,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2E0 0.--21. 1. " HISTOGRAM_48 ,Frequency of Component-B in the value range-48" line.long 0x2E4 "VI6_HGO_B_HISTO_49,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2E4 0.--21. 1. " HISTOGRAM_49 ,Frequency of Component-B in the value range-49" line.long 0x2E8 "VI6_HGO_B_HISTO_50,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2E8 0.--21. 1. " HISTOGRAM_50 ,Frequency of Component-B in the value range-50" line.long 0x2EC "VI6_HGO_B_HISTO_51,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2EC 0.--21. 1. " HISTOGRAM_51 ,Frequency of Component-B in the value range-51" line.long 0x2F0 "VI6_HGO_B_HISTO_52,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2F0 0.--21. 1. " HISTOGRAM_52 ,Frequency of Component-B in the value range-52" line.long 0x2F4 "VI6_HGO_B_HISTO_53,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2F4 0.--21. 1. " HISTOGRAM_53 ,Frequency of Component-B in the value range-53" line.long 0x2F8 "VI6_HGO_B_HISTO_54,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2F8 0.--21. 1. " HISTOGRAM_54 ,Frequency of Component-B in the value range-54" line.long 0x2FC "VI6_HGO_B_HISTO_55,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2FC 0.--21. 1. " HISTOGRAM_55 ,Frequency of Component-B in the value range-55" line.long 0x300 "VI6_HGO_B_HISTO_56,HGO Component-B Histogram Register" hexmask.long.tbyte 0x300 0.--21. 1. " HISTOGRAM_56 ,Frequency of Component-B in the value range-56" line.long 0x304 "VI6_HGO_B_HISTO_57,HGO Component-B Histogram Register" hexmask.long.tbyte 0x304 0.--21. 1. " HISTOGRAM_57 ,Frequency of Component-B in the value range-57" line.long 0x308 "VI6_HGO_B_HISTO_58,HGO Component-B Histogram Register" hexmask.long.tbyte 0x308 0.--21. 1. " HISTOGRAM_58 ,Frequency of Component-B in the value range-58" line.long 0x30C "VI6_HGO_B_HISTO_59,HGO Component-B Histogram Register" hexmask.long.tbyte 0x30C 0.--21. 1. " HISTOGRAM_59 ,Frequency of Component-B in the value range-59" line.long 0x310 "VI6_HGO_B_HISTO_60,HGO Component-B Histogram Register" hexmask.long.tbyte 0x310 0.--21. 1. " HISTOGRAM_60 ,Frequency of Component-B in the value range-60" line.long 0x314 "VI6_HGO_B_HISTO_61,HGO Component-B Histogram Register" hexmask.long.tbyte 0x314 0.--21. 1. " HISTOGRAM_61 ,Frequency of Component-B in the value range-61" line.long 0x318 "VI6_HGO_B_HISTO_62,HGO Component-B Histogram Register" hexmask.long.tbyte 0x318 0.--21. 1. " HISTOGRAM_62 ,Frequency of Component-B in the value range-62" line.long 0x31C "VI6_HGO_B_HISTO_63,HGO Component-B Histogram Register" hexmask.long.tbyte 0x31C 0.--21. 1. " HISTOGRAM_63 ,Frequency of Component-B in the value range-63" line.long 0x320 "VI6_HGO_B_MAXMIN,HGO Component-B Min/Max Value Register" hexmask.long.byte 0x320 16.--23. 1. " MAXVAL ,Maximum Value of Component-B" hexmask.long.byte 0x320 0.--7. 1. " MINVAL ,Minimum Value of Component-B" line.long 0x324 "VI6_HGO_B_SUM,HGO Component-B Sum Register" hexmask.long 0x324 0.--29. 1. " SUMVAL ,Sum of Component-B" line.long 0x328 "VI6_HGO_B_LB_DET,HGO Component-B LB Detection Result Register" bitfld.long 0x328 2. " LTRBOX1 ,Letter Box Detection Result 1 of Zone-0/1 for Component-B" "0,1" bitfld.long 0x328 1. " LTRBOX2 ,Letter Box Detection Result 2 of Zone-0/1 for Component-B" "0,1" bitfld.long 0x328 0. " SIDE ,Letter Box Detection Result of Zone-2/3 for Component-B" "0,1" wgroup.long 0x33FC++0x3 line.long 0x00 "VI6_HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register Reset" "No reset,Reset" tree.end width 20. tree "HGT Control Registers" group.long 0x3400++0x47 line.long 0x00 "VI6_HGT_OFFSET,HGT Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal Offset of Histogram Detection Window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Vertical Offset of Histogram Detection Window" line.long 0x04 "VI6_HGT_SIZE,HGT Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal Size of Histogram Detection Window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical Size of Histogram Detection Window" line.long 0x08 "VI6_HGT_MODE,HGT Mode Register" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal Pixel Skipping Mode for Histogram Detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical Pixel Skipping Mode for Histogram Detection" "Disabled,1/2,1/4,?..." line.long 0xC "VI6_HGT_HUE_AREA_0 ,HGT Hue Area Register 0 " hexmask.long.byte 0xC 16.--23. 1. " HUE_LOWER_0 ,Lower Boundary Value for Hue Area - 0 " hexmask.long.byte 0xC 0.--7. 1. " HUE_UPPER_0 ,Upper Boundary Value for Hue Area - 0 " line.long 0x10 "VI6_HGT_HUE_AREA_1 ,HGT Hue Area Register 1 " hexmask.long.byte 0x10 16.--23. 1. " HUE_LOWER_1 ,Lower Boundary Value for Hue Area - 1 " hexmask.long.byte 0x10 0.--7. 1. " HUE_UPPER_1 ,Upper Boundary Value for Hue Area - 1 " line.long 0x14 "VI6_HGT_HUE_AREA_2 ,HGT Hue Area Register 2 " hexmask.long.byte 0x14 16.--23. 1. " HUE_LOWER_2 ,Lower Boundary Value for Hue Area - 2 " hexmask.long.byte 0x14 0.--7. 1. " HUE_UPPER_2 ,Upper Boundary Value for Hue Area - 2 " line.long 0x18 "VI6_HGT_HUE_AREA_3 ,HGT Hue Area Register 3 " hexmask.long.byte 0x18 16.--23. 1. " HUE_LOWER_3 ,Lower Boundary Value for Hue Area - 3 " hexmask.long.byte 0x18 0.--7. 1. " HUE_UPPER_3 ,Upper Boundary Value for Hue Area - 3 " line.long 0x1C "VI6_HGT_HUE_AREA_4 ,HGT Hue Area Register 4 " hexmask.long.byte 0x1C 16.--23. 1. " HUE_LOWER_4 ,Lower Boundary Value for Hue Area - 4 " hexmask.long.byte 0x1C 0.--7. 1. " HUE_UPPER_4 ,Upper Boundary Value for Hue Area - 4 " line.long 0x20 "VI6_HGT_HUE_AREA_5 ,HGT Hue Area Register 5 " hexmask.long.byte 0x20 16.--23. 1. " HUE_LOWER_5 ,Lower Boundary Value for Hue Area - 5 " hexmask.long.byte 0x20 0.--7. 1. " HUE_UPPER_5 ,Upper Boundary Value for Hue Area - 5 " line.long 0x24 "VI6_HGT_LB_TH,HGT LB Detection Threshold Register" hexmask.long.byte 0x24 0.--7. 1. " BLACK_TH ,Threshold for Black Level Determination in Letter Box Detection" line.long 0x28 "VI6_HGT_LB0_H,HGT Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x28 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-0" hexmask.long.word 0x28 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-0" line.long 0x2C "VI6_HGT_LB0_V,HGT Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x2C 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-0" hexmask.long.word 0x2C 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-0" line.long 0x30 "VI6_HGT_LB1_H,HGT Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x30 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-1" hexmask.long.word 0x30 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-1" line.long 0x34 "VI6_HGT_LB1_V,HGT Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x34 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-1" hexmask.long.word 0x34 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-1" line.long 0x38 "VI6_HGT_LB2_H,HGT Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x38 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-2" hexmask.long.word 0x38 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-2" line.long 0x3C "VI6_HGT_LB2_V,HGT Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x3C 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-2" hexmask.long.word 0x3C 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-2" line.long 0x40 "VI6_HGT_LB3_H,HGT Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x40 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-3" hexmask.long.word 0x40 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-3" line.long 0x44 "VI6_HGT_LB3_V,HGT Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x44 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-3" hexmask.long.word 0x44 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-3" rgroup.long 0x3450++0x30B line.long 0x0 "VI6_HGT_HISTO_0_0 ,HGT Histogram Register 0-0 " hexmask.long 0x0 0.--25. 1. " HISTOGRAM_0_0 ,Weighted Frequency of Hue Area-0 and Saturation Area-0 " line.long 0x4 "VI6_HGT_HISTO_0_1 ,HGT Histogram Register 0-1 " hexmask.long 0x4 0.--25. 1. " HISTOGRAM_0_1 ,Weighted Frequency of Hue Area-0 and Saturation Area-1 " line.long 0x8 "VI6_HGT_HISTO_0_2 ,HGT Histogram Register 0-2 " hexmask.long 0x8 0.--25. 1. " HISTOGRAM_0_2 ,Weighted Frequency of Hue Area-0 and Saturation Area-2 " line.long 0xC "VI6_HGT_HISTO_0_3 ,HGT Histogram Register 0-3 " hexmask.long 0xC 0.--25. 1. " HISTOGRAM_0_3 ,Weighted Frequency of Hue Area-0 and Saturation Area-3 " line.long 0x10 "VI6_HGT_HISTO_0_4 ,HGT Histogram Register 0-4 " hexmask.long 0x10 0.--25. 1. " HISTOGRAM_0_4 ,Weighted Frequency of Hue Area-0 and Saturation Area-4 " line.long 0x14 "VI6_HGT_HISTO_0_5 ,HGT Histogram Register 0-5 " hexmask.long 0x14 0.--25. 1. " HISTOGRAM_0_5 ,Weighted Frequency of Hue Area-0 and Saturation Area-5 " line.long 0x18 "VI6_HGT_HISTO_0_6 ,HGT Histogram Register 0-6 " hexmask.long 0x18 0.--25. 1. " HISTOGRAM_0_6 ,Weighted Frequency of Hue Area-0 and Saturation Area-6 " line.long 0x1C "VI6_HGT_HISTO_0_7 ,HGT Histogram Register 0-7 " hexmask.long 0x1C 0.--25. 1. " HISTOGRAM_0_7 ,Weighted Frequency of Hue Area-0 and Saturation Area-7 " line.long 0x20 "VI6_HGT_HISTO_0_8 ,HGT Histogram Register 0-8 " hexmask.long 0x20 0.--25. 1. " HISTOGRAM_0_8 ,Weighted Frequency of Hue Area-0 and Saturation Area-8 " line.long 0x24 "VI6_HGT_HISTO_0_9 ,HGT Histogram Register 0-9 " hexmask.long 0x24 0.--25. 1. " HISTOGRAM_0_9 ,Weighted Frequency of Hue Area-0 and Saturation Area-9 " line.long 0x28 "VI6_HGT_HISTO_0_10,HGT Histogram Register 0-10" hexmask.long 0x28 0.--25. 1. " HISTOGRAM_0_10 ,Weighted Frequency of Hue Area-0 and Saturation Area-10" line.long 0x2C "VI6_HGT_HISTO_0_11,HGT Histogram Register 0-11" hexmask.long 0x2C 0.--25. 1. " HISTOGRAM_0_11 ,Weighted Frequency of Hue Area-0 and Saturation Area-11" line.long 0x30 "VI6_HGT_HISTO_0_12,HGT Histogram Register 0-12" hexmask.long 0x30 0.--25. 1. " HISTOGRAM_0_12 ,Weighted Frequency of Hue Area-0 and Saturation Area-12" line.long 0x34 "VI6_HGT_HISTO_0_13,HGT Histogram Register 0-13" hexmask.long 0x34 0.--25. 1. " HISTOGRAM_0_13 ,Weighted Frequency of Hue Area-0 and Saturation Area-13" line.long 0x38 "VI6_HGT_HISTO_0_14,HGT Histogram Register 0-14" hexmask.long 0x38 0.--25. 1. " HISTOGRAM_0_14 ,Weighted Frequency of Hue Area-0 and Saturation Area-14" line.long 0x3C "VI6_HGT_HISTO_0_15,HGT Histogram Register 0-15" hexmask.long 0x3C 0.--25. 1. " HISTOGRAM_0_15 ,Weighted Frequency of Hue Area-0 and Saturation Area-15" line.long 0x40 "VI6_HGT_HISTO_0_16,HGT Histogram Register 0-16" hexmask.long 0x40 0.--25. 1. " HISTOGRAM_0_16 ,Weighted Frequency of Hue Area-0 and Saturation Area-16" line.long 0x44 "VI6_HGT_HISTO_0_17,HGT Histogram Register 0-17" hexmask.long 0x44 0.--25. 1. " HISTOGRAM_0_17 ,Weighted Frequency of Hue Area-0 and Saturation Area-17" line.long 0x48 "VI6_HGT_HISTO_0_18,HGT Histogram Register 0-18" hexmask.long 0x48 0.--25. 1. " HISTOGRAM_0_18 ,Weighted Frequency of Hue Area-0 and Saturation Area-18" line.long 0x4C "VI6_HGT_HISTO_0_19,HGT Histogram Register 0-19" hexmask.long 0x4C 0.--25. 1. " HISTOGRAM_0_19 ,Weighted Frequency of Hue Area-0 and Saturation Area-19" line.long 0x50 "VI6_HGT_HISTO_0_20,HGT Histogram Register 0-20" hexmask.long 0x50 0.--25. 1. " HISTOGRAM_0_20 ,Weighted Frequency of Hue Area-0 and Saturation Area-20" line.long 0x54 "VI6_HGT_HISTO_0_21,HGT Histogram Register 0-21" hexmask.long 0x54 0.--25. 1. " HISTOGRAM_0_21 ,Weighted Frequency of Hue Area-0 and Saturation Area-21" line.long 0x58 "VI6_HGT_HISTO_0_22,HGT Histogram Register 0-22" hexmask.long 0x58 0.--25. 1. " HISTOGRAM_0_22 ,Weighted Frequency of Hue Area-0 and Saturation Area-22" line.long 0x5C "VI6_HGT_HISTO_0_23,HGT Histogram Register 0-23" hexmask.long 0x5C 0.--25. 1. " HISTOGRAM_0_23 ,Weighted Frequency of Hue Area-0 and Saturation Area-23" line.long 0x60 "VI6_HGT_HISTO_0_24,HGT Histogram Register 0-24" hexmask.long 0x60 0.--25. 1. " HISTOGRAM_0_24 ,Weighted Frequency of Hue Area-0 and Saturation Area-24" line.long 0x64 "VI6_HGT_HISTO_0_25,HGT Histogram Register 0-25" hexmask.long 0x64 0.--25. 1. " HISTOGRAM_0_25 ,Weighted Frequency of Hue Area-0 and Saturation Area-25" line.long 0x68 "VI6_HGT_HISTO_0_26,HGT Histogram Register 0-26" hexmask.long 0x68 0.--25. 1. " HISTOGRAM_0_26 ,Weighted Frequency of Hue Area-0 and Saturation Area-26" line.long 0x6C "VI6_HGT_HISTO_0_27,HGT Histogram Register 0-27" hexmask.long 0x6C 0.--25. 1. " HISTOGRAM_0_27 ,Weighted Frequency of Hue Area-0 and Saturation Area-27" line.long 0x70 "VI6_HGT_HISTO_0_28,HGT Histogram Register 0-28" hexmask.long 0x70 0.--25. 1. " HISTOGRAM_0_28 ,Weighted Frequency of Hue Area-0 and Saturation Area-28" line.long 0x74 "VI6_HGT_HISTO_0_29,HGT Histogram Register 0-29" hexmask.long 0x74 0.--25. 1. " HISTOGRAM_0_29 ,Weighted Frequency of Hue Area-0 and Saturation Area-29" line.long 0x78 "VI6_HGT_HISTO_0_30,HGT Histogram Register 0-30" hexmask.long 0x78 0.--25. 1. " HISTOGRAM_0_30 ,Weighted Frequency of Hue Area-0 and Saturation Area-30" line.long 0x7C "VI6_HGT_HISTO_0_31,HGT Histogram Register 0-31" hexmask.long 0x7C 0.--25. 1. " HISTOGRAM_0_31 ,Weighted Frequency of Hue Area-0 and Saturation Area-31" line.long 0x80 "VI6_HGT_HISTO_1_0 ,HGT Histogram Register 1-0 " hexmask.long 0x80 0.--25. 1. " HISTOGRAM_1_0 ,Weighted Frequency of Hue Area-1 and Saturation Area-0 " line.long 0x84 "VI6_HGT_HISTO_1_1 ,HGT Histogram Register 1-1 " hexmask.long 0x84 0.--25. 1. " HISTOGRAM_1_1 ,Weighted Frequency of Hue Area-1 and Saturation Area-1 " line.long 0x88 "VI6_HGT_HISTO_1_2 ,HGT Histogram Register 1-2 " hexmask.long 0x88 0.--25. 1. " HISTOGRAM_1_2 ,Weighted Frequency of Hue Area-1 and Saturation Area-2 " line.long 0x8C "VI6_HGT_HISTO_1_3 ,HGT Histogram Register 1-3 " hexmask.long 0x8C 0.--25. 1. " HISTOGRAM_1_3 ,Weighted Frequency of Hue Area-1 and Saturation Area-3 " line.long 0x90 "VI6_HGT_HISTO_1_4 ,HGT Histogram Register 1-4 " hexmask.long 0x90 0.--25. 1. " HISTOGRAM_1_4 ,Weighted Frequency of Hue Area-1 and Saturation Area-4 " line.long 0x94 "VI6_HGT_HISTO_1_5 ,HGT Histogram Register 1-5 " hexmask.long 0x94 0.--25. 1. " HISTOGRAM_1_5 ,Weighted Frequency of Hue Area-1 and Saturation Area-5 " line.long 0x98 "VI6_HGT_HISTO_1_6 ,HGT Histogram Register 1-6 " hexmask.long 0x98 0.--25. 1. " HISTOGRAM_1_6 ,Weighted Frequency of Hue Area-1 and Saturation Area-6 " line.long 0x9C "VI6_HGT_HISTO_1_7 ,HGT Histogram Register 1-7 " hexmask.long 0x9C 0.--25. 1. " HISTOGRAM_1_7 ,Weighted Frequency of Hue Area-1 and Saturation Area-7 " line.long 0xA0 "VI6_HGT_HISTO_1_8 ,HGT Histogram Register 1-8 " hexmask.long 0xA0 0.--25. 1. " HISTOGRAM_1_8 ,Weighted Frequency of Hue Area-1 and Saturation Area-8 " line.long 0xA4 "VI6_HGT_HISTO_1_9 ,HGT Histogram Register 1-9 " hexmask.long 0xA4 0.--25. 1. " HISTOGRAM_1_9 ,Weighted Frequency of Hue Area-1 and Saturation Area-9 " line.long 0xA8 "VI6_HGT_HISTO_1_10,HGT Histogram Register 1-10" hexmask.long 0xA8 0.--25. 1. " HISTOGRAM_1_10 ,Weighted Frequency of Hue Area-1 and Saturation Area-10" line.long 0xAC "VI6_HGT_HISTO_1_11,HGT Histogram Register 1-11" hexmask.long 0xAC 0.--25. 1. " HISTOGRAM_1_11 ,Weighted Frequency of Hue Area-1 and Saturation Area-11" line.long 0xB0 "VI6_HGT_HISTO_1_12,HGT Histogram Register 1-12" hexmask.long 0xB0 0.--25. 1. " HISTOGRAM_1_12 ,Weighted Frequency of Hue Area-1 and Saturation Area-12" line.long 0xB4 "VI6_HGT_HISTO_1_13,HGT Histogram Register 1-13" hexmask.long 0xB4 0.--25. 1. " HISTOGRAM_1_13 ,Weighted Frequency of Hue Area-1 and Saturation Area-13" line.long 0xB8 "VI6_HGT_HISTO_1_14,HGT Histogram Register 1-14" hexmask.long 0xB8 0.--25. 1. " HISTOGRAM_1_14 ,Weighted Frequency of Hue Area-1 and Saturation Area-14" line.long 0xBC "VI6_HGT_HISTO_1_15,HGT Histogram Register 1-15" hexmask.long 0xBC 0.--25. 1. " HISTOGRAM_1_15 ,Weighted Frequency of Hue Area-1 and Saturation Area-15" line.long 0xC0 "VI6_HGT_HISTO_1_16,HGT Histogram Register 1-16" hexmask.long 0xC0 0.--25. 1. " HISTOGRAM_1_16 ,Weighted Frequency of Hue Area-1 and Saturation Area-16" line.long 0xC4 "VI6_HGT_HISTO_1_17,HGT Histogram Register 1-17" hexmask.long 0xC4 0.--25. 1. " HISTOGRAM_1_17 ,Weighted Frequency of Hue Area-1 and Saturation Area-17" line.long 0xC8 "VI6_HGT_HISTO_1_18,HGT Histogram Register 1-18" hexmask.long 0xC8 0.--25. 1. " HISTOGRAM_1_18 ,Weighted Frequency of Hue Area-1 and Saturation Area-18" line.long 0xCC "VI6_HGT_HISTO_1_19,HGT Histogram Register 1-19" hexmask.long 0xCC 0.--25. 1. " HISTOGRAM_1_19 ,Weighted Frequency of Hue Area-1 and Saturation Area-19" line.long 0xD0 "VI6_HGT_HISTO_1_20,HGT Histogram Register 1-20" hexmask.long 0xD0 0.--25. 1. " HISTOGRAM_1_20 ,Weighted Frequency of Hue Area-1 and Saturation Area-20" line.long 0xD4 "VI6_HGT_HISTO_1_21,HGT Histogram Register 1-21" hexmask.long 0xD4 0.--25. 1. " HISTOGRAM_1_21 ,Weighted Frequency of Hue Area-1 and Saturation Area-21" line.long 0xD8 "VI6_HGT_HISTO_1_22,HGT Histogram Register 1-22" hexmask.long 0xD8 0.--25. 1. " HISTOGRAM_1_22 ,Weighted Frequency of Hue Area-1 and Saturation Area-22" line.long 0xDC "VI6_HGT_HISTO_1_23,HGT Histogram Register 1-23" hexmask.long 0xDC 0.--25. 1. " HISTOGRAM_1_23 ,Weighted Frequency of Hue Area-1 and Saturation Area-23" line.long 0xE0 "VI6_HGT_HISTO_1_24,HGT Histogram Register 1-24" hexmask.long 0xE0 0.--25. 1. " HISTOGRAM_1_24 ,Weighted Frequency of Hue Area-1 and Saturation Area-24" line.long 0xE4 "VI6_HGT_HISTO_1_25,HGT Histogram Register 1-25" hexmask.long 0xE4 0.--25. 1. " HISTOGRAM_1_25 ,Weighted Frequency of Hue Area-1 and Saturation Area-25" line.long 0xE8 "VI6_HGT_HISTO_1_26,HGT Histogram Register 1-26" hexmask.long 0xE8 0.--25. 1. " HISTOGRAM_1_26 ,Weighted Frequency of Hue Area-1 and Saturation Area-26" line.long 0xEC "VI6_HGT_HISTO_1_27,HGT Histogram Register 1-27" hexmask.long 0xEC 0.--25. 1. " HISTOGRAM_1_27 ,Weighted Frequency of Hue Area-1 and Saturation Area-27" line.long 0xF0 "VI6_HGT_HISTO_1_28,HGT Histogram Register 1-28" hexmask.long 0xF0 0.--25. 1. " HISTOGRAM_1_28 ,Weighted Frequency of Hue Area-1 and Saturation Area-28" line.long 0xF4 "VI6_HGT_HISTO_1_29,HGT Histogram Register 1-29" hexmask.long 0xF4 0.--25. 1. " HISTOGRAM_1_29 ,Weighted Frequency of Hue Area-1 and Saturation Area-29" line.long 0xF8 "VI6_HGT_HISTO_1_30,HGT Histogram Register 1-30" hexmask.long 0xF8 0.--25. 1. " HISTOGRAM_1_30 ,Weighted Frequency of Hue Area-1 and Saturation Area-30" line.long 0xFC "VI6_HGT_HISTO_1_31,HGT Histogram Register 1-31" hexmask.long 0xFC 0.--25. 1. " HISTOGRAM_1_31 ,Weighted Frequency of Hue Area-1 and Saturation Area-31" line.long 0x100 "VI6_HGT_HISTO_2_0 ,HGT Histogram Register 2-0 " hexmask.long 0x100 0.--25. 1. " HISTOGRAM_2_0 ,Weighted Frequency of Hue Area-2 and Saturation Area-0 " line.long 0x104 "VI6_HGT_HISTO_2_1 ,HGT Histogram Register 2-1 " hexmask.long 0x104 0.--25. 1. " HISTOGRAM_2_1 ,Weighted Frequency of Hue Area-2 and Saturation Area-1 " line.long 0x108 "VI6_HGT_HISTO_2_2 ,HGT Histogram Register 2-2 " hexmask.long 0x108 0.--25. 1. " HISTOGRAM_2_2 ,Weighted Frequency of Hue Area-2 and Saturation Area-2 " line.long 0x10C "VI6_HGT_HISTO_2_3 ,HGT Histogram Register 2-3 " hexmask.long 0x10C 0.--25. 1. " HISTOGRAM_2_3 ,Weighted Frequency of Hue Area-2 and Saturation Area-3 " line.long 0x110 "VI6_HGT_HISTO_2_4 ,HGT Histogram Register 2-4 " hexmask.long 0x110 0.--25. 1. " HISTOGRAM_2_4 ,Weighted Frequency of Hue Area-2 and Saturation Area-4 " line.long 0x114 "VI6_HGT_HISTO_2_5 ,HGT Histogram Register 2-5 " hexmask.long 0x114 0.--25. 1. " HISTOGRAM_2_5 ,Weighted Frequency of Hue Area-2 and Saturation Area-5 " line.long 0x118 "VI6_HGT_HISTO_2_6 ,HGT Histogram Register 2-6 " hexmask.long 0x118 0.--25. 1. " HISTOGRAM_2_6 ,Weighted Frequency of Hue Area-2 and Saturation Area-6 " line.long 0x11C "VI6_HGT_HISTO_2_7 ,HGT Histogram Register 2-7 " hexmask.long 0x11C 0.--25. 1. " HISTOGRAM_2_7 ,Weighted Frequency of Hue Area-2 and Saturation Area-7 " line.long 0x120 "VI6_HGT_HISTO_2_8 ,HGT Histogram Register 2-8 " hexmask.long 0x120 0.--25. 1. " HISTOGRAM_2_8 ,Weighted Frequency of Hue Area-2 and Saturation Area-8 " line.long 0x124 "VI6_HGT_HISTO_2_9 ,HGT Histogram Register 2-9 " hexmask.long 0x124 0.--25. 1. " HISTOGRAM_2_9 ,Weighted Frequency of Hue Area-2 and Saturation Area-9 " line.long 0x128 "VI6_HGT_HISTO_2_10,HGT Histogram Register 2-10" hexmask.long 0x128 0.--25. 1. " HISTOGRAM_2_10 ,Weighted Frequency of Hue Area-2 and Saturation Area-10" line.long 0x12C "VI6_HGT_HISTO_2_11,HGT Histogram Register 2-11" hexmask.long 0x12C 0.--25. 1. " HISTOGRAM_2_11 ,Weighted Frequency of Hue Area-2 and Saturation Area-11" line.long 0x130 "VI6_HGT_HISTO_2_12,HGT Histogram Register 2-12" hexmask.long 0x130 0.--25. 1. " HISTOGRAM_2_12 ,Weighted Frequency of Hue Area-2 and Saturation Area-12" line.long 0x134 "VI6_HGT_HISTO_2_13,HGT Histogram Register 2-13" hexmask.long 0x134 0.--25. 1. " HISTOGRAM_2_13 ,Weighted Frequency of Hue Area-2 and Saturation Area-13" line.long 0x138 "VI6_HGT_HISTO_2_14,HGT Histogram Register 2-14" hexmask.long 0x138 0.--25. 1. " HISTOGRAM_2_14 ,Weighted Frequency of Hue Area-2 and Saturation Area-14" line.long 0x13C "VI6_HGT_HISTO_2_15,HGT Histogram Register 2-15" hexmask.long 0x13C 0.--25. 1. " HISTOGRAM_2_15 ,Weighted Frequency of Hue Area-2 and Saturation Area-15" line.long 0x140 "VI6_HGT_HISTO_2_16,HGT Histogram Register 2-16" hexmask.long 0x140 0.--25. 1. " HISTOGRAM_2_16 ,Weighted Frequency of Hue Area-2 and Saturation Area-16" line.long 0x144 "VI6_HGT_HISTO_2_17,HGT Histogram Register 2-17" hexmask.long 0x144 0.--25. 1. " HISTOGRAM_2_17 ,Weighted Frequency of Hue Area-2 and Saturation Area-17" line.long 0x148 "VI6_HGT_HISTO_2_18,HGT Histogram Register 2-18" hexmask.long 0x148 0.--25. 1. " HISTOGRAM_2_18 ,Weighted Frequency of Hue Area-2 and Saturation Area-18" line.long 0x14C "VI6_HGT_HISTO_2_19,HGT Histogram Register 2-19" hexmask.long 0x14C 0.--25. 1. " HISTOGRAM_2_19 ,Weighted Frequency of Hue Area-2 and Saturation Area-19" line.long 0x150 "VI6_HGT_HISTO_2_20,HGT Histogram Register 2-20" hexmask.long 0x150 0.--25. 1. " HISTOGRAM_2_20 ,Weighted Frequency of Hue Area-2 and Saturation Area-20" line.long 0x154 "VI6_HGT_HISTO_2_21,HGT Histogram Register 2-21" hexmask.long 0x154 0.--25. 1. " HISTOGRAM_2_21 ,Weighted Frequency of Hue Area-2 and Saturation Area-21" line.long 0x158 "VI6_HGT_HISTO_2_22,HGT Histogram Register 2-22" hexmask.long 0x158 0.--25. 1. " HISTOGRAM_2_22 ,Weighted Frequency of Hue Area-2 and Saturation Area-22" line.long 0x15C "VI6_HGT_HISTO_2_23,HGT Histogram Register 2-23" hexmask.long 0x15C 0.--25. 1. " HISTOGRAM_2_23 ,Weighted Frequency of Hue Area-2 and Saturation Area-23" line.long 0x160 "VI6_HGT_HISTO_2_24,HGT Histogram Register 2-24" hexmask.long 0x160 0.--25. 1. " HISTOGRAM_2_24 ,Weighted Frequency of Hue Area-2 and Saturation Area-24" line.long 0x164 "VI6_HGT_HISTO_2_25,HGT Histogram Register 2-25" hexmask.long 0x164 0.--25. 1. " HISTOGRAM_2_25 ,Weighted Frequency of Hue Area-2 and Saturation Area-25" line.long 0x168 "VI6_HGT_HISTO_2_26,HGT Histogram Register 2-26" hexmask.long 0x168 0.--25. 1. " HISTOGRAM_2_26 ,Weighted Frequency of Hue Area-2 and Saturation Area-26" line.long 0x16C "VI6_HGT_HISTO_2_27,HGT Histogram Register 2-27" hexmask.long 0x16C 0.--25. 1. " HISTOGRAM_2_27 ,Weighted Frequency of Hue Area-2 and Saturation Area-27" line.long 0x170 "VI6_HGT_HISTO_2_28,HGT Histogram Register 2-28" hexmask.long 0x170 0.--25. 1. " HISTOGRAM_2_28 ,Weighted Frequency of Hue Area-2 and Saturation Area-28" line.long 0x174 "VI6_HGT_HISTO_2_29,HGT Histogram Register 2-29" hexmask.long 0x174 0.--25. 1. " HISTOGRAM_2_29 ,Weighted Frequency of Hue Area-2 and Saturation Area-29" line.long 0x178 "VI6_HGT_HISTO_2_30,HGT Histogram Register 2-30" hexmask.long 0x178 0.--25. 1. " HISTOGRAM_2_30 ,Weighted Frequency of Hue Area-2 and Saturation Area-30" line.long 0x17C "VI6_HGT_HISTO_2_31,HGT Histogram Register 2-31" hexmask.long 0x17C 0.--25. 1. " HISTOGRAM_2_31 ,Weighted Frequency of Hue Area-2 and Saturation Area-31" line.long 0x180 "VI6_HGT_HISTO_3_0 ,HGT Histogram Register 3-0 " hexmask.long 0x180 0.--25. 1. " HISTOGRAM_3_0 ,Weighted Frequency of Hue Area-3 and Saturation Area-0 " line.long 0x184 "VI6_HGT_HISTO_3_1 ,HGT Histogram Register 3-1 " hexmask.long 0x184 0.--25. 1. " HISTOGRAM_3_1 ,Weighted Frequency of Hue Area-3 and Saturation Area-1 " line.long 0x188 "VI6_HGT_HISTO_3_2 ,HGT Histogram Register 3-2 " hexmask.long 0x188 0.--25. 1. " HISTOGRAM_3_2 ,Weighted Frequency of Hue Area-3 and Saturation Area-2 " line.long 0x18C "VI6_HGT_HISTO_3_3 ,HGT Histogram Register 3-3 " hexmask.long 0x18C 0.--25. 1. " HISTOGRAM_3_3 ,Weighted Frequency of Hue Area-3 and Saturation Area-3 " line.long 0x190 "VI6_HGT_HISTO_3_4 ,HGT Histogram Register 3-4 " hexmask.long 0x190 0.--25. 1. " HISTOGRAM_3_4 ,Weighted Frequency of Hue Area-3 and Saturation Area-4 " line.long 0x194 "VI6_HGT_HISTO_3_5 ,HGT Histogram Register 3-5 " hexmask.long 0x194 0.--25. 1. " HISTOGRAM_3_5 ,Weighted Frequency of Hue Area-3 and Saturation Area-5 " line.long 0x198 "VI6_HGT_HISTO_3_6 ,HGT Histogram Register 3-6 " hexmask.long 0x198 0.--25. 1. " HISTOGRAM_3_6 ,Weighted Frequency of Hue Area-3 and Saturation Area-6 " line.long 0x19C "VI6_HGT_HISTO_3_7 ,HGT Histogram Register 3-7 " hexmask.long 0x19C 0.--25. 1. " HISTOGRAM_3_7 ,Weighted Frequency of Hue Area-3 and Saturation Area-7 " line.long 0x1A0 "VI6_HGT_HISTO_3_8 ,HGT Histogram Register 3-8 " hexmask.long 0x1A0 0.--25. 1. " HISTOGRAM_3_8 ,Weighted Frequency of Hue Area-3 and Saturation Area-8 " line.long 0x1A4 "VI6_HGT_HISTO_3_9 ,HGT Histogram Register 3-9 " hexmask.long 0x1A4 0.--25. 1. " HISTOGRAM_3_9 ,Weighted Frequency of Hue Area-3 and Saturation Area-9 " line.long 0x1A8 "VI6_HGT_HISTO_3_10,HGT Histogram Register 3-10" hexmask.long 0x1A8 0.--25. 1. " HISTOGRAM_3_10 ,Weighted Frequency of Hue Area-3 and Saturation Area-10" line.long 0x1AC "VI6_HGT_HISTO_3_11,HGT Histogram Register 3-11" hexmask.long 0x1AC 0.--25. 1. " HISTOGRAM_3_11 ,Weighted Frequency of Hue Area-3 and Saturation Area-11" line.long 0x1B0 "VI6_HGT_HISTO_3_12,HGT Histogram Register 3-12" hexmask.long 0x1B0 0.--25. 1. " HISTOGRAM_3_12 ,Weighted Frequency of Hue Area-3 and Saturation Area-12" line.long 0x1B4 "VI6_HGT_HISTO_3_13,HGT Histogram Register 3-13" hexmask.long 0x1B4 0.--25. 1. " HISTOGRAM_3_13 ,Weighted Frequency of Hue Area-3 and Saturation Area-13" line.long 0x1B8 "VI6_HGT_HISTO_3_14,HGT Histogram Register 3-14" hexmask.long 0x1B8 0.--25. 1. " HISTOGRAM_3_14 ,Weighted Frequency of Hue Area-3 and Saturation Area-14" line.long 0x1BC "VI6_HGT_HISTO_3_15,HGT Histogram Register 3-15" hexmask.long 0x1BC 0.--25. 1. " HISTOGRAM_3_15 ,Weighted Frequency of Hue Area-3 and Saturation Area-15" line.long 0x1C0 "VI6_HGT_HISTO_3_16,HGT Histogram Register 3-16" hexmask.long 0x1C0 0.--25. 1. " HISTOGRAM_3_16 ,Weighted Frequency of Hue Area-3 and Saturation Area-16" line.long 0x1C4 "VI6_HGT_HISTO_3_17,HGT Histogram Register 3-17" hexmask.long 0x1C4 0.--25. 1. " HISTOGRAM_3_17 ,Weighted Frequency of Hue Area-3 and Saturation Area-17" line.long 0x1C8 "VI6_HGT_HISTO_3_18,HGT Histogram Register 3-18" hexmask.long 0x1C8 0.--25. 1. " HISTOGRAM_3_18 ,Weighted Frequency of Hue Area-3 and Saturation Area-18" line.long 0x1CC "VI6_HGT_HISTO_3_19,HGT Histogram Register 3-19" hexmask.long 0x1CC 0.--25. 1. " HISTOGRAM_3_19 ,Weighted Frequency of Hue Area-3 and Saturation Area-19" line.long 0x1D0 "VI6_HGT_HISTO_3_20,HGT Histogram Register 3-20" hexmask.long 0x1D0 0.--25. 1. " HISTOGRAM_3_20 ,Weighted Frequency of Hue Area-3 and Saturation Area-20" line.long 0x1D4 "VI6_HGT_HISTO_3_21,HGT Histogram Register 3-21" hexmask.long 0x1D4 0.--25. 1. " HISTOGRAM_3_21 ,Weighted Frequency of Hue Area-3 and Saturation Area-21" line.long 0x1D8 "VI6_HGT_HISTO_3_22,HGT Histogram Register 3-22" hexmask.long 0x1D8 0.--25. 1. " HISTOGRAM_3_22 ,Weighted Frequency of Hue Area-3 and Saturation Area-22" line.long 0x1DC "VI6_HGT_HISTO_3_23,HGT Histogram Register 3-23" hexmask.long 0x1DC 0.--25. 1. " HISTOGRAM_3_23 ,Weighted Frequency of Hue Area-3 and Saturation Area-23" line.long 0x1E0 "VI6_HGT_HISTO_3_24,HGT Histogram Register 3-24" hexmask.long 0x1E0 0.--25. 1. " HISTOGRAM_3_24 ,Weighted Frequency of Hue Area-3 and Saturation Area-24" line.long 0x1E4 "VI6_HGT_HISTO_3_25,HGT Histogram Register 3-25" hexmask.long 0x1E4 0.--25. 1. " HISTOGRAM_3_25 ,Weighted Frequency of Hue Area-3 and Saturation Area-25" line.long 0x1E8 "VI6_HGT_HISTO_3_26,HGT Histogram Register 3-26" hexmask.long 0x1E8 0.--25. 1. " HISTOGRAM_3_26 ,Weighted Frequency of Hue Area-3 and Saturation Area-26" line.long 0x1EC "VI6_HGT_HISTO_3_27,HGT Histogram Register 3-27" hexmask.long 0x1EC 0.--25. 1. " HISTOGRAM_3_27 ,Weighted Frequency of Hue Area-3 and Saturation Area-27" line.long 0x1F0 "VI6_HGT_HISTO_3_28,HGT Histogram Register 3-28" hexmask.long 0x1F0 0.--25. 1. " HISTOGRAM_3_28 ,Weighted Frequency of Hue Area-3 and Saturation Area-28" line.long 0x1F4 "VI6_HGT_HISTO_3_29,HGT Histogram Register 3-29" hexmask.long 0x1F4 0.--25. 1. " HISTOGRAM_3_29 ,Weighted Frequency of Hue Area-3 and Saturation Area-29" line.long 0x1F8 "VI6_HGT_HISTO_3_30,HGT Histogram Register 3-30" hexmask.long 0x1F8 0.--25. 1. " HISTOGRAM_3_30 ,Weighted Frequency of Hue Area-3 and Saturation Area-30" line.long 0x1FC "VI6_HGT_HISTO_3_31,HGT Histogram Register 3-31" hexmask.long 0x1FC 0.--25. 1. " HISTOGRAM_3_31 ,Weighted Frequency of Hue Area-3 and Saturation Area-31" line.long 0x200 "VI6_HGT_HISTO_4_0 ,HGT Histogram Register 4-0 " hexmask.long 0x200 0.--25. 1. " HISTOGRAM_4_0 ,Weighted Frequency of Hue Area-4 and Saturation Area-0 " line.long 0x204 "VI6_HGT_HISTO_4_1 ,HGT Histogram Register 4-1 " hexmask.long 0x204 0.--25. 1. " HISTOGRAM_4_1 ,Weighted Frequency of Hue Area-4 and Saturation Area-1 " line.long 0x208 "VI6_HGT_HISTO_4_2 ,HGT Histogram Register 4-2 " hexmask.long 0x208 0.--25. 1. " HISTOGRAM_4_2 ,Weighted Frequency of Hue Area-4 and Saturation Area-2 " line.long 0x20C "VI6_HGT_HISTO_4_3 ,HGT Histogram Register 4-3 " hexmask.long 0x20C 0.--25. 1. " HISTOGRAM_4_3 ,Weighted Frequency of Hue Area-4 and Saturation Area-3 " line.long 0x210 "VI6_HGT_HISTO_4_4 ,HGT Histogram Register 4-4 " hexmask.long 0x210 0.--25. 1. " HISTOGRAM_4_4 ,Weighted Frequency of Hue Area-4 and Saturation Area-4 " line.long 0x214 "VI6_HGT_HISTO_4_5 ,HGT Histogram Register 4-5 " hexmask.long 0x214 0.--25. 1. " HISTOGRAM_4_5 ,Weighted Frequency of Hue Area-4 and Saturation Area-5 " line.long 0x218 "VI6_HGT_HISTO_4_6 ,HGT Histogram Register 4-6 " hexmask.long 0x218 0.--25. 1. " HISTOGRAM_4_6 ,Weighted Frequency of Hue Area-4 and Saturation Area-6 " line.long 0x21C "VI6_HGT_HISTO_4_7 ,HGT Histogram Register 4-7 " hexmask.long 0x21C 0.--25. 1. " HISTOGRAM_4_7 ,Weighted Frequency of Hue Area-4 and Saturation Area-7 " line.long 0x220 "VI6_HGT_HISTO_4_8 ,HGT Histogram Register 4-8 " hexmask.long 0x220 0.--25. 1. " HISTOGRAM_4_8 ,Weighted Frequency of Hue Area-4 and Saturation Area-8 " line.long 0x224 "VI6_HGT_HISTO_4_9 ,HGT Histogram Register 4-9 " hexmask.long 0x224 0.--25. 1. " HISTOGRAM_4_9 ,Weighted Frequency of Hue Area-4 and Saturation Area-9 " line.long 0x228 "VI6_HGT_HISTO_4_10,HGT Histogram Register 4-10" hexmask.long 0x228 0.--25. 1. " HISTOGRAM_4_10 ,Weighted Frequency of Hue Area-4 and Saturation Area-10" line.long 0x22C "VI6_HGT_HISTO_4_11,HGT Histogram Register 4-11" hexmask.long 0x22C 0.--25. 1. " HISTOGRAM_4_11 ,Weighted Frequency of Hue Area-4 and Saturation Area-11" line.long 0x230 "VI6_HGT_HISTO_4_12,HGT Histogram Register 4-12" hexmask.long 0x230 0.--25. 1. " HISTOGRAM_4_12 ,Weighted Frequency of Hue Area-4 and Saturation Area-12" line.long 0x234 "VI6_HGT_HISTO_4_13,HGT Histogram Register 4-13" hexmask.long 0x234 0.--25. 1. " HISTOGRAM_4_13 ,Weighted Frequency of Hue Area-4 and Saturation Area-13" line.long 0x238 "VI6_HGT_HISTO_4_14,HGT Histogram Register 4-14" hexmask.long 0x238 0.--25. 1. " HISTOGRAM_4_14 ,Weighted Frequency of Hue Area-4 and Saturation Area-14" line.long 0x23C "VI6_HGT_HISTO_4_15,HGT Histogram Register 4-15" hexmask.long 0x23C 0.--25. 1. " HISTOGRAM_4_15 ,Weighted Frequency of Hue Area-4 and Saturation Area-15" line.long 0x240 "VI6_HGT_HISTO_4_16,HGT Histogram Register 4-16" hexmask.long 0x240 0.--25. 1. " HISTOGRAM_4_16 ,Weighted Frequency of Hue Area-4 and Saturation Area-16" line.long 0x244 "VI6_HGT_HISTO_4_17,HGT Histogram Register 4-17" hexmask.long 0x244 0.--25. 1. " HISTOGRAM_4_17 ,Weighted Frequency of Hue Area-4 and Saturation Area-17" line.long 0x248 "VI6_HGT_HISTO_4_18,HGT Histogram Register 4-18" hexmask.long 0x248 0.--25. 1. " HISTOGRAM_4_18 ,Weighted Frequency of Hue Area-4 and Saturation Area-18" line.long 0x24C "VI6_HGT_HISTO_4_19,HGT Histogram Register 4-19" hexmask.long 0x24C 0.--25. 1. " HISTOGRAM_4_19 ,Weighted Frequency of Hue Area-4 and Saturation Area-19" line.long 0x250 "VI6_HGT_HISTO_4_20,HGT Histogram Register 4-20" hexmask.long 0x250 0.--25. 1. " HISTOGRAM_4_20 ,Weighted Frequency of Hue Area-4 and Saturation Area-20" line.long 0x254 "VI6_HGT_HISTO_4_21,HGT Histogram Register 4-21" hexmask.long 0x254 0.--25. 1. " HISTOGRAM_4_21 ,Weighted Frequency of Hue Area-4 and Saturation Area-21" line.long 0x258 "VI6_HGT_HISTO_4_22,HGT Histogram Register 4-22" hexmask.long 0x258 0.--25. 1. " HISTOGRAM_4_22 ,Weighted Frequency of Hue Area-4 and Saturation Area-22" line.long 0x25C "VI6_HGT_HISTO_4_23,HGT Histogram Register 4-23" hexmask.long 0x25C 0.--25. 1. " HISTOGRAM_4_23 ,Weighted Frequency of Hue Area-4 and Saturation Area-23" line.long 0x260 "VI6_HGT_HISTO_4_24,HGT Histogram Register 4-24" hexmask.long 0x260 0.--25. 1. " HISTOGRAM_4_24 ,Weighted Frequency of Hue Area-4 and Saturation Area-24" line.long 0x264 "VI6_HGT_HISTO_4_25,HGT Histogram Register 4-25" hexmask.long 0x264 0.--25. 1. " HISTOGRAM_4_25 ,Weighted Frequency of Hue Area-4 and Saturation Area-25" line.long 0x268 "VI6_HGT_HISTO_4_26,HGT Histogram Register 4-26" hexmask.long 0x268 0.--25. 1. " HISTOGRAM_4_26 ,Weighted Frequency of Hue Area-4 and Saturation Area-26" line.long 0x26C "VI6_HGT_HISTO_4_27,HGT Histogram Register 4-27" hexmask.long 0x26C 0.--25. 1. " HISTOGRAM_4_27 ,Weighted Frequency of Hue Area-4 and Saturation Area-27" line.long 0x270 "VI6_HGT_HISTO_4_28,HGT Histogram Register 4-28" hexmask.long 0x270 0.--25. 1. " HISTOGRAM_4_28 ,Weighted Frequency of Hue Area-4 and Saturation Area-28" line.long 0x274 "VI6_HGT_HISTO_4_29,HGT Histogram Register 4-29" hexmask.long 0x274 0.--25. 1. " HISTOGRAM_4_29 ,Weighted Frequency of Hue Area-4 and Saturation Area-29" line.long 0x278 "VI6_HGT_HISTO_4_30,HGT Histogram Register 4-30" hexmask.long 0x278 0.--25. 1. " HISTOGRAM_4_30 ,Weighted Frequency of Hue Area-4 and Saturation Area-30" line.long 0x27C "VI6_HGT_HISTO_4_31,HGT Histogram Register 4-31" hexmask.long 0x27C 0.--25. 1. " HISTOGRAM_4_31 ,Weighted Frequency of Hue Area-4 and Saturation Area-31" line.long 0x280 "VI6_HGT_HISTO_5_0 ,HGT Histogram Register 5-0 " hexmask.long 0x280 0.--25. 1. " HISTOGRAM_5_0 ,Weighted Frequency of Hue Area-5 and Saturation Area-0 " line.long 0x284 "VI6_HGT_HISTO_5_1 ,HGT Histogram Register 5-1 " hexmask.long 0x284 0.--25. 1. " HISTOGRAM_5_1 ,Weighted Frequency of Hue Area-5 and Saturation Area-1 " line.long 0x288 "VI6_HGT_HISTO_5_2 ,HGT Histogram Register 5-2 " hexmask.long 0x288 0.--25. 1. " HISTOGRAM_5_2 ,Weighted Frequency of Hue Area-5 and Saturation Area-2 " line.long 0x28C "VI6_HGT_HISTO_5_3 ,HGT Histogram Register 5-3 " hexmask.long 0x28C 0.--25. 1. " HISTOGRAM_5_3 ,Weighted Frequency of Hue Area-5 and Saturation Area-3 " line.long 0x290 "VI6_HGT_HISTO_5_4 ,HGT Histogram Register 5-4 " hexmask.long 0x290 0.--25. 1. " HISTOGRAM_5_4 ,Weighted Frequency of Hue Area-5 and Saturation Area-4 " line.long 0x294 "VI6_HGT_HISTO_5_5 ,HGT Histogram Register 5-5 " hexmask.long 0x294 0.--25. 1. " HISTOGRAM_5_5 ,Weighted Frequency of Hue Area-5 and Saturation Area-5 " line.long 0x298 "VI6_HGT_HISTO_5_6 ,HGT Histogram Register 5-6 " hexmask.long 0x298 0.--25. 1. " HISTOGRAM_5_6 ,Weighted Frequency of Hue Area-5 and Saturation Area-6 " line.long 0x29C "VI6_HGT_HISTO_5_7 ,HGT Histogram Register 5-7 " hexmask.long 0x29C 0.--25. 1. " HISTOGRAM_5_7 ,Weighted Frequency of Hue Area-5 and Saturation Area-7 " line.long 0x2A0 "VI6_HGT_HISTO_5_8 ,HGT Histogram Register 5-8 " hexmask.long 0x2A0 0.--25. 1. " HISTOGRAM_5_8 ,Weighted Frequency of Hue Area-5 and Saturation Area-8 " line.long 0x2A4 "VI6_HGT_HISTO_5_9 ,HGT Histogram Register 5-9 " hexmask.long 0x2A4 0.--25. 1. " HISTOGRAM_5_9 ,Weighted Frequency of Hue Area-5 and Saturation Area-9 " line.long 0x2A8 "VI6_HGT_HISTO_5_10,HGT Histogram Register 5-10" hexmask.long 0x2A8 0.--25. 1. " HISTOGRAM_5_10 ,Weighted Frequency of Hue Area-5 and Saturation Area-10" line.long 0x2AC "VI6_HGT_HISTO_5_11,HGT Histogram Register 5-11" hexmask.long 0x2AC 0.--25. 1. " HISTOGRAM_5_11 ,Weighted Frequency of Hue Area-5 and Saturation Area-11" line.long 0x2B0 "VI6_HGT_HISTO_5_12,HGT Histogram Register 5-12" hexmask.long 0x2B0 0.--25. 1. " HISTOGRAM_5_12 ,Weighted Frequency of Hue Area-5 and Saturation Area-12" line.long 0x2B4 "VI6_HGT_HISTO_5_13,HGT Histogram Register 5-13" hexmask.long 0x2B4 0.--25. 1. " HISTOGRAM_5_13 ,Weighted Frequency of Hue Area-5 and Saturation Area-13" line.long 0x2B8 "VI6_HGT_HISTO_5_14,HGT Histogram Register 5-14" hexmask.long 0x2B8 0.--25. 1. " HISTOGRAM_5_14 ,Weighted Frequency of Hue Area-5 and Saturation Area-14" line.long 0x2BC "VI6_HGT_HISTO_5_15,HGT Histogram Register 5-15" hexmask.long 0x2BC 0.--25. 1. " HISTOGRAM_5_15 ,Weighted Frequency of Hue Area-5 and Saturation Area-15" line.long 0x2C0 "VI6_HGT_HISTO_5_16,HGT Histogram Register 5-16" hexmask.long 0x2C0 0.--25. 1. " HISTOGRAM_5_16 ,Weighted Frequency of Hue Area-5 and Saturation Area-16" line.long 0x2C4 "VI6_HGT_HISTO_5_17,HGT Histogram Register 5-17" hexmask.long 0x2C4 0.--25. 1. " HISTOGRAM_5_17 ,Weighted Frequency of Hue Area-5 and Saturation Area-17" line.long 0x2C8 "VI6_HGT_HISTO_5_18,HGT Histogram Register 5-18" hexmask.long 0x2C8 0.--25. 1. " HISTOGRAM_5_18 ,Weighted Frequency of Hue Area-5 and Saturation Area-18" line.long 0x2CC "VI6_HGT_HISTO_5_19,HGT Histogram Register 5-19" hexmask.long 0x2CC 0.--25. 1. " HISTOGRAM_5_19 ,Weighted Frequency of Hue Area-5 and Saturation Area-19" line.long 0x2D0 "VI6_HGT_HISTO_5_20,HGT Histogram Register 5-20" hexmask.long 0x2D0 0.--25. 1. " HISTOGRAM_5_20 ,Weighted Frequency of Hue Area-5 and Saturation Area-20" line.long 0x2D4 "VI6_HGT_HISTO_5_21,HGT Histogram Register 5-21" hexmask.long 0x2D4 0.--25. 1. " HISTOGRAM_5_21 ,Weighted Frequency of Hue Area-5 and Saturation Area-21" line.long 0x2D8 "VI6_HGT_HISTO_5_22,HGT Histogram Register 5-22" hexmask.long 0x2D8 0.--25. 1. " HISTOGRAM_5_22 ,Weighted Frequency of Hue Area-5 and Saturation Area-22" line.long 0x2DC "VI6_HGT_HISTO_5_23,HGT Histogram Register 5-23" hexmask.long 0x2DC 0.--25. 1. " HISTOGRAM_5_23 ,Weighted Frequency of Hue Area-5 and Saturation Area-23" line.long 0x2E0 "VI6_HGT_HISTO_5_24,HGT Histogram Register 5-24" hexmask.long 0x2E0 0.--25. 1. " HISTOGRAM_5_24 ,Weighted Frequency of Hue Area-5 and Saturation Area-24" line.long 0x2E4 "VI6_HGT_HISTO_5_25,HGT Histogram Register 5-25" hexmask.long 0x2E4 0.--25. 1. " HISTOGRAM_5_25 ,Weighted Frequency of Hue Area-5 and Saturation Area-25" line.long 0x2E8 "VI6_HGT_HISTO_5_26,HGT Histogram Register 5-26" hexmask.long 0x2E8 0.--25. 1. " HISTOGRAM_5_26 ,Weighted Frequency of Hue Area-5 and Saturation Area-26" line.long 0x2EC "VI6_HGT_HISTO_5_27,HGT Histogram Register 5-27" hexmask.long 0x2EC 0.--25. 1. " HISTOGRAM_5_27 ,Weighted Frequency of Hue Area-5 and Saturation Area-27" line.long 0x2F0 "VI6_HGT_HISTO_5_28,HGT Histogram Register 5-28" hexmask.long 0x2F0 0.--25. 1. " HISTOGRAM_5_28 ,Weighted Frequency of Hue Area-5 and Saturation Area-28" line.long 0x2F4 "VI6_HGT_HISTO_5_29,HGT Histogram Register 5-29" hexmask.long 0x2F4 0.--25. 1. " HISTOGRAM_5_29 ,Weighted Frequency of Hue Area-5 and Saturation Area-29" line.long 0x2F8 "VI6_HGT_HISTO_5_30,HGT Histogram Register 5-30" hexmask.long 0x2F8 0.--25. 1. " HISTOGRAM_5_30 ,Weighted Frequency of Hue Area-5 and Saturation Area-30" line.long 0x2FC "VI6_HGT_HISTO_5_31,HGT Histogram Register 5-31" hexmask.long 0x2FC 0.--25. 1. " HISTOGRAM_5_31 ,Weighted Frequency of Hue Area-5 and Saturation Area-31" line.long 0x300 "VI6_HGT_MAXMIN,HGT Max/Min Value Register" hexmask.long.byte 0x300 16.--23. 1. " MAXVAL ,Maximum Value of S Components" hexmask.long.byte 0x300 0.--7. 1. " MINVAL ,Minimum Value of S Components" line.long 0x304 "VI6_HGT_SUM,HGT Sum Register" hexmask.long 0x304 0.--29. 1. " SUMVAL ,Sum of V Components" line.long 0x308 "VI6_HGT_LB_DET,HGT LB Detection Result Register" bitfld.long 0x308 2. " LTRBOX1 ,Letter Box Detection Result #1 of Zone-0/1 for V Component" "0,1" bitfld.long 0x308 1. " LTRBOX2 ,Letter Box Detection Result #2 of Zone-0/1 for V Component" "0,1" bitfld.long 0x308 0. " SIDE ,Letter Box Detection Result of Zone-2/3 for V Component" "0,1" wgroup.long 0x37FC++0x3 line.long 0x00 "VI6_HGT_REGRST,HGT Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register Reset" "No reset,Reset" tree.end width 18. tree "Security Control Registers" group.long 0x3D00++0x7 line.long 0x00 "VI6_SECURE_CTRL0,Secure Access Control Register 0" bitfld.long 0x00 27. " SCCH3 ,Secure Attribute for Display List 3 Registers" "Non-secure,Secure" bitfld.long 0x00 26. " SCCH2 ,Secure Attribute for Display List 2 Registers" "Non-secure,Secure" bitfld.long 0x00 25. " SCCH1 ,Secure Attribute for Display List 1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 24. " SCCH0 ,Secure Attribute for Display List 0 Registers" "Non-secure,Secure" bitfld.long 0x00 11. " SCWPF3 ,Secure Attribute for WPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 10. " SCWPF2 ,Secure Attribute for WPF2 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " SCWPF1 ,Secure Attribute for WPF1 Registers" "Non-secure,Secure" bitfld.long 0x00 8. " SCWPF0 ,Secure Attribute for WPF0 Registers" "Non-secure,Secure" bitfld.long 0x00 4. " SCRPF4 ,Secure Attribute for RPF4 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " SCRPF3 ,Secure Attribute for RPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 2. " SCRPF2 ,Secure Attribute for RPF2 Registers" "Non-secure,Secure" bitfld.long 0x00 1. " SCRPF1 ,Secure Attribute for RPF1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " SCRPF0 ,Secure Attribute for RPF0 Registers" "Non-secure,Secure" line.long 0x04 "VI6_SECURE_CTRL1,Secure Access Control Register 1" bitfld.long 0x04 14. " SCLIF ,Secure Attribute for LIF Registers" "Non-secure,Secure" bitfld.long 0x04 13. " SCHGT ,Secure Attribute for HGT Registers" "Non-secure,Secure" bitfld.long 0x04 12. " SCHGO ,Secure Attribute for HGO Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 10. " SCBRU ,Secure Attribute for BRU Registers" "Non-secure,Secure" bitfld.long 0x04 9. " SCHSI ,Secure Attribute for HSI Registers" "Non-secure,Secure" bitfld.long 0x04 8. " SCHST ,Secure Attribute for HST Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 7. " SCCLU ,Secure Attribute for CLU Registers" "Non-secure,Secure" bitfld.long 0x04 6. " SCLUT ,Secure Attribute for LUT Registers" "Non-secure,Secure" bitfld.long 0x04 3. " SCUDS2 ,Secure Attribute for UDS2 Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 2. " SCUDS1 ,Secure Attribute for UDS1 Registers" "Non-secure,Secure" bitfld.long 0x04 1. " SCUDS0 ,Secure Attribute for UDS0 Registers" "Non-secure,Secure" bitfld.long 0x04 0. " SCSRU ,Secure Attribute for SRU Registers" "Non-secure,Secure" tree.end width 15. tree "CLUT" group.long 0x4000++0x3 line.long 0x00 "VI6_CLUT0_TBL,CLUT table 0" button "CLUT0" "d (ad:0xFE928000+0x4000)--(ad:0xFE928000+0x43FF) /long" group.long 0x4400++0x3 line.long 0x00 "VI6_CLUT1_TBL,CLUT table 1" button "CLUT1" "d (ad:0xFE928000+0x4400)--(ad:0xFE928000+0x47FF) /long" group.long 0x4800++0x3 line.long 0x00 "VI6_CLUT2_TBL,CLUT table 2" button "CLUT2" "d (ad:0xFE928000+0x4800)--(ad:0xFE928000+0x4BFF) /long" group.long 0x4C00++0x3 line.long 0x00 "VI6_CLUT3_TBL,CLUT table 3" button "CLUT3" "d (ad:0xFE928000+0x4C00)--(ad:0xFE928000+0x4FFF) /long" group.long 0x5000++0x3 line.long 0x00 "VI6_CLUT4_TBL,CLUT table 4" button "CLUT4" "d (ad:0xFE928000+0x5000)--(ad:0xFE928000+0x53FF) /long" tree.end width 14. tree "LUT" group.long 0x7000++0x3 "1D-LUT" line.long 0x00 "VI6_LUT_TBL,LUT table" button "LUT" "d (ad:0xFE928000+0x7000)--(ad:0xFE928000+0x73FF) /long" group.long 0x7400++0x7 "3D-LUT" line.long 0x00 "VI6_CLU_ADDR,CLU Address Space Register" hexmask.long.byte 0x00 16.--23. 1. " CVFA ,Coordinate Value of First Axis" hexmask.long.byte 0x00 8.--15. 1. " CVSA ,Coordinate Value of Second Axis" hexmask.long.byte 0x00 0.--7. 1. " CVTA ,Coordinate Value of Third Axis" line.long 0x04 "VI6_CLU_DATA,CLU Data Register" hexmask.long.byte 0x04 16.--23. 1. " CVFA ,Component Value of First Axis" hexmask.long.byte 0x04 8.--15. 1. " CVSA ,Component Value of Second Axis" hexmask.long.byte 0x04 0.--7. 1. " CVTA ,Component Value of Third Axis" tree.end width 0xB tree.end tree "VSPD 0" base ad:0xFE930000 width 19. tree "General control registers" group.long 0x00++0xF line.long 0x0 "VI6_CMD0,VSP1 Start Register 0" bitfld.long 0x0 0. " STRCMD ,Start Command" "Not started,Started" group.long 0x18++0x3 line.long 0x00 "VI6_CLK_DCSWT,Dynamic Clock Stop Control Register" hexmask.long.byte 0x00 8.--15. 1. " CSTPW ,Dynamic Clock Stop Control 1" hexmask.long.byte 0x00 0.--7. 1. " CSTRW ,Dynamic Clock Stop Control 2" group.long 0x28++0x3 line.long 0x00 "VI6_SRESET,Software Reset Register" bitfld.long 0x00 3. " SRST3 ,WPF3 Software Reset" "No reset,Reset" bitfld.long 0x00 2. " SRST2 ,WPF2 Software Reset" "No reset,Reset" bitfld.long 0x00 1. " SRST1 ,WPF1 Software Reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " SRST0 ,WPF0 Software Reset" "No reset,Reset" rgroup.long 0x38++0x3 line.long 0x00 "VI6_STATUS,Operating Status Register" bitfld.long 0x00 11. " SYS3_ACT ,WPF3 Operating Status" "Stopped,Operated" bitfld.long 0x00 10. " SYS2_ACT ,WPF2 Operating Status" "Stopped,Operated" bitfld.long 0x00 9. " SYS1_ACT ,WPF1 Operating Status" "Stopped,Operated" textline " " bitfld.long 0x00 8. " SYS0_ACT ,WPF0 Operating Status" "Stopped,Operated" group.long 0x48++0x7 line.long 0x00 "VI6_WPF0_IRQ_ENB,WPF Interrupt Enable Register" bitfld.long 0x00 1. " DFEE ,Interrupt enable for WPF0 (Display List Frame End)" "Disabled,Enabled" bitfld.long 0x00 0. " FREE ,Interrupt enable for WPF0 (Frame End)" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_IRQ_STA,WPF Interrupt Status Register" bitfld.long 0x04 1. " DFE ,Interrupt status for WPF0 (Display List Frame End)" "No interrupt,Interrupt" bitfld.long 0x04 0. " FRE ,Interrupt status for WPF0 (Frame End)" "No interrupt,Interrupt" group.long 0x78++0x7 line.long 0x00 "VI6_DISP_IRQ_ENB,Display Interrupt Enable Register" bitfld.long 0x00 8. " DSTE ,Interrupt enable for Display Start" "Disabled,Enabled" bitfld.long 0x00 5. " MAEE ,Interrupt enable for Display Read Data End" "Disabled,Enabled" bitfld.long 0x00 4. " LNE4E ,Interrupt enable for 1 Line Data Read End of RFP4" "Disabled,Enabled" bitfld.long 0x00 3. " LNE3E ,Interrupt enable for 1 Line Data Read End of RFP3" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " LNE2E ,Interrupt enable for 1 Line Data Read End of RFP2" "Disabled,Enabled" bitfld.long 0x00 1. " LNE1E ,Interrupt enable for 1 Line Data Read End of RFP1" "Disabled,Enabled" bitfld.long 0x00 0. " LNE0E ,Interrupt enable for 1 Line Data Read End of RFP0" "Disabled,Enabled" line.long 0x04 "VI6_DISP_IRQ_STA,Display Interrupt Enable Register" bitfld.long 0x04 8. " DST ,Interrupt status for Display Start" "No interrupt,Interrupt" bitfld.long 0x04 5. " MAE ,Interrupt status for Display Read Data End" "No interrupt,Interrupt" bitfld.long 0x04 4. " LNE4 ,Interrupt status for 1 Line Data Read End of RFP4" "No interrupt,Interrupt" bitfld.long 0x04 3. " LNE3 ,Interrupt status for 1 Line Data Read End of RFP3" "No interrupt,Interrupt" textline " " bitfld.long 0x04 2. " LNE2 ,Interrupt status for 1 Line Data Read End of RFP2" "No interrupt,Interrupt" bitfld.long 0x04 1. " LNE1 ,Interrupt status for 1 Line Data Read End of RFP1" "No interrupt,Interrupt" bitfld.long 0x04 0. " LNE0 ,Interrupt status for 1 Line Data Read End of RFP0" "No interrupt,Interrupt" group.long 0x84++0xF line.long 0x0 "VI6_WPF0_LINE_CNT,WPF0 Output Line Count Register" hexmask.long.tbyte 0x0 0.--20. 1. " LINE_CNT ,Number of WPF0 Output Lines" group.long 0x100++0x17 line.long 0x00 "VI6_DL_CTRL,Display List Control Register" hexmask.long.word 0x00 16.--31. 1. " AR_WAIT ,Display List Control Setting" bitfld.long 0x00 12. " DC2 ,Display List Control 2" "Disabled,Enabled" bitfld.long 0x00 8. " DC1 ,Display List Control 1" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " DC0 ,Display List Control 0" "Disabled,Enabled" bitfld.long 0x00 2. " CFM0 ,Continuous Frame Mode for Header-less Display List" "Disabled,Enabled" bitfld.long 0x00 1. " NH0 ,Header-less Display List Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DLE ,Display List Enable/Disable" "Disabled,Enabled" line.long 0x4 "VI6_DL_HDR_ADDR0,Display List-0 Header Address Register" line.long 0x8 "VI6_DL_HDR_ADDR1,Display List-1 Header Address Register" line.long 0xC "VI6_DL_HDR_ADDR2,Display List-2 Header Address Register" line.long 0x10 "VI6_DL_HDR_ADDR3,Display List-3 Header Address Register" line.long 0x14 "VI6_DL_SWAP,Display List Data Swapping Register" bitfld.long 0x14 2. " LWS ,Display List Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x14 1. " WDS ,Display List Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x14 0. " BTS ,Display List DataSwapping in Byte Units" "Disabled,Enabled" group.long 0x11C++0x7 line.long 0x00 "VI6_DL_EXT_CTRL,Extended Display List Control Register" bitfld.long 0x00 16. " NWE ,No Wait for Polling" "Disabled,Enabled" bitfld.long 0x00 8.--13. " POLINT ,Extended Display List Command Control" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 5. " DLPRI ,Display List Control 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " EXPRI ,Display List Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " EXT ,Extended Display List" "Disabled,Enabled" line.long 0x04 "VI6_DL_BODY_SIZE0,Display List Body Size Register 0" bitfld.long 0x04 24. " UPD0 ,Update Flag" "Not downloaded,Downloaded" hexmask.long.tbyte 0x04 0.--16. 1. " BS0 ,Header-less Display List Body Size" tree.end width 23. tree "RPF Control Registers" group.long 0x300++0x4B "RPF 0" line.long 0x00 "VI6_RPF0_SRC_BSIZE,RPF0 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF0_SRC_ESIZE,RPF0 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF0_INFMT,RPF0 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbor,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" textline " " bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF0_DSWAP,RPF0 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF0_LOC,RPF0 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" textline " " line.long 0x14 "VI6_RPF0_ALPH_SEL,RPF0 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" textline " " line.long 0x18 "VI6_RPF0_VRTCOL_SET,RPF0 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF0_MSKCTRL,RPF0 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF0_MSKSET0,RPF0 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF0_MSKSET1,RPF0 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF0_CKEY_CTRL,RPF0 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF0_CKEY_SET0,RPF0 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF0_CKEY_SET1,RPF0 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" textline " " line.long 0x34 "VI6_RPF0_SRCM_PSTRIDE,RPF0 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF0_SRCM_ASTRIDE,RPF0 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" textline " " line.long 0x3C "VI6_RPF0_SRCM_ADDR_Y,RPF0 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF0_SRCM_ADDR_C0,RPF0 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF0_SRCM_ADDR_C1,RPF0 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF0_SRCM_ADDR_AI,RPF0 Source Alpha Address Register" group.long 0x400++0x4B "RPF 1" line.long 0x00 "VI6_RPF1_SRC_BSIZE,RPF1 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF1_SRC_ESIZE,RPF1 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF1_INFMT,RPF1 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbor,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" textline " " bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF1_DSWAP,RPF1 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF1_LOC,RPF1 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" textline " " line.long 0x14 "VI6_RPF1_ALPH_SEL,RPF1 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" textline " " line.long 0x18 "VI6_RPF1_VRTCOL_SET,RPF1 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF1_MSKCTRL,RPF1 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF1_MSKSET0,RPF1 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF1_MSKSET1,RPF1 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF1_CKEY_CTRL,RPF1 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF1_CKEY_SET0,RPF1 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF1_CKEY_SET1,RPF1 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" textline " " line.long 0x34 "VI6_RPF1_SRCM_PSTRIDE,RPF1 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF1_SRCM_ASTRIDE,RPF1 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" textline " " line.long 0x3C "VI6_RPF1_SRCM_ADDR_Y,RPF1 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF1_SRCM_ADDR_C0,RPF1 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF1_SRCM_ADDR_C1,RPF1 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF1_SRCM_ADDR_AI,RPF1 Source Alpha Address Register" group.long 0x500++0x4B "RPF 2" line.long 0x00 "VI6_RPF2_SRC_BSIZE,RPF2 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF2_SRC_ESIZE,RPF2 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF2_INFMT,RPF2 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbor,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" textline " " bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF2_DSWAP,RPF2 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF2_LOC,RPF2 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" textline " " line.long 0x14 "VI6_RPF2_ALPH_SEL,RPF2 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" textline " " line.long 0x18 "VI6_RPF2_VRTCOL_SET,RPF2 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF2_MSKCTRL,RPF2 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF2_MSKSET0,RPF2 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF2_MSKSET1,RPF2 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF2_CKEY_CTRL,RPF2 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF2_CKEY_SET0,RPF2 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF2_CKEY_SET1,RPF2 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" textline " " line.long 0x34 "VI6_RPF2_SRCM_PSTRIDE,RPF2 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF2_SRCM_ASTRIDE,RPF2 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" textline " " line.long 0x3C "VI6_RPF2_SRCM_ADDR_Y,RPF2 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF2_SRCM_ADDR_C0,RPF2 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF2_SRCM_ADDR_C1,RPF2 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF2_SRCM_ADDR_AI,RPF2 Source Alpha Address Register" group.long 0x600++0x4B "RPF 3" line.long 0x00 "VI6_RPF3_SRC_BSIZE,RPF3 Basic Read Size Register" hexmask.long.word 0x00 16.--28. 1. " BHSIZE ,Horizontal Size of RPF Basic Read Area" hexmask.long.word 0x00 0.--12. 1. " BVSIZE ,Vertical Size of RPF Basic Read Area" line.long 0x04 "VI6_RPF3_SRC_ESIZE,RPF3 Extended Read SizeRegister" hexmask.long.word 0x04 16.--28. 1. " EHSIZE ,RPF Extended Horizontal Read Size" hexmask.long.word 0x04 0.--12. 1. " EVSIZE ,RPF Extended Vertical Read Size" line.long 0x08 "VI6_RPF3_INFMT,RPF3 Input Format Register" bitfld.long 0x08 28. " VIR ,Virtual Input Enable" "Disabled,Enabled" bitfld.long 0x08 16. " CIPM ,Horizontal Chrominance Interpolation Method Setting" "Nearest-neighbor,Bilinear" bitfld.long 0x08 15. " SPYCS ,RPF Input Mode Setting 1" "0,1" textline " " bitfld.long 0x08 14. " SPUVS ,RPF Input Mode Setting 2" "0,1" bitfld.long 0x08 12.--13. " CEXT ,Lower-Bit Color Data Extension Method Setting" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." bitfld.long 0x08 9.--11. " RDTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x08 8. " CSC ,Color Space Conversion Enable" "Disabled,Enabled" hexmask.long.byte 0x08 0.--6. 1. " RDFMT ,RPF Input Image Format Setting" line.long 0x0C "VI6_RPF3_DSWAP,RPF3 Data Swapping Register" bitfld.long 0x0C 11. " A_LLS ,Alpha Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 10. " A_LWS ,Alpha Plane Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x0C 9. " A_WDS ,Alpha Plane Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 8. " A_BTS ,Alpha Plane Data Swapping in Byte Units" "Disabled,Enabled" bitfld.long 0x0C 3. " P_LLS ,Picture Plane Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x0C 2. " P_LWS ,Picture Plane Data Swapping in Longword Units" "Disabled,Enabled" textline " " bitfld.long 0x0C 1. " P_WDS ,Picture Plane Data Swapping in Word Units" "Disabled,Enabled" bitfld.long 0x0C 0. " P_BTS ,Picture Plane Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x10 "VI6_RPF3_LOC,RPF3 Display Location Register" hexmask.long.word 0x10 16.--28. 1. " HCOORD ,Horizontal Coordinate of Sublayer Display Location on Master Layer" hexmask.long.word 0x10 0.--12. 1. " VCOORD ,Vertical Coordinate of Sublayer Display Location on Master Layer" textline " " line.long 0x14 "VI6_RPF3_ALPH_SEL,RPF3 Alpha Plane Selection Control Register" bitfld.long 0x14 28.--30. " ASEL ,Alpha Format and Processing Method Select" "1/4/8 bit packed alpha + plane alpha,8-bit plane alpha,1-bit packed alpha + plane alpha,1-bit plane alpha,Fixed alpha,?..." bitfld.long 0x14 24.--27. " IROP ,IROP Operation Setting" "NOP,AND,AND_REVERSE,COPY,AND_INVERTED,CLEAR,XOR,OR,NOR,EQUIV,INVERT,OR_REVERSE,COPY_INVERTED,OR_INVERTED,NAND,SET" bitfld.long 0x14 23. " BSEL ,Alpha Bit Count Conversion Selection for 1-Bit Mask Generator" "8bit converted to 1 bit through 1 bit mask,Through 1 bit mask" textline " " bitfld.long 0x14 18.--19. " AEXT ,Lower-Bit Alpha Value Extension Method Set" "L-o bits ext. with 0,U-o bits copied to l-o bits,L-o bits ext. with 0,?..." hexmask.long.byte 0x14 8.--15. 1. " ALPHA0 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 0" hexmask.long.byte 0x14 0.--7. 1. " ALPHA1 ,8-Bit Alpha Value Output when 1-Bit Alpha Value is 1" textline " " line.long 0x18 "VI6_RPF3_VRTCOL_SET,RPF3 Virtual Plane Color Information Register" hexmask.long.byte 0x18 24.--31. 1. " LAYA ,Virtual-Input Fixed Alpha Value" hexmask.long.byte 0x18 16.--23. 1. " LAYR ,Virtual-Input Fixed R/Cr Component Value" hexmask.long.byte 0x18 8.--15. 1. " LAYG ,Virtual-Input Fixed G/Y Component Value" textline " " hexmask.long.byte 0x18 0.--7. 1. " LAYB ,Virtual-Input Fixed B/Cb Component Value" line.long 0x1C "VI6_RPF3_MSKCTRL,RPF3 Mask Control Register" bitfld.long 0x1C 24. " MSK_EN ,Mask Generation Specification" "Mask generation,Compare" hexmask.long.byte 0x1C 16.--23. 1. " MGR ,R/Cr Comparison Value for 1-Bit Alpha Generation" hexmask.long.byte 0x1C 8.--15. 1. " MGG ,G/Y Comparison Value for 1-Bit Alpha Generation" textline " " hexmask.long.byte 0x1C 0.--7. 1. " MGB ,B/Cb Comparison Value for 1-Bit Alpha Generation" line.long 0x20 "VI6_RPF3_MSKSET0,RPF3 IROP-SRC Input Value Register 0" hexmask.long.byte 0x20 24.--31. 1. " MSA0 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 16.--23. 1. " MSR0 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 0" hexmask.long.byte 0x20 8.--15. 1. " MSG0 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 0 " textline " " hexmask.long.byte 0x20 0.--7. 1. " MSB0 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 0" line.long 0x24 "VI6_RPF3_MSKSET1,RPF3 IROP-SRC Input Value Register 1" hexmask.long.byte 0x24 24.--31. 1. " MSA1 ,IROP-Source Input Alpha Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 16.--23. 1. " MSR1 ,IROP-Source Input R/Cr Value when 1-Bit Alpha is 1" hexmask.long.byte 0x24 8.--15. 1. " MSG1 ,IROP-Source Input G/Y Value when 1-Bit Alpha is 1" textline " " hexmask.long.byte 0x24 0.--7. 1. " MSB1 ,IROP-Source Input B/Cb Value when 1-Bit Alpha is 1" line.long 0x28 "VI6_RPF3_CKEY_CTRL,RPF3 Color Keying Control Register" bitfld.long 0x28 4. " CV ,Color Replacement Control" "Disabled,Enabled" bitfld.long 0x28 1. " SAPE1 ,Comparison Color Data Setting 1 Enable/Disable" "Disabled,Enabled" bitfld.long 0x28 0. " SAPE0 ,Comparison Color Data Setting 0 Enable/Disable" "Disabled,Enabled" line.long 0x2C "VI6_RPF3_CKEY_SET0,RPF3 Color Keying Color Setting Register 0" hexmask.long.byte 0x2C 24.--31. 1. " AP0 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x2C 16.--23. 1. " R0 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x2C 8.--15. 1. " GY0 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x2C 0.--7. 1. " B0 ,B/Cb Component Data in Color Keying Color Information" line.long 0x30 "VI6_RPF3_CKEY_SET1,RPF3 Color Keying Color Setting Register 1" hexmask.long.byte 0x30 24.--31. 1. " AP1 ,Alpha Data in Color Keying Color Information" hexmask.long.byte 0x30 16.--23. 1. " R1 ,R/Cr Component Data in Color Keying Color Information" hexmask.long.byte 0x30 8.--15. 1. " GY1 ,G/Y Component Data in Color Keying Color Information" textline " " hexmask.long.byte 0x30 0.--7. 1. " B1 ,B/Cb Component Data in Color Keying Color Information" textline " " line.long 0x34 "VI6_RPF3_SRCM_PSTRIDE,RPF3 Source Picture Memory StrideSetting Register" hexmask.long.word 0x34 16.--31. 1. " PICT_STRD_Y ,Memory Stride of Source Picture Y/RGB Plane" hexmask.long.word 0x34 0.--15. 1. " PICT_STRD_C ,Memory Stride of Source Picture C Plane" line.long 0x38 "VI6_RPF3_SRCM_ASTRIDE,RPF3 Source Alpha Memory Stride Setting Register" hexmask.long.word 0x38 0.--15. 1. " ALPH_STRD ,Memory Stride of Source Alpha Plane" textline " " line.long 0x3C "VI6_RPF3_SRCM_ADDR_Y,RPF3 Source Y/RGB Address Register" line.long 0x40 "VI6_RPF3_SRCM_ADDR_C0,RPF3 Source Chroma Address Registers 0" line.long 0x44 "VI6_RPF3_SRCM_ADDR_C1,RPF3 Source Chroma Address Registers 1" line.long 0x48 "VI6_RPF3_SRCM_ADDR_AI,RPF3 Source Alpha Address Register" tree.end width 24. tree "WPF Control Registers" group.long 0x1000++0xB line.long 0x00 "VI6_WPF0_SRCRPF,WPF0-Source-RPF Register" bitfld.long 0x00 28.--29. " VIR_ACT ,Virtual RPF Start Enable in BRU" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 8.--9. " RPF4_ACT ,RPF4 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 6.--7. " RPF3_ACT ,RPF3 Start Enable" "Not started,Sublayer source,Master-layer source,?..." textline " " bitfld.long 0x00 4.--5. " RPF2_ACT ,RPF2 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 2.--3. " RPF1_ACT ,RPF1 Start Enable" "Not started,Sublayer source,Master-layer source,?..." bitfld.long 0x00 0.--1. " RPF0_ACT ,RPF0 Start Enable" "Not started,Sublayer source,Master-layer source,?..." line.long 0x04 "VI6_WPF0_HSZCLIP,WPF0 Horizontal Input Size Clipping Register" bitfld.long 0x04 28. " HCEN ,Horizontal Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x04 16.--23. 1. " HCL_OFST ,Horizontal Size Clipping Offset Value Setting" hexmask.long.word 0x04 0.--12. 1. " HCL_SIZE ,Horizontal Clipping Size Setting" line.long 0x08 "VI6_WPF0_VSZCLIP,WPF0 Vertical Input Size Clipping Register" bitfld.long 0x08 28. " VCEN ,Vertical Size Clipping Enable/Disable" "Disabled,Enabled" hexmask.long.byte 0x08 16.--23. 1. " VCL_OFST ,Vertical Size Clipping Offset Value Setting" hexmask.long.word 0x08 0.--12. 1. " VCL_SIZE ,Vertical Size Clipping Offset Value Setting" group.long (0x1000+0x0C)++0x3 line.long 0x00 "VI6_WPF0_OUTFMT,WPF0 Output Format Register" hexmask.long.byte 0x00 24.--31. 1. " PDV ,PAD Value in Output Packed Data" bitfld.long 0x00 23. " PXA ,PAD Data Select" "Value from PDV,Alpha value" bitfld.long 0x00 16. " FLP ,Vertical flipping Select" "Not flipped,Flipped" textline " " bitfld.long 0x00 15. " SPYCS ,WPF Output Mode Setting 1" "0,1" bitfld.long 0x00 14. " SPUVS ,WPF Output Mode Setting 2" "0,1" bitfld.long 0x00 12.--13. " DITH ,Dithering Enable/Disable" "Disabled,,Enabled,?..." bitfld.long 0x00 9.--11. " WRTM ,CSC Conversion Expression Setting" "BT.601 YCbCr [16.235/240]<->RGB [0.255],BT.601 YCbCr [0.255]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [0.255],BT.709 YCbCr [16.235/240]<->RGB [16.235],?..." textline " " bitfld.long 0x00 8. " CSC ,Color Space Conversion Setting" "Not converted,Converted" hexmask.long.byte 0x00 0.--6. 1. " WRFMT ,WPF Output Image Format Setting" group.long (0x1000+0x10)++0x7 line.long 0x00 "VI6_WPF0_DSWAP,WPF0 Data Swapping Register" bitfld.long 0x00 3. " P_LLS ,WPF Output Data Swapping in LONG LWORD Units" "Disabled,Enabled" bitfld.long 0x00 2. " P_LWS ,WPF Output Data Swapping in Longword Units" "Disabled,Enabled" bitfld.long 0x00 1. " P_WDS ,WPF Output Data Swapping in Word Units" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " P_BTS ,WPF Output Data Swapping in Byte Units" "Disabled,Enabled" line.long 0x04 "VI6_WPF0_RNDCTRL,WPF0 Rounding Control Register" bitfld.long 0x04 28. " CBRM ,Bit Count Reduction MethodSelection for Data Storage in Packed RGB" "Truncated,Rounded" bitfld.long 0x04 24.--25. " ABRM ,Bit Count Reduction Method Selection for Data Storage in PAD" "Truncated,Rounded,Compared,?..." hexmask.long.byte 0x04 16.--23. 1. " ATHRESH ,Threshold for Conversion to 1-Bit Alpha Data" textline " " bitfld.long 0x04 12.--13. " CLMD ,Color Data Clipping" "Not clipped,YCbCr mode 1,YCbCr mode 2,?..." group.long (0x1000+0x1C)++0x13 line.long 0x00 "VI6_WPF0_DSTM_STRIDE_Y,WPF0 Destination Y Plane Memory Stride Register" hexmask.long.word 0x00 0.--15. 1. " PICT_STRD_Y ,Memory Stride of Destination Picture Y/RGB Plane" line.long 0x04 "VI6_WPF0_DSTM_STRIDE_C,WPF0 Destination C Plane Memory Stride Register" hexmask.long.word 0x04 0.--15. 1. " PICT_STRD_C ,Memory Stride of Destination Picture C Plane" line.long 0x08 "VI6_WPF0_DSTM_ADDR_Y,WPF0 Destination Y/RGB Address Register" line.long 0x0C "VI6_WPF0_DSTM_ADDR_C0,WPF0 Destination Chroma Address Register 0" line.long 0x10 "VI6_WPF0_DSTM_ADDR_C1,WPF0 Destination Chroma Address Register 1" if (((per.l(ad:0xFE930000+0x3B00))&0x1)==0x1) group.long 0x1034++0x3 line.long 0x00 "VI6_WPF0_WRBCK_CTRL,WPF0 LIF Write Back Control Register" bitfld.long 0x00 1. " WBMD1 ,Display Data Write Back Control 1" "Disabled,Enabled" bitfld.long 0x00 0. " WBMD0 ,Display Data Write Back Control 0" "Disabled,Enabled" endif tree.end width 21. tree "DPR Control Registers" group.long 0x2000++0x23 line.long 0x0 "VI6_DPR_RPF0_ROUTE,RPF0 Routing Register" bitfld.long 0x0 0.--5. " RT_RPF0 ,RPF0 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x4 "VI6_DPR_RPF1_ROUTE,RPF1 Routing Register" bitfld.long 0x4 0.--5. " RT_RPF1 ,RPF1 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x8 "VI6_DPR_RPF2_ROUTE,RPF2 Routing Register" bitfld.long 0x8 0.--5. " RT_RPF2 ,RPF2 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0xC "VI6_DPR_RPF3_ROUTE,RPF3 Routing Register" bitfld.long 0xC 0.--5. " RT_RPF3 ,RPF3 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x14 "VI6_DPR_WPF0_FPORCH,WPF0 Timing Control Register" bitfld.long 0x14 8.--13. " FP_WPF0 ,WPF0 Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " group.long 0x2028++0x3 line.long 0x00 "VI6_DPR_UDS0_ROUTE,UDS0 Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for UDS0" textline " " bitfld.long 0x00 8.--13. " FP ,UDS0 Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,UDS0 Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2044++0x3 line.long 0x00 "VI6_DPR_HST_ROUTE,HST Routing Register" bitfld.long 0x00 8.--13. " FP ,HST Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HST Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2048++0x3 line.long 0x00 "VI6_DPR_HSI_ROUTE,HSI Routing Register" bitfld.long 0x00 8.--13. " FP ,HSI Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,HSI Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x204C++0x3 line.long 0x00 "VI6_DPR_BRU_ROUTE,BRU Routing Register" hexmask.long.byte 0x00 16.--23. 1. " FXA ,Fixed Alpha Output Value for BRU" textline " " bitfld.long 0x00 8.--13. " FP ,BRU Internal Operation Timing Setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " RT ,BRU Target Node Value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x2054++0x7 line.long 0x00 "VI6_DPR_HGO_SMPPT,HGO Sampling Point Register" bitfld.long 0x00 8.--10. " TGW ,Target WPF Index for HGO" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--5. " PT ,Target Node Index for HGO Histogram Sampling" "RPF0,RPF1,RPF2,RPF3,RPF4,,,,,,,,,,,,SRU,UDS0,UDS1,UDS2,,,LUT,,,,,BRU,,CLU,HST,HSI,,,,,,,,,,,,,,,,,,,,,,,,LIF,?..." tree.end width 22. tree "UDS Control Registers" if (((per.l(ad:0xFE930000+0x2300))&0x100000)==0x000000) group.long 0x2300++0x3 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest Neighbor Interpolation Characteristic Control" "Disabled,Enabled" bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disable" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbor,Multi tap" bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest neighbor" bitfld.long 0x00 18. " NE_RCR ,R/Cr Interpolation Method When Bilinear/Nearest Neighbor Interpolation is Selected" "Bilinear,Nearest neighbor" textline " " bitfld.long 0x00 17. " NE_GY ,G/Y Interpolation Method When Bilinear/Nearest Neighbor Interpolation is Selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 16. " NE_BCB ,B/Cb Interpolation Method When Bilinear/Nearest Neighbor Interpolation is Selected" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function Enable/Disable Select" "Disabled,Enabled" else group.long 0x2300++0x3 "UDS 0 Registers" line.long 0x00 "VI6_UDS0_CTRL,Scaling Control Register 0" bitfld.long 0x00 30. " AMD ,Pixel Count at Scale-Up" "1 + ((n -1) *scale-up factor),(n * scale-up factor)" bitfld.long 0x00 29. " FMD ,Padding for Insufficient Clipping Size" "Copying pixels,VI6_UDS0_FILL_COLOR" bitfld.long 0x00 28. " BLADV ,Bilinear or Nearest NeighborInterpolation Characteristic Control" "Not improved,Improved" bitfld.long 0x00 25. " AON ,Scale-Up/Down of Alpha Plane" "Not performed,Performed" textline " " bitfld.long 0x00 24. " ATHON ,Alpha Output Data Threshold Comparison Enable/Disabl" "Disabled,Enabled" bitfld.long 0x00 20. " BC ,Pixel Component Interpolation Method at Scale-Up/Down" "Bilinear/Nearest neighbor,Multi tap" bitfld.long 0x00 19. " NE_A ,Alpha Interpolation Method" "Bilinear,Nearest neighbor" bitfld.long 0x00 1. " TDIPC ,2D-IPC function Enable/Disable Select" "Disabled,Enabled" endif textline " " group.long (0x2300+0x04)++0xF line.long 0x00 "VI6_UDS0_SCALE,Scaling Factor Register 0" bitfld.long 0x00 28.--31. " HMANT ,Multiplier (Integral Part) of Horizontal Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" hexmask.long.word 0x00 16.--27. 1. " HFRAC ,Multiplier (Fractional Part) of Horizontal Scaling Factor" bitfld.long 0x00 12.--15. " VMANT ,Multiplier (Integral Part) of Vertical Scaling Factor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " hexmask.long.word 0x00 0.--11. 1. " VFRAC ,Multiplier (Fractional Part) of Vertical Scaling Factor" line.long 0x04 "VI6_UDS0_ALPTH,Alpha Data Threshold Setting Register 0" hexmask.long.byte 0x04 8.--15. 1. " ALPH_TH1 ,Alpha Data Threshold Setting 1" hexmask.long.byte 0x04 0.--7. 1. " ALPH_TH0 ,Alpha Data Threshold Setting 0" line.long 0x08 "VI6_UDS0_ALPVAL,Alpha Data Replacing Value Setting Register 0" hexmask.long.byte 0x08 16.--23. 1. " ALPH_VAL2 ,Replacing Alpha Value Setting 2" hexmask.long.byte 0x08 8.--15. 1. " ALPH_VAL1 ,Replacing Alpha Value Setting 1" hexmask.long.byte 0x08 0.--7. 1. " ALPH_VAL0 ,Replacing Alpha Value Setting 0" line.long 0x0C "VI6_UDS0_PASS_BWIDTH,Passband Register 0" hexmask.long.byte 0x0C 16.--22. 1. " BWIDTH_H ,Horizontal Signal Passband at Image Scale-Up/Down" hexmask.long.byte 0x0C 0.--6. 1. " BWIDTH_V ,Vertical Signal Passband at Image Scale-Up/Down" group.long (0x2300+0x18)++0x3 line.long 0x00 "VI6_UDS0_IPC,2D IPC Setting Register 0" bitfld.long 0x00 27. " FIELD ,Top/Bottom Field Select" "Top,Bottom" hexmask.long.word 0x00 0.--11. 1. " VEDP ,VEDP" group.long (0x2300+0x24)++0x7 line.long 0x00 "VI6_UDS0_CLIP_SIZE,UDS Output Size Clipping Register 0" hexmask.long.word 0x00 16.--28. 1. " CL_HSIZE ,Clipping Size of Horizontal Pixel Count after Scale-Up/-Down" hexmask.long.word 0x00 0.--12. 1. " CL_VSIZE ,Clipping Size of Vertical Pixel Count after Scale-Up/-Down" line.long 0x04 "VI6_UDS0_FILL_COLOR,Color Fill Register" hexmask.long.byte 0x04 16.--23. 1. " RFILC ,R/Cr Component of Fill Color" hexmask.long.byte 0x04 8.--15. 1. " GFILC ,G/Y Component of Fill Color" hexmask.long.byte 0x04 0.--7. 1. " BFILC ,B/Cb Component of Fill Color" tree.end width 14. tree "LUT Control Register" group.long 0x2800++0x3 line.long 0x00 "VI6_LUT_CTRL,LUT Control Register" bitfld.long 0x00 0. " LUT_EN ,1D-LUT Enable/Disable" "Disabled,Enabled" tree.end width 14. tree "CLU Control Register" group.long 0x2900++0x3 line.long 0x00 "VI6_CLU_CTRL,CLU Control Register" bitfld.long 0x00 28. " AAI ,Automatic Table Address Increment" "Disabled,Enabled" bitfld.long 0x00 14.--15. " AX1I ,Input Control 0 in 2D Mode" "0,1,2,3" bitfld.long 0x00 12.--13. " AX2I ,Input Control 1 in 2D Mode" "0,1,2,3" textline " " bitfld.long 0x00 8.--9. " OS0 ,Output Control 0 in 2D Mode" "0,1,2,3" bitfld.long 0x00 6.--7. " OS1 ,Output Control 1 in 2D Mode" "0,1,2,3" bitfld.long 0x00 4.--5. " OS2 ,Output Control 2 in 2D Mode" "0,1,2,3" textline " " bitfld.long 0x00 1. " M2D ,LUT Dimension Number" "3D,2D" bitfld.long 0x00 0. " CLU_EN ,CLU Processing Enable/Disable" "Disabled,Enabled" tree.end width 14. tree "HST Control Register" group.long 0x2A00++0x3 line.long 0x00 "VI6_HST_CTRL,HST Control Register" bitfld.long 0x00 0. " HST_EN ,HSV Conversion Enable/Disable" "Disabled,Enabled" tree.end width 14. tree "HSI Control Register" group.long 0x2B00++0x3 line.long 0x00 "VI6_HSI_CTRL,HSI Control Register" bitfld.long 0x00 0. " HSI_EN ,Reversed HSV Conversion Enable/Disable" "Disabled,Enabled" tree.end width 21. tree "BRU Control Registers" group.long 0x2C00++0x33 line.long 0x00 "VI6_BRU_INCTRL,BRU Input Control Register" bitfld.long 0x00 28. " NRM ,Color Data Normalization" "Not divided,Divided" bitfld.long 0x00 19. " D3ON ,Dithering Enable of BRU Input 3" "Disabled,Enabled" bitfld.long 0x00 18. " D2ON ,Dithering Enable of BRU Input 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " D1ON ,Dithering Enable of BRU Input 1" "Disabled,Enabled" bitfld.long 0x00 16. " D0ON ,Dithering Enable of BRU Input 0" "Disabled,Enabled" bitfld.long 0x00 12.--14. " DITH3 ,Dithering of CH3 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." textline " " bitfld.long 0x00 8.--10. " DITH2 ,Dithering of CH2 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 4.--6. " DITH1 ,Dithering of CH1 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." bitfld.long 0x00 0.--2. " DITH0 ,Dithering of CH0 Input to BRU" "Disabled,18 bpp,16 bpp,15 bpp,12 bpp,8 bpp,?..." line.long 0x04 "VI6_BRU_VIRRPF_SIZE,Size Register of BRU Input Virtual RPF" hexmask.long.word 0x04 16.--28. 1. " VIR_HSIZE ,Virtual RPF Horizontal Size" hexmask.long.word 0x04 0.--12. 1. " VIR_VSIZE ,Virtual RPF Vertical Size" line.long 0x08 "VI6_BRU_VIRRPF_LOC,Display Location Register of BRU Input Virtual RPF" hexmask.long.word 0x08 16.--28. 1. " HCOORD ,Horizontal Coordinate of Virtual RPF Location on Master Layer" hexmask.long.word 0x08 0.--12. 1. " VCOORD ,Vertical Coordinate of Virtual RPF Location on Master Layer" line.long 0x0C "VI6_BRU_VIRRPF_COL,Color Information Register of BRU Input Virtual RPF" hexmask.long.byte 0x0C 24.--31. 1. " COL_A ,Fixed Alpha of Virtual RPF" hexmask.long.byte 0x0C 16.--23. 1. " COL_RCR ,Fixed R/Cr of Virtual RPF" hexmask.long.byte 0x0C 8.--15. 1. " COL_GY ,Fixed G/Y of Virtual RPF" textline " " hexmask.long.byte 0x0C 0.--7. 1. " COL_BCB ,Fixed B/Cb of Virtual RPF" line.long 0x10 "VI6_BRUA_CTRL,BRU Control Register A" bitfld.long 0x10 31. " RBC ,Operation Type of Blending/ROP Unit A" "ROP,Blending" bitfld.long 0x10 20.--22. " DSTSEL ,Input Selection for DST Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x10 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit A" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." textline " " bitfld.long 0x10 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x10 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x14 "VI6_BRUA_BLD,BRU Blend Control Register A" bitfld.long 0x14 31. " CBES ,Blending Expression Selection" "0,1" bitfld.long 0x14 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x14 23. " ABES ,Blending Alpha Creation Expression" "0,1" bitfld.long 0x14 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x14 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x14 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x14 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x18 "VI6_BRUB_CTRL,BRU Control Register B" bitfld.long 0x18 31. " RBC ,Operation Type of Blending/ROP Unit B" "ROP,Blending" bitfld.long 0x18 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x18 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x1C "VI6_BRUB_BLD,BRU Blend Control Register B" bitfld.long 0x1C 31. " CBES ,Blending Expression Selection" "0,1" bitfld.long 0x1C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x1C 23. " ABES ,Blending Alpha Creation Expression" "0,1" bitfld.long 0x1C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x1C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x1C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x1C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x20 "VI6_BRUC_CTRL,BRU Control Register C" bitfld.long 0x20 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x20 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x20 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x20 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x24 "VI6_BRUC_BLD,BRU Blend Control Register C" bitfld.long 0x24 31. " CBES ,Blending Expression Selection" "0,1" bitfld.long 0x24 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x24 23. " ABES ,Blending Alpha Creation Expression" "0,1" bitfld.long 0x24 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x24 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x24 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x24 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x28 "VI6_BRUD_CTRL,BRU Control Register D" bitfld.long 0x28 31. " RBC ,Operation Type of Blending/ROP Unit C" "ROP,Blending" bitfld.long 0x28 16.--18. " SRCSEL ,Input Selection for SRC Side of Blending/ROP Unit C" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x28 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.long 0x28 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x2C "VI6_BRUD_BLD,BRU Blend Control Register D" bitfld.long 0x2C 31. " CBES ,Blending Expression Selection" "0,1" bitfld.long 0x2C 28.--30. " CCMDX ,Blending Coefficient X Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 24.--26. " CCMDY ,Blending Coefficient Y Selection" "DST Alpha,255 -(DST Alpha data),SRC Alpha,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " bitfld.long 0x2C 23. " ABES ,Blending Alpha Creation Expression" "0,1" bitfld.long 0x2C 20.--22. " ACMDX ,Alpha Creation Coefficient X" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 0,?..." bitfld.long 0x2C 16.--18. " ACMDY ,Alpha Creation Coefficient Y" "DST Alpha data,255 -(DST Alpha data),SRC Alpha data,255 -(SRC Alpha data),Fixed Alpha value 1,?..." textline " " hexmask.long.byte 0x2C 8.--15. 1. " COEFX ,Fixed Alpha Value 0" hexmask.long.byte 0x2C 0.--7. 1. " COEFY ,Fixed Alpha Value 1" line.long 0x30 "VI6_BRU_ROP,BRU Raster Operation Control Register" bitfld.long 0x30 20.--22. " DSTSEL ,Input Selection for DST Side of ROP Unit" "BRU 0,BRU 1,BRU 2,BRU 3,Virtual RPF,?..." bitfld.long 0x30 4.--7. " CROP ,Color Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x30 0.--3. " AROP ,Alpha Data ROP Operator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" tree.end width 20. tree "HGO Control Registers" group.long 0x3000++0x2F line.long 0x00 "VI6_HGO_OFFSET,HGO Detection Window Offset Register" hexmask.long.word 0x00 16.--29. 1. " HOFFSET ,Horizontal Offset of Histogram Detection Window" hexmask.long.word 0x00 0.--13. 1. " VOFFSET ,Horizontal Offset of Histogram Detection Window" line.long 0x04 "VI6_HGO_SIZE,HGO Detection Window Size Register" hexmask.long.word 0x04 16.--29. 1. " HSIZE ,Horizontal Size of Histogram Detection Window" hexmask.long.word 0x04 0.--13. 1. " VSIZE ,Vertical Size of Histogram Detection Window" line.long 0x08 "VI6_HGO_MODE,HGO Mode Register" bitfld.long 0x08 7. " MAXRGB ,Histogram Source Component Setting" "Disabled,Enabled" bitfld.long 0x08 6. " OFSB_R ,Offset Binary Mode for R/Cr/H Component" "Straight,Offset" bitfld.long 0x08 5. " OFSB_G ,Offset Binary Mode for G/Y/S/max(RGB) Component" "Straight,Offset" textline " " bitfld.long 0x08 4. " OFSB_B ,Offset Binary Mode for B/Cb/V Component" "Straight,Offset" bitfld.long 0x08 2.--3. " HRATIO ,Horizontal Pixel Skipping Mode for Histogram Detection" "Disabled,1/2,1/4,?..." bitfld.long 0x08 0.--1. " VRATIO ,Vertical Pixel Skipping Mode for Histogram Detection" "Disabled,1/2,1/4,?..." line.long 0x0C "VI6_HGO_LB_TH,HGO LB Detection Threshold Register" hexmask.long.byte 0x0C 0.--7. 1. " BLACK_TH ,Threshold for Black Level Determination in Letter Box Detection" line.long 0x10 "VI6_HGO_LB0_H,HGO Horizontal PositionRegister for LB Detection Zone-0" hexmask.long.word 0x10 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-0" hexmask.long.word 0x10 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-0" line.long 0x14 "VI6_HGO_LB0_V,HGO Vertical Position Register for LB Detection Zone-0" hexmask.long.word 0x14 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-0" hexmask.long.word 0x14 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-0" line.long 0x18 "VI6_HGO_LB1_H,HGO Horizontal PositionRegister for LB Detection Zone-1" hexmask.long.word 0x18 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-1" hexmask.long.word 0x18 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-1" line.long 0x1C "VI6_HGO_LB1_V,HGO Vertical Position Register for LB Detection Zone-1" hexmask.long.word 0x1C 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-1" hexmask.long.word 0x1C 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-1" line.long 0x20 "VI6_HGO_LB2_H,HGO Horizontal PositionRegister for LB Detection Zone-2" hexmask.long.word 0x20 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-2" hexmask.long.word 0x20 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-2" line.long 0x24 "VI6_HGO_LB2_V,HGO Vertical Position Register for LB Detection Zone-2" hexmask.long.word 0x24 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-2" hexmask.long.word 0x24 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-2" line.long 0x28 "VI6_HGO_LB3_H,HGO Horizontal PositionRegister for LB Detection Zone-3" hexmask.long.word 0x28 16.--29. 1. " HPOS0 ,Horizontal Start Position for Letter Box Detection Zone-3" hexmask.long.word 0x28 0.--13. 1. " HPOS1 ,Horizontal End Position for Letter Box Detection Zone-3" line.long 0x2C "VI6_HGO_LB3_V,HGO Vertical Position Register for LB Detection Zone-3" hexmask.long.word 0x2C 16.--29. 1. " VPOS0 ,Vertical Start Position for Letter Box Detection Zone-3" hexmask.long.word 0x2C 0.--13. 1. " VPOS1 ,Vertical End Position for Letter Box Detection Zone-3" rgroup.long 0x3030++0x32B line.long 0x0 "VI6_HGO_R_HISTO_0 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x0 0.--21. 1. " HISTOGRAM_0 ,Frequency of Component-R in the value range-0 " line.long 0x4 "VI6_HGO_R_HISTO_1 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x4 0.--21. 1. " HISTOGRAM_1 ,Frequency of Component-R in the value range-1 " line.long 0x8 "VI6_HGO_R_HISTO_2 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x8 0.--21. 1. " HISTOGRAM_2 ,Frequency of Component-R in the value range-2 " line.long 0xC "VI6_HGO_R_HISTO_3 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0xC 0.--21. 1. " HISTOGRAM_3 ,Frequency of Component-R in the value range-3 " line.long 0x10 "VI6_HGO_R_HISTO_4 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x10 0.--21. 1. " HISTOGRAM_4 ,Frequency of Component-R in the value range-4 " line.long 0x14 "VI6_HGO_R_HISTO_5 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x14 0.--21. 1. " HISTOGRAM_5 ,Frequency of Component-R in the value range-5 " line.long 0x18 "VI6_HGO_R_HISTO_6 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x18 0.--21. 1. " HISTOGRAM_6 ,Frequency of Component-R in the value range-6 " line.long 0x1C "VI6_HGO_R_HISTO_7 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x1C 0.--21. 1. " HISTOGRAM_7 ,Frequency of Component-R in the value range-7 " line.long 0x20 "VI6_HGO_R_HISTO_8 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x20 0.--21. 1. " HISTOGRAM_8 ,Frequency of Component-R in the value range-8 " line.long 0x24 "VI6_HGO_R_HISTO_9 ,HGO Component-R Histogram Register" hexmask.long.tbyte 0x24 0.--21. 1. " HISTOGRAM_9 ,Frequency of Component-R in the value range-9 " line.long 0x28 "VI6_HGO_R_HISTO_10,HGO Component-R Histogram Register" hexmask.long.tbyte 0x28 0.--21. 1. " HISTOGRAM_10 ,Frequency of Component-R in the value range-10" line.long 0x2C "VI6_HGO_R_HISTO_11,HGO Component-R Histogram Register" hexmask.long.tbyte 0x2C 0.--21. 1. " HISTOGRAM_11 ,Frequency of Component-R in the value range-11" line.long 0x30 "VI6_HGO_R_HISTO_12,HGO Component-R Histogram Register" hexmask.long.tbyte 0x30 0.--21. 1. " HISTOGRAM_12 ,Frequency of Component-R in the value range-12" line.long 0x34 "VI6_HGO_R_HISTO_13,HGO Component-R Histogram Register" hexmask.long.tbyte 0x34 0.--21. 1. " HISTOGRAM_13 ,Frequency of Component-R in the value range-13" line.long 0x38 "VI6_HGO_R_HISTO_14,HGO Component-R Histogram Register" hexmask.long.tbyte 0x38 0.--21. 1. " HISTOGRAM_14 ,Frequency of Component-R in the value range-14" line.long 0x3C "VI6_HGO_R_HISTO_15,HGO Component-R Histogram Register" hexmask.long.tbyte 0x3C 0.--21. 1. " HISTOGRAM_15 ,Frequency of Component-R in the value range-15" line.long 0x40 "VI6_HGO_R_HISTO_16,HGO Component-R Histogram Register" hexmask.long.tbyte 0x40 0.--21. 1. " HISTOGRAM_16 ,Frequency of Component-R in the value range-16" line.long 0x44 "VI6_HGO_R_HISTO_17,HGO Component-R Histogram Register" hexmask.long.tbyte 0x44 0.--21. 1. " HISTOGRAM_17 ,Frequency of Component-R in the value range-17" line.long 0x48 "VI6_HGO_R_HISTO_18,HGO Component-R Histogram Register" hexmask.long.tbyte 0x48 0.--21. 1. " HISTOGRAM_18 ,Frequency of Component-R in the value range-18" line.long 0x4C "VI6_HGO_R_HISTO_19,HGO Component-R Histogram Register" hexmask.long.tbyte 0x4C 0.--21. 1. " HISTOGRAM_19 ,Frequency of Component-R in the value range-19" line.long 0x50 "VI6_HGO_R_HISTO_20,HGO Component-R Histogram Register" hexmask.long.tbyte 0x50 0.--21. 1. " HISTOGRAM_20 ,Frequency of Component-R in the value range-20" line.long 0x54 "VI6_HGO_R_HISTO_21,HGO Component-R Histogram Register" hexmask.long.tbyte 0x54 0.--21. 1. " HISTOGRAM_21 ,Frequency of Component-R in the value range-21" line.long 0x58 "VI6_HGO_R_HISTO_22,HGO Component-R Histogram Register" hexmask.long.tbyte 0x58 0.--21. 1. " HISTOGRAM_22 ,Frequency of Component-R in the value range-22" line.long 0x5C "VI6_HGO_R_HISTO_23,HGO Component-R Histogram Register" hexmask.long.tbyte 0x5C 0.--21. 1. " HISTOGRAM_23 ,Frequency of Component-R in the value range-23" line.long 0x60 "VI6_HGO_R_HISTO_24,HGO Component-R Histogram Register" hexmask.long.tbyte 0x60 0.--21. 1. " HISTOGRAM_24 ,Frequency of Component-R in the value range-24" line.long 0x64 "VI6_HGO_R_HISTO_25,HGO Component-R Histogram Register" hexmask.long.tbyte 0x64 0.--21. 1. " HISTOGRAM_25 ,Frequency of Component-R in the value range-25" line.long 0x68 "VI6_HGO_R_HISTO_26,HGO Component-R Histogram Register" hexmask.long.tbyte 0x68 0.--21. 1. " HISTOGRAM_26 ,Frequency of Component-R in the value range-26" line.long 0x6C "VI6_HGO_R_HISTO_27,HGO Component-R Histogram Register" hexmask.long.tbyte 0x6C 0.--21. 1. " HISTOGRAM_27 ,Frequency of Component-R in the value range-27" line.long 0x70 "VI6_HGO_R_HISTO_28,HGO Component-R Histogram Register" hexmask.long.tbyte 0x70 0.--21. 1. " HISTOGRAM_28 ,Frequency of Component-R in the value range-28" line.long 0x74 "VI6_HGO_R_HISTO_29,HGO Component-R Histogram Register" hexmask.long.tbyte 0x74 0.--21. 1. " HISTOGRAM_29 ,Frequency of Component-R in the value range-29" line.long 0x78 "VI6_HGO_R_HISTO_30,HGO Component-R Histogram Register" hexmask.long.tbyte 0x78 0.--21. 1. " HISTOGRAM_30 ,Frequency of Component-R in the value range-30" line.long 0x7C "VI6_HGO_R_HISTO_31,HGO Component-R Histogram Register" hexmask.long.tbyte 0x7C 0.--21. 1. " HISTOGRAM_31 ,Frequency of Component-R in the value range-31" line.long 0x80 "VI6_HGO_R_HISTO_32,HGO Component-R Histogram Register" hexmask.long.tbyte 0x80 0.--21. 1. " HISTOGRAM_32 ,Frequency of Component-R in the value range-32" line.long 0x84 "VI6_HGO_R_HISTO_33,HGO Component-R Histogram Register" hexmask.long.tbyte 0x84 0.--21. 1. " HISTOGRAM_33 ,Frequency of Component-R in the value range-33" line.long 0x88 "VI6_HGO_R_HISTO_34,HGO Component-R Histogram Register" hexmask.long.tbyte 0x88 0.--21. 1. " HISTOGRAM_34 ,Frequency of Component-R in the value range-34" line.long 0x8C "VI6_HGO_R_HISTO_35,HGO Component-R Histogram Register" hexmask.long.tbyte 0x8C 0.--21. 1. " HISTOGRAM_35 ,Frequency of Component-R in the value range-35" line.long 0x90 "VI6_HGO_R_HISTO_36,HGO Component-R Histogram Register" hexmask.long.tbyte 0x90 0.--21. 1. " HISTOGRAM_36 ,Frequency of Component-R in the value range-36" line.long 0x94 "VI6_HGO_R_HISTO_37,HGO Component-R Histogram Register" hexmask.long.tbyte 0x94 0.--21. 1. " HISTOGRAM_37 ,Frequency of Component-R in the value range-37" line.long 0x98 "VI6_HGO_R_HISTO_38,HGO Component-R Histogram Register" hexmask.long.tbyte 0x98 0.--21. 1. " HISTOGRAM_38 ,Frequency of Component-R in the value range-38" line.long 0x9C "VI6_HGO_R_HISTO_39,HGO Component-R Histogram Register" hexmask.long.tbyte 0x9C 0.--21. 1. " HISTOGRAM_39 ,Frequency of Component-R in the value range-39" line.long 0xA0 "VI6_HGO_R_HISTO_40,HGO Component-R Histogram Register" hexmask.long.tbyte 0xA0 0.--21. 1. " HISTOGRAM_40 ,Frequency of Component-R in the value range-40" line.long 0xA4 "VI6_HGO_R_HISTO_41,HGO Component-R Histogram Register" hexmask.long.tbyte 0xA4 0.--21. 1. " HISTOGRAM_41 ,Frequency of Component-R in the value range-41" line.long 0xA8 "VI6_HGO_R_HISTO_42,HGO Component-R Histogram Register" hexmask.long.tbyte 0xA8 0.--21. 1. " HISTOGRAM_42 ,Frequency of Component-R in the value range-42" line.long 0xAC "VI6_HGO_R_HISTO_43,HGO Component-R Histogram Register" hexmask.long.tbyte 0xAC 0.--21. 1. " HISTOGRAM_43 ,Frequency of Component-R in the value range-43" line.long 0xB0 "VI6_HGO_R_HISTO_44,HGO Component-R Histogram Register" hexmask.long.tbyte 0xB0 0.--21. 1. " HISTOGRAM_44 ,Frequency of Component-R in the value range-44" line.long 0xB4 "VI6_HGO_R_HISTO_45,HGO Component-R Histogram Register" hexmask.long.tbyte 0xB4 0.--21. 1. " HISTOGRAM_45 ,Frequency of Component-R in the value range-45" line.long 0xB8 "VI6_HGO_R_HISTO_46,HGO Component-R Histogram Register" hexmask.long.tbyte 0xB8 0.--21. 1. " HISTOGRAM_46 ,Frequency of Component-R in the value range-46" line.long 0xBC "VI6_HGO_R_HISTO_47,HGO Component-R Histogram Register" hexmask.long.tbyte 0xBC 0.--21. 1. " HISTOGRAM_47 ,Frequency of Component-R in the value range-47" line.long 0xC0 "VI6_HGO_R_HISTO_48,HGO Component-R Histogram Register" hexmask.long.tbyte 0xC0 0.--21. 1. " HISTOGRAM_48 ,Frequency of Component-R in the value range-48" line.long 0xC4 "VI6_HGO_R_HISTO_49,HGO Component-R Histogram Register" hexmask.long.tbyte 0xC4 0.--21. 1. " HISTOGRAM_49 ,Frequency of Component-R in the value range-49" line.long 0xC8 "VI6_HGO_R_HISTO_50,HGO Component-R Histogram Register" hexmask.long.tbyte 0xC8 0.--21. 1. " HISTOGRAM_50 ,Frequency of Component-R in the value range-50" line.long 0xCC "VI6_HGO_R_HISTO_51,HGO Component-R Histogram Register" hexmask.long.tbyte 0xCC 0.--21. 1. " HISTOGRAM_51 ,Frequency of Component-R in the value range-51" line.long 0xD0 "VI6_HGO_R_HISTO_52,HGO Component-R Histogram Register" hexmask.long.tbyte 0xD0 0.--21. 1. " HISTOGRAM_52 ,Frequency of Component-R in the value range-52" line.long 0xD4 "VI6_HGO_R_HISTO_53,HGO Component-R Histogram Register" hexmask.long.tbyte 0xD4 0.--21. 1. " HISTOGRAM_53 ,Frequency of Component-R in the value range-53" line.long 0xD8 "VI6_HGO_R_HISTO_54,HGO Component-R Histogram Register" hexmask.long.tbyte 0xD8 0.--21. 1. " HISTOGRAM_54 ,Frequency of Component-R in the value range-54" line.long 0xDC "VI6_HGO_R_HISTO_55,HGO Component-R Histogram Register" hexmask.long.tbyte 0xDC 0.--21. 1. " HISTOGRAM_55 ,Frequency of Component-R in the value range-55" line.long 0xE0 "VI6_HGO_R_HISTO_56,HGO Component-R Histogram Register" hexmask.long.tbyte 0xE0 0.--21. 1. " HISTOGRAM_56 ,Frequency of Component-R in the value range-56" line.long 0xE4 "VI6_HGO_R_HISTO_57,HGO Component-R Histogram Register" hexmask.long.tbyte 0xE4 0.--21. 1. " HISTOGRAM_57 ,Frequency of Component-R in the value range-57" line.long 0xE8 "VI6_HGO_R_HISTO_58,HGO Component-R Histogram Register" hexmask.long.tbyte 0xE8 0.--21. 1. " HISTOGRAM_58 ,Frequency of Component-R in the value range-58" line.long 0xEC "VI6_HGO_R_HISTO_59,HGO Component-R Histogram Register" hexmask.long.tbyte 0xEC 0.--21. 1. " HISTOGRAM_59 ,Frequency of Component-R in the value range-59" line.long 0xF0 "VI6_HGO_R_HISTO_60,HGO Component-R Histogram Register" hexmask.long.tbyte 0xF0 0.--21. 1. " HISTOGRAM_60 ,Frequency of Component-R in the value range-60" line.long 0xF4 "VI6_HGO_R_HISTO_61,HGO Component-R Histogram Register" hexmask.long.tbyte 0xF4 0.--21. 1. " HISTOGRAM_61 ,Frequency of Component-R in the value range-61" line.long 0xF8 "VI6_HGO_R_HISTO_62,HGO Component-R Histogram Register" hexmask.long.tbyte 0xF8 0.--21. 1. " HISTOGRAM_62 ,Frequency of Component-R in the value range-62" line.long 0xFC "VI6_HGO_R_HISTO_63,HGO Component-R Histogram Register" hexmask.long.tbyte 0xFC 0.--21. 1. " HISTOGRAM_63 ,Frequency of Component-R in the value range-63" line.long 0x100 "VI6_HGO_R_MAXMIN,HGO Component-R Min/Max Value Register" hexmask.long.byte 0x100 16.--23. 1. " MAXVAL ,Maximum Value of Component-R" hexmask.long.byte 0x100 0.--7. 1. " MINVAL ,Minimum Value of Component-R" line.long 0x104 "VI6_HGO_R_SUM,HGO Component-R Sum Register" hexmask.long 0x104 0.--29. 1. " SUMVAL ,Sum of Component-R" line.long 0x108 "VI6_HGO_R_LB_DET,HGO Component-R LB Detection Result Register" bitfld.long 0x108 2. " LTRBOX1 ,Letter Box Detection Result 1 of Zone-0/1 for Component-R" "0,1" bitfld.long 0x108 1. " LTRBOX2 ,Letter Box Detection Result 2 of Zone-0/1 for Component-R" "0,1" bitfld.long 0x108 0. " SIDE ,Letter Box Detection Result of Zone-2/3 for Component-R" "0,1" line.long 0x110 "VI6_HGO_G_HISTO_0 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x110 0.--21. 1. " HISTOGRAM_0 ,Frequency of Component-G in the value range-0 " line.long 0x114 "VI6_HGO_G_HISTO_1 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x114 0.--21. 1. " HISTOGRAM_1 ,Frequency of Component-G in the value range-1 " line.long 0x118 "VI6_HGO_G_HISTO_2 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x118 0.--21. 1. " HISTOGRAM_2 ,Frequency of Component-G in the value range-2 " line.long 0x11C "VI6_HGO_G_HISTO_3 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x11C 0.--21. 1. " HISTOGRAM_3 ,Frequency of Component-G in the value range-3 " line.long 0x120 "VI6_HGO_G_HISTO_4 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x120 0.--21. 1. " HISTOGRAM_4 ,Frequency of Component-G in the value range-4 " line.long 0x124 "VI6_HGO_G_HISTO_5 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x124 0.--21. 1. " HISTOGRAM_5 ,Frequency of Component-G in the value range-5 " line.long 0x128 "VI6_HGO_G_HISTO_6 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x128 0.--21. 1. " HISTOGRAM_6 ,Frequency of Component-G in the value range-6 " line.long 0x12C "VI6_HGO_G_HISTO_7 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x12C 0.--21. 1. " HISTOGRAM_7 ,Frequency of Component-G in the value range-7 " line.long 0x130 "VI6_HGO_G_HISTO_8 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x130 0.--21. 1. " HISTOGRAM_8 ,Frequency of Component-G in the value range-8 " line.long 0x134 "VI6_HGO_G_HISTO_9 ,HGO Component-G Histogram Register" hexmask.long.tbyte 0x134 0.--21. 1. " HISTOGRAM_9 ,Frequency of Component-G in the value range-9 " line.long 0x138 "VI6_HGO_G_HISTO_10,HGO Component-G Histogram Register" hexmask.long.tbyte 0x138 0.--21. 1. " HISTOGRAM_10 ,Frequency of Component-G in the value range-10" line.long 0x13C "VI6_HGO_G_HISTO_11,HGO Component-G Histogram Register" hexmask.long.tbyte 0x13C 0.--21. 1. " HISTOGRAM_11 ,Frequency of Component-G in the value range-11" line.long 0x140 "VI6_HGO_G_HISTO_12,HGO Component-G Histogram Register" hexmask.long.tbyte 0x140 0.--21. 1. " HISTOGRAM_12 ,Frequency of Component-G in the value range-12" line.long 0x144 "VI6_HGO_G_HISTO_13,HGO Component-G Histogram Register" hexmask.long.tbyte 0x144 0.--21. 1. " HISTOGRAM_13 ,Frequency of Component-G in the value range-13" line.long 0x148 "VI6_HGO_G_HISTO_14,HGO Component-G Histogram Register" hexmask.long.tbyte 0x148 0.--21. 1. " HISTOGRAM_14 ,Frequency of Component-G in the value range-14" line.long 0x14C "VI6_HGO_G_HISTO_15,HGO Component-G Histogram Register" hexmask.long.tbyte 0x14C 0.--21. 1. " HISTOGRAM_15 ,Frequency of Component-G in the value range-15" line.long 0x150 "VI6_HGO_G_HISTO_16,HGO Component-G Histogram Register" hexmask.long.tbyte 0x150 0.--21. 1. " HISTOGRAM_16 ,Frequency of Component-G in the value range-16" line.long 0x154 "VI6_HGO_G_HISTO_17,HGO Component-G Histogram Register" hexmask.long.tbyte 0x154 0.--21. 1. " HISTOGRAM_17 ,Frequency of Component-G in the value range-17" line.long 0x158 "VI6_HGO_G_HISTO_18,HGO Component-G Histogram Register" hexmask.long.tbyte 0x158 0.--21. 1. " HISTOGRAM_18 ,Frequency of Component-G in the value range-18" line.long 0x15C "VI6_HGO_G_HISTO_19,HGO Component-G Histogram Register" hexmask.long.tbyte 0x15C 0.--21. 1. " HISTOGRAM_19 ,Frequency of Component-G in the value range-19" line.long 0x160 "VI6_HGO_G_HISTO_20,HGO Component-G Histogram Register" hexmask.long.tbyte 0x160 0.--21. 1. " HISTOGRAM_20 ,Frequency of Component-G in the value range-20" line.long 0x164 "VI6_HGO_G_HISTO_21,HGO Component-G Histogram Register" hexmask.long.tbyte 0x164 0.--21. 1. " HISTOGRAM_21 ,Frequency of Component-G in the value range-21" line.long 0x168 "VI6_HGO_G_HISTO_22,HGO Component-G Histogram Register" hexmask.long.tbyte 0x168 0.--21. 1. " HISTOGRAM_22 ,Frequency of Component-G in the value range-22" line.long 0x16C "VI6_HGO_G_HISTO_23,HGO Component-G Histogram Register" hexmask.long.tbyte 0x16C 0.--21. 1. " HISTOGRAM_23 ,Frequency of Component-G in the value range-23" line.long 0x170 "VI6_HGO_G_HISTO_24,HGO Component-G Histogram Register" hexmask.long.tbyte 0x170 0.--21. 1. " HISTOGRAM_24 ,Frequency of Component-G in the value range-24" line.long 0x174 "VI6_HGO_G_HISTO_25,HGO Component-G Histogram Register" hexmask.long.tbyte 0x174 0.--21. 1. " HISTOGRAM_25 ,Frequency of Component-G in the value range-25" line.long 0x178 "VI6_HGO_G_HISTO_26,HGO Component-G Histogram Register" hexmask.long.tbyte 0x178 0.--21. 1. " HISTOGRAM_26 ,Frequency of Component-G in the value range-26" line.long 0x17C "VI6_HGO_G_HISTO_27,HGO Component-G Histogram Register" hexmask.long.tbyte 0x17C 0.--21. 1. " HISTOGRAM_27 ,Frequency of Component-G in the value range-27" line.long 0x180 "VI6_HGO_G_HISTO_28,HGO Component-G Histogram Register" hexmask.long.tbyte 0x180 0.--21. 1. " HISTOGRAM_28 ,Frequency of Component-G in the value range-28" line.long 0x184 "VI6_HGO_G_HISTO_29,HGO Component-G Histogram Register" hexmask.long.tbyte 0x184 0.--21. 1. " HISTOGRAM_29 ,Frequency of Component-G in the value range-29" line.long 0x188 "VI6_HGO_G_HISTO_30,HGO Component-G Histogram Register" hexmask.long.tbyte 0x188 0.--21. 1. " HISTOGRAM_30 ,Frequency of Component-G in the value range-30" line.long 0x18C "VI6_HGO_G_HISTO_31,HGO Component-G Histogram Register" hexmask.long.tbyte 0x18C 0.--21. 1. " HISTOGRAM_31 ,Frequency of Component-G in the value range-31" line.long 0x190 "VI6_HGO_G_HISTO_32,HGO Component-G Histogram Register" hexmask.long.tbyte 0x190 0.--21. 1. " HISTOGRAM_32 ,Frequency of Component-G in the value range-32" line.long 0x194 "VI6_HGO_G_HISTO_33,HGO Component-G Histogram Register" hexmask.long.tbyte 0x194 0.--21. 1. " HISTOGRAM_33 ,Frequency of Component-G in the value range-33" line.long 0x198 "VI6_HGO_G_HISTO_34,HGO Component-G Histogram Register" hexmask.long.tbyte 0x198 0.--21. 1. " HISTOGRAM_34 ,Frequency of Component-G in the value range-34" line.long 0x19C "VI6_HGO_G_HISTO_35,HGO Component-G Histogram Register" hexmask.long.tbyte 0x19C 0.--21. 1. " HISTOGRAM_35 ,Frequency of Component-G in the value range-35" line.long 0x1A0 "VI6_HGO_G_HISTO_36,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1A0 0.--21. 1. " HISTOGRAM_36 ,Frequency of Component-G in the value range-36" line.long 0x1A4 "VI6_HGO_G_HISTO_37,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1A4 0.--21. 1. " HISTOGRAM_37 ,Frequency of Component-G in the value range-37" line.long 0x1A8 "VI6_HGO_G_HISTO_38,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1A8 0.--21. 1. " HISTOGRAM_38 ,Frequency of Component-G in the value range-38" line.long 0x1AC "VI6_HGO_G_HISTO_39,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1AC 0.--21. 1. " HISTOGRAM_39 ,Frequency of Component-G in the value range-39" line.long 0x1B0 "VI6_HGO_G_HISTO_40,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1B0 0.--21. 1. " HISTOGRAM_40 ,Frequency of Component-G in the value range-40" line.long 0x1B4 "VI6_HGO_G_HISTO_41,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1B4 0.--21. 1. " HISTOGRAM_41 ,Frequency of Component-G in the value range-41" line.long 0x1B8 "VI6_HGO_G_HISTO_42,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1B8 0.--21. 1. " HISTOGRAM_42 ,Frequency of Component-G in the value range-42" line.long 0x1BC "VI6_HGO_G_HISTO_43,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1BC 0.--21. 1. " HISTOGRAM_43 ,Frequency of Component-G in the value range-43" line.long 0x1C0 "VI6_HGO_G_HISTO_44,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1C0 0.--21. 1. " HISTOGRAM_44 ,Frequency of Component-G in the value range-44" line.long 0x1C4 "VI6_HGO_G_HISTO_45,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1C4 0.--21. 1. " HISTOGRAM_45 ,Frequency of Component-G in the value range-45" line.long 0x1C8 "VI6_HGO_G_HISTO_46,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1C8 0.--21. 1. " HISTOGRAM_46 ,Frequency of Component-G in the value range-46" line.long 0x1CC "VI6_HGO_G_HISTO_47,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1CC 0.--21. 1. " HISTOGRAM_47 ,Frequency of Component-G in the value range-47" line.long 0x1D0 "VI6_HGO_G_HISTO_48,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1D0 0.--21. 1. " HISTOGRAM_48 ,Frequency of Component-G in the value range-48" line.long 0x1D4 "VI6_HGO_G_HISTO_49,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1D4 0.--21. 1. " HISTOGRAM_49 ,Frequency of Component-G in the value range-49" line.long 0x1D8 "VI6_HGO_G_HISTO_50,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1D8 0.--21. 1. " HISTOGRAM_50 ,Frequency of Component-G in the value range-50" line.long 0x1DC "VI6_HGO_G_HISTO_51,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1DC 0.--21. 1. " HISTOGRAM_51 ,Frequency of Component-G in the value range-51" line.long 0x1E0 "VI6_HGO_G_HISTO_52,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1E0 0.--21. 1. " HISTOGRAM_52 ,Frequency of Component-G in the value range-52" line.long 0x1E4 "VI6_HGO_G_HISTO_53,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1E4 0.--21. 1. " HISTOGRAM_53 ,Frequency of Component-G in the value range-53" line.long 0x1E8 "VI6_HGO_G_HISTO_54,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1E8 0.--21. 1. " HISTOGRAM_54 ,Frequency of Component-G in the value range-54" line.long 0x1EC "VI6_HGO_G_HISTO_55,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1EC 0.--21. 1. " HISTOGRAM_55 ,Frequency of Component-G in the value range-55" line.long 0x1F0 "VI6_HGO_G_HISTO_56,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1F0 0.--21. 1. " HISTOGRAM_56 ,Frequency of Component-G in the value range-56" line.long 0x1F4 "VI6_HGO_G_HISTO_57,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1F4 0.--21. 1. " HISTOGRAM_57 ,Frequency of Component-G in the value range-57" line.long 0x1F8 "VI6_HGO_G_HISTO_58,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1F8 0.--21. 1. " HISTOGRAM_58 ,Frequency of Component-G in the value range-58" line.long 0x1FC "VI6_HGO_G_HISTO_59,HGO Component-G Histogram Register" hexmask.long.tbyte 0x1FC 0.--21. 1. " HISTOGRAM_59 ,Frequency of Component-G in the value range-59" line.long 0x200 "VI6_HGO_G_HISTO_60,HGO Component-G Histogram Register" hexmask.long.tbyte 0x200 0.--21. 1. " HISTOGRAM_60 ,Frequency of Component-G in the value range-60" line.long 0x204 "VI6_HGO_G_HISTO_61,HGO Component-G Histogram Register" hexmask.long.tbyte 0x204 0.--21. 1. " HISTOGRAM_61 ,Frequency of Component-G in the value range-61" line.long 0x208 "VI6_HGO_G_HISTO_62,HGO Component-G Histogram Register" hexmask.long.tbyte 0x208 0.--21. 1. " HISTOGRAM_62 ,Frequency of Component-G in the value range-62" line.long 0x20C "VI6_HGO_G_HISTO_63,HGO Component-G Histogram Register" hexmask.long.tbyte 0x20C 0.--21. 1. " HISTOGRAM_63 ,Frequency of Component-G in the value range-63" line.long 0x210 "VI6_HGO_G_MAXMIN,HGO Component-G Min/Max Value Register" hexmask.long.byte 0x210 16.--23. 1. " MAXVAL ,Maximum Value of Component-G" hexmask.long.byte 0x210 0.--7. 1. " MINVAL ,Minimum Value of Component-G" line.long 0x214 "VI6_HGO_G_SUM,HGO Component-G Sum Register" hexmask.long 0x214 0.--29. 1. " SUMVAL ,Sum of Component-G" line.long 0x218 "VI6_HGO_G_LB_DET,HGO Component-G LB Detection Result Register" bitfld.long 0x218 2. " LTRBOX1 ,Letter Box Detection Result 1 of Zone-0/1 for Component-G" "0,1" bitfld.long 0x218 1. " LTRBOX2 ,Letter Box Detection Result 2 of Zone-0/1 for Component-G" "0,1" bitfld.long 0x218 0. " SIDE ,Letter Box Detection Result of Zone-2/3 for Component-G" "0,1" line.long 0x220 "VI6_HGO_B_HISTO_0 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x220 0.--21. 1. " HISTOGRAM_0 ,Frequency of Component-B in the value range-0 " line.long 0x224 "VI6_HGO_B_HISTO_1 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x224 0.--21. 1. " HISTOGRAM_1 ,Frequency of Component-B in the value range-1 " line.long 0x228 "VI6_HGO_B_HISTO_2 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x228 0.--21. 1. " HISTOGRAM_2 ,Frequency of Component-B in the value range-2 " line.long 0x22C "VI6_HGO_B_HISTO_3 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x22C 0.--21. 1. " HISTOGRAM_3 ,Frequency of Component-B in the value range-3 " line.long 0x230 "VI6_HGO_B_HISTO_4 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x230 0.--21. 1. " HISTOGRAM_4 ,Frequency of Component-B in the value range-4 " line.long 0x234 "VI6_HGO_B_HISTO_5 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x234 0.--21. 1. " HISTOGRAM_5 ,Frequency of Component-B in the value range-5 " line.long 0x238 "VI6_HGO_B_HISTO_6 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x238 0.--21. 1. " HISTOGRAM_6 ,Frequency of Component-B in the value range-6 " line.long 0x23C "VI6_HGO_B_HISTO_7 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x23C 0.--21. 1. " HISTOGRAM_7 ,Frequency of Component-B in the value range-7 " line.long 0x240 "VI6_HGO_B_HISTO_8 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x240 0.--21. 1. " HISTOGRAM_8 ,Frequency of Component-B in the value range-8 " line.long 0x244 "VI6_HGO_B_HISTO_9 ,HGO Component-B Histogram Register" hexmask.long.tbyte 0x244 0.--21. 1. " HISTOGRAM_9 ,Frequency of Component-B in the value range-9 " line.long 0x248 "VI6_HGO_B_HISTO_10,HGO Component-B Histogram Register" hexmask.long.tbyte 0x248 0.--21. 1. " HISTOGRAM_10 ,Frequency of Component-B in the value range-10" line.long 0x24C "VI6_HGO_B_HISTO_11,HGO Component-B Histogram Register" hexmask.long.tbyte 0x24C 0.--21. 1. " HISTOGRAM_11 ,Frequency of Component-B in the value range-11" line.long 0x250 "VI6_HGO_B_HISTO_12,HGO Component-B Histogram Register" hexmask.long.tbyte 0x250 0.--21. 1. " HISTOGRAM_12 ,Frequency of Component-B in the value range-12" line.long 0x254 "VI6_HGO_B_HISTO_13,HGO Component-B Histogram Register" hexmask.long.tbyte 0x254 0.--21. 1. " HISTOGRAM_13 ,Frequency of Component-B in the value range-13" line.long 0x258 "VI6_HGO_B_HISTO_14,HGO Component-B Histogram Register" hexmask.long.tbyte 0x258 0.--21. 1. " HISTOGRAM_14 ,Frequency of Component-B in the value range-14" line.long 0x25C "VI6_HGO_B_HISTO_15,HGO Component-B Histogram Register" hexmask.long.tbyte 0x25C 0.--21. 1. " HISTOGRAM_15 ,Frequency of Component-B in the value range-15" line.long 0x260 "VI6_HGO_B_HISTO_16,HGO Component-B Histogram Register" hexmask.long.tbyte 0x260 0.--21. 1. " HISTOGRAM_16 ,Frequency of Component-B in the value range-16" line.long 0x264 "VI6_HGO_B_HISTO_17,HGO Component-B Histogram Register" hexmask.long.tbyte 0x264 0.--21. 1. " HISTOGRAM_17 ,Frequency of Component-B in the value range-17" line.long 0x268 "VI6_HGO_B_HISTO_18,HGO Component-B Histogram Register" hexmask.long.tbyte 0x268 0.--21. 1. " HISTOGRAM_18 ,Frequency of Component-B in the value range-18" line.long 0x26C "VI6_HGO_B_HISTO_19,HGO Component-B Histogram Register" hexmask.long.tbyte 0x26C 0.--21. 1. " HISTOGRAM_19 ,Frequency of Component-B in the value range-19" line.long 0x270 "VI6_HGO_B_HISTO_20,HGO Component-B Histogram Register" hexmask.long.tbyte 0x270 0.--21. 1. " HISTOGRAM_20 ,Frequency of Component-B in the value range-20" line.long 0x274 "VI6_HGO_B_HISTO_21,HGO Component-B Histogram Register" hexmask.long.tbyte 0x274 0.--21. 1. " HISTOGRAM_21 ,Frequency of Component-B in the value range-21" line.long 0x278 "VI6_HGO_B_HISTO_22,HGO Component-B Histogram Register" hexmask.long.tbyte 0x278 0.--21. 1. " HISTOGRAM_22 ,Frequency of Component-B in the value range-22" line.long 0x27C "VI6_HGO_B_HISTO_23,HGO Component-B Histogram Register" hexmask.long.tbyte 0x27C 0.--21. 1. " HISTOGRAM_23 ,Frequency of Component-B in the value range-23" line.long 0x280 "VI6_HGO_B_HISTO_24,HGO Component-B Histogram Register" hexmask.long.tbyte 0x280 0.--21. 1. " HISTOGRAM_24 ,Frequency of Component-B in the value range-24" line.long 0x284 "VI6_HGO_B_HISTO_25,HGO Component-B Histogram Register" hexmask.long.tbyte 0x284 0.--21. 1. " HISTOGRAM_25 ,Frequency of Component-B in the value range-25" line.long 0x288 "VI6_HGO_B_HISTO_26,HGO Component-B Histogram Register" hexmask.long.tbyte 0x288 0.--21. 1. " HISTOGRAM_26 ,Frequency of Component-B in the value range-26" line.long 0x28C "VI6_HGO_B_HISTO_27,HGO Component-B Histogram Register" hexmask.long.tbyte 0x28C 0.--21. 1. " HISTOGRAM_27 ,Frequency of Component-B in the value range-27" line.long 0x290 "VI6_HGO_B_HISTO_28,HGO Component-B Histogram Register" hexmask.long.tbyte 0x290 0.--21. 1. " HISTOGRAM_28 ,Frequency of Component-B in the value range-28" line.long 0x294 "VI6_HGO_B_HISTO_29,HGO Component-B Histogram Register" hexmask.long.tbyte 0x294 0.--21. 1. " HISTOGRAM_29 ,Frequency of Component-B in the value range-29" line.long 0x298 "VI6_HGO_B_HISTO_30,HGO Component-B Histogram Register" hexmask.long.tbyte 0x298 0.--21. 1. " HISTOGRAM_30 ,Frequency of Component-B in the value range-30" line.long 0x29C "VI6_HGO_B_HISTO_31,HGO Component-B Histogram Register" hexmask.long.tbyte 0x29C 0.--21. 1. " HISTOGRAM_31 ,Frequency of Component-B in the value range-31" line.long 0x2A0 "VI6_HGO_B_HISTO_32,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2A0 0.--21. 1. " HISTOGRAM_32 ,Frequency of Component-B in the value range-32" line.long 0x2A4 "VI6_HGO_B_HISTO_33,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2A4 0.--21. 1. " HISTOGRAM_33 ,Frequency of Component-B in the value range-33" line.long 0x2A8 "VI6_HGO_B_HISTO_34,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2A8 0.--21. 1. " HISTOGRAM_34 ,Frequency of Component-B in the value range-34" line.long 0x2AC "VI6_HGO_B_HISTO_35,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2AC 0.--21. 1. " HISTOGRAM_35 ,Frequency of Component-B in the value range-35" line.long 0x2B0 "VI6_HGO_B_HISTO_36,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2B0 0.--21. 1. " HISTOGRAM_36 ,Frequency of Component-B in the value range-36" line.long 0x2B4 "VI6_HGO_B_HISTO_37,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2B4 0.--21. 1. " HISTOGRAM_37 ,Frequency of Component-B in the value range-37" line.long 0x2B8 "VI6_HGO_B_HISTO_38,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2B8 0.--21. 1. " HISTOGRAM_38 ,Frequency of Component-B in the value range-38" line.long 0x2BC "VI6_HGO_B_HISTO_39,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2BC 0.--21. 1. " HISTOGRAM_39 ,Frequency of Component-B in the value range-39" line.long 0x2C0 "VI6_HGO_B_HISTO_40,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2C0 0.--21. 1. " HISTOGRAM_40 ,Frequency of Component-B in the value range-40" line.long 0x2C4 "VI6_HGO_B_HISTO_41,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2C4 0.--21. 1. " HISTOGRAM_41 ,Frequency of Component-B in the value range-41" line.long 0x2C8 "VI6_HGO_B_HISTO_42,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2C8 0.--21. 1. " HISTOGRAM_42 ,Frequency of Component-B in the value range-42" line.long 0x2CC "VI6_HGO_B_HISTO_43,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2CC 0.--21. 1. " HISTOGRAM_43 ,Frequency of Component-B in the value range-43" line.long 0x2D0 "VI6_HGO_B_HISTO_44,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2D0 0.--21. 1. " HISTOGRAM_44 ,Frequency of Component-B in the value range-44" line.long 0x2D4 "VI6_HGO_B_HISTO_45,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2D4 0.--21. 1. " HISTOGRAM_45 ,Frequency of Component-B in the value range-45" line.long 0x2D8 "VI6_HGO_B_HISTO_46,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2D8 0.--21. 1. " HISTOGRAM_46 ,Frequency of Component-B in the value range-46" line.long 0x2DC "VI6_HGO_B_HISTO_47,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2DC 0.--21. 1. " HISTOGRAM_47 ,Frequency of Component-B in the value range-47" line.long 0x2E0 "VI6_HGO_B_HISTO_48,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2E0 0.--21. 1. " HISTOGRAM_48 ,Frequency of Component-B in the value range-48" line.long 0x2E4 "VI6_HGO_B_HISTO_49,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2E4 0.--21. 1. " HISTOGRAM_49 ,Frequency of Component-B in the value range-49" line.long 0x2E8 "VI6_HGO_B_HISTO_50,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2E8 0.--21. 1. " HISTOGRAM_50 ,Frequency of Component-B in the value range-50" line.long 0x2EC "VI6_HGO_B_HISTO_51,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2EC 0.--21. 1. " HISTOGRAM_51 ,Frequency of Component-B in the value range-51" line.long 0x2F0 "VI6_HGO_B_HISTO_52,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2F0 0.--21. 1. " HISTOGRAM_52 ,Frequency of Component-B in the value range-52" line.long 0x2F4 "VI6_HGO_B_HISTO_53,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2F4 0.--21. 1. " HISTOGRAM_53 ,Frequency of Component-B in the value range-53" line.long 0x2F8 "VI6_HGO_B_HISTO_54,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2F8 0.--21. 1. " HISTOGRAM_54 ,Frequency of Component-B in the value range-54" line.long 0x2FC "VI6_HGO_B_HISTO_55,HGO Component-B Histogram Register" hexmask.long.tbyte 0x2FC 0.--21. 1. " HISTOGRAM_55 ,Frequency of Component-B in the value range-55" line.long 0x300 "VI6_HGO_B_HISTO_56,HGO Component-B Histogram Register" hexmask.long.tbyte 0x300 0.--21. 1. " HISTOGRAM_56 ,Frequency of Component-B in the value range-56" line.long 0x304 "VI6_HGO_B_HISTO_57,HGO Component-B Histogram Register" hexmask.long.tbyte 0x304 0.--21. 1. " HISTOGRAM_57 ,Frequency of Component-B in the value range-57" line.long 0x308 "VI6_HGO_B_HISTO_58,HGO Component-B Histogram Register" hexmask.long.tbyte 0x308 0.--21. 1. " HISTOGRAM_58 ,Frequency of Component-B in the value range-58" line.long 0x30C "VI6_HGO_B_HISTO_59,HGO Component-B Histogram Register" hexmask.long.tbyte 0x30C 0.--21. 1. " HISTOGRAM_59 ,Frequency of Component-B in the value range-59" line.long 0x310 "VI6_HGO_B_HISTO_60,HGO Component-B Histogram Register" hexmask.long.tbyte 0x310 0.--21. 1. " HISTOGRAM_60 ,Frequency of Component-B in the value range-60" line.long 0x314 "VI6_HGO_B_HISTO_61,HGO Component-B Histogram Register" hexmask.long.tbyte 0x314 0.--21. 1. " HISTOGRAM_61 ,Frequency of Component-B in the value range-61" line.long 0x318 "VI6_HGO_B_HISTO_62,HGO Component-B Histogram Register" hexmask.long.tbyte 0x318 0.--21. 1. " HISTOGRAM_62 ,Frequency of Component-B in the value range-62" line.long 0x31C "VI6_HGO_B_HISTO_63,HGO Component-B Histogram Register" hexmask.long.tbyte 0x31C 0.--21. 1. " HISTOGRAM_63 ,Frequency of Component-B in the value range-63" line.long 0x320 "VI6_HGO_B_MAXMIN,HGO Component-B Min/Max Value Register" hexmask.long.byte 0x320 16.--23. 1. " MAXVAL ,Maximum Value of Component-B" hexmask.long.byte 0x320 0.--7. 1. " MINVAL ,Minimum Value of Component-B" line.long 0x324 "VI6_HGO_B_SUM,HGO Component-B Sum Register" hexmask.long 0x324 0.--29. 1. " SUMVAL ,Sum of Component-B" line.long 0x328 "VI6_HGO_B_LB_DET,HGO Component-B LB Detection Result Register" bitfld.long 0x328 2. " LTRBOX1 ,Letter Box Detection Result 1 of Zone-0/1 for Component-B" "0,1" bitfld.long 0x328 1. " LTRBOX2 ,Letter Box Detection Result 2 of Zone-0/1 for Component-B" "0,1" bitfld.long 0x328 0. " SIDE ,Letter Box Detection Result of Zone-2/3 for Component-B" "0,1" wgroup.long 0x33FC++0x3 line.long 0x00 "VI6_HGO_REGRST,HGO Parameter Register Reset" bitfld.long 0x00 0. " RCLEA ,Register Reset" "No reset,Reset" tree.end width 15. tree "LIF Control Registers" group.long 0x3B00++0x7 line.long 0x00 "VI6_LIF_CTRL,LIF Control Register" hexmask.long.word 0x00 16.--26. 1. " OBTH ,Buffer Threshold for Start Ready Notification to Display Module" bitfld.long 0x00 4. " CFMT ,Chroma Format" "YCbCr444/RGB,YCbCr422" bitfld.long 0x00 1. " REQSEL ,External Display Module Selection" ",DU" textline " " bitfld.long 0x00 0. " LIF_EN ,Enable/Disable of Data Output to External Display Module" "Disabled,Enabled" line.long 0x04 "VI6_LIF_CSBTH,LIF Clock Stop Buffer Control Register" hexmask.long.word 0x04 16.--26. 1. " HBTH ,Buffer Threshold for Clock Stop in Dynamic Clock Control" hexmask.long.word 0x04 0.--10. 1. " LBTH ,Buffer Threshold for Clock Start in Dynamic Clock Control" tree.end width 18. tree "Security Control Registers" group.long 0x3D00++0x7 line.long 0x00 "VI6_SECURE_CTRL0,Secure Access Control Register 0" bitfld.long 0x00 27. " SCCH3 ,Secure Attribute for Display List 3 Registers" "Non-secure,Secure" bitfld.long 0x00 26. " SCCH2 ,Secure Attribute for Display List 2 Registers" "Non-secure,Secure" bitfld.long 0x00 25. " SCCH1 ,Secure Attribute for Display List 1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 24. " SCCH0 ,Secure Attribute for Display List 0 Registers" "Non-secure,Secure" bitfld.long 0x00 11. " SCWPF3 ,Secure Attribute for WPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 10. " SCWPF2 ,Secure Attribute for WPF2 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " SCWPF1 ,Secure Attribute for WPF1 Registers" "Non-secure,Secure" bitfld.long 0x00 8. " SCWPF0 ,Secure Attribute for WPF0 Registers" "Non-secure,Secure" bitfld.long 0x00 4. " SCRPF4 ,Secure Attribute for RPF4 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " SCRPF3 ,Secure Attribute for RPF3 Registers" "Non-secure,Secure" bitfld.long 0x00 2. " SCRPF2 ,Secure Attribute for RPF2 Registers" "Non-secure,Secure" bitfld.long 0x00 1. " SCRPF1 ,Secure Attribute for RPF1 Registers" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " SCRPF0 ,Secure Attribute for RPF0 Registers" "Non-secure,Secure" line.long 0x04 "VI6_SECURE_CTRL1,Secure Access Control Register 1" bitfld.long 0x04 14. " SCLIF ,Secure Attribute for LIF Registers" "Non-secure,Secure" bitfld.long 0x04 13. " SCHGT ,Secure Attribute for HGT Registers" "Non-secure,Secure" bitfld.long 0x04 12. " SCHGO ,Secure Attribute for HGO Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 10. " SCBRU ,Secure Attribute for BRU Registers" "Non-secure,Secure" bitfld.long 0x04 9. " SCHSI ,Secure Attribute for HSI Registers" "Non-secure,Secure" bitfld.long 0x04 8. " SCHST ,Secure Attribute for HST Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 7. " SCCLU ,Secure Attribute for CLU Registers" "Non-secure,Secure" bitfld.long 0x04 6. " SCLUT ,Secure Attribute for LUT Registers" "Non-secure,Secure" bitfld.long 0x04 3. " SCUDS2 ,Secure Attribute for UDS2 Registers" "Non-secure,Secure" textline " " bitfld.long 0x04 2. " SCUDS1 ,Secure Attribute for UDS1 Registers" "Non-secure,Secure" bitfld.long 0x04 1. " SCUDS0 ,Secure Attribute for UDS0 Registers" "Non-secure,Secure" bitfld.long 0x04 0. " SCSRU ,Secure Attribute for SRU Registers" "Non-secure,Secure" tree.end width 15. tree "CLUT" group.long 0x4000++0x3 line.long 0x00 "VI6_CLUT0_TBL,CLUT table 0" button "CLUT0" "d (ad:0xFE930000+0x4000)--(ad:0xFE930000+0x43FF) /long" group.long 0x4400++0x3 line.long 0x00 "VI6_CLUT1_TBL,CLUT table 1" button "CLUT1" "d (ad:0xFE930000+0x4400)--(ad:0xFE930000+0x47FF) /long" group.long 0x4800++0x3 line.long 0x00 "VI6_CLUT2_TBL,CLUT table 2" button "CLUT2" "d (ad:0xFE930000+0x4800)--(ad:0xFE930000+0x4BFF) /long" group.long 0x4C00++0x3 line.long 0x00 "VI6_CLUT3_TBL,CLUT table 3" button "CLUT3" "d (ad:0xFE930000+0x4C00)--(ad:0xFE930000+0x4FFF) /long" group.long 0x5000++0x3 line.long 0x00 "VI6_CLUT4_TBL,CLUT table 4" button "CLUT4" "d (ad:0xFE930000+0x5000)--(ad:0xFE930000+0x53FF) /long" tree.end width 14. tree "LUT" group.long 0x7000++0x3 "1D-LUT" line.long 0x00 "VI6_LUT_TBL,LUT table" button "LUT" "d (ad:0xFE930000+0x7000)--(ad:0xFE930000+0x73FF) /long" tree.end width 0xB tree.end tree.end tree.open "2D-DMAC (Image Extraction Direct Memory Access Controller)" tree "2D-DMAC 0" base ad:0xFEA00000 width 10. group.long 0x20++0x3 line.long 0x00 "CH0CTRL,Control Register CH0" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH0SWAP,Input/Output Swap Register CH0" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00000+0x80+0x0C))&0x60)==0x0) group.long (0x80+0x0C)++0x3 line.long 0x00 "CH0SFMT,Source Format Register CH0" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x80+0x0C)++0x3 line.long 0x00 "CH0SFMT,Source Format Register CH0" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x80++0x3 line.long 0x00 "CH0SAR,Source Address Register CH0" if (((per.l(ad:0xFEA00000+0x80+0x10))&0x60)==0x0) group.long (0x80+0x10)++0x3 line.long 0x00 "CH0DFMT,Destination Format Register CH0" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x80+0x10)++0x3 line.long 0x00 "CH0DFMT,Destination Format Register CH0" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x80+0x8)++0x3 line.long 0x00 "CH0DPXL,Destination Pixel Register CH0" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x80+0x4)++0x3 line.long 0x00 "CH0DAR,Destination Address Register CH0" rgroup.long (0x80+0x14)++0xB line.long 0x00 "CH0SARE,Source Line Address Register CH0" line.long 0x04 "CH0DARE,Destination Line Address Register CH0" line.long 0x08 "CH0DPXLE,Destination Pixel Processing Register CH0" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 1" base ad:0xFEA00004 width 10. group.long 0x20++0x3 line.long 0x00 "CH1CTRL,Control Register CH1" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH1SWAP,Input/Output Swap Register CH1" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00004+0x9C+0x0C))&0x60)==0x0) group.long (0x9C+0x0C)++0x3 line.long 0x00 "CH1SFMT,Source Format Register CH1" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x9C+0x0C)++0x3 line.long 0x00 "CH1SFMT,Source Format Register CH1" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x9C++0x3 line.long 0x00 "CH1SAR,Source Address Register CH1" if (((per.l(ad:0xFEA00004+0x9C+0x10))&0x60)==0x0) group.long (0x9C+0x10)++0x3 line.long 0x00 "CH1DFMT,Destination Format Register CH1" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x9C+0x10)++0x3 line.long 0x00 "CH1DFMT,Destination Format Register CH1" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x9C+0x8)++0x3 line.long 0x00 "CH1DPXL,Destination Pixel Register CH1" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x9C+0x4)++0x3 line.long 0x00 "CH1DAR,Destination Address Register CH1" rgroup.long (0x9C+0x14)++0xB line.long 0x00 "CH1SARE,Source Line Address Register CH1" line.long 0x04 "CH1DARE,Destination Line Address Register CH1" line.long 0x08 "CH1DPXLE,Destination Pixel Processing Register CH1" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 2" base ad:0xFEA00008 width 10. group.long 0x20++0x3 line.long 0x00 "CH2CTRL,Control Register CH2" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 2.--3. " LINK ,Link Transfer Mode" "Disabled,,Slave after 2 masters,Alternate transfers" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH2SWAP,Input/Output Swap Register CH2" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00008+0xB8+0x0C))&0x60)==0x0) group.long (0xB8+0x0C)++0x3 line.long 0x00 "CH2SFMT,Source Format Register CH2" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0xB8+0x0C)++0x3 line.long 0x00 "CH2SFMT,Source Format Register CH2" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0xB8++0x3 line.long 0x00 "CH2SAR,Source Address Register CH2" if (((per.l(ad:0xFEA00008+0xB8+0x10))&0x60)==0x0) group.long (0xB8+0x10)++0x3 line.long 0x00 "CH2DFMT,Destination Format Register CH2" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0xB8+0x10)++0x3 line.long 0x00 "CH2DFMT,Destination Format Register CH2" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0xB8+0x8)++0x3 line.long 0x00 "CH2DPXL,Destination Pixel Register CH2" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0xB8+0x4)++0x3 line.long 0x00 "CH2DAR,Destination Address Register CH2" rgroup.long (0xB8+0x14)++0xB line.long 0x00 "CH2SARE,Source Line Address Register CH2" line.long 0x04 "CH2DARE,Destination Line Address Register CH2" line.long 0x08 "CH2DPXLE,Destination Pixel Processing Register CH2" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 3" base ad:0xFEA0000C width 10. group.long 0x20++0x3 line.long 0x00 "CH3CTRL,Control Register CH3" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH3SWAP,Input/Output Swap Register CH3" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA0000C+0xD4+0x0C))&0x60)==0x0) group.long (0xD4+0x0C)++0x3 line.long 0x00 "CH3SFMT,Source Format Register CH3" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0xD4+0x0C)++0x3 line.long 0x00 "CH3SFMT,Source Format Register CH3" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0xD4++0x3 line.long 0x00 "CH3SAR,Source Address Register CH3" if (((per.l(ad:0xFEA0000C+0xD4+0x10))&0x60)==0x0) group.long (0xD4+0x10)++0x3 line.long 0x00 "CH3DFMT,Destination Format Register CH3" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0xD4+0x10)++0x3 line.long 0x00 "CH3DFMT,Destination Format Register CH3" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0xD4+0x8)++0x3 line.long 0x00 "CH3DPXL,Destination Pixel Register CH3" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0xD4+0x4)++0x3 line.long 0x00 "CH3DAR,Destination Address Register CH3" rgroup.long (0xD4+0x14)++0xB line.long 0x00 "CH3SARE,Source Line Address Register CH3" line.long 0x04 "CH3DARE,Destination Line Address Register CH3" line.long 0x08 "CH3DPXLE,Destination Pixel Processing Register CH3" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 4" base ad:0xFEA00100 width 10. group.long 0x20++0x3 line.long 0x00 "CH4CTRL,Control Register CH4" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 2.--3. " LINK ,Link Transfer Mode" "Disabled,,Slave after 2 masters,Alternate transfers" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH4SWAP,Input/Output Swap Register CH4" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00100+0x180+0x0C))&0x60)==0x0) group.long (0x180+0x0C)++0x3 line.long 0x00 "CH4SFMT,Source Format Register CH4" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x180+0x0C)++0x3 line.long 0x00 "CH4SFMT,Source Format Register CH4" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x180++0x3 line.long 0x00 "CH4SAR,Source Address Register CH4" if (((per.l(ad:0xFEA00100+0x180+0x10))&0x60)==0x0) group.long (0x180+0x10)++0x3 line.long 0x00 "CH4DFMT,Destination Format Register CH4" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x180+0x10)++0x3 line.long 0x00 "CH4DFMT,Destination Format Register CH4" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x180+0x8)++0x3 line.long 0x00 "CH4DPXL,Destination Pixel Register CH4" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x180+0x4)++0x3 line.long 0x00 "CH4DAR,Destination Address Register CH4" rgroup.long (0x180+0x14)++0xB line.long 0x00 "CH4SARE,Source Line Address Register CH4" line.long 0x04 "CH4DARE,Destination Line Address Register CH4" line.long 0x08 "CH4DPXLE,Destination Pixel Processing Register CH4" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 5" base ad:0xFEA00104 width 10. group.long 0x20++0x3 line.long 0x00 "CH5CTRL,Control Register CH5" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH5SWAP,Input/Output Swap Register CH5" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00104+0x19C+0x0C))&0x60)==0x0) group.long (0x19C+0x0C)++0x3 line.long 0x00 "CH5SFMT,Source Format Register CH5" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x19C+0x0C)++0x3 line.long 0x00 "CH5SFMT,Source Format Register CH5" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x19C++0x3 line.long 0x00 "CH5SAR,Source Address Register CH5" if (((per.l(ad:0xFEA00104+0x19C+0x10))&0x60)==0x0) group.long (0x19C+0x10)++0x3 line.long 0x00 "CH5DFMT,Destination Format Register CH5" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x19C+0x10)++0x3 line.long 0x00 "CH5DFMT,Destination Format Register CH5" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x19C+0x8)++0x3 line.long 0x00 "CH5DPXL,Destination Pixel Register CH5" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x19C+0x4)++0x3 line.long 0x00 "CH5DAR,Destination Address Register CH5" rgroup.long (0x19C+0x14)++0xB line.long 0x00 "CH5SARE,Source Line Address Register CH5" line.long 0x04 "CH5DARE,Destination Line Address Register CH5" line.long 0x08 "CH5DPXLE,Destination Pixel Processing Register CH5" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 6" base ad:0xFEA00108 width 10. group.long 0x20++0x3 line.long 0x00 "CH6CTRL,Control Register CH6" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 2.--3. " LINK ,Link Transfer Mode" "Disabled,,Slave after 2 masters,Alternate transfers" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH6SWAP,Input/Output Swap Register CH6" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA00108+0x1B8+0x0C))&0x60)==0x0) group.long (0x1B8+0x0C)++0x3 line.long 0x00 "CH6SFMT,Source Format Register CH6" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x1B8+0x0C)++0x3 line.long 0x00 "CH6SFMT,Source Format Register CH6" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x1B8++0x3 line.long 0x00 "CH6SAR,Source Address Register CH6" if (((per.l(ad:0xFEA00108+0x1B8+0x10))&0x60)==0x0) group.long (0x1B8+0x10)++0x3 line.long 0x00 "CH6DFMT,Destination Format Register CH6" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x1B8+0x10)++0x3 line.long 0x00 "CH6DFMT,Destination Format Register CH6" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x1B8+0x8)++0x3 line.long 0x00 "CH6DPXL,Destination Pixel Register CH6" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x1B8+0x4)++0x3 line.long 0x00 "CH6DAR,Destination Address Register CH6" rgroup.long (0x1B8+0x14)++0xB line.long 0x00 "CH6SARE,Source Line Address Register CH6" line.long 0x04 "CH6DARE,Destination Line Address Register CH6" line.long 0x08 "CH6DPXLE,Destination Pixel Processing Register CH6" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC 7" base ad:0xFEA0010C width 10. group.long 0x20++0x3 line.long 0x00 "CH7CTRL,Control Register CH7" bitfld.long 0x00 15. " HMRR ,Horizontal Inversion" "Disabled,Enabled" bitfld.long 0x00 14. " VMRR ,Vertical Inversion" "Disabled,Enabled" bitfld.long 0x00 13. " ROTL ,270 Degrees Rotation" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " ROTR ,90 Degrees Rotation" "Disabled,Enabled" bitfld.long 0x00 10. " MX ,Magnify X Direction" "Disabled,Enabled" bitfld.long 0x00 8. " MY ,Magnify Y Direction" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " HIE ,Half End Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " HE ,Half End" "Not ended,Ended" bitfld.long 0x00 5. " TIE ,Transfer End Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " TE ,Transfer End" "Not ended,Ended" textline " " bitfld.long 0x00 1. " STP ,Transfer Stop" "Progress|Suspended/No effect,Pending/Stopped" textline " " bitfld.long 0x00 0. " DMAEN ,DMA Transfer Enable" "Disabled,Enabled" group.long 0x30++0x3 line.long 0x00 "CH7SWAP,Input/Output Swap Register CH7" bitfld.long 0x00 6. " OLS ,Output Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 5. " OWS ,Output Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 4. " OBS ,Output Byte SwapSetting" "Not swapped,Swapped" textline " " bitfld.long 0x00 2. " ILS ,Input Longword Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 1. " IWS ,Input Word Swap Setting" "Not swapped,Swapped" bitfld.long 0x00 0. " IBS ,Input Byte Swap Setting" "Not swapped,Swapped" if (((per.l(ad:0xFEA0010C+0x1D4+0x0C))&0x60)==0x0) group.long (0x1D4+0x0C)++0x3 line.long 0x00 "CH7SFMT,Source Format Register CH7" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YcbCr4:2:0,YcbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x1D4+0x0C)++0x3 line.long 0x00 "CH7SFMT,Source Format Register CH7" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Source Image Horizontal Byte Size" bitfld.long 0x00 5.--6. " MD ,Source Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long 0x1D4++0x3 line.long 0x00 "CH7SAR,Source Address Register CH7" if (((per.l(ad:0xFEA0010C+0x1D4+0x10))&0x60)==0x0) group.long (0x1D4+0x10)++0x3 line.long 0x00 "CH7DFMT,Destination Format Register CH7" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" bitfld.long 0x00 0.--4. " PKF ,Source Image RGB Data Packed Format" "ARGB8888,RGBA8888,RGB888,RGB565,RGB332,,,pRGB14-666,pRGB4-444,RGB666,BGR666,BGR888,ABGR8888,RGB565,?..." else group.long (0x1D4+0x10)++0x3 line.long 0x00 "CH7DFMT,Destination Format Register CH7" hexmask.long.word 0x00 16.--31. 1. " HWTH ,Destination Image Horizontal Byte Size" hexmask.long.byte 0x00 8.--15. 1. " KALPHA ,Alpha Value" bitfld.long 0x00 7. " AV ,Alpha Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5.--6. " MD ,Destination Image Format" "RGB,Y,YCbCr4:2:0,YCbCr4:2:2" endif group.long (0x1D4+0x8)++0x3 line.long 0x00 "CH7DPXL,Destination Pixel Register CH7" hexmask.long.word 0x00 16.--31. 1. " DHPXL ,Destination Image Horizontal Pixel Size" hexmask.long.word 0x00 0.--15. 1. " DVPXL ,Destination Image Vertical Pixel Size" group.long (0x1D4+0x4)++0x3 line.long 0x00 "CH7DAR,Destination Address Register CH7" rgroup.long (0x1D4+0x14)++0xB line.long 0x00 "CH7SARE,Source Line Address Register CH7" line.long 0x04 "CH7DARE,Destination Line Address Register CH7" line.long 0x08 "CH7DPXLE,Destination Pixel Processing Register CH7" hexmask.long.word 0x08 16.--31. 1. " DHPXLE ,DHPXLE" hexmask.long.word 0x08 0.--15. 1. " DVPXLE ,DVPXLE" width 0xB tree.end tree "2D-DMAC Interrupt Clear Register" base ad:0xFEA00000 width 9. sif cpuis("R8A774*") group.long 0x08++0x3 line.long 0x00 "CHTCTRL,Transaction Control Register" bitfld.long 0x00 5. " OUT ,Transaction control" "Disabled,Enabled" endif group.long 0x10++0x3 line.long 0x00 "CHSTCLR,Interrupt Status Clear Register" bitfld.long 0x00 15. " CH7HE ,HE bit 7 status" "Not cleared,Cleared" bitfld.long 0x00 14. " CH6HE ,HE bit 6 status" "Not cleared,Cleared" bitfld.long 0x00 13. " CH5HE ,HE bit 5 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 12. " CH4HE ,HE bit 4 status" "Not cleared,Cleared" bitfld.long 0x00 11. " CH3HE ,HE bit 3 status" "Not cleared,Cleared" bitfld.long 0x00 10. " CH2HE ,HE bit 2 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 9. " CH1HE ,HE bit 1 status" "Not cleared,Cleared" bitfld.long 0x00 8. " CH0HE ,HE bit 0 status" "Not cleared,Cleared" bitfld.long 0x00 7. " CH7TE ,TE bit 7 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 6. " CH6TE ,TE bit 6 status" "Not cleared,Cleared" bitfld.long 0x00 5. " CH5TE ,TE bit 5 status" "Not cleared,Cleared" bitfld.long 0x00 4. " CH4TE ,TE bit 4 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 3. " CH3TE ,TE bit 3 status" "Not cleared,Cleared" bitfld.long 0x00 2. " CH2TE ,TE bit 2 status" "Not cleared,Cleared" bitfld.long 0x00 1. " CH1TE ,TE bit 1 status" "Not cleared,Cleared" textline " " bitfld.long 0x00 0. " CH0TE ,TE bit 0 status" "Not cleared,Cleared" width 0xB tree.end tree.end tree.open "SSIU (Serial Sound Interface Unit)" tree "BUSIF 0" base ad:0xEC540000 width 24. group.long 0x0++0x03 line.long 0x00 "SSI0-0_BUSIF_MODE,SSI0-0 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI0_BUSIF" "PIO,DMA" endif group.long (0x0+0x04)++0x03 line.long 0x00 "SSI0-0_BUSIF_ADINR,SSI0-0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." if (((per.l(ad:0xEC540000+0x0C))&0x100)==0x100) group.long (0x0+0x08)++0x03 line.long 0x00 "SSI0-0_BUSIF_DALIGN,SSI0-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,?..." bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,?..." else group.long (0x0+0x08)++0x03 line.long 0x00 "SSI0-0_BUSIF_DALIGN,SSI0-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" endif group.long (0x0+0x0C)++0x07 line.long 0x00 "SSI0-0_MODE,SSI0-0 Mode Register" bitfld.long 0x00 13. " FS_MODE ,TDM split mode fs select" "256 fs,128 fs" bitfld.long 0x00 8. " TDM_SPLIT ,TDM split mode enable" "Disabled,Enabled" bitfld.long 0x00 0. " TDM_EXT ,TDM extend mode enable" "Disabled,Enabled" line.long 0x04 "SSI0-0_CONTROL,SSI0-0 Control Register" bitfld.long 0x04 12. " START_3 ,Data transfer 3 start/stop" "Stopped,Started" bitfld.long 0x04 8. " START_2 ,Data transfer 2 start/stop" "Stopped,Started" bitfld.long 0x04 4. " START_1 ,Data transfer 1 start/stop" "Stopped,Started" textline " " bitfld.long 0x04 0. " START_0 ,Data transfer 0 start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI0-0_STATUS,SSI0-0 Status Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ underflow state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Underflow status 3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Underflow status 2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Underflow status 1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Underflow status 0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Overflow status 3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Overflow status 2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Overflow status 1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Overflow status 0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI0-0_INT_ENABLE_MAIN,SSI0-0 Interrupt Enable Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Underflow enable 3" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Underflow enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Underflow enable 1" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Underflow enable 0" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Overflow enable 3" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Overflow enable 2" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Overflow enable 1" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Overflow enable 0" "Disabled,Enabled" else rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI0-0_STATUS,SSI0-0 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR0_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR0_DTST" "No effect,Detected" textline " " bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR0_UIRQ" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR0_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR0_IIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR0_DIRQ" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf0-3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf0-2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf0-1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf0-0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of0-3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of0-2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of0-1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of0-0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI0-0_INT_ENABLE_MAIN,SSI0-0 Interrupt Enable Register" bitfld.long 0x00 29. " FCST ,SSI0_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST ,SSI0_DTST interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIRQ_IE ,SSI0_UIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,SSI0_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI0_IIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,SSI0_DIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Buffer underflow 0-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Buffer underflow 0-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Buffer underflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Buffer underflow 0-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Buffer overflow 0-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Buffer overflow 0-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Buffer overflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Buffer overflow 0-0 interrupt enable" "Disabled,Enabled" endif group.long 0x20++0x03 line.long 0x00 "SSI0-1_BUSIF_MODE,SSI0-1 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI0_BUSIF" "PIO,DMA" endif group.long (0x20+0x04)++0x03 line.long 0x00 "SSI0-1_BUSIF_ADINR,SSI0-1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x20+0x08)++0x03 line.long 0x00 "SSI0-1_BUSIF_DALIGN,SSI0-1 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x40++0x03 line.long 0x00 "SSI0-2_BUSIF_MODE,SSI0-2 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI0_BUSIF" "PIO,DMA" endif group.long (0x40+0x04)++0x03 line.long 0x00 "SSI0-2_BUSIF_ADINR,SSI0-2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x40+0x08)++0x03 line.long 0x00 "SSI0-2_BUSIF_DALIGN,SSI0-2 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x60++0x03 line.long 0x00 "SSI0-3_BUSIF_MODE,SSI0-3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI0_BUSIF" "PIO,DMA" endif group.long (0x60+0x04)++0x03 line.long 0x00 "SSI0-3_BUSIF_ADINR,SSI0-3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x60+0x08)++0x03 line.long 0x00 "SSI0-3_BUSIF_DALIGN,SSI0-3 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" width 14. tree "BUSIF" base ad:0xEC100000 group.long 0x0++0x03 "Audio DMAC" line.long 0x00 "SSI0-0_BUSIF,SSI0-0_BUSIF Data Registers (Audio DMAC)" group.long 0x400++0x03 "Audio DMAC" line.long 0x00 "SSI0-1_BUSIF,SSI0-1_BUSIF Data Registers (Audio DMAC)" group.long 0x800++0x03 "Audio DMAC" line.long 0x00 "SSI0-2_BUSIF,SSI0-2_BUSIF Data Registers (Audio DMAC)" group.long 0xC00++0x03 "Audio DMAC" line.long 0x00 "SSI0-3_BUSIF,SSI0-3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC400000 group.long 0x0++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI0-0_BUSIF,SSI0-0_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x400++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI0-1_BUSIF,SSI0-1_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x800++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI0-2_BUSIF,SSI0-2_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0xC00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI0-3_BUSIF,SSI0-3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "BUSIF 1" base ad:0xEC540080 width 24. group.long 0x0++0x03 line.long 0x00 "SSI1-0_BUSIF_MODE,SSI1-0 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI1_BUSIF" "PIO,DMA" endif group.long (0x0+0x04)++0x03 line.long 0x00 "SSI1-0_BUSIF_ADINR,SSI1-0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." if (((per.l(ad:0xEC540080+0x0C))&0x100)==0x100) group.long (0x0+0x08)++0x03 line.long 0x00 "SSI1-0_BUSIF_DALIGN,SSI1-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,?..." bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,?..." else group.long (0x0+0x08)++0x03 line.long 0x00 "SSI1-0_BUSIF_DALIGN,SSI1-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" endif group.long (0x0+0x0C)++0x07 line.long 0x00 "SSI1-0_MODE,SSI1-0 Mode Register" bitfld.long 0x00 13. " FS_MODE ,TDM split mode fs select" "256 fs,128 fs" bitfld.long 0x00 8. " TDM_SPLIT ,TDM split mode enable" "Disabled,Enabled" bitfld.long 0x00 0. " TDM_EXT ,TDM extend mode enable" "Disabled,Enabled" line.long 0x04 "SSI1-0_CONTROL,SSI1-0 Control Register" bitfld.long 0x04 12. " START_3 ,Data transfer 3 start/stop" "Stopped,Started" bitfld.long 0x04 8. " START_2 ,Data transfer 2 start/stop" "Stopped,Started" bitfld.long 0x04 4. " START_1 ,Data transfer 1 start/stop" "Stopped,Started" textline " " bitfld.long 0x04 0. " START_0 ,Data transfer 0 start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI1-0_STATUS,SSI1-0 Status Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ underflow state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Underflow status 3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Underflow status 2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Underflow status 1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Underflow status 0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Overflow status 3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Overflow status 2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Overflow status 1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Overflow status 0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI1-0_INT_ENABLE_MAIN,SSI1-0 Interrupt Enable Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Underflow enable 3" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Underflow enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Underflow enable 1" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Underflow enable 0" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Overflow enable 3" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Overflow enable 2" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Overflow enable 1" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Overflow enable 0" "Disabled,Enabled" else rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI1-0_STATUS,SSI1-0 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR1_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR1_DTST" "No effect,Detected" textline " " bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR1_UIRQ" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR1_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR1_IIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR1_DIRQ" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf1-3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf1-2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf1-1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf1-0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of1-3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of1-2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of1-1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of1-0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI1-0_INT_ENABLE_MAIN,SSI1-0 Interrupt Enable Register" bitfld.long 0x00 29. " FCST ,SSI1_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST ,SSI1_DTST interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIRQ_IE ,SSI1_UIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,SSI1_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI1_IIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,SSI1_DIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Buffer underflow 1-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Buffer underflow 1-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Buffer underflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Buffer underflow 1-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Buffer overflow 1-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Buffer overflow 1-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Buffer overflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Buffer overflow 1-0 interrupt enable" "Disabled,Enabled" endif group.long 0x20++0x03 line.long 0x00 "SSI1-1_BUSIF_MODE,SSI1-1 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI1_BUSIF" "PIO,DMA" endif group.long (0x20+0x04)++0x03 line.long 0x00 "SSI1-1_BUSIF_ADINR,SSI1-1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x20+0x08)++0x03 line.long 0x00 "SSI1-1_BUSIF_DALIGN,SSI1-1 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x40++0x03 line.long 0x00 "SSI1-2_BUSIF_MODE,SSI1-2 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI1_BUSIF" "PIO,DMA" endif group.long (0x40+0x04)++0x03 line.long 0x00 "SSI1-2_BUSIF_ADINR,SSI1-2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x40+0x08)++0x03 line.long 0x00 "SSI1-2_BUSIF_DALIGN,SSI1-2 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x60++0x03 line.long 0x00 "SSI1-3_BUSIF_MODE,SSI1-3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI1_BUSIF" "PIO,DMA" endif group.long (0x60+0x04)++0x03 line.long 0x00 "SSI1-3_BUSIF_ADINR,SSI1-3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x60+0x08)++0x03 line.long 0x00 "SSI1-3_BUSIF_DALIGN,SSI1-3 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" width 14. tree "BUSIF" base ad:0xEC101000 group.long 0x0++0x03 "Audio DMAC" line.long 0x00 "SSI1-0_BUSIF,SSI1-0_BUSIF Data Registers (Audio DMAC)" group.long 0x400++0x03 "Audio DMAC" line.long 0x00 "SSI1-1_BUSIF,SSI1-1_BUSIF Data Registers (Audio DMAC)" group.long 0x800++0x03 "Audio DMAC" line.long 0x00 "SSI1-2_BUSIF,SSI1-2_BUSIF Data Registers (Audio DMAC)" group.long 0xC00++0x03 "Audio DMAC" line.long 0x00 "SSI1-3_BUSIF,SSI1-3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC401000 group.long 0x0++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI1-0_BUSIF,SSI1-0_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x400++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI1-1_BUSIF,SSI1-1_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x800++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI1-2_BUSIF,SSI1-2_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0xC00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI1-3_BUSIF,SSI1-3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "BUSIF 2" base ad:0xEC540100 width 24. group.long 0x0++0x03 line.long 0x00 "SSI2-0_BUSIF_MODE,SSI2-0 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI2_BUSIF" "PIO,DMA" endif group.long (0x0+0x04)++0x03 line.long 0x00 "SSI2-0_BUSIF_ADINR,SSI2-0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." if (((per.l(ad:0xEC540100+0x0C))&0x100)==0x100) group.long (0x0+0x08)++0x03 line.long 0x00 "SSI2-0_BUSIF_DALIGN,SSI2-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,?..." bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,?..." else group.long (0x0+0x08)++0x03 line.long 0x00 "SSI2-0_BUSIF_DALIGN,SSI2-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" endif group.long (0x0+0x0C)++0x07 line.long 0x00 "SSI2-0_MODE,SSI2-0 Mode Register" bitfld.long 0x00 13. " FS_MODE ,TDM split mode fs select" "256 fs,128 fs" bitfld.long 0x00 8. " TDM_SPLIT ,TDM split mode enable" "Disabled,Enabled" bitfld.long 0x00 0. " TDM_EXT ,TDM extend mode enable" "Disabled,Enabled" line.long 0x04 "SSI2-0_CONTROL,SSI2-0 Control Register" bitfld.long 0x04 12. " START_3 ,Data transfer 3 start/stop" "Stopped,Started" bitfld.long 0x04 8. " START_2 ,Data transfer 2 start/stop" "Stopped,Started" bitfld.long 0x04 4. " START_1 ,Data transfer 1 start/stop" "Stopped,Started" textline " " bitfld.long 0x04 0. " START_0 ,Data transfer 0 start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI2-0_STATUS,SSI2-0 Status Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ underflow state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Underflow status 3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Underflow status 2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Underflow status 1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Underflow status 0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Overflow status 3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Overflow status 2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Overflow status 1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Overflow status 0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI2-0_INT_ENABLE_MAIN,SSI2-0 Interrupt Enable Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Underflow enable 3" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Underflow enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Underflow enable 1" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Underflow enable 0" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Overflow enable 3" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Overflow enable 2" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Overflow enable 1" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Overflow enable 0" "Disabled,Enabled" else rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI2-0_STATUS,SSI2-0 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR2_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR2_DTST" "No effect,Detected" textline " " bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR2_UIRQ" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR2_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR2_IIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR2_DIRQ" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf2-3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf2-2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf2-1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf2-0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of2-3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of2-2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of2-1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of2-0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI2-0_INT_ENABLE_MAIN,SSI2-0 Interrupt Enable Register" bitfld.long 0x00 29. " FCST ,SSI2_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST ,SSI2_DTST interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIRQ_IE ,SSI2_UIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,SSI2_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI2_IIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,SSI2_DIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Buffer underflow 2-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Buffer underflow 2-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Buffer underflow 2-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Buffer underflow 2-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Buffer overflow 2-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Buffer overflow 2-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Buffer overflow 2-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Buffer overflow 2-0 interrupt enable" "Disabled,Enabled" endif group.long 0x20++0x03 line.long 0x00 "SSI2-1_BUSIF_MODE,SSI2-1 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI2_BUSIF" "PIO,DMA" endif group.long (0x20+0x04)++0x03 line.long 0x00 "SSI2-1_BUSIF_ADINR,SSI2-1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x20+0x08)++0x03 line.long 0x00 "SSI2-1_BUSIF_DALIGN,SSI2-1 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x40++0x03 line.long 0x00 "SSI2-2_BUSIF_MODE,SSI2-2 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI2_BUSIF" "PIO,DMA" endif group.long (0x40+0x04)++0x03 line.long 0x00 "SSI2-2_BUSIF_ADINR,SSI2-2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x40+0x08)++0x03 line.long 0x00 "SSI2-2_BUSIF_DALIGN,SSI2-2 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x60++0x03 line.long 0x00 "SSI2-3_BUSIF_MODE,SSI2-3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI2_BUSIF" "PIO,DMA" endif group.long (0x60+0x04)++0x03 line.long 0x00 "SSI2-3_BUSIF_ADINR,SSI2-3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x60+0x08)++0x03 line.long 0x00 "SSI2-3_BUSIF_DALIGN,SSI2-3 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" width 14. tree "BUSIF" base ad:0xEC102000 group.long 0x0++0x03 "Audio DMAC" line.long 0x00 "SSI2-0_BUSIF,SSI2-0_BUSIF Data Registers (Audio DMAC)" group.long 0x400++0x03 "Audio DMAC" line.long 0x00 "SSI2-1_BUSIF,SSI2-1_BUSIF Data Registers (Audio DMAC)" group.long 0x800++0x03 "Audio DMAC" line.long 0x00 "SSI2-2_BUSIF,SSI2-2_BUSIF Data Registers (Audio DMAC)" group.long 0xC00++0x03 "Audio DMAC" line.long 0x00 "SSI2-3_BUSIF,SSI2-3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC402000 group.long 0x0++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI2-0_BUSIF,SSI2-0_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x400++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI2-1_BUSIF,SSI2-1_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x800++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI2-2_BUSIF,SSI2-2_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0xC00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI2-3_BUSIF,SSI2-3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "BUSIF 3" base ad:0xEC540180 width 24. group.long 0x00++0x0B line.long 0x00 "SSI3_BUSIF_MODE,SSI3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI3_BUSIF_ADINR,SSI3 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI3_BUSIF_DALIGN,SSI3 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI3_CONTROL,SSI3 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI3_STATUS,SSI3 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI3_INT_ENABLE_MAIN,SSI3 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI3_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI3_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI3_STATUS,SSI3 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR3_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR3_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR3_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR3_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR3_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR3_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI3_INT_ENABLE_MAIN,SSI3 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI3_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI3_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI3_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI3_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI3_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI3_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC103000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI3_BUSIF,SSI3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC403000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI3_BUSIF,SSI3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "BUSIF 4" base ad:0xEC540200 width 24. group.long 0x00++0x0B line.long 0x00 "SSI4_BUSIF_MODE,SSI4 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI4_BUSIF_ADINR,SSI4 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI4_BUSIF_DALIGN,SSI4 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI4_CONTROL,SSI4 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI4_STATUS,SSI4 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI4_INT_ENABLE_MAIN,SSI4 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI4_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI4_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI4_STATUS,SSI4 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR4_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR4_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR4_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR4_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR4_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR4_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI4_INT_ENABLE_MAIN,SSI4 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI4_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI4_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI4_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI4_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI4_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI4_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC104000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI4_BUSIF,SSI4_BUSIF Data Registers (Audio DMAC)" base ad:0xEC404000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI4_BUSIF,SSI4_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "BUSIF 5" base ad:0xEC540280 width 24. group.long 0x00++0x0B line.long 0x00 "SSI5_BUSIF_MODE,SSI5 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI5_BUSIF_ADINR,SSI5 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI5_BUSIF_DALIGN,SSI5 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI5_CONTROL,SSI5 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI5_STATUS,SSI5 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI5_INT_ENABLE_MAIN,SSI5 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI5_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI5_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI5_STATUS,SSI5 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR5_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR5_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR5_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR5_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR5_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR5_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI5_INT_ENABLE_MAIN,SSI5 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI5_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI5_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI5_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI5_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI5_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI5_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC105000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI5_BUSIF,SSI5_BUSIF Data Registers (Audio DMAC)" base ad:0xEC405000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI5_BUSIF,SSI5_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "BUSIF 6" base ad:0xEC540300 width 24. group.long 0x00++0x0B line.long 0x00 "SSI6_BUSIF_MODE,SSI6 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI6_BUSIF_ADINR,SSI6 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI6_BUSIF_DALIGN,SSI6 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI6_CONTROL,SSI6 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI6_STATUS,SSI6 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI6_INT_ENABLE_MAIN,SSI6 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI6_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI6_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI6_STATUS,SSI6 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR6_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR6_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR6_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR6_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR6_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR6_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI6_INT_ENABLE_MAIN,SSI6 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI6_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI6_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI6_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI6_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI6_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI6_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC106000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI6_BUSIF,SSI6_BUSIF Data Registers (Audio DMAC)" base ad:0xEC406000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI6_BUSIF,SSI6_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "BUSIF 7" base ad:0xEC540380 width 24. group.long 0x00++0x0B line.long 0x00 "SSI7_BUSIF_MODE,SSI7 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI7_BUSIF_ADINR,SSI7 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI7_BUSIF_DALIGN,SSI7 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI7_CONTROL,SSI7 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI7_STATUS,SSI7 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI7_INT_ENABLE_MAIN,SSI7 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI7_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI7_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI7_STATUS,SSI7 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR7_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR7_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR7_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR7_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR7_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR7_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI7_INT_ENABLE_MAIN,SSI7 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI7_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI7_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI7_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI7_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI7_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI7_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC107000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI7_BUSIF,SSI7_BUSIF Data Registers (Audio DMAC)" base ad:0xEC407000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI7_BUSIF,SSI7_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "BUSIF 8" base ad:0xEC540400 width 24. group.long 0x00++0x0B line.long 0x00 "SSI8_BUSIF_MODE,SSI8 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "SSI8_BUSIF_ADINR,SSI8 Audio Information Register" bitfld.long 0x04 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x04 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." line.long 0x08 "SSI8_BUSIF_DALIGN,SSI8 BUSIF Data Align Register" bitfld.long 0x08 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x08 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x08 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x08 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x08 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x08 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x08 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" group.long 0x10++0x03 line.long 0x00 "SSI8_CONTROL,SSI8 Control Register" bitfld.long 0x00 0. " START ,Data transfer start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long 0x14++0x03 line.long 0x00 "SSI8_STATUS,SSI8 Status Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSRi_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSRi_DTST" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ idle state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ idle state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ idle state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ idle state" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI8_INT_ENABLE_MAIN,SSI8 Interrupt Enable Register" sif cpuis("RCARV2H")||cpuis("R8A774*") bitfld.long 0x00 29. " FCST_IE ,SSI8_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI8_DTST interrupt enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" else rgroup.long 0x14++0x03 line.long 0x00 "SSI8_STATUS,SSI8 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR8_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR8_DTST" "No effect,Detected" bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR8_UIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR8_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR8_IIRQ" "No effect,Occurred" bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR8_DIRQ" "No effect,Occurred" group.long 0x18++0x03 line.long 0x00 "SSI8_INT_ENABLE_MAIN,SSI8 Interrupt Enable Register" bitfld.long 0x00 29. " FCST_IE ,SSI8_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST_IE ,SSI8_DTST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIRQ_IE ,SSI8_UIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIRQ_IE ,SSI8_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI8_IIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIRQ_IE ,SSI8_DIRQ interrupt enable" "Disabled,Enabled" endif width 14. tree "BUSIF" base ad:0xEC108000 group.long 0x00++0x03 "Audio DMAC" line.long 0x00 "SSI8_BUSIF,SSI8_BUSIF Data Registers (Audio DMAC)" base ad:0xEC408000 group.long 0x00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI8_BUSIF,SSI8_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "BUSIF 9" base ad:0xEC540480 width 24. group.long 0x0++0x03 line.long 0x00 "SSI9-0_BUSIF_MODE,SSI9-0 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI9_BUSIF" "PIO,DMA" endif group.long (0x0+0x04)++0x03 line.long 0x00 "SSI9-0_BUSIF_ADINR,SSI9-0 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." if (((per.l(ad:0xEC540480+0x0C))&0x100)==0x100) group.long (0x0+0x08)++0x03 line.long 0x00 "SSI9-0_BUSIF_DALIGN,SSI9-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,?..." bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,?..." else group.long (0x0+0x08)++0x03 line.long 0x00 "SSI9-0_BUSIF_DALIGN,SSI9-0 BUSIF Data Align Register" bitfld.long 0x00 28.--30. " PLACE7 ,Exchange stream data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE6 ,Exchange stream data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE5 ,Exchange stream data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE4 ,Exchange stream data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE3 ,Exchange stream data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE2 ,Exchange stream data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE1 ,Exchange stream data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE0 ,Exchange stream data 0" "0,1,2,3,4,5,6,7" endif group.long (0x0+0x0C)++0x07 line.long 0x00 "SSI9-0_MODE,SSI9-0 Mode Register" bitfld.long 0x00 13. " FS_MODE ,TDM split mode fs select" "256 fs,128 fs" bitfld.long 0x00 8. " TDM_SPLIT ,TDM split mode enable" "Disabled,Enabled" bitfld.long 0x00 0. " TDM_EXT ,TDM extend mode enable" "Disabled,Enabled" line.long 0x04 "SSI9-0_CONTROL,SSI9-0 Control Register" bitfld.long 0x04 12. " START_3 ,Data transfer 3 start/stop" "Stopped,Started" bitfld.long 0x04 8. " START_2 ,Data transfer 2 start/stop" "Stopped,Started" bitfld.long 0x04 4. " START_1 ,Data transfer 1 start/stop" "Stopped,Started" textline " " bitfld.long 0x04 0. " START_0 ,Data transfer 0 start/stop" "Stopped,Started" sif !cpuis("R8A77440") rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI9-0_STATUS,SSI9-0 Status Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ ,UIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,OIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,IIRQ underflow state" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,DIRQ underflow state" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Underflow status 3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Underflow status 2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Underflow status 1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Underflow status 0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Overflow status 3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Overflow status 2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Overflow status 1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Overflow status 0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI9-0_INT_ENABLE_MAIN,SSI9-0 Interrupt Enable Register" sif cpuis("R8A774*") bitfld.long 0x00 29. " FCST ,FCST underflow state" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,DTST underflow state" "No effect,Detected" textline " " endif bitfld.long 0x00 27. " UIRQ_IE ,UIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,OIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,IIRQ underflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,DIRQ underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Underflow enable 3" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Underflow enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Underflow enable 1" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Underflow enable 0" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Overflow enable 3" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Overflow enable 2" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Overflow enable 1" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Overflow enable 0" "Disabled,Enabled" else rgroup.long (0x0+0x14)++0x03 line.long 0x00 "SSI9-0_STATUS,SSI9-0 Status Register" bitfld.long 0x00 29. " FCST ,Indicates the state of SSIFSR9_FCST" "No effect,Stopped" bitfld.long 0x00 28. " DTST ,Indicates the state of SSIFSR9_DTST" "No effect,Detected" textline " " bitfld.long 0x00 27. " UIRQ ,Indicates the state of SSISR9_UIRQ" "No effect,Occurred" bitfld.long 0x00 26. " OIRQ ,Indicates the state of SSISR9_OIRQ" "No effect,Occurred" bitfld.long 0x00 25. " IIRQ ,Indicates the state of SSISR9_IIRQ" "No effect,Occurred" textline " " bitfld.long 0x00 24. " DIRQ ,Indicates the state of SSISR9_DIRQ" "No effect,Occurred" bitfld.long 0x00 15. " UF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf9-3" "No effect,Occurred" bitfld.long 0x00 14. " UF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf9-2" "No effect,Occurred" textline " " bitfld.long 0x00 13. " UF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf9-1" "No effect,Occurred" bitfld.long 0x00 12. " UF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.uf9-0" "No effect,Occurred" bitfld.long 0x00 11. " OF_3 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of9-3" "No effect,Occurred" textline " " bitfld.long 0x00 10. " OF_2 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of9-2" "No effect,Occurred" bitfld.long 0x00 9. " OF_1 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of9-1" "No effect,Occurred" bitfld.long 0x00 8. " OF_0 ,Indicates the state of SSI_SYSTEM_STATUS2/3.of9-0" "No effect,Occurred" group.long (0x0+0x18)++0x03 line.long 0x00 "SSI9-0_INT_ENABLE_MAIN,SSI9-0 Interrupt Enable Register" bitfld.long 0x00 29. " FCST ,SSI9_FCST interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28. " DTST ,SSI9_DTST interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIRQ_IE ,SSI9_UIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIRQ_IE ,SSI9_OIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIRQ_IE ,SSI9_IIRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIRQ_IE ,SSI9_DIRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 15. " UF_3_IE ,Buffer underflow 9-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14. " UF_2_IE ,Buffer underflow 9-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " UF_1_IE ,Buffer underflow 9-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " UF_0_IE ,Buffer underflow 9-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 11. " OF_3_IE ,Buffer overflow 9-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " OF_2_IE ,Buffer overflow 9-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " OF_1_IE ,Buffer overflow 9-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " OF_0_IE ,Buffer overflow 9-0 interrupt enable" "Disabled,Enabled" endif group.long 0x20++0x03 line.long 0x00 "SSI9-1_BUSIF_MODE,SSI9-1 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI9_BUSIF" "PIO,DMA" endif group.long (0x20+0x04)++0x03 line.long 0x00 "SSI9-1_BUSIF_ADINR,SSI9-1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x20+0x08)++0x03 line.long 0x00 "SSI9-1_BUSIF_DALIGN,SSI9-1 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x40++0x03 line.long 0x00 "SSI9-2_BUSIF_MODE,SSI9-2 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI9_BUSIF" "PIO,DMA" endif group.long (0x40+0x04)++0x03 line.long 0x00 "SSI9-2_BUSIF_ADINR,SSI9-2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x40+0x08)++0x03 line.long 0x00 "SSI9-2_BUSIF_DALIGN,SSI9-2 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" group.long 0x60++0x03 line.long 0x00 "SSI9-3_BUSIF_MODE,SSI9-3 BUSIF Mode Register" bitfld.long 0x00 20. " SFT_DIR ,Select bit shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " WORD_SWAP ,Word swap" "Disabled,Enabled" textline " " sif !cpuis("R8A77440") bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else bitfld.long 0x00 0. " DMA ,Selects the access type for SSI9_BUSIF" "PIO,DMA" endif group.long (0x60+0x04)++0x03 line.long 0x00 "SSI9-3_BUSIF_ADINR,SSI9-3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit length of output audio data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x00 0.--3. " CHNUM ,Channel number" "None,1 channel,2 channels,?..." group.long (0x60+0x08)++0x03 line.long 0x00 "SSI9-3_BUSIF_DALIGN,SSI9-3 BUSIF Data Align Register" bitfld.long 0x00 4. " PLACE1 ,Exchange stream data 1" "0,1" bitfld.long 0x00 0. " PLACE0 ,Exchange stream data 0" "0,1" width 14. tree "BUSIF" base ad:0xEC109000 group.long 0x0++0x03 "Audio DMAC" line.long 0x00 "SSI9-0_BUSIF,SSI9-0_BUSIF Data Registers (Audio DMAC)" group.long 0x400++0x03 "Audio DMAC" line.long 0x00 "SSI9-1_BUSIF,SSI9-1_BUSIF Data Registers (Audio DMAC)" group.long 0x800++0x03 "Audio DMAC" line.long 0x00 "SSI9-2_BUSIF,SSI9-2_BUSIF Data Registers (Audio DMAC)" group.long 0xC00++0x03 "Audio DMAC" line.long 0x00 "SSI9-3_BUSIF,SSI9-3_BUSIF Data Registers (Audio DMAC)" base ad:0xEC409000 group.long 0x0++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI9-0_BUSIF,SSI9-0_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x400++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI9-1_BUSIF,SSI9-1_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0x800++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI9-2_BUSIF,SSI9-2_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" group.long 0xC00++0x03 "DMAC Peripheral-Peripheral" line.long 0x00 "SSI9-3_BUSIF,SSI9-3_BUSIF Data Registers (Audio DMAC Peripheral-Peripheral)" tree.end width 0x0B tree.end tree "SSIU" base ad:0xEC540800 width 13. sif !cpuis("R8A7792X") group.long 0x00++0x03 line.long 0x00 "SSI_MODE0,SSI Mode Register 0" bitfld.long 0x00 25. " IND_WORD_SWAP9 ,Word order swap 9" "Not swapped,Swapped" bitfld.long 0x00 24. " IND_WORD_SWAP8 ,Word order swap 8" "Not swapped,Swapped" bitfld.long 0x00 23. " IND_WORD_SWAP7 ,Word order swap 7" "Not swapped,Swapped" textline " " bitfld.long 0x00 22. " IND_WORD_SWAP6 ,Word order swap 6" "Not swapped,Swapped" bitfld.long 0x00 21. " IND_WORD_SWAP5 ,Word order swap 5" "Not swapped,Swapped" bitfld.long 0x00 20. " IND_WORD_SWAP4 ,Word order swap 4" "Not swapped,Swapped" textline " " bitfld.long 0x00 19. " IND_WORD_SWAP3 ,Word order swap 3" "Not swapped,Swapped" bitfld.long 0x00 18. " IND_WORD_SWAP2 ,Word order swap 2" "Not swapped,Swapped" bitfld.long 0x00 17. " IND_WORD_SWAP1 ,Word order swap 1" "Not swapped,Swapped" textline " " bitfld.long 0x00 16. " IND_WORD_SWAP0 ,Word order swap 0" "Not swapped,Swapped" bitfld.long 0x00 9. " IND9 ,Independent SSI transfer status 9" "Not performed,Performed" bitfld.long 0x00 8. " IND8 ,Independent SSI transfer status 8" "Not performed,Performed" textline " " bitfld.long 0x00 7. " IND7 ,Independent SSI transfer status 7" "Not performed,Performed" bitfld.long 0x00 6. " IND6 ,Independent SSI transfer status 6" "Not performed,Performed" bitfld.long 0x00 5. " IND5 ,Independent SSI transfer status 5" "Not performed,Performed" textline " " bitfld.long 0x00 4. " IND4 ,Independent SSI transfer status 4" "Not performed,Performed" bitfld.long 0x00 3. " IND3 ,Independent SSI transfer status 3" "Not performed,Performed" bitfld.long 0x00 2. " IND2 ,Independent SSI transfer status 2" "Not performed,Performed" textline " " bitfld.long 0x00 1. " IND1 ,Independent SSI transfer status 1" "Not performed,Performed" bitfld.long 0x00 0. " IND0 ,Independent SSI transfer status 0" "Not performed,Performed" else group.long 0x00++0x03 line.long 0x00 "SSI_MODE0,SSI Mode Register 0" bitfld.long 0x00 20. " IND_WORD_SWAP4 ,Word order swap 4" "Not swapped,Swapped" bitfld.long 0x00 19. " IND_WORD_SWAP3 ,Word order swap 3" "Not swapped,Swapped" textline " " bitfld.long 0x00 4. " IND4 ,Independent SSI transfer status 4" "Not performed,Performed" bitfld.long 0x00 3. " IND3 ,Independent SSI transfer status 3" "Not performed,Performed" endif group.long 0x04++0x03 line.long 0x00 "SSI_MODE1,SSI Mode Register 1" bitfld.long 0x00 20. " SSI34_SYNC ,SSI3 and SSI4 synchronize" "Not synchronized,Synchronized" bitfld.long 0x00 16.--17. " SSI4_PIN ,SSI4 pin mode" "Own pins,Slaves,Master/Slave,?..." sif !cpuis("R8A7792X") bitfld.long 0x00 4. " SSI012_3MOD ,Use SSI0/SSI1/SSI2 together as six channels" "Disabled,Enabled" textline " " bitfld.long 0x00 2.--3. " SSI2_PIN ,SS2 pin mode" "Own pins,Slaves,Master/Slave,?..." bitfld.long 0x00 0.--1. " SSI1_PIN ,SS1 pin mode" "Own pins,Slaves,Master/Slave,?..." endif sif !cpuis("R8A7792X") group.long 0x08++0x07 line.long 0x00 "SSI_MODE2,SSI Mode Register 2" bitfld.long 0x00 4. " SSI0129_4MOD ,Use SSI0/SSI1/SSI2/SSI9 together as eight channels" "Disabled,Enabled" bitfld.long 0x00 0.--2. " SSI9_PIN ,SSI9 pin mode" "Own pins,Slaves,Master/Slave,,,Slaves,Master/Slave,?..." line.long 0x04 "SSI_MODE3,SSI Mode Register 3" bitfld.long 0x04 0.--1. " SSI3_PIN ,SSI3 pin mode" "Own pins,Slaves,Master/Slave,?..." endif group.long 0x10++0x03 line.long 0x00 "SSI_CONTROL,SSI Control Register" bitfld.long 0x00 4. " SSI34 ,SSI34 enable" "Disabled,Enabled" sif !cpuis("R8A7792X") bitfld.long 0x00 0. " SSI0129 ,SSI0129 enable" "Disabled,Enabled" endif textline " " width 24. sif !cpuis("R8A7792X") group.long 0x40++0x1F line.long 0x00 "SSI_SYSTEM_STATUS0,SSI SYSTEM Status Register 0" eventfld.long 0x00 11. " OF2-3 ,Buffer overflow 2-3" "Not occurred,Occurred" eventfld.long 0x00 10. " OF2-2 ,Buffer overflow 2-2" "Not occurred,Occurred" eventfld.long 0x00 9. " OF2-1 ,Buffer overflow 2-1" "Not occurred,Occurred" textline " " eventfld.long 0x00 8. " OF2-0 ,Buffer overflow 2-0" "Not occurred,Occurred" eventfld.long 0x00 7. " OF1-3 ,Buffer overflow 1-3" "Not occurred,Occurred" eventfld.long 0x00 6. " OF1-2 ,Buffer overflow 1-2" "Not occurred,Occurred" textline " " eventfld.long 0x00 5. " OF1-1 ,Buffer overflow 1-1" "Not occurred,Occurred" eventfld.long 0x00 4. " OF1-0 ,Buffer overflow 1-0" "Not occurred,Occurred" eventfld.long 0x00 3. " OF0-3 ,Buffer overflow 0-3" "Not occurred,Occurred" textline " " eventfld.long 0x00 2. " OF0-2 ,Buffer overflow 0-2" "Not occurred,Occurred" eventfld.long 0x00 1. " OF0-1 ,Buffer overflow 0-1" "Not occurred,Occurred" eventfld.long 0x00 0. " OF0-0 ,Buffer overflow 0-0" "Not occurred,Occurred" line.long 0x04 "SSI_SYSTEM_STATUS1,SSI SYSTEM Status Register 1" eventfld.long 0x04 7. " OF9-3 ,Buffer overflow 9-3" "Not occurred,Occurred" eventfld.long 0x04 6. " OF9-2 ,Buffer overflow 9-2" "Not occurred,Occurred" eventfld.long 0x04 5. " OF9-1 ,Buffer overflow 9-1" "Not occurred,Occurred" textline " " eventfld.long 0x04 4. " OF9-0 ,Buffer overflow 9-0" "Not occurred,Occurred" line.long 0x08 "SSI_SYSTEM_STATUS2,SSI SYSTEM Status Register 2" eventfld.long 0x08 11. " UF2-3 ,Buffer underflow 2-3" "Not occurred,Occurred" eventfld.long 0x08 10. " UF2-2 ,Buffer underflow 2-2" "Not occurred,Occurred" eventfld.long 0x08 9. " UF2-1 ,Buffer underflow 2-1" "Not occurred,Occurred" textline " " eventfld.long 0x08 8. " UF2-0 ,Buffer underflow 2-0" "Not occurred,Occurred" eventfld.long 0x08 7. " UF1-3 ,Buffer underflow 1-3" "Not occurred,Occurred" eventfld.long 0x08 6. " UF1-2 ,Buffer underflow 1-2" "Not occurred,Occurred" textline " " eventfld.long 0x08 5. " UF1-1 ,Buffer underflow 1-1" "Not occurred,Occurred" eventfld.long 0x08 4. " UF1-0 ,Buffer underflow 1-0" "Not occurred,Occurred" eventfld.long 0x08 3. " UF0-3 ,Buffer underflow 0-3" "Not occurred,Occurred" textline " " eventfld.long 0x08 2. " UF0-2 ,Buffer underflow 0-2" "Not occurred,Occurred" eventfld.long 0x08 1. " UF0-1 ,Buffer underflow 0-1" "Not occurred,Occurred" eventfld.long 0x08 0. " UF0-0 ,Buffer underflow 0-0" "Not occurred,Occurred" line.long 0x0C "SSI_SYSTEM_STATUS3,SSI SYSTEM Status Register 3" eventfld.long 0x0C 7. " UF9-3 ,Buffer underflow 9-3" "Not occurred,Occurred" eventfld.long 0x0C 6. " UF9-2 ,Buffer underflow 9-2" "Not occurred,Occurred" eventfld.long 0x0C 5. " UF9-1 ,Buffer underflow 9-1" "Not occurred,Occurred" textline " " eventfld.long 0x0C 4. " UF9-0 ,Buffer underflow 9-0" "Not occurred,Occurred" textline " " line.long 0x10 "SSI_SYSTEM_INT_ENABLE0,SSI SYSTEM Interrupt Enable Register 0" bitfld.long 0x10 11. " OF2-3_IE ,Buffer overflow 2-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 10. " OF2-2_IE ,Buffer overflow 2-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 9. " OF2-1_IE ,Buffer overflow 2-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 8. " OF2-0_IE ,Buffer overflow 2-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 7. " OF1-3_IE ,Buffer overflow 1-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 6. " OF1-2_IE ,Buffer overflow 1-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " OF1-1_IE ,Buffer overflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 4. " OF1-0_IE ,Buffer overflow 1-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 3. " OF0-3_IE ,Buffer overflow 0-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x10 2. " OF0-2_IE ,Buffer overflow 0-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 1. " OF0-1_IE ,Buffer overflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x10 0. " OF0-0_IE ,Buffer overflow 0-0 interrupt enable" "Disabled,Enabled" line.long 0x14 "SSI_SYSTEM_INT_ENABLE1,SSI SYSTEM Interrupt Enable Register 1" bitfld.long 0x14 7. " OF9-3 ,Buffer overflow 9-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 6. " OF9-2 ,Buffer overflow 9-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x14 5. " OF9-1 ,Buffer overflow 9-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x14 4. " OF9-0 ,Buffer overflow 9-0 interrupt enable" "Disabled,Enabled" line.long 0x18 "SSI_SYSTEM_INT_ENABLE2,SSI SYSTEM Interrupt Enable Register 2" bitfld.long 0x18 11. " UF2-3_IE ,Buffer underflow 2-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 10. " UF2-2_IE ,Buffer underflow 2-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 9. " UF2-1_IE ,Buffer underflow 2-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 8. " UF2-0_IE ,Buffer underflow 2-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 7. " UF1-3_IE ,Buffer underflow 1-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 6. " UF1-2_IE ,Buffer underflow 1-2 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 5. " UF1-1_IE ,Buffer underflow 1-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 4. " UF1-0_IE ,Buffer underflow 1-0 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 3. " UF0-3_IE ,Buffer underflow 0-3 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x18 2. " UF0-2_IE ,Buffer underflow 0-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 1. " UF0-1_IE ,Buffer underflow 0-1 interrupt enable" "Disabled,Enabled" bitfld.long 0x18 0. " UF0-0_IE ,Buffer underflow 0-0 interrupt enable" "Disabled,Enabled" line.long 0x1C "SSI_SYSTEM_INT_ENABLE3,SSI SYSTEM Interrupt Enable Register 3" bitfld.long 0x1C 7. " UF9-3_IE ,Buffer underflow 9-3 interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 6. " UF9-2_IE ,Buffer underflow 9-2 interrupt enable" "Disabled,Enabled" bitfld.long 0x1C 5. " UF9-1_IE ,Buffer underflow 9-1 interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x1C 4. " UF9-0_IE ,Buffer underflow 9-0 interrupt enable" "Disabled,Enabled" endif width 0x0B tree.end tree.end tree.open "SSI (Serial Sound Interface)" tree "Channel 0" base ad:0xEC541000 width 15. if (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541000+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541000+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541000+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541000+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541000))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541000))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR0,Control Register 0" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541000))&0x02)==0x00)&&(((per.l(ad:0xEC541000+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR0,Status Register 0" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541000))&0x02)==0x02)&&(((per.l(ad:0xEC541000+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR0,Status Register 0" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541000))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR0,Status Register 0" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR0,Status Register 0" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR0,Transmit Data Register 0" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR0,Receive Data Register 0" if (((per.l(ad:0xEC541000+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541000))&0xc000)==0xc000)||(((per.l(ad:0xEC541000))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541000+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541000))&0xc000)==0xc000))||(((per.l(ad:0xEC541000))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541000+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541000+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541000+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541000))&0xc000)==0xc000))||(((per.l(ad:0xEC541000))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR0,WS Mode Register 0" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR0,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR0,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE0,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 1" base ad:0xEC541040 width 15. if (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541040+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541040+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541040+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541040+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541040))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541040))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR1,Control Register 1" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541040))&0x02)==0x00)&&(((per.l(ad:0xEC541040+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR1,Status Register 1" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541040))&0x02)==0x02)&&(((per.l(ad:0xEC541040+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR1,Status Register 1" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541040))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR1,Status Register 1" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR1,Status Register 1" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR1,Transmit Data Register 1" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR1,Receive Data Register 1" if (((per.l(ad:0xEC541040+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541040))&0xc000)==0xc000)||(((per.l(ad:0xEC541040))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541040+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541040))&0xc000)==0xc000))||(((per.l(ad:0xEC541040))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541040+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541040+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541040+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541040))&0xc000)==0xc000))||(((per.l(ad:0xEC541040))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR1,WS Mode Register 1" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR1,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR1,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE1,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 2" base ad:0xEC541080 width 15. if (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541080+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541080+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541080+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541080+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541080))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541080))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR2,Control Register 2" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541080))&0x02)==0x00)&&(((per.l(ad:0xEC541080+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR2,Status Register 2" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541080))&0x02)==0x02)&&(((per.l(ad:0xEC541080+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR2,Status Register 2" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541080))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR2,Status Register 2" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR2,Status Register 2" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR2,Transmit Data Register 2" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR2,Receive Data Register 2" if (((per.l(ad:0xEC541080+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541080))&0xc000)==0xc000)||(((per.l(ad:0xEC541080))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541080+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541080))&0xc000)==0xc000))||(((per.l(ad:0xEC541080))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541080+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541080+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541080+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541080))&0xc000)==0xc000))||(((per.l(ad:0xEC541080))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR2,WS Mode Register 2" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR2,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR2,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE2,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 3" base ad:0xEC5410C0 width 15. if (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5410C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5410C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5410C0))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR3,Control Register 3" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC5410C0))&0x02)==0x00)&&(((per.l(ad:0xEC5410C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC5410C0))&0x02)==0x02)&&(((per.l(ad:0xEC5410C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC5410C0))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR3,Status Register 3" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR3,Transmit Data Register 3" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR3,Receive Data Register 3" if (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC5410C0))&0xc000)==0xc000)||(((per.l(ad:0xEC5410C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC5410C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5410C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5410C0+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC5410C0+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC5410C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5410C0))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR3,WS Mode Register 3" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR3,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR3,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE3,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 4" base ad:0xEC541100 width 15. if (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541100+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541100))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541100))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR4,Control Register 4" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541100))&0x02)==0x00)&&(((per.l(ad:0xEC541100+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541100))&0x02)==0x02)&&(((per.l(ad:0xEC541100+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541100))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR4,Status Register 4" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR4,Transmit Data Register 4" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR4,Receive Data Register 4" if (((per.l(ad:0xEC541100+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541100))&0xc000)==0xc000)||(((per.l(ad:0xEC541100))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541100+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541100))&0xc000)==0xc000))||(((per.l(ad:0xEC541100))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541100+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541100+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541100+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541100))&0xc000)==0xc000))||(((per.l(ad:0xEC541100))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR4,WS Mode Register 4" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR4,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR4,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE4,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree "Channel 5" base ad:0xEC541140 width 15. if (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541140+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541140+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541140+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541140+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541140))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541140))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR5,Control Register 5" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541140))&0x02)==0x00)&&(((per.l(ad:0xEC541140+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR5,Status Register 5" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541140))&0x02)==0x02)&&(((per.l(ad:0xEC541140+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR5,Status Register 5" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541140))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR5,Status Register 5" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR5,Status Register 5" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR5,Transmit Data Register 5" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR5,Receive Data Register 5" if (((per.l(ad:0xEC541140+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541140))&0xc000)==0xc000)||(((per.l(ad:0xEC541140))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541140+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541140))&0xc000)==0xc000))||(((per.l(ad:0xEC541140))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541140+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541140+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541140+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541140))&0xc000)==0xc000))||(((per.l(ad:0xEC541140))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR5,WS Mode Register 5" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR5,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR5,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") endif width 0xb tree.end tree "Channel 6" base ad:0xEC541180 width 15. if (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541180+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541180+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541180+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541180+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541180))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541180))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR6,Control Register 6" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541180))&0x02)==0x00)&&(((per.l(ad:0xEC541180+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR6,Status Register 6" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541180))&0x02)==0x02)&&(((per.l(ad:0xEC541180+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR6,Status Register 6" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541180))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR6,Status Register 6" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR6,Status Register 6" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR6,Transmit Data Register 6" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR6,Receive Data Register 6" if (((per.l(ad:0xEC541180+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541180))&0xc000)==0xc000)||(((per.l(ad:0xEC541180))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541180+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541180))&0xc000)==0xc000))||(((per.l(ad:0xEC541180))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541180+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541180+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541180+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541180))&0xc000)==0xc000))||(((per.l(ad:0xEC541180))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR6,WS Mode Register 6" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR6,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR6,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") endif width 0xb tree.end tree "Channel 7" base ad:0xEC5411C0 width 15. if (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5411C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC5411C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5411C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC5411C0+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC5411C0))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC5411C0))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR7,Control Register 7" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC5411C0))&0x02)==0x00)&&(((per.l(ad:0xEC5411C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR7,Status Register 7" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC5411C0))&0x02)==0x02)&&(((per.l(ad:0xEC5411C0+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR7,Status Register 7" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC5411C0))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR7,Status Register 7" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR7,Status Register 7" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR7,Transmit Data Register 7" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR7,Receive Data Register 7" if (((per.l(ad:0xEC5411C0+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC5411C0))&0xc000)==0xc000)||(((per.l(ad:0xEC5411C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5411C0+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC5411C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5411C0))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5411C0+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC5411C0+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC5411C0+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC5411C0))&0xc000)==0xc000))||(((per.l(ad:0xEC5411C0))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR7,WS Mode Register 7" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR7,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR7,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") endif width 0xb tree.end tree "Channel 8" base ad:0xEC541200 width 15. if (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541200+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541200+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541200+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541200+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541200))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541200))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR8,Control Register 8" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541200))&0x02)==0x00)&&(((per.l(ad:0xEC541200+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR8,Status Register 8" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541200))&0x02)==0x02)&&(((per.l(ad:0xEC541200+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR8,Status Register 8" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541200))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR8,Status Register 8" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR8,Status Register 8" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR8,Transmit Data Register 8" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR8,Receive Data Register 8" if (((per.l(ad:0xEC541200+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541200))&0xc000)==0xc000)||(((per.l(ad:0xEC541200))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541200+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541200))&0xc000)==0xc000))||(((per.l(ad:0xEC541200))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541200+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541200+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541200+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541200))&0xc000)==0xc000))||(((per.l(ad:0xEC541200))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR8,WS Mode Register 8" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR8,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR8,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") endif width 0xb tree.end tree "Channel 9" base ad:0xEC541240 width 15. if (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" "OV_CLK/1,OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||(cpuis("R8A7792X"))||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00100)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,2,3,4" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (First/Second channel)" "Low/High,High/Low" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00001)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12,?..." bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x1f1003)==0x00101)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " else bitfld.long 0x00 31. " FORCE ,DMA Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" ",4,6,8" bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,18,20,22,24,32,?..." textline " " bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "8,16,24,32,48,64,128,256" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (system word 1/otherwise)" "High/Low,Low/High" bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" textline " " bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,Padding bits" bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,Right" textline " " bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541240+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x103)==0x00003)&&(((per.l(ad:0xEC541240+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541240+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x0000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240+0x20))&0x103)==0x103)&&(((per.l(ad:0xEC541240+0x20))&0x1f0000)>0x00000)&&(((per.l(ad:0xEC541240))&0x8004)==0x8000) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22.--23. " CHNL ,Channels in each system word" "1,?..." textline " " bitfld.long 0x00 19.--21. " DWL ,Data Word Length (bit)" "8,16,?..." bitfld.long 0x00 16.--18. " SWL ,System Word Length (bit)" "16,32,48,64,96,128,256,512" textline " " bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" textline " " bitfld.long 0x00 11. " SPDP ,Serial Padding Polarity" "Low,High" bitfld.long 0x00 10. " SDTA ,Serial Data Alignment" "Serial data,?..." textline " " bitfld.long 0x00 09. " PDTA ,Parallel Data Alignment" "Left,?..." bitfld.long 0x00 08. " DEL ,Serial Data Delay" "1 cycle,No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" elif (((per.l(ad:0xEC541240))&0x8004)==0x0004) group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 04.--06. " CKDV ,Serial Oversampling Clock Division Ratio" ",OV_CLK/2,OV_CLK/4,OV_CLK/8,OV_CLK/16,OV_CLK/6,OV_CLK/12," textline " " endif bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" sif (cpu()!="RCARH2")&&(cpu()!="RCARM2")&&(!cpuis("R8A7792X"))&&(!cpuis("R8J7795*"))&&(!cpuis("R8A7795*")) bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" else group.long 0x0++0x03 line.long 0x00 "SSICR9,Control Register 9" sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 29. " FIEN ,Frequency Switching Detection Interrupt Enable" "Disabled,Enabled" textline " " endif bitfld.long 0x00 28. " DMEN ,DMA Enable" "Disabled,Enabled" bitfld.long 0x00 27. " UIEN ,Underflow Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 26. " OIEN ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " IIEN ,Idle Mode Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 24. " DIEN ,Data Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 15. " SCKD ,Serial Bit Clock Direction" "Input/Slave mode,Output/Master mode" textline " " bitfld.long 0x00 14. " SWSD ,Serial Word Selection Signal Direction" "Input/Slave mode,Output/Master mode" bitfld.long 0x00 13. " SCKP ,Serial Clock Polarity" "Falling edge,Rising edge" textline " " bitfld.long 0x00 12. " SWSP ,Serial Word Selection Signal polarity (WIDTH bits in the WS mode register/otherwise)" "High/Low,Low/High" bitfld.long 0x00 08. " DEL ,Serial Data Delay" ",No delay" textline " " sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " else bitfld.long 0x00 07. " BREN ,Burst Mode Enable" "Disabled,Enabled" bitfld.long 0x00 03. " MUEN ,Mute Enable" "Not muted,Muted" textline " " endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " else bitfld.long 0x00 02. " CPEN ,Compressed Mode Enable" "Disabled,Enabled" bitfld.long 0x00 01. " TRMD ,Transmit/Receive Mode Select" "Receive,Transmit" textline " " endif bitfld.long 0x00 00. " EN ,SSI Module Enable" "Disabled,Enabled" endif if ((((per.l(ad:0xEC541240))&0x02)==0x00)&&(((per.l(ad:0xEC541240+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR9,Status Register 9" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif ((((per.l(ad:0xEC541240))&0x02)==0x02)&&(((per.l(ad:0xEC541240+0x20))&0x101)==0x000)) group.long 0x04++0x03 line.long 0x00 "SSISR9,Status Register 9" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 02.--03. " CHNO ,Channel Number" "0,1,2,3" textline " " bitfld.long 0x00 01. " SWNO ,System Word Number" "0,1" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" elif (((per.l(ad:0xEC541240))&0x02)==0x00) group.long 0x04++0x03 line.long 0x00 "SSISR9,Status Register 9" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No unread data,Unread data" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "No unread data,Unread data" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" else group.long 0x04++0x03 line.long 0x00 "SSISR9,Status Register 9" bitfld.long 0x00 28. " DMRQ ,DMA Request Status Flag" "No data requested,Data requested" bitfld.long 0x00 27. " UIRQ ,Underflow Error Interrupt Status Flag" "No underflow,Underflow" textline " " bitfld.long 0x00 26. " OIRQ ,Overflow Error Interrupt Status Register" "No overflow,Overflow" bitfld.long 0x00 25. " IIRQ ,Idle Mode Interrupt Status Flag" "Not idle,Idle" textline " " bitfld.long 0x00 24. " DIRQ ,Data Interrupt Status Flag" "Buffer full,Buffer empty" bitfld.long 0x00 00. " IDST ,Idle Mode Status Flag" "Not completed,Completed" endif group.long 0x08++0x03 line.long 0x00 "SSITDR9,Transmit Data Register 9" rgroup.long 0x0C++0x03 line.long 0x00 "SSIRDR9,Receive Data Register 9" if (((per.l(ad:0xEC541240+0x20))&0x3)==0x1)&&((((per.l(ad:0xEC541240))&0xc000)==0xc000)||(((per.l(ad:0xEC541240))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541240+0x20))&0x3)==0x3)&&(((((per.l(ad:0xEC541240))&0xc000)==0xc000))||(((per.l(ad:0xEC541240))&0x8000)==0x0000)) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541240+0x20))&0x3)==0x1) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" "TDM format,?..." textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif (((per.l(ad:0xEC541240+0x20))&0x3)==0x3) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" elif ((((per.l(ad:0xEC541240+0x20))&0x1)==0x0)&&(((((per.l(ad:0xEC541240))&0xc000)==0xc000))||(((per.l(ad:0xEC541240))&0x8000)==0x0000))) group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" bitfld.long 0x00 8. " CONT ,WS Continue Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" else group.long 0x20++0x03 line.long 0x00 "SSIWSR9,WS Mode Register 9" bitfld.long 0x00 16.--20. " WIDTH ,SYNC Pulse Width Change" ",1 cycle of SCK,2 cycles of SCK,3 cycles of SCK,4 cycles of SCK,5 cycles of SCK,6 cycles of SCK,7 cycles of SCK,8 cycles of SCK,9 cycles of SCK,10 cycles of SCK,11 cycles of SCK,12 cycles of SCK,13 cycles of SCK,14 cycles of SCK,15 cycles of SCK,16 cycles of SCK,17 cycles of SCK,18 cycles of SCK,19 cycles of SCK,20 cycles of SCK,21 cycles of SCK,22 cycles of SCK,23 cycles of SCK,24 cycles of SCK,25 cycles of SCK,26 cycles of SCK,27 cycles of SCK,28 cycles of SCK,29 cycles of SCK,30 cycles of SCK,31 cycles of SCK" textline " " bitfld.long 0x00 1. " MONO ,TDM Format/Monaural Format" "TDM,Monaural" bitfld.long 0x00 0. " WS_MODE ,WS Mode" "Stereo/multi-channel/compressed,TDM/monaural" endif sif (cpu()=="RCARH2")||(cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("R8A7792X")||cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x24++0x3 line.long 0x00 "SSIFMR9,FS Mode Register" bitfld.long 0x00 16.--21. " DTCT ,Frequency Switching Detection Range Set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 4.--5. " CTDV ,Bus Clock Division Ratio" ",,,Bclkf/8" textline " " bitfld.long 0x00 0. " FSEN ,Frequency Switching Detection Function Enable" "Disabled,Enabled" rgroup.long 0x28++0x3 line.long 0x00 "SSIFSR9,FS Status Register" bitfld.long 0x00 15. " FCST ,WS Stopped Status Flag" "Not stopped,Stopped" bitfld.long 0x00 14. " DTST ,Frequency Switching Detection Status Flag" "Not detected,Detected" textline " " hexmask.long.word 0x00 0.--11. 1. " FCNT ,Frequency Count Monitor" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x03 line.long 0x00 "SSICRE9,Control Register Extend" bitfld.long 0x00 0. " CHNL2 ,Extension bit of SSICR.CHNL[1:0]" "Default value,TDM = 16 words" endif width 0xb tree.end tree.end tree "ADG (Audio Clock Generator)" base ad:0xEC5A0000 width 16. group.long 0x00++0x17 line.long 0x00 "BRRA,BRGA Baud Rate Set Register" bitfld.long 0x00 8.--9. " CKS ,Clock Source Select for Baud Rate Generator A" "ACLK_A,ACLK_A/4,ACLK_A/16,ACLK_A/64" hexmask.long.byte 0x00 0.--7. 1. " BRRA ,Dividing Factor Set" line.long 0x04 "BRRB,BRGB Baud Rate Set Register" bitfld.long 0x04 8.--9. " CKS ,Clock Source Select for Baud Rate Generator B" "ACLK_B,ACLK_B/4,ACLK_B/16,ACLK_B/64" hexmask.long.byte 0x04 0.--7. 1. " BRRB ,Dividing Factor Set" textline " " line.long 0x08 "SSICKR,Clock Select Register" bitfld.long 0x08 31. " SSICKR_31 ,Selects the clock output to the external pin AUDIO_CLKOUT" "BRGA output,BRGB output" bitfld.long 0x08 20.--22. " SSICKR[22:20] ,Selects the clock input to the BRGA" "AUDIO_CLKA,AUDIO_CLKB,X_m2ck,X_m2ck,AUDIO_CLKC,Fixed at 0,Fixed at 0,Fixed at 0" bitfld.long 0x08 16.--18. " SSICKR[18:16] ,Selects the clock input to the BRGB" "AUDIO_CLKA,AUDIO_CLKB,X_m2ck,X_m2ck,AUDIO_CLKC,Fixed at 0,Fixed at 0,Fixed at 0" line.long 0x0c "AUDIO_CLK_SEL0,Audio Clock Select Register 0" bitfld.long 0x0c 30.--31. 27. " DIVSEL_SSI_3 ,SSI3 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x0c 28.--29. " ACLK_SEL_SSI_3 ,SSI3 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x0c 24.--26. " DIVCLK_SEL_SSI_3 ,SSI3 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." textline " " bitfld.long 0x0c 22.--23. 19. " DIVSEL_SSI_2 ,SSI2 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x0c 20.--21. " ACLK_SEL_SSI_2 ,SSI2 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x0c 16.--18. " DIVCLK_SEL_SSI_2 ,SSI2 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLBCLK/MLPCLK,?..." textline " " bitfld.long 0x0c 14.--15. 11. " DIVSEL_SSI_1 ,SSI1 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x0c 12.--13. " ACLK_SEL_SSI_1 ,SSI1 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x0c 8.--10. " DIVCLK_SEL_SSI_1 ,SSI1 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." textline " " bitfld.long 0x0c 6.--7. 3. " DIVSEL_SSI_0 ,SSI0 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x0c 4.--5. " ACLK_SEL_SSI_0 ,SSI0 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x0c 0.--2. " DIVCLK_SEL_SSI_0 ,SSI0 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." line.long 0x10 "AUDIO_CLK_SEL1,Audio Clock Select Register 1" bitfld.long 0x10 30.--31. 27. " DIVSEL_SSI_7 ,SSI7 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x10 28.--29. " ACLK_SEL_SSI_7 ,SSI7 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x10 24.--26. " DIVCLK_SEL_SSI_7 ,SSI7 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." textline " " bitfld.long 0x10 22.--23. 19. " DIVSEL_SSI_6 ,SSI6 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x10 20.--21. " ACLK_SEL_SSI_6 ,SSI6 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x10 16.--18. " DIVCLK_SEL_SSI_6 ,SSI6 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLBCLK/MLPCLK,?..." textline " " bitfld.long 0x10 14.--15. 11. " DIVSEL_SSI_5 ,SSI5 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x10 12.--13. " ACLK_SEL_SSI_5 ,SSI5 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x10 8.--10. " DIVCLK_SEL_SSI_5 ,SSI5 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." textline " " bitfld.long 0x10 6.--7. 3. " DIVSEL_SSI_4 ,SSI4 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x10 4.--5. " ACLK_SEL_SSI_4 ,SSI4 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x10 0.--2. " DIVCLK_SEL_SSI_4 ,SSI4 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLPCLK,?..." line.long 0x14 "AUDIO_CLK_SEL2,Audio Clock Select Register 2" bitfld.long 0x14 14.--15. 11. " DIVSEL_SSI_9 ,SSI9 Frequency Divider Select" "Not divided,/2,/4,/8,/16,/32,Fixed at 0,Fixed at 0" bitfld.long 0x14 12.--13. " ACLK_SEL_SSI_9 ,SSI9 Clock Select" "DIVCLK,BRGA output,BRGB output,?..." bitfld.long 0x14 8.--10. " DIVCLK_SEL_SSI_9 ,SSI9 Clock Select" "Fixed at 0,AUDIO_CLKA,AUDIO_CLKB,AUDIO_CLKC,MLBCLK/MLPCLK,?..." textline " " group.long 0x30++0x03 line.long 0x00 "DIV_EN,Audio Clock Frequency Division Enable Register" bitfld.long 0x00 5. " BRGB_DIV_EN ,Enables the BRGB frequency divider" "Disabled,Enabled" bitfld.long 0x00 4. " BRGA_DIV_EN ,Enables the BRGA frequency divider" "Disabled,Enabled" bitfld.long 0x00 3. " AUDIO_CLK_C_DIV_EN ,Enables the AUDIO_CLK_C frequency divider" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " AUDIO_CLK_B_DIV_EN ,Enables the AUDIO_CLK_B frequency divider" "Disabled,Enabled" bitfld.long 0x00 1. " AUDIO_CLK_A_DIV_EN ,Enables the AUDIO_CLK_A frequency divider" "Disabled,Enabled" bitfld.long 0x00 0. " MLBP_DIV_EN ,Enables frequency division for MLPCLK" "Disabled,Enabled" textline " " group.long 0x34++0x2B line.long 0x0 "SRCIN_TIMSEL0,SRC Input Timing Select Register 0" bitfld.long 0x0 24.--27. " SRC_1_IN_DIVCLK_SEL ,SRC1 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x0 16.--20. " SRC_1_IN_DIVRATIO_SEL ,SRC1 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." textline " " bitfld.long 0x0 0.--4. " SRC_0_IN_DIVRATIO_SEL ,SRC0 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x4 "SRCIN_TIMSEL1,SRC Input Timing Select Register 1" bitfld.long 0x4 24.--27. " SRC_3_IN_DIVCLK_SEL ,SRC3 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x4 16.--20. " SRC_3_IN_DIVRATIO_SEL ,SRC3 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x4 8.--11. " SRC_2_IN_DIVCLK_SEL ,SRC2 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x4 0.--4. " SRC_2_IN_DIVRATIO_SEL ,SRC2 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x8 "SRCIN_TIMSEL2,SRC Input Timing Select Register 2" bitfld.long 0x8 24.--27. " SRC_5_IN_DIVCLK_SEL ,SRC5 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x8 16.--20. " SRC_5_IN_DIVRATIO_SEL ,SRC5 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x8 8.--11. " SRC_4_IN_DIVCLK_SEL ,SRC4 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x8 0.--4. " SRC_4_IN_DIVRATIO_SEL ,SRC4 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0xC "SRCIN_TIMSEL3,SRC Input Timing Select Register 3" bitfld.long 0xC 24.--27. " SRC_7_IN_DIVCLK_SEL ,SRC7 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0xC 16.--20. " SRC_7_IN_DIVRATIO_SEL ,SRC7 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." textline " " bitfld.long 0xC 0.--4. " SRC_6_IN_DIVRATIO_SEL ,SRC6 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x10 "SRCIN_TIMSEL4,SRC Input Timing Select Register 4" bitfld.long 0x10 24.--27. " SRC_9_IN_DIVCLK_SEL ,SRC9 Input Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x10 16.--20. " SRC_9_IN_DIVRATIO_SEL ,SRC9 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." textline " " bitfld.long 0x10 0.--4. " SRC_8_IN_DIVRATIO_SEL ,SRC8 Input Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x14 "SRCOUT_TIMSEL0,SRC Output Timing Select Register 0" bitfld.long 0x14 24.--27. " SRC_1_OUT_DIVCLK_SEL ,SRC1 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x14 16.--20. " SRC_1_OUT_DIVRATIO_SEL ,SRC1 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." textline " " bitfld.long 0x14 0.--4. " SRC_0_OUT_DIVRATIO_SEL ,SRC0 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x18 "SRCOUT_TIMSEL1,SRC Output Timing Select Register 1" bitfld.long 0x18 24.--27. " SRC_3_OUT_DIVCLK_SEL ,SRC3 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x18 16.--20. " SRC_3_OUT_DIVRATIO_SEL ,SRC3 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x18 8.--11. " SRC_2_OUT_DIVCLK_SEL ,SRC2 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x18 0.--4. " SRC_2_OUT_DIVRATIO_SEL ,SRC2 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x1C "SRCOUT_TIMSEL2,SRC Output Timing Select Register 2" bitfld.long 0x1C 24.--27. " SRC_5_OUT_DIVCLK_SEL ,SRC5 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x1C 16.--20. " SRC_5_OUT_DIVRATIO_SEL ,SRC5 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x1C 8.--11. " SRC_4_OUT_DIVCLK_SEL ,SRC4 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x1C 0.--4. " SRC_4_OUT_DIVRATIO_SEL ,SRC4 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x20 "SRCOUT_TIMSEL3,SRC Output Timing Select Register 3" bitfld.long 0x20 24.--27. " SRC_7_OUT_DIVCLK_SEL ,SRC7 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x20 16.--20. " SRC_7_OUT_DIVRATIO_SEL ,SRC7 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." textline " " bitfld.long 0x20 0.--4. " SRC_6_OUT_DIVRATIO_SEL ,SRC6 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x24 "SRCOUT_TIMSEL4,SRC Output Timing Select Register 4" bitfld.long 0x24 24.--27. " SRC_9_OUT_DIVCLK_SEL ,SRC9 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x24 16.--20. " SRC_9_OUT_DIVRATIO_SEL ,SRC9 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." textline " " bitfld.long 0x24 0.--4. " SRC_8_OUT_DIVRATIO_SEL ,SRC8 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." line.long 0x28 "CMDOUT_TIMSEL,CMD Output Timing Select Register" bitfld.long 0x28 24.--27. " CMD_1_OUT_DIVCLK_SEL ,CMD1 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." bitfld.long 0x28 16.--20. " CMD_1_OUT_DIVRATIO_SEL ,CMD1 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." bitfld.long 0x28 8.--11. " CMD_0_OUT_DIVCLK_SEL ,CMD0 Output Timing Signal Select" "AUDIO_CLK_A,AUDIO_CLK_B,AUDIO_CLK_C,BRGA,BRGB,MLPCLK,ssi_ws0,ssi_ws1,ssi_ws2,ssi_ws3,ssi_ws4,ssi_ws5,ssi_ws6,ssi_ws7,ssi_ws9,?..." textline " " bitfld.long 0x28 0.--4. " CMD_0_OUT_DIVRATIO_SEL ,CMD0 Output Timing Signal Frequency Division Ratio Select" "/2,/4,/6,/8,/12,/16,/24,/32,/48,/64,/96,/128,/192,/256,/384,/512,/768,/1024,/1536,/2048,/3072,/4096,/6144,/8192,/12288,/16384,/24576,/32768,/49152,/98304,?..." textline " " group.long 0x64++0x3 line.long 0x00 "DTCP_TIMSEL,DTCP Timing Select Register" bitfld.long 0x00 8.--9. " DTCP_1_TIMING_SEL ,DTCP1 timing signal select" "48 kHz,96 kHz,192 kHz,?..." bitfld.long 0x00 0.--1. " TCP_0_TIMING_SEL ,DTCP0 timing signal select" "48 kHz,96 kHz,192 kHz,?..." width 0xb tree.end tree "SCU (Sampling Rate Converter Unit)" base ad:0xEC500000 width 16. tree.open "SRC Registers 1" tree "SRC_1" group.long 0x20++0x7 line.long 0x00 "IN_BUSIF_MODE,SRC_1_IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "OUT_BUSIF_MODE,SRC1IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" if (1==(0||1||3||4)) group.long (0x20+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_1_BUSIF_DALIGN Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" else group.long (0x20+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_1_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE_1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE_0 ,Exchange Stream Data 0" "0,1" endif textline " " group.long (0x20+0x0C)++0x7 line.long 0x00 "MODE,SRC_1_MODE Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 25. " SYNC_OUT ,SRC_1 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC_1 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC_1 use status" "Not used,Used" line.long 0x04 "CONTROL,SRC1 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC_1 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC1 in start flag" "Stopped,Started" if (1<6) rgroup.long (0x20+0x14)++0x3 line.long 0x00 "STATUS,SRC_1 Status Register" bitfld.long 0x00 28. " DVC_1 ,DVC_1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC_0 ,DVC_0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x20+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_1 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC_1_IE ,DVC_1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC_0_IE ,DVC_0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x20+0x14)++0x3 line.long 0x00 "STATUS,SRC_1 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x20+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_1 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif tree.end tree "SRC_2" group.long 0x40++0x7 line.long 0x00 "IN_BUSIF_MODE,SRC_2_IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "OUT_BUSIF_MODE,SRC2IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" if (2==(0||1||3||4)) group.long (0x40+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_2_BUSIF_DALIGN Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" else group.long (0x40+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_2_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE_1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE_0 ,Exchange Stream Data 0" "0,1" endif textline " " group.long (0x40+0x0C)++0x7 line.long 0x00 "MODE,SRC_2_MODE Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 25. " SYNC_OUT ,SRC_2 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC_2 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC_2 use status" "Not used,Used" line.long 0x04 "CONTROL,SRC2 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC_2 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC2 in start flag" "Stopped,Started" if (2<6) rgroup.long (0x40+0x14)++0x3 line.long 0x00 "STATUS,SRC_2 Status Register" bitfld.long 0x00 28. " DVC_1 ,DVC_1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC_0 ,DVC_0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x40+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_2 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC_1_IE ,DVC_1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC_0_IE ,DVC_0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x40+0x14)++0x3 line.long 0x00 "STATUS,SRC_2 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x40+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_2 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif tree.end tree "SRC_3" group.long 0x60++0x7 line.long 0x00 "IN_BUSIF_MODE,SRC_3_IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "OUT_BUSIF_MODE,SRC3IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" if (3==(0||1||3||4)) group.long (0x60+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_3_BUSIF_DALIGN Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" else group.long (0x60+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_3_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE_1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE_0 ,Exchange Stream Data 0" "0,1" endif textline " " group.long (0x60+0x0C)++0x7 line.long 0x00 "MODE,SRC_3_MODE Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 25. " SYNC_OUT ,SRC_3 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC_3 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC_3 use status" "Not used,Used" line.long 0x04 "CONTROL,SRC3 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC_3 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC3 in start flag" "Stopped,Started" if (3<6) rgroup.long (0x60+0x14)++0x3 line.long 0x00 "STATUS,SRC_3 Status Register" bitfld.long 0x00 28. " DVC_1 ,DVC_1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC_0 ,DVC_0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x60+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_3 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC_1_IE ,DVC_1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC_0_IE ,DVC_0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x60+0x14)++0x3 line.long 0x00 "STATUS,SRC_3 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x60+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_3 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif tree.end tree "SRC_4" group.long 0x80++0x7 line.long 0x00 "IN_BUSIF_MODE,SRC_4_IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "OUT_BUSIF_MODE,SRC4IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" if (4==(0||1||3||4)) group.long (0x80+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_4_BUSIF_DALIGN Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" else group.long (0x80+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_4_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE_1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE_0 ,Exchange Stream Data 0" "0,1" endif textline " " group.long (0x80+0x0C)++0x7 line.long 0x00 "MODE,SRC_4_MODE Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 25. " SYNC_OUT ,SRC_4 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC_4 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC_4 use status" "Not used,Used" line.long 0x04 "CONTROL,SRC4 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC_4 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC4 in start flag" "Stopped,Started" if (4<6) rgroup.long (0x80+0x14)++0x3 line.long 0x00 "STATUS,SRC_4 Status Register" bitfld.long 0x00 28. " DVC_1 ,DVC_1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC_0 ,DVC_0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x80+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_4 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC_1_IE ,DVC_1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC_0_IE ,DVC_0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0x80+0x14)++0x3 line.long 0x00 "STATUS,SRC_4 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0x80+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_4 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif tree.end tree "SRC_5" group.long 0xA0++0x7 line.long 0x00 "IN_BUSIF_MODE,SRC_5_IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "OUT_BUSIF_MODE,SRC5IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" if (5==(0||1||3||4)) group.long (0xA0+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_5_BUSIF_DALIGN Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" else group.long (0xA0+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_5_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE_1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE_0 ,Exchange Stream Data 0" "0,1" endif textline " " group.long (0xA0+0x0C)++0x7 line.long 0x00 "MODE,SRC_5_MODE Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 25. " SYNC_OUT ,SRC_5 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC_5 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC_5 use status" "Not used,Used" line.long 0x04 "CONTROL,SRC5 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC_5 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC5 in start flag" "Stopped,Started" if (5<6) rgroup.long (0xA0+0x14)++0x3 line.long 0x00 "STATUS,SRC_5 Status Register" bitfld.long 0x00 28. " DVC_1 ,DVC_1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC_0 ,DVC_0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xA0+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_5 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC_1_IE ,DVC_1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC_0_IE ,DVC_0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0xA0+0x14)++0x3 line.long 0x00 "STATUS,SRC_5 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xA0+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_5 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif tree.end tree "SRC_6" group.long 0xC0++0x7 line.long 0x00 "IN_BUSIF_MODE,SRC_6_IN_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "OUT_BUSIF_MODE,SRC6IN_BUSIF_MODE Register" bitfld.long 0x04 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x04 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x04 0. " DMA ,DMA" "PIO,DMA" if (6==(0||1||3||4)) group.long (0xC0+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_6_BUSIF_DALIGN Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" else group.long (0xC0+0x08)++0x3 line.long 0x00 "BUSIF_DALIGN,SRC_6_BUSIF_DALIGN Register" bitfld.long 0x00 4. " PLACE_1 ,Exchange Stream Data 1" "0,1" bitfld.long 0x00 0. " PLACE_0 ,Exchange Stream Data 0" "0,1" endif textline " " group.long (0xC0+0x0C)++0x7 line.long 0x00 "MODE,SRC_6_MODE Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 25. " SYNC_OUT ,SRC_6 output buffer data treatment" "Asynchronous,Synchronous" bitfld.long 0x00 24. " SYNC_IN ,SRC_6 input buffer data treatment" "Asynchronous,Synchronous" textline " " endif bitfld.long 0x00 16. " UF_DATA ,Data output selection " "Before underflow,All 0s" bitfld.long 0x00 0. " SRC ,SRC_6 use status" "Not used,Used" line.long 0x04 "CONTROL,SRC6 Control Register" bitfld.long 0x04 4. " START_OUT ,SRC_6 out start flag" "Stopped,Started" bitfld.long 0x04 0. " START_IN ,SRC6 in start flag" "Stopped,Started" if (6<6) rgroup.long (0xC0+0x14)++0x3 line.long 0x00 "STATUS,SRC_6 Status Register" bitfld.long 0x00 28. " DVC_1 ,DVC_1" "No interrupt,Interrupt" bitfld.long 0x00 24. " DVC_0 ,DVC_0" "No interrupt,Interrupt" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xC0+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_6 Interrupt Enable Register 0" bitfld.long 0x00 28. " DVC_1_IE ,DVC_1 enable " "Disabled,Enabled" bitfld.long 0x00 24. " DVC_0_IE ,DVC_0 enable" "Disabled,Enabled" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" textline " " bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" else rgroup.long (0xC0+0x14)++0x3 line.long 0x00 "STATUS,SRC_6 Status Register" bitfld.long 0x00 12. " OF_SRCO ,Overflow SRC out" "No interrupt,Interrupt" bitfld.long 0x00 8. " UF_SRCI ,Underflow SRC in" "No interrupt,Interrupt" group.long (0xC0+0x18)++0x3 line.long 0x00 "INT_ENABLE0,SRC_6 Interrupt Enable Register 0" bitfld.long 0x00 12. " OF_SRCO_IE ,Overflow SRC out enable" "Disabled,Enabled" bitfld.long 0x00 8. " UF_SRCI_IE ,Underflow SRC in enable" "Disabled,Enabled" endif tree.end tree.end tree.open "CMD Registers" tree "CMD_0" group.long 0x184++0xB line.long 0x00 "OUT_BUSIF_MODE,CMD_0_OUT_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "BUSIF_DALIGN,CMD_0_BUSIF_DALIGN Register" bitfld.long 0x04 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" textline " " line.long 0x08 "ROUTE_SELECT,CMD_0_ROUTE_SELECT Register" bitfld.long 0x08 16.--18. " CMD_CASE ,Route select" "SRC->CTU->MIX->DVC,SRC_3->DVC,SRC_4->DVC,SRC_1->DVC,SRC_2/5->DVC,,," bitfld.long 0x08 8. " CMDIN_CTU_3 ,SRC input to CTU_3 Select" "SRC_2,SRC_5" bitfld.long 0x08 0. " CMDIN_CTU_2 ,SRC input to CTU_2 Select" ",SRC_1" group.long (0x184+0x0C)++0x3 line.long 0x00 "CONTROL,CMD_0 Control Register" bitfld.long 0x00 4. " START_OUT ,SRC_0 out start flag" "Stopped,Started" tree.end tree "CMD_1" group.long 0x1A4++0xB line.long 0x00 "OUT_BUSIF_MODE,CMD_1_OUT_BUSIF_MODE Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Bit-shift count for position adjustment select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" line.long 0x04 "BUSIF_DALIGN,CMD_1_BUSIF_DALIGN Register" bitfld.long 0x04 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x04 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x04 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x04 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x04 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x04 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x04 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" textline " " line.long 0x08 "ROUTE_SELECT,CMD_1_ROUTE_SELECT Register" bitfld.long 0x08 16.--18. " CMD_CASE ,Route select" "SRC->CTU->MIX->DVC,SRC_3->DVC,SRC_4->DVC,SRC_1->DVC,SRC_2/5->DVC,,," bitfld.long 0x08 8. " CMDIN_CTU_3 ,SRC input to CTU_3 Select" "SRC_2,SRC_5" bitfld.long 0x08 0. " CMDIN_CTU_2 ,SRC input to CTU_2 Select" ",SRC_1" group.long (0x1A4+0x0C)++0x3 line.long 0x00 "CONTROL,CMD_1 Control Register" bitfld.long 0x00 4. " START_OUT ,SRC_1 out start flag" "Stopped,Started" tree.end tree.end width 7. tree.open "SRC Registers 2" tree "SRC_1" group.long 0x240++0x7 line.long 0x00 "SWRSR,SRC1 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRCIR,SRC1 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" group.long (0x240+0x14)++0x3 line.long 0x00 "ADINR,SRC_1 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0x240+0x1C)++0x7 line.long 0x00 "IFSCR,SRC_1 IFS Control Register" bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "IFSVR,SRC_1 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif (cpu()=="R-CARM2")||cpuis("R8A77940") group.long (0x240+0x24)++0x3 line.long 0x00 "SRCCR,SRC_1 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x240+0x24)++0x3 hide.long 0x00 "SRCCR,SRC_1 SRC Control Register" group.long (0x240+0x28)++0x3 line.long 0x00 "MNFSR,SRC_1 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x240+0x2C)++0x03 line.long 0x00 "BSDSR,SRC_1 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x240+0x38)++0x3 line.long 0x00 "BSISR,SRC_1 Buffer Size IJEC RAM Setting Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC_2" group.long 0x280++0x7 line.long 0x00 "SWRSR,SRC2 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRCIR,SRC2 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" group.long (0x280+0x14)++0x3 line.long 0x00 "ADINR,SRC_2 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." ;bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." group.long (0x280+0x1C)++0x7 line.long 0x00 "IFSCR,SRC_2 IFS Control Register" bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "IFSVR,SRC_2 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif (cpu()=="R-CARM2")||cpuis("R8A77940") group.long (0x280+0x24)++0x3 line.long 0x00 "SRCCR,SRC_2 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x280+0x24)++0x3 hide.long 0x00 "SRCCR,SRC_2 SRC Control Register" group.long (0x280+0x28)++0x3 line.long 0x00 "MNFSR,SRC_2 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x280+0x2C)++0x03 line.long 0x00 "BSDSR,SRC_2 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x280+0x38)++0x3 line.long 0x00 "BSISR,SRC_2 Buffer Size IJEC RAM Setting Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC_3" group.long 0x2C0++0x7 line.long 0x00 "SWRSR,SRC3 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRCIR,SRC3 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" group.long (0x2C0+0x14)++0x3 line.long 0x00 "ADINR,SRC_3 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0x2C0+0x1C)++0x7 line.long 0x00 "IFSCR,SRC_3 IFS Control Register" bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "IFSVR,SRC_3 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif (cpu()=="R-CARM2")||cpuis("R8A77940") group.long (0x2C0+0x24)++0x3 line.long 0x00 "SRCCR,SRC_3 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x2C0+0x24)++0x3 hide.long 0x00 "SRCCR,SRC_3 SRC Control Register" group.long (0x2C0+0x28)++0x3 line.long 0x00 "MNFSR,SRC_3 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x2C0+0x2C)++0x03 line.long 0x00 "BSDSR,SRC_3 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x2C0+0x38)++0x3 line.long 0x00 "BSISR,SRC_3 Buffer Size IJEC RAM Setting Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC_4" group.long 0x300++0x7 line.long 0x00 "SWRSR,SRC4 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRCIR,SRC4 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" group.long (0x300+0x14)++0x3 line.long 0x00 "ADINR,SRC_4 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0x300+0x1C)++0x7 line.long 0x00 "IFSCR,SRC_4 IFS Control Register" bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "IFSVR,SRC_4 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif (cpu()=="R-CARM2")||cpuis("R8A77940") group.long (0x300+0x24)++0x3 line.long 0x00 "SRCCR,SRC_4 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x300+0x24)++0x3 hide.long 0x00 "SRCCR,SRC_4 SRC Control Register" group.long (0x300+0x28)++0x3 line.long 0x00 "MNFSR,SRC_4 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x300+0x2C)++0x03 line.long 0x00 "BSDSR,SRC_4 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x300+0x38)++0x3 line.long 0x00 "BSISR,SRC_4 Buffer Size IJEC RAM Setting Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC_5" group.long 0x340++0x7 line.long 0x00 "SWRSR,SRC5 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRCIR,SRC5 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" group.long (0x340+0x14)++0x3 line.long 0x00 "ADINR,SRC_5 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." ;bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." group.long (0x340+0x1C)++0x7 line.long 0x00 "IFSCR,SRC_5 IFS Control Register" bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "IFSVR,SRC_5 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif (cpu()=="R-CARM2")||cpuis("R8A77940") group.long (0x340+0x24)++0x3 line.long 0x00 "SRCCR,SRC_5 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x340+0x24)++0x3 hide.long 0x00 "SRCCR,SRC_5 SRC Control Register" group.long (0x340+0x28)++0x3 line.long 0x00 "MNFSR,SRC_5 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x340+0x2C)++0x03 line.long 0x00 "BSDSR,SRC_5 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x340+0x38)++0x3 line.long 0x00 "BSISR,SRC_5 Buffer Size IJEC RAM Setting Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree "SRC_6" group.long 0x380++0x7 line.long 0x00 "SWRSR,SRC6 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "SRCIR,SRC6 SRC Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Processing,Initialization" group.long (0x380+0x14)++0x3 line.long 0x00 "ADINR,SRC_6 Audio Information Register" bitfld.long 0x00 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." ;bitfld.long 0x00 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,?..." group.long (0x380+0x1C)++0x7 line.long 0x00 "IFSCR,SRC_6 IFS Control Register" bitfld.long 0x00 0. " INTIFSEN ,INTIFS Value Setting Enable" "Disabled,Enabled" line.long 0x04 "IFSVR,SRC_6 IFS Value Setting Register" hexmask.long 0x04 0.--27. 1. " INTIFS ,Initial Value of FSI" sif (cpu()=="R-CARM2")||cpuis("R8A77940") group.long (0x380+0x24)++0x3 line.long 0x00 "SRCCR,SRC_6 SRC Control Register" bitfld.long 0x00 0. " SRCMD ,SRC Mode Select" "Asynchronous,Synchronous" else hgroup.long (0x380+0x24)++0x3 hide.long 0x00 "SRCCR,SRC_6 SRC Control Register" group.long (0x380+0x28)++0x3 line.long 0x00 "MNFSR,SRC_6 Minimum FS setting Register" hexmask.long 0x00 0.--27. 1. " MINFS ,MINFS" endif group.long (0x380+0x2C)++0x03 line.long 0x00 "BSDSR,SRC_6 Buffer Size Data RAM Setting Register" hexmask.long.word 0x00 16.--26. 1. " BUFDATA ,Buffer data" group.long (0x380+0x38)++0x3 line.long 0x00 "BSISR,SRC_6 Buffer Size IJEC RAM Setting Register" sif (cpu()=="R-CARM2")||cpuis("R8A77940") bitfld.long 0x00 16.--21. " IJECPREC ,IJECPREC" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" textline " " endif hexmask.long.word 0x00 0.--8. 1. " IJECSIZE ,IJECSIZE" tree.end tree.end tree.open "CTU Registers" tree "CTU_00" group.long 0x500++0xB line.long 0x00 "SWRSR,CTU_00 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTUIR,CTU_00 CTU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,CTU_00 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x500+0x10)++0x7 line.long 0x00 "CPMDR,CTU_00 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT_0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT_1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT_2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT_3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT_4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT_5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT_6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT_7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "SCMDR,CTU_00 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." textline " " group.long (0x500+0x18)++0x7F line.long 0x00 "SV00R,CTU_00 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "SV01R,CTU_00 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "SV02R,CTU_00 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "SV03R,CTU_00 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "SV04R,CTU_00 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "SV05R,CTU_00 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "SV06R,CTU_00 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "SV07R,CTU_00 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "SV10R,CTU_00 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "SV11R,CTU_00 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "SV12R,CTU_00 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "SV13R,CTU_00 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "SV14R,CTU_00 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "SV15R,CTU_00 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "SV16R,CTU_00 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "SV17R,CTU_00 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "SV20R,CTU_00 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "SV21R,CTU_00 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "SV22R,CTU_00 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "SV23R,CTU_00 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "SV24R,CTU_00 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "SV25R,CTU_00 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "SV26R,CTU_00 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "SV27R,CTU_00 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "SV30R,CTU_00 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "SV31R,CTU_00 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "SV32R,CTU_00 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "SV33R,CTU_00 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "SV34R,CTU_00 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "SV35R,CTU_00 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "SV36R,CTU_00 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "SV37R,CTU_00 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU_01" group.long 0x600++0xB line.long 0x00 "SWRSR,CTU_01 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTUIR,CTU_01 CTU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,CTU_01 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x600+0x10)++0x7 line.long 0x00 "CPMDR,CTU_01 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT_0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT_1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT_2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT_3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT_4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT_5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT_6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT_7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "SCMDR,CTU_01 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." textline " " group.long (0x600+0x18)++0x7F line.long 0x00 "SV00R,CTU_01 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "SV01R,CTU_01 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "SV02R,CTU_01 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "SV03R,CTU_01 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "SV04R,CTU_01 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "SV05R,CTU_01 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "SV06R,CTU_01 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "SV07R,CTU_01 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "SV10R,CTU_01 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "SV11R,CTU_01 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "SV12R,CTU_01 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "SV13R,CTU_01 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "SV14R,CTU_01 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "SV15R,CTU_01 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "SV16R,CTU_01 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "SV17R,CTU_01 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "SV20R,CTU_01 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "SV21R,CTU_01 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "SV22R,CTU_01 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "SV23R,CTU_01 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "SV24R,CTU_01 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "SV25R,CTU_01 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "SV26R,CTU_01 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "SV27R,CTU_01 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "SV30R,CTU_01 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "SV31R,CTU_01 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "SV32R,CTU_01 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "SV33R,CTU_01 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "SV34R,CTU_01 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "SV35R,CTU_01 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "SV36R,CTU_01 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "SV37R,CTU_01 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU_02" group.long 0x700++0xB line.long 0x00 "SWRSR,CTU_02 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTUIR,CTU_02 CTU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,CTU_02 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x700+0x10)++0x7 line.long 0x00 "CPMDR,CTU_02 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT_0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT_1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT_2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT_3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT_4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT_5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT_6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT_7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "SCMDR,CTU_02 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." textline " " group.long (0x700+0x18)++0x7F line.long 0x00 "SV00R,CTU_02 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "SV01R,CTU_02 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "SV02R,CTU_02 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "SV03R,CTU_02 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "SV04R,CTU_02 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "SV05R,CTU_02 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "SV06R,CTU_02 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "SV07R,CTU_02 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "SV10R,CTU_02 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "SV11R,CTU_02 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "SV12R,CTU_02 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "SV13R,CTU_02 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "SV14R,CTU_02 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "SV15R,CTU_02 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "SV16R,CTU_02 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "SV17R,CTU_02 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "SV20R,CTU_02 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "SV21R,CTU_02 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "SV22R,CTU_02 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "SV23R,CTU_02 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "SV24R,CTU_02 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "SV25R,CTU_02 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "SV26R,CTU_02 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "SV27R,CTU_02 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "SV30R,CTU_02 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "SV31R,CTU_02 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "SV32R,CTU_02 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "SV33R,CTU_02 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "SV34R,CTU_02 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "SV35R,CTU_02 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "SV36R,CTU_02 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "SV37R,CTU_02 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU_03" group.long 0x800++0xB line.long 0x00 "SWRSR,CTU_03 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTUIR,CTU_03 CTU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,CTU_03 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x800+0x10)++0x7 line.long 0x00 "CPMDR,CTU_03 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT_0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT_1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT_2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT_3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT_4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT_5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT_6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT_7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "SCMDR,CTU_03 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." textline " " group.long (0x800+0x18)++0x7F line.long 0x00 "SV00R,CTU_03 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "SV01R,CTU_03 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "SV02R,CTU_03 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "SV03R,CTU_03 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "SV04R,CTU_03 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "SV05R,CTU_03 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "SV06R,CTU_03 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "SV07R,CTU_03 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "SV10R,CTU_03 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "SV11R,CTU_03 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "SV12R,CTU_03 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "SV13R,CTU_03 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "SV14R,CTU_03 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "SV15R,CTU_03 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "SV16R,CTU_03 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "SV17R,CTU_03 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "SV20R,CTU_03 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "SV21R,CTU_03 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "SV22R,CTU_03 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "SV23R,CTU_03 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "SV24R,CTU_03 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "SV25R,CTU_03 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "SV26R,CTU_03 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "SV27R,CTU_03 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "SV30R,CTU_03 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "SV31R,CTU_03 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "SV32R,CTU_03 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "SV33R,CTU_03 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "SV34R,CTU_03 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "SV35R,CTU_03 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "SV36R,CTU_03 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "SV37R,CTU_03 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU_10" group.long 0x900++0xB line.long 0x00 "SWRSR,CTU_10 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTUIR,CTU_10 CTU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,CTU_10 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0x900+0x10)++0x7 line.long 0x00 "CPMDR,CTU_10 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT_0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT_1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT_2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT_3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT_4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT_5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT_6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT_7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "SCMDR,CTU_10 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." textline " " group.long (0x900+0x18)++0x7F line.long 0x00 "SV00R,CTU_10 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "SV01R,CTU_10 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "SV02R,CTU_10 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "SV03R,CTU_10 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "SV04R,CTU_10 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "SV05R,CTU_10 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "SV06R,CTU_10 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "SV07R,CTU_10 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "SV10R,CTU_10 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "SV11R,CTU_10 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "SV12R,CTU_10 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "SV13R,CTU_10 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "SV14R,CTU_10 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "SV15R,CTU_10 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "SV16R,CTU_10 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "SV17R,CTU_10 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "SV20R,CTU_10 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "SV21R,CTU_10 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "SV22R,CTU_10 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "SV23R,CTU_10 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "SV24R,CTU_10 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "SV25R,CTU_10 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "SV26R,CTU_10 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "SV27R,CTU_10 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "SV30R,CTU_10 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "SV31R,CTU_10 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "SV32R,CTU_10 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "SV33R,CTU_10 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "SV34R,CTU_10 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "SV35R,CTU_10 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "SV36R,CTU_10 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "SV37R,CTU_10 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU_11" group.long 0xA00++0xB line.long 0x00 "SWRSR,CTU_11 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTUIR,CTU_11 CTU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,CTU_11 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0xA00+0x10)++0x7 line.long 0x00 "CPMDR,CTU_11 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT_0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT_1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT_2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT_3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT_4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT_5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT_6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT_7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "SCMDR,CTU_11 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." textline " " group.long (0xA00+0x18)++0x7F line.long 0x00 "SV00R,CTU_11 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "SV01R,CTU_11 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "SV02R,CTU_11 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "SV03R,CTU_11 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "SV04R,CTU_11 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "SV05R,CTU_11 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "SV06R,CTU_11 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "SV07R,CTU_11 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "SV10R,CTU_11 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "SV11R,CTU_11 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "SV12R,CTU_11 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "SV13R,CTU_11 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "SV14R,CTU_11 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "SV15R,CTU_11 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "SV16R,CTU_11 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "SV17R,CTU_11 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "SV20R,CTU_11 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "SV21R,CTU_11 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "SV22R,CTU_11 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "SV23R,CTU_11 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "SV24R,CTU_11 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "SV25R,CTU_11 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "SV26R,CTU_11 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "SV27R,CTU_11 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "SV30R,CTU_11 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "SV31R,CTU_11 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "SV32R,CTU_11 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "SV33R,CTU_11 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "SV34R,CTU_11 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "SV35R,CTU_11 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "SV36R,CTU_11 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "SV37R,CTU_11 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU_12" group.long 0xB00++0xB line.long 0x00 "SWRSR,CTU_12 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTUIR,CTU_12 CTU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,CTU_12 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0xB00+0x10)++0x7 line.long 0x00 "CPMDR,CTU_12 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT_0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT_1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT_2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT_3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT_4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT_5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT_6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT_7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "SCMDR,CTU_12 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." textline " " group.long (0xB00+0x18)++0x7F line.long 0x00 "SV00R,CTU_12 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "SV01R,CTU_12 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "SV02R,CTU_12 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "SV03R,CTU_12 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "SV04R,CTU_12 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "SV05R,CTU_12 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "SV06R,CTU_12 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "SV07R,CTU_12 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "SV10R,CTU_12 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "SV11R,CTU_12 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "SV12R,CTU_12 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "SV13R,CTU_12 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "SV14R,CTU_12 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "SV15R,CTU_12 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "SV16R,CTU_12 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "SV17R,CTU_12 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "SV20R,CTU_12 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "SV21R,CTU_12 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "SV22R,CTU_12 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "SV23R,CTU_12 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "SV24R,CTU_12 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "SV25R,CTU_12 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "SV26R,CTU_12 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "SV27R,CTU_12 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "SV30R,CTU_12 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "SV31R,CTU_12 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "SV32R,CTU_12 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "SV33R,CTU_12 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "SV34R,CTU_12 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "SV35R,CTU_12 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "SV36R,CTU_12 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "SV37R,CTU_12 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree "CTU_13" group.long 0xC00++0xB line.long 0x00 "SWRSR,CTU_13 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "CTUIR,CTU_13 CTU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,CTU_13 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channel,,4 channels,,6 channels,,8 channels,?..." group.long (0xC00+0x10)++0x7 line.long 0x00 "CPMDR,CTU_13 CTU Pass Mode Register" bitfld.long 0x00 28.--31. " SELOT_0 ,Select output data for channel 0" "Channel 0,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 24.--27. " SELOT_1 ,Select output data for channel 1" "Channel 1,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 20.--23. " SELOT_2 ,Select output data for channel 2" "Channel 2,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 16.--19. " SELOT_3 ,Select output data for channel 3" "Channel 3,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 12.--15. " SELOT_4 ,Select output data for channel 4" "Channel 4,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 8.--11. " SELOT_5 ,Select output data for channel 5" "Channel 5,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." textline " " bitfld.long 0x00 4.--7. " SELOT_6 ,Select output data for channel 6" "Channel 6,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." bitfld.long 0x00 0.--3. " SELOT_7 ,Select output data for channel 7" "Channel 7,Channel 0,Channel 1,Channel 2,Channel 3,Channel 4,Channel 5,Channel 6,Channel 7,Matrix row 0,Matrix row 1,Matrix row 2,Matrix row 3,?..." line.long 0x04 "SCMDR,CTU_13 Scale Mode Register" bitfld.long 0x04 0.--2. " SCMD ,Number of rows calculated by matrix" "No operation,Row 0 by scale,Row 0&1 by scale,Row 0&1&2 by scale,Row 0&1&2&3 by scale,?..." textline " " group.long (0xC00+0x18)++0x7F line.long 0x00 "SV00R,CTU_13 Scale Value e00 Register" bitfld.long 0x00 23. " SVE00[23] ,Sign bit" "0,1" bitfld.long 0x00 22. " SVE00[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x00 0.--21. 1. " SVE00[21:0] ,Decimal bits" line.long 0x04 "SV01R,CTU_13 Scale Value e01 Register" bitfld.long 0x04 23. " SV01R[23] ,Sign bit" "0,1" bitfld.long 0x04 22. " SV01R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x04 0.--21. 1. " SV01R[21:0] ,Decimal bits" line.long 0x08 "SV02R,CTU_13 Scale Value e02 Register" bitfld.long 0x08 23. " SV02R[23] ,Sign bit" "0,1" bitfld.long 0x08 22. " SV02R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x08 0.--21. 1. " SV02R[21:0] ,Decimal bits" line.long 0x0C "SV03R,CTU_13 Scale Value e03 Register" bitfld.long 0x0C 23. " SV03R[23] ,Sign bit" "0,1" bitfld.long 0x0C 22. " SV03R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x0C 0.--21. 1. " SV03R[21:0] ,Decimal bits" line.long 0x10 "SV04R,CTU_13 Scale Value e04 Register" bitfld.long 0x10 23. " SV04R[23] ,Sign bit" "0,1" bitfld.long 0x10 22. " SV04R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x10 0.--21. 1. " SV04R[21:0] ,Decimal bits" line.long 0x14 "SV05R,CTU_13 Scale Value e05 Register" bitfld.long 0x14 23. " SV05R[23] ,Sign bit" "0,1" bitfld.long 0x14 22. " SV05R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x14 0.--21. 1. " SV05R[21:0] ,Decimal bits" line.long 0x18 "SV06R,CTU_13 Scale Value e06 Register" bitfld.long 0x18 23. " SV06R[23] ,Sign bit" "0,1" bitfld.long 0x18 22. " SV06R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x18 0.--21. 1. " SV06R[21:0] ,Decimal bits" line.long 0x1C "SV07R,CTU_13 Scale Value e07 Register" bitfld.long 0x1C 23. " SV07R[23] ,Sign bit" "0,1" bitfld.long 0x1C 22. " SV07R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x1C 0.--21. 1. " SV07R[21:0] ,Decimal bits" line.long 0x20 "SV10R,CTU_13 Scale Value e10 Register" bitfld.long 0x20 23. " SV10R[23] ,Sign bit" "0,1" bitfld.long 0x20 22. " SV10R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x20 0.--21. 1. " SV10R[21:0] ,Decimal bits" line.long 0x24 "SV11R,CTU_13 Scale Value e11 Register" bitfld.long 0x24 23. " SV11R[23] ,Sign bit" "0,1" bitfld.long 0x24 22. " SV11R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x24 0.--21. 1. " SV11R[21:0] ,Decimal bits" line.long 0x28 "SV12R,CTU_13 Scale Value e12 Register" bitfld.long 0x28 23. " SV12R[23] ,Sign bit" "0,1" bitfld.long 0x28 22. " SV12R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x28 0.--21. 1. " SV12R[21:0] ,Decimal bits" line.long 0x2C "SV13R,CTU_13 Scale Value e13 Register" bitfld.long 0x2C 23. " SV13R[23] ,Sign bit" "0,1" bitfld.long 0x2C 22. " SV13R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x2C 0.--21. 1. " SV13R[21:0] ,Decimal bits" line.long 0x30 "SV14R,CTU_13 Scale Value e14 Register" bitfld.long 0x30 23. " SV14R[23] ,Sign bit" "0,1" bitfld.long 0x30 22. " SV14R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x30 0.--21. 1. " SV14R[21:0] ,Decimal bits" line.long 0x34 "SV15R,CTU_13 Scale Value e15 Register" bitfld.long 0x34 23. " SV15R[23] ,Sign bit" "0,1" bitfld.long 0x34 22. " SV15R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x34 0.--21. 1. " SV15R[21:0] ,Decimal bits" line.long 0x38 "SV16R,CTU_13 Scale Value e16 Register" bitfld.long 0x38 23. " SV16R[23] ,Sign bit" "0,1" bitfld.long 0x38 22. " SV16R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x38 0.--21. 1. " SV16R[21:0] ,Decimal bits" line.long 0x3C "SV17R,CTU_13 Scale Value e17 Register" bitfld.long 0x3C 23. " SV17R[23] ,Sign bit" "0,1" bitfld.long 0x3C 22. " SV17R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x3C 0.--21. 1. " SV17R[21:0] ,Decimal bits" line.long 0x40 "SV20R,CTU_13 Scale Value e20 Register" bitfld.long 0x40 23. " SV20R[23] ,Sign bit" "0,1" bitfld.long 0x40 22. " SV20R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x40 0.--21. 1. " SV20R[21:0] ,Decimal bits" line.long 0x44 "SV21R,CTU_13 Scale Value e21 Register" bitfld.long 0x44 23. " SV21R[23] ,Sign bit" "0,1" bitfld.long 0x44 22. " SV21R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x44 0.--21. 1. " SV21R[21:0] ,Decimal bits" line.long 0x48 "SV22R,CTU_13 Scale Value e22 Register" bitfld.long 0x48 23. " SV22R[23] ,Sign bit" "0,1" bitfld.long 0x48 22. " SV22R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x48 0.--21. 1. " SV22R[21:0] ,Decimal bits" line.long 0x4C "SV23R,CTU_13 Scale Value e23 Register" bitfld.long 0x4C 23. " SV23R[23] ,Sign bit" "0,1" bitfld.long 0x4C 22. " SV23R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x4C 0.--21. 1. " SV23R[21:0] ,Decimal bits" line.long 0x50 "SV24R,CTU_13 Scale Value e24 Register" bitfld.long 0x50 23. " SV24R[23] ,Sign bit" "0,1" bitfld.long 0x50 22. " SV24R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x50 0.--21. 1. " SV24R[21:0] ,Decimal bits" line.long 0x54 "SV25R,CTU_13 Scale Value e25 Register" bitfld.long 0x54 23. " SV25R[23] ,Sign bit" "0,1" bitfld.long 0x54 22. " SV25R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x54 0.--21. 1. " SV25R[21:0] ,Decimal bits" line.long 0x58 "SV26R,CTU_13 Scale Value e26 Register" bitfld.long 0x58 23. " SV26R[23] ,Sign bit" "0,1" bitfld.long 0x58 22. " SV26R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x58 0.--21. 1. " SV26R[21:0] ,Decimal bits" line.long 0x5C "SV27R,CTU_13 Scale Value e27 Register" bitfld.long 0x5C 23. " SV27R[23] ,Sign bit" "0,1" bitfld.long 0x5C 22. " SV27R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x5C 0.--21. 1. " SV27R[21:0] ,Decimal bits" line.long 0x60 "SV30R,CTU_13 Scale Value e30 Register" bitfld.long 0x60 23. " SV30R[23] ,Sign bit" "0,1" bitfld.long 0x60 22. " SV30R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x60 0.--21. 1. " SV30R[21:0] ,Decimal bits" line.long 0x64 "SV31R,CTU_13 Scale Value e31 Register" bitfld.long 0x64 23. " SV31R[23] ,Sign bit" "0,1" bitfld.long 0x64 22. " SV31R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x64 0.--21. 1. " SV31R[21:0] ,Decimal bits" line.long 0x68 "SV32R,CTU_13 Scale Value e32 Register" bitfld.long 0x68 23. " SV32R[23] ,Sign bit" "0,1" bitfld.long 0x68 22. " SV32R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x68 0.--21. 1. " SV32R[21:0] ,Decimal bits" line.long 0x6C "SV33R,CTU_13 Scale Value e33 Register" bitfld.long 0x6C 23. " SV33R[23] ,Sign bit" "0,1" bitfld.long 0x6C 22. " SV33R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x6C 0.--21. 1. " SV33R[21:0] ,Decimal bits" line.long 0x70 "SV34R,CTU_13 Scale Value e34 Register" bitfld.long 0x70 23. " SV34R[23] ,Sign bit" "0,1" bitfld.long 0x70 22. " SV34R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x70 0.--21. 1. " SV34R[21:0] ,Decimal bits" line.long 0x74 "SV35R,CTU_13 Scale Value e35 Register" bitfld.long 0x74 23. " SV35R[23] ,Sign bit" "0,1" bitfld.long 0x74 22. " SV35R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x74 0.--21. 1. " SV35R[21:0] ,Decimal bits" line.long 0x78 "SV36R,CTU_13 Scale Value e36 Register" bitfld.long 0x78 23. " SV36R[23] ,Sign bit" "0,1" bitfld.long 0x78 22. " SV36R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x78 0.--21. 1. " SV36R[21:0] ,Decimal bits" line.long 0x7C "SV37R,CTU_13 Scale Value e37 Register" bitfld.long 0x7C 23. " SV37R[23] ,Sign bit" "0,1" bitfld.long 0x7C 22. " SV37R[22] ,Integer bit" "0,1" hexmask.long.tbyte 0x7C 0.--21. 1. " SV37R[21:0] ,Decimal bits" tree.end tree.end tree "MIX Registers" group.long 0xD00++0xB line.long 0x00 "SWRSR,MIX_0 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "MIXIR,MIX_0 MIX Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,MIX_0 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0xD00+0x10)++0x1B line.long 0x00 "MIXMR,MIX_0 MIX Mode Register" bitfld.long 0x00 0. " MIXMODE ,MIX Mode" "Step,Ramp" line.long 0x04 "MVPDR,MIX_0 MIX Volume Period Register" bitfld.long 0x04 8.--11. " MXPDUP ,MIX Period for Volume Up" "128 dB,64 dB,32 dB,16 dB,8 dB,4 dB,2 dB,1 dB,0.5 dB,0.25 dB,0.125 dB,?..." bitfld.long 0x04 0.--3. " MXPDDW ,MIX Period for Volume Down" "-128 dB,-64 dB,-32 dB,-16 dB,-8 dB,-4 dB,-2 dB,-1 dB,-0.5 dB,-0.25 dB,-0.125 dB,?..." line.long 0x08 "MDBAR,MIX_0 MIX Decibel A Register" hexmask.long.word 0x08 0.--9. 1. " MIXDBA ,dB of System A" line.long 0x0C "MDBBR,MIX_0 MIX Decibel B Register" hexmask.long.word 0x0C 0.--9. 1. " MIXDBB ,dB of System B" line.long 0x10 "MDBCR,MIX_0 MIX Decibel C Register" hexmask.long.word 0x10 0.--9. 1. " MIXDBC ,dB of System C" line.long 0x14 "MDBDR,MIX_0 MIX Decibel D Register" hexmask.long.word 0x14 0.--9. 1. " MIXDBD ,dB of System D" line.long 0x18 "MDBER,MIX_0 MIX Decibel Enable Register" bitfld.long 0x18 0. " MIXDBEN ,MIX dB Enable" "Disabled,Enabled" rgroup.long (0xD00+0x2C)++0x3 line.long 0x00 "MIXSR,MIX_0 MIX Status Register" bitfld.long 0x00 0.--1. " MRPSTS ,MIX Volume Ramp Status" "Stable,Down,Up,?..." group.long 0xD40++0xB line.long 0x00 "SWRSR,MIX_1 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "MIXIR,MIX_1 MIX Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,MIX_1 Audio Information Register" bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0xD40+0x10)++0x1B line.long 0x00 "MIXMR,MIX_1 MIX Mode Register" bitfld.long 0x00 0. " MIXMODE ,MIX Mode" "Step,Ramp" line.long 0x04 "MVPDR,MIX_1 MIX Volume Period Register" bitfld.long 0x04 8.--11. " MXPDUP ,MIX Period for Volume Up" "128 dB,64 dB,32 dB,16 dB,8 dB,4 dB,2 dB,1 dB,0.5 dB,0.25 dB,0.125 dB,?..." bitfld.long 0x04 0.--3. " MXPDDW ,MIX Period for Volume Down" "-128 dB,-64 dB,-32 dB,-16 dB,-8 dB,-4 dB,-2 dB,-1 dB,-0.5 dB,-0.25 dB,-0.125 dB,?..." line.long 0x08 "MDBAR,MIX_1 MIX Decibel A Register" hexmask.long.word 0x08 0.--9. 1. " MIXDBA ,dB of System A" line.long 0x0C "MDBBR,MIX_1 MIX Decibel B Register" hexmask.long.word 0x0C 0.--9. 1. " MIXDBB ,dB of System B" line.long 0x10 "MDBCR,MIX_1 MIX Decibel C Register" hexmask.long.word 0x10 0.--9. 1. " MIXDBC ,dB of System C" line.long 0x14 "MDBDR,MIX_1 MIX Decibel D Register" hexmask.long.word 0x14 0.--9. 1. " MIXDBD ,dB of System D" line.long 0x18 "MDBER,MIX_1 MIX Decibel Enable Register" bitfld.long 0x18 0. " MIXDBEN ,MIX dB Enable" "Disabled,Enabled" rgroup.long (0xD40+0x2C)++0x3 line.long 0x00 "MIXSR,MIX_1 MIX Status Register" bitfld.long 0x00 0.--1. " MRPSTS ,MIX Volume Ramp Status" "Stable,Down,Up,?..." tree.end tree.open "DVC Register" tree "DVC_0" group.long 0xE00++0xB line.long 0x00 "SWRSR,DVC_0 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "DVUIR,DVC_0 DVU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,DVC_0 Audio Information Register" bitfld.long 0x08 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0xE00+0x10)++0x3B line.long 0x00 "DVUCR,DVC_0 DVU Control Register" bitfld.long 0x00 16. " HWMD ,Enable the DVC_MUTE pin" "Disabled,Enabled" bitfld.long 0x00 8. " VVMD ,Select Digital Volume Value Mode" "Disabled,Enabled" bitfld.long 0x00 4. " VRMD ,Select Volume Ramp Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ZCMD ,Select Zero Cross Mute Mode" "Disabled,Enabled" line.long 0x04 "ZCMCR,DVC_0 Zero Cross Mute Control Register" bitfld.long 0x04 7. " ZCEN7 ,Zero Cross Mute Enable for Channel 7" "Disabled,Enabled" bitfld.long 0x04 6. " ZCEN6 ,Zero Cross Mute Enable for Channel 6" "Disabled,Enabled" bitfld.long 0x04 5. " ZCEN5 ,Zero Cross Mute Enable for Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " ZCEN4 ,Zero Cross Mute Enable for Channel 4" "Disabled,Enabled" bitfld.long 0x04 3. " ZCEN3 ,Zero Cross Mute Enable for Channel 3" "Disabled,Enabled" bitfld.long 0x04 2. " ZCEN2 ,Zero Cross Mute Enable for Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " ZCEN1 ,Zero Cross Mute Enable for Channel 1" "Disabled,Enabled" bitfld.long 0x04 0. " ZCEN0 ,Zero Cross Mute Enable for Channel 0" "Disabled,Enabled" line.long 0x08 "VRCTR,DVC_0 Volume Ramp Control Register" bitfld.long 0x08 7. " VREN7 ,Volume Ramp Enable for Channel 7" "Disabled,Enabled" bitfld.long 0x08 6. " VREN6 ,Volume Ramp Enable for Channel 6" "Disabled,Enabled" bitfld.long 0x08 5. " VREN5 ,Volume Ramp Enable for Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " VREN4 ,Volume Ramp Enable for Channel 4" "Disabled,Enabled" bitfld.long 0x08 3. " VREN3 ,Volume Ramp Enable for Channel 3" "Disabled,Enabled" bitfld.long 0x08 2. " VREN2 ,Volume Ramp Enable for Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " VREN1 ,Volume Ramp Enable for Channel 1" "Disabled,Enabled" bitfld.long 0x08 0. " VREN0 ,Volume Ramp Enable for Channel 0" "Disabled,Enabled" textline " " line.long 0x0C "VRPDR,DVC_0 Volume Ramp Period Register" bitfld.long 0x0C 8.--12. " VRPDUP ,Volume Ramp Period for Volume Up" "128 dB/1 step,64 dB/1 step,32 dB/1 step,16 dB/1 step,8 dB/1 step,4 dB/1 step,2 dB/1 step,1 dB/1 step,0.5 dB/1 step,0.25 dB/1 step,0.125 dB/1 step,0.125 dB/2 steps,0.125 dB/4 steps,0.125 dB/8 steps,0.125 dB/16 steps,0.125 dB/32 steps,0.125 dB/64 steps,0.125 dB/128 steps,0.125 dB/256 steps,0.125 dB/512 steps,0.125 dB/1024 steps,0.125 dB/2048 steps,0.125 dB/4096 steps,0.125 dB/8192 steps,?..." bitfld.long 0x0C 0.--4. " VRPDDW ,VolumeRamp Period for Volume Down" "-128 dB/1 step,-64 dB/1 step,-32 dB/1 step,-16 dB/1 step,-8 dB/1 step,-4 dB/1 step,-2 dB/1 step,-1 dB/1 step,-0.5 dB/1 step,-0.25 dB/1 step,-0.125 dB/1 step,-0.125 dB/2 steps,-0.125 dB/4 steps,-0.125 dB/8 steps,-0.125 dB/16 steps,-0.125 dB/32 steps,-0.125 dB/64 steps,-0.125 dB/128 steps,-0.125 dB/256 steps,-0.125 dB/512 steps,-0.125 dB/1024 steps,-0.125 dB/2048 steps,-0.125 dB/4096 steps,-0.125 dB/8192 steps,?..." textline " " line.long 0x10 "VRDBR,DVC_0 Volume Ramp Decibel Register" hexmask.long.word 0x10 0.--9. 1. " VRDB ,dB of Volume Ramp" line.long 0x14 "VRWTR,DVC_0 Volume Ramp Wait Time Register" hexmask.long.tbyte 0x14 0.--19. 1. " VRWT ,Volume Ramp Wait Time" textline " " line.long 0x18 "VOL0R,DVC_0 Volume Value Setting 0 Register" bitfld.long 0x18 23. " VOLVAL0[23] ,Sign bit" "0,1" bitfld.long 0x18 20.--22. " VOLVAL0[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x18 0.--19. 1. " VOLVAL0[19:0] ,Decimal bits" line.long 0x1C "VOL1R,DVC_0 Volume Value Setting 1 Register" bitfld.long 0x1C 23. " VOLVAL1[23] ,Sign bit" "0,1" bitfld.long 0x1C 20.--22. " VOLVAL1[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x1C 0.--19. 1. " VOLVAL1[19:0] ,Decimal bits" line.long 0x20 "VOL2R,DVC_0 Volume Value Setting 2 Register" bitfld.long 0x20 23. " VOLVAL2[23] ,Sign bit" "0,1" bitfld.long 0x20 20.--22. " VOLVAL2[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x20 0.--19. 1. " VOLVAL2[19:0] ,Decimal bits" line.long 0x24 "VOL3R,DVC_0 Volume Value Setting 3 Register" bitfld.long 0x24 23. " VOLVAL3[23] ,Sign bit" "0,1" bitfld.long 0x24 20.--22. " VOLVAL3[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x24 0.--19. 1. " VOLVAL3[19:0] ,Decimal bits" line.long 0x28 "VOL4R,DVC_0 Volume Value Setting 4 Register" bitfld.long 0x28 23. " VOLVAL4[23] ,Sign bit" "0,1" bitfld.long 0x28 20.--22. " VOLVAL4[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x28 0.--19. 1. " VOLVAL4[19:0] ,Decimal bits" line.long 0x2C "VOL5R,DVC_0 Volume Value Setting 5 Register" bitfld.long 0x2C 23. " VOLVAL5[23] ,Sign bit" "0,1" bitfld.long 0x2C 20.--22. " VOLVAL5[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x2C 0.--19. 1. " VOLVAL5[19:0] ,Decimal bits" line.long 0x30 "VOL6R,DVC_0 Volume Value Setting 6 Register" bitfld.long 0x30 23. " VOLVAL6[23] ,Sign bit" "0,1" bitfld.long 0x30 20.--22. " VOLVAL6[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x30 0.--19. 1. " VOLVAL6[19:0] ,Decimal bits" line.long 0x34 "VOL7R,DVC_0 Volume Value Setting 7 Register" bitfld.long 0x34 23. " VOLVAL7[23] ,Sign bit" "0,1" bitfld.long 0x34 20.--22. " VOLVAL7[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x34 0.--19. 1. " VOLVAL7[19:0] ,Decimal bits" textline " " line.long 0x38 "DVUER,DVCp DVU Enable Register" bitfld.long 0x38 0. " DVCEN ,DVC Register Setting Enable" "Disabled,Enabled" rgroup.long (0xE00+0x4C)++0x3 line.long 0x00 "DVUSR,DVC_0 DVU Status Register" bitfld.long 0x00 24. " ALLZSTS ,All-Channel Zero Cross Mute Status" "Not muted,Muted" bitfld.long 0x00 23. " ZSTS7 ,Zero Cross Mute Status of Channel 7" "Not muted,Muted" bitfld.long 0x00 22. " ZSTS6 ,Zero Cross Mute Status of Channel 6" "Not muted,Muted" textline " " bitfld.long 0x00 21. " ZSTS5 ,Zero Cross Mute Status of Channel 5" "Not muted,Muted" bitfld.long 0x00 20. " ZSTS4 ,Zero Cross Mute Status of Channel 4" "Not muted,Muted" bitfld.long 0x00 19. " ZSTS3 ,Zero Cross Mute Status of Channel 3" "Not muted,Muted" textline " " bitfld.long 0x00 18. " ZSTS2 ,Zero Cross Mute Status of Channel 2" "Not muted,Muted" bitfld.long 0x00 17. " ZSTS1 ,Zero Cross Mute Status of Channel 1" "Not muted,Muted" bitfld.long 0x00 16. " ZSTS0 ,Zero Cross Mute Status of Channel 0" "Not muted,Muted" textline " " bitfld.long 0x00 4. " VRSTS_LEVEL ,Volume Ramp Level Status" "Invalid level,Valid level" bitfld.long 0x00 3. " VRSTS_MUTE ,Volume Ramp Mute Status" "Not muted,Muted" bitfld.long 0x00 0.--2. " VRSTS ,Volume Ramp Status" "Mute,Vol. ramp down,Vol. ramp up,Invalid level,Maintained,?..." group.long (0xE00+0x50)++0x3 line.long 0x00 "DVIER,DVC_0 Interrupt Enable Register" bitfld.long 0x00 24. " ALLZSTS_IE ,All-Channel Zero Cross Mute Status" "Disabled,Enabled" bitfld.long 0x00 23. " ZSTS7_IE ,Zero Cross Mute Status of Channel 7" "Disabled,Enabled" bitfld.long 0x00 22. " ZSTS6_IE ,Zero Cross Mute Status of Channel 6" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ZSTS5_IE ,Zero Cross Mute Status of Channel 5" "Disabled,Enabled" bitfld.long 0x00 20. " ZSTS4_IE ,Zero Cross Mute Status of Channel 4" "Disabled,Enabled" bitfld.long 0x00 19. " ZSTS3_IE ,Zero Cross Mute Status of Channel 3" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ZSTS2_IE ,Zero Cross Mute Status of Channel 2" "Disabled,Enabled" bitfld.long 0x00 17. " ZSTS1_IE ,Zero Cross Mute Status of Channel 1" "Disabled,Enabled" bitfld.long 0x00 16. " ZSTS0_IE ,Zero Cross Mute Status of Channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " VRSTS_LEVEL_IE ,Volume Ramp Level Status" "Disabled,Enabled" bitfld.long 0x00 3. " VRSTS_MUTE_IE ,Volume Ramp Mute Status" "Disabled,Enabled" tree.end tree "DVC_1" group.long 0xF00++0xB line.long 0x00 "SWRSR,DVC_1 Software Reset Register" bitfld.long 0x00 0. " SWRST ,Software Reset" "Reset,No reset" line.long 0x04 "DVUIR,DVC_1 DVU Initialization Register" bitfld.long 0x04 0. " INIT ,Initialization of Processing" "Initialization,Processing" line.long 0x08 "ADINR,DVC_1 Audio Information Register" bitfld.long 0x08 16.--20. " OTBL ,Bit Length of Output Audio Data" "24 bits,,22 bits,,20 bits,,18 bits,,16 bits,,,,,,,,8 bits,?..." bitfld.long 0x08 0.--3. " CHNUM ,Channel Number" "None,1 channel,2 channels,,4 channels,,6 channels,,8 channels,?..." group.long (0xF00+0x10)++0x3B line.long 0x00 "DVUCR,DVC_1 DVU Control Register" bitfld.long 0x00 16. " HWMD ,Enable the DVC_MUTE pin" "Disabled,Enabled" bitfld.long 0x00 8. " VVMD ,Select Digital Volume Value Mode" "Disabled,Enabled" bitfld.long 0x00 4. " VRMD ,Select Volume Ramp Mode" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " ZCMD ,Select Zero Cross Mute Mode" "Disabled,Enabled" line.long 0x04 "ZCMCR,DVC_1 Zero Cross Mute Control Register" bitfld.long 0x04 7. " ZCEN7 ,Zero Cross Mute Enable for Channel 7" "Disabled,Enabled" bitfld.long 0x04 6. " ZCEN6 ,Zero Cross Mute Enable for Channel 6" "Disabled,Enabled" bitfld.long 0x04 5. " ZCEN5 ,Zero Cross Mute Enable for Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " ZCEN4 ,Zero Cross Mute Enable for Channel 4" "Disabled,Enabled" bitfld.long 0x04 3. " ZCEN3 ,Zero Cross Mute Enable for Channel 3" "Disabled,Enabled" bitfld.long 0x04 2. " ZCEN2 ,Zero Cross Mute Enable for Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " ZCEN1 ,Zero Cross Mute Enable for Channel 1" "Disabled,Enabled" bitfld.long 0x04 0. " ZCEN0 ,Zero Cross Mute Enable for Channel 0" "Disabled,Enabled" line.long 0x08 "VRCTR,DVC_1 Volume Ramp Control Register" bitfld.long 0x08 7. " VREN7 ,Volume Ramp Enable for Channel 7" "Disabled,Enabled" bitfld.long 0x08 6. " VREN6 ,Volume Ramp Enable for Channel 6" "Disabled,Enabled" bitfld.long 0x08 5. " VREN5 ,Volume Ramp Enable for Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " VREN4 ,Volume Ramp Enable for Channel 4" "Disabled,Enabled" bitfld.long 0x08 3. " VREN3 ,Volume Ramp Enable for Channel 3" "Disabled,Enabled" bitfld.long 0x08 2. " VREN2 ,Volume Ramp Enable for Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " VREN1 ,Volume Ramp Enable for Channel 1" "Disabled,Enabled" bitfld.long 0x08 0. " VREN0 ,Volume Ramp Enable for Channel 0" "Disabled,Enabled" textline " " line.long 0x0C "VRPDR,DVC_1 Volume Ramp Period Register" bitfld.long 0x0C 8.--12. " VRPDUP ,Volume Ramp Period for Volume Up" "128 dB/1 step,64 dB/1 step,32 dB/1 step,16 dB/1 step,8 dB/1 step,4 dB/1 step,2 dB/1 step,1 dB/1 step,0.5 dB/1 step,0.25 dB/1 step,0.125 dB/1 step,0.125 dB/2 steps,0.125 dB/4 steps,0.125 dB/8 steps,0.125 dB/16 steps,0.125 dB/32 steps,0.125 dB/64 steps,0.125 dB/128 steps,0.125 dB/256 steps,0.125 dB/512 steps,0.125 dB/1024 steps,0.125 dB/2048 steps,0.125 dB/4096 steps,0.125 dB/8192 steps,?..." bitfld.long 0x0C 0.--4. " VRPDDW ,VolumeRamp Period for Volume Down" "-128 dB/1 step,-64 dB/1 step,-32 dB/1 step,-16 dB/1 step,-8 dB/1 step,-4 dB/1 step,-2 dB/1 step,-1 dB/1 step,-0.5 dB/1 step,-0.25 dB/1 step,-0.125 dB/1 step,-0.125 dB/2 steps,-0.125 dB/4 steps,-0.125 dB/8 steps,-0.125 dB/16 steps,-0.125 dB/32 steps,-0.125 dB/64 steps,-0.125 dB/128 steps,-0.125 dB/256 steps,-0.125 dB/512 steps,-0.125 dB/1024 steps,-0.125 dB/2048 steps,-0.125 dB/4096 steps,-0.125 dB/8192 steps,?..." textline " " line.long 0x10 "VRDBR,DVC_1 Volume Ramp Decibel Register" hexmask.long.word 0x10 0.--9. 1. " VRDB ,dB of Volume Ramp" line.long 0x14 "VRWTR,DVC_1 Volume Ramp Wait Time Register" hexmask.long.tbyte 0x14 0.--19. 1. " VRWT ,Volume Ramp Wait Time" textline " " line.long 0x18 "VOL0R,DVC_1 Volume Value Setting 0 Register" bitfld.long 0x18 23. " VOLVAL0[23] ,Sign bit" "0,1" bitfld.long 0x18 20.--22. " VOLVAL0[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x18 0.--19. 1. " VOLVAL0[19:0] ,Decimal bits" line.long 0x1C "VOL1R,DVC_1 Volume Value Setting 1 Register" bitfld.long 0x1C 23. " VOLVAL1[23] ,Sign bit" "0,1" bitfld.long 0x1C 20.--22. " VOLVAL1[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x1C 0.--19. 1. " VOLVAL1[19:0] ,Decimal bits" line.long 0x20 "VOL2R,DVC_1 Volume Value Setting 2 Register" bitfld.long 0x20 23. " VOLVAL2[23] ,Sign bit" "0,1" bitfld.long 0x20 20.--22. " VOLVAL2[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x20 0.--19. 1. " VOLVAL2[19:0] ,Decimal bits" line.long 0x24 "VOL3R,DVC_1 Volume Value Setting 3 Register" bitfld.long 0x24 23. " VOLVAL3[23] ,Sign bit" "0,1" bitfld.long 0x24 20.--22. " VOLVAL3[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x24 0.--19. 1. " VOLVAL3[19:0] ,Decimal bits" line.long 0x28 "VOL4R,DVC_1 Volume Value Setting 4 Register" bitfld.long 0x28 23. " VOLVAL4[23] ,Sign bit" "0,1" bitfld.long 0x28 20.--22. " VOLVAL4[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x28 0.--19. 1. " VOLVAL4[19:0] ,Decimal bits" line.long 0x2C "VOL5R,DVC_1 Volume Value Setting 5 Register" bitfld.long 0x2C 23. " VOLVAL5[23] ,Sign bit" "0,1" bitfld.long 0x2C 20.--22. " VOLVAL5[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x2C 0.--19. 1. " VOLVAL5[19:0] ,Decimal bits" line.long 0x30 "VOL6R,DVC_1 Volume Value Setting 6 Register" bitfld.long 0x30 23. " VOLVAL6[23] ,Sign bit" "0,1" bitfld.long 0x30 20.--22. " VOLVAL6[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x30 0.--19. 1. " VOLVAL6[19:0] ,Decimal bits" line.long 0x34 "VOL7R,DVC_1 Volume Value Setting 7 Register" bitfld.long 0x34 23. " VOLVAL7[23] ,Sign bit" "0,1" bitfld.long 0x34 20.--22. " VOLVAL7[22:20] ,Integer bits" "0,1,2,3,4,5,6,7" hexmask.long.tbyte 0x34 0.--19. 1. " VOLVAL7[19:0] ,Decimal bits" textline " " line.long 0x38 "DVUER,DVCp DVU Enable Register" bitfld.long 0x38 0. " DVCEN ,DVC Register Setting Enable" "Disabled,Enabled" rgroup.long (0xF00+0x4C)++0x3 line.long 0x00 "DVUSR,DVC_1 DVU Status Register" bitfld.long 0x00 24. " ALLZSTS ,All-Channel Zero Cross Mute Status" "Not muted,Muted" bitfld.long 0x00 23. " ZSTS7 ,Zero Cross Mute Status of Channel 7" "Not muted,Muted" bitfld.long 0x00 22. " ZSTS6 ,Zero Cross Mute Status of Channel 6" "Not muted,Muted" textline " " bitfld.long 0x00 21. " ZSTS5 ,Zero Cross Mute Status of Channel 5" "Not muted,Muted" bitfld.long 0x00 20. " ZSTS4 ,Zero Cross Mute Status of Channel 4" "Not muted,Muted" bitfld.long 0x00 19. " ZSTS3 ,Zero Cross Mute Status of Channel 3" "Not muted,Muted" textline " " bitfld.long 0x00 18. " ZSTS2 ,Zero Cross Mute Status of Channel 2" "Not muted,Muted" bitfld.long 0x00 17. " ZSTS1 ,Zero Cross Mute Status of Channel 1" "Not muted,Muted" bitfld.long 0x00 16. " ZSTS0 ,Zero Cross Mute Status of Channel 0" "Not muted,Muted" textline " " bitfld.long 0x00 4. " VRSTS_LEVEL ,Volume Ramp Level Status" "Invalid level,Valid level" bitfld.long 0x00 3. " VRSTS_MUTE ,Volume Ramp Mute Status" "Not muted,Muted" bitfld.long 0x00 0.--2. " VRSTS ,Volume Ramp Status" "Mute,Vol. ramp down,Vol. ramp up,Invalid level,Maintained,?..." group.long (0xF00+0x50)++0x3 line.long 0x00 "DVIER,DVC_1 Interrupt Enable Register" bitfld.long 0x00 24. " ALLZSTS_IE ,All-Channel Zero Cross Mute Status" "Disabled,Enabled" bitfld.long 0x00 23. " ZSTS7_IE ,Zero Cross Mute Status of Channel 7" "Disabled,Enabled" bitfld.long 0x00 22. " ZSTS6_IE ,Zero Cross Mute Status of Channel 6" "Disabled,Enabled" textline " " bitfld.long 0x00 21. " ZSTS5_IE ,Zero Cross Mute Status of Channel 5" "Disabled,Enabled" bitfld.long 0x00 20. " ZSTS4_IE ,Zero Cross Mute Status of Channel 4" "Disabled,Enabled" bitfld.long 0x00 19. " ZSTS3_IE ,Zero Cross Mute Status of Channel 3" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " ZSTS2_IE ,Zero Cross Mute Status of Channel 2" "Disabled,Enabled" bitfld.long 0x00 17. " ZSTS1_IE ,Zero Cross Mute Status of Channel 1" "Disabled,Enabled" bitfld.long 0x00 16. " ZSTS0_IE ,Zero Cross Mute Status of Channel 0" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " VRSTS_LEVEL_IE ,Volume Ramp Level Status" "Disabled,Enabled" bitfld.long 0x00 3. " VRSTS_MUTE_IE ,Volume Ramp Mute Status" "Disabled,Enabled" tree.end tree.end width 14. base ad:0xEC000000 tree "Data Registers" wgroup.long 0x400++0x3 line.long 0x00 "SRC1IN_BUSIF,SRC1 in Write Data Register" wgroup.long 0x800++0x3 line.long 0x00 "SRC2IN_BUSIF,SRC2 in Write Data Register" wgroup.long 0xC00++0x3 line.long 0x00 "SRC3IN_BUSIF,SRC3 in Write Data Register" wgroup.long 0x1000++0x3 line.long 0x00 "SRC4IN_BUSIF,SRC4 in Write Data Register" wgroup.long 0x1400++0x3 line.long 0x00 "SRC5IN_BUSIF,SRC5 in Write Data Register" wgroup.long 0x1800++0x3 line.long 0x00 "SRC6IN_BUSIF,SRC6 in Write Data Register" rgroup.long 0x4400++0x3 line.long 0x00 "SRC1OUT_BUSIF,SRC1 out Read Data Register" rgroup.long 0x4800++0x3 line.long 0x00 "SRC2OUT_BUSIF,SRC2 out Read Data Register" rgroup.long 0x4C00++0x3 line.long 0x00 "SRC3OUT_BUSIF,SRC3 out Read Data Register" rgroup.long 0x5000++0x3 line.long 0x00 "SRC4OUT_BUSIF,SRC4 out Read Data Register" rgroup.long 0x5400++0x3 line.long 0x00 "SRC5OUT_BUSIF,SRC5 out Read Data Register" rgroup.long 0x5800++0x3 line.long 0x00 "SRC6OUT_BUSIF,SRC6 out Read Data Register" rgroup.long 0x8000++0x3 line.long 0x00 "CMD0OUT_BUSIF,CMD 0 out Read Data Register" rgroup.long 0x8400++0x3 line.long 0x00 "CMD1OUT_BUSIF,CMD 1 out Read Data Register" tree.end width 0xB tree.end tree "Audio-DMAC (Audio-Direct Memory Access Controller)" base ad:0xEC700000 width 12. tree "Common Registers" rgroup.long 0x20++0x03 line.long 0x00 "DMAISTA_L,DMA Interrupt Status Register for Low channel" bitfld.long 0x00 12. " I_12 ,Channel 12 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 11. " I_11 ,Channel 11 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 10. " I_10 ,Channel 10 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 9. " I_9 ,Channel 9 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 8. " I_8 ,Channel 8 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 7. " I_7 ,Channel 7 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 6. " I_6 ,Channel 6 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 5. " I_5 ,Channel 5 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 4. " I_4 ,Channel 4 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 3. " I_3 ,Channel 3 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 2. " I_2 ,Channel 2 interrupt status" "No interrupt,Interrupt" bitfld.long 0x00 1. " I_1 ,Channel 1 interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x00 0. " I_0 ,Channel 0 interrupt status" "No interrupt,Interrupt" group.long 0x30++0x03 line.long 0x00 "DMASEC_L,DMA Secure Control Register for Low channel" bitfld.long 0x00 12. " S_12 ,Channel 12 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 11. " S_11 ,Channel 11 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 10. " S_10 ,Channel 10 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 9. " S_9 ,Channel 9 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 8. " S_8 ,Channel 8 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 7. " S_7 ,Channel 7 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 6. " S_6 ,Channel 6 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 5. " S_5 ,Channel 5 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 4. " S_4 ,Channel 4 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 3. " S_3 ,Channel 3 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 2. " S_2 ,Channel 2 secure mode setting" "Non-secure,Secure" bitfld.long 0x00 1. " S_1 ,Channel 1 secure mode setting" "Non-secure,Secure" textline " " bitfld.long 0x00 0. " S_0 ,Channel 0 secure mode setting" "Non-secure,Secure" group.word 0x60++0x03 line.word 0x00 "DMAOR_L,DMA Operation Register for Low channel" bitfld.word 0x00 8.--9. " PR ,Priority mode" "CH0>CH1>...>CH12,,,Round-robin" bitfld.word 0x00 2. " AE ,Address error flag" "No error,Error" bitfld.word 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" wgroup.long 0x80++0x03 line.long 0x00 "DMACHCLR_L,DMA Channel Clear Register for Low channel" bitfld.long 0x00 12. " CLR_12 ,Channel 12 registers clear" "No clear,Clear" bitfld.long 0x00 11. " CLR_11 ,Channel 11 registers clear" "No clear,Clear" bitfld.long 0x00 10. " CLR_10 ,Channel 10 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 9. " CLR_9 ,Channel 9 registers clear" "No clear,Clear" bitfld.long 0x00 8. " CLR_8 ,Channel 8 registers clear" "No clear,Clear" bitfld.long 0x00 7. " CLR_7 ,Channel 7 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 6. " CLR_6 ,Channel 6 registers clear" "No clear,Clear" bitfld.long 0x00 5. " CLR_5 ,Channel 5 registers clear" "No clear,Clear" bitfld.long 0x00 4. " CLR_4 ,Channel 4 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 3. " CLR_3 ,Channel 3 registers clear" "No clear,Clear" bitfld.long 0x00 2. " CLR_2 ,Channel 2 registers clear" "No clear,Clear" bitfld.long 0x00 1. " CLR_1 ,Channel 1 registers clear" "No clear,Clear" textline " " bitfld.long 0x00 0. " CLR_0 ,Channel 0 registers clear" "No clear,Clear" textline " " sif cpuis("R8A77440") group.long 0xA0++0x03 line.long 0x00 "DMADPSEC_L,DPRAM Secure Control Register for Low channel" bitfld.long 0x00 31. " SEC ,Secure attribute setting of Descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of Descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of Descriptor memory" else group.long 0xA0++0x03 line.long 0x00 "DMADPSEC_L,DPRAM Secure Control Register for Low channel" bitfld.long 0x00 31. " SEC ,Secure attribute setting of Descriptor memory" "Non-secure,Secure" hexmask.long.word 0x00 16.--24. 1. " SA ,Secure attribute base address of Descriptor memory" hexmask.long.word 0x00 0.--8. 1. " SM ,Secure attribute base address mask of Descriptor memory" endif tree.end width 17. tree "Channel 0" if (((per.l(ad:0xEC700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x20)++0x07 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" else group.long 0x8000++0x07 line.long 0x00 "DMASAR_0,DMA Source Address Register 0" line.long 0x04 "DMADAR_0,DMA Destination Address Register 0" endif group.long (0x8000+0x08)++0x03 line.long 0x00 "DMATCR_0,DMA Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8000+0x18)++0x03 line.long 0x00 "DMATCRB_0,DMA Transfer Count Registers B_0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x28)++0x03 line.long 0x00 "DMATSR_0,DMA Transfer Count Register 0" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x38)++0x03 line.long 0x00 "DMATSRB_0,DMA Transfer Size Register 0" endif else group.long (0x8000+0x38)++0x03 line.long 0x00 "DMATSRB_0,DMA Transfer Size Register 0" endif if (((per.l(ad:0xEC700000+0x8000+0x1C))&0x100)==0x100) group.long (0x8000+0x2C)++0x03 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8000+0x0C)++0x03 line.long 0x00 "DMACHCR_0,DMA Channel Control Register 0" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8000+0x1C)++0x03 line.long 0x00 "DMACHCRB_0,DMA Channel Control Register B_0" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8000+0x48)++0x03 line.long 0x00 "DMABUFCR_0,DMA Buffer Control Register 0" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8000+0x40)++0x01 line.word 0x00 "DMARS_0,DMA Extended Resource Selector 0" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8000+0x50)++0x07 line.long 0x00 "DMADPBASE_0,DMA Descriptor Base Address Register 0" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_0,DMA Descriptor Control Register 0" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8000+0x10)++0x07 line.long 0x00 "DMAFIXSAR_0,DMA Fixed Source Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_0,DMA Fixed Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8000+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_0,DMA Fixed Descriptor Base Address Register 0" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 1" if (((per.l(ad:0xEC700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x20)++0x07 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" else group.long 0x8080++0x07 line.long 0x00 "DMASAR_1,DMA Source Address Register 1" line.long 0x04 "DMADAR_1,DMA Destination Address Register 1" endif group.long (0x8080+0x08)++0x03 line.long 0x00 "DMATCR_1,DMA Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8080+0x18)++0x03 line.long 0x00 "DMATCRB_1,DMA Transfer Count Registers B_1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x28)++0x03 line.long 0x00 "DMATSR_1,DMA Transfer Count Register 1" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x38)++0x03 line.long 0x00 "DMATSRB_1,DMA Transfer Size Register 1" endif else group.long (0x8080+0x38)++0x03 line.long 0x00 "DMATSRB_1,DMA Transfer Size Register 1" endif if (((per.l(ad:0xEC700000+0x8080+0x1C))&0x100)==0x100) group.long (0x8080+0x2C)++0x03 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8080+0x0C)++0x03 line.long 0x00 "DMACHCR_1,DMA Channel Control Register 1" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8080+0x1C)++0x03 line.long 0x00 "DMACHCRB_1,DMA Channel Control Register B_1" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8080+0x48)++0x03 line.long 0x00 "DMABUFCR_1,DMA Buffer Control Register 1" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8080+0x40)++0x01 line.word 0x00 "DMARS_1,DMA Extended Resource Selector 1" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8080+0x50)++0x07 line.long 0x00 "DMADPBASE_1,DMA Descriptor Base Address Register 1" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_1,DMA Descriptor Control Register 1" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8080+0x10)++0x07 line.long 0x00 "DMAFIXSAR_1,DMA Fixed Source Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_1,DMA Fixed Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8080+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_1,DMA Fixed Descriptor Base Address Register 1" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 2" if (((per.l(ad:0xEC700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x20)++0x07 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" else group.long 0x8100++0x07 line.long 0x00 "DMASAR_2,DMA Source Address Register 2" line.long 0x04 "DMADAR_2,DMA Destination Address Register 2" endif group.long (0x8100+0x08)++0x03 line.long 0x00 "DMATCR_2,DMA Transfer Count Register 2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8100+0x18)++0x03 line.long 0x00 "DMATCRB_2,DMA Transfer Count Registers B_2" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x28)++0x03 line.long 0x00 "DMATSR_2,DMA Transfer Count Register 2" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x38)++0x03 line.long 0x00 "DMATSRB_2,DMA Transfer Size Register 2" endif else group.long (0x8100+0x38)++0x03 line.long 0x00 "DMATSRB_2,DMA Transfer Size Register 2" endif if (((per.l(ad:0xEC700000+0x8100+0x1C))&0x100)==0x100) group.long (0x8100+0x2C)++0x03 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8100+0x0C)++0x03 line.long 0x00 "DMACHCR_2,DMA Channel Control Register 2" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8100+0x1C)++0x03 line.long 0x00 "DMACHCRB_2,DMA Channel Control Register B_2" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8100+0x48)++0x03 line.long 0x00 "DMABUFCR_2,DMA Buffer Control Register 2" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8100+0x40)++0x01 line.word 0x00 "DMARS_2,DMA Extended Resource Selector 2" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8100+0x50)++0x07 line.long 0x00 "DMADPBASE_2,DMA Descriptor Base Address Register 2" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_2,DMA Descriptor Control Register 2" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8100+0x10)++0x07 line.long 0x00 "DMAFIXSAR_2,DMA Fixed Source Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_2,DMA Fixed Destination Address Register 2" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8100+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_2,DMA Fixed Descriptor Base Address Register 2" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 3" if (((per.l(ad:0xEC700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x20)++0x07 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" else group.long 0x8180++0x07 line.long 0x00 "DMASAR_3,DMA Source Address Register 3" line.long 0x04 "DMADAR_3,DMA Destination Address Register 3" endif group.long (0x8180+0x08)++0x03 line.long 0x00 "DMATCR_3,DMA Transfer Count Register 3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8180+0x18)++0x03 line.long 0x00 "DMATCRB_3,DMA Transfer Count Registers B_3" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x28)++0x03 line.long 0x00 "DMATSR_3,DMA Transfer Count Register 3" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x38)++0x03 line.long 0x00 "DMATSRB_3,DMA Transfer Size Register 3" endif else group.long (0x8180+0x38)++0x03 line.long 0x00 "DMATSRB_3,DMA Transfer Size Register 3" endif if (((per.l(ad:0xEC700000+0x8180+0x1C))&0x100)==0x100) group.long (0x8180+0x2C)++0x03 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8180+0x0C)++0x03 line.long 0x00 "DMACHCR_3,DMA Channel Control Register 3" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8180+0x1C)++0x03 line.long 0x00 "DMACHCRB_3,DMA Channel Control Register B_3" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8180+0x48)++0x03 line.long 0x00 "DMABUFCR_3,DMA Buffer Control Register 3" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8180+0x40)++0x01 line.word 0x00 "DMARS_3,DMA Extended Resource Selector 3" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8180+0x50)++0x07 line.long 0x00 "DMADPBASE_3,DMA Descriptor Base Address Register 3" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_3,DMA Descriptor Control Register 3" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8180+0x10)++0x07 line.long 0x00 "DMAFIXSAR_3,DMA Fixed Source Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_3,DMA Fixed Destination Address Register 3" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8180+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_3,DMA Fixed Descriptor Base Address Register 3" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 4" if (((per.l(ad:0xEC700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x20)++0x07 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" else group.long 0x8200++0x07 line.long 0x00 "DMASAR_4,DMA Source Address Register 4" line.long 0x04 "DMADAR_4,DMA Destination Address Register 4" endif group.long (0x8200+0x08)++0x03 line.long 0x00 "DMATCR_4,DMA Transfer Count Register 4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8200+0x18)++0x03 line.long 0x00 "DMATCRB_4,DMA Transfer Count Registers B_4" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x28)++0x03 line.long 0x00 "DMATSR_4,DMA Transfer Count Register 4" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x38)++0x03 line.long 0x00 "DMATSRB_4,DMA Transfer Size Register 4" endif else group.long (0x8200+0x38)++0x03 line.long 0x00 "DMATSRB_4,DMA Transfer Size Register 4" endif if (((per.l(ad:0xEC700000+0x8200+0x1C))&0x100)==0x100) group.long (0x8200+0x2C)++0x03 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8200+0x0C)++0x03 line.long 0x00 "DMACHCR_4,DMA Channel Control Register 4" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8200+0x1C)++0x03 line.long 0x00 "DMACHCRB_4,DMA Channel Control Register B_4" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8200+0x48)++0x03 line.long 0x00 "DMABUFCR_4,DMA Buffer Control Register 4" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8200+0x40)++0x01 line.word 0x00 "DMARS_4,DMA Extended Resource Selector 4" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8200+0x50)++0x07 line.long 0x00 "DMADPBASE_4,DMA Descriptor Base Address Register 4" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_4,DMA Descriptor Control Register 4" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8200+0x10)++0x07 line.long 0x00 "DMAFIXSAR_4,DMA Fixed Source Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_4,DMA Fixed Destination Address Register 4" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8200+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_4,DMA Fixed Descriptor Base Address Register 4" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 5" if (((per.l(ad:0xEC700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x20)++0x07 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" else group.long 0x8280++0x07 line.long 0x00 "DMASAR_5,DMA Source Address Register 5" line.long 0x04 "DMADAR_5,DMA Destination Address Register 5" endif group.long (0x8280+0x08)++0x03 line.long 0x00 "DMATCR_5,DMA Transfer Count Register 5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8280+0x18)++0x03 line.long 0x00 "DMATCRB_5,DMA Transfer Count Registers B_5" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x28)++0x03 line.long 0x00 "DMATSR_5,DMA Transfer Count Register 5" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x38)++0x03 line.long 0x00 "DMATSRB_5,DMA Transfer Size Register 5" endif else group.long (0x8280+0x38)++0x03 line.long 0x00 "DMATSRB_5,DMA Transfer Size Register 5" endif if (((per.l(ad:0xEC700000+0x8280+0x1C))&0x100)==0x100) group.long (0x8280+0x2C)++0x03 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8280+0x0C)++0x03 line.long 0x00 "DMACHCR_5,DMA Channel Control Register 5" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8280+0x1C)++0x03 line.long 0x00 "DMACHCRB_5,DMA Channel Control Register B_5" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8280+0x48)++0x03 line.long 0x00 "DMABUFCR_5,DMA Buffer Control Register 5" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8280+0x40)++0x01 line.word 0x00 "DMARS_5,DMA Extended Resource Selector 5" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8280+0x50)++0x07 line.long 0x00 "DMADPBASE_5,DMA Descriptor Base Address Register 5" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_5,DMA Descriptor Control Register 5" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8280+0x10)++0x07 line.long 0x00 "DMAFIXSAR_5,DMA Fixed Source Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_5,DMA Fixed Destination Address Register 5" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8280+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_5,DMA Fixed Descriptor Base Address Register 5" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 6" if (((per.l(ad:0xEC700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x20)++0x07 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" else group.long 0x8300++0x07 line.long 0x00 "DMASAR_6,DMA Source Address Register 6" line.long 0x04 "DMADAR_6,DMA Destination Address Register 6" endif group.long (0x8300+0x08)++0x03 line.long 0x00 "DMATCR_6,DMA Transfer Count Register 6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8300+0x18)++0x03 line.long 0x00 "DMATCRB_6,DMA Transfer Count Registers B_6" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x28)++0x03 line.long 0x00 "DMATSR_6,DMA Transfer Count Register 6" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x38)++0x03 line.long 0x00 "DMATSRB_6,DMA Transfer Size Register 6" endif else group.long (0x8300+0x38)++0x03 line.long 0x00 "DMATSRB_6,DMA Transfer Size Register 6" endif if (((per.l(ad:0xEC700000+0x8300+0x1C))&0x100)==0x100) group.long (0x8300+0x2C)++0x03 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8300+0x0C)++0x03 line.long 0x00 "DMACHCR_6,DMA Channel Control Register 6" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8300+0x1C)++0x03 line.long 0x00 "DMACHCRB_6,DMA Channel Control Register B_6" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8300+0x48)++0x03 line.long 0x00 "DMABUFCR_6,DMA Buffer Control Register 6" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8300+0x40)++0x01 line.word 0x00 "DMARS_6,DMA Extended Resource Selector 6" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8300+0x50)++0x07 line.long 0x00 "DMADPBASE_6,DMA Descriptor Base Address Register 6" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_6,DMA Descriptor Control Register 6" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8300+0x10)++0x07 line.long 0x00 "DMAFIXSAR_6,DMA Fixed Source Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_6,DMA Fixed Destination Address Register 6" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8300+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_6,DMA Fixed Descriptor Base Address Register 6" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 7" if (((per.l(ad:0xEC700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x20)++0x07 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" else group.long 0x8380++0x07 line.long 0x00 "DMASAR_7,DMA Source Address Register 7" line.long 0x04 "DMADAR_7,DMA Destination Address Register 7" endif group.long (0x8380+0x08)++0x03 line.long 0x00 "DMATCR_7,DMA Transfer Count Register 7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8380+0x18)++0x03 line.long 0x00 "DMATCRB_7,DMA Transfer Count Registers B_7" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x28)++0x03 line.long 0x00 "DMATSR_7,DMA Transfer Count Register 7" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x38)++0x03 line.long 0x00 "DMATSRB_7,DMA Transfer Size Register 7" endif else group.long (0x8380+0x38)++0x03 line.long 0x00 "DMATSRB_7,DMA Transfer Size Register 7" endif if (((per.l(ad:0xEC700000+0x8380+0x1C))&0x100)==0x100) group.long (0x8380+0x2C)++0x03 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8380+0x0C)++0x03 line.long 0x00 "DMACHCR_7,DMA Channel Control Register 7" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8380+0x1C)++0x03 line.long 0x00 "DMACHCRB_7,DMA Channel Control Register B_7" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8380+0x48)++0x03 line.long 0x00 "DMABUFCR_7,DMA Buffer Control Register 7" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8380+0x40)++0x01 line.word 0x00 "DMARS_7,DMA Extended Resource Selector 7" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8380+0x50)++0x07 line.long 0x00 "DMADPBASE_7,DMA Descriptor Base Address Register 7" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_7,DMA Descriptor Control Register 7" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8380+0x10)++0x07 line.long 0x00 "DMAFIXSAR_7,DMA Fixed Source Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_7,DMA Fixed Destination Address Register 7" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8380+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_7,DMA Fixed Descriptor Base Address Register 7" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 8" if (((per.l(ad:0xEC700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x20)++0x07 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" else group.long 0x8400++0x07 line.long 0x00 "DMASAR_8,DMA Source Address Register 8" line.long 0x04 "DMADAR_8,DMA Destination Address Register 8" endif group.long (0x8400+0x08)++0x03 line.long 0x00 "DMATCR_8,DMA Transfer Count Register 8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8400+0x18)++0x03 line.long 0x00 "DMATCRB_8,DMA Transfer Count Registers B_8" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x28)++0x03 line.long 0x00 "DMATSR_8,DMA Transfer Count Register 8" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x38)++0x03 line.long 0x00 "DMATSRB_8,DMA Transfer Size Register 8" endif else group.long (0x8400+0x38)++0x03 line.long 0x00 "DMATSRB_8,DMA Transfer Size Register 8" endif if (((per.l(ad:0xEC700000+0x8400+0x1C))&0x100)==0x100) group.long (0x8400+0x2C)++0x03 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8400+0x0C)++0x03 line.long 0x00 "DMACHCR_8,DMA Channel Control Register 8" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8400+0x1C)++0x03 line.long 0x00 "DMACHCRB_8,DMA Channel Control Register B_8" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8400+0x48)++0x03 line.long 0x00 "DMABUFCR_8,DMA Buffer Control Register 8" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8400+0x40)++0x01 line.word 0x00 "DMARS_8,DMA Extended Resource Selector 8" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8400+0x50)++0x07 line.long 0x00 "DMADPBASE_8,DMA Descriptor Base Address Register 8" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_8,DMA Descriptor Control Register 8" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8400+0x10)++0x07 line.long 0x00 "DMAFIXSAR_8,DMA Fixed Source Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_8,DMA Fixed Destination Address Register 8" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8400+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_8,DMA Fixed Descriptor Base Address Register 8" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 9" if (((per.l(ad:0xEC700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x20)++0x07 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" else group.long 0x8480++0x07 line.long 0x00 "DMASAR_9,DMA Source Address Register 9" line.long 0x04 "DMADAR_9,DMA Destination Address Register 9" endif group.long (0x8480+0x08)++0x03 line.long 0x00 "DMATCR_9,DMA Transfer Count Register 9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8480+0x18)++0x03 line.long 0x00 "DMATCRB_9,DMA Transfer Count Registers B_9" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x28)++0x03 line.long 0x00 "DMATSR_9,DMA Transfer Count Register 9" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x38)++0x03 line.long 0x00 "DMATSRB_9,DMA Transfer Size Register 9" endif else group.long (0x8480+0x38)++0x03 line.long 0x00 "DMATSRB_9,DMA Transfer Size Register 9" endif if (((per.l(ad:0xEC700000+0x8480+0x1C))&0x100)==0x100) group.long (0x8480+0x2C)++0x03 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8480+0x0C)++0x03 line.long 0x00 "DMACHCR_9,DMA Channel Control Register 9" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8480+0x1C)++0x03 line.long 0x00 "DMACHCRB_9,DMA Channel Control Register B_9" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8480+0x48)++0x03 line.long 0x00 "DMABUFCR_9,DMA Buffer Control Register 9" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8480+0x40)++0x01 line.word 0x00 "DMARS_9,DMA Extended Resource Selector 9" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8480+0x50)++0x07 line.long 0x00 "DMADPBASE_9,DMA Descriptor Base Address Register 9" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_9,DMA Descriptor Control Register 9" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8480+0x10)++0x07 line.long 0x00 "DMAFIXSAR_9,DMA Fixed Source Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_9,DMA Fixed Destination Address Register 9" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8480+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_9,DMA Fixed Descriptor Base Address Register 9" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 10" if (((per.l(ad:0xEC700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x20)++0x07 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" else group.long 0x8500++0x07 line.long 0x00 "DMASAR_10,DMA Source Address Register 10" line.long 0x04 "DMADAR_10,DMA Destination Address Register 10" endif group.long (0x8500+0x08)++0x03 line.long 0x00 "DMATCR_10,DMA Transfer Count Register 10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8500+0x18)++0x03 line.long 0x00 "DMATCRB_10,DMA Transfer Count Registers B_10" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x28)++0x03 line.long 0x00 "DMATSR_10,DMA Transfer Count Register 10" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x38)++0x03 line.long 0x00 "DMATSRB_10,DMA Transfer Size Register 10" endif else group.long (0x8500+0x38)++0x03 line.long 0x00 "DMATSRB_10,DMA Transfer Size Register 10" endif if (((per.l(ad:0xEC700000+0x8500+0x1C))&0x100)==0x100) group.long (0x8500+0x2C)++0x03 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8500+0x0C)++0x03 line.long 0x00 "DMACHCR_10,DMA Channel Control Register 10" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8500+0x1C)++0x03 line.long 0x00 "DMACHCRB_10,DMA Channel Control Register B_10" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8500+0x48)++0x03 line.long 0x00 "DMABUFCR_10,DMA Buffer Control Register 10" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8500+0x40)++0x01 line.word 0x00 "DMARS_10,DMA Extended Resource Selector 10" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8500+0x50)++0x07 line.long 0x00 "DMADPBASE_10,DMA Descriptor Base Address Register 10" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_10,DMA Descriptor Control Register 10" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8500+0x10)++0x07 line.long 0x00 "DMAFIXSAR_10,DMA Fixed Source Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_10,DMA Fixed Destination Address Register 10" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8500+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_10,DMA Fixed Descriptor Base Address Register 10" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 11" if (((per.l(ad:0xEC700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x20)++0x07 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" else group.long 0x8580++0x07 line.long 0x00 "DMASAR_11,DMA Source Address Register 11" line.long 0x04 "DMADAR_11,DMA Destination Address Register 11" endif group.long (0x8580+0x08)++0x03 line.long 0x00 "DMATCR_11,DMA Transfer Count Register 11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8580+0x18)++0x03 line.long 0x00 "DMATCRB_11,DMA Transfer Count Registers B_11" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x28)++0x03 line.long 0x00 "DMATSR_11,DMA Transfer Count Register 11" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x38)++0x03 line.long 0x00 "DMATSRB_11,DMA Transfer Size Register 11" endif else group.long (0x8580+0x38)++0x03 line.long 0x00 "DMATSRB_11,DMA Transfer Size Register 11" endif if (((per.l(ad:0xEC700000+0x8580+0x1C))&0x100)==0x100) group.long (0x8580+0x2C)++0x03 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8580+0x0C)++0x03 line.long 0x00 "DMACHCR_11,DMA Channel Control Register 11" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8580+0x1C)++0x03 line.long 0x00 "DMACHCRB_11,DMA Channel Control Register B_11" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8580+0x48)++0x03 line.long 0x00 "DMABUFCR_11,DMA Buffer Control Register 11" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8580+0x40)++0x01 line.word 0x00 "DMARS_11,DMA Extended Resource Selector 11" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8580+0x50)++0x07 line.long 0x00 "DMADPBASE_11,DMA Descriptor Base Address Register 11" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_11,DMA Descriptor Control Register 11" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8580+0x10)++0x07 line.long 0x00 "DMAFIXSAR_11,DMA Fixed Source Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_11,DMA Fixed Destination Address Register 11" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8580+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_11,DMA Fixed Descriptor Base Address Register 11" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end tree "Channel 12" if (((per.l(ad:0xEC700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x20)++0x07 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" else group.long 0x8600++0x07 line.long 0x00 "DMASAR_12,DMA Source Address Register 12" line.long 0x04 "DMADAR_12,DMA Destination Address Register 12" endif group.long (0x8600+0x08)++0x03 line.long 0x00 "DMATCR_12,DMA Transfer Count Register 12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" group.long (0x8600+0x18)++0x03 line.long 0x00 "DMATCRB_12,DMA Transfer Count Registers B_12" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count register" if (((per.l(ad:0xEC700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x28)++0x03 line.long 0x00 "DMATSR_12,DMA Transfer Count Register 12" endif sif cpuis("R8A77440") if (((per.l(ad:0xEC700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x38)++0x03 line.long 0x00 "DMATSRB_12,DMA Transfer Size Register 12" endif else group.long (0x8600+0x38)++0x03 line.long 0x00 "DMATSRB_12,DMA Transfer Size Register 12" endif if (((per.l(ad:0xEC700000+0x8600+0x1C))&0x100)==0x100) group.long (0x8600+0x2C)++0x03 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" else group.long (0x8600+0x0C)++0x03 line.long 0x00 "DMACHCR_12,DMA Channel Control Register 12" bitfld.long 0x00 31. " CAE ,Address error flag" "No error,Error" bitfld.long 0x00 30. " CAIE ,Channel address error interrupt enable" "Disabled,Enabled" bitfld.long 0x00 28.--29. " DPM ,Descriptor operating mode" "Normal,Descriptor normal,Descriptor repeat,Descriptor Read-out" textline " " bitfld.long 0x00 27. " RPT2 ,Descriptor setting updating source address bit 2" "Disabled,Enabled" bitfld.long 0x00 26. " RPT1 ,Descriptor setting updating destination address bit 1" "Disabled,Enabled" bitfld.long 0x00 25. " RPT0 ,Descriptor setting updating bit transfer count 0" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " DPB ,Descriptor start bit" "From DMASAR/DMADAR/DMATCR,After Descriptor Read-out" bitfld.long 0x00 20.--21. 3.--4. " TS ,DMA transfer size" "Byte,Word,Longword,16-byte,32-byte,64-byte,,8-byte,?..." sif cpuis("R8A77440") bitfld.long 0x00 19. " DSE ,Descriptor stage end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor stage end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented," bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented," else bitfld.long 0x00 19. " DSE ,Descriptor step end" "Not ended,Ended" textline " " bitfld.long 0x00 18. " DSIE ,Descriptor step end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 14.--15. " DM ,Destination address mode" "Fixed,Incremented,Decremented,Fixed" bitfld.long 0x00 12.--13. " SM ,Source address mode" "Fixed,Incremented,Decremented,Fixed" endif textline " " bitfld.long 0x00 8.--11. " RS ,Resource selection" ",,,,Auto request,,,,Extended resource sel.,?..." bitfld.long 0x00 2. " IE ,Interrupt enabling" "Disabled,Enabled" bitfld.long 0x00 1. " TE ,Transfer end flag" "Not ended,Ended" textline " " bitfld.long 0x00 0. " DE ,DMA enable" "Disabled,Enabled" endif group.long (0x8600+0x1C)++0x03 line.long 0x00 "DMACHCRB_12,DMA Channel Control Register B_12" hexmask.long.byte 0x00 24.--31. 1. " DCNT ,Number of stages of descriptor memory" hexmask.long.byte 0x00 16.--23. 1. " DPTR ,Descriptor pointer" bitfld.long 0x00 15. " DRST ,Descriptor reset" "No reset,Reset" textline " " bitfld.long 0x00 8. " DTS ,Total size transmission under descriptor control" "Transfer count,Total size" bitfld.long 0x00 4.--7. " SLM ,DMA transfer low-speed mode" "Normal,,,,,,,,256 clock cycle,512 clock cycle,1024 clock cycle,2048 clock cycle,4096 clock cycle,8192 clock cycle,16384 clock cycle,32768 clock cycle" bitfld.long 0x00 0.--3. " PRI ,Channel request priority setting" "Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Lowest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority,Highest priority" group.long (0x8600+0x48)++0x03 line.long 0x00 "DMABUFCR_12,DMA Buffer Control Register 12" hexmask.long.word 0x00 16.--24. 1. " MBU ,Maximum burst unit for SDRAM" hexmask.long.word 0x00 0.--9. 1. " ULB ,Upper limit of buffer" group.word (0x8600+0x40)++0x01 line.word 0x00 "DMARS_12,DMA Extended Resource Selector 12" bitfld.word 0x00 2.--7. " MID ,DMA request source adoption " "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--1. " RID ,DMA request source adoption" "0,1,2,3" group.long (0x8600+0x50)++0x07 line.long 0x00 "DMADPBASE_12,DMA Descriptor Base Address Register 12" hexmask.long 0x00 4.--31. 0x10 " DPBASE ,Base address of Descriptor" sif cpuis("R8A77440") bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" ",Built-in or External" else bitfld.long 0x00 0. " SEL ,Descriptor memory selection bit" "Built-in descriptor,External" endif line.long 0x04 "DMADPCR_12,DMA Descriptor Control Register 12" hexmask.long.byte 0x04 24.--31. 1. " DIPT ,Descriptor read-out interrupt pointer" group.long (0x8600+0x10)++0x07 line.long 0x00 "DMAFIXSAR_12,DMA Fixed Source Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " SAR ,SAR[39:32]" line.long 0x04 "DMAFIXDAR_12,DMA Fixed Destination Address Register 12" hexmask.long.byte 0x04 0.--7. 1. " DAR ,DAR[39:32]" group.long (0x8600+0x60)++0x03 line.long 0x00 "DMAFIXDPBASE_12,DMA Fixed Descriptor Base Address Register 12" hexmask.long.byte 0x00 0.--7. 1. " DPBASE ,DPBASE[39:32]" tree.end textline "" group.long 0xA000++0x03 line.long 0x00 "DESCRIPTORMEM,Memory Descriptor for 0-12 Channels" button "DESCRIPTORMEM" "d (ad:0xEC700000+0xA000)--(ad:0xEC700000+0xA7FC) /long" width 0x0B tree.end tree "Audio DMAC-Peripheral-Peripheral" base ad:0xEC740000 width 10. sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x20++0x3 "DMAC Channel 0" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x20+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x20+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x20+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x20+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x20+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x20++0xB "DMAC Channel 0" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x20+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x30++0x3 "DMAC Channel 1" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x30+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x30+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x30+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x30+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x30+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x30++0xB "DMAC Channel 1" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x30+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x40++0x3 "DMAC Channel 2" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x40+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x40+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x40+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x40+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x40+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x40++0xB "DMAC Channel 2" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x40+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x50++0x3 "DMAC Channel 3" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x50+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x50+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x50+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x50+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x50+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x50++0xB "DMAC Channel 3" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x50+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x60++0x3 "DMAC Channel 4" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x60+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x60+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x60+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x60+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x60+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x60++0xB "DMAC Channel 4" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x60+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x70++0x3 "DMAC Channel 5" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x70+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x70+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x70+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x70+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x70+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x70++0xB "DMAC Channel 5" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x70+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x80++0x3 "DMAC Channel 6" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x80+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x80+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x80+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x80+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x80+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x80++0xB "DMAC Channel 6" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x80+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x90++0x3 "DMAC Channel 7" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x90+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x90+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x90+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x90+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x90+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x90++0xB "DMAC Channel 7" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x90+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xA0++0x3 "DMAC Channel 8" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xA0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xA0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xA0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xA0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xA0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xA0++0xB "DMAC Channel 8" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xA0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xB0++0x3 "DMAC Channel 9" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xB0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xB0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xB0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xB0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xB0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xB0++0xB "DMAC Channel 9" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xB0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xC0++0x3 "DMAC Channel 10" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xC0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xC0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xC0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xC0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xC0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xC0++0xB "DMAC Channel 10" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xC0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xD0++0x3 "DMAC Channel 11" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xD0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xD0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xD0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xD0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xD0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xD0++0xB "DMAC Channel 11" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xD0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xE0++0x3 "DMAC Channel 12" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xE0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xE0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xE0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xE0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xE0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xE0++0xB "DMAC Channel 12" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xE0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0xF0++0x3 "DMAC Channel 13" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0xF0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0xF0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0xF0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0xF0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0xF0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0xF0++0xB "DMAC Channel 13" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0xF0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x100++0x3 "DMAC Channel 14" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x100+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x100+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x100+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x100+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x100+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x100++0xB "DMAC Channel 14" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x100+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x110++0x3 "DMAC Channel 15" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x110+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x110+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x110+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x110+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x110+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x110++0xB "DMAC Channel 15" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x110+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x120++0x3 "DMAC Channel 16" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x120+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x120+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x120+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x120+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x120+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x120++0xB "DMAC Channel 16" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x120+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x130++0x3 "DMAC Channel 17" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x130+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x130+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x130+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x130+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x130+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x130++0xB "DMAC Channel 17" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x130+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x140++0x3 "DMAC Channel 18" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x140+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x140+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x140+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x140+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x140+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x140++0xB "DMAC Channel 18" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x140+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x150++0x3 "DMAC Channel 19" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x150+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x150+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x150+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x150+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x150+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x150++0xB "DMAC Channel 19" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x150+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x160++0x3 "DMAC Channel 20" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x160+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x160+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x160+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x160+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x160+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x160++0xB "DMAC Channel 20" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x160+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x170++0x3 "DMAC Channel 21" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x170+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x170+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x170+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x170+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x170+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x170++0xB "DMAC Channel 21" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x170+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x180++0x3 "DMAC Channel 22" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x180+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x180+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x180+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x180+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x180+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x180++0xB "DMAC Channel 22" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x180+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x190++0x3 "DMAC Channel 23" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x190+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x190+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x190+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x190+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x190+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x190++0xB "DMAC Channel 23" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x190+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1A0++0x3 "DMAC Channel 24" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1A0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1A0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1A0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1A0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1A0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1A0++0xB "DMAC Channel 24" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1A0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1B0++0x3 "DMAC Channel 25" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1B0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1B0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1B0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1B0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1B0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1B0++0xB "DMAC Channel 25" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1B0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1C0++0x3 "DMAC Channel 26" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1C0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1C0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1C0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1C0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1C0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1C0++0xB "DMAC Channel 26" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1C0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1D0++0x3 "DMAC Channel 27" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1D0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1D0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1D0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1D0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1D0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1D0++0xB "DMAC Channel 27" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1D0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif sif cpuis("R8J7795*")||cpuis("R8A7795*") group.long 0x1E0++0x3 "DMAC Channel 28" line.long 0x00 "PDMASAR,PDMA Source Address Register" group.long (0x1E0+0x20000)++0x3 line.long 0x00 "PDMASARE,PDMA Source Address Register (extended)" group.long (0x1E0+0x4)++0x3 line.long 0x00 "PDMADAR,PDMA Destination Address Register" group.long (0x1E0+0x20004)++0x3 line.long 0x00 "PDMADARE,PDMA Destination Address Register (extended)" group.long (0x1E0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" group.long (0x1E0+0x2000C)++0x3 line.long 0x00 "PDMACHCRE,PDMA Channel Control Register (extended)" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Source Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Destination Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" else group.long 0x1E0++0xB "DMAC Channel 28" line.long 0x00 "PDMASAR,PDMA Source Address Register" line.long 0x04 "PDMADAR,PDMA Destination Address Register" group.long (0x1E0+0x0C)++0x3 line.long 0x00 "PDMACHCR,PDMA Channel Control Register" hexmask.long.byte 0x00 24.--30. 1. " SRS ,Transfer Destination Request Source Select" hexmask.long.byte 0x00 16.--22. 1. " DRS ,Transfer Source Request Source Select" bitfld.long 0x00 0. " DE ,DMA Enable" "Disabled,Enabled" endif width 0xB tree.end tree "Ether (Ethernet MAC Controller)" base ad:0xEE700200 width 7. tree "HDMAC" group.long 0x00++0x03 line.long 0x00 "CXR0,HDMAC Operating Mode Setting Register" bitfld.long 0x00 6. " DE ,DMA Data Endian Conversion" "Not performed,Performed" bitfld.long 0x00 4.--5. " DL ,Transmit/Receive Descriptor Length" "16 bytes,32 bytes,64 bytes,?..." bitfld.long 0x00 0. " SWR ,HDMAC/feLic Software Reset" "No reset,Reset" group.long 0x08++0x03 line.long 0x00 "CXR1,Transmit Activation Register" bitfld.long 0x00 0. " TRNS ,Transmit Activation" "No effect,Enabled" group.long 0x10++0x03 line.long 0x00 "CXR2,Receive Activation Register" bitfld.long 0x00 0. " R ,Receive Ready" "Not ready,Ready" group.long 0x18++0x03 line.long 0x00 "CXR3,Transmit Descriptor Start Address Setting Register" group.long 0x20++0x03 line.long 0x00 "CXR4,Receive Descriptor Start Address Setting Register" group.long 0x28++0x03 line.long 0x00 "CXR5,Status Register" eventfld.long 0x00 30. " TWB ,Write-back to the transmit descriptor performe" "No interrupt,Interrupt" eventfld.long 0x00 26. " TABT ,Transmit Abort Detect" "No interrupt,Interrupt" eventfld.long 0x00 25. " RABT ,Receive Abort Detect" "No interrupt,Interrupt" textline " " eventfld.long 0x00 24. " RFRMER ,Receive Frame Count Overflow Occurrence" "No interrupt,Interrupt" eventfld.long 0x00 23. " BER ,Indicates that a DMA error is input" "No interrupt,Interrupt" bitfld.long 0x00 22. " MINT ,M Port Interrupt Occurrence" "No interrupt,Interrupt" textline " " eventfld.long 0x00 21. " FTC ,Frame Transmit Completion" "No interrupt,Interrupt" eventfld.long 0x00 20. " TDE ,Transmit Descriptor Depletion" "No interrupt,Interrupt" eventfld.long 0x00 19. " TFE ,Transmit FIFO Underflow Error Occurrence" "No interrupt,Interrupt" textline " " eventfld.long 0x00 18. " FRC ,Frame Receive Completion" "No interrupt,Interrupt" eventfld.long 0x00 17. " RDE ,Receive Descriptor Depletion" "No interrupt,Interrupt" eventfld.long 0x00 16. " RFE ,Receive FIFO Overflow Error Occurrence" "No interrupt,Interrupt" textline " " eventfld.long 0x00 15. " TINT8 ,Transmit Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 14. " TINT7 ,Transmit Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 13. " TINT6 ,Transmit Port Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 12. " TINT5 ,Transmit Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 11. " TINT4 ,Transmit Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 10. " TINT3 ,Transmit Port Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 9. " TINT2 ,Transmit Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 8. " TINT1 ,Transmit Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 7. " RINT8 ,Receive Port Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 6. " RINT7 ,Receive Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 5. " RINT6 ,Receive Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 4. " RINT5 ,Receive Port Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 3. " RINT4 ,Receive Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 2. " RINT3 ,Receive Port Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " RINT2 ,Receive Port Interrupt" "No interrupt,Interrupt" textline " " eventfld.long 0x00 0. " RINT1 ,Receive Port Interrupt" "No interrupt,Interrupt" group.long 0x30++0x03 line.long 0x00 "CXR6,Interrupt Enable Setting Register" bitfld.long 0x00 30. " TWB ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 26. " TABT ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 25. " RABT ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 24. " RFRMER ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " BER ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 22. " MINT ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 21. " FTC ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 20. " TDE ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFE ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 18. " FRC ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 17. " RDE ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 16. " RFE ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 15. " TINT8 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 14. " TINT7 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 13. " TINT6 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 12. " TINT5 ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 11. " TINT4 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 10. " TINT3 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 9. " TINT2 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 8. " TINT1 ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " RINT8 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 6. " RINT7 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " RINT6 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " RINT5 ,Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RINT4 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " RINT3 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " RINT2 ,Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " RINT1 ,Interrupt Enable" "Disabled,Enabled" group.long 0x38++0x03 line.long 0x00 "CXR7,Error Mask Setting Register" bitfld.long 0x00 15. " TINT8 ,Transmit Descriptor Error Flag (TFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 14. " TINT7 ,Transmit Descriptor Error Flag (TFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 13. " TINT6 ,Transmit Descriptor Error Flag (TFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 12. " TINT5 ,Transmit Descriptor Error Flag (TFE) Mask" "Not allowed,Allowed" textline " " bitfld.long 0x00 11. " TINT4 ,Transmit Descriptor Error Flag (TFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 10. " TINT3 ,Transmit Descriptor Error Flag (TFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 9. " TINT2 ,Transmit Descriptor Error Flag (TFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 8. " TINT1 ,Transmit Descriptor Error Flag (TFE) Mask" "Not allowed,Allowed" textline " " bitfld.long 0x00 7. " RINT8 ,Receive Descriptor Error Flag (RFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 6. " RINT7 ,Receive Descriptor Error Flag (RFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 5. " RINT6 ,Receive Descriptor Error Flag (RFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 4. " RINT5 ,Receive Descriptor Error Flag (RFE) Mask" "Not allowed,Allowed" textline " " bitfld.long 0x00 3. " RINT4 ,Receive Descriptor Error Flag (RFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 2. " RINT3 ,Receive Descriptor Error Flag (RFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 1. " RINT2 ,Receive Descriptor Error Flag (RFE) Mask" "Not allowed,Allowed" bitfld.long 0x00 0. " RINT1 ,Receive Descriptor Error Flag (RFE) Mask" "Not allowed,Allowed" group.long 0x40++0x03 line.long 0x00 "CXR8,Discarded Frame Counter Register" hexmask.long.word 0x00 0.--15. 1. " MIS ,Discarded Frame Counter" if (((per.l(ad:0xEE700200+0x08))&0x01)==0x01) rgroup.long 0x48++0x03 line.long 0x00 "CXR9,Transmit FIFO Threshold Setting Register" hexmask.long.word 0x00 0.--10. 1. " FO ,Transmit FIFO Threshold" else group.long 0x48++0x03 line.long 0x00 "CXR9,Transmit FIFO Threshold Setting Register" hexmask.long.word 0x00 0.--10. 1. " FO ,Transmit FIFO Threshold" endif if (((per.l(ad:0xEE700200+0x08))&0x1)==0x01)&&(((per.l(ad:0xEE700200+0x10))&0x1)==0x01) rgroup.long 0x50++0x03 line.long 0x00 "CXR10,External FIFO Depth Setting Register" bitfld.long 0x00 8.--12. " TA ,Transmit FIFO Depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." bitfld.long 0x00 0.--4. " RA ,Receive FIFO Depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." else group.long 0x50++0x03 line.long 0x00 "CXR10,External FIFO Depth Setting Register" bitfld.long 0x00 8.--12. " TA ,Transmit FIFO Depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." bitfld.long 0x00 0.--4. " RA ,Receive FIFO Depth" "256 bytes,512 bytes,768 bytes,1024 bytes,1280 bytes,1536 bytes,1792 bytes,2048 bytes,2304 bytes,2560 bytes,2816 bytes,3072 bytes,3328 bytes,3584 bytes,3840 bytes,4096 bytes,?..." endif if (((per.l(ad:0xEE700200+0x10))&0x1)==0x01) rgroup.long 0x58++0x03 line.long 0x00 "CXR11,Receive Activation Reset Method Setting Register" bitfld.long 0x00 0. " RR ,Receive Ready Reset" "Cleared,Reset" else group.long 0x58++0x03 line.long 0x00 "CXR11,Receive Activation Reset Method Setting Register" bitfld.long 0x00 0. " RR ,Receive Ready Reset" "Cleared,Reset" endif group.long 0x64++0x07 line.long 0x00 "CXR13,Transmit FIFO Underrun Counter Register" hexmask.long.word 0x00 0.--15. 1. " TFUF ,Transmit FIFO Underflow Counter" line.long 0x04 "CXR14,Receive FIFO Overflow Counter Register" hexmask.long.word 0x04 0.--15. 1. " RFOF ,Receive FIFO Overflow Counter" group.long 0x6C++0x03 line.long 0x00 "CXR15,RMII Mode Register" bitfld.long 0x00 0. " RMII ,RMII Mode Specification" "Disabled,Enabled" group.long 0x70++0x03 line.long 0x00 "CXR16,Receive FIFO Busy Transmit Threshold Setting Register" bitfld.long 0x00 16.--18. " RFF ,Busy Transmit Threshold based on the Number of Receive Frames" "2 frames,4 frames,6 frames,8 frames,10 frames,12 frames,14 frames,16 frames" bitfld.long 0x00 0.--2. " RFD ,Busy Transmit Threshold based on the Amount of Data in the Receive FIFO" "224 (256-32),480 (512-32),736 (768-32),992 (1024-32),1248(1280-32),1504(1536-32),1760 (1792-32),?..." textline " " group.long 0x7c++0x03 line.long 0x00 "CXR18,Transmit Interrupt Mode Setting Register" bitfld.long 0x00 4. " TIM ,Transmit Interrupt Mode" "Each time a frame transmitted,Write-back to the descriptor completed " bitfld.long 0x00 0. " TIS ,Interrupt Mode Enable" "Disabled,Enabled" tree.end tree "feLic" group.long 0x100++0x03 line.long 0x00 "CXR20,feLic Operating Mode Setting Register" bitfld.long 0x00 20. " TPC ,PAUSE Frame Transmission" "Enabled,Disabled" bitfld.long 0x00 19. " ZPF ,PAUSE Frame Enable with TIME = 0" "Disabled,Enabled" bitfld.long 0x00 18. " PFR ,PAUSE Frame Receive Mode" "Not transferred,Transferred" textline " " bitfld.long 0x00 17. " RXF ,Operating Mode for Reception Flow Control" "Disabled,Enabled" bitfld.long 0x00 16. " TXF ,Operating Mode for Transmission Flow Control" "Disabled,Enabled" bitfld.long 0x00 12. " CER ,CRC Error Frame Receive Mode" "Normal,CRC not error" textline " " bitfld.long 0x00 9. " MPM ,Magic Packet Detection Enable" "Disabled,Enabled" bitfld.long 0x00 6. " RPE ,Reception Enable" "Disabled,Enabled" bitfld.long 0x00 5. " TPE ,Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " ILB ,FELIC Loopback Mode" "Normal,Loopback" bitfld.long 0x00 2. " OLB ,10-Base T or 100-Base TX Transfer Setting" "10-base T,100-base TX" bitfld.long 0x00 1. " DPM ,Duplex Mode" "Half-duplex,Full-duplex" textline " " bitfld.long 0x00 0. " PRM ,Promiscuous Mode" "Normal,Enters promiscuous" group.long 0x108++0x03 line.long 0x00 "CXR2A,Long Frame Length Check Value Setting Register" hexmask.long.word 0x00 0.--11. 1. " FLUL ,Frame Length Upper Limit" group.long 0x110++0x03 line.long 0x00 "CXR21,Status Register" eventfld.long 0x00 4. " PRO ,PAUSE Frame Retransmit Retry Over" "No interrupt,Interrupt" eventfld.long 0x00 2. " LNK ,LINK Signal Change Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 1. " MPR ,Magic Packet Receive Interrupt" "No interrupt,Interrupt" eventfld.long 0x00 0. " FCD ,Illegal Carrier Detection Interrupt" "No interrupt,Interrupt" group.long 0x118++0x03 line.long 0x00 "CXR22,Interrupt Mask Setting Register" bitfld.long 0x00 4. " PROE ,PAUSE Frame Retransmit Retry Over Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " LKNE ,LINK Signal Change Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MPRE ,Magic Packet Receive Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " FCDE ,Illegal Carrier Detection Interrupt Enable" "Disabled,Enabled" group.long 0x120++0x03 line.long 0x00 "CXR23,MII Control Register" bitfld.long 0x00 3. " MDI ,MII Management Data In" "Not read,Read" bitfld.long 0x00 2. " MDO ,MII Management Data Out" "Not written,Written" bitfld.long 0x00 1. " MMD ,MII Management Mode" "Read,Written" bitfld.long 0x00 0. " MDC ,MII Management Clock" "Disabled,Enabled" rgroup.long 0x128++0x03 line.long 0x00 "CXR2B,PHY Status Register" bitfld.long 0x00 0. " LINK ,PHY output LINK signal monitoring status" "Disabled,Enabled" group.long 0x140++0x03 line.long 0x00 "CXR30,Random Number Generating Counter Upper Limit Setting Register" hexmask.long.tbyte 0x00 0.--19. 1. " RDM ,Upper limit of the Counter used for the Random Number Generator" group.long 0x150++0x07 line.long 0x00 "CXR70,IPG Counter Setting Register" bitfld.long 0x00 0.--4. " IPG ,IPG value in 40 ns units" "400 ns,400 ns,400 ns,400 ns,400 ns,400 ns,400 ns,440 ns,480 ns,520 ns,560 ns,600 ns,640 ns,680 ns,720 ns,760 ns,800 ns,840 ns,880 ns,920 ns,960 ns,1000 ns,1040 ns,1080 ns,1120 ns,1160 ns,1200 ns,1240 ns,1280 ns,1320 ns,1360 ns,1440 ns" line.long 0x04 "CXR71,Automatic PAUSE Parameter Setting Register" hexmask.long.word 0x04 0.--15. 1. " APAUSE ,TIME Parameter Value of an Automatic PAUSE Frame" wgroup.long 0x158++0x03 line.long 0x00 "CXR72,Manual PAUSE Parameter Setting Register" hexmask.long.word 0x00 0.--15. 1. " MPAUSE ,TIME Parameter Value of an Manual PAUSE Frame" rgroup.long 0x160++0x03 line.long 0x00 "CXR80,Receive PAUSE Frame Counter Register" hexmask.long.byte 0x00 0.--7. 1. " RPAUSE ,Received PAUSE frame Counter" group.long 0x164++0x03 line.long 0x00 "CXR81,PAUSE Frame Retransmit Count Setting Register" hexmask.long.word 0x00 0.--15. 1. " TXPAUSE ,Upper Limit of PAUSE Frame Retransmission" rgroup.long 0x168++0x03 line.long 0x00 "CXR82,PAUSE Frame Register Retransmit Counter Register" hexmask.long.word 0x00 0.--15. 1. " TXP ,PAUSE Frame Retransmit Counter" if (((per.l(ad:0xEE700200+0x100))&0x60)==0x60) rgroup.long 0x1c0++0x03 line.long 0x00 "CXR24,MAC Address High Register" rgroup.long 0x1c8++0x03 line.long 0x00 "CXR25,MAC Address Low Register" hexmask.long.word 0x00 0.--15. 1. " MACL ,MAC Address Lower 16 Bits" else group.long 0x1c0++0x03 line.long 0x00 "CXR24,MAC Address High Register" group.long 0x1c8++0x03 line.long 0x00 "CXR25,MAC Address Low Register" hexmask.long.word 0x00 0.--15. 1. " MACL ,MAC Address Lower 16 Bits" endif group.long 0x1d0++0x0f line.long 0x00 "CXR40,TINT1 Count Register" line.long 0x04 "CXR41,TINT2 Count Register" line.long 0x08 "CXR42,TINT3 Count Register" line.long 0x0c "CXR43,TINT4 Count Register" group.long 0x1e4++0x017 line.long 0x00 "CXR50,RINT1 Count Register" line.long 0x04 "CXR51,RINT2 Count Register" line.long 0x08 "CXR52,RINT3 Count Register" line.long 0x0c "CXR53,RINT4 Count Register" line.long 0x10 "CXR54,RINT5 Count Register" line.long 0x14 "CXR55,RINT8 Count Register" tree.end width 0x0b tree.end tree "EthernetAVB" base ad:0xE6800000 tree "AVB DMAC" width 9. if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x000++0x03 line.long 0x00 "CCC,AVB-DMAC Mode Register" bitfld.long 0x00 24. " LBME ,Loopback mode enable" "Enabled,Disabled" bitfld.long 0x00 16.--17. " CSEL[1:0] ,gPTP clock select" ",High speed per. clk,Ethernet TX clk,GMII ref. clk" bitfld.long 0x00 8. " DSTR ,Data transmission suspend request" "Normal operation,Request suspension" bitfld.long 0x00 0.--1. " OPC[1:0] ,Operation mode configuration" "Reset mode,Configuration mode,Operation mode,?..." group.long 0x004++0x03 line.long 0x00 "DBAT,Descriptor Base Address Table Register" hexmask.long 0x00 2.--31. 0x04 " TA ,Descriptor Base Table Address" else group.long 0x000++0x03 line.long 0x00 "CCC,AVB-DMAC Mode Register" rbitfld.long 0x00 24. " LBME ,Loopback mode enable" "Enabled,Disabled" rbitfld.long 0x00 16.--17. " CSEL[1:0] ,gPTP clock select" ",High speed per. clk,Ethernet TX clk,GMII ref. clk" bitfld.long 0x00 8. " DSTR ,Data transmission suspend request" "Normal operation,Request suspension" bitfld.long 0x00 0.--1. " OPC[1:0] ,Operation mode configuration" "Reset mode,Configuration mode,Operation mode,?..." rgroup.long 0x004++0x03 line.long 0x00 "DBAT,Descriptor Base Address Table Register" hexmask.long 0x00 2.--31. 0x04 " TA ,Descriptor Base Table Address" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x4) group.long 0x000++0x03 line.long 0x00 "DLR,Descriptor Base Address Load Request Register" bitfld.long 0x00 21. " LBA_21 ,Base address load request (Rx17: Stream 15)" "No effect,Load" bitfld.long 0x00 20. " LBA_20 ,Base address load request (Rx16: Stream 14)" "No effect,Load" bitfld.long 0x00 19. " LBA_19 ,Base address load request (Rx15: Stream 13)" "No effect,Load" bitfld.long 0x00 18. " LBA_18 ,Base address load request (Rx14: Stream 12)" "No effect,Load" bitfld.long 0x00 17. " LBA_17 ,Base address load request (Rx13: Stream 11)" "No effect,Load" bitfld.long 0x00 16. " LBA_16 ,Base address load request (Rx12: Stream 10)" "No effect,Load" textline " " bitfld.long 0x00 15. " LBA_15 ,Base address load request (Rx11: Stream 9)" "No effect,Load" bitfld.long 0x00 14. " LBA_14 ,Base address load request (Rx10: Stream 8)" "No effect,Load" bitfld.long 0x00 13. " LBA_13 ,Base address load request (Rx9: Stream 7)" "No effect,Load" bitfld.long 0x00 12. " LBA_12 ,Base address load request (Rx8: Stream 6)" "No effect,Load" bitfld.long 0x00 11. " LBA_11 ,Base address load request (Rx7: Stream 5)" "No effect,Load" bitfld.long 0x00 10. " LBA_10 ,Base address load request (Rx6: Stream 4)" "No effect,Load" textline " " bitfld.long 0x00 9. " LBA_9 ,Base address load request (Rx5: Stream 3)" "No effect,Load" bitfld.long 0x00 8. " LBA_8 ,Base address load request (Rx4: Stream 2)" "No effect,Load" bitfld.long 0x00 7. " LBA_7 ,Base address load request (Rx3: Stream 1)" "No effect,Load" bitfld.long 0x00 6. " LBA_6 ,Base address load request (Rx2: Stream 0)" "No effect,Load" bitfld.long 0x00 5. " LBA_5 ,Base address load request (Rx1: Network Control)" "No effect,Load" bitfld.long 0x00 4. " LBA_4 ,Base address load request (Rx0: Best Effort)" "No effect,Load" textline " " bitfld.long 0x00 3. " LBA_3 ,Base address load request (Tx3: Stream Class A)" "No effect,Load" bitfld.long 0x00 2. " LBA_2 ,Base address load request (TX2: Stream Class B)" "No effect,Load" bitfld.long 0x00 1. " LBA_1 ,Base address load request (Tx1: SNetwork Control)" "No effect,Load" bitfld.long 0x00 0. " LBA_0 ,Base address load request (Tx0: Best Effort)" "No effect,Load" else rgroup.long 0x000++0x03 line.long 0x00 "DLR,Descriptor Base Address Load Request Register" bitfld.long 0x00 21. " LBA_21 ,Base address load request (Rx17: Stream 15)" "No effect,Load" bitfld.long 0x00 20. " LBA_20 ,Base address load request (Rx16: Stream 14)" "No effect,Load" bitfld.long 0x00 19. " LBA_19 ,Base address load request (Rx15: Stream 13)" "No effect,Load" bitfld.long 0x00 18. " LBA_18 ,Base address load request (Rx14: Stream 12)" "No effect,Load" bitfld.long 0x00 17. " LBA_17 ,Base address load request (Rx13: Stream 11)" "No effect,Load" bitfld.long 0x00 16. " LBA_16 ,Base address load request (Rx12: Stream 10)" "No effect,Load" textline " " bitfld.long 0x00 15. " LBA_15 ,Base address load request (Rx11: Stream 9)" "No effect,Load" bitfld.long 0x00 14. " LBA_14 ,Base address load request (Rx10: Stream 8)" "No effect,Load" bitfld.long 0x00 13. " LBA_13 ,Base address load request (Rx9: Stream 7)" "No effect,Load" bitfld.long 0x00 12. " LBA_12 ,Base address load request (Rx8: Stream 6)" "No effect,Load" bitfld.long 0x00 11. " LBA_11 ,Base address load request (Rx7: Stream 5)" "No effect,Load" bitfld.long 0x00 10. " LBA_10 ,Base address load request (Rx6: Stream 4)" "No effect,Load" textline " " bitfld.long 0x00 9. " LBA_9 ,Base address load request (Rx5: Stream 3)" "No effect,Load" bitfld.long 0x00 8. " LBA_8 ,Base address load request (Rx4: Stream 2)" "No effect,Load" bitfld.long 0x00 7. " LBA_7 ,Base address load request (Rx3: Stream 1)" "No effect,Load" bitfld.long 0x00 6. " LBA_6 ,Base address load request (Rx2: Stream 0)" "No effect,Load" bitfld.long 0x00 5. " LBA_5 ,Base address load request (Rx1: Network Control)" "No effect,Load" bitfld.long 0x00 4. " LBA_4 ,Base address load request (Rx0: Best Effort)" "No effect,Load" textline " " bitfld.long 0x00 3. " LBA_3 ,Base address load request (Tx3: Stream Class A)" "No effect,Load" bitfld.long 0x00 2. " LBA_2 ,Base address load request (TX2: Stream Class B)" "No effect,Load" bitfld.long 0x00 1. " LBA_1 ,Base address load request (Tx1: SNetwork Control)" "No effect,Load" bitfld.long 0x00 0. " LBA_0 ,Base address load request (Tx0: Best Effort)" "No effect,Load" endif textline " " rgroup.long 0x008++0x03 line.long 0x00 "CSR,AVB-DMAC Status Register" bitfld.long 0x00 20. " RPO ,Receive process status" "Normal operation,Reception" bitfld.long 0x00 19. " TPO_3 ,Transmit process status 3 (Stream Class A)" "Normal operation,Transmission" bitfld.long 0x00 18. " TPO_2 ,Transmit process status 2 (Stream Class B)" "Normal operation,Transmission" bitfld.long 0x00 17. " TPO_1 ,Transmit process status 1 (Network control)" "Normal operation,Transmission" textline " " bitfld.long 0x00 16. " TPO_0 ,Transmit process status 0 (Best Effort)" "Normal operation,Transmission" bitfld.long 0x00 8. " DTS ,Data transmission suspended status" "Normal operation,Suspended" bitfld.long 0x00 0.--3. " OPS[3:0] ,Operating mode status" ",Reset mode,Configuration mode,,Operation mode,?..." rgroup.long 0x10++0x03 line.long 0x00 "CDAR_0,Current Descriptor Address Register 0" rgroup.long 0x14++0x03 line.long 0x00 "CDAR_1,Current Descriptor Address Register 1" rgroup.long 0x18++0x03 line.long 0x00 "CDAR_2,Current Descriptor Address Register 2" rgroup.long 0x1C++0x03 line.long 0x00 "CDAR_3,Current Descriptor Address Register 3" rgroup.long 0x20++0x03 line.long 0x00 "CDAR_4,Current Descriptor Address Register 4" rgroup.long 0x24++0x03 line.long 0x00 "CDAR_5,Current Descriptor Address Register 5" rgroup.long 0x28++0x03 line.long 0x00 "CDAR_6,Current Descriptor Address Register 6" rgroup.long 0x2C++0x03 line.long 0x00 "CDAR_7,Current Descriptor Address Register 7" rgroup.long 0x30++0x03 line.long 0x00 "CDAR_8,Current Descriptor Address Register 8" rgroup.long 0x34++0x03 line.long 0x00 "CDAR_9,Current Descriptor Address Register 9" rgroup.long 0x38++0x03 line.long 0x00 "CDAR_10,Current Descriptor Address Register 10" rgroup.long 0x3C++0x03 line.long 0x00 "CDAR_11,Current Descriptor Address Register 11" rgroup.long 0x40++0x03 line.long 0x00 "CDAR_12,Current Descriptor Address Register 12" rgroup.long 0x44++0x03 line.long 0x00 "CDAR_13,Current Descriptor Address Register 13" rgroup.long 0x48++0x03 line.long 0x00 "CDAR_14,Current Descriptor Address Register 14" rgroup.long 0x4C++0x03 line.long 0x00 "CDAR_15,Current Descriptor Address Register 15" rgroup.long 0x50++0x03 line.long 0x00 "CDAR_16,Current Descriptor Address Register 16" rgroup.long 0x54++0x03 line.long 0x00 "CDAR_17,Current Descriptor Address Register 17" rgroup.long 0x58++0x03 line.long 0x00 "CDAR_18,Current Descriptor Address Register 18" rgroup.long 0x5C++0x03 line.long 0x00 "CDAR_19,Current Descriptor Address Register 19" rgroup.long 0x60++0x03 line.long 0x00 "CDAR_20,Current Descriptor Address Register 20" rgroup.long 0x88++0x03 line.long 0x00 "ESR,Error Status Register" bitfld.long 0x00 12. " EIL ,Error information lost" "Not lost,Lost" bitfld.long 0x00 8.--11. " ET[3:0] ,Error type" "Read descriptor from URAM,Write descriptor to URAM,Interpret data descriptor,Tx-buffer is corrupted,Read data from URAM,Write data or timestamp to URAM,Reading from Rx-FIFO,Rx-FIFO is corrupted,Frame size error during RX detected,Frame size error during TX detected,Tx-buffer overflow,?..." textline " " bitfld.long 0x00 0.--4. " EQN[4:0] ,Error Queue Number" "TX queue 0,TX queue 1,TX queue 2,TX queue 3,Rx queue 0,Rx queue 1,Rx queue 2,Rx queue 3,Rx queue 4,Rx queue 5,Rx queue 6,Rx queue 7,Rx queue 8,Rx queue 9,Rx queue 10,Rx queue 11,Rx queue 12,Rx queue 13,Rx queue 14,Rx queue 15,Rx queue 16,Rx queue 17,?..." if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x90++0x03 line.long 0x00 "RCR,Receive Configuration Register" hexmask.long.word 0x00 16.--28. 1. " RFCL[12:0] ,Receive FIFO Caution Level" bitfld.long 0x00 5. " ETS_2 ,Time stamp enable (stream)" "Disabled,Enabled" bitfld.long 0x00 4. " ETS_0 ,Time stamp enable (best effort)" "Disabled,Enabled" bitfld.long 0x00 2.--3. " ESF[1:0] ,Stream filtering select. Settings for reception queues 2 to 17" "Disabled,Filter both. Non-matching to queue 0,AVB separating. Non-matching discarded,AVB separating. Non-matching to queue 0" textline " " bitfld.long 0x00 1. " ENCF ,Network control filtering enable" "Disabled,Enabled" bitfld.long 0x00 0. " EFFS ,Error frame enable" "Disabled,Enabled" else rgroup.long 0x90++0x03 line.long 0x00 "RCR,Receive Configuration Register" hexmask.long.word 0x00 16.--28. 1. " RFCL[12:0] ,Receive FIFO Caution Level" bitfld.long 0x00 5. " ETS_2 ,Time stamp enable (stream)" "Disabled,Enabled" bitfld.long 0x00 4. " ETS_0 ,Time stamp enable (best effort)" "Disabled,Enabled" bitfld.long 0x00 2.--3. " ESF[1:0] ,Stream filtering select. Settings for reception queues 2 to 17" "Disabled,Filter both. Non-matching to queue 0,AVB separating. Non-matching discarded,AVB separating. Non-matching to queue 0" textline " " bitfld.long 0x00 1. " ENCF ,Network control filtering enable" "Disabled,Enabled" bitfld.long 0x00 0. " EFFS ,Error frame enable" "Disabled,Enabled" endif textline "" if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x94++0x03 line.long 0x00 "RQC_0,Receive Queue Configuration Register 0" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 3)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 3)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 2)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 2)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 1)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 1)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 0)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 0)" "Write-back,,," else rgroup.long 0x94++0x03 line.long 0x00 "RQC_0,Receive Queue Configuration Register 0" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 3)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 3)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 2)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 2)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 1)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 1)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 0)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 0)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x98++0x03 line.long 0x00 "RQC_1,Receive Queue Configuration Register 1" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 7)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 7)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 6)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 6)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 5)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 5)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 4)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 4)" "Write-back,,," else rgroup.long 0x98++0x03 line.long 0x00 "RQC_1,Receive Queue Configuration Register 1" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 7)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 7)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 6)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 6)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 5)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 5)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 4)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 4)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x9C++0x03 line.long 0x00 "RQC_2,Receive Queue Configuration Register 2" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 11)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 11)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 10)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 10)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 9)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 9)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 8)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 8)" "Write-back,,," else rgroup.long 0x9C++0x03 line.long 0x00 "RQC_2,Receive Queue Configuration Register 2" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 11)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 11)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 10)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 10)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 9)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 9)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 8)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 8)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0xA0++0x03 line.long 0x00 "RQC_3,Receive Queue Configuration Register 3" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 15)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 15)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 14)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 14)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 13)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 13)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 12)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 12)" "Write-back,,," else rgroup.long 0xA0++0x03 line.long 0x00 "RQC_3,Receive Queue Configuration Register 3" bitfld.long 0x00 28.--29. " UFCC_3[1:0] ,Receive queue configuration register (receive queue 15)" "0,1,2,3" bitfld.long 0x00 24.--25. " RSM_3[1:0] ,Receive synchronous mode (receive queue 15)" "Write-back,,," bitfld.long 0x00 20.--21. " UFCC_2[1:0] ,Receive queue configuration register (receive queue 14)" "0,1,2,3" bitfld.long 0x00 16.--17. " RSM_2[1:0] ,Receive synchronous mode (receive queue 14)" "Write-back,,," textline " " bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 13)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 13)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 12)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 12)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0xA4++0x03 line.long 0x00 "RQC_4,Receive Queue Configuration Register 4" bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 17)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 17)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 16)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 16)" "Write-back,,," else rgroup.long 0xA4++0x03 line.long 0x00 "RQC_4,Receive Queue Configuration Register 4" bitfld.long 0x00 12.--13. " UFCC_1[1:0] ,Receive queue configuration register (receive queue 17)" "0,1,2,3" bitfld.long 0x00 8.--9. " RSM_1[1:0] ,Receive synchronous mode (receive queue 17)" "Write-back,,," bitfld.long 0x00 4.--5. " UFCC_0[1:0] ,Receive queue configuration register (receive queue 16)" "0,1,2,3" bitfld.long 0x00 0.--1. " RSM_0[1:0] ,Receive synchronous mode (receive queue 16)" "Write-back,,," endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0xB0++0x03 line.long 0x00 "RPC,Receive Padding Configuration Register" hexmask.long.byte 0x00 16.--23. 1. " DCNT[7:0] ,Store data counter" bitfld.long 0x00 8.--10. " PCNT[2:0] ,Stored Padding Counter" "0 bytes,4 bytes,8 bytes,12 bytes,16 bytes,20 bytes,24 bytes,28 bytes" textline "" group.long 0xBC++0x07 line.long 0x00 "UFCW,Unread Frame Counter Warning Level Configuration Register" bitfld.long 0x00 24.--29. " WL_3[5:0] ,Warning level 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " WL_2[5:0] ,Warning level 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " WL_1[5:0] ,Warning level 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " WL_0[5:0] ,Warning level 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "UFCS,Unread Frame Counter Stop Level Configuration Register" bitfld.long 0x04 24.--29. " SL_3[5:0] ,Stop level 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " SL_2[5:0] ,Stop level 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " SL_1[5:0] ,Stop level 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " SL_0[5:0] ,Stop level 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else rgroup.long 0xB0++0x03 line.long 0x00 "RPC,Receive Padding Configuration Register" hexmask.long.byte 0x00 16.--23. 1. " DCNT[7:0] ,Store data counter" bitfld.long 0x00 8.--10. " PCNT[2:0] ,Stored Padding Counter" "0 bytes,4 bytes,8 bytes,12 bytes,16 bytes,20 bytes,24 bytes,28 bytes" textline "" group.long 0xBC++0x07 line.long 0x00 "UFCW,Unread Frame Counter Warning Level Configuration Register" bitfld.long 0x00 24.--29. " WL_3[5:0] ,Warning level 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " WL_2[5:0] ,Warning level 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " WL_1[5:0] ,Warning level 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " WL_0[5:0] ,Warning level 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" line.long 0x04 "UFCS,Unread Frame Counter Stop Level Configuration Register" bitfld.long 0x04 24.--29. " SL_3[5:0] ,Stop level 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 16.--21. " SL_2[5:0] ,Stop level 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 8.--13. " SL_1[5:0] ,Stop level 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x04 0.--5. " SL_0[5:0] ,Stop level 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif rgroup.long (0xC4+0x0)++0x03 line.long 0x00 "UFCV_0,Unread Frame Counter Register 0" bitfld.long 0x00 24.--29. " CV_3[5:0] ,Unread frame count 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CV_2[5:0] ,Unread frame count 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long (0xC4+0x4)++0x03 line.long 0x00 "UFCV_1,Unread Frame Counter Register 1" bitfld.long 0x00 24.--29. " CV_3[5:0] ,Unread frame count 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CV_2[5:0] ,Unread frame count 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long (0xC4+0x8)++0x03 line.long 0x00 "UFCV_2,Unread Frame Counter Register 2" bitfld.long 0x00 24.--29. " CV_3[5:0] ,Unread frame count 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CV_2[5:0] ,Unread frame count 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long (0xC4+0xC)++0x03 line.long 0x00 "UFCV_3,Unread Frame Counter Register 3" bitfld.long 0x00 24.--29. " CV_3[5:0] ,Unread frame count 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CV_2[5:0] ,Unread frame count 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" rgroup.long (0xC4+0x10)++0x03 line.long 0x00 "UFCV_4,Unread Frame Counter Register 4" bitfld.long 0x00 8.--13. " CV_1[5:0] ,Unread frame count 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CV_0[5:0] ,Unread frame count 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0x0)++0x03 line.long 0x00 "UFCD_0,Unread Frame Counter Decrement Register 0" bitfld.long 0x00 24.--29. " DV_3[5:0] ,Unread frame decrement value 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DV_2[5:0] ,Unread frame decrement value 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0x4)++0x03 line.long 0x00 "UFCD_1,Unread Frame Counter Decrement Register 1" bitfld.long 0x00 24.--29. " DV_3[5:0] ,Unread frame decrement value 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DV_2[5:0] ,Unread frame decrement value 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0x8)++0x03 line.long 0x00 "UFCD_2,Unread Frame Counter Decrement Register 2" bitfld.long 0x00 24.--29. " DV_3[5:0] ,Unread frame decrement value 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DV_2[5:0] ,Unread frame decrement value 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0xC)++0x03 line.long 0x00 "UFCD_3,Unread Frame Counter Decrement Register 3" bitfld.long 0x00 24.--29. " DV_3[5:0] ,Unread frame decrement value 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " DV_2[5:0] ,Unread frame decrement value 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long (0xE0+0x10)++0x03 line.long 0x00 "UFCD_4,Unread Frame Counter Decrement Register 4" bitfld.long 0x00 8.--13. " DV_1[5:0] ,Unread frame decrement value 17" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " DV_0[5:0] ,Unread frame decrement value 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0xFC++0x03 line.long 0x00 "SFO,Separation Filter Offset Register" bitfld.long 0x00 0.--5. " FBP[5:0] ,First byte position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else rgroup.long 0xFC++0x03 line.long 0x00 "SFO,Separation Filter Offset Register" bitfld.long 0x00 0.--5. " FBP[5:0] ,First byte position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x100++0x03 line.long 0x00 "SFP_0,Separation Filter Pattern Register $3" else rgroup.long 0x100++0x03 line.long 0x00 "SFP_0,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x104++0x03 line.long 0x00 "SFP_1,Separation Filter Pattern Register $3" else rgroup.long 0x104++0x03 line.long 0x00 "SFP_1,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x108++0x03 line.long 0x00 "SFP_2,Separation Filter Pattern Register $3" else rgroup.long 0x108++0x03 line.long 0x00 "SFP_2,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x10C++0x03 line.long 0x00 "SFP_3,Separation Filter Pattern Register $3" else rgroup.long 0x10C++0x03 line.long 0x00 "SFP_3,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x110++0x03 line.long 0x00 "SFP_4,Separation Filter Pattern Register $3" else rgroup.long 0x110++0x03 line.long 0x00 "SFP_4,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x114++0x03 line.long 0x00 "SFP_5,Separation Filter Pattern Register $3" else rgroup.long 0x114++0x03 line.long 0x00 "SFP_5,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x118++0x03 line.long 0x00 "SFP_6,Separation Filter Pattern Register $3" else rgroup.long 0x118++0x03 line.long 0x00 "SFP_6,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x11C++0x03 line.long 0x00 "SFP_7,Separation Filter Pattern Register $3" else rgroup.long 0x11C++0x03 line.long 0x00 "SFP_7,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x120++0x03 line.long 0x00 "SFP_8,Separation Filter Pattern Register $3" else rgroup.long 0x120++0x03 line.long 0x00 "SFP_8,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x124++0x03 line.long 0x00 "SFP_9,Separation Filter Pattern Register $3" else rgroup.long 0x124++0x03 line.long 0x00 "SFP_9,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x128++0x03 line.long 0x00 "SFP_10,Separation Filter Pattern Register $3" else rgroup.long 0x128++0x03 line.long 0x00 "SFP_10,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x12C++0x03 line.long 0x00 "SFP_11,Separation Filter Pattern Register $3" else rgroup.long 0x12C++0x03 line.long 0x00 "SFP_11,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x130++0x03 line.long 0x00 "SFP_12,Separation Filter Pattern Register $3" else rgroup.long 0x130++0x03 line.long 0x00 "SFP_12,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x134++0x03 line.long 0x00 "SFP_13,Separation Filter Pattern Register $3" else rgroup.long 0x134++0x03 line.long 0x00 "SFP_13,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x138++0x03 line.long 0x00 "SFP_14,Separation Filter Pattern Register $3" else rgroup.long 0x138++0x03 line.long 0x00 "SFP_14,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x13C++0x03 line.long 0x00 "SFP_15,Separation Filter Pattern Register $3" else rgroup.long 0x13C++0x03 line.long 0x00 "SFP_15,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x140++0x03 line.long 0x00 "SFP_16,Separation Filter Pattern Register $3" else rgroup.long 0x140++0x03 line.long 0x00 "SFP_16,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x144++0x03 line.long 0x00 "SFP_17,Separation Filter Pattern Register $3" else rgroup.long 0x144++0x03 line.long 0x00 "SFP_17,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x148++0x03 line.long 0x00 "SFP_18,Separation Filter Pattern Register $3" else rgroup.long 0x148++0x03 line.long 0x00 "SFP_18,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x14C++0x03 line.long 0x00 "SFP_19,Separation Filter Pattern Register $3" else rgroup.long 0x14C++0x03 line.long 0x00 "SFP_19,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x150++0x03 line.long 0x00 "SFP_20,Separation Filter Pattern Register $3" else rgroup.long 0x150++0x03 line.long 0x00 "SFP_20,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x154++0x03 line.long 0x00 "SFP_21,Separation Filter Pattern Register $3" else rgroup.long 0x154++0x03 line.long 0x00 "SFP_21,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x158++0x03 line.long 0x00 "SFP_22,Separation Filter Pattern Register $3" else rgroup.long 0x158++0x03 line.long 0x00 "SFP_22,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x15C++0x03 line.long 0x00 "SFP_23,Separation Filter Pattern Register $3" else rgroup.long 0x15C++0x03 line.long 0x00 "SFP_23,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x160++0x03 line.long 0x00 "SFP_24,Separation Filter Pattern Register $3" else rgroup.long 0x160++0x03 line.long 0x00 "SFP_24,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x164++0x03 line.long 0x00 "SFP_25,Separation Filter Pattern Register $3" else rgroup.long 0x164++0x03 line.long 0x00 "SFP_25,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x168++0x03 line.long 0x00 "SFP_26,Separation Filter Pattern Register $3" else rgroup.long 0x168++0x03 line.long 0x00 "SFP_26,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x16C++0x03 line.long 0x00 "SFP_27,Separation Filter Pattern Register $3" else rgroup.long 0x16C++0x03 line.long 0x00 "SFP_27,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x170++0x03 line.long 0x00 "SFP_28,Separation Filter Pattern Register $3" else rgroup.long 0x170++0x03 line.long 0x00 "SFP_28,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x174++0x03 line.long 0x00 "SFP_29,Separation Filter Pattern Register $3" else rgroup.long 0x174++0x03 line.long 0x00 "SFP_29,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x178++0x03 line.long 0x00 "SFP_30,Separation Filter Pattern Register $3" else rgroup.long 0x178++0x03 line.long 0x00 "SFP_30,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x17C++0x03 line.long 0x00 "SFP_31,Separation Filter Pattern Register $3" else rgroup.long 0x17C++0x03 line.long 0x00 "SFP_31,Separation Filter Pattern Register $3" endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x2) group.long 0x1C0++0x07 line.long 0x00 "SFM_0,Separation Filter Mask Register 0" line.long 0x04 "SFM_1,Separation Filter Mask Register 1" group.long 0x300++0x03 line.long 0x00 "TGC,Transmit Configuration Register" bitfld.long 0x00 20.--21. " TBD_3[1:0] ,Transmit FIFO size (Stream Class A)" "0,1,2,3" bitfld.long 0x00 16.--17. " TBD_2[1:0] ,Transmit FIFO size (Stream Class B)" "0,1,2,3" bitfld.long 0x00 12.--13. " TBD_1[1:0] ,Transmit FIFO size (Network Control)" "0,1,2,3" bitfld.long 0x00 8.--9. " TBD_0[1:0] ,Transmit FIFO size (Best Effort)" "0,1,2,3" textline " " bitfld.long 0x00 4.--5. " TQP[1:0] ,Transmit queue priority" "Non-AVB mode,AVB mode 1,,AVB mode 2" bitfld.long 0x00 3. " TSM_3 ,Transmit synchronous mode (Stream Class A)" "Write-back,?..." bitfld.long 0x00 2. " TSM_2 ,Transmit synchronous mode (Stream Class B)" "Write-back,?..." bitfld.long 0x00 1. " TSM_1 ,Transmit synchronous mode (Network Control)" "Write-back,?..." textline " " bitfld.long 0x00 0. " TSM_0 ,Transmit synchronous mode (Best Effort)" "Write-back,?..." else rgroup.long 0x1C0++0x07 line.long 0x00 "SFM_0,Separation Filter Mask Register 0" line.long 0x04 "SFM_1,Separation Filter Mask Register 1" rgroup.long 0x300++0x03 line.long 0x00 "TGC,Transmit Configuration Register" bitfld.long 0x00 20.--21. " TBD_3[1:0] ,Transmit FIFO size (Stream Class A)" "0,1,2,3" bitfld.long 0x00 16.--17. " TBD_2[1:0] ,Transmit FIFO size (Stream Class B)" "0,1,2,3" bitfld.long 0x00 12.--13. " TBD_1[1:0] ,Transmit FIFO size (Network Control)" "0,1,2,3" bitfld.long 0x00 8.--9. " TBD_0[1:0] ,Transmit FIFO size (Best Effort)" "0,1,2,3" textline " " bitfld.long 0x00 4.--5. " TQP[1:0] ,Transmit queue priority" "Non-AVB mode,AVB mode 1,,AVB mode 2" bitfld.long 0x00 3. " TSM_3 ,Transmit synchronous mode (Stream Class A)" "Write-back,?..." bitfld.long 0x00 2. " TSM_2 ,Transmit synchronous mode (Stream Class B)" "Write-back,?..." bitfld.long 0x00 1. " TSM_1 ,Transmit synchronous mode (Network Control)" "Write-back,?..." textline " " bitfld.long 0x00 0. " TSM_0 ,Transmit synchronous mode (Best Effort)" "Write-back,?..." endif if (((per.l(ad:0xE6800000+0xC)&0x7))==0x4) group.long 0x304++0x03 line.long 0x00 "TCCR,Transmit Configuration Control Register" bitfld.long 0x00 9. " TFR ,Time stamp FIFO release" "No effect,Release" bitfld.long 0x00 8. " TFEN ,Time stamp FIFO enable" "Disabled,Enabled" bitfld.long 0x00 3. " TSRQ_3 ,Transmit start request (Queue 3 (Stream Class A))" "Empty or stopped,Requested" textline " " bitfld.long 0x00 2. " TSRQ_2 ,Transmit start request (Queue 2 (Stream Class B))" "Empty or stopped,Requested" bitfld.long 0x00 1. " TSRQ_1 ,Transmit start request (Queue 1 (Network Control))" "Empty or stopped,Requested" bitfld.long 0x00 0. " TSRQ_0 ,Transmit start request (Queue 0 (Best Effort))" "Empty or stopped,Requested" else group.long 0x304++0x03 line.long 0x00 "TCCR,Transmit Configuration Control Register" bitfld.long 0x00 9. " TFR ,Time stamp FIFO release" "No effect,Release" bitfld.long 0x00 8. " TFEN ,Time stamp FIFO enable" "Disabled,Enabled" rbitfld.long 0x00 3. " TSRQ_3 ,Transmit start request (Queue 3 (Stream Class A))" "Empty or stopped,Requested" textline " " rbitfld.long 0x00 2. " TSRQ_2 ,Transmit start request (Queue 2 (Stream Class B))" "Empty or stopped,Requested" rbitfld.long 0x00 1. " TSRQ_1 ,Transmit start request (Queue 1 (Network Control))" "Empty or stopped,Requested" rbitfld.long 0x00 0. " TSRQ_0 ,Transmit start request (Queue 0 (Best Effort))" "Empty or stopped,Requested" endif rgroup.long 0x308++0x0F line.long 0x00 "TSR,Transmit Status Register" bitfld.long 0x00 8.--10. " TFFL[2:0] ,Time Stamp FIFO Count" "Empty,1,Full,?..." bitfld.long 0x00 2.--3. " CCS_1[1:0] ,CBS counter status 1 (Class A)" "Within limit,Less or equal lower,Greater or equal upper,?..." bitfld.long 0x00 0.--1. " CCS_0[1:0] ,CBS counter status 0 (Class B)" "Within limit,Less or equal lower,Greater or equal upper,?..." line.long 0x04 "TFA_0,Time Stamp FIFO Access Register 0" hexmask.long 0x04 0.--31. 1. " TSV[31:0] ,Time stamp value bits 31:0" line.long 0x08 "TFA_1,Time Stamp FIFO Access Register 1" hexmask.long 0x08 0.--31. 1. " TSV[63:32] ,Time stamp value bits 63:32" line.long 0x0C "TFA_2,Time Stamp FIFO Access Register 2" hexmask.long.word 0x0C 16.--25. 1. " TST[9:0] ,Time stamp tag" hexmask.long.word 0x0C 0.--15. 1. " TSV[79:64] ,Time stamp value bits 79:64" group.long 0x320++0x1F line.long 0x00 "CIVR_0,CBS Increment Value Register 0" line.long 0x04 "CIVR_1,CBS Increment Value Register 1" line.long 0x08 "CDVR_0,CBS Decrement Value Register 0" line.long 0x0C "CDVR_1,CBS Decrement Value Register 1" line.long 0x10 "CUL_0,CBS Upper Limit Register 0" line.long 0x14 "CUL_1,CBS Upper Limit Register 1" line.long 0x18 "CLL_0,CBS Lower Limit Register 0" line.long 0x1C "CLL_1,CBS Lower Limit Register 1" group.long 0x350++0x33 line.long 0x00 "DIC,Descriptor Interrupt Control Register" bitfld.long 0x00 15. " DPE_15 ,Descriptor Interrupt Enable 15" "Disabled,Enabled" bitfld.long 0x00 14. " DPE_14 ,Descriptor Interrupt Enable 14" "Disabled,Enabled" bitfld.long 0x00 13. " DPE_13 ,Descriptor Interrupt Enable 13" "Disabled,Enabled" bitfld.long 0x00 12. " DPE_12 ,Descriptor Interrupt Enable 12" "Disabled,Enabled" bitfld.long 0x00 11. " DPE_11 ,Descriptor Interrupt Enable 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DPE_10 ,Descriptor Interrupt Enable 10" "Disabled,Enabled" bitfld.long 0x00 9. " DPE_9 ,Descriptor Interrupt Enable 9" "Disabled,Enabled" bitfld.long 0x00 8. " DPE_8 ,Descriptor Interrupt Enable 8" "Disabled,Enabled" bitfld.long 0x00 7. " DPE_7 ,Descriptor Interrupt Enable 7" "Disabled,Enabled" bitfld.long 0x00 6. " DPE_6 ,Descriptor Interrupt Enable 6" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " DPE_5 ,Descriptor Interrupt Enable 5" "Disabled,Enabled" bitfld.long 0x00 4. " DPE_4 ,Descriptor Interrupt Enable 4" "Disabled,Enabled" bitfld.long 0x00 3. " DPE_3 ,Descriptor Interrupt Enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " DPE_2 ,Descriptor Interrupt Enable 2" "Disabled,Enabled" bitfld.long 0x00 1. " DPE_1 ,Descriptor Interrupt Enable 1" "Disabled,Enabled" line.long 0x04 "DIS,Descriptor Interrupt Status Register" bitfld.long 0x04 15. " DPF_15 ,Descriptor Interrupt Status 15" "No interrupt,Interrupt" bitfld.long 0x04 14. " DPF_14 ,Descriptor Interrupt Status 14" "No interrupt,Interrupt" bitfld.long 0x04 13. " DPF_13 ,Descriptor Interrupt Status 13" "No interrupt,Interrupt" bitfld.long 0x04 12. " DPF_12 ,Descriptor Interrupt Status 12" "No interrupt,Interrupt" bitfld.long 0x04 11. " DPF_11 ,Descriptor Interrupt Status 11" "No interrupt,Interrupt" textline " " bitfld.long 0x04 10. " DPF_10 ,Descriptor Interrupt Status 10" "No interrupt,Interrupt" bitfld.long 0x04 9. " DPF_9 ,Descriptor Interrupt Status 9" "No interrupt,Interrupt" bitfld.long 0x04 8. " DPF_8 ,Descriptor Interrupt Status 8" "No interrupt,Interrupt" bitfld.long 0x04 7. " DPF_7 ,Descriptor Interrupt Status 7" "No interrupt,Interrupt" bitfld.long 0x04 6. " DPF_6 ,Descriptor Interrupt Status 6" "No interrupt,Interrupt" textline " " bitfld.long 0x04 5. " DPF_5 ,Descriptor Interrupt Status 5" "No interrupt,Interrupt" bitfld.long 0x04 4. " DPF_4 ,Descriptor Interrupt Status 4" "No interrupt,Interrupt" bitfld.long 0x04 3. " DPF_3 ,Descriptor Interrupt Status 3" "No interrupt,Interrupt" bitfld.long 0x04 2. " DPF_2 ,Descriptor Interrupt Status 2" "No interrupt,Interrupt" bitfld.long 0x04 1. " DPF_1 ,Descriptor Interrupt Status 1" "No interrupt,Interrupt" line.long 0x08 "EIC,Error Interrupt Control Register" bitfld.long 0x08 8. " TFFE ,Time stamp FIFO full-error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 7. " CULE_1 ,CBS upper limit error interrupt enable (Class A)" "Disabled,Enabled" bitfld.long 0x08 6. " CULE_0 ,CBS upper limit error interrupt enable (Class B)" "Disabled,Enabled" textline " " bitfld.long 0x08 5. " CLLE_1 ,CBS lower limit error interrupt enable (Class A)" "Disabled,Enabled" bitfld.long 0x08 4. " CLLE_0 ,CBS lower limit error interrupt enable (Class B)" "Disabled,Enabled" bitfld.long 0x08 3. " SEE ,Separation error interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x08 2. " QEE ,Queue error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 1. " MTEE ,E-MAC transmission error interrupt enable" "Disabled,Enabled" bitfld.long 0x08 0. " MREE ,E-MAC reception error interrupt enable" "Disabled,Enabled" line.long 0x0C "EIS,Error Interrupt Status Register" bitfld.long 0x0C 16. " QFS ,Queue full error interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 8. " TFFF ,Time stamp FIFO full-error interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 7. " CULF_1 ,CBS upper limit error interrupt status (Class A)" "No interrupt,Interrupt" bitfld.long 0x0C 6. " CULF_0 ,CBS upper limit error interrupt status (Class B)" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 5. " CLLF_1 ,CBS lower limit error interrupt status (Class A)" "No interrupt,Interrupt" bitfld.long 0x0C 4. " CLLF_0 ,CBS lower limit error interrupt status (Class B)" "No interrupt,Interrupt" bitfld.long 0x0C 3. " SEF ,Separation error interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x0C 2. " QEF ,Queue error interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 1. " MTEF ,E-MAC transmission error interrupt status" "No interrupt,Interrupt" bitfld.long 0x0C 0. " MREF ,E-MAC reception error interrupt status" "No interrupt,Interrupt" line.long 0x10 "RIC_0,Receive Interrupt Control Register 0" bitfld.long 0x10 17. " FRE_17 ,Receive frame enable 17 (Stream)" "Disabled,Enabled" bitfld.long 0x10 16. " FRE_16 ,Receive frame enable 16 (Stream)" "Disabled,Enabled" bitfld.long 0x10 15. " FRE_15 ,Receive frame enable 15 (Stream)" "Disabled,Enabled" bitfld.long 0x10 14. " FRE_14 ,Receive frame enable 14 (Stream)" "Disabled,Enabled" textline " " bitfld.long 0x10 13. " FRE_13 ,Receive frame enable 13 (Stream)" "Disabled,Enabled" bitfld.long 0x10 12. " FRE_12 ,Receive frame enable 12 (Stream)" "Disabled,Enabled" bitfld.long 0x10 11. " FRE_11 ,Receive frame enable 11 (Stream)" "Disabled,Enabled" bitfld.long 0x10 10. " FRE_10 ,Receive frame enable 10 (Stream)" "Disabled,Enabled" textline " " bitfld.long 0x10 9. " FRE_9 ,Receive frame enable 9 (Stream)" "Disabled,Enabled" bitfld.long 0x10 8. " FRE_8 ,Receive frame enable 8 (Stream)" "Disabled,Enabled" bitfld.long 0x10 7. " FRE_7 ,Receive frame enable 7 (Stream)" "Disabled,Enabled" bitfld.long 0x10 6. " FRE_6 ,Receive frame enable 6 (Stream)" "Disabled,Enabled" textline " " bitfld.long 0x10 5. " FRE_5 ,Receive frame enable 5 (Stream)" "Disabled,Enabled" bitfld.long 0x10 4. " FRE_4 ,Receive frame enable 4 (Stream)" "Disabled,Enabled" bitfld.long 0x10 3. " FRE_3 ,Receive frame enable 3 (Stream)" "Disabled,Enabled" bitfld.long 0x10 2. " FRE_2 ,Receive frame enable 2 (Stream)" "Disabled,Enabled" textline " " bitfld.long 0x10 1. " FRE_1 ,Receive frame enable 1 (Network Control)" "Disabled,Enabled" bitfld.long 0x10 0. " FRE_0 ,Receive frame enable 0 (Best Effort)" "Disabled,Enabled" line.long 0x14 "RIS_0,Receive Interrupt Status Register 0" bitfld.long 0x14 17. " FRF_17 ,Receive frame interrupt status 17 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 16. " FRF_16 ,Receive frame interrupt status 16 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 15. " FRF_15 ,Receive frame interrupt status 15 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 14. " FRF_14 ,Receive frame interrupt status 14 (Stream)" "No interrupt,Interrupt" textline " " bitfld.long 0x14 13. " FRF_13 ,Receive frame interrupt status 13 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 12. " FRF_12 ,Receive frame interrupt status 12 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 11. " FRF_11 ,Receive frame interrupt status 11 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 10. " FRF_10 ,Receive frame interrupt status 10 (Stream)" "No interrupt,Interrupt" textline " " bitfld.long 0x14 9. " FRF_9 ,Receive frame interrupt status 9 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 8. " FRF_8 ,Receive frame interrupt status 8 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 7. " FRF_7 ,Receive frame interrupt status 7 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 6. " FRF_6 ,Receive frame interrupt status 6 (Stream)" "No interrupt,Interrupt" textline " " bitfld.long 0x14 5. " FRF_5 ,Receive frame interrupt status 5 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 4. " FRF_4 ,Receive frame interrupt status 4 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 3. " FRF_3 ,Receive frame interrupt status 3 (Stream)" "No interrupt,Interrupt" bitfld.long 0x14 2. " FRF_2 ,Receive frame interrupt status 2 (Stream)" "No interrupt,Interrupt" textline " " bitfld.long 0x14 1. " FRF_1 ,Receive frame interrupt status 1 (Network Control)" "No interrupt,Interrupt" bitfld.long 0x14 0. " FRF_0 ,Receive frame interrupt status 0 (Best Effort)" "No interrupt,Interrupt" line.long 0x18 "RIC_1,Receive Interrupt Control Register 1" bitfld.long 0x18 31. " RFWE ,Receive FIFO warning interrupt enable" "Disabled,Enabled" line.long 0x1C "RIS_1,Receive Interrupt Status Register 1" bitfld.long 0x1C 31. " RFWE ,Receive FIFO warning status enable" "No interrupt,Interrupt" line.long 0x20 "RIC_2,Receive Interrupt Control Register 2" bitfld.long 0x20 31. " QFE_31 ,Receive FIFO full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 17. " QFE_17 ,Receive queue 17 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 16. " QFE_16 ,Receive queue 16 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 15. " QFE_15 ,Receive queue 15 (Stream) full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 14. " QFE_14 ,Receive queue 14 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 13. " QFE_13 ,Receive queue 13 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 12. " QFE_12 ,Receive queue 12 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 11. " QFE_11 ,Receive queue 11 (Stream) full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 10. " QFE_10 ,Receive queue 10 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 9. " QFE_9 ,Receive queue 9 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 8. " QFE_8 ,Receive queue 8 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 7. " QFE_7 ,Receive queue 7 (Stream) full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 6. " QFE_6 ,Receive queue 6 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 5. " QFE_5 ,Receive queue 5 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 4. " QFE_4 ,Receive queue 4 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 3. " QFE_3 ,Receive queue 3 (Stream) full interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x20 2. " QFE_2 ,Receive queue 2 (Stream) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 1. " QFE_1 ,Receive queue 1 (Network Control) full interrupt enable" "Disabled,Enabled" bitfld.long 0x20 0. " QFE_0 ,Receive queue 0 (Best Effort) full interrupt enable" "Disabled,Enabled" line.long 0x24 "RIS_2,Receive Interrupt Status Register 2" bitfld.long 0x24 31. " QFE_31 ,Receive FIFO full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 17. " QFE_17 ,Receive queue 17 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 16. " QFE_16 ,Receive queue 16 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 15. " QFE_15 ,Receive queue 15 (Stream) full interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x24 14. " QFE_14 ,Receive queue 14 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 13. " QFE_13 ,Receive queue 13 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 12. " QFE_12 ,Receive queue 12 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 11. " QFE_11 ,Receive queue 11 (Stream) full interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x24 10. " QFE_10 ,Receive queue 10 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 9. " QFE_9 ,Receive queue 9 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 8. " QFE_8 ,Receive queue 8 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 7. " QFE_7 ,Receive queue 7 (Stream) full interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x24 6. " QFE_6 ,Receive queue 6 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 5. " QFE_5 ,Receive queue 5 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 4. " QFE_4 ,Receive queue 4 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 3. " QFE_3 ,Receive queue 3 (Stream) full interrupt status" "No interrupt,Interrupt" textline " " bitfld.long 0x24 2. " QFE_2 ,Receive queue 2 (Stream) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 1. " QFE_1 ,Receive queue 1 (Network Control) full interrupt status" "No interrupt,Interrupt" bitfld.long 0x24 0. " QFE_0 ,Receive queue 0 (Best Effort) full interrupt status" "No interrupt,Interrupt" line.long 0x28 "TIC,Transmit Interrupt Control Register" bitfld.long 0x28 9. " TFWE ,Time stamp FIFO warning interrupt enable" "Disabled,Enabled" bitfld.long 0x28 8. " TFUE ,Time stamp FIFO update interrupt enable" "Disabled,Enabled" line.long 0x2C "TIC,Transmit Interrupt Control Register" bitfld.long 0x2C 9. " TFWE ,Time stamp FIFO warning interrupt status" "No interrupt,Interrupt" bitfld.long 0x2C 8. " TFUE ,Time stamp FIFO update interrupt status" "No interrupt,Interrupt" line.long 0x30 "ISS,Interrupt Summary Status Register" bitfld.long 0x30 31. " DPS_15 ,Descriptor interrupt 15 summary" "No interrupt,Interrupt" bitfld.long 0x30 30. " DPS_14 ,Descriptor interrupt 14 summary" "No interrupt,Interrupt" bitfld.long 0x30 29. " DPS_13 ,Descriptor interrupt 13 summary" "No interrupt,Interrupt" bitfld.long 0x30 28. " DPS_12 ,Descriptor interrupt 12 summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 27. " DPS_11 ,Descriptor interrupt 11 summary" "No interrupt,Interrupt" bitfld.long 0x30 26. " DPS_10 ,Descriptor interrupt 10 summary" "No interrupt,Interrupt" bitfld.long 0x30 25. " DPS_9 ,Descriptor interrupt 9 summary" "No interrupt,Interrupt" bitfld.long 0x30 24. " DPS_8 ,Descriptor interrupt 8 summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 23. " DPS_7 ,Descriptor interrupt 7 summary" "No interrupt,Interrupt" bitfld.long 0x30 22. " DPS_6 ,Descriptor interrupt 6 summary" "No interrupt,Interrupt" bitfld.long 0x30 21. " DPS_5 ,Descriptor interrupt 5 summary" "No interrupt,Interrupt" bitfld.long 0x30 20. " DPS_4 ,Descriptor interrupt 4 summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 19. " DPS_3 ,Descriptor interrupt 3 summary" "No interrupt,Interrupt" bitfld.long 0x30 18. " DPS_2 ,Descriptor interrupt 2 summary" "No interrupt,Interrupt" bitfld.long 0x30 17. " DPS_1 ,Descriptor interrupt 1 summary" "No interrupt,Interrupt" bitfld.long 0x30 13. " CGIS ,gPTP interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 12. " RFWS ,Receive FIFO warning interrupt summary" "No interrupt,Interrupt" bitfld.long 0x30 9. " TFWS ,Time stamp FIFO warning interrupt summary" "No interrupt,Interrupt" bitfld.long 0x30 8. " TFUS ,Time stamp FIFO update interrupt summary" "No interrupt,Interrupt" bitfld.long 0x30 7. " MS ,E-MAC interrupt summary" "No interrupt,Interrupt" textline " " bitfld.long 0x30 6. " ES ,Error interrupt summary" "No interrupt,Interrupt" width 7. if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x3))==0x0)&&(((per.l(ad:0xE6800000+0x0)&0x30000))!=0x0)) group.long 0x390++0x03 "gPTP Registers" line.long 0x00 "GCCR,gPTP Configuration Control Register" bitfld.long 0x00 8.--9. " TCSS[1:0] ,Timer capture source select" "gPTP timer value,Adjusted gPTP timer value,AVTP presentation time,?..." bitfld.long 0x00 5. " LMTT ,Maximum transit time configuration request" "Setting completed,Requested" bitfld.long 0x00 4. " LPTC ,Presentation time compare value configuration request" "Setting completed,Requested" textline " " bitfld.long 0x00 3. " LTI ,Timer increment value configuration request" "Setting completed,Requested" bitfld.long 0x00 2. " LTO ,Timer offset value configuration request" "Setting completed,Requested" bitfld.long 0x00 0.--1. " TCR[1:0] ,Timer Control Request" "Not requested,gPTP/AVTP present. time reset,,Captures value set in TCSS" else group.long 0x390++0x03 "gPTP Registers" line.long 0x00 "GCCR,gPTP Configuration Control Register" bitfld.long 0x00 8.--9. " TCSS[1:0] ,Timer capture source select" "gPTP timer value,Adjusted gPTP timer value,AVTP presentation time,?..." bitfld.long 0x00 5. " LMTT ,Maximum transit time configuration request" "Setting completed,Requested" bitfld.long 0x00 4. " LPTC ,Presentation time compare value configuration request" "Setting completed,Requested" textline " " bitfld.long 0x00 3. " LTI ,Timer increment value configuration request" "Setting completed,Requested" bitfld.long 0x00 2. " LTO ,Timer offset value configuration request" "Setting completed,Requested" rbitfld.long 0x00 0.--1. " TCR[1:0] ,Timer Control Request" "Not requested,gPTP/AVTP present. time reset,,Captures value set in TCSS" endif if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x20))==0x20)) rgroup.long 0x394++0x03 line.long 0x00 "GMTT,gPTP Maximum Transit Time Configuration Register" else group.long 0x394++0x03 line.long 0x00 "GMTT,gPTP Maximum Transit Time Configuration Register" endif if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x10))==0x10)) rgroup.long 0x398++0x03 line.long 0x00 "GPTC,gPTP Presentation Time Comparison Register" else group.long 0x398++0x03 line.long 0x00 "GPTC,gPTP Presentation Time Comparison Register" endif if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x8))==0x8)) rgroup.long 0x39C++0x03 line.long 0x00 "GTI,gPTP Timer Increment Configuration Register" hexmask.long 0x00 0.--27. 1. " TIV[27:0] ,gPTP Timer Increment Value" else group.long 0x39C++0x03 line.long 0x00 "GTI,gPTP Timer Increment Configuration Register" hexmask.long 0x00 0.--27. 1. " TIV[27:0] ,gPTP Timer Increment Value" endif if ((((per.l(ad:0xE6800000+0xC)&0x7))==0x4)&&(((per.l(ad:0xE6800000+0x390)&0x4))==0x4)) rgroup.long 0x3A0++0x0B line.long 0x00 "GTO_0,gPTP Timer Offset Configuration Register 0" hexmask.long 0x00 0.--31. 1. " TOV[31:0] ,Timer offset value bits 31:0" line.long 0x04 "GTO_1,gPTP Timer Offset Configuration Register 1" hexmask.long 0x04 0.--31. 1. " TOV[63:32] ,Timer offset value bits 63:32" line.long 0x08 "GTO_2,gPTP Timer Offset Configuration Register 2" hexmask.long.word 0x08 0.--15. 1. " TOV[79:64] ,Timer offset value bits 79:64" else group.long 0x3A0++0x0B line.long 0x00 "GTO_0,gPTP Timer Offset Configuration Register 0" hexmask.long 0x00 0.--31. 1. " TOV[31:0] ,Timer offset value bits 31:0" line.long 0x04 "GTO_1,gPTP Timer Offset Configuration Register 1" hexmask.long 0x04 0.--31. 1. " TOV[63:32] ,Timer offset value bits 63:32" line.long 0x08 "GTO_2,gPTP Timer Offset Configuration Register 2" hexmask.long.word 0x08 0.--15. 1. " TOV[79:64] ,Timer offset value bits 79:64" endif group.long 0x3AC++0x07 line.long 0x00 "GIC,gPTP Interrupt Control Register" bitfld.long 0x00 2. " PTME ,Presentation time match interrupt enable" "Disabled,Enabled" line.long 0x04 "GIS,gPTP Interrupt Status Register" bitfld.long 0x04 2. " PTME ,Presentation time match interrupt flag" "No interrupt,Interrupt" if (((per.l(ad:0xE6800000+0x390)&0x3))==0x3) hgroup.long 0x3B8++0x0B hide.long 0x00 "GCT_0,gPTP Timer Capture Register 0" hide.long 0x04 "GCT_1,gPTP Timer Capture Register 1" hide.long 0x08 "GCT_2,gPTP Timer Capture Register 2" else group.long 0x3B8++0x0B line.long 0x00 "GCT_0,gPTP Timer Capture Register 0" hexmask.long 0x00 0.--31. 1. " CTV[31:0] ,gPTP timer capture value bits 31:0" line.long 0x04 "GCT_1,gPTP Timer Capture Register 1" hexmask.long 0x04 0.--31. 1. " CTV[63:32] ,gPTP timer capture value bits 63:32" line.long 0x08 "GCT_2,gPTP Timer Capture Register 2" hexmask.long.word 0x08 0.--15. 1. " CTV[79:64] ,gPTP timer capture value bits 79:64" endif tree.end tree "E-MAC Configuration" width 8. if (((per.l(ad:0xE6800000+0x500)&0x6))==0x0) group.long 0x500++0x03 line.long 0x00 "ECMR,E-MAC Mode Register" bitfld.long 0x00 26. " TRCCM ,Counter clear mode" "Writing clears,Reading clears" bitfld.long 0x00 23. " RCSC ,Checksum automatic calculation" "Disabled,Enabled" bitfld.long 0x00 21. " DPAD ,Enable padding insert in data for transmission when fewer than 60 bytes are to be transmitted" "Inserted,Not inserted" bitfld.long 0x00 20. " RZPF ,PAUSE frame reception with time = 0 enable" "Disabled,Enabled" textline " " bitfld.long 0x00 18. " PFR ,PAUSE frame receive mode. Transfers frame to the AVB-DMAC" "Not transferred,Transferred" bitfld.long 0x00 17. " RXF ,Operating mode for flow control in reception" "PAUSE frame det. disabled,Flow ctr. for RX port enabled" bitfld.long 0x00 9. " MPDE ,Magic packet detection enable" "Disabled,Enabled" bitfld.long 0x00 6. " RE ,Reception enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TE ,Transmission enable" "Disabled,Enabled" bitfld.long 0x00 1. " DM ,Duplex mode" ",Full-duplex" bitfld.long 0x00 0. " PRM ,Promiscuous mode" "Normal operation,Promiscuous mode" else group.long 0x500++0x03 line.long 0x00 "ECMR,E-MAC Mode Register" rbitfld.long 0x00 26. " TRCCM ,Counter clear mode" "Writing clears,Reading clears" rbitfld.long 0x00 23. " RCSC ,Checksum automatic calculation" "Disabled,Enabled" rbitfld.long 0x00 21. " DPAD ,Enable padding insert in data for transmission when fewer than 60 bytes are to be transmitted" "Inserted,Not inserted" rbitfld.long 0x00 20. " RZPF ,PAUSE frame reception with time = 0 enable" "Disabled,Enabled" textline " " rbitfld.long 0x00 18. " PFR ,PAUSE frame receive mode. Transfers frame to the AVB-DMAC" "Not transferred,Transferred" rbitfld.long 0x00 17. " RXF ,Operating mode for flow control in reception" "PAUSE frame det. disabled,Flow ctr. for RX port enabled" rbitfld.long 0x00 9. " MPDE ,Magic packet detection enable" "Disabled,Enabled" bitfld.long 0x00 6. " RE ,Reception enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " TE ,Transmission enable" "Disabled,Enabled" rbitfld.long 0x00 1. " DM ,Duplex mode" ",Full-duplex" rbitfld.long 0x00 0. " PRM ,Promiscuous mode" "Normal operation,Promiscuous mode" endif group.long 0x508++0x03 line.long 0x00 "RFLR,Receive Frame Length Register" hexmask.long.tbyte 0x00 0.--17. 1. " RFL[17:0] ,Receive frame length" group.long 0x510++0x03 line.long 0x00 "ECSR,E-MAC Status Register" bitfld.long 0x00 3. " PHYI ,PHY interrupt terminal state bit" "Not asserted,Asserted" bitfld.long 0x00 2. " LCHNG ,Link signal change bit" "Not detected,Detected" eventfld.long 0x00 1. " MPD ,Magic packet detection" "Not detected,Detected" eventfld.long 0x00 0. " ICD ,Illegal carrier detection" "Not detected,Detected" group.long 0x518++0x03 line.long 0x00 "ECSIPR,E-MAC Interrupt Permission Register" bitfld.long 0x00 1. " MPDIP ,Magic packet detect interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " ICDIP ,Illegal carrier detect interrupt enable" "Disabled,Enabled" group.long 0x520++0x03 line.long 0x00 "PIR,PHY Interface Register" bitfld.long 0x00 3. " MDI ,MII Management data-in" "Low,High" bitfld.long 0x00 2. " MDO ,MII Management data-out" "Low,High" bitfld.long 0x00 1. " MMD ,MII Management mode" "Read,Write" bitfld.long 0x00 0. " MDC ,MII Management data clock" "Low,High" rgroup.long 0x528++0x03 line.long 0x00 "PSR,PHY Status Register" bitfld.long 0x00 0. " LMON ,Link status pin state" "Low,High" group.long 0x52C++0x03 line.long 0x00 "PIPR,PHY_INT Polarity Register" bitfld.long 0x00 0. " PHYIP ,PHY interrupt input pin polarity" "Active low,Active high" group.long 0x558++0x03 line.long 0x00 "MPR,Manual PAUSE Frame Register" hexmask.long.word 0x00 0.--15. 1. " MP[15:0] ,These bits set the TIME parameter value of a manual PAUSE frame" rgroup.long 0x55C++0x07 line.long 0x00 "PFTCR,PAUSE Frame Transmit Counter" hexmask.long.word 0x00 0.--15. 1. " PFTXC[15:0] ,Counter for counting the number of transmitted PAUSE frames" line.long 0x04 "PFRCR,PAUSE Frame Receive Counter" hexmask.long.word 0x04 0.--15. 1. " PFRXC[15:0] ,Counter for counting the number of received PAUSE frames" if (((per.l(ad:0xE6800000+0x500)&0x6))==0x0) group.long 0x5B0++0x03 line.long 0x00 "GECMR,E-MAC Mode Register 2" bitfld.long 0x00 0. " SPEED ,Transfer Speed Setting" "100Mbps,1000Mbps" group.long 0x5C0++0x03 line.long 0x00 "MAHR,E-MAC Address High Register" hexmask.long 0x00 0.--31. 1. " MA[47:16] ,E-MAC Address Bits 47 to 16" group.long 0x5C8++0x03 line.long 0x00 "MALR,E-MAC Address Low Register" hexmask.long.word 0x00 0.--15. 1. " MA[15:0] ,E-MAC Address Bits 15 to 0" else rgroup.long 0x5B0++0x03 line.long 0x00 "GECMR,E-MAC Mode Register 2" bitfld.long 0x00 0. " SPEED ,Transfer Speed Setting" "100Mbps,1000Mbps" rgroup.long 0x5C0++0x03 line.long 0x00 "MAHR,E-MAC Address High Register" hexmask.long 0x00 0.--31. 1. " MA[47:16] ,E-MAC Address Bits 47 to 16" rgroup.long 0x5C8++0x03 line.long 0x00 "MALR,E-MAC Address Low Register" hexmask.long.word 0x00 0.--15. 1. " MA[15:0] ,E-MAC Address Bits 15 to 0" endif group.long 0x740++0x03 line.long 0x00 "CEFCR,CRC Error Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " CEFC[15:0] ,These bits indicate the number of CRC error frames received" group.long 0x748++0x03 line.long 0x00 "FRECR,Frame Receive Error Counter Register" hexmask.long.word 0x00 0.--15. 1. " FREC[15:0] ,These bits indicate the number of errors during frame reception" group.long 0x750++0x03 line.long 0x00 "TSFRCR,Too-Short Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " TSFRC[15:0] ,These bits indicate the number of frames received with a length of less than 64 bytes" group.long 0x758++0x03 line.long 0x00 "TLFRCR,Too-Long Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " TLFC[15:0] ,These bits indicate the number of frames received with a length exceeding the value in RFLR" group.long 0x760++0x03 line.long 0x00 "RFCR,Residual-Bit Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " RFC[15:0] ,These bits indicate the number of received frames containing residual bits" group.long 0x778++0x03 line.long 0x00 "MAFCR,Multicast Address Frame Receive Counter Register" hexmask.long.word 0x00 0.--15. 1. " MAFC[15:0] ,These bits indicate the number of multicast frames that have been received" tree.end width 0xB tree.end tree.open "CAN (Controller Area Network)" tree "Channel 0" base ad:0xE6E80000 width 8. group.word 0x840++0x01 line.word 0x00 "C0CTLR,CAN0 Control Register" bitfld.word 0x00 13. " RBOC ,Forcible Return From Bus-OFF" "No effect,Force return" bitfld.word 0x00 11.--12. " BOM ,Bus-Off Recovery Mode" "Normal,Halt at Bus-off entry,Halt at Bus-off end,Halt by Program request" textline " " bitfld.word 0x00 10. " SLPM ,CAN Sleep Mode" "Disabled,Enabled" bitfld.word 0x00 8.--9. " CANM ,CAN Operating Mode Select" "Operation,Reset,Halt,Force reset" bitfld.word 0x00 6.--7. " TSPS ,Time Stamp Prescaler Select" "1,2,4,8" textline " " bitfld.word 0x00 5. " TSRC ,Time Stamp Counter Reset Command" "No effect,Reset" bitfld.word 0x00 4. " TPM ,Transmission Priority Mode Select" "ID,Mailbox" bitfld.word 0x00 3. " MLM ,Message Lost Mode Select" "Overwrite,Overrun" textline " " bitfld.word 0x00 1.--2. " IDFM ,ID Format Mode Select" "Standard,Extended,Mixed,?..." bitfld.word 0x00 0. " MBM ,CAN Mailbox Mode Select" "Normal,FIFO" group.byte 0x847++0x00 line.byte 0x00 "C0CLKR,CAN0 Clock Select Register" bitfld.byte 0x00 0.--1. " CCLKS ,CAN Clock Source Select" "Peripheral 1,Peripheral 2,,External" group.long 0x844++0x03 line.long 0x00 "C0BCR,CAN0 Bit Configuration Register" bitfld.long 0x00 28.--31. " TSEG1 ,Time Segment 1 Control Bits" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq" hexmask.long.word 0x00 16.--25. 1. " BRP ,Prescaler Division Ratio" textline " " bitfld.long 0x00 12.--13. " SJW ,Resynchronization Jump Width Control" "1 Tq,2 Tq,3 Tq,4 Tq" bitfld.long 0x00 8.--10. " TSEG2 ,Time Segment 2 Control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq" textline " " if (((per.w(ad:0xE6E80000+0x840))&0x6)==0x0) group.long 0x430++0x07 line.long 0x0 "C0MKR0,CAN0 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" line.long 0x4 "C0MKR1,CAN0 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C0MKR2,CAN0 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C0MKR3,CAN0 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C0MKR4,CAN0 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C0MKR5,CAN0 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C0MKR6,CAN0 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C0MKR7,CAN0 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C0MKR8,CAN0 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C0MKR9,CAN0 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" elif ((((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)) group.long 0x430++0x07 line.long 0x0 "C0MKR0,CAN0 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" line.long 0x4 "C0MKR1,CAN0 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C0MKR2,CAN0 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C0MKR3,CAN0 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C0MKR4,CAN0 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x8 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x8 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x8 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x8 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x8 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x8 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x8 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x8 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x8 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x8 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x8 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x8 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x8 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x8 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x8 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x8 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x8 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x8 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C0MKR5,CAN0 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0xC 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0xC 16. ",Extended ID Bit 16" "0,1" bitfld.long 0xC 15. ",Extended ID Bit 15" "0,1" bitfld.long 0xC 14. ",Extended ID Bit 14" "0,1" bitfld.long 0xC 13. ",Extended ID Bit 13" "0,1" bitfld.long 0xC 12. ",Extended ID Bit 12" "0,1" bitfld.long 0xC 11. ",Extended ID Bit 11" "0,1" bitfld.long 0xC 10. ",Extended ID Bit 10" "0,1" bitfld.long 0xC 9. ",Extended ID Bit 9" "0,1" bitfld.long 0xC 8. ",Extended ID Bit 8" "0,1" bitfld.long 0xC 7. ",Extended ID Bit 7" "0,1" bitfld.long 0xC 6. ",Extended ID Bit 6" "0,1" bitfld.long 0xC 5. ",Extended ID Bit 5" "0,1" bitfld.long 0xC 4. ",Extended ID Bit 4" "0,1" bitfld.long 0xC 3. ",Extended ID Bit 3" "0,1" bitfld.long 0xC 2. ",Extended ID Bit 2" "0,1" bitfld.long 0xC 1. ",Extended ID Bit 1" "0,1" bitfld.long 0xC 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C0MKR6,CAN0 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x10 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x10 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x10 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x10 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x10 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x10 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x10 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x10 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x10 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x10 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x10 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x10 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x10 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x10 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x10 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x10 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x10 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x10 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C0MKR7,CAN0 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x14 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x14 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x14 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x14 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x14 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x14 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x14 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x14 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x14 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x14 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x14 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x14 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x14 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x14 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x14 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x14 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x14 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x14 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C0MKR8,CAN0 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x18 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x18 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x18 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x18 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x18 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x18 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x18 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x18 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x18 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x18 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x18 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x18 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x18 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x18 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x18 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x18 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x18 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x18 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C0MKR9,CAN0 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x1C 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x1C 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x1C 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x1C 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x1C 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x1C 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x1C 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x1C 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x1C 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x1C 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x1C 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x1C 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x1C 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x1C 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x1C 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x1C 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x1C 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x1C 0. ",Extended ID Bit 0" "0,1" else hgroup.long 0x430++0x07 hide.long 0x0 "C0MKR0,CAN0 Mask Register 0" hide.long 0x4 "C0MKR1,CAN0 Mask Register 1" hgroup.long 0x400++0x1f hide.long 0x0 "C0MKR2,CAN0 Mask Register 2" hgroup.long 0x400++0x1f hide.long 0x4 "C0MKR3,CAN0 Mask Register 3" hgroup.long 0x400++0x1f hide.long 0x8 "C0MKR4,CAN0 Mask Register 4" hgroup.long 0x400++0x1f hide.long 0xC "C0MKR5,CAN0 Mask Register 5" hgroup.long 0x400++0x1f hide.long 0x10 "C0MKR6,CAN0 Mask Register 6" hgroup.long 0x400++0x1f hide.long 0x14 "C0MKR7,CAN0 Mask Register 7" hgroup.long 0x400++0x1f hide.long 0x18 "C0MKR8,CAN0 Mask Register 8" hgroup.long 0x400++0x1f hide.long 0x1C "C0MKR9,CAN0 Mask Register 9" endif textline " " width 12. if ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x420))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2))) group.long 0x420++0x03 line.long 0x0 "C0FIDCR0,CAN0 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x420))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0))) group.long 0x420++0x03 line.long 0x0 "C0FIDCR0,CAN0 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x420++0x03 hide.long 0x0 "C0FIDCR0,CAN0 FIFO Received ID Compare Register 0" endif if ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x424))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2))) group.long 0x424++0x03 line.long 0x0 "C0FIDCR1,CAN0 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x424))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0))) group.long 0x424++0x03 line.long 0x0 "C0FIDCR1,CAN0 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x424++0x03 hide.long 0x0 "C0FIDCR1,CAN0 FIFO Received ID Compare Register 1" endif group.long 0x428++0x03 line.long 0x0 "C0MKIVLR1,CAN0 Mask Invalid Register 1" bitfld.long 0x00 31. " MBMV_63 ,Mask valid for mailbox 63" "Valid,Invalid" bitfld.long 0x00 30. " MBMV_62 ,Mask valid for mailbox 62" "Valid,Invalid" bitfld.long 0x00 29. " MBMV_61 ,Mask valid for mailbox 61" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV_60 ,Mask valid for mailbox 60" "Valid,Invalid" bitfld.long 0x00 27. " MBMV_59 ,Mask valid for mailbox 59" "Valid,Invalid" bitfld.long 0x00 26. " MBMV_58 ,Mask valid for mailbox 58" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV_57 ,Mask valid for mailbox 57" "Valid,Invalid" bitfld.long 0x00 24. " MBMV_56 ,Mask valid for mailbox 56" "Valid,Invalid" bitfld.long 0x00 23. " MBMV_55 ,Mask valid for mailbox 55" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV_54 ,Mask valid for mailbox 54" "Valid,Invalid" bitfld.long 0x00 21. " MBMV_53 ,Mask valid for mailbox 53" "Valid,Invalid" bitfld.long 0x00 20. " MBMV_52 ,Mask valid for mailbox 52" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV_51 ,Mask valid for mailbox 51" "Valid,Invalid" bitfld.long 0x00 18. " MBMV_50 ,Mask valid for mailbox 50" "Valid,Invalid" bitfld.long 0x00 17. " MBMV_49 ,Mask valid for mailbox 49" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV_48 ,Mask valid for mailbox 48" "Valid,Invalid" bitfld.long 0x00 15. " MBMV_47 ,Mask valid for mailbox 47" "Valid,Invalid" bitfld.long 0x00 14. " MBMV_46 ,Mask valid for mailbox 46" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV_45 ,Mask valid for mailbox 45" "Valid,Invalid" bitfld.long 0x00 12. " MBMV_44 ,Mask valid for mailbox 44" "Valid,Invalid" bitfld.long 0x00 11. " MBMV_43 ,Mask valid for mailbox 43" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV_42 ,Mask valid for mailbox 42" "Valid,Invalid" bitfld.long 0x00 9. " MBMV_41 ,Mask valid for mailbox 41" "Valid,Invalid" bitfld.long 0x00 8. " MBMV_40 ,Mask valid for mailbox 40" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV_39 ,Mask valid for mailbox 39" "Valid,Invalid" bitfld.long 0x00 6. " MBMV_38 ,Mask valid for mailbox 38" "Valid,Invalid" bitfld.long 0x00 5. " MBMV_37 ,Mask valid for mailbox 37" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV_36 ,Mask valid for mailbox 36" "Valid,Invalid" bitfld.long 0x00 3. " MBMV_35 ,Mask valid for mailbox 35" "Valid,Invalid" bitfld.long 0x00 2. " MBMV_34 ,Mask valid for mailbox 34" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV_33 ,Mask valid for mailbox 33" "Valid,Invalid" bitfld.long 0x00 0. " MBMV_32 ,Mask valid for mailbox 32" "Valid,Invalid" group.long 0x438++0x03 line.long 0x0 "C0MKIVLR0,CAN0 Mask Invalid Register 0" bitfld.long 0x00 31. " MBMV_31 ,Mask valid for mailbox 31" "Valid,Invalid" bitfld.long 0x00 30. " MBMV_30 ,Mask valid for mailbox 30" "Valid,Invalid" bitfld.long 0x00 29. " MBMV_29 ,Mask valid for mailbox 29" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV_28 ,Mask valid for mailbox 28" "Valid,Invalid" bitfld.long 0x00 27. " MBMV_27 ,Mask valid for mailbox 27" "Valid,Invalid" bitfld.long 0x00 26. " MBMV_26 ,Mask valid for mailbox 26" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV_25 ,Mask valid for mailbox 25" "Valid,Invalid" bitfld.long 0x00 24. " MBMV_24 ,Mask valid for mailbox 24" "Valid,Invalid" bitfld.long 0x00 23. " MBMV_23 ,Mask valid for mailbox 23" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV_22 ,Mask valid for mailbox 22" "Valid,Invalid" bitfld.long 0x00 21. " MBMV_21 ,Mask valid for mailbox 21" "Valid,Invalid" bitfld.long 0x00 20. " MBMV_20 ,Mask valid for mailbox 20" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV_19 ,Mask valid for mailbox 19" "Valid,Invalid" bitfld.long 0x00 18. " MBMV_18 ,Mask valid for mailbox 18" "Valid,Invalid" bitfld.long 0x00 17. " MBMV_17 ,Mask valid for mailbox 17" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV_16 ,Mask valid for mailbox 16" "Valid,Invalid" bitfld.long 0x00 15. " MBMV_15 ,Mask valid for mailbox 15" "Valid,Invalid" bitfld.long 0x00 14. " MBMV_14 ,Mask valid for mailbox 14" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV_13 ,Mask valid for mailbox 13" "Valid,Invalid" bitfld.long 0x00 12. " MBMV_12 ,Mask valid for mailbox 12" "Valid,Invalid" bitfld.long 0x00 11. " MBMV_11 ,Mask valid for mailbox 11" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV_10 ,Mask valid for mailbox 10" "Valid,Invalid" bitfld.long 0x00 9. " MBMV_9 ,Mask valid for mailbox 9" "Valid,Invalid" bitfld.long 0x00 8. " MBMV_8 ,Mask valid for mailbox 8" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV_7 ,Mask valid for mailbox 7" "Valid,Invalid" bitfld.long 0x00 6. " MBMV_6 ,Mask valid for mailbox 6" "Valid,Invalid" bitfld.long 0x00 5. " MBMV_5 ,Mask valid for mailbox 5" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV_4 ,Mask valid for mailbox 4" "Valid,Invalid" bitfld.long 0x00 3. " MBMV_3 ,Mask valid for mailbox 3" "Valid,Invalid" bitfld.long 0x00 2. " MBMV_2 ,Mask valid for mailbox 2" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV_1 ,Mask valid for mailbox 1" "Valid,Invalid" bitfld.long 0x00 0. " MBMV_0 ,Mask valid for mailbox 0" "Valid,Invalid" tree.open "CAN Mailbox Registers" tree "Mailbox 63-0" tree "Mailbox 63" if (((63.==60.)||(63.==61.)||(63.==62.)||(63.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x0++0x03 hide.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x0++0x03 line.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x0++0x03 line.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x0++0x03 hide.long 0x00 "C0MB63_ID,CAN0 Mailbox 63 Register" endif group.word (0x0+0x04)++0x1 line.word 0x00 "C0MB63_DLC,CAN0 Mailbox 63 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x0+0x06)++0x07 line.byte 0x00 "C0MB63_D0,CAN0 Mailbox 63 Data byte 0 Register" line.byte 0x01 "C0MB63_D1,CAN0 Mailbox 63 Data byte 1 Register" line.byte 0x02 "C0MB63_D2,CAN0 Mailbox 63 Data byte 2 Register" line.byte 0x03 "C0MB63_D3,CAN0 Mailbox 63 Data byte 3 Register" line.byte 0x04 "C0MB63_D4,CAN0 Mailbox 63 Data byte 4 Register" line.byte 0x05 "C0MB63_D5,CAN0 Mailbox 63 Data byte 5 Register" line.byte 0x06 "C0MB63_D6,CAN0 Mailbox 63 Data byte 6 Register" line.byte 0x07 "C0MB63_D7,CAN0 Mailbox 63 Data byte 7 Register" group.word (0x0+0x0e)++0x01 line.word 0x00 "C0MB63_TS,CAN0 Mailbox 63 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 62" if (((62.==60.)||(62.==61.)||(62.==62.)||(62.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x10++0x03 hide.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x10))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x10++0x03 line.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x10))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x10++0x03 line.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x10++0x03 hide.long 0x00 "C0MB62_ID,CAN0 Mailbox 62 Register" endif group.word (0x10+0x04)++0x1 line.word 0x00 "C0MB62_DLC,CAN0 Mailbox 62 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x10+0x06)++0x07 line.byte 0x00 "C0MB62_D0,CAN0 Mailbox 62 Data byte 0 Register" line.byte 0x01 "C0MB62_D1,CAN0 Mailbox 62 Data byte 1 Register" line.byte 0x02 "C0MB62_D2,CAN0 Mailbox 62 Data byte 2 Register" line.byte 0x03 "C0MB62_D3,CAN0 Mailbox 62 Data byte 3 Register" line.byte 0x04 "C0MB62_D4,CAN0 Mailbox 62 Data byte 4 Register" line.byte 0x05 "C0MB62_D5,CAN0 Mailbox 62 Data byte 5 Register" line.byte 0x06 "C0MB62_D6,CAN0 Mailbox 62 Data byte 6 Register" line.byte 0x07 "C0MB62_D7,CAN0 Mailbox 62 Data byte 7 Register" group.word (0x10+0x0e)++0x01 line.word 0x00 "C0MB62_TS,CAN0 Mailbox 62 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 61" if (((61.==60.)||(61.==61.)||(61.==62.)||(61.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x20++0x03 hide.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x20))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x20++0x03 line.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x20))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x20++0x03 line.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x20++0x03 hide.long 0x00 "C0MB61_ID,CAN0 Mailbox 61 Register" endif group.word (0x20+0x04)++0x1 line.word 0x00 "C0MB61_DLC,CAN0 Mailbox 61 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x20+0x06)++0x07 line.byte 0x00 "C0MB61_D0,CAN0 Mailbox 61 Data byte 0 Register" line.byte 0x01 "C0MB61_D1,CAN0 Mailbox 61 Data byte 1 Register" line.byte 0x02 "C0MB61_D2,CAN0 Mailbox 61 Data byte 2 Register" line.byte 0x03 "C0MB61_D3,CAN0 Mailbox 61 Data byte 3 Register" line.byte 0x04 "C0MB61_D4,CAN0 Mailbox 61 Data byte 4 Register" line.byte 0x05 "C0MB61_D5,CAN0 Mailbox 61 Data byte 5 Register" line.byte 0x06 "C0MB61_D6,CAN0 Mailbox 61 Data byte 6 Register" line.byte 0x07 "C0MB61_D7,CAN0 Mailbox 61 Data byte 7 Register" group.word (0x20+0x0e)++0x01 line.word 0x00 "C0MB61_TS,CAN0 Mailbox 61 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 60" if (((60.==60.)||(60.==61.)||(60.==62.)||(60.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x30++0x03 hide.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x30))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x30++0x03 line.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x30))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x30++0x03 line.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x30++0x03 hide.long 0x00 "C0MB60_ID,CAN0 Mailbox 60 Register" endif group.word (0x30+0x04)++0x1 line.word 0x00 "C0MB60_DLC,CAN0 Mailbox 60 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x30+0x06)++0x07 line.byte 0x00 "C0MB60_D0,CAN0 Mailbox 60 Data byte 0 Register" line.byte 0x01 "C0MB60_D1,CAN0 Mailbox 60 Data byte 1 Register" line.byte 0x02 "C0MB60_D2,CAN0 Mailbox 60 Data byte 2 Register" line.byte 0x03 "C0MB60_D3,CAN0 Mailbox 60 Data byte 3 Register" line.byte 0x04 "C0MB60_D4,CAN0 Mailbox 60 Data byte 4 Register" line.byte 0x05 "C0MB60_D5,CAN0 Mailbox 60 Data byte 5 Register" line.byte 0x06 "C0MB60_D6,CAN0 Mailbox 60 Data byte 6 Register" line.byte 0x07 "C0MB60_D7,CAN0 Mailbox 60 Data byte 7 Register" group.word (0x30+0x0e)++0x01 line.word 0x00 "C0MB60_TS,CAN0 Mailbox 60 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 59" if (((59.==60.)||(59.==61.)||(59.==62.)||(59.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x40++0x03 hide.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x40))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x40++0x03 line.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x40))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x40++0x03 line.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x40++0x03 hide.long 0x00 "C0MB59_ID,CAN0 Mailbox 59 Register" endif group.word (0x40+0x04)++0x1 line.word 0x00 "C0MB59_DLC,CAN0 Mailbox 59 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x40+0x06)++0x07 line.byte 0x00 "C0MB59_D0,CAN0 Mailbox 59 Data byte 0 Register" line.byte 0x01 "C0MB59_D1,CAN0 Mailbox 59 Data byte 1 Register" line.byte 0x02 "C0MB59_D2,CAN0 Mailbox 59 Data byte 2 Register" line.byte 0x03 "C0MB59_D3,CAN0 Mailbox 59 Data byte 3 Register" line.byte 0x04 "C0MB59_D4,CAN0 Mailbox 59 Data byte 4 Register" line.byte 0x05 "C0MB59_D5,CAN0 Mailbox 59 Data byte 5 Register" line.byte 0x06 "C0MB59_D6,CAN0 Mailbox 59 Data byte 6 Register" line.byte 0x07 "C0MB59_D7,CAN0 Mailbox 59 Data byte 7 Register" group.word (0x40+0x0e)++0x01 line.word 0x00 "C0MB59_TS,CAN0 Mailbox 59 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 58" if (((58.==60.)||(58.==61.)||(58.==62.)||(58.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x50++0x03 hide.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x50))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x50++0x03 line.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x50))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x50++0x03 line.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x50++0x03 hide.long 0x00 "C0MB58_ID,CAN0 Mailbox 58 Register" endif group.word (0x50+0x04)++0x1 line.word 0x00 "C0MB58_DLC,CAN0 Mailbox 58 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x50+0x06)++0x07 line.byte 0x00 "C0MB58_D0,CAN0 Mailbox 58 Data byte 0 Register" line.byte 0x01 "C0MB58_D1,CAN0 Mailbox 58 Data byte 1 Register" line.byte 0x02 "C0MB58_D2,CAN0 Mailbox 58 Data byte 2 Register" line.byte 0x03 "C0MB58_D3,CAN0 Mailbox 58 Data byte 3 Register" line.byte 0x04 "C0MB58_D4,CAN0 Mailbox 58 Data byte 4 Register" line.byte 0x05 "C0MB58_D5,CAN0 Mailbox 58 Data byte 5 Register" line.byte 0x06 "C0MB58_D6,CAN0 Mailbox 58 Data byte 6 Register" line.byte 0x07 "C0MB58_D7,CAN0 Mailbox 58 Data byte 7 Register" group.word (0x50+0x0e)++0x01 line.word 0x00 "C0MB58_TS,CAN0 Mailbox 58 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 57" if (((57.==60.)||(57.==61.)||(57.==62.)||(57.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x60++0x03 hide.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x60))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x60++0x03 line.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x60))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x60++0x03 line.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x60++0x03 hide.long 0x00 "C0MB57_ID,CAN0 Mailbox 57 Register" endif group.word (0x60+0x04)++0x1 line.word 0x00 "C0MB57_DLC,CAN0 Mailbox 57 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x60+0x06)++0x07 line.byte 0x00 "C0MB57_D0,CAN0 Mailbox 57 Data byte 0 Register" line.byte 0x01 "C0MB57_D1,CAN0 Mailbox 57 Data byte 1 Register" line.byte 0x02 "C0MB57_D2,CAN0 Mailbox 57 Data byte 2 Register" line.byte 0x03 "C0MB57_D3,CAN0 Mailbox 57 Data byte 3 Register" line.byte 0x04 "C0MB57_D4,CAN0 Mailbox 57 Data byte 4 Register" line.byte 0x05 "C0MB57_D5,CAN0 Mailbox 57 Data byte 5 Register" line.byte 0x06 "C0MB57_D6,CAN0 Mailbox 57 Data byte 6 Register" line.byte 0x07 "C0MB57_D7,CAN0 Mailbox 57 Data byte 7 Register" group.word (0x60+0x0e)++0x01 line.word 0x00 "C0MB57_TS,CAN0 Mailbox 57 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 56" if (((56.==60.)||(56.==61.)||(56.==62.)||(56.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x70++0x03 hide.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x70))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x70++0x03 line.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x70))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x70++0x03 line.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x70++0x03 hide.long 0x00 "C0MB56_ID,CAN0 Mailbox 56 Register" endif group.word (0x70+0x04)++0x1 line.word 0x00 "C0MB56_DLC,CAN0 Mailbox 56 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x70+0x06)++0x07 line.byte 0x00 "C0MB56_D0,CAN0 Mailbox 56 Data byte 0 Register" line.byte 0x01 "C0MB56_D1,CAN0 Mailbox 56 Data byte 1 Register" line.byte 0x02 "C0MB56_D2,CAN0 Mailbox 56 Data byte 2 Register" line.byte 0x03 "C0MB56_D3,CAN0 Mailbox 56 Data byte 3 Register" line.byte 0x04 "C0MB56_D4,CAN0 Mailbox 56 Data byte 4 Register" line.byte 0x05 "C0MB56_D5,CAN0 Mailbox 56 Data byte 5 Register" line.byte 0x06 "C0MB56_D6,CAN0 Mailbox 56 Data byte 6 Register" line.byte 0x07 "C0MB56_D7,CAN0 Mailbox 56 Data byte 7 Register" group.word (0x70+0x0e)++0x01 line.word 0x00 "C0MB56_TS,CAN0 Mailbox 56 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 55" if (((55.==60.)||(55.==61.)||(55.==62.)||(55.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x80++0x03 hide.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x80))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x80++0x03 line.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x80))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x80++0x03 line.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x80++0x03 hide.long 0x00 "C0MB55_ID,CAN0 Mailbox 55 Register" endif group.word (0x80+0x04)++0x1 line.word 0x00 "C0MB55_DLC,CAN0 Mailbox 55 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x80+0x06)++0x07 line.byte 0x00 "C0MB55_D0,CAN0 Mailbox 55 Data byte 0 Register" line.byte 0x01 "C0MB55_D1,CAN0 Mailbox 55 Data byte 1 Register" line.byte 0x02 "C0MB55_D2,CAN0 Mailbox 55 Data byte 2 Register" line.byte 0x03 "C0MB55_D3,CAN0 Mailbox 55 Data byte 3 Register" line.byte 0x04 "C0MB55_D4,CAN0 Mailbox 55 Data byte 4 Register" line.byte 0x05 "C0MB55_D5,CAN0 Mailbox 55 Data byte 5 Register" line.byte 0x06 "C0MB55_D6,CAN0 Mailbox 55 Data byte 6 Register" line.byte 0x07 "C0MB55_D7,CAN0 Mailbox 55 Data byte 7 Register" group.word (0x80+0x0e)++0x01 line.word 0x00 "C0MB55_TS,CAN0 Mailbox 55 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 54" if (((54.==60.)||(54.==61.)||(54.==62.)||(54.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x90++0x03 hide.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x90))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x90++0x03 line.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x90))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x90++0x03 line.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x90++0x03 hide.long 0x00 "C0MB54_ID,CAN0 Mailbox 54 Register" endif group.word (0x90+0x04)++0x1 line.word 0x00 "C0MB54_DLC,CAN0 Mailbox 54 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x90+0x06)++0x07 line.byte 0x00 "C0MB54_D0,CAN0 Mailbox 54 Data byte 0 Register" line.byte 0x01 "C0MB54_D1,CAN0 Mailbox 54 Data byte 1 Register" line.byte 0x02 "C0MB54_D2,CAN0 Mailbox 54 Data byte 2 Register" line.byte 0x03 "C0MB54_D3,CAN0 Mailbox 54 Data byte 3 Register" line.byte 0x04 "C0MB54_D4,CAN0 Mailbox 54 Data byte 4 Register" line.byte 0x05 "C0MB54_D5,CAN0 Mailbox 54 Data byte 5 Register" line.byte 0x06 "C0MB54_D6,CAN0 Mailbox 54 Data byte 6 Register" line.byte 0x07 "C0MB54_D7,CAN0 Mailbox 54 Data byte 7 Register" group.word (0x90+0x0e)++0x01 line.word 0x00 "C0MB54_TS,CAN0 Mailbox 54 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 53" if (((53.==60.)||(53.==61.)||(53.==62.)||(53.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xA0++0x03 hide.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xA0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xA0++0x03 line.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xA0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xA0++0x03 line.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xA0++0x03 hide.long 0x00 "C0MB53_ID,CAN0 Mailbox 53 Register" endif group.word (0xA0+0x04)++0x1 line.word 0x00 "C0MB53_DLC,CAN0 Mailbox 53 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xA0+0x06)++0x07 line.byte 0x00 "C0MB53_D0,CAN0 Mailbox 53 Data byte 0 Register" line.byte 0x01 "C0MB53_D1,CAN0 Mailbox 53 Data byte 1 Register" line.byte 0x02 "C0MB53_D2,CAN0 Mailbox 53 Data byte 2 Register" line.byte 0x03 "C0MB53_D3,CAN0 Mailbox 53 Data byte 3 Register" line.byte 0x04 "C0MB53_D4,CAN0 Mailbox 53 Data byte 4 Register" line.byte 0x05 "C0MB53_D5,CAN0 Mailbox 53 Data byte 5 Register" line.byte 0x06 "C0MB53_D6,CAN0 Mailbox 53 Data byte 6 Register" line.byte 0x07 "C0MB53_D7,CAN0 Mailbox 53 Data byte 7 Register" group.word (0xA0+0x0e)++0x01 line.word 0x00 "C0MB53_TS,CAN0 Mailbox 53 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 52" if (((52.==60.)||(52.==61.)||(52.==62.)||(52.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xB0++0x03 hide.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xB0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xB0++0x03 line.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xB0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xB0++0x03 line.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xB0++0x03 hide.long 0x00 "C0MB52_ID,CAN0 Mailbox 52 Register" endif group.word (0xB0+0x04)++0x1 line.word 0x00 "C0MB52_DLC,CAN0 Mailbox 52 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xB0+0x06)++0x07 line.byte 0x00 "C0MB52_D0,CAN0 Mailbox 52 Data byte 0 Register" line.byte 0x01 "C0MB52_D1,CAN0 Mailbox 52 Data byte 1 Register" line.byte 0x02 "C0MB52_D2,CAN0 Mailbox 52 Data byte 2 Register" line.byte 0x03 "C0MB52_D3,CAN0 Mailbox 52 Data byte 3 Register" line.byte 0x04 "C0MB52_D4,CAN0 Mailbox 52 Data byte 4 Register" line.byte 0x05 "C0MB52_D5,CAN0 Mailbox 52 Data byte 5 Register" line.byte 0x06 "C0MB52_D6,CAN0 Mailbox 52 Data byte 6 Register" line.byte 0x07 "C0MB52_D7,CAN0 Mailbox 52 Data byte 7 Register" group.word (0xB0+0x0e)++0x01 line.word 0x00 "C0MB52_TS,CAN0 Mailbox 52 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 51" if (((51.==60.)||(51.==61.)||(51.==62.)||(51.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xC0++0x03 hide.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xC0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xC0++0x03 line.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xC0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xC0++0x03 line.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xC0++0x03 hide.long 0x00 "C0MB51_ID,CAN0 Mailbox 51 Register" endif group.word (0xC0+0x04)++0x1 line.word 0x00 "C0MB51_DLC,CAN0 Mailbox 51 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xC0+0x06)++0x07 line.byte 0x00 "C0MB51_D0,CAN0 Mailbox 51 Data byte 0 Register" line.byte 0x01 "C0MB51_D1,CAN0 Mailbox 51 Data byte 1 Register" line.byte 0x02 "C0MB51_D2,CAN0 Mailbox 51 Data byte 2 Register" line.byte 0x03 "C0MB51_D3,CAN0 Mailbox 51 Data byte 3 Register" line.byte 0x04 "C0MB51_D4,CAN0 Mailbox 51 Data byte 4 Register" line.byte 0x05 "C0MB51_D5,CAN0 Mailbox 51 Data byte 5 Register" line.byte 0x06 "C0MB51_D6,CAN0 Mailbox 51 Data byte 6 Register" line.byte 0x07 "C0MB51_D7,CAN0 Mailbox 51 Data byte 7 Register" group.word (0xC0+0x0e)++0x01 line.word 0x00 "C0MB51_TS,CAN0 Mailbox 51 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 50" if (((50.==60.)||(50.==61.)||(50.==62.)||(50.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xD0++0x03 hide.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xD0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xD0++0x03 line.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xD0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xD0++0x03 line.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xD0++0x03 hide.long 0x00 "C0MB50_ID,CAN0 Mailbox 50 Register" endif group.word (0xD0+0x04)++0x1 line.word 0x00 "C0MB50_DLC,CAN0 Mailbox 50 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xD0+0x06)++0x07 line.byte 0x00 "C0MB50_D0,CAN0 Mailbox 50 Data byte 0 Register" line.byte 0x01 "C0MB50_D1,CAN0 Mailbox 50 Data byte 1 Register" line.byte 0x02 "C0MB50_D2,CAN0 Mailbox 50 Data byte 2 Register" line.byte 0x03 "C0MB50_D3,CAN0 Mailbox 50 Data byte 3 Register" line.byte 0x04 "C0MB50_D4,CAN0 Mailbox 50 Data byte 4 Register" line.byte 0x05 "C0MB50_D5,CAN0 Mailbox 50 Data byte 5 Register" line.byte 0x06 "C0MB50_D6,CAN0 Mailbox 50 Data byte 6 Register" line.byte 0x07 "C0MB50_D7,CAN0 Mailbox 50 Data byte 7 Register" group.word (0xD0+0x0e)++0x01 line.word 0x00 "C0MB50_TS,CAN0 Mailbox 50 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 49" if (((49.==60.)||(49.==61.)||(49.==62.)||(49.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xE0++0x03 hide.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xE0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xE0++0x03 line.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xE0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xE0++0x03 line.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xE0++0x03 hide.long 0x00 "C0MB49_ID,CAN0 Mailbox 49 Register" endif group.word (0xE0+0x04)++0x1 line.word 0x00 "C0MB49_DLC,CAN0 Mailbox 49 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xE0+0x06)++0x07 line.byte 0x00 "C0MB49_D0,CAN0 Mailbox 49 Data byte 0 Register" line.byte 0x01 "C0MB49_D1,CAN0 Mailbox 49 Data byte 1 Register" line.byte 0x02 "C0MB49_D2,CAN0 Mailbox 49 Data byte 2 Register" line.byte 0x03 "C0MB49_D3,CAN0 Mailbox 49 Data byte 3 Register" line.byte 0x04 "C0MB49_D4,CAN0 Mailbox 49 Data byte 4 Register" line.byte 0x05 "C0MB49_D5,CAN0 Mailbox 49 Data byte 5 Register" line.byte 0x06 "C0MB49_D6,CAN0 Mailbox 49 Data byte 6 Register" line.byte 0x07 "C0MB49_D7,CAN0 Mailbox 49 Data byte 7 Register" group.word (0xE0+0x0e)++0x01 line.word 0x00 "C0MB49_TS,CAN0 Mailbox 49 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 48" if (((48.==60.)||(48.==61.)||(48.==62.)||(48.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0xF0++0x03 hide.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xF0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0xF0++0x03 line.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0xF0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0xF0++0x03 line.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xF0++0x03 hide.long 0x00 "C0MB48_ID,CAN0 Mailbox 48 Register" endif group.word (0xF0+0x04)++0x1 line.word 0x00 "C0MB48_DLC,CAN0 Mailbox 48 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xF0+0x06)++0x07 line.byte 0x00 "C0MB48_D0,CAN0 Mailbox 48 Data byte 0 Register" line.byte 0x01 "C0MB48_D1,CAN0 Mailbox 48 Data byte 1 Register" line.byte 0x02 "C0MB48_D2,CAN0 Mailbox 48 Data byte 2 Register" line.byte 0x03 "C0MB48_D3,CAN0 Mailbox 48 Data byte 3 Register" line.byte 0x04 "C0MB48_D4,CAN0 Mailbox 48 Data byte 4 Register" line.byte 0x05 "C0MB48_D5,CAN0 Mailbox 48 Data byte 5 Register" line.byte 0x06 "C0MB48_D6,CAN0 Mailbox 48 Data byte 6 Register" line.byte 0x07 "C0MB48_D7,CAN0 Mailbox 48 Data byte 7 Register" group.word (0xF0+0x0e)++0x01 line.word 0x00 "C0MB48_TS,CAN0 Mailbox 48 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 47" if (((47.==60.)||(47.==61.)||(47.==62.)||(47.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x100++0x03 hide.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x100))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x100++0x03 line.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x100))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x100++0x03 line.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x100++0x03 hide.long 0x00 "C0MB47_ID,CAN0 Mailbox 47 Register" endif group.word (0x100+0x04)++0x1 line.word 0x00 "C0MB47_DLC,CAN0 Mailbox 47 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x100+0x06)++0x07 line.byte 0x00 "C0MB47_D0,CAN0 Mailbox 47 Data byte 0 Register" line.byte 0x01 "C0MB47_D1,CAN0 Mailbox 47 Data byte 1 Register" line.byte 0x02 "C0MB47_D2,CAN0 Mailbox 47 Data byte 2 Register" line.byte 0x03 "C0MB47_D3,CAN0 Mailbox 47 Data byte 3 Register" line.byte 0x04 "C0MB47_D4,CAN0 Mailbox 47 Data byte 4 Register" line.byte 0x05 "C0MB47_D5,CAN0 Mailbox 47 Data byte 5 Register" line.byte 0x06 "C0MB47_D6,CAN0 Mailbox 47 Data byte 6 Register" line.byte 0x07 "C0MB47_D7,CAN0 Mailbox 47 Data byte 7 Register" group.word (0x100+0x0e)++0x01 line.word 0x00 "C0MB47_TS,CAN0 Mailbox 47 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 46" if (((46.==60.)||(46.==61.)||(46.==62.)||(46.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x110++0x03 hide.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x110))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x110++0x03 line.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x110))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x110++0x03 line.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x110++0x03 hide.long 0x00 "C0MB46_ID,CAN0 Mailbox 46 Register" endif group.word (0x110+0x04)++0x1 line.word 0x00 "C0MB46_DLC,CAN0 Mailbox 46 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x110+0x06)++0x07 line.byte 0x00 "C0MB46_D0,CAN0 Mailbox 46 Data byte 0 Register" line.byte 0x01 "C0MB46_D1,CAN0 Mailbox 46 Data byte 1 Register" line.byte 0x02 "C0MB46_D2,CAN0 Mailbox 46 Data byte 2 Register" line.byte 0x03 "C0MB46_D3,CAN0 Mailbox 46 Data byte 3 Register" line.byte 0x04 "C0MB46_D4,CAN0 Mailbox 46 Data byte 4 Register" line.byte 0x05 "C0MB46_D5,CAN0 Mailbox 46 Data byte 5 Register" line.byte 0x06 "C0MB46_D6,CAN0 Mailbox 46 Data byte 6 Register" line.byte 0x07 "C0MB46_D7,CAN0 Mailbox 46 Data byte 7 Register" group.word (0x110+0x0e)++0x01 line.word 0x00 "C0MB46_TS,CAN0 Mailbox 46 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 45" if (((45.==60.)||(45.==61.)||(45.==62.)||(45.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x120++0x03 hide.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x120))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x120++0x03 line.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x120))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x120++0x03 line.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x120++0x03 hide.long 0x00 "C0MB45_ID,CAN0 Mailbox 45 Register" endif group.word (0x120+0x04)++0x1 line.word 0x00 "C0MB45_DLC,CAN0 Mailbox 45 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x120+0x06)++0x07 line.byte 0x00 "C0MB45_D0,CAN0 Mailbox 45 Data byte 0 Register" line.byte 0x01 "C0MB45_D1,CAN0 Mailbox 45 Data byte 1 Register" line.byte 0x02 "C0MB45_D2,CAN0 Mailbox 45 Data byte 2 Register" line.byte 0x03 "C0MB45_D3,CAN0 Mailbox 45 Data byte 3 Register" line.byte 0x04 "C0MB45_D4,CAN0 Mailbox 45 Data byte 4 Register" line.byte 0x05 "C0MB45_D5,CAN0 Mailbox 45 Data byte 5 Register" line.byte 0x06 "C0MB45_D6,CAN0 Mailbox 45 Data byte 6 Register" line.byte 0x07 "C0MB45_D7,CAN0 Mailbox 45 Data byte 7 Register" group.word (0x120+0x0e)++0x01 line.word 0x00 "C0MB45_TS,CAN0 Mailbox 45 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 44" if (((44.==60.)||(44.==61.)||(44.==62.)||(44.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x130++0x03 hide.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x130))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x130++0x03 line.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x130))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x130++0x03 line.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x130++0x03 hide.long 0x00 "C0MB44_ID,CAN0 Mailbox 44 Register" endif group.word (0x130+0x04)++0x1 line.word 0x00 "C0MB44_DLC,CAN0 Mailbox 44 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x130+0x06)++0x07 line.byte 0x00 "C0MB44_D0,CAN0 Mailbox 44 Data byte 0 Register" line.byte 0x01 "C0MB44_D1,CAN0 Mailbox 44 Data byte 1 Register" line.byte 0x02 "C0MB44_D2,CAN0 Mailbox 44 Data byte 2 Register" line.byte 0x03 "C0MB44_D3,CAN0 Mailbox 44 Data byte 3 Register" line.byte 0x04 "C0MB44_D4,CAN0 Mailbox 44 Data byte 4 Register" line.byte 0x05 "C0MB44_D5,CAN0 Mailbox 44 Data byte 5 Register" line.byte 0x06 "C0MB44_D6,CAN0 Mailbox 44 Data byte 6 Register" line.byte 0x07 "C0MB44_D7,CAN0 Mailbox 44 Data byte 7 Register" group.word (0x130+0x0e)++0x01 line.word 0x00 "C0MB44_TS,CAN0 Mailbox 44 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 43" if (((43.==60.)||(43.==61.)||(43.==62.)||(43.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x140++0x03 hide.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x140))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x140++0x03 line.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x140))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x140++0x03 line.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x140++0x03 hide.long 0x00 "C0MB43_ID,CAN0 Mailbox 43 Register" endif group.word (0x140+0x04)++0x1 line.word 0x00 "C0MB43_DLC,CAN0 Mailbox 43 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x140+0x06)++0x07 line.byte 0x00 "C0MB43_D0,CAN0 Mailbox 43 Data byte 0 Register" line.byte 0x01 "C0MB43_D1,CAN0 Mailbox 43 Data byte 1 Register" line.byte 0x02 "C0MB43_D2,CAN0 Mailbox 43 Data byte 2 Register" line.byte 0x03 "C0MB43_D3,CAN0 Mailbox 43 Data byte 3 Register" line.byte 0x04 "C0MB43_D4,CAN0 Mailbox 43 Data byte 4 Register" line.byte 0x05 "C0MB43_D5,CAN0 Mailbox 43 Data byte 5 Register" line.byte 0x06 "C0MB43_D6,CAN0 Mailbox 43 Data byte 6 Register" line.byte 0x07 "C0MB43_D7,CAN0 Mailbox 43 Data byte 7 Register" group.word (0x140+0x0e)++0x01 line.word 0x00 "C0MB43_TS,CAN0 Mailbox 43 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 42" if (((42.==60.)||(42.==61.)||(42.==62.)||(42.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x150++0x03 hide.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x150))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x150++0x03 line.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x150))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x150++0x03 line.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x150++0x03 hide.long 0x00 "C0MB42_ID,CAN0 Mailbox 42 Register" endif group.word (0x150+0x04)++0x1 line.word 0x00 "C0MB42_DLC,CAN0 Mailbox 42 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x150+0x06)++0x07 line.byte 0x00 "C0MB42_D0,CAN0 Mailbox 42 Data byte 0 Register" line.byte 0x01 "C0MB42_D1,CAN0 Mailbox 42 Data byte 1 Register" line.byte 0x02 "C0MB42_D2,CAN0 Mailbox 42 Data byte 2 Register" line.byte 0x03 "C0MB42_D3,CAN0 Mailbox 42 Data byte 3 Register" line.byte 0x04 "C0MB42_D4,CAN0 Mailbox 42 Data byte 4 Register" line.byte 0x05 "C0MB42_D5,CAN0 Mailbox 42 Data byte 5 Register" line.byte 0x06 "C0MB42_D6,CAN0 Mailbox 42 Data byte 6 Register" line.byte 0x07 "C0MB42_D7,CAN0 Mailbox 42 Data byte 7 Register" group.word (0x150+0x0e)++0x01 line.word 0x00 "C0MB42_TS,CAN0 Mailbox 42 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 41" if (((41.==60.)||(41.==61.)||(41.==62.)||(41.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x160++0x03 hide.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x160))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x160++0x03 line.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x160))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x160++0x03 line.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x160++0x03 hide.long 0x00 "C0MB41_ID,CAN0 Mailbox 41 Register" endif group.word (0x160+0x04)++0x1 line.word 0x00 "C0MB41_DLC,CAN0 Mailbox 41 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x160+0x06)++0x07 line.byte 0x00 "C0MB41_D0,CAN0 Mailbox 41 Data byte 0 Register" line.byte 0x01 "C0MB41_D1,CAN0 Mailbox 41 Data byte 1 Register" line.byte 0x02 "C0MB41_D2,CAN0 Mailbox 41 Data byte 2 Register" line.byte 0x03 "C0MB41_D3,CAN0 Mailbox 41 Data byte 3 Register" line.byte 0x04 "C0MB41_D4,CAN0 Mailbox 41 Data byte 4 Register" line.byte 0x05 "C0MB41_D5,CAN0 Mailbox 41 Data byte 5 Register" line.byte 0x06 "C0MB41_D6,CAN0 Mailbox 41 Data byte 6 Register" line.byte 0x07 "C0MB41_D7,CAN0 Mailbox 41 Data byte 7 Register" group.word (0x160+0x0e)++0x01 line.word 0x00 "C0MB41_TS,CAN0 Mailbox 41 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 40" if (((40.==60.)||(40.==61.)||(40.==62.)||(40.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x170++0x03 hide.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x170))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x170++0x03 line.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x170))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x170++0x03 line.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x170++0x03 hide.long 0x00 "C0MB40_ID,CAN0 Mailbox 40 Register" endif group.word (0x170+0x04)++0x1 line.word 0x00 "C0MB40_DLC,CAN0 Mailbox 40 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x170+0x06)++0x07 line.byte 0x00 "C0MB40_D0,CAN0 Mailbox 40 Data byte 0 Register" line.byte 0x01 "C0MB40_D1,CAN0 Mailbox 40 Data byte 1 Register" line.byte 0x02 "C0MB40_D2,CAN0 Mailbox 40 Data byte 2 Register" line.byte 0x03 "C0MB40_D3,CAN0 Mailbox 40 Data byte 3 Register" line.byte 0x04 "C0MB40_D4,CAN0 Mailbox 40 Data byte 4 Register" line.byte 0x05 "C0MB40_D5,CAN0 Mailbox 40 Data byte 5 Register" line.byte 0x06 "C0MB40_D6,CAN0 Mailbox 40 Data byte 6 Register" line.byte 0x07 "C0MB40_D7,CAN0 Mailbox 40 Data byte 7 Register" group.word (0x170+0x0e)++0x01 line.word 0x00 "C0MB40_TS,CAN0 Mailbox 40 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 39" if (((39.==60.)||(39.==61.)||(39.==62.)||(39.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x180++0x03 hide.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x180))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x180++0x03 line.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x180))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x180++0x03 line.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x180++0x03 hide.long 0x00 "C0MB39_ID,CAN0 Mailbox 39 Register" endif group.word (0x180+0x04)++0x1 line.word 0x00 "C0MB39_DLC,CAN0 Mailbox 39 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x180+0x06)++0x07 line.byte 0x00 "C0MB39_D0,CAN0 Mailbox 39 Data byte 0 Register" line.byte 0x01 "C0MB39_D1,CAN0 Mailbox 39 Data byte 1 Register" line.byte 0x02 "C0MB39_D2,CAN0 Mailbox 39 Data byte 2 Register" line.byte 0x03 "C0MB39_D3,CAN0 Mailbox 39 Data byte 3 Register" line.byte 0x04 "C0MB39_D4,CAN0 Mailbox 39 Data byte 4 Register" line.byte 0x05 "C0MB39_D5,CAN0 Mailbox 39 Data byte 5 Register" line.byte 0x06 "C0MB39_D6,CAN0 Mailbox 39 Data byte 6 Register" line.byte 0x07 "C0MB39_D7,CAN0 Mailbox 39 Data byte 7 Register" group.word (0x180+0x0e)++0x01 line.word 0x00 "C0MB39_TS,CAN0 Mailbox 39 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 38" if (((38.==60.)||(38.==61.)||(38.==62.)||(38.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x190++0x03 hide.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x190))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x190++0x03 line.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x190))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x190++0x03 line.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x190++0x03 hide.long 0x00 "C0MB38_ID,CAN0 Mailbox 38 Register" endif group.word (0x190+0x04)++0x1 line.word 0x00 "C0MB38_DLC,CAN0 Mailbox 38 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x190+0x06)++0x07 line.byte 0x00 "C0MB38_D0,CAN0 Mailbox 38 Data byte 0 Register" line.byte 0x01 "C0MB38_D1,CAN0 Mailbox 38 Data byte 1 Register" line.byte 0x02 "C0MB38_D2,CAN0 Mailbox 38 Data byte 2 Register" line.byte 0x03 "C0MB38_D3,CAN0 Mailbox 38 Data byte 3 Register" line.byte 0x04 "C0MB38_D4,CAN0 Mailbox 38 Data byte 4 Register" line.byte 0x05 "C0MB38_D5,CAN0 Mailbox 38 Data byte 5 Register" line.byte 0x06 "C0MB38_D6,CAN0 Mailbox 38 Data byte 6 Register" line.byte 0x07 "C0MB38_D7,CAN0 Mailbox 38 Data byte 7 Register" group.word (0x190+0x0e)++0x01 line.word 0x00 "C0MB38_TS,CAN0 Mailbox 38 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 37" if (((37.==60.)||(37.==61.)||(37.==62.)||(37.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1A0++0x03 hide.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1A0++0x03 line.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1A0++0x03 line.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1A0++0x03 hide.long 0x00 "C0MB37_ID,CAN0 Mailbox 37 Register" endif group.word (0x1A0+0x04)++0x1 line.word 0x00 "C0MB37_DLC,CAN0 Mailbox 37 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1A0+0x06)++0x07 line.byte 0x00 "C0MB37_D0,CAN0 Mailbox 37 Data byte 0 Register" line.byte 0x01 "C0MB37_D1,CAN0 Mailbox 37 Data byte 1 Register" line.byte 0x02 "C0MB37_D2,CAN0 Mailbox 37 Data byte 2 Register" line.byte 0x03 "C0MB37_D3,CAN0 Mailbox 37 Data byte 3 Register" line.byte 0x04 "C0MB37_D4,CAN0 Mailbox 37 Data byte 4 Register" line.byte 0x05 "C0MB37_D5,CAN0 Mailbox 37 Data byte 5 Register" line.byte 0x06 "C0MB37_D6,CAN0 Mailbox 37 Data byte 6 Register" line.byte 0x07 "C0MB37_D7,CAN0 Mailbox 37 Data byte 7 Register" group.word (0x1A0+0x0e)++0x01 line.word 0x00 "C0MB37_TS,CAN0 Mailbox 37 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 36" if (((36.==60.)||(36.==61.)||(36.==62.)||(36.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1B0++0x03 hide.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1B0++0x03 line.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1B0++0x03 line.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1B0++0x03 hide.long 0x00 "C0MB36_ID,CAN0 Mailbox 36 Register" endif group.word (0x1B0+0x04)++0x1 line.word 0x00 "C0MB36_DLC,CAN0 Mailbox 36 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1B0+0x06)++0x07 line.byte 0x00 "C0MB36_D0,CAN0 Mailbox 36 Data byte 0 Register" line.byte 0x01 "C0MB36_D1,CAN0 Mailbox 36 Data byte 1 Register" line.byte 0x02 "C0MB36_D2,CAN0 Mailbox 36 Data byte 2 Register" line.byte 0x03 "C0MB36_D3,CAN0 Mailbox 36 Data byte 3 Register" line.byte 0x04 "C0MB36_D4,CAN0 Mailbox 36 Data byte 4 Register" line.byte 0x05 "C0MB36_D5,CAN0 Mailbox 36 Data byte 5 Register" line.byte 0x06 "C0MB36_D6,CAN0 Mailbox 36 Data byte 6 Register" line.byte 0x07 "C0MB36_D7,CAN0 Mailbox 36 Data byte 7 Register" group.word (0x1B0+0x0e)++0x01 line.word 0x00 "C0MB36_TS,CAN0 Mailbox 36 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 35" if (((35.==60.)||(35.==61.)||(35.==62.)||(35.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1C0++0x03 hide.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1C0++0x03 line.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1C0++0x03 line.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1C0++0x03 hide.long 0x00 "C0MB35_ID,CAN0 Mailbox 35 Register" endif group.word (0x1C0+0x04)++0x1 line.word 0x00 "C0MB35_DLC,CAN0 Mailbox 35 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1C0+0x06)++0x07 line.byte 0x00 "C0MB35_D0,CAN0 Mailbox 35 Data byte 0 Register" line.byte 0x01 "C0MB35_D1,CAN0 Mailbox 35 Data byte 1 Register" line.byte 0x02 "C0MB35_D2,CAN0 Mailbox 35 Data byte 2 Register" line.byte 0x03 "C0MB35_D3,CAN0 Mailbox 35 Data byte 3 Register" line.byte 0x04 "C0MB35_D4,CAN0 Mailbox 35 Data byte 4 Register" line.byte 0x05 "C0MB35_D5,CAN0 Mailbox 35 Data byte 5 Register" line.byte 0x06 "C0MB35_D6,CAN0 Mailbox 35 Data byte 6 Register" line.byte 0x07 "C0MB35_D7,CAN0 Mailbox 35 Data byte 7 Register" group.word (0x1C0+0x0e)++0x01 line.word 0x00 "C0MB35_TS,CAN0 Mailbox 35 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 34" if (((34.==60.)||(34.==61.)||(34.==62.)||(34.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1D0++0x03 hide.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1D0++0x03 line.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1D0++0x03 line.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1D0++0x03 hide.long 0x00 "C0MB34_ID,CAN0 Mailbox 34 Register" endif group.word (0x1D0+0x04)++0x1 line.word 0x00 "C0MB34_DLC,CAN0 Mailbox 34 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1D0+0x06)++0x07 line.byte 0x00 "C0MB34_D0,CAN0 Mailbox 34 Data byte 0 Register" line.byte 0x01 "C0MB34_D1,CAN0 Mailbox 34 Data byte 1 Register" line.byte 0x02 "C0MB34_D2,CAN0 Mailbox 34 Data byte 2 Register" line.byte 0x03 "C0MB34_D3,CAN0 Mailbox 34 Data byte 3 Register" line.byte 0x04 "C0MB34_D4,CAN0 Mailbox 34 Data byte 4 Register" line.byte 0x05 "C0MB34_D5,CAN0 Mailbox 34 Data byte 5 Register" line.byte 0x06 "C0MB34_D6,CAN0 Mailbox 34 Data byte 6 Register" line.byte 0x07 "C0MB34_D7,CAN0 Mailbox 34 Data byte 7 Register" group.word (0x1D0+0x0e)++0x01 line.word 0x00 "C0MB34_TS,CAN0 Mailbox 34 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 33" if (((33.==60.)||(33.==61.)||(33.==62.)||(33.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1E0++0x03 hide.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1E0++0x03 line.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1E0++0x03 line.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1E0++0x03 hide.long 0x00 "C0MB33_ID,CAN0 Mailbox 33 Register" endif group.word (0x1E0+0x04)++0x1 line.word 0x00 "C0MB33_DLC,CAN0 Mailbox 33 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1E0+0x06)++0x07 line.byte 0x00 "C0MB33_D0,CAN0 Mailbox 33 Data byte 0 Register" line.byte 0x01 "C0MB33_D1,CAN0 Mailbox 33 Data byte 1 Register" line.byte 0x02 "C0MB33_D2,CAN0 Mailbox 33 Data byte 2 Register" line.byte 0x03 "C0MB33_D3,CAN0 Mailbox 33 Data byte 3 Register" line.byte 0x04 "C0MB33_D4,CAN0 Mailbox 33 Data byte 4 Register" line.byte 0x05 "C0MB33_D5,CAN0 Mailbox 33 Data byte 5 Register" line.byte 0x06 "C0MB33_D6,CAN0 Mailbox 33 Data byte 6 Register" line.byte 0x07 "C0MB33_D7,CAN0 Mailbox 33 Data byte 7 Register" group.word (0x1E0+0x0e)++0x01 line.word 0x00 "C0MB33_TS,CAN0 Mailbox 33 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 32" if (((32.==60.)||(32.==61.)||(32.==62.)||(32.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x1F0++0x03 hide.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x1F0++0x03 line.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x1F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x1F0++0x03 line.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1F0++0x03 hide.long 0x00 "C0MB32_ID,CAN0 Mailbox 32 Register" endif group.word (0x1F0+0x04)++0x1 line.word 0x00 "C0MB32_DLC,CAN0 Mailbox 32 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1F0+0x06)++0x07 line.byte 0x00 "C0MB32_D0,CAN0 Mailbox 32 Data byte 0 Register" line.byte 0x01 "C0MB32_D1,CAN0 Mailbox 32 Data byte 1 Register" line.byte 0x02 "C0MB32_D2,CAN0 Mailbox 32 Data byte 2 Register" line.byte 0x03 "C0MB32_D3,CAN0 Mailbox 32 Data byte 3 Register" line.byte 0x04 "C0MB32_D4,CAN0 Mailbox 32 Data byte 4 Register" line.byte 0x05 "C0MB32_D5,CAN0 Mailbox 32 Data byte 5 Register" line.byte 0x06 "C0MB32_D6,CAN0 Mailbox 32 Data byte 6 Register" line.byte 0x07 "C0MB32_D7,CAN0 Mailbox 32 Data byte 7 Register" group.word (0x1F0+0x0e)++0x01 line.word 0x00 "C0MB32_TS,CAN0 Mailbox 32 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 31" if (((31.==60.)||(31.==61.)||(31.==62.)||(31.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x200++0x03 hide.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x200))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x200++0x03 line.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x200))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x200++0x03 line.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x200++0x03 hide.long 0x00 "C0MB31_ID,CAN0 Mailbox 31 Register" endif group.word (0x200+0x04)++0x1 line.word 0x00 "C0MB31_DLC,CAN0 Mailbox 31 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x200+0x06)++0x07 line.byte 0x00 "C0MB31_D0,CAN0 Mailbox 31 Data byte 0 Register" line.byte 0x01 "C0MB31_D1,CAN0 Mailbox 31 Data byte 1 Register" line.byte 0x02 "C0MB31_D2,CAN0 Mailbox 31 Data byte 2 Register" line.byte 0x03 "C0MB31_D3,CAN0 Mailbox 31 Data byte 3 Register" line.byte 0x04 "C0MB31_D4,CAN0 Mailbox 31 Data byte 4 Register" line.byte 0x05 "C0MB31_D5,CAN0 Mailbox 31 Data byte 5 Register" line.byte 0x06 "C0MB31_D6,CAN0 Mailbox 31 Data byte 6 Register" line.byte 0x07 "C0MB31_D7,CAN0 Mailbox 31 Data byte 7 Register" group.word (0x200+0x0e)++0x01 line.word 0x00 "C0MB31_TS,CAN0 Mailbox 31 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 30" if (((30.==60.)||(30.==61.)||(30.==62.)||(30.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x210++0x03 hide.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x210))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x210++0x03 line.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x210))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x210++0x03 line.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x210++0x03 hide.long 0x00 "C0MB30_ID,CAN0 Mailbox 30 Register" endif group.word (0x210+0x04)++0x1 line.word 0x00 "C0MB30_DLC,CAN0 Mailbox 30 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x210+0x06)++0x07 line.byte 0x00 "C0MB30_D0,CAN0 Mailbox 30 Data byte 0 Register" line.byte 0x01 "C0MB30_D1,CAN0 Mailbox 30 Data byte 1 Register" line.byte 0x02 "C0MB30_D2,CAN0 Mailbox 30 Data byte 2 Register" line.byte 0x03 "C0MB30_D3,CAN0 Mailbox 30 Data byte 3 Register" line.byte 0x04 "C0MB30_D4,CAN0 Mailbox 30 Data byte 4 Register" line.byte 0x05 "C0MB30_D5,CAN0 Mailbox 30 Data byte 5 Register" line.byte 0x06 "C0MB30_D6,CAN0 Mailbox 30 Data byte 6 Register" line.byte 0x07 "C0MB30_D7,CAN0 Mailbox 30 Data byte 7 Register" group.word (0x210+0x0e)++0x01 line.word 0x00 "C0MB30_TS,CAN0 Mailbox 30 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 29" if (((29.==60.)||(29.==61.)||(29.==62.)||(29.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x220++0x03 hide.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x220))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x220++0x03 line.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x220))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x220++0x03 line.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x220++0x03 hide.long 0x00 "C0MB29_ID,CAN0 Mailbox 29 Register" endif group.word (0x220+0x04)++0x1 line.word 0x00 "C0MB29_DLC,CAN0 Mailbox 29 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x220+0x06)++0x07 line.byte 0x00 "C0MB29_D0,CAN0 Mailbox 29 Data byte 0 Register" line.byte 0x01 "C0MB29_D1,CAN0 Mailbox 29 Data byte 1 Register" line.byte 0x02 "C0MB29_D2,CAN0 Mailbox 29 Data byte 2 Register" line.byte 0x03 "C0MB29_D3,CAN0 Mailbox 29 Data byte 3 Register" line.byte 0x04 "C0MB29_D4,CAN0 Mailbox 29 Data byte 4 Register" line.byte 0x05 "C0MB29_D5,CAN0 Mailbox 29 Data byte 5 Register" line.byte 0x06 "C0MB29_D6,CAN0 Mailbox 29 Data byte 6 Register" line.byte 0x07 "C0MB29_D7,CAN0 Mailbox 29 Data byte 7 Register" group.word (0x220+0x0e)++0x01 line.word 0x00 "C0MB29_TS,CAN0 Mailbox 29 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 28" if (((28.==60.)||(28.==61.)||(28.==62.)||(28.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x230++0x03 hide.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x230))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x230++0x03 line.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x230))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x230++0x03 line.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x230++0x03 hide.long 0x00 "C0MB28_ID,CAN0 Mailbox 28 Register" endif group.word (0x230+0x04)++0x1 line.word 0x00 "C0MB28_DLC,CAN0 Mailbox 28 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x230+0x06)++0x07 line.byte 0x00 "C0MB28_D0,CAN0 Mailbox 28 Data byte 0 Register" line.byte 0x01 "C0MB28_D1,CAN0 Mailbox 28 Data byte 1 Register" line.byte 0x02 "C0MB28_D2,CAN0 Mailbox 28 Data byte 2 Register" line.byte 0x03 "C0MB28_D3,CAN0 Mailbox 28 Data byte 3 Register" line.byte 0x04 "C0MB28_D4,CAN0 Mailbox 28 Data byte 4 Register" line.byte 0x05 "C0MB28_D5,CAN0 Mailbox 28 Data byte 5 Register" line.byte 0x06 "C0MB28_D6,CAN0 Mailbox 28 Data byte 6 Register" line.byte 0x07 "C0MB28_D7,CAN0 Mailbox 28 Data byte 7 Register" group.word (0x230+0x0e)++0x01 line.word 0x00 "C0MB28_TS,CAN0 Mailbox 28 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 27" if (((27.==60.)||(27.==61.)||(27.==62.)||(27.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x240++0x03 hide.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x240))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x240++0x03 line.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x240))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x240++0x03 line.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x240++0x03 hide.long 0x00 "C0MB27_ID,CAN0 Mailbox 27 Register" endif group.word (0x240+0x04)++0x1 line.word 0x00 "C0MB27_DLC,CAN0 Mailbox 27 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x240+0x06)++0x07 line.byte 0x00 "C0MB27_D0,CAN0 Mailbox 27 Data byte 0 Register" line.byte 0x01 "C0MB27_D1,CAN0 Mailbox 27 Data byte 1 Register" line.byte 0x02 "C0MB27_D2,CAN0 Mailbox 27 Data byte 2 Register" line.byte 0x03 "C0MB27_D3,CAN0 Mailbox 27 Data byte 3 Register" line.byte 0x04 "C0MB27_D4,CAN0 Mailbox 27 Data byte 4 Register" line.byte 0x05 "C0MB27_D5,CAN0 Mailbox 27 Data byte 5 Register" line.byte 0x06 "C0MB27_D6,CAN0 Mailbox 27 Data byte 6 Register" line.byte 0x07 "C0MB27_D7,CAN0 Mailbox 27 Data byte 7 Register" group.word (0x240+0x0e)++0x01 line.word 0x00 "C0MB27_TS,CAN0 Mailbox 27 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 26" if (((26.==60.)||(26.==61.)||(26.==62.)||(26.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x250++0x03 hide.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x250))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x250++0x03 line.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x250))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x250++0x03 line.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x250++0x03 hide.long 0x00 "C0MB26_ID,CAN0 Mailbox 26 Register" endif group.word (0x250+0x04)++0x1 line.word 0x00 "C0MB26_DLC,CAN0 Mailbox 26 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x250+0x06)++0x07 line.byte 0x00 "C0MB26_D0,CAN0 Mailbox 26 Data byte 0 Register" line.byte 0x01 "C0MB26_D1,CAN0 Mailbox 26 Data byte 1 Register" line.byte 0x02 "C0MB26_D2,CAN0 Mailbox 26 Data byte 2 Register" line.byte 0x03 "C0MB26_D3,CAN0 Mailbox 26 Data byte 3 Register" line.byte 0x04 "C0MB26_D4,CAN0 Mailbox 26 Data byte 4 Register" line.byte 0x05 "C0MB26_D5,CAN0 Mailbox 26 Data byte 5 Register" line.byte 0x06 "C0MB26_D6,CAN0 Mailbox 26 Data byte 6 Register" line.byte 0x07 "C0MB26_D7,CAN0 Mailbox 26 Data byte 7 Register" group.word (0x250+0x0e)++0x01 line.word 0x00 "C0MB26_TS,CAN0 Mailbox 26 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 25" if (((25.==60.)||(25.==61.)||(25.==62.)||(25.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x260++0x03 hide.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x260))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x260++0x03 line.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x260))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x260++0x03 line.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x260++0x03 hide.long 0x00 "C0MB25_ID,CAN0 Mailbox 25 Register" endif group.word (0x260+0x04)++0x1 line.word 0x00 "C0MB25_DLC,CAN0 Mailbox 25 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x260+0x06)++0x07 line.byte 0x00 "C0MB25_D0,CAN0 Mailbox 25 Data byte 0 Register" line.byte 0x01 "C0MB25_D1,CAN0 Mailbox 25 Data byte 1 Register" line.byte 0x02 "C0MB25_D2,CAN0 Mailbox 25 Data byte 2 Register" line.byte 0x03 "C0MB25_D3,CAN0 Mailbox 25 Data byte 3 Register" line.byte 0x04 "C0MB25_D4,CAN0 Mailbox 25 Data byte 4 Register" line.byte 0x05 "C0MB25_D5,CAN0 Mailbox 25 Data byte 5 Register" line.byte 0x06 "C0MB25_D6,CAN0 Mailbox 25 Data byte 6 Register" line.byte 0x07 "C0MB25_D7,CAN0 Mailbox 25 Data byte 7 Register" group.word (0x260+0x0e)++0x01 line.word 0x00 "C0MB25_TS,CAN0 Mailbox 25 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 24" if (((24.==60.)||(24.==61.)||(24.==62.)||(24.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x270++0x03 hide.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x270))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x270++0x03 line.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x270))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x270++0x03 line.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x270++0x03 hide.long 0x00 "C0MB24_ID,CAN0 Mailbox 24 Register" endif group.word (0x270+0x04)++0x1 line.word 0x00 "C0MB24_DLC,CAN0 Mailbox 24 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x270+0x06)++0x07 line.byte 0x00 "C0MB24_D0,CAN0 Mailbox 24 Data byte 0 Register" line.byte 0x01 "C0MB24_D1,CAN0 Mailbox 24 Data byte 1 Register" line.byte 0x02 "C0MB24_D2,CAN0 Mailbox 24 Data byte 2 Register" line.byte 0x03 "C0MB24_D3,CAN0 Mailbox 24 Data byte 3 Register" line.byte 0x04 "C0MB24_D4,CAN0 Mailbox 24 Data byte 4 Register" line.byte 0x05 "C0MB24_D5,CAN0 Mailbox 24 Data byte 5 Register" line.byte 0x06 "C0MB24_D6,CAN0 Mailbox 24 Data byte 6 Register" line.byte 0x07 "C0MB24_D7,CAN0 Mailbox 24 Data byte 7 Register" group.word (0x270+0x0e)++0x01 line.word 0x00 "C0MB24_TS,CAN0 Mailbox 24 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 23" if (((23.==60.)||(23.==61.)||(23.==62.)||(23.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x280++0x03 hide.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x280))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x280++0x03 line.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x280))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x280++0x03 line.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x280++0x03 hide.long 0x00 "C0MB23_ID,CAN0 Mailbox 23 Register" endif group.word (0x280+0x04)++0x1 line.word 0x00 "C0MB23_DLC,CAN0 Mailbox 23 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x280+0x06)++0x07 line.byte 0x00 "C0MB23_D0,CAN0 Mailbox 23 Data byte 0 Register" line.byte 0x01 "C0MB23_D1,CAN0 Mailbox 23 Data byte 1 Register" line.byte 0x02 "C0MB23_D2,CAN0 Mailbox 23 Data byte 2 Register" line.byte 0x03 "C0MB23_D3,CAN0 Mailbox 23 Data byte 3 Register" line.byte 0x04 "C0MB23_D4,CAN0 Mailbox 23 Data byte 4 Register" line.byte 0x05 "C0MB23_D5,CAN0 Mailbox 23 Data byte 5 Register" line.byte 0x06 "C0MB23_D6,CAN0 Mailbox 23 Data byte 6 Register" line.byte 0x07 "C0MB23_D7,CAN0 Mailbox 23 Data byte 7 Register" group.word (0x280+0x0e)++0x01 line.word 0x00 "C0MB23_TS,CAN0 Mailbox 23 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 22" if (((22.==60.)||(22.==61.)||(22.==62.)||(22.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x290++0x03 hide.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x290))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x290++0x03 line.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x290))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x290++0x03 line.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x290++0x03 hide.long 0x00 "C0MB22_ID,CAN0 Mailbox 22 Register" endif group.word (0x290+0x04)++0x1 line.word 0x00 "C0MB22_DLC,CAN0 Mailbox 22 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x290+0x06)++0x07 line.byte 0x00 "C0MB22_D0,CAN0 Mailbox 22 Data byte 0 Register" line.byte 0x01 "C0MB22_D1,CAN0 Mailbox 22 Data byte 1 Register" line.byte 0x02 "C0MB22_D2,CAN0 Mailbox 22 Data byte 2 Register" line.byte 0x03 "C0MB22_D3,CAN0 Mailbox 22 Data byte 3 Register" line.byte 0x04 "C0MB22_D4,CAN0 Mailbox 22 Data byte 4 Register" line.byte 0x05 "C0MB22_D5,CAN0 Mailbox 22 Data byte 5 Register" line.byte 0x06 "C0MB22_D6,CAN0 Mailbox 22 Data byte 6 Register" line.byte 0x07 "C0MB22_D7,CAN0 Mailbox 22 Data byte 7 Register" group.word (0x290+0x0e)++0x01 line.word 0x00 "C0MB22_TS,CAN0 Mailbox 22 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 21" if (((21.==60.)||(21.==61.)||(21.==62.)||(21.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2A0++0x03 hide.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2A0++0x03 line.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2A0++0x03 line.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2A0++0x03 hide.long 0x00 "C0MB21_ID,CAN0 Mailbox 21 Register" endif group.word (0x2A0+0x04)++0x1 line.word 0x00 "C0MB21_DLC,CAN0 Mailbox 21 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2A0+0x06)++0x07 line.byte 0x00 "C0MB21_D0,CAN0 Mailbox 21 Data byte 0 Register" line.byte 0x01 "C0MB21_D1,CAN0 Mailbox 21 Data byte 1 Register" line.byte 0x02 "C0MB21_D2,CAN0 Mailbox 21 Data byte 2 Register" line.byte 0x03 "C0MB21_D3,CAN0 Mailbox 21 Data byte 3 Register" line.byte 0x04 "C0MB21_D4,CAN0 Mailbox 21 Data byte 4 Register" line.byte 0x05 "C0MB21_D5,CAN0 Mailbox 21 Data byte 5 Register" line.byte 0x06 "C0MB21_D6,CAN0 Mailbox 21 Data byte 6 Register" line.byte 0x07 "C0MB21_D7,CAN0 Mailbox 21 Data byte 7 Register" group.word (0x2A0+0x0e)++0x01 line.word 0x00 "C0MB21_TS,CAN0 Mailbox 21 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 20" if (((20.==60.)||(20.==61.)||(20.==62.)||(20.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2B0++0x03 hide.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2B0++0x03 line.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2B0++0x03 line.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2B0++0x03 hide.long 0x00 "C0MB20_ID,CAN0 Mailbox 20 Register" endif group.word (0x2B0+0x04)++0x1 line.word 0x00 "C0MB20_DLC,CAN0 Mailbox 20 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2B0+0x06)++0x07 line.byte 0x00 "C0MB20_D0,CAN0 Mailbox 20 Data byte 0 Register" line.byte 0x01 "C0MB20_D1,CAN0 Mailbox 20 Data byte 1 Register" line.byte 0x02 "C0MB20_D2,CAN0 Mailbox 20 Data byte 2 Register" line.byte 0x03 "C0MB20_D3,CAN0 Mailbox 20 Data byte 3 Register" line.byte 0x04 "C0MB20_D4,CAN0 Mailbox 20 Data byte 4 Register" line.byte 0x05 "C0MB20_D5,CAN0 Mailbox 20 Data byte 5 Register" line.byte 0x06 "C0MB20_D6,CAN0 Mailbox 20 Data byte 6 Register" line.byte 0x07 "C0MB20_D7,CAN0 Mailbox 20 Data byte 7 Register" group.word (0x2B0+0x0e)++0x01 line.word 0x00 "C0MB20_TS,CAN0 Mailbox 20 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 19" if (((19.==60.)||(19.==61.)||(19.==62.)||(19.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2C0++0x03 hide.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2C0++0x03 line.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2C0++0x03 line.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2C0++0x03 hide.long 0x00 "C0MB19_ID,CAN0 Mailbox 19 Register" endif group.word (0x2C0+0x04)++0x1 line.word 0x00 "C0MB19_DLC,CAN0 Mailbox 19 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2C0+0x06)++0x07 line.byte 0x00 "C0MB19_D0,CAN0 Mailbox 19 Data byte 0 Register" line.byte 0x01 "C0MB19_D1,CAN0 Mailbox 19 Data byte 1 Register" line.byte 0x02 "C0MB19_D2,CAN0 Mailbox 19 Data byte 2 Register" line.byte 0x03 "C0MB19_D3,CAN0 Mailbox 19 Data byte 3 Register" line.byte 0x04 "C0MB19_D4,CAN0 Mailbox 19 Data byte 4 Register" line.byte 0x05 "C0MB19_D5,CAN0 Mailbox 19 Data byte 5 Register" line.byte 0x06 "C0MB19_D6,CAN0 Mailbox 19 Data byte 6 Register" line.byte 0x07 "C0MB19_D7,CAN0 Mailbox 19 Data byte 7 Register" group.word (0x2C0+0x0e)++0x01 line.word 0x00 "C0MB19_TS,CAN0 Mailbox 19 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 18" if (((18.==60.)||(18.==61.)||(18.==62.)||(18.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2D0++0x03 hide.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2D0++0x03 line.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2D0++0x03 line.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2D0++0x03 hide.long 0x00 "C0MB18_ID,CAN0 Mailbox 18 Register" endif group.word (0x2D0+0x04)++0x1 line.word 0x00 "C0MB18_DLC,CAN0 Mailbox 18 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2D0+0x06)++0x07 line.byte 0x00 "C0MB18_D0,CAN0 Mailbox 18 Data byte 0 Register" line.byte 0x01 "C0MB18_D1,CAN0 Mailbox 18 Data byte 1 Register" line.byte 0x02 "C0MB18_D2,CAN0 Mailbox 18 Data byte 2 Register" line.byte 0x03 "C0MB18_D3,CAN0 Mailbox 18 Data byte 3 Register" line.byte 0x04 "C0MB18_D4,CAN0 Mailbox 18 Data byte 4 Register" line.byte 0x05 "C0MB18_D5,CAN0 Mailbox 18 Data byte 5 Register" line.byte 0x06 "C0MB18_D6,CAN0 Mailbox 18 Data byte 6 Register" line.byte 0x07 "C0MB18_D7,CAN0 Mailbox 18 Data byte 7 Register" group.word (0x2D0+0x0e)++0x01 line.word 0x00 "C0MB18_TS,CAN0 Mailbox 18 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 17" if (((17.==60.)||(17.==61.)||(17.==62.)||(17.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2E0++0x03 hide.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2E0++0x03 line.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2E0++0x03 line.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2E0++0x03 hide.long 0x00 "C0MB17_ID,CAN0 Mailbox 17 Register" endif group.word (0x2E0+0x04)++0x1 line.word 0x00 "C0MB17_DLC,CAN0 Mailbox 17 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2E0+0x06)++0x07 line.byte 0x00 "C0MB17_D0,CAN0 Mailbox 17 Data byte 0 Register" line.byte 0x01 "C0MB17_D1,CAN0 Mailbox 17 Data byte 1 Register" line.byte 0x02 "C0MB17_D2,CAN0 Mailbox 17 Data byte 2 Register" line.byte 0x03 "C0MB17_D3,CAN0 Mailbox 17 Data byte 3 Register" line.byte 0x04 "C0MB17_D4,CAN0 Mailbox 17 Data byte 4 Register" line.byte 0x05 "C0MB17_D5,CAN0 Mailbox 17 Data byte 5 Register" line.byte 0x06 "C0MB17_D6,CAN0 Mailbox 17 Data byte 6 Register" line.byte 0x07 "C0MB17_D7,CAN0 Mailbox 17 Data byte 7 Register" group.word (0x2E0+0x0e)++0x01 line.word 0x00 "C0MB17_TS,CAN0 Mailbox 17 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 16" if (((16.==60.)||(16.==61.)||(16.==62.)||(16.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x2F0++0x03 hide.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x2F0++0x03 line.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x2F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x2F0++0x03 line.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2F0++0x03 hide.long 0x00 "C0MB16_ID,CAN0 Mailbox 16 Register" endif group.word (0x2F0+0x04)++0x1 line.word 0x00 "C0MB16_DLC,CAN0 Mailbox 16 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2F0+0x06)++0x07 line.byte 0x00 "C0MB16_D0,CAN0 Mailbox 16 Data byte 0 Register" line.byte 0x01 "C0MB16_D1,CAN0 Mailbox 16 Data byte 1 Register" line.byte 0x02 "C0MB16_D2,CAN0 Mailbox 16 Data byte 2 Register" line.byte 0x03 "C0MB16_D3,CAN0 Mailbox 16 Data byte 3 Register" line.byte 0x04 "C0MB16_D4,CAN0 Mailbox 16 Data byte 4 Register" line.byte 0x05 "C0MB16_D5,CAN0 Mailbox 16 Data byte 5 Register" line.byte 0x06 "C0MB16_D6,CAN0 Mailbox 16 Data byte 6 Register" line.byte 0x07 "C0MB16_D7,CAN0 Mailbox 16 Data byte 7 Register" group.word (0x2F0+0x0e)++0x01 line.word 0x00 "C0MB16_TS,CAN0 Mailbox 16 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 15" if (((15.==60.)||(15.==61.)||(15.==62.)||(15.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x300++0x03 hide.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x300))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x300++0x03 line.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x300))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x300++0x03 line.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x300++0x03 hide.long 0x00 "C0MB15_ID,CAN0 Mailbox 15 Register" endif group.word (0x300+0x04)++0x1 line.word 0x00 "C0MB15_DLC,CAN0 Mailbox 15 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x300+0x06)++0x07 line.byte 0x00 "C0MB15_D0,CAN0 Mailbox 15 Data byte 0 Register" line.byte 0x01 "C0MB15_D1,CAN0 Mailbox 15 Data byte 1 Register" line.byte 0x02 "C0MB15_D2,CAN0 Mailbox 15 Data byte 2 Register" line.byte 0x03 "C0MB15_D3,CAN0 Mailbox 15 Data byte 3 Register" line.byte 0x04 "C0MB15_D4,CAN0 Mailbox 15 Data byte 4 Register" line.byte 0x05 "C0MB15_D5,CAN0 Mailbox 15 Data byte 5 Register" line.byte 0x06 "C0MB15_D6,CAN0 Mailbox 15 Data byte 6 Register" line.byte 0x07 "C0MB15_D7,CAN0 Mailbox 15 Data byte 7 Register" group.word (0x300+0x0e)++0x01 line.word 0x00 "C0MB15_TS,CAN0 Mailbox 15 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 14" if (((14.==60.)||(14.==61.)||(14.==62.)||(14.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x310++0x03 hide.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x310))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x310++0x03 line.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x310))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x310++0x03 line.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x310++0x03 hide.long 0x00 "C0MB14_ID,CAN0 Mailbox 14 Register" endif group.word (0x310+0x04)++0x1 line.word 0x00 "C0MB14_DLC,CAN0 Mailbox 14 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x310+0x06)++0x07 line.byte 0x00 "C0MB14_D0,CAN0 Mailbox 14 Data byte 0 Register" line.byte 0x01 "C0MB14_D1,CAN0 Mailbox 14 Data byte 1 Register" line.byte 0x02 "C0MB14_D2,CAN0 Mailbox 14 Data byte 2 Register" line.byte 0x03 "C0MB14_D3,CAN0 Mailbox 14 Data byte 3 Register" line.byte 0x04 "C0MB14_D4,CAN0 Mailbox 14 Data byte 4 Register" line.byte 0x05 "C0MB14_D5,CAN0 Mailbox 14 Data byte 5 Register" line.byte 0x06 "C0MB14_D6,CAN0 Mailbox 14 Data byte 6 Register" line.byte 0x07 "C0MB14_D7,CAN0 Mailbox 14 Data byte 7 Register" group.word (0x310+0x0e)++0x01 line.word 0x00 "C0MB14_TS,CAN0 Mailbox 14 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 13" if (((13.==60.)||(13.==61.)||(13.==62.)||(13.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x320++0x03 hide.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x320))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x320++0x03 line.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x320))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x320++0x03 line.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x320++0x03 hide.long 0x00 "C0MB13_ID,CAN0 Mailbox 13 Register" endif group.word (0x320+0x04)++0x1 line.word 0x00 "C0MB13_DLC,CAN0 Mailbox 13 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x320+0x06)++0x07 line.byte 0x00 "C0MB13_D0,CAN0 Mailbox 13 Data byte 0 Register" line.byte 0x01 "C0MB13_D1,CAN0 Mailbox 13 Data byte 1 Register" line.byte 0x02 "C0MB13_D2,CAN0 Mailbox 13 Data byte 2 Register" line.byte 0x03 "C0MB13_D3,CAN0 Mailbox 13 Data byte 3 Register" line.byte 0x04 "C0MB13_D4,CAN0 Mailbox 13 Data byte 4 Register" line.byte 0x05 "C0MB13_D5,CAN0 Mailbox 13 Data byte 5 Register" line.byte 0x06 "C0MB13_D6,CAN0 Mailbox 13 Data byte 6 Register" line.byte 0x07 "C0MB13_D7,CAN0 Mailbox 13 Data byte 7 Register" group.word (0x320+0x0e)++0x01 line.word 0x00 "C0MB13_TS,CAN0 Mailbox 13 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 12" if (((12.==60.)||(12.==61.)||(12.==62.)||(12.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x330++0x03 hide.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x330))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x330++0x03 line.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x330))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x330++0x03 line.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x330++0x03 hide.long 0x00 "C0MB12_ID,CAN0 Mailbox 12 Register" endif group.word (0x330+0x04)++0x1 line.word 0x00 "C0MB12_DLC,CAN0 Mailbox 12 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x330+0x06)++0x07 line.byte 0x00 "C0MB12_D0,CAN0 Mailbox 12 Data byte 0 Register" line.byte 0x01 "C0MB12_D1,CAN0 Mailbox 12 Data byte 1 Register" line.byte 0x02 "C0MB12_D2,CAN0 Mailbox 12 Data byte 2 Register" line.byte 0x03 "C0MB12_D3,CAN0 Mailbox 12 Data byte 3 Register" line.byte 0x04 "C0MB12_D4,CAN0 Mailbox 12 Data byte 4 Register" line.byte 0x05 "C0MB12_D5,CAN0 Mailbox 12 Data byte 5 Register" line.byte 0x06 "C0MB12_D6,CAN0 Mailbox 12 Data byte 6 Register" line.byte 0x07 "C0MB12_D7,CAN0 Mailbox 12 Data byte 7 Register" group.word (0x330+0x0e)++0x01 line.word 0x00 "C0MB12_TS,CAN0 Mailbox 12 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 11" if (((11.==60.)||(11.==61.)||(11.==62.)||(11.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x340++0x03 hide.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x340))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x340++0x03 line.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x340))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x340++0x03 line.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x340++0x03 hide.long 0x00 "C0MB11_ID,CAN0 Mailbox 11 Register" endif group.word (0x340+0x04)++0x1 line.word 0x00 "C0MB11_DLC,CAN0 Mailbox 11 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x340+0x06)++0x07 line.byte 0x00 "C0MB11_D0,CAN0 Mailbox 11 Data byte 0 Register" line.byte 0x01 "C0MB11_D1,CAN0 Mailbox 11 Data byte 1 Register" line.byte 0x02 "C0MB11_D2,CAN0 Mailbox 11 Data byte 2 Register" line.byte 0x03 "C0MB11_D3,CAN0 Mailbox 11 Data byte 3 Register" line.byte 0x04 "C0MB11_D4,CAN0 Mailbox 11 Data byte 4 Register" line.byte 0x05 "C0MB11_D5,CAN0 Mailbox 11 Data byte 5 Register" line.byte 0x06 "C0MB11_D6,CAN0 Mailbox 11 Data byte 6 Register" line.byte 0x07 "C0MB11_D7,CAN0 Mailbox 11 Data byte 7 Register" group.word (0x340+0x0e)++0x01 line.word 0x00 "C0MB11_TS,CAN0 Mailbox 11 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 10" if (((10.==60.)||(10.==61.)||(10.==62.)||(10.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x350++0x03 hide.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x350))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x350++0x03 line.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x350))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x350++0x03 line.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x350++0x03 hide.long 0x00 "C0MB10_ID,CAN0 Mailbox 10 Register" endif group.word (0x350+0x04)++0x1 line.word 0x00 "C0MB10_DLC,CAN0 Mailbox 10 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x350+0x06)++0x07 line.byte 0x00 "C0MB10_D0,CAN0 Mailbox 10 Data byte 0 Register" line.byte 0x01 "C0MB10_D1,CAN0 Mailbox 10 Data byte 1 Register" line.byte 0x02 "C0MB10_D2,CAN0 Mailbox 10 Data byte 2 Register" line.byte 0x03 "C0MB10_D3,CAN0 Mailbox 10 Data byte 3 Register" line.byte 0x04 "C0MB10_D4,CAN0 Mailbox 10 Data byte 4 Register" line.byte 0x05 "C0MB10_D5,CAN0 Mailbox 10 Data byte 5 Register" line.byte 0x06 "C0MB10_D6,CAN0 Mailbox 10 Data byte 6 Register" line.byte 0x07 "C0MB10_D7,CAN0 Mailbox 10 Data byte 7 Register" group.word (0x350+0x0e)++0x01 line.word 0x00 "C0MB10_TS,CAN0 Mailbox 10 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 9" if (((9.==60.)||(9.==61.)||(9.==62.)||(9.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x360++0x03 hide.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x360))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x360++0x03 line.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x360))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x360++0x03 line.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x360++0x03 hide.long 0x00 "C0MB9_ID,CAN0 Mailbox 9 Register" endif group.word (0x360+0x04)++0x1 line.word 0x00 "C0MB9_DLC,CAN0 Mailbox 9 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x360+0x06)++0x07 line.byte 0x00 "C0MB9_D0,CAN0 Mailbox 9 Data byte 0 Register" line.byte 0x01 "C0MB9_D1,CAN0 Mailbox 9 Data byte 1 Register" line.byte 0x02 "C0MB9_D2,CAN0 Mailbox 9 Data byte 2 Register" line.byte 0x03 "C0MB9_D3,CAN0 Mailbox 9 Data byte 3 Register" line.byte 0x04 "C0MB9_D4,CAN0 Mailbox 9 Data byte 4 Register" line.byte 0x05 "C0MB9_D5,CAN0 Mailbox 9 Data byte 5 Register" line.byte 0x06 "C0MB9_D6,CAN0 Mailbox 9 Data byte 6 Register" line.byte 0x07 "C0MB9_D7,CAN0 Mailbox 9 Data byte 7 Register" group.word (0x360+0x0e)++0x01 line.word 0x00 "C0MB9_TS,CAN0 Mailbox 9 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 8" if (((8.==60.)||(8.==61.)||(8.==62.)||(8.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x370++0x03 hide.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x370))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x370++0x03 line.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x370))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x370++0x03 line.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x370++0x03 hide.long 0x00 "C0MB8_ID,CAN0 Mailbox 8 Register" endif group.word (0x370+0x04)++0x1 line.word 0x00 "C0MB8_DLC,CAN0 Mailbox 8 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x370+0x06)++0x07 line.byte 0x00 "C0MB8_D0,CAN0 Mailbox 8 Data byte 0 Register" line.byte 0x01 "C0MB8_D1,CAN0 Mailbox 8 Data byte 1 Register" line.byte 0x02 "C0MB8_D2,CAN0 Mailbox 8 Data byte 2 Register" line.byte 0x03 "C0MB8_D3,CAN0 Mailbox 8 Data byte 3 Register" line.byte 0x04 "C0MB8_D4,CAN0 Mailbox 8 Data byte 4 Register" line.byte 0x05 "C0MB8_D5,CAN0 Mailbox 8 Data byte 5 Register" line.byte 0x06 "C0MB8_D6,CAN0 Mailbox 8 Data byte 6 Register" line.byte 0x07 "C0MB8_D7,CAN0 Mailbox 8 Data byte 7 Register" group.word (0x370+0x0e)++0x01 line.word 0x00 "C0MB8_TS,CAN0 Mailbox 8 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 7" if (((7.==60.)||(7.==61.)||(7.==62.)||(7.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x380++0x03 hide.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x380))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x380++0x03 line.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x380))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x380++0x03 line.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x380++0x03 hide.long 0x00 "C0MB7_ID,CAN0 Mailbox 7 Register" endif group.word (0x380+0x04)++0x1 line.word 0x00 "C0MB7_DLC,CAN0 Mailbox 7 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x380+0x06)++0x07 line.byte 0x00 "C0MB7_D0,CAN0 Mailbox 7 Data byte 0 Register" line.byte 0x01 "C0MB7_D1,CAN0 Mailbox 7 Data byte 1 Register" line.byte 0x02 "C0MB7_D2,CAN0 Mailbox 7 Data byte 2 Register" line.byte 0x03 "C0MB7_D3,CAN0 Mailbox 7 Data byte 3 Register" line.byte 0x04 "C0MB7_D4,CAN0 Mailbox 7 Data byte 4 Register" line.byte 0x05 "C0MB7_D5,CAN0 Mailbox 7 Data byte 5 Register" line.byte 0x06 "C0MB7_D6,CAN0 Mailbox 7 Data byte 6 Register" line.byte 0x07 "C0MB7_D7,CAN0 Mailbox 7 Data byte 7 Register" group.word (0x380+0x0e)++0x01 line.word 0x00 "C0MB7_TS,CAN0 Mailbox 7 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 6" if (((6.==60.)||(6.==61.)||(6.==62.)||(6.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x390++0x03 hide.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x390))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x390++0x03 line.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x390))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x390++0x03 line.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x390++0x03 hide.long 0x00 "C0MB6_ID,CAN0 Mailbox 6 Register" endif group.word (0x390+0x04)++0x1 line.word 0x00 "C0MB6_DLC,CAN0 Mailbox 6 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x390+0x06)++0x07 line.byte 0x00 "C0MB6_D0,CAN0 Mailbox 6 Data byte 0 Register" line.byte 0x01 "C0MB6_D1,CAN0 Mailbox 6 Data byte 1 Register" line.byte 0x02 "C0MB6_D2,CAN0 Mailbox 6 Data byte 2 Register" line.byte 0x03 "C0MB6_D3,CAN0 Mailbox 6 Data byte 3 Register" line.byte 0x04 "C0MB6_D4,CAN0 Mailbox 6 Data byte 4 Register" line.byte 0x05 "C0MB6_D5,CAN0 Mailbox 6 Data byte 5 Register" line.byte 0x06 "C0MB6_D6,CAN0 Mailbox 6 Data byte 6 Register" line.byte 0x07 "C0MB6_D7,CAN0 Mailbox 6 Data byte 7 Register" group.word (0x390+0x0e)++0x01 line.word 0x00 "C0MB6_TS,CAN0 Mailbox 6 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 5" if (((5.==60.)||(5.==61.)||(5.==62.)||(5.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3A0++0x03 hide.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3A0++0x03 line.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3A0++0x03 line.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3A0++0x03 hide.long 0x00 "C0MB5_ID,CAN0 Mailbox 5 Register" endif group.word (0x3A0+0x04)++0x1 line.word 0x00 "C0MB5_DLC,CAN0 Mailbox 5 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3A0+0x06)++0x07 line.byte 0x00 "C0MB5_D0,CAN0 Mailbox 5 Data byte 0 Register" line.byte 0x01 "C0MB5_D1,CAN0 Mailbox 5 Data byte 1 Register" line.byte 0x02 "C0MB5_D2,CAN0 Mailbox 5 Data byte 2 Register" line.byte 0x03 "C0MB5_D3,CAN0 Mailbox 5 Data byte 3 Register" line.byte 0x04 "C0MB5_D4,CAN0 Mailbox 5 Data byte 4 Register" line.byte 0x05 "C0MB5_D5,CAN0 Mailbox 5 Data byte 5 Register" line.byte 0x06 "C0MB5_D6,CAN0 Mailbox 5 Data byte 6 Register" line.byte 0x07 "C0MB5_D7,CAN0 Mailbox 5 Data byte 7 Register" group.word (0x3A0+0x0e)++0x01 line.word 0x00 "C0MB5_TS,CAN0 Mailbox 5 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 4" if (((4.==60.)||(4.==61.)||(4.==62.)||(4.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3B0++0x03 hide.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3B0++0x03 line.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3B0++0x03 line.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3B0++0x03 hide.long 0x00 "C0MB4_ID,CAN0 Mailbox 4 Register" endif group.word (0x3B0+0x04)++0x1 line.word 0x00 "C0MB4_DLC,CAN0 Mailbox 4 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3B0+0x06)++0x07 line.byte 0x00 "C0MB4_D0,CAN0 Mailbox 4 Data byte 0 Register" line.byte 0x01 "C0MB4_D1,CAN0 Mailbox 4 Data byte 1 Register" line.byte 0x02 "C0MB4_D2,CAN0 Mailbox 4 Data byte 2 Register" line.byte 0x03 "C0MB4_D3,CAN0 Mailbox 4 Data byte 3 Register" line.byte 0x04 "C0MB4_D4,CAN0 Mailbox 4 Data byte 4 Register" line.byte 0x05 "C0MB4_D5,CAN0 Mailbox 4 Data byte 5 Register" line.byte 0x06 "C0MB4_D6,CAN0 Mailbox 4 Data byte 6 Register" line.byte 0x07 "C0MB4_D7,CAN0 Mailbox 4 Data byte 7 Register" group.word (0x3B0+0x0e)++0x01 line.word 0x00 "C0MB4_TS,CAN0 Mailbox 4 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 3" if (((3.==60.)||(3.==61.)||(3.==62.)||(3.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3C0++0x03 hide.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3C0++0x03 line.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3C0++0x03 line.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3C0++0x03 hide.long 0x00 "C0MB3_ID,CAN0 Mailbox 3 Register" endif group.word (0x3C0+0x04)++0x1 line.word 0x00 "C0MB3_DLC,CAN0 Mailbox 3 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3C0+0x06)++0x07 line.byte 0x00 "C0MB3_D0,CAN0 Mailbox 3 Data byte 0 Register" line.byte 0x01 "C0MB3_D1,CAN0 Mailbox 3 Data byte 1 Register" line.byte 0x02 "C0MB3_D2,CAN0 Mailbox 3 Data byte 2 Register" line.byte 0x03 "C0MB3_D3,CAN0 Mailbox 3 Data byte 3 Register" line.byte 0x04 "C0MB3_D4,CAN0 Mailbox 3 Data byte 4 Register" line.byte 0x05 "C0MB3_D5,CAN0 Mailbox 3 Data byte 5 Register" line.byte 0x06 "C0MB3_D6,CAN0 Mailbox 3 Data byte 6 Register" line.byte 0x07 "C0MB3_D7,CAN0 Mailbox 3 Data byte 7 Register" group.word (0x3C0+0x0e)++0x01 line.word 0x00 "C0MB3_TS,CAN0 Mailbox 3 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 2" if (((2.==60.)||(2.==61.)||(2.==62.)||(2.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3D0++0x03 hide.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3D0++0x03 line.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3D0++0x03 line.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3D0++0x03 hide.long 0x00 "C0MB2_ID,CAN0 Mailbox 2 Register" endif group.word (0x3D0+0x04)++0x1 line.word 0x00 "C0MB2_DLC,CAN0 Mailbox 2 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3D0+0x06)++0x07 line.byte 0x00 "C0MB2_D0,CAN0 Mailbox 2 Data byte 0 Register" line.byte 0x01 "C0MB2_D1,CAN0 Mailbox 2 Data byte 1 Register" line.byte 0x02 "C0MB2_D2,CAN0 Mailbox 2 Data byte 2 Register" line.byte 0x03 "C0MB2_D3,CAN0 Mailbox 2 Data byte 3 Register" line.byte 0x04 "C0MB2_D4,CAN0 Mailbox 2 Data byte 4 Register" line.byte 0x05 "C0MB2_D5,CAN0 Mailbox 2 Data byte 5 Register" line.byte 0x06 "C0MB2_D6,CAN0 Mailbox 2 Data byte 6 Register" line.byte 0x07 "C0MB2_D7,CAN0 Mailbox 2 Data byte 7 Register" group.word (0x3D0+0x0e)++0x01 line.word 0x00 "C0MB2_TS,CAN0 Mailbox 2 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 1" if (((1.==60.)||(1.==61.)||(1.==62.)||(1.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3E0++0x03 hide.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3E0++0x03 line.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3E0++0x03 line.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3E0++0x03 hide.long 0x00 "C0MB1_ID,CAN0 Mailbox 1 Register" endif group.word (0x3E0+0x04)++0x1 line.word 0x00 "C0MB1_DLC,CAN0 Mailbox 1 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3E0+0x06)++0x07 line.byte 0x00 "C0MB1_D0,CAN0 Mailbox 1 Data byte 0 Register" line.byte 0x01 "C0MB1_D1,CAN0 Mailbox 1 Data byte 1 Register" line.byte 0x02 "C0MB1_D2,CAN0 Mailbox 1 Data byte 2 Register" line.byte 0x03 "C0MB1_D3,CAN0 Mailbox 1 Data byte 3 Register" line.byte 0x04 "C0MB1_D4,CAN0 Mailbox 1 Data byte 4 Register" line.byte 0x05 "C0MB1_D5,CAN0 Mailbox 1 Data byte 5 Register" line.byte 0x06 "C0MB1_D6,CAN0 Mailbox 1 Data byte 6 Register" line.byte 0x07 "C0MB1_D7,CAN0 Mailbox 1 Data byte 7 Register" group.word (0x3E0+0x0e)++0x01 line.word 0x00 "C0MB1_TS,CAN0 Mailbox 1 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 0" if (((0.==60.)||(0.==61.)||(0.==62.)||(0.==63.))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x1)) hgroup.long 0x3F0++0x03 hide.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x0)) group.long 0x3F0++0x03 line.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E80000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E80000+0x3F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E80000+0x840))&0x6)==0x2)) group.long 0x3F0++0x03 line.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3F0++0x03 hide.long 0x00 "C0MB0_ID,CAN0 Mailbox 0 Register" endif group.word (0x3F0+0x04)++0x1 line.word 0x00 "C0MB0_DLC,CAN0 Mailbox 0 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3F0+0x06)++0x07 line.byte 0x00 "C0MB0_D0,CAN0 Mailbox 0 Data byte 0 Register" line.byte 0x01 "C0MB0_D1,CAN0 Mailbox 0 Data byte 1 Register" line.byte 0x02 "C0MB0_D2,CAN0 Mailbox 0 Data byte 2 Register" line.byte 0x03 "C0MB0_D3,CAN0 Mailbox 0 Data byte 3 Register" line.byte 0x04 "C0MB0_D4,CAN0 Mailbox 0 Data byte 4 Register" line.byte 0x05 "C0MB0_D5,CAN0 Mailbox 0 Data byte 5 Register" line.byte 0x06 "C0MB0_D6,CAN0 Mailbox 0 Data byte 6 Register" line.byte 0x07 "C0MB0_D7,CAN0 Mailbox 0 Data byte 7 Register" group.word (0x3F0+0x0e)++0x01 line.word 0x00 "C0MB0_TS,CAN0 Mailbox 0 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree.end width 9. tree "Mailbox Interrupt Registers" if (((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.long 0x42c++0x03 line.long 0x0 "C0MIER1,CAN0 Mailbox Interrupt Enable Register 1" bitfld.long 0x00 31. " MB_63 ,Mailbox 63 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB_62 ,Mailbox 62 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB_61 ,Mailbox 61 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB_60 ,Mailbox 60 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB_59 ,Mailbox 59 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB_58 ,Mailbox 58 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB_57 ,Mailbox 57 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB_56 ,Mailbox 56 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB_55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB_54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB_53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB_52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB_51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB_50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB_49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB_48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB_47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB_46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB_45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB_44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB_43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB_42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB_41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB_40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB_39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB_38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB_37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB_36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB_35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB_34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB_33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB_32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" else group.long 0x42C++0x03 line.long 0x0 "C0MR1,CAN0 Mailbox Interrupt Enable Register 1" sif (cpu()=="RCARH2") bitfld.long 0x00 29. " MB_61 ,Receive FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" textline " " bitfld.long 0x00 28. " MB_60 ,Receive FIFO Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB_57 ,Transmit FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" bitfld.long 0x00 24. " MB_56 ,Transmit FIFO Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " MB_55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB_54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB_53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB_52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB_51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB_50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB_49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB_48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB_47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB_46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB_45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB_44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB_43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB_42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB_41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB_40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB_39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB_38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB_37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB_36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB_35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB_34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB_33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB_32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" endif group.long 0x43c++0x03 line.long 0x0 "C0MIER0,CAN0 Mailbox Interrupt Enable Register 0" bitfld.long 0x00 31. " MB_31IE ,Mailbox 31 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB_30IE ,Mailbox 30 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB_29IE ,Mailbox 29 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB_28IE ,Mailbox 28 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB_27IE ,Mailbox 27 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB_26IE ,Mailbox 26 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB_25IE ,Mailbox 25 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB_24IE ,Mailbox 24 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB_23IE ,Mailbox 23 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB_22IE ,Mailbox 22 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB_21IE ,Mailbox 21 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB_20IE ,Mailbox 20 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB_19IE ,Mailbox 19 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB_18IE ,Mailbox 18 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB_17IE ,Mailbox 17 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB_16IE ,Mailbox 16 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB_15IE ,Mailbox 15 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB_14IE ,Mailbox 14 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB_13IE ,Mailbox 13 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB_12IE ,Mailbox 12 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB_11IE ,Mailbox 11 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB_10IE ,Mailbox 10 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB_9IE ,Mailbox 9 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB_8IE ,Mailbox 8 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB_7IE ,Mailbox 7 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB_6IE ,Mailbox 6 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB_5IE ,Mailbox 5 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB_4IE ,Mailbox 4 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB_3IE ,Mailbox 3 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB_2IE ,Mailbox 2 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB_1IE ,Mailbox 1 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB_0IE ,Mailbox 0 Interrupt enabled" "Disabled,Enabled" tree.end tree.end tree "Message Control Registers" if (((per.b(ad:0xE6E80000+0x800+0x0))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x0))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x0))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x0)++0x0 hide.byte 0x00 "C0MCTL63,CAN0 Message Control Register 63" endif if (((per.b(ad:0xE6E80000+0x800+0x1))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x1))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x1))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x1)++0x0 hide.byte 0x00 "C0MCTL62,CAN0 Message Control Register 62" endif if (((per.b(ad:0xE6E80000+0x800+0x2))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x2))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x2))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x2)++0x0 hide.byte 0x00 "C0MCTL61,CAN0 Message Control Register 61" endif if (((per.b(ad:0xE6E80000+0x800+0x3))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x3))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x3))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x3)++0x0 hide.byte 0x00 "C0MCTL60,CAN0 Message Control Register 60" endif if (((per.b(ad:0xE6E80000+0x800+0x4))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x4))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x4))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x4)++0x0 hide.byte 0x00 "C0MCTL59,CAN0 Message Control Register 59" endif if (((per.b(ad:0xE6E80000+0x800+0x5))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x5))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x5))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x5)++0x0 hide.byte 0x00 "C0MCTL58,CAN0 Message Control Register 58" endif if (((per.b(ad:0xE6E80000+0x800+0x6))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x6))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x6))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x6)++0x0 hide.byte 0x00 "C0MCTL57,CAN0 Message Control Register 57" endif if (((per.b(ad:0xE6E80000+0x800+0x7))&0xc0)==0x40)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x7))&0xc0)==0x80)&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x800+0x7))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E80000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x7)++0x0 hide.byte 0x00 "C0MCTL56,CAN0 Message Control Register 56" endif if (((per.b(ad:0xE6E80000+0x808+0x0))&0xc0)==0x40) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C0MCTL55,CAN0 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x0))&0xc0)==0x80) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C0MCTL55,CAN0 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x0)++0x0 line.byte 0x00 "C0MCTL55,CAN0 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x1))&0xc0)==0x40) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C0MCTL54,CAN0 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x1))&0xc0)==0x80) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C0MCTL54,CAN0 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x1)++0x0 line.byte 0x00 "C0MCTL54,CAN0 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x2))&0xc0)==0x40) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C0MCTL53,CAN0 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x2))&0xc0)==0x80) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C0MCTL53,CAN0 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x2)++0x0 line.byte 0x00 "C0MCTL53,CAN0 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x3))&0xc0)==0x40) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C0MCTL52,CAN0 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x3))&0xc0)==0x80) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C0MCTL52,CAN0 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x3)++0x0 line.byte 0x00 "C0MCTL52,CAN0 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x4))&0xc0)==0x40) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C0MCTL51,CAN0 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x4))&0xc0)==0x80) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C0MCTL51,CAN0 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x4)++0x0 line.byte 0x00 "C0MCTL51,CAN0 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x5))&0xc0)==0x40) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C0MCTL50,CAN0 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x5))&0xc0)==0x80) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C0MCTL50,CAN0 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x5)++0x0 line.byte 0x00 "C0MCTL50,CAN0 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x6))&0xc0)==0x40) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C0MCTL49,CAN0 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x6))&0xc0)==0x80) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C0MCTL49,CAN0 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x6)++0x0 line.byte 0x00 "C0MCTL49,CAN0 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x7))&0xc0)==0x40) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C0MCTL48,CAN0 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x7))&0xc0)==0x80) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C0MCTL48,CAN0 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x7)++0x0 line.byte 0x00 "C0MCTL48,CAN0 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x8))&0xc0)==0x40) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C0MCTL47,CAN0 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x8))&0xc0)==0x80) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C0MCTL47,CAN0 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x8)++0x0 line.byte 0x00 "C0MCTL47,CAN0 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x9))&0xc0)==0x40) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C0MCTL46,CAN0 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x9))&0xc0)==0x80) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C0MCTL46,CAN0 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x9)++0x0 line.byte 0x00 "C0MCTL46,CAN0 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xA))&0xc0)==0x40) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C0MCTL45,CAN0 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xA))&0xc0)==0x80) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C0MCTL45,CAN0 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xA)++0x0 line.byte 0x00 "C0MCTL45,CAN0 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xB))&0xc0)==0x40) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C0MCTL44,CAN0 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xB))&0xc0)==0x80) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C0MCTL44,CAN0 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xB)++0x0 line.byte 0x00 "C0MCTL44,CAN0 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xC))&0xc0)==0x40) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C0MCTL43,CAN0 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xC))&0xc0)==0x80) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C0MCTL43,CAN0 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xC)++0x0 line.byte 0x00 "C0MCTL43,CAN0 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xD))&0xc0)==0x40) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C0MCTL42,CAN0 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xD))&0xc0)==0x80) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C0MCTL42,CAN0 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xD)++0x0 line.byte 0x00 "C0MCTL42,CAN0 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xE))&0xc0)==0x40) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C0MCTL41,CAN0 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xE))&0xc0)==0x80) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C0MCTL41,CAN0 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xE)++0x0 line.byte 0x00 "C0MCTL41,CAN0 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0xF))&0xc0)==0x40) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C0MCTL40,CAN0 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0xF))&0xc0)==0x80) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C0MCTL40,CAN0 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xF)++0x0 line.byte 0x00 "C0MCTL40,CAN0 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x10))&0xc0)==0x40) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C0MCTL39,CAN0 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x10))&0xc0)==0x80) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C0MCTL39,CAN0 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x10)++0x0 line.byte 0x00 "C0MCTL39,CAN0 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x11))&0xc0)==0x40) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C0MCTL38,CAN0 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x11))&0xc0)==0x80) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C0MCTL38,CAN0 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x11)++0x0 line.byte 0x00 "C0MCTL38,CAN0 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x12))&0xc0)==0x40) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C0MCTL37,CAN0 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x12))&0xc0)==0x80) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C0MCTL37,CAN0 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x12)++0x0 line.byte 0x00 "C0MCTL37,CAN0 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x13))&0xc0)==0x40) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C0MCTL36,CAN0 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x13))&0xc0)==0x80) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C0MCTL36,CAN0 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x13)++0x0 line.byte 0x00 "C0MCTL36,CAN0 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x14))&0xc0)==0x40) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C0MCTL35,CAN0 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x14))&0xc0)==0x80) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C0MCTL35,CAN0 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x14)++0x0 line.byte 0x00 "C0MCTL35,CAN0 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x15))&0xc0)==0x40) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C0MCTL34,CAN0 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x15))&0xc0)==0x80) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C0MCTL34,CAN0 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x15)++0x0 line.byte 0x00 "C0MCTL34,CAN0 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x16))&0xc0)==0x40) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C0MCTL33,CAN0 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x16))&0xc0)==0x80) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C0MCTL33,CAN0 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x16)++0x0 line.byte 0x00 "C0MCTL33,CAN0 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E80000+0x808+0x17))&0xc0)==0x40) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C0MCTL32,CAN0 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E80000+0x808+0x17))&0xc0)==0x80) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C0MCTL32,CAN0 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x17)++0x0 line.byte 0x00 "C0MCTL32,CAN0 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif group.byte 0x820++0x1f line.byte 0x0 "C0MCTL31,CAN0 Message Control Register 31" bitfld.byte 0x0 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x0 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x0 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x0 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1 "C0MCTL30,CAN0 Message Control Register 30" bitfld.byte 0x1 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x2 "C0MCTL29,CAN0 Message Control Register 29" bitfld.byte 0x2 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x2 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x2 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x2 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x3 "C0MCTL28,CAN0 Message Control Register 28" bitfld.byte 0x3 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x3 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x3 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x3 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x4 "C0MCTL27,CAN0 Message Control Register 27" bitfld.byte 0x4 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x4 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x4 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x4 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x5 "C0MCTL26,CAN0 Message Control Register 26" bitfld.byte 0x5 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x5 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x5 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x5 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x6 "C0MCTL25,CAN0 Message Control Register 25" bitfld.byte 0x6 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x6 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x6 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x6 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x7 "C0MCTL24,CAN0 Message Control Register 24" bitfld.byte 0x7 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x7 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x7 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x7 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x8 "C0MCTL23,CAN0 Message Control Register 23" bitfld.byte 0x8 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x8 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x8 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x8 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x9 "C0MCTL22,CAN0 Message Control Register 22" bitfld.byte 0x9 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x9 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x9 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x9 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xA "C0MCTL21,CAN0 Message Control Register 21" bitfld.byte 0xA 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xA 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xA 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xA 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xB "C0MCTL20,CAN0 Message Control Register 20" bitfld.byte 0xB 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xB 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xB 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xB 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xC "C0MCTL19,CAN0 Message Control Register 19" bitfld.byte 0xC 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xC 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xC 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xC 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xD "C0MCTL18,CAN0 Message Control Register 18" bitfld.byte 0xD 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xD 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xD 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xD 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xE "C0MCTL17,CAN0 Message Control Register 17" bitfld.byte 0xE 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xE 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xE 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xE 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xF "C0MCTL16,CAN0 Message Control Register 16" bitfld.byte 0xF 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xF 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xF 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xF 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x10 "C0MCTL15,CAN0 Message Control Register 15" bitfld.byte 0x10 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x10 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x10 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x10 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x11 "C0MCTL14,CAN0 Message Control Register 14" bitfld.byte 0x11 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x11 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x11 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x11 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x12 "C0MCTL13,CAN0 Message Control Register 13" bitfld.byte 0x12 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x12 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x12 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x12 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x13 "C0MCTL12,CAN0 Message Control Register 12" bitfld.byte 0x13 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x13 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x13 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x13 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x14 "C0MCTL11,CAN0 Message Control Register 11" bitfld.byte 0x14 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x14 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x14 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x14 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x15 "C0MCTL10,CAN0 Message Control Register 10" bitfld.byte 0x15 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x15 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x15 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x15 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x16 "C0MCTL9,CAN0 Message Control Register 9" bitfld.byte 0x16 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x16 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x16 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x16 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x17 "C0MCTL8,CAN0 Message Control Register 8" bitfld.byte 0x17 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x17 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x17 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x17 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x18 "C0MCTL7,CAN0 Message Control Register 7" bitfld.byte 0x18 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x18 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x18 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x18 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x19 "C0MCTL6,CAN0 Message Control Register 6" bitfld.byte 0x19 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x19 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x19 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x19 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1A "C0MCTL5,CAN0 Message Control Register 5" bitfld.byte 0x1A 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1A 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1A 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1A 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1B "C0MCTL4,CAN0 Message Control Register 4" bitfld.byte 0x1B 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1B 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1B 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1B 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1C "C0MCTL3,CAN0 Message Control Register 3" bitfld.byte 0x1C 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1C 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1C 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1C 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1D "C0MCTL2,CAN0 Message Control Register 2" bitfld.byte 0x1D 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1D 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1D 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1D 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1E "C0MCTL1,CAN0 Message Control Register 1" bitfld.byte 0x1E 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1E 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1E 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1E 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1F "C0MCTL0,CAN0 Message Control Register 0" bitfld.byte 0x1F 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1F 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1F 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1F 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" tree.end tree "FIFO Registers" group.byte 0x848++0x0 line.byte 0x0 "C0RFCR,CAN0 Receive FIFO Control Register" bitfld.byte 0x00 7. " RFEST ,Receive FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " RFWST ,Receive FIFO Buffer Warning Status" "Not buffer warning,Buffer warning" textline " " bitfld.byte 0x00 5. " RFFST ,Receive FIFO Full Status" "Not full,Full" bitfld.byte 0x00 4. " RFMLF ,Receive FIFO Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1.--3. " RFUST ,Receive FIFO Unread Message Number Status" "0,1,2,3,4,?..." bitfld.byte 0x00 0. " RFE ,Receive FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E80000+0x848))&0x1)==0x00) rgroup.byte 0x849++0x0 line.byte 0x0 "C0RFPCR,CAN0 Receive FIFO Pointer Control Register" else group.byte 0x849++0x0 line.byte 0x0 "C0RFPCR,CAN0 Receive FIFO Pointer Control Register" endif group.byte 0x84a++0x0 line.byte 0x0 "C0TFCR,CAN0 Transmit FIFO Control Register" bitfld.byte 0x00 7. " TFEST ,Transmit FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " TFFST ,Transmit FIFO Full Status" "Not full,Full" bitfld.byte 0x00 1.--3. " TFUST ,Transmit FIFO Unsent Message Number Status" "0,1,2,3,4,?..." textline " " bitfld.byte 0x00 0. " TFE ,Transmit FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E80000+0x84a))&0x1)==0x00) rgroup.byte 0x84b++0x0 line.byte 0x0 "C0TFPCR,CAN0 Transmit FIFO Pointer Control Register" else group.byte 0x84b++0x0 line.byte 0x0 "C0TFPCR,CAN0 Transmit FIFO Pointer Control Register" endif rgroup.word 0x842++0x01 line.word 0x0 "C0STR,CAN0 Status Register" bitfld.word 0x00 14. " RECST ,Receive Status Flag" "Idle/transmission,Reception" textline " " bitfld.word 0x00 13. " TRMST ,Transmit Status Flag" "Idle/reception,Transmission/bus-off" textline " " bitfld.word 0x00 12. " BOST ,Bus-Off Status Flag" "Not in bus-off,In bus-off" bitfld.word 0x00 11. " EPST ,Error-Passive Status Flag" "Not in error-passive,In error-passive" bitfld.word 0x00 10. " SLPST ,CAN Sleep Status Flag" "Not in CAN sleep,In CAN sleep" textline " " bitfld.word 0x00 9. " HLTST ,CAN Halt Status Flag" "Not in CAN halt,In CAN halt" bitfld.word 0x00 8. " RSTST ,CAN Reset Status Flag" "Not in CAN reset,In CAN reset" bitfld.word 0x00 7. " EST ,Error Status Flag" "No error,Error" textline " " bitfld.word 0x00 6. " TABST ,Transmission Abort Status Flag" "Not occurred,Occurred" bitfld.word 0x00 5. " FMLST ,FIFO Mailbox Message Lost Status Flag" "Not occurred,Occurred" bitfld.word 0x00 4. " NMLST ,Normal Mailbox Message Lost Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 3. " TFST ,Transmit FIFO Status Flag" "Full,Not full" bitfld.word 0x00 2. " RFST ,Receive FIFO Status Flag" "Empty,Not empty" bitfld.word 0x00 1. " SDST ,SENTDATA Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 0. " NDST ,NEWDATA Status Flag" "Not occurred,Occurred" tree.end textline " " wgroup.byte 0x851++0x00 line.byte 0x0 "C0CSSR,CAN0 Channel Search Support Register" rgroup.byte 0x852++0x00 line.byte 0x0 "C0MSSR,CAN0 Mailbox Search Status Register" bitfld.byte 0x00 7. " SEST ,Search Result Status" "Found,Not found" bitfld.byte 0x00 0.--5. " MBNST ,Search Result Mailbox Number Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.byte 0x853++0x00 line.byte 0x0 "C0MSMR,CAN0 Mailbox Search Mode Register" bitfld.byte 0x00 0.--1. " MBSM ,Mailbox Search Mode Select" "Receive,Transmit,Message lost,Channel" group.word 0x856++0x01 line.word 0x0 "C0AFSR,CAN0 Acceptance Filter Support Register" group.byte 0x84c++0x01 line.byte 0x0 "C0EIER,CAN0 Error Interrupt Enable Register" bitfld.byte 0x00 7. " BLIE ,Bus Lock Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " OLIE ,Overload Frame Transmit Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 5. " ORIE ,Receive Overrun Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " BORIE ,Bus-Off Recovery Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 3. " BOEIE ,Bus-Off Entry Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " EPIE ,Error-Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " EWIE ,Error-Warning Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 0. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C0EIFR,CAN0 Error Interrupt Factor Judge Register" bitfld.byte 0x01 7. " BLIF ,Bus Lock Detect Flag" "Not detected,Detected" bitfld.byte 0x01 6. " OLIF ,Overload Frame Transmission Detect Flag" "Not detected,Detected" bitfld.byte 0x01 5. " ORIF ,Receive Overrun Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 4. " BORIF ,Bus-Off Recovery Detect Flag" "Not detected,Detected" bitfld.byte 0x01 3. " BOEIF ,Bus-Off Entry Detect Flag" "Not detected,Detected" bitfld.byte 0x01 2. " EPIF ,Error Passive Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 1. " EWIF ,Error Warning Detect Flag" "Not detected,Detected" bitfld.byte 0x01 0. " BEIF ,Bus Error Detect Flag" "Not detected,Detected" rgroup.byte 0x84e++0x01 line.byte 0x0 "C0RECR,CAN0 Receive Error Count Register" line.byte 0x1 "C0TECR,CAN0 Transmit Error Count Register" group.byte 0x850++0x00 line.byte 0x0 "C0ECSR,CAN0 Error Code Store Register" bitfld.byte 0x0 7. " EDPM ,Error Display Mode Select" "First detected error,Accumulated error" textline " " bitfld.byte 0x0 6. " ADEF ,ACK Delimiter Error Flag" "No ACK delimiter,ACK delimiter" textline " " bitfld.byte 0x0 5. " BE0F ,Bit Error (dominant) Flag" "No error,Error" bitfld.byte 0x0 4. " BE1F ,Bit Error (recessive) Flag" "No error,Error" bitfld.byte 0x0 3. " CEF ,CRC Error Flag" "No error,Error" textline " " bitfld.byte 0x0 2. " AEF ,ACK Error Flag" "No error,Error" bitfld.byte 0x0 1. " FEF ,Form Error Flag" "No error,Error" bitfld.byte 0x0 0. " SEF ,Stuff Error Flag" "No error,Error" rgroup.word 0x854++0x01 line.word 0x0 "C0TSR,CAN0 Time Stamp Register" group.byte 0x858++0x00 line.byte 0x0 "C0TCR,CAN0 Test Control Register" bitfld.byte 0x0 1.--2. " TSTM ,CAN Test Mode Select" "Other,Listen-only,External loop back,Internal loop back" textline " " bitfld.byte 0x0 0. " TSTE ,CAN Test Mode Enable" "Disabled,Enabled" group.byte 0x860++0x01 line.byte 0x0 "C0IER,CAN0 Interrupt Enable Register" bitfld.byte 0x0 5. " ERSIE ,Error (ERS) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " RXFIE ,Reception FIFO (RXF) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 3. " TXFIE ,Transmission FIFO (TXF) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 2. " RXM0IE ,Mailbox 0 Successful Reception (RXM0) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 1. " RXM1IE ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 0. " TXMIE ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C0ISR,CAN0 Interrupt Status Register" bitfld.byte 0x01 5. " ERSF ,Error (ERS) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 4. " RXFF ,Reception FIFO (RXF) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 3. " TXFF ,Transmission FIFO (TXF) Interrupt Status" "Not detected,Detected" textline " " bitfld.byte 0x01 2. " RXM0F ,Mailbox 0 Successful Reception (RXM0) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 1. " RXM1F ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 0. " TXMF ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Status" "Not detected,Detected" group.byte 0x863++0x00 line.byte 0x0 "C0MBSMR,CAN0 Mailbox Search Mask Register" bitfld.byte 0x0 0. " MB0SM ,Mailbox 0 Search Mask" "Not masked,Masked" width 0xb tree.end tree "Channel 1" base ad:0xE6E88000 width 8. group.word 0x840++0x01 line.word 0x00 "C1CTLR,CAN1 Control Register" bitfld.word 0x00 13. " RBOC ,Forcible Return From Bus-OFF" "No effect,Force return" bitfld.word 0x00 11.--12. " BOM ,Bus-Off Recovery Mode" "Normal,Halt at Bus-off entry,Halt at Bus-off end,Halt by Program request" textline " " bitfld.word 0x00 10. " SLPM ,CAN Sleep Mode" "Disabled,Enabled" bitfld.word 0x00 8.--9. " CANM ,CAN Operating Mode Select" "Operation,Reset,Halt,Force reset" bitfld.word 0x00 6.--7. " TSPS ,Time Stamp Prescaler Select" "1,2,4,8" textline " " bitfld.word 0x00 5. " TSRC ,Time Stamp Counter Reset Command" "No effect,Reset" bitfld.word 0x00 4. " TPM ,Transmission Priority Mode Select" "ID,Mailbox" bitfld.word 0x00 3. " MLM ,Message Lost Mode Select" "Overwrite,Overrun" textline " " bitfld.word 0x00 1.--2. " IDFM ,ID Format Mode Select" "Standard,Extended,Mixed,?..." bitfld.word 0x00 0. " MBM ,CAN Mailbox Mode Select" "Normal,FIFO" group.byte 0x847++0x00 line.byte 0x00 "C1CLKR,CAN1 Clock Select Register" bitfld.byte 0x00 0.--1. " CCLKS ,CAN Clock Source Select" "Peripheral 1,Peripheral 2,,External" group.long 0x844++0x03 line.long 0x00 "C1BCR,CAN1 Bit Configuration Register" bitfld.long 0x00 28.--31. " TSEG1 ,Time Segment 1 Control Bits" ",,,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq,9 Tq,10 Tq,11 Tq,12 Tq,13 Tq,14 Tq,15 Tq,16 Tq" hexmask.long.word 0x00 16.--25. 1. " BRP ,Prescaler Division Ratio" textline " " bitfld.long 0x00 12.--13. " SJW ,Resynchronization Jump Width Control" "1 Tq,2 Tq,3 Tq,4 Tq" bitfld.long 0x00 8.--10. " TSEG2 ,Time Segment 2 Control" ",2 Tq,3 Tq,4 Tq,5 Tq,6 Tq,7 Tq,8 Tq" textline " " if (((per.w(ad:0xE6E88000+0x840))&0x6)==0x0) group.long 0x430++0x07 line.long 0x0 "C1MKR0,CAN1 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" line.long 0x4 "C1MKR1,CAN1 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C1MKR2,CAN1 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C1MKR3,CAN1 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C1MKR4,CAN1 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C1MKR5,CAN1 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C1MKR6,CAN1 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C1MKR7,CAN1 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C1MKR8,CAN1 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C1MKR9,CAN1 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" elif ((((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)) group.long 0x430++0x07 line.long 0x0 "C1MKR0,CAN1 Mask Register 0" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" line.long 0x4 "C1MKR1,CAN1 Mask Register 1" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x0 "C1MKR2,CAN1 Mask Register 2" bitfld.long 0x0 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x0 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x0 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x0 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x0 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x0 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x0 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x0 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x0 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x0 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x0 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x0 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x0 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x0 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x0 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x0 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x0 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x0 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x0 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x0 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x0 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x0 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x0 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x0 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x0 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x0 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x0 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x0 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x0 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x4 "C1MKR3,CAN1 Mask Register 3" bitfld.long 0x4 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x4 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x4 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x4 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x4 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x4 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x4 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x4 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x4 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x4 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x4 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x4 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x4 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x4 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x4 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x4 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x4 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x4 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x4 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x4 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x4 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x4 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x4 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x4 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x4 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x4 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x4 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x4 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x4 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x8 "C1MKR4,CAN1 Mask Register 4" bitfld.long 0x8 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x8 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x8 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x8 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x8 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x8 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x8 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x8 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x8 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x8 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x8 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x8 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x8 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x8 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x8 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x8 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x8 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x8 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x8 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x8 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x8 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x8 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x8 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x8 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x8 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x8 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x8 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x8 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x8 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0xC "C1MKR5,CAN1 Mask Register 5" bitfld.long 0xC 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0xC 27. ",Standard ID Bit 9" "0,1" bitfld.long 0xC 26. ",Standard ID Bit 8" "0,1" bitfld.long 0xC 25. ",Standard ID Bit 7" "0,1" bitfld.long 0xC 24. ",Standard ID Bit 6" "0,1" bitfld.long 0xC 23. ",Standard ID Bit 5" "0,1" bitfld.long 0xC 22. ",Standard ID Bit 4" "0,1" bitfld.long 0xC 21. ",Standard ID Bit 3" "0,1" bitfld.long 0xC 20. ",Standard ID Bit 2" "0,1" bitfld.long 0xC 19. ",Standard ID Bit 1" "0,1" bitfld.long 0xC 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0xC 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0xC 16. ",Extended ID Bit 16" "0,1" bitfld.long 0xC 15. ",Extended ID Bit 15" "0,1" bitfld.long 0xC 14. ",Extended ID Bit 14" "0,1" bitfld.long 0xC 13. ",Extended ID Bit 13" "0,1" bitfld.long 0xC 12. ",Extended ID Bit 12" "0,1" bitfld.long 0xC 11. ",Extended ID Bit 11" "0,1" bitfld.long 0xC 10. ",Extended ID Bit 10" "0,1" bitfld.long 0xC 9. ",Extended ID Bit 9" "0,1" bitfld.long 0xC 8. ",Extended ID Bit 8" "0,1" bitfld.long 0xC 7. ",Extended ID Bit 7" "0,1" bitfld.long 0xC 6. ",Extended ID Bit 6" "0,1" bitfld.long 0xC 5. ",Extended ID Bit 5" "0,1" bitfld.long 0xC 4. ",Extended ID Bit 4" "0,1" bitfld.long 0xC 3. ",Extended ID Bit 3" "0,1" bitfld.long 0xC 2. ",Extended ID Bit 2" "0,1" bitfld.long 0xC 1. ",Extended ID Bit 1" "0,1" bitfld.long 0xC 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x10 "C1MKR6,CAN1 Mask Register 6" bitfld.long 0x10 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x10 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x10 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x10 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x10 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x10 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x10 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x10 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x10 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x10 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x10 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x10 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x10 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x10 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x10 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x10 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x10 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x10 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x10 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x10 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x10 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x10 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x10 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x10 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x10 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x10 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x10 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x10 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x10 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x14 "C1MKR7,CAN1 Mask Register 7" bitfld.long 0x14 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x14 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x14 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x14 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x14 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x14 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x14 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x14 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x14 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x14 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x14 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x14 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x14 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x14 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x14 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x14 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x14 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x14 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x14 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x14 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x14 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x14 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x14 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x14 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x14 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x14 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x14 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x14 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x14 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x18 "C1MKR8,CAN1 Mask Register 8" bitfld.long 0x18 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x18 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x18 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x18 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x18 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x18 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x18 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x18 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x18 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x18 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x18 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x18 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x18 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x18 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x18 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x18 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x18 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x18 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x18 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x18 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x18 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x18 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x18 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x18 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x18 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x18 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x18 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x18 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x18 0. ",Extended ID Bit 0" "0,1" group.long 0x400++0x1f line.long 0x1C "C1MKR9,CAN1 Mask Register 9" bitfld.long 0x1C 28. " SID[10:0] ,Standard ID Bit 10" "0,1" bitfld.long 0x1C 27. ",Standard ID Bit 9" "0,1" bitfld.long 0x1C 26. ",Standard ID Bit 8" "0,1" bitfld.long 0x1C 25. ",Standard ID Bit 7" "0,1" bitfld.long 0x1C 24. ",Standard ID Bit 6" "0,1" bitfld.long 0x1C 23. ",Standard ID Bit 5" "0,1" bitfld.long 0x1C 22. ",Standard ID Bit 4" "0,1" bitfld.long 0x1C 21. ",Standard ID Bit 3" "0,1" bitfld.long 0x1C 20. ",Standard ID Bit 2" "0,1" bitfld.long 0x1C 19. ",Standard ID Bit 1" "0,1" bitfld.long 0x1C 18. ",Standard ID Bit 0" "0,1" textline " " bitfld.long 0x1C 17. " EID[17:0] ,Extended ID Bit 17" "0,1" bitfld.long 0x1C 16. ",Extended ID Bit 16" "0,1" bitfld.long 0x1C 15. ",Extended ID Bit 15" "0,1" bitfld.long 0x1C 14. ",Extended ID Bit 14" "0,1" bitfld.long 0x1C 13. ",Extended ID Bit 13" "0,1" bitfld.long 0x1C 12. ",Extended ID Bit 12" "0,1" bitfld.long 0x1C 11. ",Extended ID Bit 11" "0,1" bitfld.long 0x1C 10. ",Extended ID Bit 10" "0,1" bitfld.long 0x1C 9. ",Extended ID Bit 9" "0,1" bitfld.long 0x1C 8. ",Extended ID Bit 8" "0,1" bitfld.long 0x1C 7. ",Extended ID Bit 7" "0,1" bitfld.long 0x1C 6. ",Extended ID Bit 6" "0,1" bitfld.long 0x1C 5. ",Extended ID Bit 5" "0,1" bitfld.long 0x1C 4. ",Extended ID Bit 4" "0,1" bitfld.long 0x1C 3. ",Extended ID Bit 3" "0,1" bitfld.long 0x1C 2. ",Extended ID Bit 2" "0,1" bitfld.long 0x1C 1. ",Extended ID Bit 1" "0,1" bitfld.long 0x1C 0. ",Extended ID Bit 0" "0,1" else hgroup.long 0x430++0x07 hide.long 0x0 "C1MKR0,CAN1 Mask Register 0" hide.long 0x4 "C1MKR1,CAN1 Mask Register 1" hgroup.long 0x400++0x1f hide.long 0x0 "C1MKR2,CAN1 Mask Register 2" hgroup.long 0x400++0x1f hide.long 0x4 "C1MKR3,CAN1 Mask Register 3" hgroup.long 0x400++0x1f hide.long 0x8 "C1MKR4,CAN1 Mask Register 4" hgroup.long 0x400++0x1f hide.long 0xC "C1MKR5,CAN1 Mask Register 5" hgroup.long 0x400++0x1f hide.long 0x10 "C1MKR6,CAN1 Mask Register 6" hgroup.long 0x400++0x1f hide.long 0x14 "C1MKR7,CAN1 Mask Register 7" hgroup.long 0x400++0x1f hide.long 0x18 "C1MKR8,CAN1 Mask Register 8" hgroup.long 0x400++0x1f hide.long 0x1C "C1MKR9,CAN1 Mask Register 9" endif textline " " width 12. if ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x420))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2))) group.long 0x420++0x03 line.long 0x0 "C1FIDCR0,CAN1 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x420))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0))) group.long 0x420++0x03 line.long 0x0 "C1FIDCR0,CAN1 FIFO Received ID Compare Register 0" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x420++0x03 hide.long 0x0 "C1FIDCR0,CAN1 FIFO Received ID Compare Register 0" endif if ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x424))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2))) group.long 0x424++0x03 line.long 0x0 "C1FIDCR1,CAN1 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" elif ((((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)&&(((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x424))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0))) group.long 0x424++0x03 line.long 0x0 "C1FIDCR1,CAN1 FIFO Received ID Compare Register 1" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" else hgroup.long 0x424++0x03 hide.long 0x0 "C1FIDCR1,CAN1 FIFO Received ID Compare Register 1" endif group.long 0x428++0x03 line.long 0x0 "C1MKIVLR1,CAN1 Mask Invalid Register 1" bitfld.long 0x00 31. " MBMV_63 ,Mask valid for mailbox 63" "Valid,Invalid" bitfld.long 0x00 30. " MBMV_62 ,Mask valid for mailbox 62" "Valid,Invalid" bitfld.long 0x00 29. " MBMV_61 ,Mask valid for mailbox 61" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV_60 ,Mask valid for mailbox 60" "Valid,Invalid" bitfld.long 0x00 27. " MBMV_59 ,Mask valid for mailbox 59" "Valid,Invalid" bitfld.long 0x00 26. " MBMV_58 ,Mask valid for mailbox 58" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV_57 ,Mask valid for mailbox 57" "Valid,Invalid" bitfld.long 0x00 24. " MBMV_56 ,Mask valid for mailbox 56" "Valid,Invalid" bitfld.long 0x00 23. " MBMV_55 ,Mask valid for mailbox 55" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV_54 ,Mask valid for mailbox 54" "Valid,Invalid" bitfld.long 0x00 21. " MBMV_53 ,Mask valid for mailbox 53" "Valid,Invalid" bitfld.long 0x00 20. " MBMV_52 ,Mask valid for mailbox 52" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV_51 ,Mask valid for mailbox 51" "Valid,Invalid" bitfld.long 0x00 18. " MBMV_50 ,Mask valid for mailbox 50" "Valid,Invalid" bitfld.long 0x00 17. " MBMV_49 ,Mask valid for mailbox 49" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV_48 ,Mask valid for mailbox 48" "Valid,Invalid" bitfld.long 0x00 15. " MBMV_47 ,Mask valid for mailbox 47" "Valid,Invalid" bitfld.long 0x00 14. " MBMV_46 ,Mask valid for mailbox 46" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV_45 ,Mask valid for mailbox 45" "Valid,Invalid" bitfld.long 0x00 12. " MBMV_44 ,Mask valid for mailbox 44" "Valid,Invalid" bitfld.long 0x00 11. " MBMV_43 ,Mask valid for mailbox 43" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV_42 ,Mask valid for mailbox 42" "Valid,Invalid" bitfld.long 0x00 9. " MBMV_41 ,Mask valid for mailbox 41" "Valid,Invalid" bitfld.long 0x00 8. " MBMV_40 ,Mask valid for mailbox 40" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV_39 ,Mask valid for mailbox 39" "Valid,Invalid" bitfld.long 0x00 6. " MBMV_38 ,Mask valid for mailbox 38" "Valid,Invalid" bitfld.long 0x00 5. " MBMV_37 ,Mask valid for mailbox 37" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV_36 ,Mask valid for mailbox 36" "Valid,Invalid" bitfld.long 0x00 3. " MBMV_35 ,Mask valid for mailbox 35" "Valid,Invalid" bitfld.long 0x00 2. " MBMV_34 ,Mask valid for mailbox 34" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV_33 ,Mask valid for mailbox 33" "Valid,Invalid" bitfld.long 0x00 0. " MBMV_32 ,Mask valid for mailbox 32" "Valid,Invalid" group.long 0x438++0x03 line.long 0x0 "C1MKIVLR0,CAN1 Mask Invalid Register 0" bitfld.long 0x00 31. " MBMV_31 ,Mask valid for mailbox 31" "Valid,Invalid" bitfld.long 0x00 30. " MBMV_30 ,Mask valid for mailbox 30" "Valid,Invalid" bitfld.long 0x00 29. " MBMV_29 ,Mask valid for mailbox 29" "Valid,Invalid" textline " " bitfld.long 0x00 28. " MBMV_28 ,Mask valid for mailbox 28" "Valid,Invalid" bitfld.long 0x00 27. " MBMV_27 ,Mask valid for mailbox 27" "Valid,Invalid" bitfld.long 0x00 26. " MBMV_26 ,Mask valid for mailbox 26" "Valid,Invalid" textline " " bitfld.long 0x00 25. " MBMV_25 ,Mask valid for mailbox 25" "Valid,Invalid" bitfld.long 0x00 24. " MBMV_24 ,Mask valid for mailbox 24" "Valid,Invalid" bitfld.long 0x00 23. " MBMV_23 ,Mask valid for mailbox 23" "Valid,Invalid" textline " " bitfld.long 0x00 22. " MBMV_22 ,Mask valid for mailbox 22" "Valid,Invalid" bitfld.long 0x00 21. " MBMV_21 ,Mask valid for mailbox 21" "Valid,Invalid" bitfld.long 0x00 20. " MBMV_20 ,Mask valid for mailbox 20" "Valid,Invalid" textline " " bitfld.long 0x00 19. " MBMV_19 ,Mask valid for mailbox 19" "Valid,Invalid" bitfld.long 0x00 18. " MBMV_18 ,Mask valid for mailbox 18" "Valid,Invalid" bitfld.long 0x00 17. " MBMV_17 ,Mask valid for mailbox 17" "Valid,Invalid" textline " " bitfld.long 0x00 16. " MBMV_16 ,Mask valid for mailbox 16" "Valid,Invalid" bitfld.long 0x00 15. " MBMV_15 ,Mask valid for mailbox 15" "Valid,Invalid" bitfld.long 0x00 14. " MBMV_14 ,Mask valid for mailbox 14" "Valid,Invalid" textline " " bitfld.long 0x00 13. " MBMV_13 ,Mask valid for mailbox 13" "Valid,Invalid" bitfld.long 0x00 12. " MBMV_12 ,Mask valid for mailbox 12" "Valid,Invalid" bitfld.long 0x00 11. " MBMV_11 ,Mask valid for mailbox 11" "Valid,Invalid" textline " " bitfld.long 0x00 10. " MBMV_10 ,Mask valid for mailbox 10" "Valid,Invalid" bitfld.long 0x00 9. " MBMV_9 ,Mask valid for mailbox 9" "Valid,Invalid" bitfld.long 0x00 8. " MBMV_8 ,Mask valid for mailbox 8" "Valid,Invalid" textline " " bitfld.long 0x00 7. " MBMV_7 ,Mask valid for mailbox 7" "Valid,Invalid" bitfld.long 0x00 6. " MBMV_6 ,Mask valid for mailbox 6" "Valid,Invalid" bitfld.long 0x00 5. " MBMV_5 ,Mask valid for mailbox 5" "Valid,Invalid" textline " " bitfld.long 0x00 4. " MBMV_4 ,Mask valid for mailbox 4" "Valid,Invalid" bitfld.long 0x00 3. " MBMV_3 ,Mask valid for mailbox 3" "Valid,Invalid" bitfld.long 0x00 2. " MBMV_2 ,Mask valid for mailbox 2" "Valid,Invalid" textline " " bitfld.long 0x00 1. " MBMV_1 ,Mask valid for mailbox 1" "Valid,Invalid" bitfld.long 0x00 0. " MBMV_0 ,Mask valid for mailbox 0" "Valid,Invalid" tree.open "CAN Mailbox Registers" tree "Mailbox 63-0" tree "Mailbox 63" if (((63.==60.)||(63.==61.)||(63.==62.)||(63.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x0++0x03 hide.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x0++0x03 line.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x0++0x03 line.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x0++0x03 hide.long 0x00 "C1MB63_ID,CAN1 Mailbox 63 Register" endif group.word (0x0+0x04)++0x1 line.word 0x00 "C1MB63_DLC,CAN1 Mailbox 63 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x0+0x06)++0x07 line.byte 0x00 "C1MB63_D0,CAN1 Mailbox 63 Data byte 0 Register" line.byte 0x01 "C1MB63_D1,CAN1 Mailbox 63 Data byte 1 Register" line.byte 0x02 "C1MB63_D2,CAN1 Mailbox 63 Data byte 2 Register" line.byte 0x03 "C1MB63_D3,CAN1 Mailbox 63 Data byte 3 Register" line.byte 0x04 "C1MB63_D4,CAN1 Mailbox 63 Data byte 4 Register" line.byte 0x05 "C1MB63_D5,CAN1 Mailbox 63 Data byte 5 Register" line.byte 0x06 "C1MB63_D6,CAN1 Mailbox 63 Data byte 6 Register" line.byte 0x07 "C1MB63_D7,CAN1 Mailbox 63 Data byte 7 Register" group.word (0x0+0x0e)++0x01 line.word 0x00 "C1MB63_TS,CAN1 Mailbox 63 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 62" if (((62.==60.)||(62.==61.)||(62.==62.)||(62.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x10++0x03 hide.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x10))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x10++0x03 line.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x10))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x10++0x03 line.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x10++0x03 hide.long 0x00 "C1MB62_ID,CAN1 Mailbox 62 Register" endif group.word (0x10+0x04)++0x1 line.word 0x00 "C1MB62_DLC,CAN1 Mailbox 62 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x10+0x06)++0x07 line.byte 0x00 "C1MB62_D0,CAN1 Mailbox 62 Data byte 0 Register" line.byte 0x01 "C1MB62_D1,CAN1 Mailbox 62 Data byte 1 Register" line.byte 0x02 "C1MB62_D2,CAN1 Mailbox 62 Data byte 2 Register" line.byte 0x03 "C1MB62_D3,CAN1 Mailbox 62 Data byte 3 Register" line.byte 0x04 "C1MB62_D4,CAN1 Mailbox 62 Data byte 4 Register" line.byte 0x05 "C1MB62_D5,CAN1 Mailbox 62 Data byte 5 Register" line.byte 0x06 "C1MB62_D6,CAN1 Mailbox 62 Data byte 6 Register" line.byte 0x07 "C1MB62_D7,CAN1 Mailbox 62 Data byte 7 Register" group.word (0x10+0x0e)++0x01 line.word 0x00 "C1MB62_TS,CAN1 Mailbox 62 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 61" if (((61.==60.)||(61.==61.)||(61.==62.)||(61.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x20++0x03 hide.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x20))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x20++0x03 line.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x20))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x20++0x03 line.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x20++0x03 hide.long 0x00 "C1MB61_ID,CAN1 Mailbox 61 Register" endif group.word (0x20+0x04)++0x1 line.word 0x00 "C1MB61_DLC,CAN1 Mailbox 61 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x20+0x06)++0x07 line.byte 0x00 "C1MB61_D0,CAN1 Mailbox 61 Data byte 0 Register" line.byte 0x01 "C1MB61_D1,CAN1 Mailbox 61 Data byte 1 Register" line.byte 0x02 "C1MB61_D2,CAN1 Mailbox 61 Data byte 2 Register" line.byte 0x03 "C1MB61_D3,CAN1 Mailbox 61 Data byte 3 Register" line.byte 0x04 "C1MB61_D4,CAN1 Mailbox 61 Data byte 4 Register" line.byte 0x05 "C1MB61_D5,CAN1 Mailbox 61 Data byte 5 Register" line.byte 0x06 "C1MB61_D6,CAN1 Mailbox 61 Data byte 6 Register" line.byte 0x07 "C1MB61_D7,CAN1 Mailbox 61 Data byte 7 Register" group.word (0x20+0x0e)++0x01 line.word 0x00 "C1MB61_TS,CAN1 Mailbox 61 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 60" if (((60.==60.)||(60.==61.)||(60.==62.)||(60.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x30++0x03 hide.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x30))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x30++0x03 line.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x30))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x30++0x03 line.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x30++0x03 hide.long 0x00 "C1MB60_ID,CAN1 Mailbox 60 Register" endif group.word (0x30+0x04)++0x1 line.word 0x00 "C1MB60_DLC,CAN1 Mailbox 60 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x30+0x06)++0x07 line.byte 0x00 "C1MB60_D0,CAN1 Mailbox 60 Data byte 0 Register" line.byte 0x01 "C1MB60_D1,CAN1 Mailbox 60 Data byte 1 Register" line.byte 0x02 "C1MB60_D2,CAN1 Mailbox 60 Data byte 2 Register" line.byte 0x03 "C1MB60_D3,CAN1 Mailbox 60 Data byte 3 Register" line.byte 0x04 "C1MB60_D4,CAN1 Mailbox 60 Data byte 4 Register" line.byte 0x05 "C1MB60_D5,CAN1 Mailbox 60 Data byte 5 Register" line.byte 0x06 "C1MB60_D6,CAN1 Mailbox 60 Data byte 6 Register" line.byte 0x07 "C1MB60_D7,CAN1 Mailbox 60 Data byte 7 Register" group.word (0x30+0x0e)++0x01 line.word 0x00 "C1MB60_TS,CAN1 Mailbox 60 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 59" if (((59.==60.)||(59.==61.)||(59.==62.)||(59.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x40++0x03 hide.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x40))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x40++0x03 line.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x40))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x40++0x03 line.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x40++0x03 hide.long 0x00 "C1MB59_ID,CAN1 Mailbox 59 Register" endif group.word (0x40+0x04)++0x1 line.word 0x00 "C1MB59_DLC,CAN1 Mailbox 59 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x40+0x06)++0x07 line.byte 0x00 "C1MB59_D0,CAN1 Mailbox 59 Data byte 0 Register" line.byte 0x01 "C1MB59_D1,CAN1 Mailbox 59 Data byte 1 Register" line.byte 0x02 "C1MB59_D2,CAN1 Mailbox 59 Data byte 2 Register" line.byte 0x03 "C1MB59_D3,CAN1 Mailbox 59 Data byte 3 Register" line.byte 0x04 "C1MB59_D4,CAN1 Mailbox 59 Data byte 4 Register" line.byte 0x05 "C1MB59_D5,CAN1 Mailbox 59 Data byte 5 Register" line.byte 0x06 "C1MB59_D6,CAN1 Mailbox 59 Data byte 6 Register" line.byte 0x07 "C1MB59_D7,CAN1 Mailbox 59 Data byte 7 Register" group.word (0x40+0x0e)++0x01 line.word 0x00 "C1MB59_TS,CAN1 Mailbox 59 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 58" if (((58.==60.)||(58.==61.)||(58.==62.)||(58.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x50++0x03 hide.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x50))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x50++0x03 line.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x50))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x50++0x03 line.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x50++0x03 hide.long 0x00 "C1MB58_ID,CAN1 Mailbox 58 Register" endif group.word (0x50+0x04)++0x1 line.word 0x00 "C1MB58_DLC,CAN1 Mailbox 58 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x50+0x06)++0x07 line.byte 0x00 "C1MB58_D0,CAN1 Mailbox 58 Data byte 0 Register" line.byte 0x01 "C1MB58_D1,CAN1 Mailbox 58 Data byte 1 Register" line.byte 0x02 "C1MB58_D2,CAN1 Mailbox 58 Data byte 2 Register" line.byte 0x03 "C1MB58_D3,CAN1 Mailbox 58 Data byte 3 Register" line.byte 0x04 "C1MB58_D4,CAN1 Mailbox 58 Data byte 4 Register" line.byte 0x05 "C1MB58_D5,CAN1 Mailbox 58 Data byte 5 Register" line.byte 0x06 "C1MB58_D6,CAN1 Mailbox 58 Data byte 6 Register" line.byte 0x07 "C1MB58_D7,CAN1 Mailbox 58 Data byte 7 Register" group.word (0x50+0x0e)++0x01 line.word 0x00 "C1MB58_TS,CAN1 Mailbox 58 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 57" if (((57.==60.)||(57.==61.)||(57.==62.)||(57.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x60++0x03 hide.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x60))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x60++0x03 line.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x60))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x60++0x03 line.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x60++0x03 hide.long 0x00 "C1MB57_ID,CAN1 Mailbox 57 Register" endif group.word (0x60+0x04)++0x1 line.word 0x00 "C1MB57_DLC,CAN1 Mailbox 57 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x60+0x06)++0x07 line.byte 0x00 "C1MB57_D0,CAN1 Mailbox 57 Data byte 0 Register" line.byte 0x01 "C1MB57_D1,CAN1 Mailbox 57 Data byte 1 Register" line.byte 0x02 "C1MB57_D2,CAN1 Mailbox 57 Data byte 2 Register" line.byte 0x03 "C1MB57_D3,CAN1 Mailbox 57 Data byte 3 Register" line.byte 0x04 "C1MB57_D4,CAN1 Mailbox 57 Data byte 4 Register" line.byte 0x05 "C1MB57_D5,CAN1 Mailbox 57 Data byte 5 Register" line.byte 0x06 "C1MB57_D6,CAN1 Mailbox 57 Data byte 6 Register" line.byte 0x07 "C1MB57_D7,CAN1 Mailbox 57 Data byte 7 Register" group.word (0x60+0x0e)++0x01 line.word 0x00 "C1MB57_TS,CAN1 Mailbox 57 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 56" if (((56.==60.)||(56.==61.)||(56.==62.)||(56.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x70++0x03 hide.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x70))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x70++0x03 line.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x70))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x70++0x03 line.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x70++0x03 hide.long 0x00 "C1MB56_ID,CAN1 Mailbox 56 Register" endif group.word (0x70+0x04)++0x1 line.word 0x00 "C1MB56_DLC,CAN1 Mailbox 56 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x70+0x06)++0x07 line.byte 0x00 "C1MB56_D0,CAN1 Mailbox 56 Data byte 0 Register" line.byte 0x01 "C1MB56_D1,CAN1 Mailbox 56 Data byte 1 Register" line.byte 0x02 "C1MB56_D2,CAN1 Mailbox 56 Data byte 2 Register" line.byte 0x03 "C1MB56_D3,CAN1 Mailbox 56 Data byte 3 Register" line.byte 0x04 "C1MB56_D4,CAN1 Mailbox 56 Data byte 4 Register" line.byte 0x05 "C1MB56_D5,CAN1 Mailbox 56 Data byte 5 Register" line.byte 0x06 "C1MB56_D6,CAN1 Mailbox 56 Data byte 6 Register" line.byte 0x07 "C1MB56_D7,CAN1 Mailbox 56 Data byte 7 Register" group.word (0x70+0x0e)++0x01 line.word 0x00 "C1MB56_TS,CAN1 Mailbox 56 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 55" if (((55.==60.)||(55.==61.)||(55.==62.)||(55.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x80++0x03 hide.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x80))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x80++0x03 line.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x80))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x80++0x03 line.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x80++0x03 hide.long 0x00 "C1MB55_ID,CAN1 Mailbox 55 Register" endif group.word (0x80+0x04)++0x1 line.word 0x00 "C1MB55_DLC,CAN1 Mailbox 55 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x80+0x06)++0x07 line.byte 0x00 "C1MB55_D0,CAN1 Mailbox 55 Data byte 0 Register" line.byte 0x01 "C1MB55_D1,CAN1 Mailbox 55 Data byte 1 Register" line.byte 0x02 "C1MB55_D2,CAN1 Mailbox 55 Data byte 2 Register" line.byte 0x03 "C1MB55_D3,CAN1 Mailbox 55 Data byte 3 Register" line.byte 0x04 "C1MB55_D4,CAN1 Mailbox 55 Data byte 4 Register" line.byte 0x05 "C1MB55_D5,CAN1 Mailbox 55 Data byte 5 Register" line.byte 0x06 "C1MB55_D6,CAN1 Mailbox 55 Data byte 6 Register" line.byte 0x07 "C1MB55_D7,CAN1 Mailbox 55 Data byte 7 Register" group.word (0x80+0x0e)++0x01 line.word 0x00 "C1MB55_TS,CAN1 Mailbox 55 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 54" if (((54.==60.)||(54.==61.)||(54.==62.)||(54.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x90++0x03 hide.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x90))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x90++0x03 line.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x90))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x90++0x03 line.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x90++0x03 hide.long 0x00 "C1MB54_ID,CAN1 Mailbox 54 Register" endif group.word (0x90+0x04)++0x1 line.word 0x00 "C1MB54_DLC,CAN1 Mailbox 54 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x90+0x06)++0x07 line.byte 0x00 "C1MB54_D0,CAN1 Mailbox 54 Data byte 0 Register" line.byte 0x01 "C1MB54_D1,CAN1 Mailbox 54 Data byte 1 Register" line.byte 0x02 "C1MB54_D2,CAN1 Mailbox 54 Data byte 2 Register" line.byte 0x03 "C1MB54_D3,CAN1 Mailbox 54 Data byte 3 Register" line.byte 0x04 "C1MB54_D4,CAN1 Mailbox 54 Data byte 4 Register" line.byte 0x05 "C1MB54_D5,CAN1 Mailbox 54 Data byte 5 Register" line.byte 0x06 "C1MB54_D6,CAN1 Mailbox 54 Data byte 6 Register" line.byte 0x07 "C1MB54_D7,CAN1 Mailbox 54 Data byte 7 Register" group.word (0x90+0x0e)++0x01 line.word 0x00 "C1MB54_TS,CAN1 Mailbox 54 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 53" if (((53.==60.)||(53.==61.)||(53.==62.)||(53.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xA0++0x03 hide.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xA0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xA0++0x03 line.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xA0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xA0++0x03 line.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xA0++0x03 hide.long 0x00 "C1MB53_ID,CAN1 Mailbox 53 Register" endif group.word (0xA0+0x04)++0x1 line.word 0x00 "C1MB53_DLC,CAN1 Mailbox 53 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xA0+0x06)++0x07 line.byte 0x00 "C1MB53_D0,CAN1 Mailbox 53 Data byte 0 Register" line.byte 0x01 "C1MB53_D1,CAN1 Mailbox 53 Data byte 1 Register" line.byte 0x02 "C1MB53_D2,CAN1 Mailbox 53 Data byte 2 Register" line.byte 0x03 "C1MB53_D3,CAN1 Mailbox 53 Data byte 3 Register" line.byte 0x04 "C1MB53_D4,CAN1 Mailbox 53 Data byte 4 Register" line.byte 0x05 "C1MB53_D5,CAN1 Mailbox 53 Data byte 5 Register" line.byte 0x06 "C1MB53_D6,CAN1 Mailbox 53 Data byte 6 Register" line.byte 0x07 "C1MB53_D7,CAN1 Mailbox 53 Data byte 7 Register" group.word (0xA0+0x0e)++0x01 line.word 0x00 "C1MB53_TS,CAN1 Mailbox 53 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 52" if (((52.==60.)||(52.==61.)||(52.==62.)||(52.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xB0++0x03 hide.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xB0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xB0++0x03 line.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xB0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xB0++0x03 line.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xB0++0x03 hide.long 0x00 "C1MB52_ID,CAN1 Mailbox 52 Register" endif group.word (0xB0+0x04)++0x1 line.word 0x00 "C1MB52_DLC,CAN1 Mailbox 52 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xB0+0x06)++0x07 line.byte 0x00 "C1MB52_D0,CAN1 Mailbox 52 Data byte 0 Register" line.byte 0x01 "C1MB52_D1,CAN1 Mailbox 52 Data byte 1 Register" line.byte 0x02 "C1MB52_D2,CAN1 Mailbox 52 Data byte 2 Register" line.byte 0x03 "C1MB52_D3,CAN1 Mailbox 52 Data byte 3 Register" line.byte 0x04 "C1MB52_D4,CAN1 Mailbox 52 Data byte 4 Register" line.byte 0x05 "C1MB52_D5,CAN1 Mailbox 52 Data byte 5 Register" line.byte 0x06 "C1MB52_D6,CAN1 Mailbox 52 Data byte 6 Register" line.byte 0x07 "C1MB52_D7,CAN1 Mailbox 52 Data byte 7 Register" group.word (0xB0+0x0e)++0x01 line.word 0x00 "C1MB52_TS,CAN1 Mailbox 52 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 51" if (((51.==60.)||(51.==61.)||(51.==62.)||(51.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xC0++0x03 hide.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xC0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xC0++0x03 line.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xC0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xC0++0x03 line.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xC0++0x03 hide.long 0x00 "C1MB51_ID,CAN1 Mailbox 51 Register" endif group.word (0xC0+0x04)++0x1 line.word 0x00 "C1MB51_DLC,CAN1 Mailbox 51 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xC0+0x06)++0x07 line.byte 0x00 "C1MB51_D0,CAN1 Mailbox 51 Data byte 0 Register" line.byte 0x01 "C1MB51_D1,CAN1 Mailbox 51 Data byte 1 Register" line.byte 0x02 "C1MB51_D2,CAN1 Mailbox 51 Data byte 2 Register" line.byte 0x03 "C1MB51_D3,CAN1 Mailbox 51 Data byte 3 Register" line.byte 0x04 "C1MB51_D4,CAN1 Mailbox 51 Data byte 4 Register" line.byte 0x05 "C1MB51_D5,CAN1 Mailbox 51 Data byte 5 Register" line.byte 0x06 "C1MB51_D6,CAN1 Mailbox 51 Data byte 6 Register" line.byte 0x07 "C1MB51_D7,CAN1 Mailbox 51 Data byte 7 Register" group.word (0xC0+0x0e)++0x01 line.word 0x00 "C1MB51_TS,CAN1 Mailbox 51 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 50" if (((50.==60.)||(50.==61.)||(50.==62.)||(50.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xD0++0x03 hide.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xD0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xD0++0x03 line.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xD0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xD0++0x03 line.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xD0++0x03 hide.long 0x00 "C1MB50_ID,CAN1 Mailbox 50 Register" endif group.word (0xD0+0x04)++0x1 line.word 0x00 "C1MB50_DLC,CAN1 Mailbox 50 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xD0+0x06)++0x07 line.byte 0x00 "C1MB50_D0,CAN1 Mailbox 50 Data byte 0 Register" line.byte 0x01 "C1MB50_D1,CAN1 Mailbox 50 Data byte 1 Register" line.byte 0x02 "C1MB50_D2,CAN1 Mailbox 50 Data byte 2 Register" line.byte 0x03 "C1MB50_D3,CAN1 Mailbox 50 Data byte 3 Register" line.byte 0x04 "C1MB50_D4,CAN1 Mailbox 50 Data byte 4 Register" line.byte 0x05 "C1MB50_D5,CAN1 Mailbox 50 Data byte 5 Register" line.byte 0x06 "C1MB50_D6,CAN1 Mailbox 50 Data byte 6 Register" line.byte 0x07 "C1MB50_D7,CAN1 Mailbox 50 Data byte 7 Register" group.word (0xD0+0x0e)++0x01 line.word 0x00 "C1MB50_TS,CAN1 Mailbox 50 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 49" if (((49.==60.)||(49.==61.)||(49.==62.)||(49.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xE0++0x03 hide.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xE0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xE0++0x03 line.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xE0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xE0++0x03 line.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xE0++0x03 hide.long 0x00 "C1MB49_ID,CAN1 Mailbox 49 Register" endif group.word (0xE0+0x04)++0x1 line.word 0x00 "C1MB49_DLC,CAN1 Mailbox 49 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xE0+0x06)++0x07 line.byte 0x00 "C1MB49_D0,CAN1 Mailbox 49 Data byte 0 Register" line.byte 0x01 "C1MB49_D1,CAN1 Mailbox 49 Data byte 1 Register" line.byte 0x02 "C1MB49_D2,CAN1 Mailbox 49 Data byte 2 Register" line.byte 0x03 "C1MB49_D3,CAN1 Mailbox 49 Data byte 3 Register" line.byte 0x04 "C1MB49_D4,CAN1 Mailbox 49 Data byte 4 Register" line.byte 0x05 "C1MB49_D5,CAN1 Mailbox 49 Data byte 5 Register" line.byte 0x06 "C1MB49_D6,CAN1 Mailbox 49 Data byte 6 Register" line.byte 0x07 "C1MB49_D7,CAN1 Mailbox 49 Data byte 7 Register" group.word (0xE0+0x0e)++0x01 line.word 0x00 "C1MB49_TS,CAN1 Mailbox 49 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 48" if (((48.==60.)||(48.==61.)||(48.==62.)||(48.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0xF0++0x03 hide.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xF0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0xF0++0x03 line.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0xF0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0xF0++0x03 line.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0xF0++0x03 hide.long 0x00 "C1MB48_ID,CAN1 Mailbox 48 Register" endif group.word (0xF0+0x04)++0x1 line.word 0x00 "C1MB48_DLC,CAN1 Mailbox 48 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0xF0+0x06)++0x07 line.byte 0x00 "C1MB48_D0,CAN1 Mailbox 48 Data byte 0 Register" line.byte 0x01 "C1MB48_D1,CAN1 Mailbox 48 Data byte 1 Register" line.byte 0x02 "C1MB48_D2,CAN1 Mailbox 48 Data byte 2 Register" line.byte 0x03 "C1MB48_D3,CAN1 Mailbox 48 Data byte 3 Register" line.byte 0x04 "C1MB48_D4,CAN1 Mailbox 48 Data byte 4 Register" line.byte 0x05 "C1MB48_D5,CAN1 Mailbox 48 Data byte 5 Register" line.byte 0x06 "C1MB48_D6,CAN1 Mailbox 48 Data byte 6 Register" line.byte 0x07 "C1MB48_D7,CAN1 Mailbox 48 Data byte 7 Register" group.word (0xF0+0x0e)++0x01 line.word 0x00 "C1MB48_TS,CAN1 Mailbox 48 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 47" if (((47.==60.)||(47.==61.)||(47.==62.)||(47.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x100++0x03 hide.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x100))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x100++0x03 line.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x100))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x100++0x03 line.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x100++0x03 hide.long 0x00 "C1MB47_ID,CAN1 Mailbox 47 Register" endif group.word (0x100+0x04)++0x1 line.word 0x00 "C1MB47_DLC,CAN1 Mailbox 47 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x100+0x06)++0x07 line.byte 0x00 "C1MB47_D0,CAN1 Mailbox 47 Data byte 0 Register" line.byte 0x01 "C1MB47_D1,CAN1 Mailbox 47 Data byte 1 Register" line.byte 0x02 "C1MB47_D2,CAN1 Mailbox 47 Data byte 2 Register" line.byte 0x03 "C1MB47_D3,CAN1 Mailbox 47 Data byte 3 Register" line.byte 0x04 "C1MB47_D4,CAN1 Mailbox 47 Data byte 4 Register" line.byte 0x05 "C1MB47_D5,CAN1 Mailbox 47 Data byte 5 Register" line.byte 0x06 "C1MB47_D6,CAN1 Mailbox 47 Data byte 6 Register" line.byte 0x07 "C1MB47_D7,CAN1 Mailbox 47 Data byte 7 Register" group.word (0x100+0x0e)++0x01 line.word 0x00 "C1MB47_TS,CAN1 Mailbox 47 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 46" if (((46.==60.)||(46.==61.)||(46.==62.)||(46.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x110++0x03 hide.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x110))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x110++0x03 line.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x110))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x110++0x03 line.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x110++0x03 hide.long 0x00 "C1MB46_ID,CAN1 Mailbox 46 Register" endif group.word (0x110+0x04)++0x1 line.word 0x00 "C1MB46_DLC,CAN1 Mailbox 46 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x110+0x06)++0x07 line.byte 0x00 "C1MB46_D0,CAN1 Mailbox 46 Data byte 0 Register" line.byte 0x01 "C1MB46_D1,CAN1 Mailbox 46 Data byte 1 Register" line.byte 0x02 "C1MB46_D2,CAN1 Mailbox 46 Data byte 2 Register" line.byte 0x03 "C1MB46_D3,CAN1 Mailbox 46 Data byte 3 Register" line.byte 0x04 "C1MB46_D4,CAN1 Mailbox 46 Data byte 4 Register" line.byte 0x05 "C1MB46_D5,CAN1 Mailbox 46 Data byte 5 Register" line.byte 0x06 "C1MB46_D6,CAN1 Mailbox 46 Data byte 6 Register" line.byte 0x07 "C1MB46_D7,CAN1 Mailbox 46 Data byte 7 Register" group.word (0x110+0x0e)++0x01 line.word 0x00 "C1MB46_TS,CAN1 Mailbox 46 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 45" if (((45.==60.)||(45.==61.)||(45.==62.)||(45.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x120++0x03 hide.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x120))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x120++0x03 line.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x120))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x120++0x03 line.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x120++0x03 hide.long 0x00 "C1MB45_ID,CAN1 Mailbox 45 Register" endif group.word (0x120+0x04)++0x1 line.word 0x00 "C1MB45_DLC,CAN1 Mailbox 45 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x120+0x06)++0x07 line.byte 0x00 "C1MB45_D0,CAN1 Mailbox 45 Data byte 0 Register" line.byte 0x01 "C1MB45_D1,CAN1 Mailbox 45 Data byte 1 Register" line.byte 0x02 "C1MB45_D2,CAN1 Mailbox 45 Data byte 2 Register" line.byte 0x03 "C1MB45_D3,CAN1 Mailbox 45 Data byte 3 Register" line.byte 0x04 "C1MB45_D4,CAN1 Mailbox 45 Data byte 4 Register" line.byte 0x05 "C1MB45_D5,CAN1 Mailbox 45 Data byte 5 Register" line.byte 0x06 "C1MB45_D6,CAN1 Mailbox 45 Data byte 6 Register" line.byte 0x07 "C1MB45_D7,CAN1 Mailbox 45 Data byte 7 Register" group.word (0x120+0x0e)++0x01 line.word 0x00 "C1MB45_TS,CAN1 Mailbox 45 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 44" if (((44.==60.)||(44.==61.)||(44.==62.)||(44.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x130++0x03 hide.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x130))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x130++0x03 line.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x130))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x130++0x03 line.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x130++0x03 hide.long 0x00 "C1MB44_ID,CAN1 Mailbox 44 Register" endif group.word (0x130+0x04)++0x1 line.word 0x00 "C1MB44_DLC,CAN1 Mailbox 44 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x130+0x06)++0x07 line.byte 0x00 "C1MB44_D0,CAN1 Mailbox 44 Data byte 0 Register" line.byte 0x01 "C1MB44_D1,CAN1 Mailbox 44 Data byte 1 Register" line.byte 0x02 "C1MB44_D2,CAN1 Mailbox 44 Data byte 2 Register" line.byte 0x03 "C1MB44_D3,CAN1 Mailbox 44 Data byte 3 Register" line.byte 0x04 "C1MB44_D4,CAN1 Mailbox 44 Data byte 4 Register" line.byte 0x05 "C1MB44_D5,CAN1 Mailbox 44 Data byte 5 Register" line.byte 0x06 "C1MB44_D6,CAN1 Mailbox 44 Data byte 6 Register" line.byte 0x07 "C1MB44_D7,CAN1 Mailbox 44 Data byte 7 Register" group.word (0x130+0x0e)++0x01 line.word 0x00 "C1MB44_TS,CAN1 Mailbox 44 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 43" if (((43.==60.)||(43.==61.)||(43.==62.)||(43.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x140++0x03 hide.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x140))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x140++0x03 line.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x140))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x140++0x03 line.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x140++0x03 hide.long 0x00 "C1MB43_ID,CAN1 Mailbox 43 Register" endif group.word (0x140+0x04)++0x1 line.word 0x00 "C1MB43_DLC,CAN1 Mailbox 43 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x140+0x06)++0x07 line.byte 0x00 "C1MB43_D0,CAN1 Mailbox 43 Data byte 0 Register" line.byte 0x01 "C1MB43_D1,CAN1 Mailbox 43 Data byte 1 Register" line.byte 0x02 "C1MB43_D2,CAN1 Mailbox 43 Data byte 2 Register" line.byte 0x03 "C1MB43_D3,CAN1 Mailbox 43 Data byte 3 Register" line.byte 0x04 "C1MB43_D4,CAN1 Mailbox 43 Data byte 4 Register" line.byte 0x05 "C1MB43_D5,CAN1 Mailbox 43 Data byte 5 Register" line.byte 0x06 "C1MB43_D6,CAN1 Mailbox 43 Data byte 6 Register" line.byte 0x07 "C1MB43_D7,CAN1 Mailbox 43 Data byte 7 Register" group.word (0x140+0x0e)++0x01 line.word 0x00 "C1MB43_TS,CAN1 Mailbox 43 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 42" if (((42.==60.)||(42.==61.)||(42.==62.)||(42.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x150++0x03 hide.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x150))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x150++0x03 line.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x150))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x150++0x03 line.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x150++0x03 hide.long 0x00 "C1MB42_ID,CAN1 Mailbox 42 Register" endif group.word (0x150+0x04)++0x1 line.word 0x00 "C1MB42_DLC,CAN1 Mailbox 42 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x150+0x06)++0x07 line.byte 0x00 "C1MB42_D0,CAN1 Mailbox 42 Data byte 0 Register" line.byte 0x01 "C1MB42_D1,CAN1 Mailbox 42 Data byte 1 Register" line.byte 0x02 "C1MB42_D2,CAN1 Mailbox 42 Data byte 2 Register" line.byte 0x03 "C1MB42_D3,CAN1 Mailbox 42 Data byte 3 Register" line.byte 0x04 "C1MB42_D4,CAN1 Mailbox 42 Data byte 4 Register" line.byte 0x05 "C1MB42_D5,CAN1 Mailbox 42 Data byte 5 Register" line.byte 0x06 "C1MB42_D6,CAN1 Mailbox 42 Data byte 6 Register" line.byte 0x07 "C1MB42_D7,CAN1 Mailbox 42 Data byte 7 Register" group.word (0x150+0x0e)++0x01 line.word 0x00 "C1MB42_TS,CAN1 Mailbox 42 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 41" if (((41.==60.)||(41.==61.)||(41.==62.)||(41.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x160++0x03 hide.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x160))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x160++0x03 line.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x160))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x160++0x03 line.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x160++0x03 hide.long 0x00 "C1MB41_ID,CAN1 Mailbox 41 Register" endif group.word (0x160+0x04)++0x1 line.word 0x00 "C1MB41_DLC,CAN1 Mailbox 41 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x160+0x06)++0x07 line.byte 0x00 "C1MB41_D0,CAN1 Mailbox 41 Data byte 0 Register" line.byte 0x01 "C1MB41_D1,CAN1 Mailbox 41 Data byte 1 Register" line.byte 0x02 "C1MB41_D2,CAN1 Mailbox 41 Data byte 2 Register" line.byte 0x03 "C1MB41_D3,CAN1 Mailbox 41 Data byte 3 Register" line.byte 0x04 "C1MB41_D4,CAN1 Mailbox 41 Data byte 4 Register" line.byte 0x05 "C1MB41_D5,CAN1 Mailbox 41 Data byte 5 Register" line.byte 0x06 "C1MB41_D6,CAN1 Mailbox 41 Data byte 6 Register" line.byte 0x07 "C1MB41_D7,CAN1 Mailbox 41 Data byte 7 Register" group.word (0x160+0x0e)++0x01 line.word 0x00 "C1MB41_TS,CAN1 Mailbox 41 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 40" if (((40.==60.)||(40.==61.)||(40.==62.)||(40.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x170++0x03 hide.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x170))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x170++0x03 line.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x170))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x170++0x03 line.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x170++0x03 hide.long 0x00 "C1MB40_ID,CAN1 Mailbox 40 Register" endif group.word (0x170+0x04)++0x1 line.word 0x00 "C1MB40_DLC,CAN1 Mailbox 40 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x170+0x06)++0x07 line.byte 0x00 "C1MB40_D0,CAN1 Mailbox 40 Data byte 0 Register" line.byte 0x01 "C1MB40_D1,CAN1 Mailbox 40 Data byte 1 Register" line.byte 0x02 "C1MB40_D2,CAN1 Mailbox 40 Data byte 2 Register" line.byte 0x03 "C1MB40_D3,CAN1 Mailbox 40 Data byte 3 Register" line.byte 0x04 "C1MB40_D4,CAN1 Mailbox 40 Data byte 4 Register" line.byte 0x05 "C1MB40_D5,CAN1 Mailbox 40 Data byte 5 Register" line.byte 0x06 "C1MB40_D6,CAN1 Mailbox 40 Data byte 6 Register" line.byte 0x07 "C1MB40_D7,CAN1 Mailbox 40 Data byte 7 Register" group.word (0x170+0x0e)++0x01 line.word 0x00 "C1MB40_TS,CAN1 Mailbox 40 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 39" if (((39.==60.)||(39.==61.)||(39.==62.)||(39.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x180++0x03 hide.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x180))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x180++0x03 line.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x180))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x180++0x03 line.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x180++0x03 hide.long 0x00 "C1MB39_ID,CAN1 Mailbox 39 Register" endif group.word (0x180+0x04)++0x1 line.word 0x00 "C1MB39_DLC,CAN1 Mailbox 39 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x180+0x06)++0x07 line.byte 0x00 "C1MB39_D0,CAN1 Mailbox 39 Data byte 0 Register" line.byte 0x01 "C1MB39_D1,CAN1 Mailbox 39 Data byte 1 Register" line.byte 0x02 "C1MB39_D2,CAN1 Mailbox 39 Data byte 2 Register" line.byte 0x03 "C1MB39_D3,CAN1 Mailbox 39 Data byte 3 Register" line.byte 0x04 "C1MB39_D4,CAN1 Mailbox 39 Data byte 4 Register" line.byte 0x05 "C1MB39_D5,CAN1 Mailbox 39 Data byte 5 Register" line.byte 0x06 "C1MB39_D6,CAN1 Mailbox 39 Data byte 6 Register" line.byte 0x07 "C1MB39_D7,CAN1 Mailbox 39 Data byte 7 Register" group.word (0x180+0x0e)++0x01 line.word 0x00 "C1MB39_TS,CAN1 Mailbox 39 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 38" if (((38.==60.)||(38.==61.)||(38.==62.)||(38.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x190++0x03 hide.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x190))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x190++0x03 line.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x190))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x190++0x03 line.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x190++0x03 hide.long 0x00 "C1MB38_ID,CAN1 Mailbox 38 Register" endif group.word (0x190+0x04)++0x1 line.word 0x00 "C1MB38_DLC,CAN1 Mailbox 38 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x190+0x06)++0x07 line.byte 0x00 "C1MB38_D0,CAN1 Mailbox 38 Data byte 0 Register" line.byte 0x01 "C1MB38_D1,CAN1 Mailbox 38 Data byte 1 Register" line.byte 0x02 "C1MB38_D2,CAN1 Mailbox 38 Data byte 2 Register" line.byte 0x03 "C1MB38_D3,CAN1 Mailbox 38 Data byte 3 Register" line.byte 0x04 "C1MB38_D4,CAN1 Mailbox 38 Data byte 4 Register" line.byte 0x05 "C1MB38_D5,CAN1 Mailbox 38 Data byte 5 Register" line.byte 0x06 "C1MB38_D6,CAN1 Mailbox 38 Data byte 6 Register" line.byte 0x07 "C1MB38_D7,CAN1 Mailbox 38 Data byte 7 Register" group.word (0x190+0x0e)++0x01 line.word 0x00 "C1MB38_TS,CAN1 Mailbox 38 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 37" if (((37.==60.)||(37.==61.)||(37.==62.)||(37.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1A0++0x03 hide.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1A0++0x03 line.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1A0++0x03 line.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1A0++0x03 hide.long 0x00 "C1MB37_ID,CAN1 Mailbox 37 Register" endif group.word (0x1A0+0x04)++0x1 line.word 0x00 "C1MB37_DLC,CAN1 Mailbox 37 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1A0+0x06)++0x07 line.byte 0x00 "C1MB37_D0,CAN1 Mailbox 37 Data byte 0 Register" line.byte 0x01 "C1MB37_D1,CAN1 Mailbox 37 Data byte 1 Register" line.byte 0x02 "C1MB37_D2,CAN1 Mailbox 37 Data byte 2 Register" line.byte 0x03 "C1MB37_D3,CAN1 Mailbox 37 Data byte 3 Register" line.byte 0x04 "C1MB37_D4,CAN1 Mailbox 37 Data byte 4 Register" line.byte 0x05 "C1MB37_D5,CAN1 Mailbox 37 Data byte 5 Register" line.byte 0x06 "C1MB37_D6,CAN1 Mailbox 37 Data byte 6 Register" line.byte 0x07 "C1MB37_D7,CAN1 Mailbox 37 Data byte 7 Register" group.word (0x1A0+0x0e)++0x01 line.word 0x00 "C1MB37_TS,CAN1 Mailbox 37 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 36" if (((36.==60.)||(36.==61.)||(36.==62.)||(36.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1B0++0x03 hide.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1B0++0x03 line.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1B0++0x03 line.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1B0++0x03 hide.long 0x00 "C1MB36_ID,CAN1 Mailbox 36 Register" endif group.word (0x1B0+0x04)++0x1 line.word 0x00 "C1MB36_DLC,CAN1 Mailbox 36 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1B0+0x06)++0x07 line.byte 0x00 "C1MB36_D0,CAN1 Mailbox 36 Data byte 0 Register" line.byte 0x01 "C1MB36_D1,CAN1 Mailbox 36 Data byte 1 Register" line.byte 0x02 "C1MB36_D2,CAN1 Mailbox 36 Data byte 2 Register" line.byte 0x03 "C1MB36_D3,CAN1 Mailbox 36 Data byte 3 Register" line.byte 0x04 "C1MB36_D4,CAN1 Mailbox 36 Data byte 4 Register" line.byte 0x05 "C1MB36_D5,CAN1 Mailbox 36 Data byte 5 Register" line.byte 0x06 "C1MB36_D6,CAN1 Mailbox 36 Data byte 6 Register" line.byte 0x07 "C1MB36_D7,CAN1 Mailbox 36 Data byte 7 Register" group.word (0x1B0+0x0e)++0x01 line.word 0x00 "C1MB36_TS,CAN1 Mailbox 36 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 35" if (((35.==60.)||(35.==61.)||(35.==62.)||(35.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1C0++0x03 hide.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1C0++0x03 line.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1C0++0x03 line.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1C0++0x03 hide.long 0x00 "C1MB35_ID,CAN1 Mailbox 35 Register" endif group.word (0x1C0+0x04)++0x1 line.word 0x00 "C1MB35_DLC,CAN1 Mailbox 35 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1C0+0x06)++0x07 line.byte 0x00 "C1MB35_D0,CAN1 Mailbox 35 Data byte 0 Register" line.byte 0x01 "C1MB35_D1,CAN1 Mailbox 35 Data byte 1 Register" line.byte 0x02 "C1MB35_D2,CAN1 Mailbox 35 Data byte 2 Register" line.byte 0x03 "C1MB35_D3,CAN1 Mailbox 35 Data byte 3 Register" line.byte 0x04 "C1MB35_D4,CAN1 Mailbox 35 Data byte 4 Register" line.byte 0x05 "C1MB35_D5,CAN1 Mailbox 35 Data byte 5 Register" line.byte 0x06 "C1MB35_D6,CAN1 Mailbox 35 Data byte 6 Register" line.byte 0x07 "C1MB35_D7,CAN1 Mailbox 35 Data byte 7 Register" group.word (0x1C0+0x0e)++0x01 line.word 0x00 "C1MB35_TS,CAN1 Mailbox 35 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 34" if (((34.==60.)||(34.==61.)||(34.==62.)||(34.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1D0++0x03 hide.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1D0++0x03 line.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1D0++0x03 line.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1D0++0x03 hide.long 0x00 "C1MB34_ID,CAN1 Mailbox 34 Register" endif group.word (0x1D0+0x04)++0x1 line.word 0x00 "C1MB34_DLC,CAN1 Mailbox 34 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1D0+0x06)++0x07 line.byte 0x00 "C1MB34_D0,CAN1 Mailbox 34 Data byte 0 Register" line.byte 0x01 "C1MB34_D1,CAN1 Mailbox 34 Data byte 1 Register" line.byte 0x02 "C1MB34_D2,CAN1 Mailbox 34 Data byte 2 Register" line.byte 0x03 "C1MB34_D3,CAN1 Mailbox 34 Data byte 3 Register" line.byte 0x04 "C1MB34_D4,CAN1 Mailbox 34 Data byte 4 Register" line.byte 0x05 "C1MB34_D5,CAN1 Mailbox 34 Data byte 5 Register" line.byte 0x06 "C1MB34_D6,CAN1 Mailbox 34 Data byte 6 Register" line.byte 0x07 "C1MB34_D7,CAN1 Mailbox 34 Data byte 7 Register" group.word (0x1D0+0x0e)++0x01 line.word 0x00 "C1MB34_TS,CAN1 Mailbox 34 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 33" if (((33.==60.)||(33.==61.)||(33.==62.)||(33.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1E0++0x03 hide.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1E0++0x03 line.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1E0++0x03 line.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1E0++0x03 hide.long 0x00 "C1MB33_ID,CAN1 Mailbox 33 Register" endif group.word (0x1E0+0x04)++0x1 line.word 0x00 "C1MB33_DLC,CAN1 Mailbox 33 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1E0+0x06)++0x07 line.byte 0x00 "C1MB33_D0,CAN1 Mailbox 33 Data byte 0 Register" line.byte 0x01 "C1MB33_D1,CAN1 Mailbox 33 Data byte 1 Register" line.byte 0x02 "C1MB33_D2,CAN1 Mailbox 33 Data byte 2 Register" line.byte 0x03 "C1MB33_D3,CAN1 Mailbox 33 Data byte 3 Register" line.byte 0x04 "C1MB33_D4,CAN1 Mailbox 33 Data byte 4 Register" line.byte 0x05 "C1MB33_D5,CAN1 Mailbox 33 Data byte 5 Register" line.byte 0x06 "C1MB33_D6,CAN1 Mailbox 33 Data byte 6 Register" line.byte 0x07 "C1MB33_D7,CAN1 Mailbox 33 Data byte 7 Register" group.word (0x1E0+0x0e)++0x01 line.word 0x00 "C1MB33_TS,CAN1 Mailbox 33 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 32" if (((32.==60.)||(32.==61.)||(32.==62.)||(32.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x1F0++0x03 hide.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x1F0++0x03 line.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x1F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x1F0++0x03 line.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x1F0++0x03 hide.long 0x00 "C1MB32_ID,CAN1 Mailbox 32 Register" endif group.word (0x1F0+0x04)++0x1 line.word 0x00 "C1MB32_DLC,CAN1 Mailbox 32 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x1F0+0x06)++0x07 line.byte 0x00 "C1MB32_D0,CAN1 Mailbox 32 Data byte 0 Register" line.byte 0x01 "C1MB32_D1,CAN1 Mailbox 32 Data byte 1 Register" line.byte 0x02 "C1MB32_D2,CAN1 Mailbox 32 Data byte 2 Register" line.byte 0x03 "C1MB32_D3,CAN1 Mailbox 32 Data byte 3 Register" line.byte 0x04 "C1MB32_D4,CAN1 Mailbox 32 Data byte 4 Register" line.byte 0x05 "C1MB32_D5,CAN1 Mailbox 32 Data byte 5 Register" line.byte 0x06 "C1MB32_D6,CAN1 Mailbox 32 Data byte 6 Register" line.byte 0x07 "C1MB32_D7,CAN1 Mailbox 32 Data byte 7 Register" group.word (0x1F0+0x0e)++0x01 line.word 0x00 "C1MB32_TS,CAN1 Mailbox 32 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 31" if (((31.==60.)||(31.==61.)||(31.==62.)||(31.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x200++0x03 hide.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x200))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x200++0x03 line.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x200))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x200++0x03 line.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x200++0x03 hide.long 0x00 "C1MB31_ID,CAN1 Mailbox 31 Register" endif group.word (0x200+0x04)++0x1 line.word 0x00 "C1MB31_DLC,CAN1 Mailbox 31 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x200+0x06)++0x07 line.byte 0x00 "C1MB31_D0,CAN1 Mailbox 31 Data byte 0 Register" line.byte 0x01 "C1MB31_D1,CAN1 Mailbox 31 Data byte 1 Register" line.byte 0x02 "C1MB31_D2,CAN1 Mailbox 31 Data byte 2 Register" line.byte 0x03 "C1MB31_D3,CAN1 Mailbox 31 Data byte 3 Register" line.byte 0x04 "C1MB31_D4,CAN1 Mailbox 31 Data byte 4 Register" line.byte 0x05 "C1MB31_D5,CAN1 Mailbox 31 Data byte 5 Register" line.byte 0x06 "C1MB31_D6,CAN1 Mailbox 31 Data byte 6 Register" line.byte 0x07 "C1MB31_D7,CAN1 Mailbox 31 Data byte 7 Register" group.word (0x200+0x0e)++0x01 line.word 0x00 "C1MB31_TS,CAN1 Mailbox 31 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 30" if (((30.==60.)||(30.==61.)||(30.==62.)||(30.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x210++0x03 hide.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x210))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x210++0x03 line.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x210))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x210++0x03 line.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x210++0x03 hide.long 0x00 "C1MB30_ID,CAN1 Mailbox 30 Register" endif group.word (0x210+0x04)++0x1 line.word 0x00 "C1MB30_DLC,CAN1 Mailbox 30 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x210+0x06)++0x07 line.byte 0x00 "C1MB30_D0,CAN1 Mailbox 30 Data byte 0 Register" line.byte 0x01 "C1MB30_D1,CAN1 Mailbox 30 Data byte 1 Register" line.byte 0x02 "C1MB30_D2,CAN1 Mailbox 30 Data byte 2 Register" line.byte 0x03 "C1MB30_D3,CAN1 Mailbox 30 Data byte 3 Register" line.byte 0x04 "C1MB30_D4,CAN1 Mailbox 30 Data byte 4 Register" line.byte 0x05 "C1MB30_D5,CAN1 Mailbox 30 Data byte 5 Register" line.byte 0x06 "C1MB30_D6,CAN1 Mailbox 30 Data byte 6 Register" line.byte 0x07 "C1MB30_D7,CAN1 Mailbox 30 Data byte 7 Register" group.word (0x210+0x0e)++0x01 line.word 0x00 "C1MB30_TS,CAN1 Mailbox 30 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 29" if (((29.==60.)||(29.==61.)||(29.==62.)||(29.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x220++0x03 hide.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x220))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x220++0x03 line.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x220))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x220++0x03 line.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x220++0x03 hide.long 0x00 "C1MB29_ID,CAN1 Mailbox 29 Register" endif group.word (0x220+0x04)++0x1 line.word 0x00 "C1MB29_DLC,CAN1 Mailbox 29 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x220+0x06)++0x07 line.byte 0x00 "C1MB29_D0,CAN1 Mailbox 29 Data byte 0 Register" line.byte 0x01 "C1MB29_D1,CAN1 Mailbox 29 Data byte 1 Register" line.byte 0x02 "C1MB29_D2,CAN1 Mailbox 29 Data byte 2 Register" line.byte 0x03 "C1MB29_D3,CAN1 Mailbox 29 Data byte 3 Register" line.byte 0x04 "C1MB29_D4,CAN1 Mailbox 29 Data byte 4 Register" line.byte 0x05 "C1MB29_D5,CAN1 Mailbox 29 Data byte 5 Register" line.byte 0x06 "C1MB29_D6,CAN1 Mailbox 29 Data byte 6 Register" line.byte 0x07 "C1MB29_D7,CAN1 Mailbox 29 Data byte 7 Register" group.word (0x220+0x0e)++0x01 line.word 0x00 "C1MB29_TS,CAN1 Mailbox 29 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 28" if (((28.==60.)||(28.==61.)||(28.==62.)||(28.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x230++0x03 hide.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x230))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x230++0x03 line.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x230))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x230++0x03 line.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x230++0x03 hide.long 0x00 "C1MB28_ID,CAN1 Mailbox 28 Register" endif group.word (0x230+0x04)++0x1 line.word 0x00 "C1MB28_DLC,CAN1 Mailbox 28 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x230+0x06)++0x07 line.byte 0x00 "C1MB28_D0,CAN1 Mailbox 28 Data byte 0 Register" line.byte 0x01 "C1MB28_D1,CAN1 Mailbox 28 Data byte 1 Register" line.byte 0x02 "C1MB28_D2,CAN1 Mailbox 28 Data byte 2 Register" line.byte 0x03 "C1MB28_D3,CAN1 Mailbox 28 Data byte 3 Register" line.byte 0x04 "C1MB28_D4,CAN1 Mailbox 28 Data byte 4 Register" line.byte 0x05 "C1MB28_D5,CAN1 Mailbox 28 Data byte 5 Register" line.byte 0x06 "C1MB28_D6,CAN1 Mailbox 28 Data byte 6 Register" line.byte 0x07 "C1MB28_D7,CAN1 Mailbox 28 Data byte 7 Register" group.word (0x230+0x0e)++0x01 line.word 0x00 "C1MB28_TS,CAN1 Mailbox 28 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 27" if (((27.==60.)||(27.==61.)||(27.==62.)||(27.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x240++0x03 hide.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x240))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x240++0x03 line.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x240))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x240++0x03 line.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x240++0x03 hide.long 0x00 "C1MB27_ID,CAN1 Mailbox 27 Register" endif group.word (0x240+0x04)++0x1 line.word 0x00 "C1MB27_DLC,CAN1 Mailbox 27 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x240+0x06)++0x07 line.byte 0x00 "C1MB27_D0,CAN1 Mailbox 27 Data byte 0 Register" line.byte 0x01 "C1MB27_D1,CAN1 Mailbox 27 Data byte 1 Register" line.byte 0x02 "C1MB27_D2,CAN1 Mailbox 27 Data byte 2 Register" line.byte 0x03 "C1MB27_D3,CAN1 Mailbox 27 Data byte 3 Register" line.byte 0x04 "C1MB27_D4,CAN1 Mailbox 27 Data byte 4 Register" line.byte 0x05 "C1MB27_D5,CAN1 Mailbox 27 Data byte 5 Register" line.byte 0x06 "C1MB27_D6,CAN1 Mailbox 27 Data byte 6 Register" line.byte 0x07 "C1MB27_D7,CAN1 Mailbox 27 Data byte 7 Register" group.word (0x240+0x0e)++0x01 line.word 0x00 "C1MB27_TS,CAN1 Mailbox 27 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 26" if (((26.==60.)||(26.==61.)||(26.==62.)||(26.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x250++0x03 hide.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x250))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x250++0x03 line.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x250))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x250++0x03 line.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x250++0x03 hide.long 0x00 "C1MB26_ID,CAN1 Mailbox 26 Register" endif group.word (0x250+0x04)++0x1 line.word 0x00 "C1MB26_DLC,CAN1 Mailbox 26 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x250+0x06)++0x07 line.byte 0x00 "C1MB26_D0,CAN1 Mailbox 26 Data byte 0 Register" line.byte 0x01 "C1MB26_D1,CAN1 Mailbox 26 Data byte 1 Register" line.byte 0x02 "C1MB26_D2,CAN1 Mailbox 26 Data byte 2 Register" line.byte 0x03 "C1MB26_D3,CAN1 Mailbox 26 Data byte 3 Register" line.byte 0x04 "C1MB26_D4,CAN1 Mailbox 26 Data byte 4 Register" line.byte 0x05 "C1MB26_D5,CAN1 Mailbox 26 Data byte 5 Register" line.byte 0x06 "C1MB26_D6,CAN1 Mailbox 26 Data byte 6 Register" line.byte 0x07 "C1MB26_D7,CAN1 Mailbox 26 Data byte 7 Register" group.word (0x250+0x0e)++0x01 line.word 0x00 "C1MB26_TS,CAN1 Mailbox 26 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 25" if (((25.==60.)||(25.==61.)||(25.==62.)||(25.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x260++0x03 hide.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x260))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x260++0x03 line.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x260))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x260++0x03 line.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x260++0x03 hide.long 0x00 "C1MB25_ID,CAN1 Mailbox 25 Register" endif group.word (0x260+0x04)++0x1 line.word 0x00 "C1MB25_DLC,CAN1 Mailbox 25 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x260+0x06)++0x07 line.byte 0x00 "C1MB25_D0,CAN1 Mailbox 25 Data byte 0 Register" line.byte 0x01 "C1MB25_D1,CAN1 Mailbox 25 Data byte 1 Register" line.byte 0x02 "C1MB25_D2,CAN1 Mailbox 25 Data byte 2 Register" line.byte 0x03 "C1MB25_D3,CAN1 Mailbox 25 Data byte 3 Register" line.byte 0x04 "C1MB25_D4,CAN1 Mailbox 25 Data byte 4 Register" line.byte 0x05 "C1MB25_D5,CAN1 Mailbox 25 Data byte 5 Register" line.byte 0x06 "C1MB25_D6,CAN1 Mailbox 25 Data byte 6 Register" line.byte 0x07 "C1MB25_D7,CAN1 Mailbox 25 Data byte 7 Register" group.word (0x260+0x0e)++0x01 line.word 0x00 "C1MB25_TS,CAN1 Mailbox 25 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 24" if (((24.==60.)||(24.==61.)||(24.==62.)||(24.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x270++0x03 hide.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x270))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x270++0x03 line.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x270))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x270++0x03 line.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x270++0x03 hide.long 0x00 "C1MB24_ID,CAN1 Mailbox 24 Register" endif group.word (0x270+0x04)++0x1 line.word 0x00 "C1MB24_DLC,CAN1 Mailbox 24 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x270+0x06)++0x07 line.byte 0x00 "C1MB24_D0,CAN1 Mailbox 24 Data byte 0 Register" line.byte 0x01 "C1MB24_D1,CAN1 Mailbox 24 Data byte 1 Register" line.byte 0x02 "C1MB24_D2,CAN1 Mailbox 24 Data byte 2 Register" line.byte 0x03 "C1MB24_D3,CAN1 Mailbox 24 Data byte 3 Register" line.byte 0x04 "C1MB24_D4,CAN1 Mailbox 24 Data byte 4 Register" line.byte 0x05 "C1MB24_D5,CAN1 Mailbox 24 Data byte 5 Register" line.byte 0x06 "C1MB24_D6,CAN1 Mailbox 24 Data byte 6 Register" line.byte 0x07 "C1MB24_D7,CAN1 Mailbox 24 Data byte 7 Register" group.word (0x270+0x0e)++0x01 line.word 0x00 "C1MB24_TS,CAN1 Mailbox 24 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 23" if (((23.==60.)||(23.==61.)||(23.==62.)||(23.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x280++0x03 hide.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x280))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x280++0x03 line.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x280))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x280++0x03 line.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x280++0x03 hide.long 0x00 "C1MB23_ID,CAN1 Mailbox 23 Register" endif group.word (0x280+0x04)++0x1 line.word 0x00 "C1MB23_DLC,CAN1 Mailbox 23 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x280+0x06)++0x07 line.byte 0x00 "C1MB23_D0,CAN1 Mailbox 23 Data byte 0 Register" line.byte 0x01 "C1MB23_D1,CAN1 Mailbox 23 Data byte 1 Register" line.byte 0x02 "C1MB23_D2,CAN1 Mailbox 23 Data byte 2 Register" line.byte 0x03 "C1MB23_D3,CAN1 Mailbox 23 Data byte 3 Register" line.byte 0x04 "C1MB23_D4,CAN1 Mailbox 23 Data byte 4 Register" line.byte 0x05 "C1MB23_D5,CAN1 Mailbox 23 Data byte 5 Register" line.byte 0x06 "C1MB23_D6,CAN1 Mailbox 23 Data byte 6 Register" line.byte 0x07 "C1MB23_D7,CAN1 Mailbox 23 Data byte 7 Register" group.word (0x280+0x0e)++0x01 line.word 0x00 "C1MB23_TS,CAN1 Mailbox 23 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 22" if (((22.==60.)||(22.==61.)||(22.==62.)||(22.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x290++0x03 hide.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x290))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x290++0x03 line.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x290))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x290++0x03 line.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x290++0x03 hide.long 0x00 "C1MB22_ID,CAN1 Mailbox 22 Register" endif group.word (0x290+0x04)++0x1 line.word 0x00 "C1MB22_DLC,CAN1 Mailbox 22 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x290+0x06)++0x07 line.byte 0x00 "C1MB22_D0,CAN1 Mailbox 22 Data byte 0 Register" line.byte 0x01 "C1MB22_D1,CAN1 Mailbox 22 Data byte 1 Register" line.byte 0x02 "C1MB22_D2,CAN1 Mailbox 22 Data byte 2 Register" line.byte 0x03 "C1MB22_D3,CAN1 Mailbox 22 Data byte 3 Register" line.byte 0x04 "C1MB22_D4,CAN1 Mailbox 22 Data byte 4 Register" line.byte 0x05 "C1MB22_D5,CAN1 Mailbox 22 Data byte 5 Register" line.byte 0x06 "C1MB22_D6,CAN1 Mailbox 22 Data byte 6 Register" line.byte 0x07 "C1MB22_D7,CAN1 Mailbox 22 Data byte 7 Register" group.word (0x290+0x0e)++0x01 line.word 0x00 "C1MB22_TS,CAN1 Mailbox 22 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 21" if (((21.==60.)||(21.==61.)||(21.==62.)||(21.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2A0++0x03 hide.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2A0++0x03 line.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2A0++0x03 line.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2A0++0x03 hide.long 0x00 "C1MB21_ID,CAN1 Mailbox 21 Register" endif group.word (0x2A0+0x04)++0x1 line.word 0x00 "C1MB21_DLC,CAN1 Mailbox 21 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2A0+0x06)++0x07 line.byte 0x00 "C1MB21_D0,CAN1 Mailbox 21 Data byte 0 Register" line.byte 0x01 "C1MB21_D1,CAN1 Mailbox 21 Data byte 1 Register" line.byte 0x02 "C1MB21_D2,CAN1 Mailbox 21 Data byte 2 Register" line.byte 0x03 "C1MB21_D3,CAN1 Mailbox 21 Data byte 3 Register" line.byte 0x04 "C1MB21_D4,CAN1 Mailbox 21 Data byte 4 Register" line.byte 0x05 "C1MB21_D5,CAN1 Mailbox 21 Data byte 5 Register" line.byte 0x06 "C1MB21_D6,CAN1 Mailbox 21 Data byte 6 Register" line.byte 0x07 "C1MB21_D7,CAN1 Mailbox 21 Data byte 7 Register" group.word (0x2A0+0x0e)++0x01 line.word 0x00 "C1MB21_TS,CAN1 Mailbox 21 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 20" if (((20.==60.)||(20.==61.)||(20.==62.)||(20.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2B0++0x03 hide.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2B0++0x03 line.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2B0++0x03 line.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2B0++0x03 hide.long 0x00 "C1MB20_ID,CAN1 Mailbox 20 Register" endif group.word (0x2B0+0x04)++0x1 line.word 0x00 "C1MB20_DLC,CAN1 Mailbox 20 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2B0+0x06)++0x07 line.byte 0x00 "C1MB20_D0,CAN1 Mailbox 20 Data byte 0 Register" line.byte 0x01 "C1MB20_D1,CAN1 Mailbox 20 Data byte 1 Register" line.byte 0x02 "C1MB20_D2,CAN1 Mailbox 20 Data byte 2 Register" line.byte 0x03 "C1MB20_D3,CAN1 Mailbox 20 Data byte 3 Register" line.byte 0x04 "C1MB20_D4,CAN1 Mailbox 20 Data byte 4 Register" line.byte 0x05 "C1MB20_D5,CAN1 Mailbox 20 Data byte 5 Register" line.byte 0x06 "C1MB20_D6,CAN1 Mailbox 20 Data byte 6 Register" line.byte 0x07 "C1MB20_D7,CAN1 Mailbox 20 Data byte 7 Register" group.word (0x2B0+0x0e)++0x01 line.word 0x00 "C1MB20_TS,CAN1 Mailbox 20 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 19" if (((19.==60.)||(19.==61.)||(19.==62.)||(19.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2C0++0x03 hide.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2C0++0x03 line.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2C0++0x03 line.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2C0++0x03 hide.long 0x00 "C1MB19_ID,CAN1 Mailbox 19 Register" endif group.word (0x2C0+0x04)++0x1 line.word 0x00 "C1MB19_DLC,CAN1 Mailbox 19 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2C0+0x06)++0x07 line.byte 0x00 "C1MB19_D0,CAN1 Mailbox 19 Data byte 0 Register" line.byte 0x01 "C1MB19_D1,CAN1 Mailbox 19 Data byte 1 Register" line.byte 0x02 "C1MB19_D2,CAN1 Mailbox 19 Data byte 2 Register" line.byte 0x03 "C1MB19_D3,CAN1 Mailbox 19 Data byte 3 Register" line.byte 0x04 "C1MB19_D4,CAN1 Mailbox 19 Data byte 4 Register" line.byte 0x05 "C1MB19_D5,CAN1 Mailbox 19 Data byte 5 Register" line.byte 0x06 "C1MB19_D6,CAN1 Mailbox 19 Data byte 6 Register" line.byte 0x07 "C1MB19_D7,CAN1 Mailbox 19 Data byte 7 Register" group.word (0x2C0+0x0e)++0x01 line.word 0x00 "C1MB19_TS,CAN1 Mailbox 19 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 18" if (((18.==60.)||(18.==61.)||(18.==62.)||(18.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2D0++0x03 hide.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2D0++0x03 line.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2D0++0x03 line.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2D0++0x03 hide.long 0x00 "C1MB18_ID,CAN1 Mailbox 18 Register" endif group.word (0x2D0+0x04)++0x1 line.word 0x00 "C1MB18_DLC,CAN1 Mailbox 18 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2D0+0x06)++0x07 line.byte 0x00 "C1MB18_D0,CAN1 Mailbox 18 Data byte 0 Register" line.byte 0x01 "C1MB18_D1,CAN1 Mailbox 18 Data byte 1 Register" line.byte 0x02 "C1MB18_D2,CAN1 Mailbox 18 Data byte 2 Register" line.byte 0x03 "C1MB18_D3,CAN1 Mailbox 18 Data byte 3 Register" line.byte 0x04 "C1MB18_D4,CAN1 Mailbox 18 Data byte 4 Register" line.byte 0x05 "C1MB18_D5,CAN1 Mailbox 18 Data byte 5 Register" line.byte 0x06 "C1MB18_D6,CAN1 Mailbox 18 Data byte 6 Register" line.byte 0x07 "C1MB18_D7,CAN1 Mailbox 18 Data byte 7 Register" group.word (0x2D0+0x0e)++0x01 line.word 0x00 "C1MB18_TS,CAN1 Mailbox 18 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 17" if (((17.==60.)||(17.==61.)||(17.==62.)||(17.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2E0++0x03 hide.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2E0++0x03 line.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2E0++0x03 line.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2E0++0x03 hide.long 0x00 "C1MB17_ID,CAN1 Mailbox 17 Register" endif group.word (0x2E0+0x04)++0x1 line.word 0x00 "C1MB17_DLC,CAN1 Mailbox 17 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2E0+0x06)++0x07 line.byte 0x00 "C1MB17_D0,CAN1 Mailbox 17 Data byte 0 Register" line.byte 0x01 "C1MB17_D1,CAN1 Mailbox 17 Data byte 1 Register" line.byte 0x02 "C1MB17_D2,CAN1 Mailbox 17 Data byte 2 Register" line.byte 0x03 "C1MB17_D3,CAN1 Mailbox 17 Data byte 3 Register" line.byte 0x04 "C1MB17_D4,CAN1 Mailbox 17 Data byte 4 Register" line.byte 0x05 "C1MB17_D5,CAN1 Mailbox 17 Data byte 5 Register" line.byte 0x06 "C1MB17_D6,CAN1 Mailbox 17 Data byte 6 Register" line.byte 0x07 "C1MB17_D7,CAN1 Mailbox 17 Data byte 7 Register" group.word (0x2E0+0x0e)++0x01 line.word 0x00 "C1MB17_TS,CAN1 Mailbox 17 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 16" if (((16.==60.)||(16.==61.)||(16.==62.)||(16.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x2F0++0x03 hide.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x2F0++0x03 line.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x2F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x2F0++0x03 line.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x2F0++0x03 hide.long 0x00 "C1MB16_ID,CAN1 Mailbox 16 Register" endif group.word (0x2F0+0x04)++0x1 line.word 0x00 "C1MB16_DLC,CAN1 Mailbox 16 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x2F0+0x06)++0x07 line.byte 0x00 "C1MB16_D0,CAN1 Mailbox 16 Data byte 0 Register" line.byte 0x01 "C1MB16_D1,CAN1 Mailbox 16 Data byte 1 Register" line.byte 0x02 "C1MB16_D2,CAN1 Mailbox 16 Data byte 2 Register" line.byte 0x03 "C1MB16_D3,CAN1 Mailbox 16 Data byte 3 Register" line.byte 0x04 "C1MB16_D4,CAN1 Mailbox 16 Data byte 4 Register" line.byte 0x05 "C1MB16_D5,CAN1 Mailbox 16 Data byte 5 Register" line.byte 0x06 "C1MB16_D6,CAN1 Mailbox 16 Data byte 6 Register" line.byte 0x07 "C1MB16_D7,CAN1 Mailbox 16 Data byte 7 Register" group.word (0x2F0+0x0e)++0x01 line.word 0x00 "C1MB16_TS,CAN1 Mailbox 16 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 15" if (((15.==60.)||(15.==61.)||(15.==62.)||(15.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x300++0x03 hide.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x300))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x300++0x03 line.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x300))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x300++0x03 line.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x300++0x03 hide.long 0x00 "C1MB15_ID,CAN1 Mailbox 15 Register" endif group.word (0x300+0x04)++0x1 line.word 0x00 "C1MB15_DLC,CAN1 Mailbox 15 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x300+0x06)++0x07 line.byte 0x00 "C1MB15_D0,CAN1 Mailbox 15 Data byte 0 Register" line.byte 0x01 "C1MB15_D1,CAN1 Mailbox 15 Data byte 1 Register" line.byte 0x02 "C1MB15_D2,CAN1 Mailbox 15 Data byte 2 Register" line.byte 0x03 "C1MB15_D3,CAN1 Mailbox 15 Data byte 3 Register" line.byte 0x04 "C1MB15_D4,CAN1 Mailbox 15 Data byte 4 Register" line.byte 0x05 "C1MB15_D5,CAN1 Mailbox 15 Data byte 5 Register" line.byte 0x06 "C1MB15_D6,CAN1 Mailbox 15 Data byte 6 Register" line.byte 0x07 "C1MB15_D7,CAN1 Mailbox 15 Data byte 7 Register" group.word (0x300+0x0e)++0x01 line.word 0x00 "C1MB15_TS,CAN1 Mailbox 15 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 14" if (((14.==60.)||(14.==61.)||(14.==62.)||(14.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x310++0x03 hide.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x310))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x310++0x03 line.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x310))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x310++0x03 line.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x310++0x03 hide.long 0x00 "C1MB14_ID,CAN1 Mailbox 14 Register" endif group.word (0x310+0x04)++0x1 line.word 0x00 "C1MB14_DLC,CAN1 Mailbox 14 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x310+0x06)++0x07 line.byte 0x00 "C1MB14_D0,CAN1 Mailbox 14 Data byte 0 Register" line.byte 0x01 "C1MB14_D1,CAN1 Mailbox 14 Data byte 1 Register" line.byte 0x02 "C1MB14_D2,CAN1 Mailbox 14 Data byte 2 Register" line.byte 0x03 "C1MB14_D3,CAN1 Mailbox 14 Data byte 3 Register" line.byte 0x04 "C1MB14_D4,CAN1 Mailbox 14 Data byte 4 Register" line.byte 0x05 "C1MB14_D5,CAN1 Mailbox 14 Data byte 5 Register" line.byte 0x06 "C1MB14_D6,CAN1 Mailbox 14 Data byte 6 Register" line.byte 0x07 "C1MB14_D7,CAN1 Mailbox 14 Data byte 7 Register" group.word (0x310+0x0e)++0x01 line.word 0x00 "C1MB14_TS,CAN1 Mailbox 14 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 13" if (((13.==60.)||(13.==61.)||(13.==62.)||(13.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x320++0x03 hide.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x320))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x320++0x03 line.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x320))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x320++0x03 line.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x320++0x03 hide.long 0x00 "C1MB13_ID,CAN1 Mailbox 13 Register" endif group.word (0x320+0x04)++0x1 line.word 0x00 "C1MB13_DLC,CAN1 Mailbox 13 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x320+0x06)++0x07 line.byte 0x00 "C1MB13_D0,CAN1 Mailbox 13 Data byte 0 Register" line.byte 0x01 "C1MB13_D1,CAN1 Mailbox 13 Data byte 1 Register" line.byte 0x02 "C1MB13_D2,CAN1 Mailbox 13 Data byte 2 Register" line.byte 0x03 "C1MB13_D3,CAN1 Mailbox 13 Data byte 3 Register" line.byte 0x04 "C1MB13_D4,CAN1 Mailbox 13 Data byte 4 Register" line.byte 0x05 "C1MB13_D5,CAN1 Mailbox 13 Data byte 5 Register" line.byte 0x06 "C1MB13_D6,CAN1 Mailbox 13 Data byte 6 Register" line.byte 0x07 "C1MB13_D7,CAN1 Mailbox 13 Data byte 7 Register" group.word (0x320+0x0e)++0x01 line.word 0x00 "C1MB13_TS,CAN1 Mailbox 13 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 12" if (((12.==60.)||(12.==61.)||(12.==62.)||(12.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x330++0x03 hide.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x330))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x330++0x03 line.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x330))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x330++0x03 line.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x330++0x03 hide.long 0x00 "C1MB12_ID,CAN1 Mailbox 12 Register" endif group.word (0x330+0x04)++0x1 line.word 0x00 "C1MB12_DLC,CAN1 Mailbox 12 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x330+0x06)++0x07 line.byte 0x00 "C1MB12_D0,CAN1 Mailbox 12 Data byte 0 Register" line.byte 0x01 "C1MB12_D1,CAN1 Mailbox 12 Data byte 1 Register" line.byte 0x02 "C1MB12_D2,CAN1 Mailbox 12 Data byte 2 Register" line.byte 0x03 "C1MB12_D3,CAN1 Mailbox 12 Data byte 3 Register" line.byte 0x04 "C1MB12_D4,CAN1 Mailbox 12 Data byte 4 Register" line.byte 0x05 "C1MB12_D5,CAN1 Mailbox 12 Data byte 5 Register" line.byte 0x06 "C1MB12_D6,CAN1 Mailbox 12 Data byte 6 Register" line.byte 0x07 "C1MB12_D7,CAN1 Mailbox 12 Data byte 7 Register" group.word (0x330+0x0e)++0x01 line.word 0x00 "C1MB12_TS,CAN1 Mailbox 12 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 11" if (((11.==60.)||(11.==61.)||(11.==62.)||(11.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x340++0x03 hide.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x340))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x340++0x03 line.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x340))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x340++0x03 line.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x340++0x03 hide.long 0x00 "C1MB11_ID,CAN1 Mailbox 11 Register" endif group.word (0x340+0x04)++0x1 line.word 0x00 "C1MB11_DLC,CAN1 Mailbox 11 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x340+0x06)++0x07 line.byte 0x00 "C1MB11_D0,CAN1 Mailbox 11 Data byte 0 Register" line.byte 0x01 "C1MB11_D1,CAN1 Mailbox 11 Data byte 1 Register" line.byte 0x02 "C1MB11_D2,CAN1 Mailbox 11 Data byte 2 Register" line.byte 0x03 "C1MB11_D3,CAN1 Mailbox 11 Data byte 3 Register" line.byte 0x04 "C1MB11_D4,CAN1 Mailbox 11 Data byte 4 Register" line.byte 0x05 "C1MB11_D5,CAN1 Mailbox 11 Data byte 5 Register" line.byte 0x06 "C1MB11_D6,CAN1 Mailbox 11 Data byte 6 Register" line.byte 0x07 "C1MB11_D7,CAN1 Mailbox 11 Data byte 7 Register" group.word (0x340+0x0e)++0x01 line.word 0x00 "C1MB11_TS,CAN1 Mailbox 11 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 10" if (((10.==60.)||(10.==61.)||(10.==62.)||(10.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x350++0x03 hide.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x350))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x350++0x03 line.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x350))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x350++0x03 line.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x350++0x03 hide.long 0x00 "C1MB10_ID,CAN1 Mailbox 10 Register" endif group.word (0x350+0x04)++0x1 line.word 0x00 "C1MB10_DLC,CAN1 Mailbox 10 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x350+0x06)++0x07 line.byte 0x00 "C1MB10_D0,CAN1 Mailbox 10 Data byte 0 Register" line.byte 0x01 "C1MB10_D1,CAN1 Mailbox 10 Data byte 1 Register" line.byte 0x02 "C1MB10_D2,CAN1 Mailbox 10 Data byte 2 Register" line.byte 0x03 "C1MB10_D3,CAN1 Mailbox 10 Data byte 3 Register" line.byte 0x04 "C1MB10_D4,CAN1 Mailbox 10 Data byte 4 Register" line.byte 0x05 "C1MB10_D5,CAN1 Mailbox 10 Data byte 5 Register" line.byte 0x06 "C1MB10_D6,CAN1 Mailbox 10 Data byte 6 Register" line.byte 0x07 "C1MB10_D7,CAN1 Mailbox 10 Data byte 7 Register" group.word (0x350+0x0e)++0x01 line.word 0x00 "C1MB10_TS,CAN1 Mailbox 10 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 9" if (((9.==60.)||(9.==61.)||(9.==62.)||(9.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x360++0x03 hide.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x360))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x360++0x03 line.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x360))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x360++0x03 line.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x360++0x03 hide.long 0x00 "C1MB9_ID,CAN1 Mailbox 9 Register" endif group.word (0x360+0x04)++0x1 line.word 0x00 "C1MB9_DLC,CAN1 Mailbox 9 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x360+0x06)++0x07 line.byte 0x00 "C1MB9_D0,CAN1 Mailbox 9 Data byte 0 Register" line.byte 0x01 "C1MB9_D1,CAN1 Mailbox 9 Data byte 1 Register" line.byte 0x02 "C1MB9_D2,CAN1 Mailbox 9 Data byte 2 Register" line.byte 0x03 "C1MB9_D3,CAN1 Mailbox 9 Data byte 3 Register" line.byte 0x04 "C1MB9_D4,CAN1 Mailbox 9 Data byte 4 Register" line.byte 0x05 "C1MB9_D5,CAN1 Mailbox 9 Data byte 5 Register" line.byte 0x06 "C1MB9_D6,CAN1 Mailbox 9 Data byte 6 Register" line.byte 0x07 "C1MB9_D7,CAN1 Mailbox 9 Data byte 7 Register" group.word (0x360+0x0e)++0x01 line.word 0x00 "C1MB9_TS,CAN1 Mailbox 9 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 8" if (((8.==60.)||(8.==61.)||(8.==62.)||(8.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x370++0x03 hide.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x370))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x370++0x03 line.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x370))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x370++0x03 line.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x370++0x03 hide.long 0x00 "C1MB8_ID,CAN1 Mailbox 8 Register" endif group.word (0x370+0x04)++0x1 line.word 0x00 "C1MB8_DLC,CAN1 Mailbox 8 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x370+0x06)++0x07 line.byte 0x00 "C1MB8_D0,CAN1 Mailbox 8 Data byte 0 Register" line.byte 0x01 "C1MB8_D1,CAN1 Mailbox 8 Data byte 1 Register" line.byte 0x02 "C1MB8_D2,CAN1 Mailbox 8 Data byte 2 Register" line.byte 0x03 "C1MB8_D3,CAN1 Mailbox 8 Data byte 3 Register" line.byte 0x04 "C1MB8_D4,CAN1 Mailbox 8 Data byte 4 Register" line.byte 0x05 "C1MB8_D5,CAN1 Mailbox 8 Data byte 5 Register" line.byte 0x06 "C1MB8_D6,CAN1 Mailbox 8 Data byte 6 Register" line.byte 0x07 "C1MB8_D7,CAN1 Mailbox 8 Data byte 7 Register" group.word (0x370+0x0e)++0x01 line.word 0x00 "C1MB8_TS,CAN1 Mailbox 8 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 7" if (((7.==60.)||(7.==61.)||(7.==62.)||(7.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x380++0x03 hide.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x380))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x380++0x03 line.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x380))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x380++0x03 line.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x380++0x03 hide.long 0x00 "C1MB7_ID,CAN1 Mailbox 7 Register" endif group.word (0x380+0x04)++0x1 line.word 0x00 "C1MB7_DLC,CAN1 Mailbox 7 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x380+0x06)++0x07 line.byte 0x00 "C1MB7_D0,CAN1 Mailbox 7 Data byte 0 Register" line.byte 0x01 "C1MB7_D1,CAN1 Mailbox 7 Data byte 1 Register" line.byte 0x02 "C1MB7_D2,CAN1 Mailbox 7 Data byte 2 Register" line.byte 0x03 "C1MB7_D3,CAN1 Mailbox 7 Data byte 3 Register" line.byte 0x04 "C1MB7_D4,CAN1 Mailbox 7 Data byte 4 Register" line.byte 0x05 "C1MB7_D5,CAN1 Mailbox 7 Data byte 5 Register" line.byte 0x06 "C1MB7_D6,CAN1 Mailbox 7 Data byte 6 Register" line.byte 0x07 "C1MB7_D7,CAN1 Mailbox 7 Data byte 7 Register" group.word (0x380+0x0e)++0x01 line.word 0x00 "C1MB7_TS,CAN1 Mailbox 7 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 6" if (((6.==60.)||(6.==61.)||(6.==62.)||(6.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x390++0x03 hide.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x390))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x390++0x03 line.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x390))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x390++0x03 line.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x390++0x03 hide.long 0x00 "C1MB6_ID,CAN1 Mailbox 6 Register" endif group.word (0x390+0x04)++0x1 line.word 0x00 "C1MB6_DLC,CAN1 Mailbox 6 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x390+0x06)++0x07 line.byte 0x00 "C1MB6_D0,CAN1 Mailbox 6 Data byte 0 Register" line.byte 0x01 "C1MB6_D1,CAN1 Mailbox 6 Data byte 1 Register" line.byte 0x02 "C1MB6_D2,CAN1 Mailbox 6 Data byte 2 Register" line.byte 0x03 "C1MB6_D3,CAN1 Mailbox 6 Data byte 3 Register" line.byte 0x04 "C1MB6_D4,CAN1 Mailbox 6 Data byte 4 Register" line.byte 0x05 "C1MB6_D5,CAN1 Mailbox 6 Data byte 5 Register" line.byte 0x06 "C1MB6_D6,CAN1 Mailbox 6 Data byte 6 Register" line.byte 0x07 "C1MB6_D7,CAN1 Mailbox 6 Data byte 7 Register" group.word (0x390+0x0e)++0x01 line.word 0x00 "C1MB6_TS,CAN1 Mailbox 6 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 5" if (((5.==60.)||(5.==61.)||(5.==62.)||(5.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3A0++0x03 hide.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3A0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3A0++0x03 line.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3A0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3A0++0x03 line.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3A0++0x03 hide.long 0x00 "C1MB5_ID,CAN1 Mailbox 5 Register" endif group.word (0x3A0+0x04)++0x1 line.word 0x00 "C1MB5_DLC,CAN1 Mailbox 5 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3A0+0x06)++0x07 line.byte 0x00 "C1MB5_D0,CAN1 Mailbox 5 Data byte 0 Register" line.byte 0x01 "C1MB5_D1,CAN1 Mailbox 5 Data byte 1 Register" line.byte 0x02 "C1MB5_D2,CAN1 Mailbox 5 Data byte 2 Register" line.byte 0x03 "C1MB5_D3,CAN1 Mailbox 5 Data byte 3 Register" line.byte 0x04 "C1MB5_D4,CAN1 Mailbox 5 Data byte 4 Register" line.byte 0x05 "C1MB5_D5,CAN1 Mailbox 5 Data byte 5 Register" line.byte 0x06 "C1MB5_D6,CAN1 Mailbox 5 Data byte 6 Register" line.byte 0x07 "C1MB5_D7,CAN1 Mailbox 5 Data byte 7 Register" group.word (0x3A0+0x0e)++0x01 line.word 0x00 "C1MB5_TS,CAN1 Mailbox 5 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 4" if (((4.==60.)||(4.==61.)||(4.==62.)||(4.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3B0++0x03 hide.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3B0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3B0++0x03 line.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3B0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3B0++0x03 line.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3B0++0x03 hide.long 0x00 "C1MB4_ID,CAN1 Mailbox 4 Register" endif group.word (0x3B0+0x04)++0x1 line.word 0x00 "C1MB4_DLC,CAN1 Mailbox 4 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3B0+0x06)++0x07 line.byte 0x00 "C1MB4_D0,CAN1 Mailbox 4 Data byte 0 Register" line.byte 0x01 "C1MB4_D1,CAN1 Mailbox 4 Data byte 1 Register" line.byte 0x02 "C1MB4_D2,CAN1 Mailbox 4 Data byte 2 Register" line.byte 0x03 "C1MB4_D3,CAN1 Mailbox 4 Data byte 3 Register" line.byte 0x04 "C1MB4_D4,CAN1 Mailbox 4 Data byte 4 Register" line.byte 0x05 "C1MB4_D5,CAN1 Mailbox 4 Data byte 5 Register" line.byte 0x06 "C1MB4_D6,CAN1 Mailbox 4 Data byte 6 Register" line.byte 0x07 "C1MB4_D7,CAN1 Mailbox 4 Data byte 7 Register" group.word (0x3B0+0x0e)++0x01 line.word 0x00 "C1MB4_TS,CAN1 Mailbox 4 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 3" if (((3.==60.)||(3.==61.)||(3.==62.)||(3.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3C0++0x03 hide.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3C0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3C0++0x03 line.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3C0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3C0++0x03 line.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3C0++0x03 hide.long 0x00 "C1MB3_ID,CAN1 Mailbox 3 Register" endif group.word (0x3C0+0x04)++0x1 line.word 0x00 "C1MB3_DLC,CAN1 Mailbox 3 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3C0+0x06)++0x07 line.byte 0x00 "C1MB3_D0,CAN1 Mailbox 3 Data byte 0 Register" line.byte 0x01 "C1MB3_D1,CAN1 Mailbox 3 Data byte 1 Register" line.byte 0x02 "C1MB3_D2,CAN1 Mailbox 3 Data byte 2 Register" line.byte 0x03 "C1MB3_D3,CAN1 Mailbox 3 Data byte 3 Register" line.byte 0x04 "C1MB3_D4,CAN1 Mailbox 3 Data byte 4 Register" line.byte 0x05 "C1MB3_D5,CAN1 Mailbox 3 Data byte 5 Register" line.byte 0x06 "C1MB3_D6,CAN1 Mailbox 3 Data byte 6 Register" line.byte 0x07 "C1MB3_D7,CAN1 Mailbox 3 Data byte 7 Register" group.word (0x3C0+0x0e)++0x01 line.word 0x00 "C1MB3_TS,CAN1 Mailbox 3 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 2" if (((2.==60.)||(2.==61.)||(2.==62.)||(2.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3D0++0x03 hide.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3D0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3D0++0x03 line.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3D0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3D0++0x03 line.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3D0++0x03 hide.long 0x00 "C1MB2_ID,CAN1 Mailbox 2 Register" endif group.word (0x3D0+0x04)++0x1 line.word 0x00 "C1MB2_DLC,CAN1 Mailbox 2 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3D0+0x06)++0x07 line.byte 0x00 "C1MB2_D0,CAN1 Mailbox 2 Data byte 0 Register" line.byte 0x01 "C1MB2_D1,CAN1 Mailbox 2 Data byte 1 Register" line.byte 0x02 "C1MB2_D2,CAN1 Mailbox 2 Data byte 2 Register" line.byte 0x03 "C1MB2_D3,CAN1 Mailbox 2 Data byte 3 Register" line.byte 0x04 "C1MB2_D4,CAN1 Mailbox 2 Data byte 4 Register" line.byte 0x05 "C1MB2_D5,CAN1 Mailbox 2 Data byte 5 Register" line.byte 0x06 "C1MB2_D6,CAN1 Mailbox 2 Data byte 6 Register" line.byte 0x07 "C1MB2_D7,CAN1 Mailbox 2 Data byte 7 Register" group.word (0x3D0+0x0e)++0x01 line.word 0x00 "C1MB2_TS,CAN1 Mailbox 2 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 1" if (((1.==60.)||(1.==61.)||(1.==62.)||(1.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3E0++0x03 hide.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3E0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3E0++0x03 line.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3E0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3E0++0x03 line.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3E0++0x03 hide.long 0x00 "C1MB1_ID,CAN1 Mailbox 1 Register" endif group.word (0x3E0+0x04)++0x1 line.word 0x00 "C1MB1_DLC,CAN1 Mailbox 1 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3E0+0x06)++0x07 line.byte 0x00 "C1MB1_D0,CAN1 Mailbox 1 Data byte 0 Register" line.byte 0x01 "C1MB1_D1,CAN1 Mailbox 1 Data byte 1 Register" line.byte 0x02 "C1MB1_D2,CAN1 Mailbox 1 Data byte 2 Register" line.byte 0x03 "C1MB1_D3,CAN1 Mailbox 1 Data byte 3 Register" line.byte 0x04 "C1MB1_D4,CAN1 Mailbox 1 Data byte 4 Register" line.byte 0x05 "C1MB1_D5,CAN1 Mailbox 1 Data byte 5 Register" line.byte 0x06 "C1MB1_D6,CAN1 Mailbox 1 Data byte 6 Register" line.byte 0x07 "C1MB1_D7,CAN1 Mailbox 1 Data byte 7 Register" group.word (0x3E0+0x0e)++0x01 line.word 0x00 "C1MB1_TS,CAN1 Mailbox 1 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree "Mailbox 0" if (((0.==60.)||(0.==61.)||(0.==62.)||(0.==63.))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x1)) hgroup.long 0x3F0++0x03 hide.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3F0))&0x80000000)==0x00000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x0)) group.long 0x3F0++0x03 line.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" elif (((((per.w(ad:0xE6E88000+0x840))&0x6)==0x4)&&(((per.long(ad:0xE6E88000+0x3F0))&0x80000000)==0x80000000))||(((per.w(ad:0xE6E88000+0x840))&0x6)==0x2)) group.long 0x3F0++0x03 line.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" bitfld.long 0x0 31. " IDE ,ID Extension" "Standard,Extended" bitfld.long 0x0 30. " RTR ,Remote Transmission Request" "Data,Remote" textline " " bitfld.long 0x0 28. " SID_10 ,Standard ID Bit 10" "Low,High" bitfld.long 0x0 27. " SID_9 ,Standard ID Bit 9" "Low,High" bitfld.long 0x0 26. " SID_8 ,Standard ID Bit 8" "Low,High" textline " " bitfld.long 0x0 25. " SID_7 ,Standard ID Bit 7" "Low,High" bitfld.long 0x0 24. " SID_6 ,Standard ID Bit 6" "Low,High" bitfld.long 0x0 23. " SID_5 ,Standard ID Bit 5" "Low,High" textline " " bitfld.long 0x0 22. " SID_4 ,Standard ID Bit 4" "Low,High" bitfld.long 0x0 21. " SID_3 ,Standard ID Bit 3" "Low,High" bitfld.long 0x0 20. " SID_2 ,Standard ID Bit 2" "Low,High" textline " " bitfld.long 0x0 19. " SID_1 ,Standard ID Bit 1" "Low,High" bitfld.long 0x0 18. " SID_0 ,Standard ID Bit 0" "Low,High" bitfld.long 0x0 17. " EID_17 ,Extended ID Bit 17" "Low,High" textline " " bitfld.long 0x0 16. " EID_16 ,Extended ID Bit 16" "Low,High" bitfld.long 0x0 15. " EID_15 ,Extended ID Bit 15" "Low,High" bitfld.long 0x0 14. " EID_14 ,Extended ID Bit 14" "Low,High" textline " " bitfld.long 0x0 13. " EID_13 ,Extended ID Bit 13" "Low,High" bitfld.long 0x0 12. " EID_12 ,Extended ID Bit 12" "Low,High" bitfld.long 0x0 11. " EID_11 ,Extended ID Bit 11" "Low,High" textline " " bitfld.long 0x0 10. " EID_10 ,Extended ID Bit 10" "Low,High" bitfld.long 0x0 9. " EID_9 ,Extended ID Bit 9" "Low,High" bitfld.long 0x0 8. " EID_8 ,Extended ID Bit 8" "Low,High" textline " " bitfld.long 0x0 7. " EID_7 ,Extended ID Bit 7" "Low,High" bitfld.long 0x0 6. " EID_6 ,Extended ID Bit 6" "Low,High" bitfld.long 0x0 5. " EID_5 ,Extended ID Bit 5" "Low,High" textline " " bitfld.long 0x0 4. " EID_4 ,Extended ID Bit 4" "Low,High" bitfld.long 0x0 3. " EID_3 ,Extended ID Bit 3" "Low,High" bitfld.long 0x0 2. " EID_2 ,Extended ID Bit 2" "Low,High" textline " " bitfld.long 0x0 1. " EID_1 ,Extended ID Bit 1" "Low,High" bitfld.long 0x0 0. " EID_0 ,Extended ID Bit 0" "Low,High" else hgroup.long 0x3F0++0x03 hide.long 0x00 "C1MB0_ID,CAN1 Mailbox 0 Register" endif group.word (0x3F0+0x04)++0x1 line.word 0x00 "C1MB0_DLC,CAN1 Mailbox 0 Data Length Code Register" bitfld.word 0x0 0.--3. " DLC ,Data Length Code Bits" "0 byte,1 byte,2 bytes,3 bytes,4 bytes,5 bytes,6 bytes,7 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes,8 bytes" group.byte (0x3F0+0x06)++0x07 line.byte 0x00 "C1MB0_D0,CAN1 Mailbox 0 Data byte 0 Register" line.byte 0x01 "C1MB0_D1,CAN1 Mailbox 0 Data byte 1 Register" line.byte 0x02 "C1MB0_D2,CAN1 Mailbox 0 Data byte 2 Register" line.byte 0x03 "C1MB0_D3,CAN1 Mailbox 0 Data byte 3 Register" line.byte 0x04 "C1MB0_D4,CAN1 Mailbox 0 Data byte 4 Register" line.byte 0x05 "C1MB0_D5,CAN1 Mailbox 0 Data byte 5 Register" line.byte 0x06 "C1MB0_D6,CAN1 Mailbox 0 Data byte 6 Register" line.byte 0x07 "C1MB0_D7,CAN1 Mailbox 0 Data byte 7 Register" group.word (0x3F0+0x0e)++0x01 line.word 0x00 "C1MB0_TS,CAN1 Mailbox 0 Time Stamp Register" hexmask.word.byte 0x00 8.--15. 1. " TSH ,Time Stamp Higher Byte" hexmask.word.byte 0x00 0.--7. 1. " TSL ,Time Stamp Lower Byte" tree.end tree.end width 9. tree "Mailbox Interrupt Registers" if (((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.long 0x42c++0x03 line.long 0x0 "C1MIER1,CAN1 Mailbox Interrupt Enable Register 1" bitfld.long 0x00 31. " MB_63 ,Mailbox 63 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB_62 ,Mailbox 62 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB_61 ,Mailbox 61 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB_60 ,Mailbox 60 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB_59 ,Mailbox 59 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB_58 ,Mailbox 58 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB_57 ,Mailbox 57 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB_56 ,Mailbox 56 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB_55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB_54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB_53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB_52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB_51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB_50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB_49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB_48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB_47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB_46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB_45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB_44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB_43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB_42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB_41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB_40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB_39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB_38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB_37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB_36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB_35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB_34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB_33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB_32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" else group.long 0x42C++0x03 line.long 0x0 "C1MR1,CAN1 Mailbox Interrupt Enable Register 1" sif (cpu()=="RCARH2") bitfld.long 0x00 29. " MB_61 ,Receive FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" textline " " bitfld.long 0x00 28. " MB_60 ,Receive FIFO Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB_57 ,Transmit FIFO Interrupt Generation Timing Control" "Every time,Buffer warning" bitfld.long 0x00 24. " MB_56 ,Transmit FIFO Interrupt Enable" "Disabled,Enabled" endif bitfld.long 0x00 23. " MB_55 ,Mailbox 55 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB_54 ,Mailbox 54 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB_53 ,Mailbox 53 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB_52 ,Mailbox 52 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB_51 ,Mailbox 51 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB_50 ,Mailbox 50 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB_49 ,Mailbox 49 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB_48 ,Mailbox 48 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB_47 ,Mailbox 47 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB_46 ,Mailbox 46 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB_45 ,Mailbox 45 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB_44 ,Mailbox 44 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB_43 ,Mailbox 43 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB_42 ,Mailbox 42 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB_41 ,Mailbox 41 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB_40 ,Mailbox 40 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB_39 ,Mailbox 39 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB_38 ,Mailbox 38 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB_37 ,Mailbox 37 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB_36 ,Mailbox 36 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB_35 ,Mailbox 35 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB_34 ,Mailbox 34 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB_33 ,Mailbox 33 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB_32 ,Mailbox 32 Interrupt enabled" "Disabled,Enabled" endif group.long 0x43c++0x03 line.long 0x0 "C1MIER0,CAN1 Mailbox Interrupt Enable Register 0" bitfld.long 0x00 31. " MB_31IE ,Mailbox 31 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 30. " MB_30IE ,Mailbox 30 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 29. " MB_29IE ,Mailbox 29 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " MB_28IE ,Mailbox 28 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 27. " MB_27IE ,Mailbox 27 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 26. " MB_26IE ,Mailbox 26 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " MB_25IE ,Mailbox 25 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 24. " MB_24IE ,Mailbox 24 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 23. " MB_23IE ,Mailbox 23 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " MB_22IE ,Mailbox 22 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 21. " MB_21IE ,Mailbox 21 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 20. " MB_20IE ,Mailbox 20 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " MB_19IE ,Mailbox 19 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 18. " MB_18IE ,Mailbox 18 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 17. " MB_17IE ,Mailbox 17 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " MB_16IE ,Mailbox 16 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 15. " MB_15IE ,Mailbox 15 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 14. " MB_14IE ,Mailbox 14 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " MB_13IE ,Mailbox 13 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 12. " MB_12IE ,Mailbox 12 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 11. " MB_11IE ,Mailbox 11 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " MB_10IE ,Mailbox 10 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 9. " MB_9IE ,Mailbox 9 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 8. " MB_8IE ,Mailbox 8 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " MB_7IE ,Mailbox 7 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 6. " MB_6IE ,Mailbox 6 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 5. " MB_5IE ,Mailbox 5 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " MB_4IE ,Mailbox 4 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 3. " MB_3IE ,Mailbox 3 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 2. " MB_2IE ,Mailbox 2 Interrupt enabled" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " MB_1IE ,Mailbox 1 Interrupt enabled" "Disabled,Enabled" bitfld.long 0x00 0. " MB_0IE ,Mailbox 0 Interrupt enabled" "Disabled,Enabled" tree.end tree.end tree "Message Control Registers" if (((per.b(ad:0xE6E88000+0x800+0x0))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x0))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x0))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x0)++0x0 line.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x0)++0x0 hide.byte 0x00 "C1MCTL63,CAN1 Message Control Register 63" endif if (((per.b(ad:0xE6E88000+0x800+0x1))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x1))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x1))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x1)++0x0 line.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x1)++0x0 hide.byte 0x00 "C1MCTL62,CAN1 Message Control Register 62" endif if (((per.b(ad:0xE6E88000+0x800+0x2))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x2))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x2))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x2)++0x0 line.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x2)++0x0 hide.byte 0x00 "C1MCTL61,CAN1 Message Control Register 61" endif if (((per.b(ad:0xE6E88000+0x800+0x3))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x3))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x3))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x3)++0x0 line.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x3)++0x0 hide.byte 0x00 "C1MCTL60,CAN1 Message Control Register 60" endif if (((per.b(ad:0xE6E88000+0x800+0x4))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x4))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x4))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x4)++0x0 line.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x4)++0x0 hide.byte 0x00 "C1MCTL59,CAN1 Message Control Register 59" endif if (((per.b(ad:0xE6E88000+0x800+0x5))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x5))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x5))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x5)++0x0 line.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x5)++0x0 hide.byte 0x00 "C1MCTL58,CAN1 Message Control Register 58" endif if (((per.b(ad:0xE6E88000+0x800+0x6))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x6))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x6))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x6)++0x0 line.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x6)++0x0 hide.byte 0x00 "C1MCTL57,CAN1 Message Control Register 57" endif if (((per.b(ad:0xE6E88000+0x800+0x7))&0xc0)==0x40)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x7))&0xc0)==0x80)&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x800+0x7))&0xc0)==(0xc0||0x00))&&(((per.w(ad:0xE6E88000+0x840))&0x1)==0x0) group.byte (0x800+0x7)++0x0 line.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." else hgroup.byte (0x800+0x7)++0x0 hide.byte 0x00 "C1MCTL56,CAN1 Message Control Register 56" endif if (((per.b(ad:0xE6E88000+0x808+0x0))&0xc0)==0x40) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C1MCTL55,CAN1 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x0))&0xc0)==0x80) group.byte (0x808+0x0)++0x0 line.byte 0x00 "C1MCTL55,CAN1 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x0)++0x0 line.byte 0x00 "C1MCTL55,CAN1 Message Control Register 55" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x1))&0xc0)==0x40) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C1MCTL54,CAN1 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x1))&0xc0)==0x80) group.byte (0x808+0x1)++0x0 line.byte 0x00 "C1MCTL54,CAN1 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x1)++0x0 line.byte 0x00 "C1MCTL54,CAN1 Message Control Register 54" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x2))&0xc0)==0x40) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C1MCTL53,CAN1 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x2))&0xc0)==0x80) group.byte (0x808+0x2)++0x0 line.byte 0x00 "C1MCTL53,CAN1 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x2)++0x0 line.byte 0x00 "C1MCTL53,CAN1 Message Control Register 53" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x3))&0xc0)==0x40) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C1MCTL52,CAN1 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x3))&0xc0)==0x80) group.byte (0x808+0x3)++0x0 line.byte 0x00 "C1MCTL52,CAN1 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x3)++0x0 line.byte 0x00 "C1MCTL52,CAN1 Message Control Register 52" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x4))&0xc0)==0x40) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C1MCTL51,CAN1 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x4))&0xc0)==0x80) group.byte (0x808+0x4)++0x0 line.byte 0x00 "C1MCTL51,CAN1 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x4)++0x0 line.byte 0x00 "C1MCTL51,CAN1 Message Control Register 51" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x5))&0xc0)==0x40) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C1MCTL50,CAN1 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x5))&0xc0)==0x80) group.byte (0x808+0x5)++0x0 line.byte 0x00 "C1MCTL50,CAN1 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x5)++0x0 line.byte 0x00 "C1MCTL50,CAN1 Message Control Register 50" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x6))&0xc0)==0x40) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C1MCTL49,CAN1 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x6))&0xc0)==0x80) group.byte (0x808+0x6)++0x0 line.byte 0x00 "C1MCTL49,CAN1 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x6)++0x0 line.byte 0x00 "C1MCTL49,CAN1 Message Control Register 49" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x7))&0xc0)==0x40) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C1MCTL48,CAN1 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x7))&0xc0)==0x80) group.byte (0x808+0x7)++0x0 line.byte 0x00 "C1MCTL48,CAN1 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x7)++0x0 line.byte 0x00 "C1MCTL48,CAN1 Message Control Register 48" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x8))&0xc0)==0x40) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C1MCTL47,CAN1 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x8))&0xc0)==0x80) group.byte (0x808+0x8)++0x0 line.byte 0x00 "C1MCTL47,CAN1 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x8)++0x0 line.byte 0x00 "C1MCTL47,CAN1 Message Control Register 47" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x9))&0xc0)==0x40) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C1MCTL46,CAN1 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x9))&0xc0)==0x80) group.byte (0x808+0x9)++0x0 line.byte 0x00 "C1MCTL46,CAN1 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x9)++0x0 line.byte 0x00 "C1MCTL46,CAN1 Message Control Register 46" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xA))&0xc0)==0x40) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C1MCTL45,CAN1 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xA))&0xc0)==0x80) group.byte (0x808+0xA)++0x0 line.byte 0x00 "C1MCTL45,CAN1 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xA)++0x0 line.byte 0x00 "C1MCTL45,CAN1 Message Control Register 45" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xB))&0xc0)==0x40) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C1MCTL44,CAN1 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xB))&0xc0)==0x80) group.byte (0x808+0xB)++0x0 line.byte 0x00 "C1MCTL44,CAN1 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xB)++0x0 line.byte 0x00 "C1MCTL44,CAN1 Message Control Register 44" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xC))&0xc0)==0x40) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C1MCTL43,CAN1 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xC))&0xc0)==0x80) group.byte (0x808+0xC)++0x0 line.byte 0x00 "C1MCTL43,CAN1 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xC)++0x0 line.byte 0x00 "C1MCTL43,CAN1 Message Control Register 43" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xD))&0xc0)==0x40) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C1MCTL42,CAN1 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xD))&0xc0)==0x80) group.byte (0x808+0xD)++0x0 line.byte 0x00 "C1MCTL42,CAN1 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xD)++0x0 line.byte 0x00 "C1MCTL42,CAN1 Message Control Register 42" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xE))&0xc0)==0x40) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C1MCTL41,CAN1 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xE))&0xc0)==0x80) group.byte (0x808+0xE)++0x0 line.byte 0x00 "C1MCTL41,CAN1 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xE)++0x0 line.byte 0x00 "C1MCTL41,CAN1 Message Control Register 41" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0xF))&0xc0)==0x40) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C1MCTL40,CAN1 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0xF))&0xc0)==0x80) group.byte (0x808+0xF)++0x0 line.byte 0x00 "C1MCTL40,CAN1 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0xF)++0x0 line.byte 0x00 "C1MCTL40,CAN1 Message Control Register 40" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x10))&0xc0)==0x40) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C1MCTL39,CAN1 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x10))&0xc0)==0x80) group.byte (0x808+0x10)++0x0 line.byte 0x00 "C1MCTL39,CAN1 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x10)++0x0 line.byte 0x00 "C1MCTL39,CAN1 Message Control Register 39" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x11))&0xc0)==0x40) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C1MCTL38,CAN1 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x11))&0xc0)==0x80) group.byte (0x808+0x11)++0x0 line.byte 0x00 "C1MCTL38,CAN1 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x11)++0x0 line.byte 0x00 "C1MCTL38,CAN1 Message Control Register 38" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x12))&0xc0)==0x40) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C1MCTL37,CAN1 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x12))&0xc0)==0x80) group.byte (0x808+0x12)++0x0 line.byte 0x00 "C1MCTL37,CAN1 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x12)++0x0 line.byte 0x00 "C1MCTL37,CAN1 Message Control Register 37" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x13))&0xc0)==0x40) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C1MCTL36,CAN1 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x13))&0xc0)==0x80) group.byte (0x808+0x13)++0x0 line.byte 0x00 "C1MCTL36,CAN1 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x13)++0x0 line.byte 0x00 "C1MCTL36,CAN1 Message Control Register 36" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x14))&0xc0)==0x40) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C1MCTL35,CAN1 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x14))&0xc0)==0x80) group.byte (0x808+0x14)++0x0 line.byte 0x00 "C1MCTL35,CAN1 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x14)++0x0 line.byte 0x00 "C1MCTL35,CAN1 Message Control Register 35" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x15))&0xc0)==0x40) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C1MCTL34,CAN1 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x15))&0xc0)==0x80) group.byte (0x808+0x15)++0x0 line.byte 0x00 "C1MCTL34,CAN1 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x15)++0x0 line.byte 0x00 "C1MCTL34,CAN1 Message Control Register 34" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x16))&0xc0)==0x40) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C1MCTL33,CAN1 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x16))&0xc0)==0x80) group.byte (0x808+0x16)++0x0 line.byte 0x00 "C1MCTL33,CAN1 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x16)++0x0 line.byte 0x00 "C1MCTL33,CAN1 Message Control Register 33" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif if (((per.b(ad:0xE6E88000+0x808+0x17))&0xc0)==0x40) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C1MCTL32,CAN1 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x00 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" elif (((per.b(ad:0xE6E88000+0x808+0x17))&0xc0)==0x80) group.byte (0x808+0x17)++0x0 line.byte 0x00 "C1MCTL32,CAN1 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." textline " " bitfld.byte 0x00 4. " ONESHOT ,One-shot Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " TRMABT ,Transmission Abort Complete Flag" "Not aborted,Aborted" textline " " bitfld.byte 0x00 1. " TRMACTIVE ,Transmission-in-Progress Status Flag" "Not in progress,In progress" bitfld.byte 0x00 0. " SENTDATA ,Transmission Complete Flag" "Not completed,Completed" else group.byte (0x808+0x17)++0x0 line.byte 0x00 "C1MCTL32,CAN1 Message Control Register 32" bitfld.byte 0x00 6.--7. " TRMREQ/RECREQ ,Transmit Mailbox Request" ",Reception,Transmission,?..." endif group.byte 0x820++0x1f line.byte 0x0 "C1MCTL31,CAN1 Message Control Register 31" bitfld.byte 0x0 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x0 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x0 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x0 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1 "C1MCTL30,CAN1 Message Control Register 30" bitfld.byte 0x1 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x2 "C1MCTL29,CAN1 Message Control Register 29" bitfld.byte 0x2 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x2 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x2 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x2 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x3 "C1MCTL28,CAN1 Message Control Register 28" bitfld.byte 0x3 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x3 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x3 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x3 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x4 "C1MCTL27,CAN1 Message Control Register 27" bitfld.byte 0x4 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x4 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x4 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x4 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x5 "C1MCTL26,CAN1 Message Control Register 26" bitfld.byte 0x5 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x5 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x5 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x5 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x6 "C1MCTL25,CAN1 Message Control Register 25" bitfld.byte 0x6 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x6 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x6 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x6 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x7 "C1MCTL24,CAN1 Message Control Register 24" bitfld.byte 0x7 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x7 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x7 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x7 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x8 "C1MCTL23,CAN1 Message Control Register 23" bitfld.byte 0x8 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x8 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x8 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x8 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x9 "C1MCTL22,CAN1 Message Control Register 22" bitfld.byte 0x9 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x9 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x9 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x9 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xA "C1MCTL21,CAN1 Message Control Register 21" bitfld.byte 0xA 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xA 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xA 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xA 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xB "C1MCTL20,CAN1 Message Control Register 20" bitfld.byte 0xB 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xB 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xB 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xB 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xC "C1MCTL19,CAN1 Message Control Register 19" bitfld.byte 0xC 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xC 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xC 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xC 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xD "C1MCTL18,CAN1 Message Control Register 18" bitfld.byte 0xD 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xD 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xD 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xD 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xE "C1MCTL17,CAN1 Message Control Register 17" bitfld.byte 0xE 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xE 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xE 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xE 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0xF "C1MCTL16,CAN1 Message Control Register 16" bitfld.byte 0xF 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0xF 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0xF 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0xF 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x10 "C1MCTL15,CAN1 Message Control Register 15" bitfld.byte 0x10 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x10 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x10 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x10 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x11 "C1MCTL14,CAN1 Message Control Register 14" bitfld.byte 0x11 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x11 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x11 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x11 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x12 "C1MCTL13,CAN1 Message Control Register 13" bitfld.byte 0x12 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x12 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x12 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x12 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x13 "C1MCTL12,CAN1 Message Control Register 12" bitfld.byte 0x13 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x13 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x13 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x13 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x14 "C1MCTL11,CAN1 Message Control Register 11" bitfld.byte 0x14 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x14 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x14 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x14 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x15 "C1MCTL10,CAN1 Message Control Register 10" bitfld.byte 0x15 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x15 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x15 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x15 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x16 "C1MCTL9,CAN1 Message Control Register 9" bitfld.byte 0x16 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x16 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x16 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x16 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x17 "C1MCTL8,CAN1 Message Control Register 8" bitfld.byte 0x17 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x17 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x17 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x17 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x18 "C1MCTL7,CAN1 Message Control Register 7" bitfld.byte 0x18 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x18 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x18 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x18 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x19 "C1MCTL6,CAN1 Message Control Register 6" bitfld.byte 0x19 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x19 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x19 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x19 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1A "C1MCTL5,CAN1 Message Control Register 5" bitfld.byte 0x1A 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1A 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1A 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1A 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1B "C1MCTL4,CAN1 Message Control Register 4" bitfld.byte 0x1B 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1B 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1B 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1B 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1C "C1MCTL3,CAN1 Message Control Register 3" bitfld.byte 0x1C 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1C 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1C 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1C 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1D "C1MCTL2,CAN1 Message Control Register 2" bitfld.byte 0x1D 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1D 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1D 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1D 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1E "C1MCTL1,CAN1 Message Control Register 1" bitfld.byte 0x1E 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1E 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1E 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1E 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" line.byte 0x1F "C1MCTL0,CAN1 Message Control Register 0" bitfld.byte 0x1F 6. " RECREQ ,Receive Mailbox Request" "Not requested,Requested" bitfld.byte 0x1F 2. " MSGLOST ,Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x1F 1. " INVALDATA ,Reception-in-Progress Status Flag" "Valid,Invalid" bitfld.byte 0x1F 0. " NEWDATA ,Reception Complete Flag" "Not completed,Completed" tree.end tree "FIFO Registers" group.byte 0x848++0x0 line.byte 0x0 "C1RFCR,CAN1 Receive FIFO Control Register" bitfld.byte 0x00 7. " RFEST ,Receive FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " RFWST ,Receive FIFO Buffer Warning Status" "Not buffer warning,Buffer warning" textline " " bitfld.byte 0x00 5. " RFFST ,Receive FIFO Full Status" "Not full,Full" bitfld.byte 0x00 4. " RFMLF ,Receive FIFO Message Lost Flag" "Not lost,Lost" textline " " bitfld.byte 0x00 1.--3. " RFUST ,Receive FIFO Unread Message Number Status" "0,1,2,3,4,?..." bitfld.byte 0x00 0. " RFE ,Receive FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E88000+0x848))&0x1)==0x00) rgroup.byte 0x849++0x0 line.byte 0x0 "C1RFPCR,CAN1 Receive FIFO Pointer Control Register" else group.byte 0x849++0x0 line.byte 0x0 "C1RFPCR,CAN1 Receive FIFO Pointer Control Register" endif group.byte 0x84a++0x0 line.byte 0x0 "C1TFCR,CAN1 Transmit FIFO Control Register" bitfld.byte 0x00 7. " TFEST ,Transmit FIFO Empty Status" "Not empty,Empty" bitfld.byte 0x00 6. " TFFST ,Transmit FIFO Full Status" "Not full,Full" bitfld.byte 0x00 1.--3. " TFUST ,Transmit FIFO Unsent Message Number Status" "0,1,2,3,4,?..." textline " " bitfld.byte 0x00 0. " TFE ,Transmit FIFO Enable" "Disabled,Enabled" if (((per.b(ad:0xE6E88000+0x84a))&0x1)==0x00) rgroup.byte 0x84b++0x0 line.byte 0x0 "C1TFPCR,CAN1 Transmit FIFO Pointer Control Register" else group.byte 0x84b++0x0 line.byte 0x0 "C1TFPCR,CAN1 Transmit FIFO Pointer Control Register" endif rgroup.word 0x842++0x01 line.word 0x0 "C1STR,CAN1 Status Register" bitfld.word 0x00 14. " RECST ,Receive Status Flag" "Idle/transmission,Reception" textline " " bitfld.word 0x00 13. " TRMST ,Transmit Status Flag" "Idle/reception,Transmission/bus-off" textline " " bitfld.word 0x00 12. " BOST ,Bus-Off Status Flag" "Not in bus-off,In bus-off" bitfld.word 0x00 11. " EPST ,Error-Passive Status Flag" "Not in error-passive,In error-passive" bitfld.word 0x00 10. " SLPST ,CAN Sleep Status Flag" "Not in CAN sleep,In CAN sleep" textline " " bitfld.word 0x00 9. " HLTST ,CAN Halt Status Flag" "Not in CAN halt,In CAN halt" bitfld.word 0x00 8. " RSTST ,CAN Reset Status Flag" "Not in CAN reset,In CAN reset" bitfld.word 0x00 7. " EST ,Error Status Flag" "No error,Error" textline " " bitfld.word 0x00 6. " TABST ,Transmission Abort Status Flag" "Not occurred,Occurred" bitfld.word 0x00 5. " FMLST ,FIFO Mailbox Message Lost Status Flag" "Not occurred,Occurred" bitfld.word 0x00 4. " NMLST ,Normal Mailbox Message Lost Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 3. " TFST ,Transmit FIFO Status Flag" "Full,Not full" bitfld.word 0x00 2. " RFST ,Receive FIFO Status Flag" "Empty,Not empty" bitfld.word 0x00 1. " SDST ,SENTDATA Status Flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 0. " NDST ,NEWDATA Status Flag" "Not occurred,Occurred" tree.end textline " " wgroup.byte 0x851++0x00 line.byte 0x0 "C1CSSR,CAN1 Channel Search Support Register" rgroup.byte 0x852++0x00 line.byte 0x0 "C1MSSR,CAN1 Mailbox Search Status Register" bitfld.byte 0x00 7. " SEST ,Search Result Status" "Found,Not found" bitfld.byte 0x00 0.--5. " MBNST ,Search Result Mailbox Number Status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.byte 0x853++0x00 line.byte 0x0 "C1MSMR,CAN1 Mailbox Search Mode Register" bitfld.byte 0x00 0.--1. " MBSM ,Mailbox Search Mode Select" "Receive,Transmit,Message lost,Channel" group.word 0x856++0x01 line.word 0x0 "C1AFSR,CAN1 Acceptance Filter Support Register" group.byte 0x84c++0x01 line.byte 0x0 "C1EIER,CAN1 Error Interrupt Enable Register" bitfld.byte 0x00 7. " BLIE ,Bus Lock Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " OLIE ,Overload Frame Transmit Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 5. " ORIE ,Receive Overrun Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " BORIE ,Bus-Off Recovery Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 3. " BOEIE ,Bus-Off Entry Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 2. " EPIE ,Error-Passive Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " EWIE ,Error-Warning Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x00 0. " BEIE ,Bus Error Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C1EIFR,CAN1 Error Interrupt Factor Judge Register" bitfld.byte 0x01 7. " BLIF ,Bus Lock Detect Flag" "Not detected,Detected" bitfld.byte 0x01 6. " OLIF ,Overload Frame Transmission Detect Flag" "Not detected,Detected" bitfld.byte 0x01 5. " ORIF ,Receive Overrun Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 4. " BORIF ,Bus-Off Recovery Detect Flag" "Not detected,Detected" bitfld.byte 0x01 3. " BOEIF ,Bus-Off Entry Detect Flag" "Not detected,Detected" bitfld.byte 0x01 2. " EPIF ,Error Passive Detect Flag" "Not detected,Detected" textline " " bitfld.byte 0x01 1. " EWIF ,Error Warning Detect Flag" "Not detected,Detected" bitfld.byte 0x01 0. " BEIF ,Bus Error Detect Flag" "Not detected,Detected" rgroup.byte 0x84e++0x01 line.byte 0x0 "C1RECR,CAN1 Receive Error Count Register" line.byte 0x1 "C1TECR,CAN1 Transmit Error Count Register" group.byte 0x850++0x00 line.byte 0x0 "C1ECSR,CAN1 Error Code Store Register" bitfld.byte 0x0 7. " EDPM ,Error Display Mode Select" "First detected error,Accumulated error" textline " " bitfld.byte 0x0 6. " ADEF ,ACK Delimiter Error Flag" "No ACK delimiter,ACK delimiter" textline " " bitfld.byte 0x0 5. " BE0F ,Bit Error (dominant) Flag" "No error,Error" bitfld.byte 0x0 4. " BE1F ,Bit Error (recessive) Flag" "No error,Error" bitfld.byte 0x0 3. " CEF ,CRC Error Flag" "No error,Error" textline " " bitfld.byte 0x0 2. " AEF ,ACK Error Flag" "No error,Error" bitfld.byte 0x0 1. " FEF ,Form Error Flag" "No error,Error" bitfld.byte 0x0 0. " SEF ,Stuff Error Flag" "No error,Error" rgroup.word 0x854++0x01 line.word 0x0 "C1TSR,CAN1 Time Stamp Register" group.byte 0x858++0x00 line.byte 0x0 "C1TCR,CAN1 Test Control Register" bitfld.byte 0x0 1.--2. " TSTM ,CAN Test Mode Select" "Other,Listen-only,External loop back,Internal loop back" textline " " bitfld.byte 0x0 0. " TSTE ,CAN Test Mode Enable" "Disabled,Enabled" group.byte 0x860++0x01 line.byte 0x0 "C1IER,CAN1 Interrupt Enable Register" bitfld.byte 0x0 5. " ERSIE ,Error (ERS) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 4. " RXFIE ,Reception FIFO (RXF) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 3. " TXFIE ,Transmission FIFO (TXF) Interrupt Enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 2. " RXM0IE ,Mailbox 0 Successful Reception (RXM0) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 1. " RXM1IE ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Enable" "Disabled,Enabled" bitfld.byte 0x0 0. " TXMIE ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Enable" "Disabled,Enabled" line.byte 0x01 "C1ISR,CAN1 Interrupt Status Register" bitfld.byte 0x01 5. " ERSF ,Error (ERS) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 4. " RXFF ,Reception FIFO (RXF) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 3. " TXFF ,Transmission FIFO (TXF) Interrupt Status" "Not detected,Detected" textline " " bitfld.byte 0x01 2. " RXM0F ,Mailbox 0 Successful Reception (RXM0) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 1. " RXM1F ,Mailbox 1 to 63 Successful Reception (RXM1) Interrupt Status" "Not detected,Detected" bitfld.byte 0x01 0. " TXMF ,Mailbox 32 to 63 Successful Transmission (TXM) Interrupt Status" "Not detected,Detected" group.byte 0x863++0x00 line.byte 0x0 "C1MBSMR,CAN1 Mailbox Search Mask Register" bitfld.byte 0x0 0. " MB0SM ,Mailbox 0 Search Mask" "Not masked,Masked" width 0xb tree.end tree.end tree "MLP (MediaLB+)" base ad:0xEC520000 width 7. tree "OS62420 registers" group.long 0x00++0x03 line.long 0x00 "MLBC0,MediaLB Control 0 Register" group.long 0x0c++0x03 line.long 0x00 "MS0,MediaLB Channel Status 0 Register" group.long 0x14++0x03 line.long 0x00 "MS1,MediaLB Channel Status 1 Register" group.long 0x20++0x03 line.long 0x00 "MSS,MediaLB System Status Register" rgroup.long 0x24++0x03 line.long 0x00 "MSD,MediaLB System Data Register" group.long 0x2c++0x03 line.long 0x00 "MIEN,MediaLB Interrupt Enable Register" group.long 0x3c++0x03 line.long 0x00 "MLBC1,MediaLB Control 1 Register" group.long 0x80++0x03 line.long 0x00 "HCTL,HBI Control Register" group.long 0x88++0x17 line.long 0x00 "HCMR0,HBI Channel Mask 0 Registerr" line.long 0x04 "HCMR1,HBI Channel Mask 1 Registerr" line.long 0x08 "HCER0,HBI Channel Error 0 Register" line.long 0x0c "HCER1,HBI Channel Error 1 Register" line.long 0x10 "HCBR0,HBI Channel Busy 0 Register" line.long 0x14 "HCBR1,HBI Channel Busy 1 Register" group.long 0xc0++0x0f line.long 0x0 "MDAT0,MIF Data 0 Register" line.long 0x4 "MDAT1,MIF Data 1 Register" line.long 0x8 "MDAT2,MIF Data 2 Register" line.long 0xC "MDAT3,MIF Data 3 Register" group.long 0xD0++0x0f line.long 0x0 "MDWE0,MIF Data Write Enable 0 Register" line.long 0x4 "MDWE1,MIF Data Write Enable 1 Register" line.long 0x8 "MDWE2,MIF Data Write Enable 2 Register" line.long 0xC "MDWE3,MIF Data Write Enable 3 Register" group.long 0xe0++0x7 line.long 0x00 "MCTL,MIF Control Register" line.long 0x04 "MADR,MIF Address Register" group.long 0x3c0++0x03 line.long 0x00 "ACTL,AHB Control Register" group.long 0x3d0++0x0f line.long 0x00 "ACSR0,AHB Channel Status 0 Register" line.long 0x04 "ACSR1,AHB Channel Status 1 Register" line.long 0x08 "ACMR0,AHB Channel Mask 0 Register" line.long 0x0c "ACMR1,AHB Channel Mask 1 Register" tree.end width 9. base ad:0xEC520400 textline " " group.long 0x00++0x0f line.long 0x00 "ATM0,Automatic Transfer Mode 0 Register" bitfld.long 0x00 31. " ATMPI_31 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 31" "Disabled,Enabled" bitfld.long 0x00 30. " ATMPI_30 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 30" "Disabled,Enabled" bitfld.long 0x00 29. " ATMPI_29 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 29" "Disabled,Enabled" textline " " bitfld.long 0x00 28. " ATMPI_28 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 28" "Disabled,Enabled" bitfld.long 0x00 27. " ATMPI_27 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 27" "Disabled,Enabled" bitfld.long 0x00 26. " ATMPI_26 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 26" "Disabled,Enabled" textline " " bitfld.long 0x00 25. " ATMPI_25 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 25" "Disabled,Enabled" bitfld.long 0x00 24. " ATMPI_24 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 24" "Disabled,Enabled" bitfld.long 0x00 23. " ATMPI_23 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 23" "Disabled,Enabled" textline " " bitfld.long 0x00 22. " ATMPI_22 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 22" "Disabled,Enabled" bitfld.long 0x00 21. " ATMPI_21 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 21" "Disabled,Enabled" bitfld.long 0x00 20. " ATMPI_20 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 20" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " ATMPI_19 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 19" "Disabled,Enabled" bitfld.long 0x00 18. " ATMPI_18 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 18" "Disabled,Enabled" bitfld.long 0x00 17. " ATMPI_17 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 17" "Disabled,Enabled" textline " " bitfld.long 0x00 16. " ATMPI_16 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 16" "Disabled,Enabled" bitfld.long 0x00 15. " ATMPI_15 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 15" "Disabled,Enabled" bitfld.long 0x00 14. " ATMPI_14 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 14" "Disabled,Enabled" textline " " bitfld.long 0x00 13. " ATMPI_13 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 13" "Disabled,Enabled" bitfld.long 0x00 12. " ATMPI_12 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 12" "Disabled,Enabled" bitfld.long 0x00 11. " ATMPI_11 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 11" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " ATMPI_10 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 10" "Disabled,Enabled" bitfld.long 0x00 9. " ATMPI_9 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 9" "Disabled,Enabled" bitfld.long 0x00 8. " ATMPI_8 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 8" "Disabled,Enabled" textline " " bitfld.long 0x00 7. " ATMPI_7 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 7" "Disabled,Enabled" bitfld.long 0x00 6. " ATMPI_6 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 6" "Disabled,Enabled" bitfld.long 0x00 5. " ATMPI_5 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ATMPI_4 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 4" "Disabled,Enabled" bitfld.long 0x00 3. " ATMPI_3 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 3" "Disabled,Enabled" bitfld.long 0x00 2. " ATMPI_2 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " ATMPI_1 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 1" "Disabled,Enabled" line.long 0x04 "ATM1,Automatic Transfer Mode 1 Register" bitfld.long 0x04 31. " ATMPI_63 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 63" "Disabled,Enabled" bitfld.long 0x04 30. " ATMPI_62 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 62" "Disabled,Enabled" bitfld.long 0x04 29. " ATMPI_61 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 61" "Disabled,Enabled" textline " " bitfld.long 0x04 28. " ATMPI_60 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 60" "Disabled,Enabled" bitfld.long 0x04 27. " ATMPI_59 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 59" "Disabled,Enabled" bitfld.long 0x04 26. " ATMPI_58 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 58" "Disabled,Enabled" textline " " bitfld.long 0x04 25. " ATMPI_57 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 57" "Disabled,Enabled" bitfld.long 0x04 24. " ATMPI_56 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 56" "Disabled,Enabled" bitfld.long 0x04 23. " ATMPI_55 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 55" "Disabled,Enabled" textline " " bitfld.long 0x04 22. " ATMPI_54 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 54" "Disabled,Enabled" bitfld.long 0x04 21. " ATMPI_53 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 53" "Disabled,Enabled" bitfld.long 0x04 20. " ATMPI_52 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 52" "Disabled,Enabled" textline " " bitfld.long 0x04 19. " ATMPI_51 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 51" "Disabled,Enabled" bitfld.long 0x04 18. " ATMPI_50 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 50" "Disabled,Enabled" bitfld.long 0x04 17. " ATMPI_49 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 49" "Disabled,Enabled" textline " " bitfld.long 0x04 16. " ATMPI_48 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 48" "Disabled,Enabled" bitfld.long 0x04 15. " ATMPI_47 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 47" "Disabled,Enabled" bitfld.long 0x04 14. " ATMPI_46 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 46" "Disabled,Enabled" textline " " bitfld.long 0x04 13. " ATMPI_45 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 45" "Disabled,Enabled" bitfld.long 0x04 12. " ATMPI_44 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 44" "Disabled,Enabled" bitfld.long 0x04 11. " ATMPI_43 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 43" "Disabled,Enabled" textline " " bitfld.long 0x04 10. " ATMPI_42 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 42" "Disabled,Enabled" bitfld.long 0x04 9. " ATMPI_41 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 41" "Disabled,Enabled" bitfld.long 0x04 8. " ATMPI_40 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 40" "Disabled,Enabled" textline " " bitfld.long 0x04 7. " ATMPI_39 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 39" "Disabled,Enabled" bitfld.long 0x04 6. " ATMPI_38 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 38" "Disabled,Enabled" bitfld.long 0x04 5. " ATMPI_37 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 37" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " ATMPI_36 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 36" "Disabled,Enabled" bitfld.long 0x04 3. " ATMPI_35 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 35" "Disabled,Enabled" bitfld.long 0x04 2. " ATMPI_34 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 34" "Disabled,Enabled" textline " " bitfld.long 0x04 1. " ATMPI_33 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 33" "Disabled,Enabled" bitfld.long 0x04 0. " ATMPI_32 ,Automatic Transfer Mode (ping buffer page) for Logial Channel 32" "Disabled,Enabled" line.long 0x08 "ATM2,Automatic Transfer Mode 2 Register" bitfld.long 0x08 31. " ATMPO_31 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 31" "Disabled,Enabled" bitfld.long 0x08 30. " ATMPO_30 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 30" "Disabled,Enabled" bitfld.long 0x08 29. " ATMPO_29 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 29" "Disabled,Enabled" textline " " bitfld.long 0x08 28. " ATMPO_28 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 28" "Disabled,Enabled" bitfld.long 0x08 27. " ATMPO_27 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 27" "Disabled,Enabled" bitfld.long 0x08 26. " ATMPO_26 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 26" "Disabled,Enabled" textline " " bitfld.long 0x08 25. " ATMPO_25 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 25" "Disabled,Enabled" bitfld.long 0x08 24. " ATMPO_24 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 24" "Disabled,Enabled" bitfld.long 0x08 23. " ATMPO_23 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 23" "Disabled,Enabled" textline " " bitfld.long 0x08 22. " ATMPO_22 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 22" "Disabled,Enabled" bitfld.long 0x08 21. " ATMPO_21 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 21" "Disabled,Enabled" bitfld.long 0x08 20. " ATMPO_20 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 20" "Disabled,Enabled" textline " " bitfld.long 0x08 19. " ATMPO_19 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 19" "Disabled,Enabled" bitfld.long 0x08 18. " ATMPO_18 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 18" "Disabled,Enabled" bitfld.long 0x08 17. " ATMPO_17 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 17" "Disabled,Enabled" textline " " bitfld.long 0x08 16. " ATMPO_16 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 16" "Disabled,Enabled" bitfld.long 0x08 15. " ATMPO_15 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 15" "Disabled,Enabled" bitfld.long 0x08 14. " ATMPO_14 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 14" "Disabled,Enabled" textline " " bitfld.long 0x08 13. " ATMPO_13 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 13" "Disabled,Enabled" bitfld.long 0x08 12. " ATMPO_12 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 12" "Disabled,Enabled" bitfld.long 0x08 11. " ATMPO_11 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 11" "Disabled,Enabled" textline " " bitfld.long 0x08 10. " ATMPO_10 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 10" "Disabled,Enabled" bitfld.long 0x08 9. " ATMPO_9 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 9" "Disabled,Enabled" bitfld.long 0x08 8. " ATMPO_8 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 8" "Disabled,Enabled" textline " " bitfld.long 0x08 7. " ATMPO_7 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 7" "Disabled,Enabled" bitfld.long 0x08 6. " ATMPO_6 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 6" "Disabled,Enabled" bitfld.long 0x08 5. " ATMPO_5 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 5" "Disabled,Enabled" textline " " bitfld.long 0x08 4. " ATMPO_4 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 4" "Disabled,Enabled" bitfld.long 0x08 3. " ATMPO_3 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 3" "Disabled,Enabled" bitfld.long 0x08 2. " ATMPO_2 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 2" "Disabled,Enabled" textline " " bitfld.long 0x08 1. " ATMPO_1 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 1" "Disabled,Enabled" line.long 0x0c "ATM3,Automatic Transfer Mode 3 Register" bitfld.long 0x0c 31. " ATMPO_63 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 63" "Disabled,Enabled" bitfld.long 0x0c 30. " ATMPO_62 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 62" "Disabled,Enabled" bitfld.long 0x0c 29. " ATMPO_61 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 61" "Disabled,Enabled" textline " " bitfld.long 0x0c 28. " ATMPO_60 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 60" "Disabled,Enabled" bitfld.long 0x0c 27. " ATMPO_59 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 59" "Disabled,Enabled" bitfld.long 0x0c 26. " ATMPO_58 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 58" "Disabled,Enabled" textline " " bitfld.long 0x0c 25. " ATMPO_57 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 57" "Disabled,Enabled" bitfld.long 0x0c 24. " ATMPO_56 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 56" "Disabled,Enabled" bitfld.long 0x0c 23. " ATMPO_55 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 55" "Disabled,Enabled" textline " " bitfld.long 0x0c 22. " ATMPO_54 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 54" "Disabled,Enabled" bitfld.long 0x0c 21. " ATMPO_53 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 53" "Disabled,Enabled" bitfld.long 0x0c 20. " ATMPO_52 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 52" "Disabled,Enabled" textline " " bitfld.long 0x0c 19. " ATMPO_51 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 51" "Disabled,Enabled" bitfld.long 0x0c 18. " ATMPO_50 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 50" "Disabled,Enabled" bitfld.long 0x0c 17. " ATMPO_49 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 49" "Disabled,Enabled" textline " " bitfld.long 0x0c 16. " ATMPO_48 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 48" "Disabled,Enabled" bitfld.long 0x0c 15. " ATMPO_47 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 47" "Disabled,Enabled" bitfld.long 0x0c 14. " ATMPO_46 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 46" "Disabled,Enabled" textline " " bitfld.long 0x0c 13. " ATMPO_45 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 45" "Disabled,Enabled" bitfld.long 0x0c 12. " ATMPO_44 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 44" "Disabled,Enabled" bitfld.long 0x0c 11. " ATMPO_43 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 43" "Disabled,Enabled" textline " " bitfld.long 0x0c 10. " ATMPO_42 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 42" "Disabled,Enabled" bitfld.long 0x0c 9. " ATMPO_41 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 41" "Disabled,Enabled" bitfld.long 0x0c 8. " ATMPO_40 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 40" "Disabled,Enabled" textline " " bitfld.long 0x0c 7. " ATMPO_39 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 39" "Disabled,Enabled" bitfld.long 0x0c 6. " ATMPO_38 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 38" "Disabled,Enabled" bitfld.long 0x0c 5. " ATMPO_37 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 37" "Disabled,Enabled" textline " " bitfld.long 0x0c 4. " ATMPO_36 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 36" "Disabled,Enabled" bitfld.long 0x0c 3. " ATMPO_35 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 35" "Disabled,Enabled" bitfld.long 0x0c 2. " ATMPO_34 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 34" "Disabled,Enabled" textline " " bitfld.long 0x0c 1. " ATMPO_33 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 33" "Disabled,Enabled" bitfld.long 0x0c 0. " ATMPO_32 ,Automatic Transfer Mode (pong buffer page) for Logial Channel 32" "Disabled,Enabled" group.long 0x80++0xB line.long 0x00 "ASM,Automatic Start Mode Register" bitfld.long 0x00 12. " ASM_3 ,Automatic Start Mode 3" "Disabled,Enabled" bitfld.long 0x00 8. " ASM_2 ,Automatic Start Mode 2" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " ASM_1 ,Automatic Start Mode 1" "Disabled,Enabled" bitfld.long 0x00 0. " ASM_0 ,Automatic Start Mode 0" "Disabled,Enabled" line.long 0x04 "ADRDEC1,Address Decode Mode 1 Register" bitfld.long 0x04 29. " ADEC_35 ,Address Decode Mode 35" "0,1" bitfld.long 0x04 28. " ADEC_34 ,Address Decode Mode 34" "0,1" bitfld.long 0x04 27. " ADEC_33 ,Address Decode Mode 33" "0,1" textline " " bitfld.long 0x04 26. " ADEC_32 ,Address Decode Mode 32" "0,1" bitfld.long 0x04 25. " ADEC_31 ,Address Decode Mode 31" "0,1" bitfld.long 0x04 24. " ADEC_30 ,Address Decode Mode 30" "0,1" textline " " bitfld.long 0x04 21. " ADEC_25 ,Address Decode Mode 25" "0,1" bitfld.long 0x04 20. " ADEC_24 ,Address Decode Mode 24" "0,1" bitfld.long 0x04 19. " ADEC_23 ,Address Decode Mode 23" "0,1" textline " " bitfld.long 0x04 18. " ADEC_22 ,Address Decode Mode 22" "0,1" bitfld.long 0x04 17. " ADEC_21 ,Address Decode Mode 21" "0,1" bitfld.long 0x04 16. " ADEC_20 ,Address Decode Mode 20" "0,1" textline " " bitfld.long 0x04 13. " ADEC_15 ,Address Decode Mode 15" "0,1" bitfld.long 0x04 12. " ADEC_14 ,Address Decode Mode 14" "0,1" bitfld.long 0x04 11. " ADEC_13 ,Address Decode Mode 13" "0,1" textline " " bitfld.long 0x04 10. " ADEC_12 ,Address Decode Mode 12" "0,1" bitfld.long 0x04 9. " ADEC_11 ,Address Decode Mode 11" "0,1" bitfld.long 0x04 8. " ADEC_10 ,Address Decode Mode 10" "0,1" textline " " bitfld.long 0x04 5. " ADEC_5 ,Address Decode Mode 5" "0,1" bitfld.long 0x04 4. " ADEC_4 ,Address Decode Mode 4" "0,1" bitfld.long 0x04 3. " ADEC_3 ,Address Decode Mode 3" "0,1" textline " " bitfld.long 0x04 2. " ADEC_2 ,Address Decode Mode 2" "0,1" bitfld.long 0x04 1. " ADEC_1 ,Address Decode Mode 1" "0,1" bitfld.long 0x04 0. " ADEC_0 ,Address Decode Mode 0" "0,1" line.long 0x08 "ADRDEC2,Address Decode Mode 2 Register" bitfld.long 0x08 29. " ADEC_75 ,Address Decode Mode 75" "0,1" bitfld.long 0x08 28. " ADEC_74 ,Address Decode Mode 74" "0,1" bitfld.long 0x08 27. " ADEC_73 ,Address Decode Mode 73" "0,1" textline " " bitfld.long 0x08 26. " ADEC_72 ,Address Decode Mode 72" "0,1" bitfld.long 0x08 25. " ADEC_71 ,Address Decode Mode 71" "0,1" bitfld.long 0x08 24. " ADEC_70 ,Address Decode Mode 70" "0,1" textline " " bitfld.long 0x08 21. " ADEC_65 ,Address Decode Mode 65" "0,1" bitfld.long 0x08 20. " ADEC_64 ,Address Decode Mode 64" "0,1" bitfld.long 0x08 19. " ADEC_63 ,Address Decode Mode 63" "0,1" textline " " bitfld.long 0x08 18. " ADEC_62 ,Address Decode Mode 62" "0,1" bitfld.long 0x08 17. " ADEC_61 ,Address Decode Mode 61" "0,1" bitfld.long 0x08 16. " ADEC_60 ,Address Decode Mode 60" "0,1" textline " " bitfld.long 0x08 13. " ADEC_55 ,Address Decode Mode 55" "0,1" bitfld.long 0x08 12. " ADEC_54 ,Address Decode Mode 54" "0,1" bitfld.long 0x08 11. " ADEC_53 ,Address Decode Mode 53" "0,1" textline " " bitfld.long 0x08 10. " ADEC_52 ,Address Decode Mode 52" "0,1" bitfld.long 0x08 9. " ADEC_51 ,Address Decode Mode 51" "0,1" bitfld.long 0x08 8. " ADEC_50 ,Address Decode Mode 50" "0,1" textline " " bitfld.long 0x08 5. " ADEC_45 ,Address Decode Mode 45" "0,1" bitfld.long 0x08 4. " ADEC_44 ,Address Decode Mode 44" "0,1" bitfld.long 0x08 3. " ADEC_43 ,Address Decode Mode 43" "0,1" textline " " bitfld.long 0x08 2. " ADEC_42 ,Address Decode Mode 42" "0,1" bitfld.long 0x08 1. " ADEC_41 ,Address Decode Mode 41" "0,1" bitfld.long 0x08 0. " ADEC_40 ,Address Decode Mode 40" "0,1" group.long 0x100++0x03 line.long 0x00 "BBCR,AA2S Bridge Control Register" bitfld.long 0x00 0.--1. " EN ,Fix these bits to 11" "0,1,2,3" group.long 0x200++0x03 line.long 0x00 "PHYCTRL,MLP-PHY Control Register" bitfld.long 0x00 2. " MLB_PLLEN ,PLL Control 2" "Disabled,Enabled" width 0xb tree.end tree "MLM (MediaLB+ Local Memory)" base ad:0xECC04028 width 11. group.long 0x00++0x3 line.long 0x00 "BUFF_ADDR,Top Address of Buffer Memory for Audio Data transfer" button "BUFF_ADDR" "d ad:(ad:0xECC00000)--ad:(ad:0xECC00000+0x1FFC) /long" textline " " tree "Channel 0 Control Registers" width 9. group.long (0x00+0x0)++0x03 line.long 0x00 "DCR0,DMA Control 0 Register" bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" wgroup.long (0x04+0x0)++0x07 line.long 0x00 "DCMDR0,DMA Command 0 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DS_TPR0,DMA Stop 0 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x0)++0x03 line.long 0x00 "DS_TSR0,DMA Status 0 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x0)++0x03 line.long 0x00 "DMDR0,Buffer Size Control 0 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 1 Control Registers" width 9. group.long (0x00+0x40)++0x03 line.long 0x00 "DCR1,DMA Control 1 Register" bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" wgroup.long (0x04+0x40)++0x07 line.long 0x00 "DCMDR1,DMA Command 1 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DS_TPR1,DMA Stop 1 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x40)++0x03 line.long 0x00 "DS_TSR1,DMA Status 1 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x40)++0x03 line.long 0x00 "DMDR1,Buffer Size Control 1 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 2 Control Registers" width 9. group.long (0x00+0x80)++0x03 line.long 0x00 "DCR2,DMA Control 2 Register" bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" wgroup.long (0x04+0x80)++0x07 line.long 0x00 "DCMDR2,DMA Command 2 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DS_TPR2,DMA Stop 2 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0x80)++0x03 line.long 0x00 "DS_TSR2,DMA Status 2 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0x80)++0x03 line.long 0x00 "DMDR2,Buffer Size Control 2 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end tree "Channel 3 Control Registers" width 9. group.long (0x00+0xC0)++0x03 line.long 0x00 "DCR3,DMA Control 3 Register" bitfld.long 0x00 13. " SMDL ,Transfer Source Module Select" "MLP,SSI/SCU/DTCP" bitfld.long 0x00 5. " DMDL ,Transfer Destination Module Select" "MLP,SSI/SCU/DTCP" wgroup.long (0x04+0xC0)++0x07 line.long 0x00 "DCMDR3,DMA Command 3 Register" bitfld.long 0x00 0. " DMEN ,Activates DMA" "No effect,Activated" line.long 0x04 "DS_TPR3,DMA Stop 3 Register" bitfld.long 0x04 0. " DMSTP ,Stops DMA transfer" "No effect,Stopped" rgroup.long (0x0c+0xC0)++0x03 line.long 0x00 "DS_TSR3,DMA Status 3 Register" bitfld.long 0x00 0. " DMSTS , DMA State" "Stopped,Activated" group.long (0x14+0xC0)++0x03 line.long 0x00 "DMDR3,Buffer Size Control 3 Register" hexmask.long.word 0x00 0.--9. 1. " DMDPT ,Buffer Size Specification" tree.end textline " " rgroup.long 0xfe4++0x03 line.long 0x00 "DINTSR,Interrupt Status Register" bitfld.long 0x00 14. " DTE_32 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 13. " DTE_31 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 12. " DTE_30 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 10. " DTE_22 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 9. " DTE_21 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 8. " DTE_20 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 6. " DTE_12 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 5. " DTE_11 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 4. " DTE_10 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" textline " " bitfld.long 0x00 2. " DTE_02 ,First plane write end interrupt" "No interrupt,Interupt" bitfld.long 0x00 1. " DTE_01 ,Buffer full/empty interrupt" "No interrupt,Interupt" bitfld.long 0x00 0. " DTE_00 ,Buffer overflow/underflow error interrupt" "No interrupt,Interupt" wgroup.long 0xfec++0x03 line.long 0x00 "DINTCR,Interrupt Clear Register" bitfld.long 0x00 14. " DTEC_32 ,First plane write end interupt clear" "Not cleared,Cleared" bitfld.long 0x00 13. " DTEC_31 ,Buffer full/empty interupt clear" "Not cleared,Cleared" bitfld.long 0x00 12. " DTEC_30 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 10. " DTEC_22 ,First plane write end interupt clear" "Not cleared,Cleared" bitfld.long 0x00 9. " DTEC_21 ,Buffer full/empty interupt clear" "Not cleared,Cleared" bitfld.long 0x00 8. " DTEC_20 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 6. " DTEC_12 ,First plane write end interupt clear" "Not cleared,Cleared" bitfld.long 0x00 5. " DTEC_11 ,Buffer full/empty interupt clear" "Not cleared,Cleared" bitfld.long 0x00 4. " DTEC_10 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" textline " " bitfld.long 0x00 2. " DTEC_02 ,First plane write end interupt clear" "Not cleared,Cleared" bitfld.long 0x00 1. " DTEC_01 ,Buffer full/empty interupt clear" "Not cleared,Cleared" bitfld.long 0x00 0. " DTEC_00 ,Buffer overflow/underflow error interupt clear" "Not cleared,Cleared" group.long 0xff4++0x03 line.long 0x00 "DINTMR,Interrupt Enable Register" bitfld.long 0x00 14. " DTEM_32 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 13. " DTEM_31 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 12. " DTEM_30 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 10. " DTEM_22 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 9. " DTEM_21 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " DTEM_20 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 6. " DTEM_12 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " DTEM_11 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " DTEM_10 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 2. " DTEM_02 ,First plane write end interupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " DTEM_01 ,Buffer full/empty interupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " DTEM_00 ,Buffer overflow/underflow error interupt enable" "Disabled,Enabled" rgroup.long 0xffc++0x03 line.long 0x00 "DACTSR,DMA Activation State Register" bitfld.long 0x00 3. " DS_3 ,DMA Channel 3 State" "Idle,Act" bitfld.long 0x00 2. " DS_2 ,DMA Channel 2 State" "Idle,Act" textline " " bitfld.long 0x00 1. " DS_1 ,DMA Channel 1 State" "Idle,Act" bitfld.long 0x00 0. " DS_0 ,DMA Channel 0 State" "Idle,Act" group.long 0x1018++0x1f line.long 0x0 "SRSTR0,Software Reset 0 Register" eventfld.long 0x0 0. " SRST ,Channel 0 Software Reset" "No reset,Reset" line.long 0x4 "SRSTR1,Software Reset 1 Register" eventfld.long 0x4 0. " SRST ,Channel 1 Software Reset" "No reset,Reset" line.long 0x8 "SRSTR2,Software Reset 2 Register" eventfld.long 0x8 0. " SRST ,Channel 2 Software Reset" "No reset,Reset" line.long 0xC "SRSTR3,Software Reset 3 Register" eventfld.long 0xC 0. " SRST ,Channel 3 Software Reset" "No reset,Reset" if (0<2) group.long 0x3D8++0x3 line.long 0x00 "MODE0,Mode 0 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else group.long 0x3D8++0x3 line.long 0x00 "MODE0,Mode 0 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif textline " " group.long (0x3D8+0x04)++0x3 line.long 0x00 "SMODE0,Source Mode 0 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" textline " " group.long (0x3D8+0x08)++0x3 line.long 0x00 "DALIGN0,Data Alignment 0 Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (1<2) group.long 0x418++0x3 line.long 0x00 "MODE1,Mode 1 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else group.long 0x418++0x3 line.long 0x00 "MODE1,Mode 1 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif textline " " group.long (0x418+0x04)++0x3 line.long 0x00 "SMODE1,Source Mode 1 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" textline " " group.long (0x418+0x08)++0x3 line.long 0x00 "DALIGN1,Data Alignment 1 Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (2<2) group.long 0x458++0x3 line.long 0x00 "MODE2,Mode 2 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else group.long 0x458++0x3 line.long 0x00 "MODE2,Mode 2 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif textline " " group.long (0x458+0x04)++0x3 line.long 0x00 "SMODE2,Source Mode 2 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" textline " " group.long (0x458+0x08)++0x3 line.long 0x00 "DALIGN2,Data Alignment 2 Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" if (3<2) group.long 0x498++0x3 line.long 0x00 "MODE3,Mode 3 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 8. " CRYPT ,CRYPT" "Not crypt,Crypt" textline " " bitfld.long 0x00 4. " DTCP ,DTCP" "Not DCPT,DTCP" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" else group.long 0x498++0x3 line.long 0x00 "MODE3,Mode 3 Register" bitfld.long 0x00 20. " SFT_DIR ,Select Bit Shift direction" "Left,Right" bitfld.long 0x00 16.--19. " SFT_NUM ,Select Bit Shift length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x00 0. " DMA ,DMA" "PIO,DMA" endif textline " " group.long (0x498+0x04)++0x3 line.long 0x00 "SMODE3,Source Mode 3 Register" bitfld.long 0x00 0.--3. " SOURCE_MODE ,Select Source Sound Mode" "6ch/24 bit/96 kHz,6ch/24 bit/48 kHz,6ch/16 bit/96 kHz,6ch/16 bit/48 kHz,2ch/24 bit/192 kHz,2ch/24 bit/96 kHz,2ch/24 bit/48 kHz,2ch/16 bit/192 kHz,2ch/16 bit/96 kHz,2ch/16 bit/48 kHz,,6ch/16 bit/192 kHz,8ch/24 bit/96 kHz,8ch/24 bit/48 kHz,8ch/16 bit/96 kHz,8ch/16 bit/48 kHz" textline " " group.long (0x498+0x08)++0x3 line.long 0x00 "DALIGN3,Data Alignment 3 Register" bitfld.long 0x00 28.--30. " PLACE_7 ,Exchange Stream Data 7" "0,1,2,3,4,5,6,7" bitfld.long 0x00 24.--26. " PLACE_6 ,Exchange Stream Data 6" "0,1,2,3,4,5,6,7" bitfld.long 0x00 20.--22. " PLACE_5 ,Exchange Stream Data 5" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 16.--18. " PLACE_4 ,Exchange Stream Data 4" "0,1,2,3,4,5,6,7" bitfld.long 0x00 12.--14. " PLACE_3 ,Exchange Stream Data 3" "0,1,2,3,4,5,6,7" bitfld.long 0x00 8.--10. " PLACE_2 ,Exchange Stream Data 2" "0,1,2,3,4,5,6,7" textline " " bitfld.long 0x00 4.--6. " PLACE_1 ,Exchange Stream Data 1" "0,1,2,3,4,5,6,7" bitfld.long 0x00 0.--2. " PLACE_0 ,Exchange Stream Data 0" "0,1,2,3,4,5,6,7" textline " " width 12. rgroup.long 0x17D8++0x3 line.long 0x00 "BUSIFST,Bus Interface Status Register" bitfld.long 0x00 19. " WR_NOT_FULL_3 ,Transmission Buffer Status 3" "Full,Not full" bitfld.long 0x00 18. " WR_NOT_FULL_2 ,Transmission Buffer Status 2" "Full,Not full" textline " " bitfld.long 0x00 17. " WR_NOT_FULL_1 ,Transmission Buffer Status 1" "Full,Not full" bitfld.long 0x00 16. " WR_NOT_FULL_0 ,Transmission Buffer Status 0" "Full,Not full" textline " " bitfld.long 0x00 3. " RD_NOT_EMPTY_3 ,Receive Buffer Status 3" "Empty,Not empty" bitfld.long 0x00 2. " RD_NOT_EMPTY_2 ,Receive Buffer Status 2" "Empty,Not empty" textline " " bitfld.long 0x00 1. " RD_NOT_EMPTY_1 ,Receive Buffer Status 1" "Empty,Not empty" bitfld.long 0x00 0. " RD_NOT_EMPTY_0 ,Receive Buffer Status 0" "Empty,Not empty" group.long 0x17DC++0x3 line.long 0x00 "BUSIFINTEN,Bus Interface Interrupt Enable Register" bitfld.long 0x00 19. " WR_NOT_FULL_3_IE ,Write interrupt enable 3" "Disabled,Enabled" bitfld.long 0x00 18. " WR_NOT_FULL_2_IE ,Write interrupt enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 17. " WR_NOT_FULL_1_IE ,Write interrupt enable 1" "Disabled,Enabled" bitfld.long 0x00 16. " WR_NOT_FULL_0_IE ,Write interrupt enable 0" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " RD_NOT_EMPTY_3_IE ,Read interrupt enable 3" "Disabled,Enabled" bitfld.long 0x00 2. " RD_NOT_EMPTY_2_IE ,Read interrupt enable 2" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " RD_NOT_EMPTY_1_IE ,Read interrupt enable 1" "Disabled,Enabled" bitfld.long 0x00 0. " RD_NOT_EMPTY_0_IE ,Read interrupt enable 0" "Disabled,Enabled" rgroup.long 0x3E8++0x3 line.long 0x00 "CHINTSR0,Channel 0 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL_0 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY_0 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE_02 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE_01 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE_00 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x3E8+0x8)++0x3 line.long 0x00 "CHINTEN0,Channel Interrupt Enable 0 Register" bitfld.long 0x00 20. " WR_NOT_FULL_0_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY_0_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE_02_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE_01_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE_00_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x428++0x3 line.long 0x00 "CHINTSR1,Channel 1 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL_1 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY_1 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE_12 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE_11 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE_10 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x428+0x8)++0x3 line.long 0x00 "CHINTEN1,Channel Interrupt Enable 1 Register" bitfld.long 0x00 20. " WR_NOT_FULL_1_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY_1_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE_12_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE_11_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE_10_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x468++0x3 line.long 0x00 "CHINTSR2,Channel 2 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL_2 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY_2 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE_22 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE_21 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE_20 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x468+0x8)++0x3 line.long 0x00 "CHINTEN2,Channel Interrupt Enable 2 Register" bitfld.long 0x00 20. " WR_NOT_FULL_2_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY_2_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE_22_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE_21_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE_20_IE ,Plane write complete Interrupt" "Disabled,Enabled" rgroup.long 0x4A8++0x3 line.long 0x00 "CHINTSR3,Channel 3 Interrupt Status Display Register" bitfld.long 0x00 20. " WR_NOT_FULL_3 ,Transmission Buffer Status (Write)" "Full,Not full" bitfld.long 0x00 16. " RD_NOT_EMPTY_3 ,Transmission Buffer Status (Read)" "Empty,Not empty" bitfld.long 0x00 2. " DTE_32 ,Buffer Over Flow/ Under Flow Error Interrupt" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " DTE_31 ,Buffer Full/ Empty Interrupt" "No interrupt,Interrupt" bitfld.long 0x00 0. " DTE_30 ,Plane write complete Interrupt" "No interrupt,Interrupt" group.long (0x4A8+0x8)++0x3 line.long 0x00 "CHINTEN3,Channel Interrupt Enable 3 Register" bitfld.long 0x00 20. " WR_NOT_FULL_3_IE ,Transmission Buffer Status (Write)" "Disabled,Enabled" bitfld.long 0x00 16. " RD_NOT_EMPTY_3_IE ,Transmission Buffer Status (Read)" "Disabled,Enabled" bitfld.long 0x00 2. " DTE_32_IE ,Buffer Over Flow/ Under Flow Error Interrupt" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " DTE_31_IE ,Buffer Full/ Empty Interrupt" "Disabled,Enabled" bitfld.long 0x00 0. " DTE_30_IE ,Plane write complete Interrupt" "Disabled,Enabled" tree "Buffers" width 14. base ad:0xEC020000 group.long 0x0++0x03 line.long 0x00 "PLANE_1_BUF0,1st plane of BUF0" button "Buffer" "d (ad:0xEC020000+0x0)--(ad:0xEC020000+0x0+0x1ff) /long" group.long (0x0+0x200)++0x03 line.long 0x00 "PLANE_2_BUF0,2nd plane of BUF0" button "Buffer" "d (ad:0xEC020000+0x0+0x200)--(ad:0xEC020000+0x0+0x1ff+0x200) /long" group.long 0x400++0x03 line.long 0x00 "PLANE_1_BUF1,1st plane of BUF1" button "Buffer" "d (ad:0xEC020000+0x400)--(ad:0xEC020000+0x400+0x1ff) /long" group.long (0x400+0x200)++0x03 line.long 0x00 "PLANE_2_BUF1,2nd plane of BUF1" button "Buffer" "d (ad:0xEC020000+0x400+0x200)--(ad:0xEC020000+0x400+0x1ff+0x200) /long" group.long 0x800++0x03 line.long 0x00 "PLANE_1_BUF2,1st plane of BUF2" button "Buffer" "d (ad:0xEC020000+0x800)--(ad:0xEC020000+0x800+0x1ff) /long" group.long (0x800+0x200)++0x03 line.long 0x00 "PLANE_2_BUF2,2nd plane of BUF2" button "Buffer" "d (ad:0xEC020000+0x800+0x200)--(ad:0xEC020000+0x800+0x1ff+0x200) /long" group.long 0xC00++0x03 line.long 0x00 "PLANE_1_BUF3,1st plane of BUF3" button "Buffer" "d (ad:0xEC020000+0xC00)--(ad:0xEC020000+0xC00+0x1ff) /long" group.long (0xC00+0x200)++0x03 line.long 0x00 "PLANE_2_BUF3,2nd plane of BUF3" button "Buffer" "d (ad:0xEC020000+0xC00+0x200)--(ad:0xEC020000+0xC00+0x1ff+0x200) /long" tree.end width 0xb tree.end tree "IEB (IE Bus)" base ad:0xE6EA0000 width 9. group.byte 0x0++0x0 line.byte 0x0 "IECTR,IEBus Control Register" bitfld.byte 0x0 6. " IOL ,Input/output level" "Low,High" bitfld.byte 0x0 5. " DEE ,Broadcast receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x0 3. " RE ,Receive enable" "Disabled,Enabled" wgroup.byte 0x1++0x0 line.byte 0x0 "IECMR,IEBus Command Register" bitfld.byte 0x0 0.--2. " CMD ,Command" "No operation,,Master request,Master abort,Not affected,,,Not affected" group.byte 0x2++0x5 line.byte 0x0 "IEMCR,IEBus Master Control Register" bitfld.byte 0x0 7. " SS ,Broadcast/Normal communications select" "Broadcast,Normal" bitfld.byte 0x0 4.--6. " RN ,Retransmission counts" "0,1,2,3,4,5,6,7" textline " " bitfld.byte 0x0 0.--3. " CTL ,Control" ",,,,,,,,,,,,,,,Data write" line.byte 0x1 "IEAR1,IEBus Master Unit Address Register 1" bitfld.byte 0x1 4.--7. " IARL4 ,Lower 4 bits of IEBus master unit address" "00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F" bitfld.byte 0x1 2.--3. " IMD ,IEBus communications mode" "0,1,?..." line.byte 0x2 "IEAR2,IEBus Master Unit Address Register 2" line.byte 0x3 "IESA1,IEBus Slave Address Setting Register 1" bitfld.byte 0x3 4.--7. " ISAL4 ,Lower 4 bits of IEBus slave address" "00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F" line.byte 0x4 "IESA2,IEBus Slave Address Setting Register 2" line.byte 0x5 "IETBFL,IEBus Transmit Message Length Register" rgroup.byte 0x9++0x3 line.byte 0x0 "IEMA1,IEBus Reception Master Address Register 1" bitfld.byte 0x0 4.--7. " IMAL4 ,Lower four bits of IEBus reception master address" "00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F" line.byte 0x1 "IEMA2,IEBus Reception Master Address Register 2" line.byte 0x2 "IERCTL,IEBus Receive Control Field Register" bitfld.byte 0x2 0.--3. " RCTL ,IEBus receive control field" "00,01,02,03,04,05,06,07,08,09,0A,0B,0C,0D,0E,0F" line.byte 0x3 "IERBFL,IEBus Receive Message Length Register" rgroup.byte 0x10++0x00 line.byte 0x0 "IEFLG,IEBus General Flag Register" bitfld.byte 0x0 7. " CMX ,Command execution status" "Completed,Executed" bitfld.byte 0x0 6. " MRQ ,Master communications request" "Not requested,Requested" textline " " bitfld.byte 0x0 4. " SRE ,Slave receive status" "Not executed,Executed" bitfld.byte 0x0 1. " RSS ,Receive broadcast bit status" "0,1" textline " " bitfld.byte 0x0 0. " GG ,General broadcast reception acknowledgement" "Slave/Not acknowledged,Acknowledged" group.byte 0x11++0x1 line.byte 0x0 "IETSR,IEBus Transmit Status Register" eventfld.byte 0x0 6. " TXS ,Transmit start" "Not started,Started" eventfld.byte 0x0 5. " TXF ,Transmit normal completion" "Not transmitted,Transmitted" textline " " eventfld.byte 0x0 3. " TXEAL ,Arbitration loss" "Not lost,Lost" eventfld.byte 0x0 2. " TXETTME ,Transmit timing error" "No error,Error" textline " " eventfld.byte 0x0 1. " TXERO ,Overflow of maximum number of transmit bytes in one frame" "No overflow,Overflow" eventfld.byte 0x0 0. " TXEACK ,Acknowledge bit status" "Not acknowledged,Acknowledged" line.byte 0x1 "IEIET,IEBus Transmit Interrupt Enable Register" bitfld.byte 0x1 6. " TXSE ,Transmit start interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 5. " TXFE ,Transmit normal completion interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 3. " TXEALE ,Arbitration loss interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 2. " TXETTMEE ,Transmit timing error interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 1. " TXEROE ,Overflow of maximum number of transmit bytes in one frame interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 0. " TXEACKE ,Acknowledge bit interrupt enable" "Disabled,Enabled" group.byte 0x14++0x1 line.byte 0x0 "IERSR,IEBus Receive Status Register" eventfld.byte 0x0 7. " RXBSY ,Receive busy" "Not busy,Busy" eventfld.byte 0x0 6. " RXS ,Receive start detection" "Not started,Started" textline " " eventfld.byte 0x0 5. " RXF ,Receive normal completion" "Not received,Received" eventfld.byte 0x0 4. " RXEDE ,Broadcast receive error" "No error,Error" textline " " eventfld.byte 0x0 3. " RXEOVE ,Receive overrun flag" "No overrun,Overrun" eventfld.byte 0x0 2. " RXERTME ,Receive timing error" "No error,Error" textline " " eventfld.byte 0x0 1. " RXEDLE ,Overflow of maximum number of receive bytes in one frame" "No overflow,Overflow" eventfld.byte 0x0 0. " RXEPE ,Parity error" "No error,Error" line.byte 0x1 "IEIER,IEBus Receive Interrupt Enable Register" bitfld.byte 0x1 7. " RXBSYE ,Receive busy interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 6. " RXSE ,Receive start interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 5. " RXFE ,Receive normal completion enable" "Disabled,Enabled" bitfld.byte 0x1 4. " RXEDEE ,Broadcast receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 3. " RXEOVEE ,Overrun control flag interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 2. " RXERTMEE ,Receive timing error interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x1 1. " RXEDLEE ,Overflow of maximum number of receive bytes in one frame interrupt enable" "Disabled,Enabled" bitfld.byte 0x1 0. " RXEPEE ,Parity error interrupt enable" "Disabled,Enabled" group.byte 0x18++0x2 line.byte 0x0 "IECKCYC,IEBus clock cycle register" hexmask.byte 0x0 0.--6. 1. " CKCYC ,Clock period" line.byte 0x1 "IECKHP,IEBus clock high-level width register" hexmask.byte 0x1 0.--6. 1. " CKHP ,Clock signal width at high level" line.byte 0x2 "IECKCNT,IEBus clock control register" bitfld.byte 0x2 2. " CKOEN ,Clock output enable" "Input,Output" bitfld.byte 0x2 1. " CKSS ,Clock source select" "External clock,Internal clock" textline " " bitfld.byte 0x2 0. " DIVEN ,Division period enable" "Disabled,Enabled" tree "IEBus Transmit Data Buffers" width 7. hgroup.byte (0x100+0x0)++0x0 hide.byte 0x0 " TB1 ,IEBus Transmit Data Buffer 1" in hgroup.byte (0x100+0x1)++0x0 hide.byte 0x0 " TB2 ,IEBus Transmit Data Buffer 2" in hgroup.byte (0x100+0x2)++0x0 hide.byte 0x0 " TB3 ,IEBus Transmit Data Buffer 3" in hgroup.byte (0x100+0x3)++0x0 hide.byte 0x0 " TB4 ,IEBus Transmit Data Buffer 4" in hgroup.byte (0x100+0x4)++0x0 hide.byte 0x0 " TB5 ,IEBus Transmit Data Buffer 5" in hgroup.byte (0x100+0x5)++0x0 hide.byte 0x0 " TB6 ,IEBus Transmit Data Buffer 6" in hgroup.byte (0x100+0x6)++0x0 hide.byte 0x0 " TB7 ,IEBus Transmit Data Buffer 7" in hgroup.byte (0x100+0x7)++0x0 hide.byte 0x0 " TB8 ,IEBus Transmit Data Buffer 8" in hgroup.byte (0x100+0x8)++0x0 hide.byte 0x0 " TB9 ,IEBus Transmit Data Buffer 9" in hgroup.byte (0x100+0x9)++0x0 hide.byte 0x0 " TB10 ,IEBus Transmit Data Buffer 10" in hgroup.byte (0x100+0xA)++0x0 hide.byte 0x0 " TB11 ,IEBus Transmit Data Buffer 11" in hgroup.byte (0x100+0xB)++0x0 hide.byte 0x0 " TB12 ,IEBus Transmit Data Buffer 12" in hgroup.byte (0x100+0xC)++0x0 hide.byte 0x0 " TB13 ,IEBus Transmit Data Buffer 13" in hgroup.byte (0x100+0xD)++0x0 hide.byte 0x0 " TB14 ,IEBus Transmit Data Buffer 14" in hgroup.byte (0x100+0xE)++0x0 hide.byte 0x0 " TB15 ,IEBus Transmit Data Buffer 15" in hgroup.byte (0x100+0xF)++0x0 hide.byte 0x0 " TB16 ,IEBus Transmit Data Buffer 16" in hgroup.byte (0x100+0x10)++0x0 hide.byte 0x0 " TB17 ,IEBus Transmit Data Buffer 17" in hgroup.byte (0x100+0x11)++0x0 hide.byte 0x0 " TB18 ,IEBus Transmit Data Buffer 18" in hgroup.byte (0x100+0x12)++0x0 hide.byte 0x0 " TB19 ,IEBus Transmit Data Buffer 19" in hgroup.byte (0x100+0x13)++0x0 hide.byte 0x0 " TB20 ,IEBus Transmit Data Buffer 20" in hgroup.byte (0x100+0x14)++0x0 hide.byte 0x0 " TB21 ,IEBus Transmit Data Buffer 21" in hgroup.byte (0x100+0x15)++0x0 hide.byte 0x0 " TB22 ,IEBus Transmit Data Buffer 22" in hgroup.byte (0x100+0x16)++0x0 hide.byte 0x0 " TB23 ,IEBus Transmit Data Buffer 23" in hgroup.byte (0x100+0x17)++0x0 hide.byte 0x0 " TB24 ,IEBus Transmit Data Buffer 24" in hgroup.byte (0x100+0x18)++0x0 hide.byte 0x0 " TB25 ,IEBus Transmit Data Buffer 25" in hgroup.byte (0x100+0x19)++0x0 hide.byte 0x0 " TB26 ,IEBus Transmit Data Buffer 26" in hgroup.byte (0x100+0x1A)++0x0 hide.byte 0x0 " TB27 ,IEBus Transmit Data Buffer 27" in hgroup.byte (0x100+0x1B)++0x0 hide.byte 0x0 " TB28 ,IEBus Transmit Data Buffer 28" in hgroup.byte (0x100+0x1C)++0x0 hide.byte 0x0 " TB29 ,IEBus Transmit Data Buffer 29" in hgroup.byte (0x100+0x1D)++0x0 hide.byte 0x0 " TB30 ,IEBus Transmit Data Buffer 30" in hgroup.byte (0x100+0x1E)++0x0 hide.byte 0x0 " TB31 ,IEBus Transmit Data Buffer 31" in hgroup.byte (0x100+0x1F)++0x0 hide.byte 0x0 " TB32 ,IEBus Transmit Data Buffer 32" in tree.end tree "IEBus Receive Data Buffers" hgroup.byte (0x200+0x0)++0x0 hide.byte 0x0 " RB1 ,IEBus Receive Data Buffer 1" in hgroup.byte (0x200+0x1)++0x0 hide.byte 0x0 " RB2 ,IEBus Receive Data Buffer 2" in hgroup.byte (0x200+0x2)++0x0 hide.byte 0x0 " RB3 ,IEBus Receive Data Buffer 3" in hgroup.byte (0x200+0x3)++0x0 hide.byte 0x0 " RB4 ,IEBus Receive Data Buffer 4" in hgroup.byte (0x200+0x4)++0x0 hide.byte 0x0 " RB5 ,IEBus Receive Data Buffer 5" in hgroup.byte (0x200+0x5)++0x0 hide.byte 0x0 " RB6 ,IEBus Receive Data Buffer 6" in hgroup.byte (0x200+0x6)++0x0 hide.byte 0x0 " RB7 ,IEBus Receive Data Buffer 7" in hgroup.byte (0x200+0x7)++0x0 hide.byte 0x0 " RB8 ,IEBus Receive Data Buffer 8" in hgroup.byte (0x200+0x8)++0x0 hide.byte 0x0 " RB9 ,IEBus Receive Data Buffer 9" in hgroup.byte (0x200+0x9)++0x0 hide.byte 0x0 " RB10 ,IEBus Receive Data Buffer 10" in hgroup.byte (0x200+0xA)++0x0 hide.byte 0x0 " RB11 ,IEBus Receive Data Buffer 11" in hgroup.byte (0x200+0xB)++0x0 hide.byte 0x0 " RB12 ,IEBus Receive Data Buffer 12" in hgroup.byte (0x200+0xC)++0x0 hide.byte 0x0 " RB13 ,IEBus Receive Data Buffer 13" in hgroup.byte (0x200+0xD)++0x0 hide.byte 0x0 " RB14 ,IEBus Receive Data Buffer 14" in hgroup.byte (0x200+0xE)++0x0 hide.byte 0x0 " RB15 ,IEBus Receive Data Buffer 15" in hgroup.byte (0x200+0xF)++0x0 hide.byte 0x0 " RB16 ,IEBus Receive Data Buffer 16" in hgroup.byte (0x200+0x10)++0x0 hide.byte 0x0 " RB17 ,IEBus Receive Data Buffer 17" in hgroup.byte (0x200+0x11)++0x0 hide.byte 0x0 " RB18 ,IEBus Receive Data Buffer 18" in hgroup.byte (0x200+0x12)++0x0 hide.byte 0x0 " RB19 ,IEBus Receive Data Buffer 19" in hgroup.byte (0x200+0x13)++0x0 hide.byte 0x0 " RB20 ,IEBus Receive Data Buffer 20" in hgroup.byte (0x200+0x14)++0x0 hide.byte 0x0 " RB21 ,IEBus Receive Data Buffer 21" in hgroup.byte (0x200+0x15)++0x0 hide.byte 0x0 " RB22 ,IEBus Receive Data Buffer 22" in hgroup.byte (0x200+0x16)++0x0 hide.byte 0x0 " RB23 ,IEBus Receive Data Buffer 23" in hgroup.byte (0x200+0x17)++0x0 hide.byte 0x0 " RB24 ,IEBus Receive Data Buffer 24" in hgroup.byte (0x200+0x18)++0x0 hide.byte 0x0 " RB25 ,IEBus Receive Data Buffer 25" in hgroup.byte (0x200+0x19)++0x0 hide.byte 0x0 " RB26 ,IEBus Receive Data Buffer 26" in hgroup.byte (0x200+0x1A)++0x0 hide.byte 0x0 " RB27 ,IEBus Receive Data Buffer 27" in hgroup.byte (0x200+0x1B)++0x0 hide.byte 0x0 " RB28 ,IEBus Receive Data Buffer 28" in hgroup.byte (0x200+0x1C)++0x0 hide.byte 0x0 " RB29 ,IEBus Receive Data Buffer 29" in hgroup.byte (0x200+0x1D)++0x0 hide.byte 0x0 " RB30 ,IEBus Receive Data Buffer 30" in hgroup.byte (0x200+0x1E)++0x0 hide.byte 0x0 " RB31 ,IEBus Receive Data Buffer 31" in hgroup.byte (0x200+0x1F)++0x0 hide.byte 0x0 " RB32 ,IEBus Receive Data Buffer 32" in tree.end width 0xb tree.end tree.open "SCIF (Serial Communication Interface with FIFO)" tree "Channel 0" tree "SCIF" base ad:0xE6E60000 width 9. rgroup.byte 0x14++0x00 line.byte 0x00 "SCFRDR0,Receive FIFO Data Register 0" wgroup.byte 0x0c++0x00 line.byte 0x00 "SCFTDR0,Transmit FIFO Data Register 0" if (((per.w(ad:0xE6E60000))&0xa0)==0x20) group.word 0x00++0x1 line.word 0x00 "SCSMR0,Serial Mode Register 0" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6E60000))&0xa0)==0x00) group.word 0x00++0x1 line.word 0x00 "SCSMR0,Serial Mode Register 0" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x1 line.word 0x00 "SCSMR0,Serial Mode Register 0" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6E60000))&0x80)==0x80) group.word 0x08++0x1 line.word 0x00 "SCSCR0,Serial Control Register 0" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "SCK synch,SCK synch,SCK synch," else group.word 0x08++0x1 line.word 0x00 "SCSCR0,Serial Control Register 0" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "Internal clk,Internal clk,External clk," endif group.word 0x10++0x1 line.word 0x00 "SCFSR0,Serial Status Register 0" rbitfld.word 0x00 12.--15. " PER ,Parity Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER ,Framing Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Ready,Not ready" group.byte 0x04++0x0 line.byte 0x00 "SCBRR0,Bit Rate Register 0" if (((per.w(ad:0xE6E60000))&0x80)==0x80) group.word 0x18++0x1 line.word 0x00 "SCFCR0,FIFO Control Register 0" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x1 line.word 0x00 "SCFCR0,FIFO Control Register 0" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR0,FIFO Data Count Register 0" bitfld.word 0x00 08.--12. " T ,Number Non-transmitted Data In SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 00.--04. " R ,Number Received Data In SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR0,Serial Port Register 0" bitfld.word 0x00 07. " RTSIO ,Serial Port - RTS Port Input/Output" "Not output,Output" bitfld.word 0x00 06. " RTSDT ,Serial Port - RTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 05. " CTSIO ,Serial Port - CTS Port Input/Output" "Not output,Output" bitfld.word 0x00 04. " CTSDT ,Serial Port - CTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 03. " SCKIO ,Serial Port - Clock Port Input/Output" "Not output,Output" bitfld.word 0x00 02. " SCKDT ,Serial Port - Clock Port Data" "Low level,High level" textline " " bitfld.word 0x00 01. " SPB2IO ,Serial Port - Break Input/Output" "Not output,Output" bitfld.word 0x00 00. " SPB2DT ,Serial Port - Break Data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR0,Line Status Register 0" bitfld.word 0x00 02. " TO ,Timeout" "No error,Error" bitfld.word 0x00 00. " ORER ,Overrun Error" "No error,Error" group.word 0x30++0x01 "BRG 0" line.word 0x00 "DL0,Frequency Division Register 0" group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SCCLK) and external clock (SCK)" "SCCLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIFCLK or clks" "SCIFCLK,clks" width 0xb tree.end tree "SCIF A (CPU)" base ad:0xE6C40000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR0,Receive FIFO Data Register A0" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR0,Transmit FIFO Data Register A0" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C40000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C40000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif else if (((per.w(ad:0xE6C40000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR0,Serial Mode Register A0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" endif endif group.word 0x08++0x01 line.word 0x00 "SCASCR0,Serial Control Register A0" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 12. " TENDE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " BRIE ,Break receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" rgroup.word 0x10++0x01 line.word 0x00 "SCAFER0,FIFO Error Count Register A0" bitfld.word 0x00 8.--13. " PER ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. " FER ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.w(ad:0xE6C40000))&0x80)==0x80) group.word 0x14++0x01 line.word 0x00 "SCASSR0,Serial Status Register A0" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x01 line.word 0x00 "SCASSR0,Serial Status Register A0" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" textline " " sif (cpu()=="R8A77440") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" textline " " bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif group.byte 0x04++0x00 line.byte 0x00 "SCABRR0,Bit Rate Register A0" if (((per.w(ad:0xE6C40000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCAFCR0,FIFO Control Register A0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback Test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCAFCR0,FIFO Control Register A0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "63,1,8,16,32,48,54,60" endif textline " " bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" endif textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCAFDR0,FIFO Data Count Register A0" hexmask.word.byte 0x00 8.--14. 1. " T ,Number of untransmitted data bytes in SCAFTDR" hexmask.word.byte 0x00 0.--6. 1. " R ,Number of receive data bytes in SCAFRDR" group.byte 0x0C++0x00 line.byte 0x00 "SCATDSR0,Transmit Data Stop Register A0" group.word 0x30++0x01 line.word 0x00 "SCAPCR0,Serial Port Control Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" else bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" endif textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" sif (cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450") if ((((per.w(ad:0xE6C40000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C40000+0x30))&0x8)==0x8)) if (((per.w(ad:0xE6C40000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if (((per.w(ad:0xE6C40000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif endif else if ((((per.w(ad:0xE6C40000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C40000+0x30))&0x8)==0x8)) group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR0,Serial Port Data Register A0" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif width 0x0B tree.end tree "SCIF A (DMA)" base ad:0xE7C40000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR0,Receive FIFO Data Register A0" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR0,Transmit FIFO Data Register A0" width 0x0B tree.end tree "SCIF B (CPU)" base ad:0xE6C20000 width 12. sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C20000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCBSMR0,Serial Mode Register B0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C20000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCBSMR0,Serial Mode Register B0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCBSMR0,Serial Mode Register B0" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif endif group.byte 0x04++0x00 line.byte 0x00 "SCBBRR0,Bit Rate Register B0" group.word 0x08++0x01 line.word 0x00 "SCBSCR0,Serial Control Register" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 13. " RCEE ,Receive data count compare interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " TENDPOSE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " BRIE ,Break interrupt enable" "Disabled,Enabled" bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" if (((per.w(ad:0xE6C20000+0x18))&0x8000)==0x8000) group.word 0x0C++0x01 line.word 0x00 "SCBTDSR0,Transmit Data Stop Register B0" else hgroup.word 0x0C++0x01 hide.word 0x00 "SCBTDSR0,Transmit Data Stop Register B0" endif rgroup.word 0x10++0x01 line.word 0x00 "SCBFER0,FIFO Error Count Register B0" hexmask.word.byte 0x00 8.--15. 1. " PER ,Parity error count" hexmask.word.byte 0x00 0.--7. 1. " FER ,Framing error count" if (((per.w(ad:0xE6C20000))&0x80)==0x80) group.word 0x14++0x1 line.word 0x00 "SCBSSR0,Serial Status Register B0" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x1 line.word 0x00 "SCBSSR0,Serial Status Register B0" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" textline " " bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" textline " " rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif if ((((per.w(ad:0xE6C20000))&0x80)==0x80)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x80)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x80)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x80)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x0)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x00)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x00)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C20000))&0x80)==0x00)&&(((per.w(ad:0xE6C20000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCBFCR0,FIFO Control Register B0" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif if (((per.w(ad:0xE6C20000+0x18))&0x2000)==0x2000) group.word 0x28++0x01 line.word 0x00 "SCBRCER0,Receive Data Count Compare Register B0" else hgroup.word 0x28++0x01 hide.word 0x00 "SCBRCER0,Receive Data Count Compare Register B0" endif if (((per.w(ad:0xE6C20000+0x08))&0xC000)==0xC000) group.word 0x2C++0x01 line.word 0x00 "SCBMBR0,Multibyte Set Register B0" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6C20000+0x08))&0xC000)==0x8000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR0,Multibyte Set Register B0" bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6C20000+0x08))&0xC000)==0x4000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR0,Multibyte Set Register B0" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" else hgroup.word 0x2C++0x01 hide.word 0x00 "SCBMBR0,Multibyte Set Register B0" endif group.word 0x30++0x01 line.word 0x00 "SCBPCR0,Serial Port Control Register B0" bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" if ((((per.w(ad:0xE6C20000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C20000+0x30))&0x8)==0x8)) if ((((per.w(ad:0xE6C20000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6C20000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR0,Serial Port Data Register B0" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR0,Serial Port Data Register B0" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if ((((per.w(ad:0xE6C20000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6C20000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR0,Serial Port Data Register B0" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR0,Serial Port Data Register B0" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif rgroup.word 0x38++0x01 line.word 0x00 "SCBTFDR0,Transmit FIFO Data Count Register B0" hexmask.word 0x00 0.--8. 1. " T ,Number of data bytes remaining in SCBFTDR" rgroup.word 0x3C++0x01 line.word 0x00 "SCBRFDR0,Receive FIFO Data Count Register B0" hexmask.word 0x00 0.--8. 1. " R ,Number of data bytes remaining in SCBFRDR" wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR0,Transmit FIFO Data Register B0" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR0,Receive FIFO Data Register B0" in sif (cpu()=="R8A77440") group.word 0x80++0x01 line.word 0x00 "SCBSC2R0,Serial Control Register 2 B0" bitfld.word 0x00 0. " RRCCE ,Receive reading count compare enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R0,Serial Status Register 2 B0" bitfld.word 0x00 0. " RRCCF ,Receive reading count compare" "Less,Greater" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR0,Receive Reading Count H Register B0" group.word 0x94++0x01 line.word 0x00 "SCBRRCLR0,Receive Reading Count L Register B0" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR0,Receive Reading Count Compare H Register B0" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCLR0,Receive Reading Count Compare L Register B0" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 Register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 Register" in else group.word 0x80++0x01 line.word 0x00 "SCBSC2R0,Serial control register2 B0" bitfld.word 0x00 0. " RRCCE ,Receive Reading Count Compare Enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R0,Serial status register2 B0" bitfld.word 0x00 0. " RRCCF ,Receive Reading Count Compare" "<,>" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR0,Receive reading count H register B0" group.word 0x94++0x01 line.word 0x00 "SCBRRCHL0,Receive reading count L register B0" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR0,Receive reading count compare H register B0" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCHL0,Receive reading count compare L register B0" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 register" in endif width 0x0B tree.end tree "SCIF B (DMA)" base ad:0xE7C20000 width 12. wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR0,Transmit FIFO Data Register B0" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR0,Receive FIFO Data Register B0" in width 0x0B tree.end tree.end tree "Channel 1" tree "SCIF" base ad:0xE6E68000 width 9. rgroup.byte 0x14++0x00 line.byte 0x00 "SCFRDR1,Receive FIFO Data Register 1" wgroup.byte 0x0c++0x00 line.byte 0x00 "SCFTDR1,Transmit FIFO Data Register 1" if (((per.w(ad:0xE6E68000))&0xa0)==0x20) group.word 0x00++0x1 line.word 0x00 "SCSMR1,Serial Mode Register 1" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6E68000))&0xa0)==0x00) group.word 0x00++0x1 line.word 0x00 "SCSMR1,Serial Mode Register 1" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x1 line.word 0x00 "SCSMR1,Serial Mode Register 1" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6E68000))&0x80)==0x80) group.word 0x08++0x1 line.word 0x00 "SCSCR1,Serial Control Register 1" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "SCK synch,SCK synch,SCK synch," else group.word 0x08++0x1 line.word 0x00 "SCSCR1,Serial Control Register 1" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "Internal clk,Internal clk,External clk," endif group.word 0x10++0x1 line.word 0x00 "SCFSR1,Serial Status Register 1" rbitfld.word 0x00 12.--15. " PER ,Parity Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER ,Framing Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Ready,Not ready" group.byte 0x04++0x0 line.byte 0x00 "SCBRR1,Bit Rate Register 1" if (((per.w(ad:0xE6E68000))&0x80)==0x80) group.word 0x18++0x1 line.word 0x00 "SCFCR1,FIFO Control Register 1" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x1 line.word 0x00 "SCFCR1,FIFO Control Register 1" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR1,FIFO Data Count Register 1" bitfld.word 0x00 08.--12. " T ,Number Non-transmitted Data In SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 00.--04. " R ,Number Received Data In SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR1,Serial Port Register 1" bitfld.word 0x00 07. " RTSIO ,Serial Port - RTS Port Input/Output" "Not output,Output" bitfld.word 0x00 06. " RTSDT ,Serial Port - RTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 05. " CTSIO ,Serial Port - CTS Port Input/Output" "Not output,Output" bitfld.word 0x00 04. " CTSDT ,Serial Port - CTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 03. " SCKIO ,Serial Port - Clock Port Input/Output" "Not output,Output" bitfld.word 0x00 02. " SCKDT ,Serial Port - Clock Port Data" "Low level,High level" textline " " bitfld.word 0x00 01. " SPB2IO ,Serial Port - Break Input/Output" "Not output,Output" bitfld.word 0x00 00. " SPB2DT ,Serial Port - Break Data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR1,Line Status Register 1" bitfld.word 0x00 02. " TO ,Timeout" "No error,Error" bitfld.word 0x00 00. " ORER ,Overrun Error" "No error,Error" group.word 0x30++0x01 "BRG 1" line.word 0x00 "DL1,Frequency Division Register 1" group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SCCLK) and external clock (SCK)" "SCCLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIFCLK or clks" "SCIFCLK,clks" width 0xb tree.end tree "SCIF A (CPU)" base ad:0xE6C50000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR1,Receive FIFO Data Register A1" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR1,Transmit FIFO Data Register A1" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C50000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C50000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif else if (((per.w(ad:0xE6C50000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR1,Serial Mode Register A1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" endif endif group.word 0x08++0x01 line.word 0x00 "SCASCR1,Serial Control Register A1" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 12. " TENDE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " BRIE ,Break receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" rgroup.word 0x10++0x01 line.word 0x00 "SCAFER1,FIFO Error Count Register A1" bitfld.word 0x00 8.--13. " PER ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. " FER ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.w(ad:0xE6C50000))&0x80)==0x80) group.word 0x14++0x01 line.word 0x00 "SCASSR1,Serial Status Register A1" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x01 line.word 0x00 "SCASSR1,Serial Status Register A1" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" textline " " sif (cpu()=="R8A77440") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" textline " " bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif group.byte 0x04++0x00 line.byte 0x00 "SCABRR1,Bit Rate Register A1" if (((per.w(ad:0xE6C50000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCAFCR1,FIFO Control Register A1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback Test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCAFCR1,FIFO Control Register A1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "63,1,8,16,32,48,54,60" endif textline " " bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" endif textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCAFDR1,FIFO Data Count Register A1" hexmask.word.byte 0x00 8.--14. 1. " T ,Number of untransmitted data bytes in SCAFTDR" hexmask.word.byte 0x00 0.--6. 1. " R ,Number of receive data bytes in SCAFRDR" group.byte 0x0C++0x00 line.byte 0x00 "SCATDSR1,Transmit Data Stop Register A1" group.word 0x30++0x01 line.word 0x00 "SCAPCR1,Serial Port Control Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" else bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" endif textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" sif (cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450") if ((((per.w(ad:0xE6C50000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C50000+0x30))&0x8)==0x8)) if (((per.w(ad:0xE6C50000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if (((per.w(ad:0xE6C50000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif endif else if ((((per.w(ad:0xE6C50000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C50000+0x30))&0x8)==0x8)) group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR1,Serial Port Data Register A1" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif width 0x0B tree.end tree "SCIF A (DMA)" base ad:0xE7C50000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR1,Receive FIFO Data Register A1" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR1,Transmit FIFO Data Register A1" width 0x0B tree.end tree "SCIF B (CPU)" base ad:0xE6C30000 width 12. sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C30000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCBSMR1,Serial Mode Register B1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C30000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCBSMR1,Serial Mode Register B1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCBSMR1,Serial Mode Register B1" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif endif group.byte 0x04++0x00 line.byte 0x00 "SCBBRR1,Bit Rate Register B1" group.word 0x08++0x01 line.word 0x00 "SCBSCR1,Serial Control Register" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 13. " RCEE ,Receive data count compare interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " TENDPOSE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " BRIE ,Break interrupt enable" "Disabled,Enabled" bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" if (((per.w(ad:0xE6C30000+0x18))&0x8000)==0x8000) group.word 0x0C++0x01 line.word 0x00 "SCBTDSR1,Transmit Data Stop Register B1" else hgroup.word 0x0C++0x01 hide.word 0x00 "SCBTDSR1,Transmit Data Stop Register B1" endif rgroup.word 0x10++0x01 line.word 0x00 "SCBFER1,FIFO Error Count Register B1" hexmask.word.byte 0x00 8.--15. 1. " PER ,Parity error count" hexmask.word.byte 0x00 0.--7. 1. " FER ,Framing error count" if (((per.w(ad:0xE6C30000))&0x80)==0x80) group.word 0x14++0x1 line.word 0x00 "SCBSSR1,Serial Status Register B1" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x1 line.word 0x00 "SCBSSR1,Serial Status Register B1" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" textline " " bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" textline " " rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif if ((((per.w(ad:0xE6C30000))&0x80)==0x80)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x80)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x80)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x80)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x0)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x00)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x00)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6C30000))&0x80)==0x00)&&(((per.w(ad:0xE6C30000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCBFCR1,FIFO Control Register B1" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif if (((per.w(ad:0xE6C30000+0x18))&0x2000)==0x2000) group.word 0x28++0x01 line.word 0x00 "SCBRCER1,Receive Data Count Compare Register B1" else hgroup.word 0x28++0x01 hide.word 0x00 "SCBRCER1,Receive Data Count Compare Register B1" endif if (((per.w(ad:0xE6C30000+0x08))&0xC000)==0xC000) group.word 0x2C++0x01 line.word 0x00 "SCBMBR1,Multibyte Set Register B1" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6C30000+0x08))&0xC000)==0x8000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR1,Multibyte Set Register B1" bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6C30000+0x08))&0xC000)==0x4000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR1,Multibyte Set Register B1" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" else hgroup.word 0x2C++0x01 hide.word 0x00 "SCBMBR1,Multibyte Set Register B1" endif group.word 0x30++0x01 line.word 0x00 "SCBPCR1,Serial Port Control Register B1" bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" if ((((per.w(ad:0xE6C30000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C30000+0x30))&0x8)==0x8)) if ((((per.w(ad:0xE6C30000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6C30000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR1,Serial Port Data Register B1" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR1,Serial Port Data Register B1" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if ((((per.w(ad:0xE6C30000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6C30000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR1,Serial Port Data Register B1" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR1,Serial Port Data Register B1" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif rgroup.word 0x38++0x01 line.word 0x00 "SCBTFDR1,Transmit FIFO Data Count Register B1" hexmask.word 0x00 0.--8. 1. " T ,Number of data bytes remaining in SCBFTDR" rgroup.word 0x3C++0x01 line.word 0x00 "SCBRFDR1,Receive FIFO Data Count Register B1" hexmask.word 0x00 0.--8. 1. " R ,Number of data bytes remaining in SCBFRDR" wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR1,Transmit FIFO Data Register B1" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR1,Receive FIFO Data Register B1" in sif (cpu()=="R8A77440") group.word 0x80++0x01 line.word 0x00 "SCBSC2R1,Serial Control Register 2 B1" bitfld.word 0x00 0. " RRCCE ,Receive reading count compare enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R1,Serial Status Register 2 B1" bitfld.word 0x00 0. " RRCCF ,Receive reading count compare" "Less,Greater" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR1,Receive Reading Count H Register B1" group.word 0x94++0x01 line.word 0x00 "SCBRRCLR1,Receive Reading Count L Register B1" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR1,Receive Reading Count Compare H Register B1" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCLR1,Receive Reading Count Compare L Register B1" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 Register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 Register" in else group.word 0x80++0x01 line.word 0x00 "SCBSC2R1,Serial control register2 B1" bitfld.word 0x00 0. " RRCCE ,Receive Reading Count Compare Enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R1,Serial status register2 B1" bitfld.word 0x00 0. " RRCCF ,Receive Reading Count Compare" "<,>" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR1,Receive reading count H register B1" group.word 0x94++0x01 line.word 0x00 "SCBRRCHL1,Receive reading count L register B1" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR1,Receive reading count compare H register B1" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCHL1,Receive reading count compare L register B1" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 register" in endif width 0x0B tree.end tree "SCIF B (DMA)" base ad:0xE7C30000 width 12. wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR1,Transmit FIFO Data Register B1" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR1,Receive FIFO Data Register B1" in width 0x0B tree.end tree.end tree "Channel 2" tree "SCIF" base ad:0xE6E58000 width 9. rgroup.byte 0x14++0x00 line.byte 0x00 "SCFRDR2,Receive FIFO Data Register 2" wgroup.byte 0x0c++0x00 line.byte 0x00 "SCFTDR2,Transmit FIFO Data Register 2" if (((per.w(ad:0xE6E58000))&0xa0)==0x20) group.word 0x00++0x1 line.word 0x00 "SCSMR2,Serial Mode Register 2" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6E58000))&0xa0)==0x00) group.word 0x00++0x1 line.word 0x00 "SCSMR2,Serial Mode Register 2" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x1 line.word 0x00 "SCSMR2,Serial Mode Register 2" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6E58000))&0x80)==0x80) group.word 0x08++0x1 line.word 0x00 "SCSCR2,Serial Control Register 2" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "SCK synch,SCK synch,SCK synch," else group.word 0x08++0x1 line.word 0x00 "SCSCR2,Serial Control Register 2" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "Internal clk,Internal clk,External clk," endif group.word 0x10++0x1 line.word 0x00 "SCFSR2,Serial Status Register 2" rbitfld.word 0x00 12.--15. " PER ,Parity Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER ,Framing Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Ready,Not ready" group.byte 0x04++0x0 line.byte 0x00 "SCBRR2,Bit Rate Register 2" if (((per.w(ad:0xE6E58000))&0x80)==0x80) group.word 0x18++0x1 line.word 0x00 "SCFCR2,FIFO Control Register 2" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x1 line.word 0x00 "SCFCR2,FIFO Control Register 2" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR2,FIFO Data Count Register 2" bitfld.word 0x00 08.--12. " T ,Number Non-transmitted Data In SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 00.--04. " R ,Number Received Data In SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR2,Serial Port Register 2" bitfld.word 0x00 07. " RTSIO ,Serial Port - RTS Port Input/Output" "Not output,Output" bitfld.word 0x00 06. " RTSDT ,Serial Port - RTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 05. " CTSIO ,Serial Port - CTS Port Input/Output" "Not output,Output" bitfld.word 0x00 04. " CTSDT ,Serial Port - CTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 03. " SCKIO ,Serial Port - Clock Port Input/Output" "Not output,Output" bitfld.word 0x00 02. " SCKDT ,Serial Port - Clock Port Data" "Low level,High level" textline " " bitfld.word 0x00 01. " SPB2IO ,Serial Port - Break Input/Output" "Not output,Output" bitfld.word 0x00 00. " SPB2DT ,Serial Port - Break Data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR2,Line Status Register 2" bitfld.word 0x00 02. " TO ,Timeout" "No error,Error" bitfld.word 0x00 00. " ORER ,Overrun Error" "No error,Error" group.word 0x30++0x01 "BRG 2" line.word 0x00 "DL2,Frequency Division Register 2" group.word 0x34++0x01 line.word 0x00 "CKS2,Clock Select Register 2" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SCCLK) and external clock (SCK)" "SCCLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIFCLK or clks" "SCIFCLK,clks" width 0xb tree.end tree "SCIF A (CPU)" base ad:0xE6C60000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR2,Receive FIFO Data Register A2" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR2,Transmit FIFO Data Register A2" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C60000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C60000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif else if (((per.w(ad:0xE6C60000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR2,Serial Mode Register A2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" endif endif group.word 0x08++0x01 line.word 0x00 "SCASCR2,Serial Control Register A2" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 12. " TENDE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " BRIE ,Break receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" rgroup.word 0x10++0x01 line.word 0x00 "SCAFER2,FIFO Error Count Register A2" bitfld.word 0x00 8.--13. " PER ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. " FER ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.w(ad:0xE6C60000))&0x80)==0x80) group.word 0x14++0x01 line.word 0x00 "SCASSR2,Serial Status Register A2" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x01 line.word 0x00 "SCASSR2,Serial Status Register A2" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" textline " " sif (cpu()=="R8A77440") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" textline " " bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif group.byte 0x04++0x00 line.byte 0x00 "SCABRR2,Bit Rate Register A2" if (((per.w(ad:0xE6C60000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCAFCR2,FIFO Control Register A2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback Test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCAFCR2,FIFO Control Register A2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "63,1,8,16,32,48,54,60" endif textline " " bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" endif textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCAFDR2,FIFO Data Count Register A2" hexmask.word.byte 0x00 8.--14. 1. " T ,Number of untransmitted data bytes in SCAFTDR" hexmask.word.byte 0x00 0.--6. 1. " R ,Number of receive data bytes in SCAFRDR" group.byte 0x0C++0x00 line.byte 0x00 "SCATDSR2,Transmit Data Stop Register A2" group.word 0x30++0x01 line.word 0x00 "SCAPCR2,Serial Port Control Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" else bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" endif textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" sif (cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450") if ((((per.w(ad:0xE6C60000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C60000+0x30))&0x8)==0x8)) if (((per.w(ad:0xE6C60000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if (((per.w(ad:0xE6C60000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif endif else if ((((per.w(ad:0xE6C60000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C60000+0x30))&0x8)==0x8)) group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR2,Serial Port Data Register A2" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif width 0x0B tree.end tree "SCIF A (DMA)" base ad:0xE7C60000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR2,Receive FIFO Data Register A2" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR2,Transmit FIFO Data Register A2" width 0x0B tree.end tree "SCIF B (CPU)" base ad:0xE6CE0000 width 12. sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6CE0000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCBSMR2,Serial Mode Register B2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6CE0000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCBSMR2,Serial Mode Register B2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCBSMR2,Serial Mode Register B2" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif endif group.byte 0x04++0x00 line.byte 0x00 "SCBBRR2,Bit Rate Register B2" group.word 0x08++0x01 line.word 0x00 "SCBSCR2,Serial Control Register" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 13. " RCEE ,Receive data count compare interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " TENDPOSE ,Transmit end interrupt enable" "Disabled,Enabled" bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " BRIE ,Break interrupt enable" "Disabled,Enabled" bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" if (((per.w(ad:0xE6CE0000+0x18))&0x8000)==0x8000) group.word 0x0C++0x01 line.word 0x00 "SCBTDSR2,Transmit Data Stop Register B2" else hgroup.word 0x0C++0x01 hide.word 0x00 "SCBTDSR2,Transmit Data Stop Register B2" endif rgroup.word 0x10++0x01 line.word 0x00 "SCBFER2,FIFO Error Count Register B2" hexmask.word.byte 0x00 8.--15. 1. " PER ,Parity error count" hexmask.word.byte 0x00 0.--7. 1. " FER ,Framing error count" if (((per.w(ad:0xE6CE0000))&0x80)==0x80) group.word 0x14++0x1 line.word 0x00 "SCBSSR2,Serial Status Register B2" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x1 line.word 0x00 "SCBSSR2,Serial Status Register B2" bitfld.word 0x00 13. " RCEF ,Receive data count match" "Not matched,Matched" bitfld.word 0x00 12. " TENDPOS ,Transmit end detect" "Not detected,Detected" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" textline " " bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" rbitfld.word 0x00 6. " TEND ,Transmission end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" textline " " rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif if ((((per.w(ad:0xE6CE0000))&0x80)==0x80)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x80)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x80)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x80)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x0)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x00)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x3)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x00)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x2)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" ",32,16,1" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" elif ((((per.w(ad:0xE6CE0000))&0x80)==0x00)&&(((per.w(ad:0xE6CE0000+0x2C))&0x3)==0x1)) group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" ",224 (32),240 (16),255 (1)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCBFCR2,FIFO Control Register B2" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 13. " RCE ,Receive data count comparison enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " RCRST ,Receive count reset" "Disabled,Enabled" bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "255,1,32,64,128,192,224,240" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif if (((per.w(ad:0xE6CE0000+0x18))&0x2000)==0x2000) group.word 0x28++0x01 line.word 0x00 "SCBRCER2,Receive Data Count Compare Register B2" else hgroup.word 0x28++0x01 hide.word 0x00 "SCBRCER2,Receive Data Count Compare Register B2" endif if (((per.w(ad:0xE6CE0000+0x08))&0xC000)==0xC000) group.word 0x2C++0x01 line.word 0x00 "SCBMBR2,Multibyte Set Register B2" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6CE0000+0x08))&0xC000)==0x8000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR2,Multibyte Set Register B2" bitfld.word 0x00 0. " MBTON ,Multibyte transmit data transfer enable" "Disabled,Enabled" elif (((per.w(ad:0xE6CE0000+0x08))&0xC000)==0x4000) group.word 0x2C++0x1 line.word 0x00 "SCBMBR2,Multibyte Set Register B2" bitfld.word 0x00 15. " ADDREQ ,Receive data transfer enable until the receive FIFO data count is decreased to 0" "Disabled,Enabled" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") bitfld.word 0x00 3. " RCECRON ,Enables receive data transfer in conjunction with the RCEF bit in SCBSSR" "Enabled,Disabled" else bitfld.word 0x00 3. " RCECRON ,Receive data transfer enable in conjunction with the RCEF bit in SCBSSR" "Disabled,Enabled" endif bitfld.word 0x00 1. " MBRON ,Multibyte receive data transfer enable" "Disabled,Enabled" else hgroup.word 0x2C++0x01 hide.word 0x00 "SCBMBR2,Multibyte Set Register B2" endif group.word 0x30++0x01 line.word 0x00 "SCBPCR2,Serial Port Control Register B2" bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" if ((((per.w(ad:0xE6CE0000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6CE0000+0x30))&0x8)==0x8)) if ((((per.w(ad:0xE6CE0000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6CE0000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR2,Serial Port Data Register B2" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR2,Serial Port Data Register B2" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if ((((per.w(ad:0xE6CE0000+0x08))&0x10)==0x10)||(((per.w(ad:0xE6CE0000+0x30))&0x2)==0x2)) group.word 0x34++0x01 line.word 0x00 "SCBPDR2,Serial Port Data Register B2" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCBPDR2,Serial Port Data Register B2" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif rgroup.word 0x38++0x01 line.word 0x00 "SCBTFDR2,Transmit FIFO Data Count Register B2" hexmask.word 0x00 0.--8. 1. " T ,Number of data bytes remaining in SCBFTDR" rgroup.word 0x3C++0x01 line.word 0x00 "SCBRFDR2,Receive FIFO Data Count Register B2" hexmask.word 0x00 0.--8. 1. " R ,Number of data bytes remaining in SCBFRDR" wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR2,Transmit FIFO Data Register B2" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR2,Receive FIFO Data Register B2" in sif (cpu()=="R8A77440") group.word 0x80++0x01 line.word 0x00 "SCBSC2R2,Serial Control Register 2 B2" bitfld.word 0x00 0. " RRCCE ,Receive reading count compare enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R2,Serial Status Register 2 B2" bitfld.word 0x00 0. " RRCCF ,Receive reading count compare" "Less,Greater" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR2,Receive Reading Count H Register B2" group.word 0x94++0x01 line.word 0x00 "SCBRRCLR2,Receive Reading Count L Register B2" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR2,Receive Reading Count Compare H Register B2" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCLR2,Receive Reading Count Compare L Register B2" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 Register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 Register" in else group.word 0x80++0x01 line.word 0x00 "SCBSC2R2,Serial control register2 B2" bitfld.word 0x00 0. " RRCCE ,Receive Reading Count Compare Enable" "Disabled,Enabled" group.word 0x84++0x01 line.word 0x00 "SCBSS2R2,Serial status register2 B2" bitfld.word 0x00 0. " RRCCF ,Receive Reading Count Compare" "<,>" group.word 0x90++0x01 line.word 0x00 "SCBRRCHR2,Receive reading count H register B2" group.word 0x94++0x01 line.word 0x00 "SCBRRCHL2,Receive reading count L register B2" group.word 0x98++0x01 line.word 0x00 "SCBRRCCHR2,Receive reading count compare H register B2" group.word 0x9C++0x01 line.word 0x00 "SCBRRCCHL2,Receive reading count compare L register B2" hgroup.byte 0xA8++0x00 hide.byte 0x00 "SCBFIFO1,Receive FIFO1 register" in hgroup.byte 0xAC++0x00 hide.byte 0x00 "SCBFIFO0,Receive FIFO0 register" in endif width 0x0B tree.end tree "SCIF B (DMA)" base ad:0xE7CE0000 width 12. wgroup.byte 0x40++0x00 line.byte 0x00 "SCBFTDR2,Transmit FIFO Data Register B2" hgroup.byte 0x60++0x00 hide.byte 0x00 "SCBFRDR2,Receive FIFO Data Register B2" in width 0x0B tree.end tree.end tree "Channel 3" tree "SCIF" base ad:0xE6EA8000 width 9. rgroup.byte 0x14++0x00 line.byte 0x00 "SCFRDR3,Receive FIFO Data Register 3" wgroup.byte 0x0c++0x00 line.byte 0x00 "SCFTDR3,Transmit FIFO Data Register 3" if (((per.w(ad:0xE6EA8000))&0xa0)==0x20) group.word 0x00++0x1 line.word 0x00 "SCSMR3,Serial Mode Register 3" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6EA8000))&0xa0)==0x00) group.word 0x00++0x1 line.word 0x00 "SCSMR3,Serial Mode Register 3" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x1 line.word 0x00 "SCSMR3,Serial Mode Register 3" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6EA8000))&0x80)==0x80) group.word 0x08++0x1 line.word 0x00 "SCSCR3,Serial Control Register 3" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "SCK synch,SCK synch,SCK synch," else group.word 0x08++0x1 line.word 0x00 "SCSCR3,Serial Control Register 3" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "Internal clk,Internal clk,External clk," endif group.word 0x10++0x1 line.word 0x00 "SCFSR3,Serial Status Register 3" rbitfld.word 0x00 12.--15. " PER ,Parity Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER ,Framing Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Ready,Not ready" group.byte 0x04++0x0 line.byte 0x00 "SCBRR3,Bit Rate Register 3" if (((per.w(ad:0xE6EA8000))&0x80)==0x80) group.word 0x18++0x1 line.word 0x00 "SCFCR3,FIFO Control Register 3" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x1 line.word 0x00 "SCFCR3,FIFO Control Register 3" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR3,FIFO Data Count Register 3" bitfld.word 0x00 08.--12. " T ,Number Non-transmitted Data In SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 00.--04. " R ,Number Received Data In SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR3,Serial Port Register 3" bitfld.word 0x00 07. " RTSIO ,Serial Port - RTS Port Input/Output" "Not output,Output" bitfld.word 0x00 06. " RTSDT ,Serial Port - RTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 05. " CTSIO ,Serial Port - CTS Port Input/Output" "Not output,Output" bitfld.word 0x00 04. " CTSDT ,Serial Port - CTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 03. " SCKIO ,Serial Port - Clock Port Input/Output" "Not output,Output" bitfld.word 0x00 02. " SCKDT ,Serial Port - Clock Port Data" "Low level,High level" textline " " bitfld.word 0x00 01. " SPB2IO ,Serial Port - Break Input/Output" "Not output,Output" bitfld.word 0x00 00. " SPB2DT ,Serial Port - Break Data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR3,Line Status Register 3" bitfld.word 0x00 02. " TO ,Timeout" "No error,Error" bitfld.word 0x00 00. " ORER ,Overrun Error" "No error,Error" group.word 0x30++0x01 "BRG 3" line.word 0x00 "DL3,Frequency Division Register 3" group.word 0x34++0x01 line.word 0x00 "CKS3,Clock Select Register 3" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SCCLK) and external clock (SCK)" "SCCLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIFCLK or clks" "SCIFCLK,clks" width 0xb tree.end tree "SCIF A (CPU)" base ad:0xE6C70000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR3,Receive FIFO Data Register A3" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR3,Transmit FIFO Data Register A3" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C70000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCASMR3,Serial Mode Register A3" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C70000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR3,Serial Mode Register A3" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR3,Serial Mode Register A3" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif else if (((per.w(ad:0xE6C70000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR3,Serial Mode Register A3" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR3,Serial Mode Register A3" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" endif endif group.word 0x08++0x01 line.word 0x00 "SCASCR3,Serial Control Register A3" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 12. " TENDE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " BRIE ,Break receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" rgroup.word 0x10++0x01 line.word 0x00 "SCAFER3,FIFO Error Count Register A3" bitfld.word 0x00 8.--13. " PER ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. " FER ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.w(ad:0xE6C70000))&0x80)==0x80) group.word 0x14++0x01 line.word 0x00 "SCASSR3,Serial Status Register A3" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x01 line.word 0x00 "SCASSR3,Serial Status Register A3" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" textline " " sif (cpu()=="R8A77440") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" textline " " bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif group.byte 0x04++0x00 line.byte 0x00 "SCABRR3,Bit Rate Register A3" if (((per.w(ad:0xE6C70000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCAFCR3,FIFO Control Register A3" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback Test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCAFCR3,FIFO Control Register A3" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "63,1,8,16,32,48,54,60" endif textline " " bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" endif textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCAFDR3,FIFO Data Count Register A3" hexmask.word.byte 0x00 8.--14. 1. " T ,Number of untransmitted data bytes in SCAFTDR" hexmask.word.byte 0x00 0.--6. 1. " R ,Number of receive data bytes in SCAFRDR" group.byte 0x0C++0x00 line.byte 0x00 "SCATDSR3,Transmit Data Stop Register A3" group.word 0x30++0x01 line.word 0x00 "SCAPCR3,Serial Port Control Register A3" sif (cpu()=="RCARM2")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" else bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" endif textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" sif (cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450") if ((((per.w(ad:0xE6C70000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C70000+0x30))&0x8)==0x8)) if (((per.w(ad:0xE6C70000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR3,Serial Port Data Register A3" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR3,Serial Port Data Register A3" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if (((per.w(ad:0xE6C70000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR3,Serial Port Data Register A3" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR3,Serial Port Data Register A3" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif endif else if ((((per.w(ad:0xE6C70000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C70000+0x30))&0x8)==0x8)) group.word 0x34++0x01 line.word 0x00 "SCAPDR3,Serial Port Data Register A3" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR3,Serial Port Data Register A3" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif width 0x0B tree.end tree "SCIF A (DMA)" base ad:0xE7C70000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR3,Receive FIFO Data Register A3" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR3,Transmit FIFO Data Register A3" width 0x0B tree.end tree.end tree "Channel 4" tree "SCIF" base ad:0xE6EE0000 width 9. rgroup.byte 0x14++0x00 line.byte 0x00 "SCFRDR4,Receive FIFO Data Register 4" wgroup.byte 0x0c++0x00 line.byte 0x00 "SCFTDR4,Transmit FIFO Data Register 4" if (((per.w(ad:0xE6EE0000))&0xa0)==0x20) group.word 0x00++0x1 line.word 0x00 "SCSMR4,Serial Mode Register 4" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6EE0000))&0xa0)==0x00) group.word 0x00++0x1 line.word 0x00 "SCSMR4,Serial Mode Register 4" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x1 line.word 0x00 "SCSMR4,Serial Mode Register 4" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6EE0000))&0x80)==0x80) group.word 0x08++0x1 line.word 0x00 "SCSCR4,Serial Control Register 4" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "SCK synch,SCK synch,SCK synch," else group.word 0x08++0x1 line.word 0x00 "SCSCR4,Serial Control Register 4" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "Internal clk,Internal clk,External clk," endif group.word 0x10++0x1 line.word 0x00 "SCFSR4,Serial Status Register 4" rbitfld.word 0x00 12.--15. " PER ,Parity Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER ,Framing Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Ready,Not ready" group.byte 0x04++0x0 line.byte 0x00 "SCBRR4,Bit Rate Register 4" if (((per.w(ad:0xE6EE0000))&0x80)==0x80) group.word 0x18++0x1 line.word 0x00 "SCFCR4,FIFO Control Register 4" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x1 line.word 0x00 "SCFCR4,FIFO Control Register 4" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR4,FIFO Data Count Register 4" bitfld.word 0x00 08.--12. " T ,Number Non-transmitted Data In SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 00.--04. " R ,Number Received Data In SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR4,Serial Port Register 4" bitfld.word 0x00 07. " RTSIO ,Serial Port - RTS Port Input/Output" "Not output,Output" bitfld.word 0x00 06. " RTSDT ,Serial Port - RTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 05. " CTSIO ,Serial Port - CTS Port Input/Output" "Not output,Output" bitfld.word 0x00 04. " CTSDT ,Serial Port - CTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 03. " SCKIO ,Serial Port - Clock Port Input/Output" "Not output,Output" bitfld.word 0x00 02. " SCKDT ,Serial Port - Clock Port Data" "Low level,High level" textline " " bitfld.word 0x00 01. " SPB2IO ,Serial Port - Break Input/Output" "Not output,Output" bitfld.word 0x00 00. " SPB2DT ,Serial Port - Break Data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR4,Line Status Register 4" bitfld.word 0x00 02. " TO ,Timeout" "No error,Error" bitfld.word 0x00 00. " ORER ,Overrun Error" "No error,Error" group.word 0x30++0x01 "BRG 4" line.word 0x00 "DL4,Frequency Division Register 4" group.word 0x34++0x01 line.word 0x00 "CKS4,Clock Select Register 4" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SCCLK) and external clock (SCK)" "SCCLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIFCLK or clks" "SCIFCLK,clks" width 0xb tree.end tree "SCIF A (CPU)" base ad:0xE6C78000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR4,Receive FIFO Data Register A4" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR4,Transmit FIFO Data Register A4" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C78000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCASMR4,Serial Mode Register A4" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C78000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR4,Serial Mode Register A4" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR4,Serial Mode Register A4" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif else if (((per.w(ad:0xE6C78000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR4,Serial Mode Register A4" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR4,Serial Mode Register A4" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" endif endif group.word 0x08++0x01 line.word 0x00 "SCASCR4,Serial Control Register A4" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 12. " TENDE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " BRIE ,Break receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" rgroup.word 0x10++0x01 line.word 0x00 "SCAFER4,FIFO Error Count Register A4" bitfld.word 0x00 8.--13. " PER ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. " FER ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.w(ad:0xE6C78000))&0x80)==0x80) group.word 0x14++0x01 line.word 0x00 "SCASSR4,Serial Status Register A4" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x01 line.word 0x00 "SCASSR4,Serial Status Register A4" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" textline " " sif (cpu()=="R8A77440") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" textline " " bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif group.byte 0x04++0x00 line.byte 0x00 "SCABRR4,Bit Rate Register A4" if (((per.w(ad:0xE6C78000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCAFCR4,FIFO Control Register A4" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback Test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCAFCR4,FIFO Control Register A4" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "63,1,8,16,32,48,54,60" endif textline " " bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" endif textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCAFDR4,FIFO Data Count Register A4" hexmask.word.byte 0x00 8.--14. 1. " T ,Number of untransmitted data bytes in SCAFTDR" hexmask.word.byte 0x00 0.--6. 1. " R ,Number of receive data bytes in SCAFRDR" group.byte 0x0C++0x00 line.byte 0x00 "SCATDSR4,Transmit Data Stop Register A4" group.word 0x30++0x01 line.word 0x00 "SCAPCR4,Serial Port Control Register A4" sif (cpu()=="RCARM2")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" else bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" endif textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" sif (cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450") if ((((per.w(ad:0xE6C78000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C78000+0x30))&0x8)==0x8)) if (((per.w(ad:0xE6C78000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR4,Serial Port Data Register A4" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR4,Serial Port Data Register A4" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if (((per.w(ad:0xE6C78000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR4,Serial Port Data Register A4" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR4,Serial Port Data Register A4" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif endif else if ((((per.w(ad:0xE6C78000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C78000+0x30))&0x8)==0x8)) group.word 0x34++0x01 line.word 0x00 "SCAPDR4,Serial Port Data Register A4" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR4,Serial Port Data Register A4" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif width 0x0B tree.end tree "SCIF A (DMA)" base ad:0xE7C78000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR4,Receive FIFO Data Register A4" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR4,Transmit FIFO Data Register A4" width 0x0B tree.end tree.end tree "Channel 5" tree "SCIF" base ad:0xE6EE8000 width 9. rgroup.byte 0x14++0x00 line.byte 0x00 "SCFRDR5,Receive FIFO Data Register 5" wgroup.byte 0x0c++0x00 line.byte 0x00 "SCFTDR5,Transmit FIFO Data Register 5" if (((per.w(ad:0xE6EE8000))&0xa0)==0x20) group.word 0x00++0x1 line.word 0x00 "SCSMR5,Serial Mode Register 5" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" elif (((per.w(ad:0xE6EE8000))&0xa0)==0x00) group.word 0x00++0x1 line.word 0x00 "SCSMR5,Serial Mode Register 5" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" else group.word 0x00++0x1 line.word 0x00 "SCSMR5,Serial Mode Register 5" bitfld.word 0x00 7. " C/A ,Communication mode" "Asynchronous,Synchronous" bitfld.word 0x00 6. " CHR ,Character length" "8 bits,7 bits" textline " " bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKS ,Clock select 1 and 0" "Clkp clock,Clkp/4 clock,Clkp/16 clock,Clkp/64 clock" endif if (((per.w(ad:0xE6EE8000))&0x80)==0x80) group.word 0x08++0x1 line.word 0x00 "SCSCR5,Serial Control Register 5" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "SCK synch,SCK synch,SCK synch," else group.word 0x08++0x1 line.word 0x00 "SCSCR5,Serial Control Register 5" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 3. " REIE ,Receive error interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 0.--1. " CKE ,Clock enable 1 and 0" "Internal clk,Internal clk,External clk," endif group.word 0x10++0x1 line.word 0x00 "SCFSR5,Serial Status Register 5" rbitfld.word 0x00 12.--15. " PER ,Parity Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.word 0x00 8.--11. " FER ,Framing Error Count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" textline " " bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" textline " " bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" bitfld.word 0x00 0. " DR ,Receive data ready" "Ready,Not ready" group.byte 0x04++0x0 line.byte 0x00 "SCBRR5,Bit Rate Register 5" if (((per.w(ad:0xE6EE8000))&0x80)==0x80) group.word 0x18++0x1 line.word 0x00 "SCFCR5,FIFO Control Register 5" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,2,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" else group.word 0x18++0x1 line.word 0x00 "SCFCR5,FIFO Control Register 5" bitfld.word 0x00 8.--10. " RSTRG ,RTS output active trigger" "15,1,4,6,8,10,12,14" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data count trigger " "1,4,8,14" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data count trigger" "8(8),4(12),2(14),0(16)" bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO Data Register Reset" "No reset,Reset" bitfld.word 0x00 1. " RFRST ,Receive FIFO Data Register Reset" "No reset,Reset" textline " " bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCFDR5,FIFO Data Count Register 5" bitfld.word 0x00 08.--12. " T ,Number Non-transmitted Data In SCFTDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" bitfld.word 0x00 00.--04. " R ,Number Received Data In SCFRDR" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" group.word 0x20++0x01 line.word 0x00 "SCSPTR5,Serial Port Register 5" bitfld.word 0x00 07. " RTSIO ,Serial Port - RTS Port Input/Output" "Not output,Output" bitfld.word 0x00 06. " RTSDT ,Serial Port - RTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 05. " CTSIO ,Serial Port - CTS Port Input/Output" "Not output,Output" bitfld.word 0x00 04. " CTSDT ,Serial Port - CTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 03. " SCKIO ,Serial Port - Clock Port Input/Output" "Not output,Output" bitfld.word 0x00 02. " SCKDT ,Serial Port - Clock Port Data" "Low level,High level" textline " " bitfld.word 0x00 01. " SPB2IO ,Serial Port - Break Input/Output" "Not output,Output" bitfld.word 0x00 00. " SPB2DT ,Serial Port - Break Data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "SCLSR5,Line Status Register 5" bitfld.word 0x00 02. " TO ,Timeout" "No error,Error" bitfld.word 0x00 00. " ORER ,Overrun Error" "No error,Error" group.word 0x30++0x01 "BRG 5" line.word 0x00 "DL5,Frequency Division Register 5" group.word 0x34++0x01 line.word 0x00 "CKS5,Clock Select Register 5" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SCCLK) and external clock (SCK)" "SCCLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIFCLK or clks" "SCIFCLK,clks" width 0xb tree.end tree "SCIF A (CPU)" base ad:0xE6C80000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR5,Receive FIFO Data Register A5" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR5,Transmit FIFO Data Register A5" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.w(ad:0xE6C80000))&0x80)==0x80) group.word 0x00++0x01 line.word 0x00 "SCASMR5,Serial Mode Register A5" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else if (((per.w(ad:0xE6C80000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR5,Serial Mode Register A5" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR5,Serial Mode Register A5" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive clock edge select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop bit length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock select" "MP,MP/4,MP/16,MP/64" endif endif else if (((per.w(ad:0xE6C80000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "SCASMR5,Serial Mode Register A5" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 4. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" else group.word 0x00++0x01 line.word 0x00 "SCASMR5,Serial Mode Register A5" bitfld.word 0x00 12. " CKEDG ,Transmit/Receive Clock Edge Select" "Falling/Raising,Raising/Falling" bitfld.word 0x00 8.--10. " SRC ,Sampling Control" "1/16,1/5,1/7,1/11,1/13,1/17,1/19,1/27" bitfld.word 0x00 7. " C/A# ,Communication Mode" "Asynchronous,Synchronous" textline " " bitfld.word 0x00 6. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 5. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 3. " STOP ,Stop Bit Length" "1 bit,2 bits" textline " " bitfld.word 0x00 0.--1. " CKS ,Clock Select" "MP,MP/4,MP/16,MP/64" endif endif group.word 0x08++0x01 line.word 0x00 "SCASCR5,Serial Control Register A5" bitfld.word 0x00 15. " TDRQE ,Transmit data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 14. " RDRQE ,Receive data transfer request enable" "Disabled,Enabled" bitfld.word 0x00 12. " TENDE ,Transmit end interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 11. " TSIE ,Transmit data stop interrupt enable" "Disabled,Enabled" bitfld.word 0x00 10. " ERIE ,Receive error interrupt enable" "Disabled,Enabled" bitfld.word 0x00 9. " BRIE ,Break receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 8. " DRIE ,Receive data ready interrupt enable" "Disabled,Enabled" bitfld.word 0x00 7. " TIE ,Transmit interrupt enable" "Disabled,Enabled" bitfld.word 0x00 6. " RIE ,Receive interrupt enable" "Disabled,Enabled" textline " " bitfld.word 0x00 5. " TE ,Transmit enable" "Disabled,Enabled" bitfld.word 0x00 4. " RE ,Receive enable" "Disabled,Enabled" bitfld.word 0x00 0. " CKE0 ,Clock enable" "Disabled,Enabled" rgroup.word 0x10++0x01 line.word 0x00 "SCAFER5,FIFO Error Count Register A5" bitfld.word 0x00 8.--13. " PER ,Parity error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.word 0x00 0.--5. " FER ,Framing error count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" if (((per.w(ad:0xE6C80000))&0x80)==0x80) group.word 0x14++0x01 line.word 0x00 "SCASSR5,Serial Status Register A5" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" sif (cpu()=="R8A77440")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" textline " " bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" else group.word 0x14++0x01 line.word 0x00 "SCASSR5,Serial Status Register A5" bitfld.word 0x00 9. " ORER ,Overrun error" "No error,Error" bitfld.word 0x00 8. " TSF ,Transmit data stop" "Not stopped,Stopped" bitfld.word 0x00 7. " ER ,Receive error" "No error,Error" textline " " sif (cpu()=="R8A77440") rbitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" else bitfld.word 0x00 6. " TEND ,Transmit end" "Not ended,Ended" endif bitfld.word 0x00 5. " TDFE ,Transmit FIFO data empty" "Not empty,Empty" bitfld.word 0x00 4. " BRK ,Break detect" "Not detected,Detected" textline " " rbitfld.word 0x00 3. " FER ,Framing error" "No error,Error" rbitfld.word 0x00 2. " PER ,Parity error" "No error,Error" bitfld.word 0x00 1. " RDF ,Receive FIFO data full" "Not full,Full" textline " " bitfld.word 0x00 0. " DR ,Receive data ready" "Not ready,Ready" endif group.byte 0x04++0x00 line.byte 0x00 "SCABRR5,Bit Rate Register A5" if (((per.w(ad:0xE6C80000))&0x80)==0x80) group.word 0x18++0x01 line.word 0x00 "SCAFCR5,FIFO Control Register A5" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" textline " " bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " LOOP ,Loopback Test" "Disabled,Enabled" else group.word 0x18++0x01 line.word 0x00 "SCAFCR5,FIFO Control Register A5" bitfld.word 0x00 15. " TSE ,Transmit data stop enable" "Disabled,Enabled" bitfld.word 0x00 14. " TCRST ,Transmit count reset" "Disabled,Enabled" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 8.--10. " RSTRG ,RTS# output active trigger" "63,1,8,16,32,48,54,60" endif textline " " bitfld.word 0x00 6.--7. " RTRG ,Receive FIFO data number trigger" "1,16,32,48" bitfld.word 0x00 4.--5. " TTRG ,Transmit FIFO data number trigger" "32 (32),16 (48),2 (62),0 (64)" sif (cpu()!="R8A77430")&&(cpu()!="R8A77450") bitfld.word 0x00 3. " MCE ,Modem control enable" "Disabled,Enabled" endif textline " " bitfld.word 0x00 2. " TFRST ,Transmit FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 1. " RFRST ,Receive FIFO data register reset" "Disabled,Enabled" bitfld.word 0x00 0. " LOOP ,Loopback test" "Disabled,Enabled" endif rgroup.word 0x1C++0x01 line.word 0x00 "SCAFDR5,FIFO Data Count Register A5" hexmask.word.byte 0x00 8.--14. 1. " T ,Number of untransmitted data bytes in SCAFTDR" hexmask.word.byte 0x00 0.--6. 1. " R ,Number of receive data bytes in SCAFRDR" group.byte 0x0C++0x00 line.byte 0x00 "SCATDSR5,Transmit Data Stop Register A5" group.word 0x30++0x01 line.word 0x00 "SCAPCR5,Serial Port Control Register A5" sif (cpu()=="RCARM2")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" else bitfld.word 0x00 4. " RTSC ,RTS# pin function select" "RTS# pin,Output port" bitfld.word 0x00 3. " CTSC ,CTS# pin function select" "CTS# pin,Input port" bitfld.word 0x00 2. " SCKC ,SCK pin function select" "SCK pin,Output port" endif textline " " bitfld.word 0x00 1. " RXDC ,RXD pin function select" "RXD pin,Input port" bitfld.word 0x00 0. " TXDC ,TXD pin function select" "TXD pin,Output port" sif (cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450") if ((((per.w(ad:0xE6C80000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C80000+0x30))&0x8)==0x8)) if (((per.w(ad:0xE6C80000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR5,Serial Port Data Register A5" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR5,Serial Port Data Register A5" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif else if (((per.w(ad:0xE6C80000+0x08))&0x10)==0x10) group.word 0x34++0x01 line.word 0x00 "SCAPDR5,Serial Port Data Register A5" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" endif textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR5,Serial Port Data Register A5" sif (cpu()=="RCARM2")||(cpu()=="R8A77440") bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif endif else if ((((per.w(ad:0xE6C80000+0x18))&0x8)==0x8)||(((per.w(ad:0xE6C80000+0x30))&0x8)==0x8)) group.word 0x34++0x01 line.word 0x00 "SCAPDR5,Serial Port Data Register A5" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" rbitfld.word 0x00 3. " CTSD ,Specifies the CTS# pin level" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" textline " " rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" else group.word 0x34++0x01 line.word 0x00 "SCAPDR5,Serial Port Data Register A5" sif cpu()=="R8A77420" bitfld.word 0x00 4. " RTSD ,Specifies data output to the RTS# pin" "0,1" endif bitfld.word 0x00 2. " SCKD ,Specifies data output to the SCK pin" "0,1" rbitfld.word 0x00 1. " RXDD ,Specifies the RXD pin level" "0,1" textline " " bitfld.word 0x00 0. " TXDD ,Specifies data output to the TXD pin" "0,1" endif endif width 0x0B tree.end tree "SCIF A (DMA)" base ad:0xE7C80000 width 10. hgroup.byte 0x24++0x00 hide.byte 0x00 "SCAFRDR5,Receive FIFO Data Register A5" in wgroup.byte 0x20++0x00 line.byte 0x00 "SCAFTDR5,Transmit FIFO Data Register A5" width 0x0B tree.end tree.end tree.end tree.open "HSCIF (High Speed Serial Communication Interface with FIFO)" tree "Channel 0" base ad:0xE62C0000 width 9. rgroup.byte 0x14++0x00 line.byte 0x00 "HSFRDR,Receive FIFO Data Register " wgroup.byte 0x0C++0x00 line.byte 0x00 "HSFTDR,Transmit FIFO Data Register " if (((per.w(ad:0xE62C0000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register " bitfld.word 0x00 06. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 05. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 04. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 03. " STOP ,Stop Bit Length" "1-bit,2-bit" bitfld.word 0x00 00.--01. " CKS ,Clock Select 1-0" "S,S/4,S/16,S/64" else group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register " bitfld.word 0x00 06. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 05. " PE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 03. " STOP ,Stop Bit Length" "1-bit,2-bit" bitfld.word 0x00 00.--01. " CKS ,Clock Select 1-0" "S,S/4,S/16,S/64" endif group.word 0x08++0x01 line.word 0x00 "HSSCR,Serial Control Register " rbitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 07. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 06. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 05. " TE ,Transmit Enable" "Disabled,Enabled" bitfld.word 0x00 04. " RE ,Receive Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 03. " REIE ,Receive Error Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 02. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 00.--01. " CKE ,Clock Enable 1/0" "Internal,Internal,External,?..." group.word 0x10++0x01 line.word 0x00 "HSFSR,Serial Status Register " bitfld.word 0x00 07. " ER ,Receive Error" "No error/Cleared,Error/No effect" bitfld.word 0x00 06. " TEND ,Transmit End" "In progress/Cleared,Ended/No effect" bitfld.word 0x00 05. " TDFE ,Transmit FIFO Data Empty" "Not empty/Cleared,Empty/No effect" textline " " bitfld.word 0x00 04. " BRK ,Break Detect" "Not received/Cleared,Received/No effect" rbitfld.word 0x00 03. " FER ,Framing Error" "No error,Error" rbitfld.word 0x00 02. " PER ,Parity Error" "No error,Error" textline " " bitfld.word 0x00 01. " RDF ,Receive FIFO Data Full" "Less/Cleared,Equal/No effect" bitfld.word 0x00 00. " DR ,Receive Data Ready" "Not ready/Cleared,Ready/No effect" group.byte 0x04++0x01 line.byte 0x00 "HSBRR,Bit Rate Register " group.word 0x18++0x01 line.word 0x00 "HSFCR,FIFO Control Register " bitfld.word 0x00 03. " MCE ,Modem Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 02. " TFRST ,Transmit FIFO Data Register Reset" "Disabled,Enabled" bitfld.word 0x00 01. " RFRST ,Receive FIFO Data Register Reset" "Disabled,Enabled" bitfld.word 0x00 00. " LOOP ,Loopback Test" "Disabled,Enabled" rgroup.word 0x1C++0x01 line.word 0x00 "HSFDR,FIFO Data Count Register " hexmask.word.byte 0x00 08.--15. 1. " T ,Number Untransmitted Data In SCFTDR" hexmask.word.byte 0x00 00.--07. 1. " R ,Number Received Data In SCFRDR" group.word 0x20++0x01 line.word 0x00 "HSSPTR,Serial Port Register " bitfld.word 0x00 07. " RTSIO ,Serial Port - RTS Port Input/Output" "Not output,Output" bitfld.word 0x00 06. " RTSDT ,Serial Port - RTS Port Data" "Low level,High level" bitfld.word 0x00 05. " CTSIO ,Serial Port - CTS Port Input/Output" "Not output,Output" bitfld.word 0x00 04. " CTSDT ,Serial Port - CTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 03. " SCKIO ,Serial Port - Clock Port Input/Output" "Not output,Output" bitfld.word 0x00 02. " SCKDT ,Serial Port - Clock Port Data" "Low level,High level" bitfld.word 0x00 01. " SPB2IO ,Serial Port - Break Input/Output" "Not output,Output" bitfld.word 0x00 00. " SPB2DT ,Serial Port - Break Data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "HSLSR,Line Status Register " bitfld.word 0x00 02. " TO ,Timeout" "No timeout,Timeout" bitfld.word 0x00 00. " ORER ,Overrun Error" "No error,Error" group.word 0x40++0x01 line.word 0x00 "HSSRR,Sampling Rate Register " bitfld.word 0x00 15. " SRE ,Sampling Rate Register Enable" "Disabled,Enabled" bitfld.word 0x00 14. " SRDE ,Sampling Point Register Enable" "Disabled,Enabled" bitfld.word 0x00 8.--11. " SRHP ,Sampling Point Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--4. " SRCYC ,Sampling Rate Register" ",,,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.word 0x44++0x01 line.word 0x00 "HSRER,Serial Error Register " hexmask.word.byte 0x00 8.--14. 1. " PER ,Parity Error Count" hexmask.word.byte 0x00 0.--6. 1. " FER ,Framing Error Count" group.word 0x50++0x01 line.word 0x00 "HSRTGR,RTS Output Active Trigger Register " hexmask.word.byte 0x00 0.--6. 1. " RSTRG ,RTS Output Active Trigger Count" group.word 0x54++0x01 line.word 0x00 "HSRTRGR,Receive FIFO Data Count Trigger Register " hexmask.word.byte 0x00 0.--6. 1. " RTRG ,Receive FIFO Data Count Trigger" group.word 0x58++0x01 line.word 0x00 "HSTTRGR,Transmit FIFO Data Count Trigger Register " hexmask.word.byte 0x00 0.--6. 1. " TTRG ,Transmit FIFO Data Count Trigger" group.word 0x30++0x01 "BRG 0" line.word 0x00 "DL0,Frequency Division Register 0" group.word 0x34++0x01 line.word 0x00 "CKS0,Clock Select Register 0" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" width 0xb tree.end tree "Channel 1" base ad:0xE62C8000 width 9. rgroup.byte 0x14++0x00 line.byte 0x00 "HSFRDR,Receive FIFO Data Register " wgroup.byte 0x0C++0x00 line.byte 0x00 "HSFTDR,Transmit FIFO Data Register " if (((per.w(ad:0xE62C8000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register " bitfld.word 0x00 06. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 05. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 04. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 03. " STOP ,Stop Bit Length" "1-bit,2-bit" bitfld.word 0x00 00.--01. " CKS ,Clock Select 1-0" "S,S/4,S/16,S/64" else group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register " bitfld.word 0x00 06. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 05. " PE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 03. " STOP ,Stop Bit Length" "1-bit,2-bit" bitfld.word 0x00 00.--01. " CKS ,Clock Select 1-0" "S,S/4,S/16,S/64" endif group.word 0x08++0x01 line.word 0x00 "HSSCR,Serial Control Register " rbitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 07. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 06. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 05. " TE ,Transmit Enable" "Disabled,Enabled" bitfld.word 0x00 04. " RE ,Receive Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 03. " REIE ,Receive Error Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 02. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 00.--01. " CKE ,Clock Enable 1/0" "Internal,Internal,External,?..." group.word 0x10++0x01 line.word 0x00 "HSFSR,Serial Status Register " bitfld.word 0x00 07. " ER ,Receive Error" "No error/Cleared,Error/No effect" bitfld.word 0x00 06. " TEND ,Transmit End" "In progress/Cleared,Ended/No effect" bitfld.word 0x00 05. " TDFE ,Transmit FIFO Data Empty" "Not empty/Cleared,Empty/No effect" textline " " bitfld.word 0x00 04. " BRK ,Break Detect" "Not received/Cleared,Received/No effect" rbitfld.word 0x00 03. " FER ,Framing Error" "No error,Error" rbitfld.word 0x00 02. " PER ,Parity Error" "No error,Error" textline " " bitfld.word 0x00 01. " RDF ,Receive FIFO Data Full" "Less/Cleared,Equal/No effect" bitfld.word 0x00 00. " DR ,Receive Data Ready" "Not ready/Cleared,Ready/No effect" group.byte 0x04++0x01 line.byte 0x00 "HSBRR,Bit Rate Register " group.word 0x18++0x01 line.word 0x00 "HSFCR,FIFO Control Register " bitfld.word 0x00 03. " MCE ,Modem Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 02. " TFRST ,Transmit FIFO Data Register Reset" "Disabled,Enabled" bitfld.word 0x00 01. " RFRST ,Receive FIFO Data Register Reset" "Disabled,Enabled" bitfld.word 0x00 00. " LOOP ,Loopback Test" "Disabled,Enabled" rgroup.word 0x1C++0x01 line.word 0x00 "HSFDR,FIFO Data Count Register " hexmask.word.byte 0x00 08.--15. 1. " T ,Number Untransmitted Data In SCFTDR" hexmask.word.byte 0x00 00.--07. 1. " R ,Number Received Data In SCFRDR" group.word 0x20++0x01 line.word 0x00 "HSSPTR,Serial Port Register " bitfld.word 0x00 07. " RTSIO ,Serial Port - RTS Port Input/Output" "Not output,Output" bitfld.word 0x00 06. " RTSDT ,Serial Port - RTS Port Data" "Low level,High level" bitfld.word 0x00 05. " CTSIO ,Serial Port - CTS Port Input/Output" "Not output,Output" bitfld.word 0x00 04. " CTSDT ,Serial Port - CTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 03. " SCKIO ,Serial Port - Clock Port Input/Output" "Not output,Output" bitfld.word 0x00 02. " SCKDT ,Serial Port - Clock Port Data" "Low level,High level" bitfld.word 0x00 01. " SPB2IO ,Serial Port - Break Input/Output" "Not output,Output" bitfld.word 0x00 00. " SPB2DT ,Serial Port - Break Data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "HSLSR,Line Status Register " bitfld.word 0x00 02. " TO ,Timeout" "No timeout,Timeout" bitfld.word 0x00 00. " ORER ,Overrun Error" "No error,Error" group.word 0x40++0x01 line.word 0x00 "HSSRR,Sampling Rate Register " bitfld.word 0x00 15. " SRE ,Sampling Rate Register Enable" "Disabled,Enabled" bitfld.word 0x00 14. " SRDE ,Sampling Point Register Enable" "Disabled,Enabled" bitfld.word 0x00 8.--11. " SRHP ,Sampling Point Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--4. " SRCYC ,Sampling Rate Register" ",,,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.word 0x44++0x01 line.word 0x00 "HSRER,Serial Error Register " hexmask.word.byte 0x00 8.--14. 1. " PER ,Parity Error Count" hexmask.word.byte 0x00 0.--6. 1. " FER ,Framing Error Count" group.word 0x50++0x01 line.word 0x00 "HSRTGR,RTS Output Active Trigger Register " hexmask.word.byte 0x00 0.--6. 1. " RSTRG ,RTS Output Active Trigger Count" group.word 0x54++0x01 line.word 0x00 "HSRTRGR,Receive FIFO Data Count Trigger Register " hexmask.word.byte 0x00 0.--6. 1. " RTRG ,Receive FIFO Data Count Trigger" group.word 0x58++0x01 line.word 0x00 "HSTTRGR,Transmit FIFO Data Count Trigger Register " hexmask.word.byte 0x00 0.--6. 1. " TTRG ,Transmit FIFO Data Count Trigger" group.word 0x30++0x01 "BRG 1" line.word 0x00 "DL1,Frequency Division Register 1" group.word 0x34++0x01 line.word 0x00 "CKS1,Clock Select Register 1" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" width 0xb tree.end tree "Channel 2" base ad:0xE62D0000 width 9. rgroup.byte 0x14++0x00 line.byte 0x00 "HSFRDR,Receive FIFO Data Register " wgroup.byte 0x0C++0x00 line.byte 0x00 "HSFTDR,Transmit FIFO Data Register " if (((per.w(ad:0xE62D0000))&0x20)==0x20) group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register " bitfld.word 0x00 06. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 05. " PE ,Parity Enable" "Disabled,Enabled" bitfld.word 0x00 04. " O/E ,Parity Mode" "Even,Odd" textline " " bitfld.word 0x00 03. " STOP ,Stop Bit Length" "1-bit,2-bit" bitfld.word 0x00 00.--01. " CKS ,Clock Select 1-0" "S,S/4,S/16,S/64" else group.word 0x00++0x01 line.word 0x00 "HSSMR,Serial Mode Register " bitfld.word 0x00 06. " CHR ,Character Length" "8-bit,7-bit" bitfld.word 0x00 05. " PE ,Parity Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 03. " STOP ,Stop Bit Length" "1-bit,2-bit" bitfld.word 0x00 00.--01. " CKS ,Clock Select 1-0" "S,S/4,S/16,S/64" endif group.word 0x08++0x01 line.word 0x00 "HSSCR,Serial Control Register " rbitfld.word 0x00 14.--15. " TOT ,Set the time for a data ready or a timeout" "15 etu,31 etu,47 etu,63 etu" bitfld.word 0x00 11. " TEIE ,Transmit End Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 07. " TIE ,Transmit Interrupt Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 06. " RIE ,Receive Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 05. " TE ,Transmit Enable" "Disabled,Enabled" bitfld.word 0x00 04. " RE ,Receive Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 03. " REIE ,Receive Error Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 02. " TOIE ,Timeout Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 00.--01. " CKE ,Clock Enable 1/0" "Internal,Internal,External,?..." group.word 0x10++0x01 line.word 0x00 "HSFSR,Serial Status Register " bitfld.word 0x00 07. " ER ,Receive Error" "No error/Cleared,Error/No effect" bitfld.word 0x00 06. " TEND ,Transmit End" "In progress/Cleared,Ended/No effect" bitfld.word 0x00 05. " TDFE ,Transmit FIFO Data Empty" "Not empty/Cleared,Empty/No effect" textline " " bitfld.word 0x00 04. " BRK ,Break Detect" "Not received/Cleared,Received/No effect" rbitfld.word 0x00 03. " FER ,Framing Error" "No error,Error" rbitfld.word 0x00 02. " PER ,Parity Error" "No error,Error" textline " " bitfld.word 0x00 01. " RDF ,Receive FIFO Data Full" "Less/Cleared,Equal/No effect" bitfld.word 0x00 00. " DR ,Receive Data Ready" "Not ready/Cleared,Ready/No effect" group.byte 0x04++0x01 line.byte 0x00 "HSBRR,Bit Rate Register " group.word 0x18++0x01 line.word 0x00 "HSFCR,FIFO Control Register " bitfld.word 0x00 03. " MCE ,Modem Control Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 02. " TFRST ,Transmit FIFO Data Register Reset" "Disabled,Enabled" bitfld.word 0x00 01. " RFRST ,Receive FIFO Data Register Reset" "Disabled,Enabled" bitfld.word 0x00 00. " LOOP ,Loopback Test" "Disabled,Enabled" rgroup.word 0x1C++0x01 line.word 0x00 "HSFDR,FIFO Data Count Register " hexmask.word.byte 0x00 08.--15. 1. " T ,Number Untransmitted Data In SCFTDR" hexmask.word.byte 0x00 00.--07. 1. " R ,Number Received Data In SCFRDR" group.word 0x20++0x01 line.word 0x00 "HSSPTR,Serial Port Register " bitfld.word 0x00 07. " RTSIO ,Serial Port - RTS Port Input/Output" "Not output,Output" bitfld.word 0x00 06. " RTSDT ,Serial Port - RTS Port Data" "Low level,High level" bitfld.word 0x00 05. " CTSIO ,Serial Port - CTS Port Input/Output" "Not output,Output" bitfld.word 0x00 04. " CTSDT ,Serial Port - CTS Port Data" "Low level,High level" textline " " bitfld.word 0x00 03. " SCKIO ,Serial Port - Clock Port Input/Output" "Not output,Output" bitfld.word 0x00 02. " SCKDT ,Serial Port - Clock Port Data" "Low level,High level" bitfld.word 0x00 01. " SPB2IO ,Serial Port - Break Input/Output" "Not output,Output" bitfld.word 0x00 00. " SPB2DT ,Serial Port - Break Data" "Low level,High level" group.word 0x24++0x01 line.word 0x00 "HSLSR,Line Status Register " bitfld.word 0x00 02. " TO ,Timeout" "No timeout,Timeout" bitfld.word 0x00 00. " ORER ,Overrun Error" "No error,Error" group.word 0x40++0x01 line.word 0x00 "HSSRR,Sampling Rate Register " bitfld.word 0x00 15. " SRE ,Sampling Rate Register Enable" "Disabled,Enabled" bitfld.word 0x00 14. " SRDE ,Sampling Point Register Enable" "Disabled,Enabled" bitfld.word 0x00 8.--11. " SRHP ,Sampling Point Register" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.word 0x00 0.--4. " SRCYC ,Sampling Rate Register" ",,,,,,,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31" rgroup.word 0x44++0x01 line.word 0x00 "HSRER,Serial Error Register " hexmask.word.byte 0x00 8.--14. 1. " PER ,Parity Error Count" hexmask.word.byte 0x00 0.--6. 1. " FER ,Framing Error Count" group.word 0x50++0x01 line.word 0x00 "HSRTGR,RTS Output Active Trigger Register " hexmask.word.byte 0x00 0.--6. 1. " RSTRG ,RTS Output Active Trigger Count" group.word 0x54++0x01 line.word 0x00 "HSRTRGR,Receive FIFO Data Count Trigger Register " hexmask.word.byte 0x00 0.--6. 1. " RTRG ,Receive FIFO Data Count Trigger" group.word 0x58++0x01 line.word 0x00 "HSTTRGR,Transmit FIFO Data Count Trigger Register " hexmask.word.byte 0x00 0.--6. 1. " TTRG ,Transmit FIFO Data Count Trigger" group.word 0x30++0x01 "BRG 2" line.word 0x00 "DL2,Frequency Division Register 2" group.word 0x34++0x01 line.word 0x00 "CKS2,Clock Select Register 2" bitfld.word 0x00 15. " CKS ,Switches the output between the frequency divided clock (SC_CLK) and external clock (SCK)" "SC_CLK,SCK" bitfld.word 0x00 14. " XIN ,Selects the clock source for the external baud rate from SCIF_CLK or clks" "SCIF_CLK,clks" width 0xb tree.end tree.end tree.open "I2C Bus Interface" tree "Channel 0" base ad:0xE6508000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master Nack Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave tranfer mode" "Write,Read" textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" width 0xb tree.end tree "Channel 1" base ad:0xE6518000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master Nack Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave tranfer mode" "Write,Read" textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" width 0xb tree.end tree "Channel 2" base ad:0xE6530000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master Nack Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave tranfer mode" "Write,Read" textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" width 0xb tree.end tree "Channel 3" base ad:0xE6540000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master Nack Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave tranfer mode" "Write,Read" textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" width 0xb tree.end tree "Channel 4" base ad:0xE6520000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master Nack Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave tranfer mode" "Write,Read" textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" width 0xb tree.end tree "Channel 5" base ad:0xE6528000 width 9. group.long 0x00++0x3 "Slave Registers" line.long 0x00 "ICSC,Slave Control Register" bitfld.long 0x00 3. " SDBS ,Slave Data Buffer Select" ",Single" bitfld.long 0x00 2. " SIE ,Slave Interface Enable" "Disabled,Enabled" bitfld.long 0x00 1. " GCAE ,General Call Acknowledgement Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " FNA ,Forced Non Acknowledgement" "Not forced,Forced" group.long 0x08++0x3 line.long 0x00 "ICSS,Slave Status Register" bitfld.long 0x00 6. " GCAR ,General Call Address Received" "Not received,Received" bitfld.long 0x00 5. " STM ,Slave Transmit Mode" "Write,Read" bitfld.long 0x00 4. " SSR ,Slave Stop Received" "Not received,Received" textline " " bitfld.long 0x00 3. " SDE ,Slave Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " SDT ,Slave Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " SDR ,Slave Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " SAR ,Slave Address Received" "Not received,Received" group.long 0x10++0x3 line.long 0x00 "ICSIE,Slave Interrupt Enable Register" bitfld.long 0x00 4. " SSRE ,Slave Stop Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 3. " SDEE ,Slave Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " SDTE ,Slave Data Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " SDRE ,Slave Data Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SARE ,Slave Address Received Interrupt Enable" "Disabled,Enabled" group.long 0x1c++0x3 line.long 0x00 "ICSA,Slave Address Register" hexmask.long.byte 0x00 0.--6. 1. " SADD ,Slave Address" group.long 0x04++0x3 "Master Registers" line.long 0x00 "ICMC,Master Control Register" bitfld.long 0x00 7. " MDBS ,Master Data Buffer Select" ",Single" bitfld.long 0x00 6. " FSCL ,Forced SCL" "Not forced,Forced" bitfld.long 0x00 5. " FSDA ,Forced SDA" "Not forced,Forced" textline " " bitfld.long 0x00 4. " OBPC ,Override Bus Pin Control" "Disabled,Enabled" bitfld.long 0x00 3. " MIE ,Master Interface Enable" "Disabled,Enabled" bitfld.long 0x00 2. " TSBE ,Start Byte Transmission Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " FSB ,Forced Stop onto the Bus" "Not forced,Forced" bitfld.long 0x00 0. " ESG ,Enable Start Generation" "Disabled,Enabled" group.long 0xc++0x3 line.long 0x00 "ICMS,Master Status Register" bitfld.long 0x00 6. " MNR ,Master Nack Received" "Not received,Received" bitfld.long 0x00 5. " MAL ,Master Arbitration Lost" "Not lost,Lost" bitfld.long 0x00 4. " MST ,Master Stop Transmitted" "Not transmitted,Transmitted" textline " " bitfld.long 0x00 3. " MDE ,Master Data Empty" "Not empty,Empty" bitfld.long 0x00 2. " MDT ,Master Data Transmitted" "Not transmitted,Transmitted" bitfld.long 0x00 1. " MDR ,Master Data Received" "Not received,Received" textline " " bitfld.long 0x00 0. " MAT ,Master Address Transmitted" "Not transmitted,Transmitted" group.long 0x14++0x3 line.long 0x00 "ICMIE,Master Interrupt Enable Register" bitfld.long 0x00 6. " MNRE ,Master NACK Received Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 5. " MALE ,Master Arbitration Lost Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 4. " MSTE ,Master Stop Transmitted Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 3. " MDEE ,Master Data Empty Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 2. " MDTE ,Master Data Transmitted Interrupt Enable" "Disabled,Enabled" bitfld.long 0x00 1. " MDRE ,Master Data Received Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 0. " MATE ,Master Address Transmitted Interrupt Enable" "Disabled,Enabled" group.long 0x20++0x3 line.long 0x00 "ICMA,Master Address Register" hexmask.long.byte 0x00 1.--7. 0x2 " SADD ,Slave address" bitfld.long 0x00 0. " STM1 ,Slave tranfer mode" "Write,Read" textline " " width 12. group.long 0x18++0x3 line.long 0x00 "ICCC,Clock Control Register" hexmask.long.byte 0x00 3.--8. 1. " SCGD ,SCL Clock Generation Divider" bitfld.long 0x00 0.--2. " CDF ,Clock Division Factor" "1,2,3,4,?..." group.long 0x24++0x3 line.long 0x00 "ICRXD/ICTX,Receive/Transmit Data Register" hexmask.long.byte 0x00 0.--7. 1. " RXD/TXD ,Receive/Transmit Data" group.long 0x28++0x03 line.long 0x00 "ICCCR,Clock Control Register 2" bitfld.long 0x00 2. " CDFD ,CDF Disable" "No,Yes" bitfld.long 0x00 1. " HLSE ,HIGH/LOW Separate Control Enable" "Disabled,Enabled" bitfld.long 0x00 0. " SME ,SCL Mask Enable" "Disabled,Enabled" group.long 0x2c++0x03 line.long 0x00 "ICMP,SCL Mask Control Register" hexmask.long.byte 0x00 0.--7. 1. " SMD ,SCL Mask Division" group.long 0x30++0x03 line.long 0x00 "ICHP,SCL HIGH control register" hexmask.long.word 0x00 0.--15. 1. " SCHD ,SCL HIGH Clock Division" group.long 0x34++0x03 line.long 0x00 "ICLP,SCL LOW control register" hexmask.long.word 0x00 0.--15. 1. " SCLD ,SCL LOW Clock Division" width 0xb tree.end tree.end tree.open "IIC-typeB (I2C Bus Interface)" tree "IIC 0" base ad:0xE6500000 width 10. group.byte 0x00++0x0 line.byte 0x00 "ICDR,I2C Bus Data Registers" group.byte 0x04++0x0 line.byte 0x00 "ICCR,I2C Bus Control Registers" bitfld.byte 0x00 7. " ICE ,I2C Bus Interface Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RACK ,Receive Acknowledge" "0,1" bitfld.byte 0x00 4. " TRS ,Transmit/Receive Select" "Receive,Transmit" textline " " bitfld.byte 0x00 2. " BBSY ,Bus Busy" "Not busy,Busy" bitfld.byte 0x00 0. " SCP ,Start Condition/Stop Condition Prohibit" "Start/Stop,1" group.byte 0x08++0x0 line.byte 0x00 "ICSR,I2C Bus Status Registers" rbitfld.byte 0x00 7. " SCLM ,SCL Monitor" "0,1" rbitfld.byte 0x00 6. " SDAM ,SDA Monitor" "0,1" rbitfld.byte 0x00 4. " BUSY ,I2C Transmit State Bit" "Not busy,Busy" textline " " bitfld.byte 0x00 3. " AL ,Arbitration Lost" "Won,Lost" bitfld.byte 0x00 2. " TACK ,Transmit Acknowledge Bit" "Acknowledged,Not acknowledged" bitfld.byte 0x00 1. " WAIT ,Module Normal/Wait state" "Normal,Wait" textline " " rbitfld.byte 0x00 0. " DTE ,Data Transmit Enable" "Disabled,Enabled" group.byte 0x0C++0x0 line.byte 0x00 "ICIC,I2C Interrupt Control Registers" bitfld.byte 0x00 7. " ICCLB8 ,I2C Clock Control Low Bit 8" "Not set,Set" bitfld.byte 0x00 6. " ICCHB8 ,I2C Clock Control High Bit 8" "Not set,Set" bitfld.byte 0x00 5. " TDMAE ,Transmit Data DMA Transfer Request Enable 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " RDMAE ,Receive Data DMA Transfer Request Enable 1" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,Arbitration Lost Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,Non-acknowledge Detection Interrupt and function enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,Wait Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 0. " DTEE ,Data Transmit Enable Interrupt" "Disabled,Enabled" group.byte 0x10++0x0 line.byte 0x00 "ICCL,I2C Clock Control Registers Low" group.byte 0x14++0x0 line.byte 0x00 "ICCH,I2C Clock Control Registers High" rgroup.byte 0x18++0x0 line.byte 0x00 "ICTR,I2C Transmit Registers" rgroup.byte 0x1C++0x0 line.byte 0x00 "ICRR,I2C Receive Registers" rgroup.byte 0x20++0x0 line.byte 0x00 "ICTA,I2C Transmit Monitor Registers" bitfld.byte 0x00 3. " RSETUP ,Retransmission Condition Setup Monitor" "0,1" rgroup.byte 0x24++0x0 line.byte 0x00 "ICTB,I2C Transmit Buffer Monitor Registers" bitfld.byte 0x00 3. " SBFLG ,ICSF Buffer Flag" "No data,Data" bitfld.byte 0x00 2. " TBFLG ,ICTR Buffer Flag" "No data,Data" bitfld.byte 0x00 1. " RBFLG ,ICRR Buffer Flag" "No data,Data" textline " " bitfld.byte 0x00 0. " DRFLG ,ICDR Buffer Flag" "No data,Data" group.byte 0x28++0x0 line.byte 0x00 "ICTC,I2C Transmit Control Registers" bitfld.byte 0x00 3.--7. " SDA_DLY ,SDA Data Delay Select" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.byte 0x00 2. " SYNC_EN ,SCL Synchronization Select" "Activated,Not activated" rgroup.byte 0x2C++0x0 line.byte 0x00 "ICTD,I2C Transmit Control Status Monitor Registers" bitfld.byte 0x00 4. " I2C_REQ0 ,I2C Communication Request 0" "Not requested,Requested" bitfld.byte 0x00 0. " I2C_ACK0 ,I2C Communication Status 0" "No communication,Communication" rgroup.byte 0x30++0x0 line.byte 0x00 "ICSF,I2C Shift Registers" group.byte 0x6C++0x0 line.byte 0x00 "ICVCON,I2C Option Enabling Register" bitfld.byte 0x00 5. " REQ_HOLD ,Enable bit of I 2 C terminal select request hold" "Disabled,Enabled" sif cpu()=="RCARM2"||cpu()=="RCARV2H" elif (cpuis("R8J7795*"))||(cpuis("R8A7795*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpu()=="R8A77420")||(cpu()=="R8A77430") bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled,Enabled" elif (cpuis("R8A77940")||(cpu()=="R8A77450")) bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled," else bitfld.byte 0x00 4. " D8EN ,Enable bit of I2C terminal using DVFS 8case select mode" "Disabled,Enabled" endif sif (cpu()=="R8A77420")||(cpu()=="R8A77430") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit Data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit Data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit Data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit Data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit Data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit Data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit Data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit Data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit Data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit Data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" elif !cpuis("R8A77450") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" endif width 0x0B tree.end tree "IIC 1" base ad:0xE6510000 width 10. group.byte 0x00++0x0 line.byte 0x00 "ICDR,I2C Bus Data Registers" group.byte 0x04++0x0 line.byte 0x00 "ICCR,I2C Bus Control Registers" bitfld.byte 0x00 7. " ICE ,I2C Bus Interface Enable" "Disabled,Enabled" bitfld.byte 0x00 6. " RACK ,Receive Acknowledge" "0,1" bitfld.byte 0x00 4. " TRS ,Transmit/Receive Select" "Receive,Transmit" textline " " bitfld.byte 0x00 2. " BBSY ,Bus Busy" "Not busy,Busy" bitfld.byte 0x00 0. " SCP ,Start Condition/Stop Condition Prohibit" "Start/Stop,1" group.byte 0x08++0x0 line.byte 0x00 "ICSR,I2C Bus Status Registers" rbitfld.byte 0x00 7. " SCLM ,SCL Monitor" "0,1" rbitfld.byte 0x00 6. " SDAM ,SDA Monitor" "0,1" rbitfld.byte 0x00 4. " BUSY ,I2C Transmit State Bit" "Not busy,Busy" textline " " bitfld.byte 0x00 3. " AL ,Arbitration Lost" "Won,Lost" bitfld.byte 0x00 2. " TACK ,Transmit Acknowledge Bit" "Acknowledged,Not acknowledged" bitfld.byte 0x00 1. " WAIT ,Module Normal/Wait state" "Normal,Wait" textline " " rbitfld.byte 0x00 0. " DTE ,Data Transmit Enable" "Disabled,Enabled" group.byte 0x0C++0x0 line.byte 0x00 "ICIC,I2C Interrupt Control Registers" bitfld.byte 0x00 7. " ICCLB8 ,I2C Clock Control Low Bit 8" "Not set,Set" bitfld.byte 0x00 6. " ICCHB8 ,I2C Clock Control High Bit 8" "Not set,Set" bitfld.byte 0x00 5. " TDMAE ,Transmit Data DMA Transfer Request Enable 1" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " RDMAE ,Receive Data DMA Transfer Request Enable 1" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,Arbitration Lost Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,Non-acknowledge Detection Interrupt and function enable bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,Wait Interrupt and function enable bit" "Disabled,Enabled" bitfld.byte 0x00 0. " DTEE ,Data Transmit Enable Interrupt" "Disabled,Enabled" group.byte 0x10++0x0 line.byte 0x00 "ICCL,I2C Clock Control Registers Low" group.byte 0x14++0x0 line.byte 0x00 "ICCH,I2C Clock Control Registers High" rgroup.byte 0x18++0x0 line.byte 0x00 "ICTR,I2C Transmit Registers" rgroup.byte 0x1C++0x0 line.byte 0x00 "ICRR,I2C Receive Registers" rgroup.byte 0x20++0x0 line.byte 0x00 "ICTA,I2C Transmit Monitor Registers" bitfld.byte 0x00 3. " RSETUP ,Retransmission Condition Setup Monitor" "0,1" rgroup.byte 0x24++0x0 line.byte 0x00 "ICTB,I2C Transmit Buffer Monitor Registers" bitfld.byte 0x00 3. " SBFLG ,ICSF Buffer Flag" "No data,Data" bitfld.byte 0x00 2. " TBFLG ,ICTR Buffer Flag" "No data,Data" bitfld.byte 0x00 1. " RBFLG ,ICRR Buffer Flag" "No data,Data" textline " " bitfld.byte 0x00 0. " DRFLG ,ICDR Buffer Flag" "No data,Data" group.byte 0x28++0x0 line.byte 0x00 "ICTC,I2C Transmit Control Registers" bitfld.byte 0x00 3.--7. " SDA_DLY ,SDA Data Delay Select" "No delay,1 cycle,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles,9 cycles,10 cycles,11 cycles,12 cycles,13 cycles,14 cycles,15 cycles,16 cycles,17 cycles,18 cycles,19 cycles,20 cycles,21 cycles,22 cycles,23 cycles,24 cycles,25 cycles,26 cycles,27 cycles,28 cycles,29 cycles,30 cycles,31 cycles" bitfld.byte 0x00 2. " SYNC_EN ,SCL Synchronization Select" "Activated,Not activated" rgroup.byte 0x2C++0x0 line.byte 0x00 "ICTD,I2C Transmit Control Status Monitor Registers" bitfld.byte 0x00 4. " I2C_REQ0 ,I2C Communication Request 0" "Not requested,Requested" bitfld.byte 0x00 0. " I2C_ACK0 ,I2C Communication Status 0" "No communication,Communication" rgroup.byte 0x30++0x0 line.byte 0x00 "ICSF,I2C Shift Registers" group.byte 0x6C++0x0 line.byte 0x00 "ICVCON,I2C Option Enabling Register" bitfld.byte 0x00 5. " REQ_HOLD ,Enable bit of I 2 C terminal select request hold" "Disabled,Enabled" sif cpu()=="RCARM2"||cpu()=="RCARV2H" elif (cpuis("R8J7795*"))||(cpuis("R8A7795*"))||(cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpu()=="R8A77420")||(cpu()=="R8A77430") bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled,Enabled" elif (cpuis("R8A77940")||(cpu()=="R8A77450")) bitfld.byte 0x00 4. " D16EN ,Enable bit of I2C terminal using DVFS 16case select mode" "Disabled," else bitfld.byte 0x00 4. " D8EN ,Enable bit of I2C terminal using DVFS 8case select mode" "Disabled,Enabled" endif sif (cpu()=="R8A77420")||(cpu()=="R8A77430") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit Data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit Data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit Data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit Data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit Data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit Data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit Data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit Data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit Data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit Data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" elif !cpuis("R8A77450") group.byte 0x50++0x0 line.byte 0x00 "ICIMSK,I2C Automatic Transmission Interruption Mask Register" bitfld.byte 0x00 7. " AENDM ,End interruption mask bit of I2C automatic transmission" "Not output,Output" bitfld.byte 0x00 6. " TMC2M ,End interruption mask bit ofI2C automatic transmission timer count 2" "Not output,Output" bitfld.byte 0x00 5. " TMC1M ,End interruption mask bit ofI2C automatic transmission timer count 1" "Not output,Output" textline " " bitfld.byte 0x00 4. " TMOUTM ,I2C automatic transmission timeout error interruption mask bit" "Not output,Output" bitfld.byte 0x00 3. " ALM ,I2C automatic transmission AL interruption mask bit" "Not output,Output" bitfld.byte 0x00 2. " TACKM ,I2C automatic transmission TACK interruption mask bit" "Not output,Output" rgroup.byte 0x54++0x0 line.byte 0x00 "ICINT,I2C Automatic Transmission Interruption Flag Register" bitfld.byte 0x00 7. " AEND ,End flag bit of I2C automatic transmission" "Not ended,Ended" bitfld.byte 0x00 6. " TMC2 ,End flag bit of I2C automatic transmission timer count 2" "Not ended,Ended" bitfld.byte 0x00 5. " TMC1 ,End flag bit of I2C automatic transmission timer count 1" "Not ended,Ended" textline " " bitfld.byte 0x00 4. " TMOUT ,I2C automatic transmission timeout error flag bit" "Not detected,Detected" bitfld.byte 0x00 3. " AAL ,I2C automatic transmission AL flag bit" "Not detected,Detected" bitfld.byte 0x00 2. " ATACK ,I2C automatic transmission TACK flag bit" "Not detected,Detected" textline " " bitfld.byte 0x00 1. " AWAIT ,I2C automatic transmission WAIT flag bit" "Not detected,Detected" bitfld.byte 0x00 0. " ADTE ,I2C automatic transmission DTE flag bit" "Not detected,Detected" group.byte 0x58++0x0 line.byte 0x00 "ICACE,I2C Automatic Transmission Processing Enabling Register" bitfld.byte 0x00 7. " AENDE ,End detection enabling bit of automatic transmission" "Disabled,Enabled" bitfld.byte 0x00 6. " TMC2E ,Timer 1 enabling bit" "Disabled,Enabled" bitfld.byte 0x00 5. " TMC1E ,Timer 2 enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " TMOUTE ,Timeout error enabling bit" "Disabled,Enabled" bitfld.byte 0x00 3. " ALE ,I2C transmission automatic AL error-handling enabling bit" "Disabled,Enabled" bitfld.byte 0x00 2. " TACKE ,I2C transmission automatic ACK error-handling enabling bit" "Disabled,Enabled" textline " " bitfld.byte 0x00 1. " WAITE ,I2C transmission automatic WAIT processing enabling bit" "Disabled,Enabled" group.byte 0x60++0x0 line.byte 0x00 "ICTMC1,I2C Automatic Transmission Timer Control register 1" group.byte 0x64++0x0 line.byte 0x00 "ICTMC2,I2C Automatic Transmission Timer Control Register 2" group.byte 0x68++0x0 line.byte 0x00 "ICTMCW,I2C Automatic Transmission Wait Control Register" textline " " group.byte 0x70++0x0 line.byte 0x00 "ICSTART,I2C Automatic Transmission Transmit Start Register" bitfld.byte 0x00 7. " AUTOSTART ,I2C automatic transmission start bit" "Disabled,Enabled" bitfld.byte 0x00 6. " AUTOTRANSRESET ,I2C automatic transmission processing reset bit" "No reset,Reset" bitfld.byte 0x00 5. " AUTOSTOP ,Auto stop of I2C automatic transmission" "Not stopped,Stopped" textline " " bitfld.byte 0x00 1. " ATDMA ,DMA transmitting specification bit" "DMA not used,DMA used" bitfld.byte 0x00 0. " ARDMA ,DMA reception specification bit" "DMA not used,DMA used" group.byte 0x80++0x0 line.byte 0x00 "ICATFR,I2C Automatic Transmission Transmit Control Register" bitfld.byte 0x00 4.--7. " FORMAT ,I2C automatic transmission format selection" "S->T1->P,S->T1->R1->P,S->T1->Sr->T2->P,S->T1->Sr->T2->R1->P,S->T1->R1->Sr->T2->P,S->T1->R1->Sr->T2->R2->P,?..." bitfld.byte 0x00 0.--3. " RETRY ,Number-of-times selection of I2C automatic transmission retry" "No retry,1 time,2 times,3 times,4 times,5 times,6 times,7 times,8 times,9 times,10 times,11 times,12 times,13 times,14 times,?..." group.byte 0x84++0x0 line.byte 0x00 "ICATSET1,I2C Automatic Transmission Transmit Time Register 1" group.byte 0x88++0x0 line.byte 0x00 "ICATSET2,I2C Automatic Transmission Transmit Time Register 2" group.byte 0x8C++0x0 line.byte 0x00 "ICARSET1,I2C Automatic Transmission Reception Time Register 1" group.byte 0x90++0x0 line.byte 0x00 "ICARSET2,I2C Automatic Transmission Reception Time Register 2" group.byte 0x100++0x0 line.byte 0x00 "ICATD00,I2C Automatic Transmission Transmit Data 00" group.byte 0x104++0x0 line.byte 0x00 "ICATD01,I2C Automatic Transmission Transmit Data 01" group.byte 0x108++0x0 line.byte 0x00 "ICATD02,I2C Automatic Transmission Transmit Data 02" group.byte 0x10C++0x0 line.byte 0x00 "ICATD03,I2C Automatic Transmission Transmit Data 03" group.byte 0x110++0x0 line.byte 0x00 "ICATD04,I2C Automatic Transmission Transmit Data 04" group.byte 0x114++0x0 line.byte 0x00 "ICATD05,I2C Automatic Transmission Transmit Data 05" group.byte 0x118++0x0 line.byte 0x00 "ICATD06,I2C Automatic Transmission Transmit Data 06" group.byte 0x11C++0x0 line.byte 0x00 "ICATD07,I2C Automatic Transmission Transmit Data 07" group.byte 0x120++0x0 line.byte 0x00 "ICATD08,I2C Automatic Transmission Transmit Data 08" group.byte 0x124++0x0 line.byte 0x00 "ICATD09,I2C Automatic Transmission Transmit Data 09" group.byte 0x200++0x0 line.byte 0x00 "ICATD10,I2C Automatic Transmission Transmit data 10" group.byte 0x204++0x0 line.byte 0x00 "ICATD11,I2C Automatic Transmission Transmit data 11" group.byte 0x208++0x0 line.byte 0x00 "ICATD12,I2C Automatic Transmission Transmit data 12" group.byte 0x20C++0x0 line.byte 0x00 "ICATD13,I2C Automatic Transmission Transmit data 13" group.byte 0x210++0x0 line.byte 0x00 "ICATD14,I2C Automatic Transmission Transmit data 14" group.byte 0x214++0x0 line.byte 0x00 "ICATD15,I2C Automatic Transmission Transmit data 15" group.byte 0x218++0x0 line.byte 0x00 "ICATD16,I2C Automatic Transmission Transmit data 16" group.byte 0x21C++0x0 line.byte 0x00 "ICATD17,I2C Automatic Transmission Transmit data 17" group.byte 0x220++0x0 line.byte 0x00 "ICATD18,I2C Automatic Transmission Transmit data 18" group.byte 0x224++0x0 line.byte 0x00 "ICATD19,I2C Automatic Transmission Transmit data 19" rgroup.byte 0x300++0x0 line.byte 0x00 "ICARD00,I2C Automatic Transmission Receipt Data 00" rgroup.byte 0x304++0x0 line.byte 0x00 "ICARD01,I2C Automatic Transmission Receipt Data 01" rgroup.byte 0x308++0x0 line.byte 0x00 "ICARD02,I2C Automatic Transmission Receipt Data 02" rgroup.byte 0x30C++0x0 line.byte 0x00 "ICARD03,I2C Automatic Transmission Receipt Data 03" rgroup.byte 0x310++0x0 line.byte 0x00 "ICARD04,I2C Automatic Transmission Receipt Data 04" rgroup.byte 0x314++0x0 line.byte 0x00 "ICARD05,I2C Automatic Transmission Receipt Data 05" rgroup.byte 0x318++0x0 line.byte 0x00 "ICARD06,I2C Automatic Transmission Receipt Data 06" rgroup.byte 0x31C++0x0 line.byte 0x00 "ICARD07,I2C Automatic Transmission Receipt Data 07" rgroup.byte 0x320++0x0 line.byte 0x00 "ICARD08,I2C Automatic Transmission Receipt Data 08" rgroup.byte 0x324++0x0 line.byte 0x00 "ICARD09,I2C Automatic Transmission Receipt Data 09" rgroup.byte 0x400++0x0 line.byte 0x00 "ICARD10,I2C Automatic Transmission Receipt Data 10" rgroup.byte 0x404++0x0 line.byte 0x00 "ICARD11,I2C Automatic Transmission Receipt Data 11" rgroup.byte 0x408++0x0 line.byte 0x00 "ICARD12,I2C Automatic Transmission Receipt Data 12" rgroup.byte 0x40C++0x0 line.byte 0x00 "ICARD13,I2C Automatic Transmission Receipt Data 13" rgroup.byte 0x410++0x0 line.byte 0x00 "ICARD14,I2C Automatic Transmission Receipt Data 14" rgroup.byte 0x414++0x0 line.byte 0x00 "ICARD15,I2C Automatic Transmission Receipt Data 15" rgroup.byte 0x418++0x0 line.byte 0x00 "ICARD16,I2C Automatic Transmission Receipt Data 16" rgroup.byte 0x41C++0x0 line.byte 0x00 "ICARD17,I2C Automatic Transmission Receipt Data 17" rgroup.byte 0x420++0x0 line.byte 0x00 "ICARD18,I2C Automatic Transmission Receipt Data 18" rgroup.byte 0x424++0x0 line.byte 0x00 "ICARD19,I2C Automatic Transmission Receipt Data 19" endif width 0x0B tree.end tree.end tree.open "MSIOF (Clock-Synchronized Serial Interface with FIFO)" tree "MSIOF 0 (CPU)" base ad:0xE6E20000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE6E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE6E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE6E20000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E20000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E20000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E20000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E20000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E20000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 0 (DMA)" base ad:0xE7E20000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE7E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE7E20000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE7E20000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7E20000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7E20000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E20000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7E20000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7E20000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 1 (CPU)" base ad:0xE6E10000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE6E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE6E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE6E10000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E10000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E10000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E10000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E10000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E10000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 1 (DMA)" base ad:0xE76E10000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE76E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE76E10000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE76E10000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE76E10000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE76E10000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE76E10000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE76E10000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE76E10000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 2 (CPU)" base ad:0xE6E00000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE6E00000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE6E00000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE6E00000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E00000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE6E00000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE6E00000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E00000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE6E00000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree "MSIOF 2 (DMA)" base ad:0xE7E00000 width 9. sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x00))&0x80000000)==0x80000000) if (((per.l(ad:0xE7E00000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data Pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization signal channel select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif else if (((per.l(ad:0xE7E00000+0x00))&0x03000000)==0x02000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif else if (((per.l(ad:0xE7E00000+0x00))&0x80000000)==0x80000000) group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 26.--27. " SYNCCH ,Synchronization Signal Channel Select" "MSIOF_SYNC,MSIOF_SS1,MSIOF_SS2,?..." bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" else group.long 0x00++0x03 line.long 0x00 "SITMDR1,MSIOF Transmit Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,Master" bitfld.long 0x00 30. " PCON ,Transfer signal connection" ",MSIOF_SCK & MSIOF_SYNC" bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" textline " " bitfld.long 0x00 25. " SYNCAC ,MSIOF_SYNC polarity" "Active high,Active low" bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" textline " " bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 2.--3. " FLD ,Frame synchronization signal interval" "0-clock-cycle,1-clock-cycle,2-clock-cycle,3-clock-cycle" textline " " bitfld.long 0x00 0. " TXSTP ,Transmission stop" ",Stopped" endif endif textline " " group.long 0x04++0x07 line.long 0x00 "SITMDR2,MSIOF Transmit Mode Register 2" bitfld.long 0x00 30. " GRP ,Group Count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SITMDR3,MSIOF Transmit Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x10))&0x30000000)==0x10000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7E00000+0x10))&0x30000000)==0x00000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." elif (((per.l(ad:0xE7E00000+0x10))&0x30000000)==0x20000000) group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "High->Low,Low->High" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,Frame synchronization signal timing delay" "No delay,?..." endif else group.long 0x10++0x03 line.long 0x00 "SIRMDR1,MSIOF Receive Mode Register 1" bitfld.long 0x00 31. " TRMD ,Transfer mode" "Slave,?..." bitfld.long 0x00 28.--29. " SYNCMD ,SYNC mode" "Frame start synchronization pulse,,Level mode/SPI,L/R mode" bitfld.long 0x00 25. " SYNCAC ,SYNC polarity" "Active high,Active low" textline " " bitfld.long 0x00 24. " BITLSB ,MSB/LSB first" "MSB,LSB" bitfld.long 0x00 20.--22. " DTDL ,Data pin bit delay for MSIOF_SYNC pin" "No delay,1-clock-cycle,2-clock-cycle,,,0.5-clock-cycle,1.5-clock-cycle,?..." bitfld.long 0x00 16.--18. " SYNCDL ,MSIOF_SYNC timing delay" "No delay,1-clock-cycle,2-clock-cycle,3-clock-cycle,,0.5-clock-cycle,1.5-clock-cycle,?..." endif textline " " group.long 0x14++0x07 line.long 0x00 "SIRMDR2,MSIOF Receive Mode Register 2" bitfld.long 0x00 30. " GRP ,Group count" "1,2" bitfld.long 0x00 24.--28. " BITLEN1 ,Data size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x00 16.--21. " WDLEN1 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x00 16.--23. 1. " WDLEN1 ,Word count" endif line.long 0x04 "SIRMDR3,MSIOF Receive Mode Register 3" bitfld.long 0x04 24.--28. " BITLEN2 ,Word size" ",,,,,,,8 bits,,,,,,,,16 bits,,,,,,,,24 bits,,,,,,,,32 bits" sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) bitfld.long 0x04 16.--21. " WDLEN2 ,Word count" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" else hexmask.long.byte 0x04 16.--23. 1. " WDLEN2 ,Word count" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x00))&0x80000000)==0x80000000) group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,?..." sif (cpu()!="R8A77420")||(cpu()!="R8A77430")||(cpu()!="R8A77450")||(cpu()!="R8A77470") bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif else group.long 0x28++0x03 line.long 0x00 "SICTR,MSIOF Control Register" bitfld.long 0x00 30.--31. " TSCKIZ ,Transmit clock input/output polarity select in SPI mode" "MSIOF_SCK,,0,1" bitfld.long 0x00 28.--29. " RSCKIZ ,Receive clock polarity select in SPI mode" "0,1,2,3" bitfld.long 0x00 27. " TEDG ,Transmit timing" "Rising,Falling" textline " " bitfld.long 0x00 26. " REDG ,Receive timing" "Falling,Raising" bitfld.long 0x00 22.--23. " TXDIZ ,Pin output when transmission is disabled" "0,1,High-impedance,?..." bitfld.long 0x00 15. " TSCKE ,Transmit serial clock output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 14. " TFSE ,Transmit frame synchronization signal output enable" "Disabled,Enabled" bitfld.long 0x00 13. " RSCKE ,Receive serial clock output enable" "Disabled,Enabled" bitfld.long 0x00 12. " RFSE ,Receive frame synchronization signal output enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " TXE ,Transmit enable" "Disabled,Enabled" bitfld.long 0x00 8. " RXE ,Receive enable" "Disabled,Enabled" bitfld.long 0x00 1. " TXRST ,Transmit reset" "No reset,Reset" textline " " bitfld.long 0x00 0. " RXRST ,Receive reset" "No reset,Reset" endif textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x20))&0x1F00)==0x0100) group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,?..." endif else group.word 0x20++0x01 line.word 0x00 "SITSCR,MSIOF Transmit Clock Select Register" bitfld.word 0x00 14.--15. " MSSEL ,Master clock source select" "Module clock,?..." sif (cpuis("R8J7795*")||cpuis("R8A7795*")) bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate generator,?..." else bitfld.word 0x00 13. " MSIMM ,Master clock direct select" "Baud rate gen. clk.,Master clock" endif bitfld.word 0x00 8.--12. " BRPS ,Prescaler setting" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16,/17,/18,/19,/20,/21,/22,/23,/24,/25,/26,/27,/28,/29,/30,/31,/32" textline " " bitfld.word 0x00 0.--2. " BRDV ,Baud rate generator's division ratio" "/2,/4,/8,/16,/32,,,/1" endif textline " " wgroup.long 0x50++0x03 line.long 0x00 "SITFDR,MSIOF Transmit FIFO Data Register" hexmask.long.word 0x00 16.--31. 1. " SITFD1 ,FIFO data upper 16 bits" hexmask.long.word 0x00 0.--15. 1. " SITFD2 ,FIFO data lower 16 bits" hgroup.long 0x60++0x03 hide.long 0x00 "SIRFDR,MSIOF Receive FIFO Data Register" in textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77980*"))||(cpuis("R8A77970*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77440") if (((per.l(ad:0xE7E00000+0x28))&0x300)==0x300) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7E00000+0x28))&0x300)==0x200) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO Overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" elif (((per.l(ad:0xE7E00000+0x28))&0x300)==0x100) group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" else hgroup.long 0x40++0x03 hide.long 0x00 "SISTR,MSIOF Status Register" endif else group.long 0x40++0x03 line.long 0x00 "SISTR,MSIOF Status Register" eventfld.long 0x00 29. " TFEMP ,Transmit FIFO empty" "Not empty,Empty" rbitfld.long 0x00 28. " TDREQ ,Transmit data transfer request" "Not exceeded,Exceeded" eventfld.long 0x00 23. " TEOF ,Frame transmission end" "Not detected,Detected" textline " " eventfld.long 0x00 21. " TFSERR ,Transmit frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 20. " TFOVF ,Transmit FIFO overflow" "Not occurred,Occurred" eventfld.long 0x00 19. " TFUDF ,Transmit FIFO underflow" "Not occurred,Occurred" textline " " eventfld.long 0x00 13. " RFFUL ,Receive FIFO Full" "Not full,Full" rbitfld.long 0x00 12. " RDREQ ,Receive data transfer request (size of valid data space in rx FIFO has exceeded the size specified by SIFCTR[RFWM])" "Not exceeded,Exceeded" eventfld.long 0x00 7. " REOF ,Frame reception end" "Not detected,Detected" textline " " eventfld.long 0x00 5. " RFSERR ,Receive Frame synchronization error" "Not occurred,Occurred" eventfld.long 0x00 4. " RFUDF ,Receive FIFO underflow" "Not occurred,Occurred" eventfld.long 0x00 3. " RFOVF ,Receive FIFO overflow" "Not occurred,Occurred" endif group.long 0x44++0x03 line.long 0x00 "SIIER,MSIOF Interrupt Enable Register" bitfld.long 0x00 31. " TDMAE ,Transmit data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 29. " TFEMPE ,Transmit FIFO empty enable" "Disabled,Enabled" bitfld.long 0x00 28. " TDREQE ,Transmit data transfer request enable" "Disabled,Enabled" textline " " bitfld.long 0x00 23. " TEOFE ,Frame transmission end enable" "Disabled,Enabled" bitfld.long 0x00 21. " TFSERRE ,Transmit frame synchronization error enable" "Disabled,Enabled" bitfld.long 0x00 20. " TFOVFE ,Transmit FIFO overflow enable" "Disabled,Enabled" textline " " bitfld.long 0x00 19. " TFUDFE ,Transmit FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 15. " RDMAE ,Receive data DMA transfer request enable" "Disabled,Enabled" bitfld.long 0x00 13. " RFFULE ,Receive FIFO full enable" "Disabled,Enabled" textline " " bitfld.long 0x00 12. " RDREQE ,Receive Data transfer request enable" "Disabled,Enabled" bitfld.long 0x00 7. " REOFE ,Frame Reception End enable" "Disabled,Enabled" bitfld.long 0x00 5. " RFSERRE ,Receive frame synchronization error enable" "Disabled,Enabled" textline " " bitfld.long 0x00 4. " RFUDFE ,Receive FIFO underflow enable" "Disabled,Enabled" bitfld.long 0x00 3. " RFOVFE ,Receive FIFO overflow enable" "Disabled,Enabled" group.long 0x30++0x03 line.long 0x00 "SIFCTR,MSIOF FIFO Control Register" bitfld.long 0x00 29.--31. " TFWM ,Transmit FIFO watermark" "64 stages,>=32 stages,>= 24 stages,>= 16 stages,>= 12 stages,>= 8 stages,>= 4 stages,>= 1 stage" hexmask.long.byte 0x00 20.--26. 1. " TFUA ,Transmit FIFO usable area" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,?..." else bitfld.long 0x00 13.--15. " RFWM ,Receive FIFO watermark" ">= 1 stage,>= 4 stages,>= 8 stages,>= 16 stages,>= 32 stages,>= 64 stages,>= 128 stages,256 stages" endif textline " " hexmask.long.word 0x00 4.--12. 1. " RFUA ,Receive FIFO usable area" width 0xB tree.end tree.end tree "QSPI (Quad Serial Peripheral Interface)" base ad:0xE6B10000 width 9. group.byte 0x00++0x02 line.byte 0x00 "SPCR,Control Register" bitfld.byte 0x00 7. " SPRIE ,Receive interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 6. " SPE ,SPI function enable" "Disabled,Enabled" bitfld.byte 0x00 5. " SPTIE ,Transmit interrupt enable" "Disabled,Enabled" textline " " bitfld.byte 0x00 4. " SPEIE ,Error interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 3. " MSTR ,Master/slave mode select" "Slave,Master" sif (cpu()=="RCARM2")||cpuis("R8A77940")||cpuis("RCARV2H")||(cpu()=="R8A77470")||(cpu()=="R8A77430")||(cpu()=="R8A77420")||(cpu()=="R8A77450")||(cpu()=="R8A77440") textline " " bitfld.byte 0x00 1. " WSWAP ,Word swap" "Not swapped,Swapped" bitfld.byte 0x00 0. " BSWAP ,Byte swap" "Not swapped,Swapped" endif line.byte 0x01 "SSLP,Slave Select Polarity Register" bitfld.byte 0x01 0. " SSLP ,SSL signal polarity setting" "Low,High" line.byte 0x02 "SPPCR,Pin Control Register" bitfld.byte 0x02 5. " MOIFE ,Master-mode output idle value fixing enable" "Disabled,Enabled" bitfld.byte 0x02 4. " MOIFV ,Master-mode output idle fixed value" "0,1" bitfld.byte 0x02 2. " IO3FV ,Single-/dual-SPI mode IO3 output fixed value" "0,1" textline " " bitfld.byte 0x02 1. " IO2FV ,Single-/dual-SPI mode IO2 output fixed value" "0,1" bitfld.byte 0x02 0. " SPLP ,Loopback mode" "Disabled,Enabled" rgroup.byte 0x03++0x00 line.byte 0x00 "SPSR,Status Register" bitfld.byte 0x00 7. " SPRFF ,Receive buffer full flag" "Not full,Full" bitfld.byte 0x00 6. " TEND ,Transmit end flag" "Not completed,Completed" bitfld.byte 0x00 5. " SPTEF ,Transmit buffer empty flag" "Not empty,Empty" group.long 0x04++0x03 line.long 0x00 "SPDR,Data Register" group.byte 0x08++0x00 line.byte 0x00 "SPSCR,Sequence Control Register" bitfld.byte 0x00 0.--1. " SPSC ,Sequence control specification" "0->0->...,0->1->0->...,0->1->2->0->...,0->1->2->3->0->..." rgroup.byte 0x09++0x00 line.byte 0x00 "SPSSR,Sequence Status Register" bitfld.byte 0x00 0.--1. " SPSS ,Sequence status" "SPCMD0,SPCMD1,SPCMD2,SPCMD3" group.byte 0x0A++0x04 line.byte 0x00 "SPBR,Bit Rate Register" line.byte 0x01 "SPDCR,Data Control Register" bitfld.byte 0x01 7. " TXDMY ,Dummy data transmission enable" "Disabled,Enabled" line.byte 0x02 "SPCKD,Clock Delay Register" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.byte 0x02 0.--2. " SCKDL ,Clock delay setting" "1 SPCLK cycle,2 SPCLK cycles,3 SPCLK cycles,4 SPCLK cycles,5 SPCLK cycles,6 SPCLK cycles,7 SPCLK cycles,8 SPCLK cycles" else bitfld.byte 0x02 0.--2. " SCKDL ,Clock delay setting" "1.5 SPCLK cycles,2.5 SPCLK cycles,3.5 SPCLK cycles,4.5 SPCLK cycles,5.5 SPCLK cycles,6.5 SPCLK cycles,7.5 SPCLK cycles,8.5 SPCLK cycles" endif line.byte 0x03 "SSLND,Slave Select Negation Delay Register" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") bitfld.byte 0x03 0.--2. " SLNDL ,SSL negation delay setting" "0.5 SPCLK cycle,1.5 SPCLK cycles,2.5 SPCLK cycles,3.5 SPCLK cycles,4.5 SPCLK cycles,5.5 SPCLK cycles,6.5 SPCLK cycles,7.5 SPCLK cycles" else bitfld.byte 0x03 0.--2. " SLNDL ,SSL negation delay setting" "1 SPCLK cycle,2 SPCLK cycles,3 SPCLK cycles,4 SPCLK cycles,5 SPCLK cycles,6 SPCLK cycles,7 SPCLK cycles,8 SPCLK cycles" endif line.byte 0x04 "SPND,Next-Access Delay Register" bitfld.byte 0x04 0.--2. " SPNDL ,Next-access delay setting" "1 SPCLK cycle,2 SPCLK cycles,3 SPCLK cycles,4 SPCLK cycles,5 SPCLK cycles,6 SPCLK cycles,7 SPCLK cycles,8 SPCLK cycles" group.word 0x10++0x03 line.word 0x00 "SPCMD0,Command Register 0" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.word 0x12++0x03 line.word 0x00 "SPCMD1,Command Register 1" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.word 0x14++0x03 line.word 0x00 "SPCMD2,Command Register 2" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.word 0x16++0x03 line.word 0x00 "SPCMD3,Command Register 3" bitfld.word 0x00 15. " SCKDEN ,Clock delay setting enable" "Disabled,Enabled" bitfld.word 0x00 14. " SLNDEN ,SSL negation delay setting enable" "Disabled,Enabled" bitfld.word 0x00 13. " SPNDEN ,Next-access delay enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " LSBF ,LSB first" "MSB,LSB" bitfld.word 0x00 8.--11. " SPB ,Transfer data length setting" "8 bits,16 bits,32 bits,?..." bitfld.word 0x00 7. " SSLKP ,SSL signal level keeping" "Disabled,Enabled" textline " " bitfld.word 0x00 5.--6. " SPIMOD ,SPI operating mode" "Single,Dual,Quad,?..." bitfld.word 0x00 4. " SPRW ,SPI read/write access" "Write,Read" bitfld.word 0x00 2.--3. " BRDV ,Bit rate frequency division setting" "Base,Two division,Four division,Eight division" textline " " bitfld.word 0x00 1. " CPOL ,SPCLK polarity setting" "Positive,Negative" bitfld.word 0x00 0. " CPHA ,SPCLK phase setting" "Latch on odd/shift on even,Latch on even/shift on odd" group.byte 0x18++0x00 line.byte 0x00 "SPBFCR,Buffer Control Register" bitfld.byte 0x00 7. " TXRST ,Transmit buffer data reset" "No reset,Reset" bitfld.byte 0x00 6. " RXRST ,Receive buffer data reset" "No reset,Reset" bitfld.byte 0x00 4.--5. " TXTRG ,Transmit buffer data triggering number" "31 byte,30 bytes,28 bytes,0 byte" textline " " bitfld.byte 0x00 0.--2. " RXTRG ,Receive buffer data triggering number" "1 byte,2 bytes,4 bytes,5 bytes,8 bytes,16 bytes,24 bytes,32 bytes" rgroup.word 0x1A++0x01 line.word 0x00 "SPBDCR,Buffer Data Count Register" bitfld.word 0x00 8.--13. " TXBC ,Transmit data byte counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," bitfld.word 0x00 0.--5. " RXBC ,Receive data byte counter" "Empty,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,Full,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,," group.long 0x1C++0x03 line.long 0x00 "SPBMUL0,Transfer Data Length Multiplier Setting Register 0" group.long 0x20++0x03 line.long 0x00 "SPBMUL1,Transfer Data Length Multiplier Setting Register 1" group.long 0x24++0x03 line.long 0x00 "SPBMUL2,Transfer Data Length Multiplier Setting Register 2" group.long 0x28++0x03 line.long 0x00 "SPBMUL3,Transfer Data Length Multiplier Setting Register 3" width 0x0B tree.end tree.open "MMC (Multi Media Card Interface)" tree "MMC 0" base ad:0xEE200000 width 15. group.long 0x0++0x3 line.long 0x0 "CE_CMD_SET,Command setting register" bitfld.long 0x0 30. " BOOT ,Boot Operation" "Other,Same" bitfld.long 0x0 24.--29. " CMD ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0 22.--23. " RTYP ,Response Type" "None,6byte,17byte," bitfld.long 0x0 21. " RBSY ,Response Busy Select" "Not busy,Busy" bitfld.long 0x0 19. " WDAT ,Presence/Absence of Data" "No data,Data" bitfld.long 0x0 18. " DWEN ,Read/Write" "Read,Write" textline " " bitfld.long 0x0 17. " CMLTE ,Single/Multi Block Transfer Select" "Single,Multi" bitfld.long 0x0 16. " CMD12EN ,Automatic CMD12 Issuance" "Disabled,Enabled" bitfld.long 0x0 14.--15. " RIDXC ,Response Index Check" "Response index,Bits,None," bitfld.long 0x0 12.--13. " RCRC7C ,Response CRC7 Check" "CRC7,Bits,Internal CRC7,None" bitfld.long 0x0 10. " CRC16C ,CRC16 Check in Reception" "Check,Not check" bitfld.long 0x0 9. " BOOTACK ,Receive Boot Acknowledge" "Not receive,Receive" textline " " bitfld.long 0x0 8. " CRCSTE ,CRC Status Reception" "Receive,Not receive" bitfld.long 0x0 7. " TBIT ,Transmission Bit Setting" "Set to 1,Set to 0" bitfld.long 0x0 6. " OPDM ,Open-Drain Output Mode" "Normal,Open-drain" bitfld.long 0x0 3. " SBIT ,Read Data Start Bit Detection Setting" "All 0,[0]=0" bitfld.long 0x0 0.--1. " DATW ,Data Bus Width Setting" "1,4,8," group.long 0x8++0x17 line.long 0x0 "CE_ARG,Argument register" line.long 0x4 "CE_ARG_CMD12,Argument register for automatically-issued CMD12" line.long 0x8 "CE_CMD_CTRL,Command control register" bitfld.long 0x8 0. " BREAK ,Forcible Termination of Command Sequence" "Discontinue,Normal" line.long 0xC "CE_BLOCK_SET,Transfer block setting register" hexmask.long.word 0xC 16.--31. 1. " BLKCNT ,Number of Blocks for Transfer" hexmask.long.word 0xC 0.--15. 1. " BLKSIZ ,Transfer Block Size" line.long 0x10 "CE_CLK_CTRL,Clock control register" bitfld.long 0x10 24. " CLKEN ,MMC Clock Output Control" "Not output,Output" bitfld.long 0x10 16.--19. " CLKDIV ,MMC Clock Frequency Setting" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,,,,,," bitfld.long 0x10 12.--13. " SRSPTO ,Response Timeout Setting" "64,128,256," bitfld.long 0x10 8.--11. " SRBSYTO ,Response Busy Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" line.long 0x14 "CE_BUF_ACC,Buffer access configuration register" bitfld.long 0x14 25. " DMAWEN ,Buffer Write DMA Transfer Request Enable" "Disabled,Enabled" bitfld.long 0x14 24. " DMAREN ,Buffer Read DMA Transfer Request Enable" "Disabled,Enabled" bitfld.long 0x14 17. " BUSW ,Data register access size selection" "32,16" bitfld.long 0x14 16. " ATYP ,Buffer access selection" "Not swap,Swap" rgroup.long 0x20++0x13 line.long 0x0 "CE_RESP3,Response register 3" line.long 0x4 "CE_RESP2,Response register 2" line.long 0x8 "CE_RESP1,Response register 1" line.long 0xC "CE_RESP0,Response register 0" line.long 0x10 "CE_RESP_CMD12,Response register for automatically-issued CMD12" group.long 0x34++0x3 line.long 0x0 "CE_DATA,Data register" group.long 0x3C++0xB line.long 0x0 "CE_BOOT,Boot operation setting register" bitfld.long 0x0 28.--31. " BTCLKDIV ,MMC Clock Frequency Setting in Boot Mode" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,,,,,," bitfld.long 0x0 24.--27. " SBTACKTO ,Boot Acknowledge Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x0 20.--23. " S1STBTDATTO ,1st Boot Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x0 16.--19. " SBTDATTO ,Interval Between Boot Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" line.long 0x4 "CE_INT,Interrupt flag register" bitfld.long 0x4 26. " CMD12DRE ,Automatic CMD12 Issuance & Buffer Read Complete" "Clear,Complete" bitfld.long 0x4 25. " CMD12RBE ,Automatic CMD12 Issuance Response Busy Complete" "Clear,Complete" bitfld.long 0x4 24. " CMD12CRE ,Automatic CMD12 Response Complete" "Clear,Complete" bitfld.long 0x4 23. " DTRANE ,Data Transmission Complete" "Clear,Complete" textline " " bitfld.long 0x4 22. " BUFRE ,Buffer Read Complete" "Clear,Complete" bitfld.long 0x4 21. " BUFWEN ,Buffer Write Ready" "Clear,Ready" bitfld.long 0x4 20. " BUFREN ,Buffer Read Ready" "Clear,Ready" bitfld.long 0x4 17. " RBSYE ,Response Busy Complete" "Clear,Complete" textline " " bitfld.long 0x4 16. " CRSPE ,Command/Response Complete" "Clear,Complete" bitfld.long 0x4 15. " CMDVIO ,Command Issuance Error" "Clear,Error" bitfld.long 0x4 14. " BUFVIO ,Buffer Access Error" "Clear,Error" bitfld.long 0x4 11. " WDATERR ,Write Data Error" "Clear,Error" textline " " bitfld.long 0x4 10. " RDATERR ,Read Data Error" "Clear,Error" bitfld.long 0x4 9. " RIDXERR ,Response Index Error" "Clear,Error" bitfld.long 0x4 8. " RSPERR ,Response Error" "Clear,Error" bitfld.long 0x4 4. " CRCSTO ,CRC Status Timeout" "Clear,Timeout" textline " " bitfld.long 0x4 3. " WDATTO ,Write Data Timeout" "Clear,Timeout" bitfld.long 0x4 2. " RDATTO ,Read Data Timeout" "Clear,Timeout" bitfld.long 0x4 1. " RBSYTO ,Response Busy Timeout" "Clear,Timeout" bitfld.long 0x4 0. " RSPTO ,Response Timeout" "Clear,Timeout" line.long 0x8 "CE_INT_EN,Interrupt enable register" bitfld.long 0x8 26. " MCMD12DRE ,CMD12DRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 25. " MCMD12RBE ,MCMD12RBE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 24. " MCMD12CRE ,MCMD12CRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 23. " MDTRANE ,MDTRANE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 22. " MBUFRE ,MBUFRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 21. " MBUFWEN ,MBUFWEN Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 20. " MBUFREN ,MBUFREN Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 17. " MRBSYE ,MRBSYE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 16. " MCRSPE ,MCRSPE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 15. " MCMDVIO ,MCMDVIO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 14. " MBUFVIO ,MBUFVIO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 11. " MWDATERR ,MWDATERR Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 10. " MRDATERR ,MRDATERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 9. " MRIDXERR ,MRIDXERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 8. " MRSPERR ,MRSPERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 4. " MCRCSTO ,MCRCSTO Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 3. " MWDATTO ,MWDATTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 2. " MRDATTO ,MRDATTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 1. " MRBSYTO ,RBSYTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 0. " MRSPTO ,RSPTO Interrupt Enable" "Disabled,Enabled" group.long 0x48++0x7 line.long 0x0 "CE_HOST_STS1,Status register 1" bitfld.long 0x0 31. " CMDSEQ ,Command Sequence in Progress" "Initial,Executed" bitfld.long 0x0 30. " CMDSIG ,MMCCMD State" "0,1" bitfld.long 0x0 24.--29. " RSPIDX ,Response Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x0 16.--23. 1. " DATSIG ,MMCDAT[7:0] State" textline " " hexmask.long.word 0x0 0.--15. 1. " RCVBLK ,Number of Transferred Blocks" line.long 0x4 "CE_HOST_STS2,Status register 2" bitfld.long 0x4 31. " CRCSTE ,CRC Status Error" "No error,Error" bitfld.long 0x4 30. " CRC16E ,Read Data CRC16 Error" "No error,Error" bitfld.long 0x4 29. " AC12CRCE ,Automatic CMD12 Response CRC7 Error" "No error,Error" bitfld.long 0x4 28. " RSPCRC7E ,Command Response CRC7 Error" "No error,Error" textline " " bitfld.long 0x4 27. " CRCSTEBE ,CRC Status End Bit Error" "No error,Error" bitfld.long 0x4 26. " RDATEBE ,Read Data End Bit Error" "No error,Error" bitfld.long 0x4 25. " AC12REBE ,Automatic CMD12 Response End Bit Error" "No error,Error" bitfld.long 0x4 24. " RSPEBE ,Command Response End Bit Error" "No error,Error" textline " " bitfld.long 0x4 23. " AC12IDXE ,Automatic CMD12 Response Index Error" "No error,Error" bitfld.long 0x4 22. " RSPIDXE ,Command Response Index Error" "No error,Error" bitfld.long 0x4 21. " BTACKPATE ,Boot Acknowledge Pattern Error" "No error,Error" bitfld.long 0x4 20. " BTACKEBE ,Boot Acknowledge End Bit Error" "No error,Error" textline " " bitfld.long 0x4 16.--18. " CRCST ,CRC Status/Boot Acknowledge Pattern Indication" "0,1,2,3,4,5,6,7" bitfld.long 0x4 14. " STRDATTO ,Read Data Timeout" "No timeout,Timeout" bitfld.long 0x4 13. " DATBSYTO ,Data Busy Timeout" "No timeout,Timeout" bitfld.long 0x4 12. " CRCSTTO ,CRC Status Timeout" "No timeout,Timeout" textline " " bitfld.long 0x4 11. " AC12BSYTO ,Automatic CMD12 Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x4 10. " RSPBSYTO ,Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x4 9. " AC12RSPTO ,Automatic CMD12 Response Timeout" "No timeout,Timeout" bitfld.long 0x4 8. " STRSPTO ,Response Timeout" "No timeout,Timeout" textline " " bitfld.long 0x4 7. " BTACKTO ,Boot Acknowledge Timeout" "No timeout,Timeout" bitfld.long 0x4 6. " 1STBTDATTO ,1st Boot Data Timeout" "No timeout,Timeout" bitfld.long 0x4 5. " BTDATTO ,Interval between Boot Data Timeout" "No timeout,Timeout" group.long 0x70++0x3 line.long 0x0 "CE_CLK_CTRL2,Clock control register 2" bitfld.long 0x0 24.--27. " MMC_CLKU ,Set these bits to 4 before using the MMC" ",,,,4,,,,,,,,,,," bitfld.long 0x0 16.--19. " MMC_CLKL ,Set these bits to 4 before using the MMC" ",,,,4,,,,,,,,,,," group.long 0x7C++0x3 line.long 0x0 "CE_VERSION,Version register" bitfld.long 0x0 31. " SWRST ,Software Reset" "Normal,Reset" hexmask.long.word 0x0 0.--15. 1. " VERSION ,Version information" width 0x0b tree.end tree "MMC 1" base ad:0xEE220000 width 15. group.long 0x0++0x3 line.long 0x0 "CE_CMD_SET,Command setting register" bitfld.long 0x0 30. " BOOT ,Boot Operation" "Other,Same" bitfld.long 0x0 24.--29. " CMD ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x0 22.--23. " RTYP ,Response Type" "None,6byte,17byte," bitfld.long 0x0 21. " RBSY ,Response Busy Select" "Not busy,Busy" bitfld.long 0x0 19. " WDAT ,Presence/Absence of Data" "No data,Data" bitfld.long 0x0 18. " DWEN ,Read/Write" "Read,Write" textline " " bitfld.long 0x0 17. " CMLTE ,Single/Multi Block Transfer Select" "Single,Multi" bitfld.long 0x0 16. " CMD12EN ,Automatic CMD12 Issuance" "Disabled,Enabled" bitfld.long 0x0 14.--15. " RIDXC ,Response Index Check" "Response index,Bits,None," bitfld.long 0x0 12.--13. " RCRC7C ,Response CRC7 Check" "CRC7,Bits,Internal CRC7,None" bitfld.long 0x0 10. " CRC16C ,CRC16 Check in Reception" "Check,Not check" bitfld.long 0x0 9. " BOOTACK ,Receive Boot Acknowledge" "Not receive,Receive" textline " " bitfld.long 0x0 8. " CRCSTE ,CRC Status Reception" "Receive,Not receive" bitfld.long 0x0 7. " TBIT ,Transmission Bit Setting" "Set to 1,Set to 0" bitfld.long 0x0 6. " OPDM ,Open-Drain Output Mode" "Normal,Open-drain" bitfld.long 0x0 3. " SBIT ,Read Data Start Bit Detection Setting" "All 0,[0]=0" bitfld.long 0x0 0.--1. " DATW ,Data Bus Width Setting" "1,4,8," group.long 0x8++0x17 line.long 0x0 "CE_ARG,Argument register" line.long 0x4 "CE_ARG_CMD12,Argument register for automatically-issued CMD12" line.long 0x8 "CE_CMD_CTRL,Command control register" bitfld.long 0x8 0. " BREAK ,Forcible Termination of Command Sequence" "Discontinue,Normal" line.long 0xC "CE_BLOCK_SET,Transfer block setting register" hexmask.long.word 0xC 16.--31. 1. " BLKCNT ,Number of Blocks for Transfer" hexmask.long.word 0xC 0.--15. 1. " BLKSIZ ,Transfer Block Size" line.long 0x10 "CE_CLK_CTRL,Clock control register" bitfld.long 0x10 24. " CLKEN ,MMC Clock Output Control" "Not output,Output" bitfld.long 0x10 16.--19. " CLKDIV ,MMC Clock Frequency Setting" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,,,,,," bitfld.long 0x10 12.--13. " SRSPTO ,Response Timeout Setting" "64,128,256," bitfld.long 0x10 8.--11. " SRBSYTO ,Response Busy Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" line.long 0x14 "CE_BUF_ACC,Buffer access configuration register" bitfld.long 0x14 25. " DMAWEN ,Buffer Write DMA Transfer Request Enable" "Disabled,Enabled" bitfld.long 0x14 24. " DMAREN ,Buffer Read DMA Transfer Request Enable" "Disabled,Enabled" bitfld.long 0x14 17. " BUSW ,Data register access size selection" "32,16" bitfld.long 0x14 16. " ATYP ,Buffer access selection" "Not swap,Swap" rgroup.long 0x20++0x13 line.long 0x0 "CE_RESP3,Response register 3" line.long 0x4 "CE_RESP2,Response register 2" line.long 0x8 "CE_RESP1,Response register 1" line.long 0xC "CE_RESP0,Response register 0" line.long 0x10 "CE_RESP_CMD12,Response register for automatically-issued CMD12" group.long 0x34++0x3 line.long 0x0 "CE_DATA,Data register" group.long 0x3C++0xB line.long 0x0 "CE_BOOT,Boot operation setting register" bitfld.long 0x0 28.--31. " BTCLKDIV ,MMC Clock Frequency Setting in Boot Mode" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,,,,,," bitfld.long 0x0 24.--27. " SBTACKTO ,Boot Acknowledge Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x0 20.--23. " S1STBTDATTO ,1st Boot Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" bitfld.long 0x0 16.--19. " SBTDATTO ,Interval Between Boot Data Timeout Setting" "2^14,2^15,2^16,2^17,2^18,2^19,2^20,2^21,2^22,2^23,2^24,2^25,2^26,2^27,2^28,2^29" line.long 0x4 "CE_INT,Interrupt flag register" bitfld.long 0x4 26. " CMD12DRE ,Automatic CMD12 Issuance & Buffer Read Complete" "Clear,Complete" bitfld.long 0x4 25. " CMD12RBE ,Automatic CMD12 Issuance Response Busy Complete" "Clear,Complete" bitfld.long 0x4 24. " CMD12CRE ,Automatic CMD12 Response Complete" "Clear,Complete" bitfld.long 0x4 23. " DTRANE ,Data Transmission Complete" "Clear,Complete" textline " " bitfld.long 0x4 22. " BUFRE ,Buffer Read Complete" "Clear,Complete" bitfld.long 0x4 21. " BUFWEN ,Buffer Write Ready" "Clear,Ready" bitfld.long 0x4 20. " BUFREN ,Buffer Read Ready" "Clear,Ready" bitfld.long 0x4 17. " RBSYE ,Response Busy Complete" "Clear,Complete" textline " " bitfld.long 0x4 16. " CRSPE ,Command/Response Complete" "Clear,Complete" bitfld.long 0x4 15. " CMDVIO ,Command Issuance Error" "Clear,Error" bitfld.long 0x4 14. " BUFVIO ,Buffer Access Error" "Clear,Error" bitfld.long 0x4 11. " WDATERR ,Write Data Error" "Clear,Error" textline " " bitfld.long 0x4 10. " RDATERR ,Read Data Error" "Clear,Error" bitfld.long 0x4 9. " RIDXERR ,Response Index Error" "Clear,Error" bitfld.long 0x4 8. " RSPERR ,Response Error" "Clear,Error" bitfld.long 0x4 4. " CRCSTO ,CRC Status Timeout" "Clear,Timeout" textline " " bitfld.long 0x4 3. " WDATTO ,Write Data Timeout" "Clear,Timeout" bitfld.long 0x4 2. " RDATTO ,Read Data Timeout" "Clear,Timeout" bitfld.long 0x4 1. " RBSYTO ,Response Busy Timeout" "Clear,Timeout" bitfld.long 0x4 0. " RSPTO ,Response Timeout" "Clear,Timeout" line.long 0x8 "CE_INT_EN,Interrupt enable register" bitfld.long 0x8 26. " MCMD12DRE ,CMD12DRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 25. " MCMD12RBE ,MCMD12RBE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 24. " MCMD12CRE ,MCMD12CRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 23. " MDTRANE ,MDTRANE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 22. " MBUFRE ,MBUFRE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 21. " MBUFWEN ,MBUFWEN Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 20. " MBUFREN ,MBUFREN Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 17. " MRBSYE ,MRBSYE Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 16. " MCRSPE ,MCRSPE Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 15. " MCMDVIO ,MCMDVIO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 14. " MBUFVIO ,MBUFVIO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 11. " MWDATERR ,MWDATERR Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 10. " MRDATERR ,MRDATERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 9. " MRIDXERR ,MRIDXERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 8. " MRSPERR ,MRSPERR Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 4. " MCRCSTO ,MCRCSTO Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x8 3. " MWDATTO ,MWDATTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 2. " MRDATTO ,MRDATTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 1. " MRBSYTO ,RBSYTO Interrupt Enable" "Disabled,Enabled" bitfld.long 0x8 0. " MRSPTO ,RSPTO Interrupt Enable" "Disabled,Enabled" group.long 0x48++0x7 line.long 0x0 "CE_HOST_STS1,Status register 1" bitfld.long 0x0 31. " CMDSEQ ,Command Sequence in Progress" "Initial,Executed" bitfld.long 0x0 30. " CMDSIG ,MMCCMD State" "0,1" bitfld.long 0x0 24.--29. " RSPIDX ,Response Index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" hexmask.long.byte 0x0 16.--23. 1. " DATSIG ,MMCDAT[7:0] State" textline " " hexmask.long.word 0x0 0.--15. 1. " RCVBLK ,Number of Transferred Blocks" line.long 0x4 "CE_HOST_STS2,Status register 2" bitfld.long 0x4 31. " CRCSTE ,CRC Status Error" "No error,Error" bitfld.long 0x4 30. " CRC16E ,Read Data CRC16 Error" "No error,Error" bitfld.long 0x4 29. " AC12CRCE ,Automatic CMD12 Response CRC7 Error" "No error,Error" bitfld.long 0x4 28. " RSPCRC7E ,Command Response CRC7 Error" "No error,Error" textline " " bitfld.long 0x4 27. " CRCSTEBE ,CRC Status End Bit Error" "No error,Error" bitfld.long 0x4 26. " RDATEBE ,Read Data End Bit Error" "No error,Error" bitfld.long 0x4 25. " AC12REBE ,Automatic CMD12 Response End Bit Error" "No error,Error" bitfld.long 0x4 24. " RSPEBE ,Command Response End Bit Error" "No error,Error" textline " " bitfld.long 0x4 23. " AC12IDXE ,Automatic CMD12 Response Index Error" "No error,Error" bitfld.long 0x4 22. " RSPIDXE ,Command Response Index Error" "No error,Error" bitfld.long 0x4 21. " BTACKPATE ,Boot Acknowledge Pattern Error" "No error,Error" bitfld.long 0x4 20. " BTACKEBE ,Boot Acknowledge End Bit Error" "No error,Error" textline " " bitfld.long 0x4 16.--18. " CRCST ,CRC Status/Boot Acknowledge Pattern Indication" "0,1,2,3,4,5,6,7" bitfld.long 0x4 14. " STRDATTO ,Read Data Timeout" "No timeout,Timeout" bitfld.long 0x4 13. " DATBSYTO ,Data Busy Timeout" "No timeout,Timeout" bitfld.long 0x4 12. " CRCSTTO ,CRC Status Timeout" "No timeout,Timeout" textline " " bitfld.long 0x4 11. " AC12BSYTO ,Automatic CMD12 Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x4 10. " RSPBSYTO ,Response Busy Timeout" "No timeout,Timeout" bitfld.long 0x4 9. " AC12RSPTO ,Automatic CMD12 Response Timeout" "No timeout,Timeout" bitfld.long 0x4 8. " STRSPTO ,Response Timeout" "No timeout,Timeout" textline " " bitfld.long 0x4 7. " BTACKTO ,Boot Acknowledge Timeout" "No timeout,Timeout" bitfld.long 0x4 6. " 1STBTDATTO ,1st Boot Data Timeout" "No timeout,Timeout" bitfld.long 0x4 5. " BTDATTO ,Interval between Boot Data Timeout" "No timeout,Timeout" group.long 0x70++0x3 line.long 0x0 "CE_CLK_CTRL2,Clock control register 2" bitfld.long 0x0 24.--27. " MMC_CLKU ,Set these bits to 4 before using the MMC" ",,,,4,,,,,,,,,,," bitfld.long 0x0 16.--19. " MMC_CLKL ,Set these bits to 4 before using the MMC" ",,,,4,,,,,,,,,,," group.long 0x7C++0x3 line.long 0x0 "CE_VERSION,Version register" bitfld.long 0x0 31. " SWRST ,Software Reset" "Normal,Reset" hexmask.long.word 0x0 0.--15. 1. " VERSION ,Version information" width 0x0b tree.end tree.end tree.open "EHCI/OHCI USB2.0 Host" tree "Channel 0" base ad:0xEE080000 width 17. rgroup.long 0x0++0x3 "OHCI Operational Registers" line.long 0x0 "HCREV,HcRevision register" hexmask.long.byte 0x0 0.--7. 1. " REVISION ,HCI standard version implemented by the host logic" group.long 0x4++0xB line.long 0x0 "HCTTRL,HcControl register" bitfld.long 0x0 10. " RWE ,Controls PME assertion" "Not asserted,Asserted" bitfld.long 0x0 9. " RWC ,Selects whether or not the host logic supports the remote wakeup function or not" "Not supported,Supported" bitfld.long 0x0 8. " IR ,Sets the host logic interrupt output route" "INTA,SMI" bitfld.long 0x0 6.--7. " HCFS ,Sets the host logic operation state" "Reset,Resume,Operational,Suspend" bitfld.long 0x0 5. " BLE ,Sets whether to perform Bulk list processing or not" "Not performed,Performed" textline " " bitfld.long 0x0 4. " CLE ,Sets whether to perform Control list processing or not" "Not performed,Performed" bitfld.long 0x0 3. " IE ,Sets whether or not to perform Isochronous ED processing" "Not performed,Performed" bitfld.long 0x0 2. " PLE ,Sets whether or not to perform Periodic list processing" "Not performed,Performed" bitfld.long 0x0 0.--1. " CBSR ,Sets the service ratio between the Bulk transfer and Control transfer" "1:1,2:1,3:1,4:1" line.long 0x4 "HCCMDSTAT,HcCommandStatus register" rbitfld.long 0x4 16.--17. " SOC ,Indicates the number of schedule overruns" "0,1,2,3" bitfld.long 0x4 3. " OCR ,Changes the control right of the host logic" "0,1" bitfld.long 0x4 2. " BLF ,Indicates whether there are any TDs on the Bulk list or not" "Not start,Start" bitfld.long 0x4 1. " CLF ,Indicates whether there are any TDs on the Control list or not" "Not start,Start" bitfld.long 0x4 0. " HCR ,Initiates the host logic software reset" "Not initiate,Initiate" line.long 0x8 "HCINTRSTAT,HcInterruptStatus register" eventfld.long 0x8 6. " RHSC ,HcRhStatus or HcRhPortStatus register status has changed" "No interrupt,Interrupt" eventfld.long 0x8 5. " FNO ,MSB of bits 15 to 0 (FrameNumber) in HcFmNumber has changed" "No interrupt,Interrupt" eventfld.long 0x8 4. " UE ,System error not related to the USB has been detected in the PCI bus" "No interrupt,Interrupt" eventfld.long 0x8 3. " RD ,Resume has been detected" "No interrupt,Interrupt" eventfld.long 0x8 2. " SF ,HccaFrameNumber has been updated at the start of each frame" "No interrupt,Interrupt" textline " " eventfld.long 0x8 1. " WDH ,host logic has updated the HccaDoneHead contents" "No interrupt,Interrupt" eventfld.long 0x8 0. " SO ,USB schedule has overrun in the frame" "No interrupt,Interrupt" if (((per.l(ad:(0xEE080000+0x10))&0x80000000))==0) group.long 0x10++0x3 line.long 0x0 "HCINTREN ,HcInterruptEnable register" eventfld.long 0x0 31. " MIE ,Enables interrupt source settings of bits 6 to 0 in this register" "Ignored,Enabled" else group.long 0x10++0x3 line.long 0x0 "HCINTREN ,HcInterruptEnable register" eventfld.long 0x0 31. " MIE ,Enables interrupt source settings of bits 6 to 0 in this register" "Ignored,Enabled" eventfld.long 0x0 6. " RHSCE ,Enables interrupt generation by RHSC" "Ignored,Enabled" eventfld.long 0x0 5. " FNOE ,Enables interrupt generation by FNO" "Ignored,Enabled" eventfld.long 0x0 4. " UEE ,Enables interrupt generation by UE" "Ignored,Enabled" eventfld.long 0x0 3. " RDE ,Enables interrupt generation by RD" "Ignored,Enabled" textline " " eventfld.long 0x0 2. " SFE ,Enables interrupt generation by SF" "Ignored,Enabled" eventfld.long 0x0 1. " WDHE ,Enables interrupt generation by WDH" "Ignored,Enabled" eventfld.long 0x0 0. " SOE ,Enables interrupt generation by SOE" "Ignored,Enabled" endif if (((per.l(ad:(0xEE080000+0x10)+0x4)&0x80000000))==0) group.long 0x14++0x3 line.long 0x0 "HCINTRDIS,HcInterruptDisable register" eventfld.long 0x0 31. " MID ,Enables interrupt source settings of bits 6 to 0 in this register" "Ignored,Enabled" else group.long 0x14++0x3 line.long 0x0 "HCINTRDIS,HcInterruptDisable register" eventfld.long 0x0 31. " MID ,Enables interrupt source settings of bits 6 to 0 in this register" "Ignored,Enabled" eventfld.long 0x0 6. " RHSCD ,Removes RHSC from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 5. " FNOD ,Removes FNO from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 4. " UED ,Removes UE from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 3. " RDD ,Removes RD from interrupt sources" "Ignored,Enabled" textline " " eventfld.long 0x0 2. " SFD ,Removes SF from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 1. " WDHD ,Removes WDH from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 0. " SOD ,Removes SO from interrupt sources" "Ignored,Enabled" endif group.long 0x18++0x3 line.long 0x0 "HCCCA,HcHCCA register" hexmask.long.tbyte 0x0 8.--31. 1. " HCHCCA ,Sets the base address of RAM allocated as the Host Controller Communication Area" textline "" rgroup.long 0x1C++0x3 line.long 0x0 "HCPERCURED,HcPeriodicCurrentED register" hexmask.long.tbyte 0x0 8.--31. 1. " PERIODICCURRENTED ,Physical address of the ED currently processed in the Periodic list" group.long 0x20++0xF line.long 0x0 "HCCTRLHEADED,HcControlHeadED register" hexmask.long 0x0 4.--31. 1. " CONTROLHEADED ,Sets the physical address of the first ED in the Control list" line.long 0x4 "HCCTRLCURED,HcControlCurrentED register" hexmask.long 0x4 4.--31. 1. " CONTROLCURRENTED ,Physical address of the ED currently processed in the Control list" line.long 0x8 "HCBULKHEADED,HcBulkHeadED register" hexmask.long 0x8 4.--31. 1. " BULKHEADED ,Sets the physical address of the first ED in the Bulk list" line.long 0xC "HCBULKCURED,HcBulkCurrentED register" hexmask.long 0xC 4.--31. 1. " BULKCURRENTED ,Physical address of the ED currently processed in the Bulk list" rgroup.long 0x30++0x3 line.long 0x0 "HCDONEHEAD,HcDoneHead register" hexmask.long 0x0 4.--31. 1. " DONEHEAD ,Physical address of HcDoneHead of the host logic" textline "" group.long 0x34++0x3 line.long 0x0 "HCFMINTERVAL,HcFmInterval register" bitfld.long 0x0 31. " FIT ,Synchronization of the frame settings between the software and host logic" "0,1" hexmask.long.word 0x0 16.--30. 1. " FSMPS ,Sets the largest amount data to be transmitted or received without causing a schedule overrun" hexmask.long.word 0x0 0.--13. 1. " FI ,Sets the frame length (bit time) used in a FS transfer" rgroup.long 0x38++0x7 line.long 0x0 "HCFMREM,HcFmRemaining register" bitfld.long 0x0 31. " FRT ,synchronization of the frame settings between the software and host logic" "0,1" hexmask.long.word 0x0 0.--13. 1. " FR ,Current frame value in the 14-bit down counter" line.long 0x4 "HCFMNUM,HcFmNumber register" hexmask.long.word 0x4 0.--15. 1. " FRAMENUMBER ,Indicates the number of frames elapsed" group.long 0x40++0xB line.long 0x0 "HCPERIODICSTART,HcPeriodicStart register" hexmask.long.word 0x0 0.--13. 1. " PERIODICSTART ,Time when the host logic should start periodic list processing in the frame" line.long 0x4 "HCLSTHR,HcLSThreshold register" hexmask.long.word 0x4 0.--11. 1. " HCLSTHRESHOLD ,Determine whether or not the transfer can be performed" textline "" line.long 0x8 "HCRHDESCA,HcRhDescriptorA register" hexmask.long.byte 0x8 24.--31. 1. " POTPGT ,Sets the wait time from power supply to the root-hub port to access by the software" bitfld.long 0x8 12. " NOCP ,Specifies whether to support the root-hub overcurrent function" "Supported,Not supported" bitfld.long 0x8 11. " OCPM ,Specifies how to notify the root-hub overcurrent status" "Collectively,Each" rbitfld.long 0x8 10. " DT ,Indicates that the root-hub is not a composite device" "0," bitfld.long 0x8 9. " NPS ,Specifies the port power supply control method" "On/Off,On" textline " " bitfld.long 0x8 8. " PSM ,Specifies how to control the power switching of each root-hub port" "All,Individually" hexmask.long.byte 0x8 0.--7. 1. " NDP ,Specifies the number of down-stream ports supported by the host logic root-hub" rgroup.long 0x4C++0x3 line.long 0x0 "HCRHDESCB,HcRhDescriptorB register" hexmask.long.word 0x0 16.--31. 1. " PPCM ,Sets the power supply control command for each port" hexmask.long.word 0x0 0.--15. 1. " DR ,Sets whether each root-hub port is removable or not" group.long 0x50++0x7 line.long 0x0 "HCRHDESCB,HcRhDescriptorA register" bitfld.long 0x0 31. " CRWE ,Clears the DRWE bit" "No effect,Clear" bitfld.long 0x0 17. " OCIC ,Indicates that the OCI bit has changed" "Not changed,Changed" bitfld.long 0x0 16. " LPSC ,This bit is always read as 0b because LocalPowerStatus is not supported" "0," bitfld.long 0x0 15. " DRWE ,Enable the CSC (bit 16) in HcRhPortStatus 1 as the RemoteWakeup event" "Disabled,Enabled" bitfld.long 0x0 1. " OCI ,Notifies the overcurrent status in global overcurrent detection mode" "Normal,Overcurrent" textline " " bitfld.long 0x0 0. " LPC ,This bit is always read as 0 because LocalPowerStatus is not supported" "0," line.long 0x4 "HCRHPORTSTATUS1,HcRhPortStatus1 register" eventfld.long 0x4 20. " PRSC ,Indicates that a port reset is completed" "Not completed,Ceompleted" eventfld.long 0x4 19. " OCIC ,This bit is set when the port overcurrent status has been detected" "Not changed,Changed" eventfld.long 0x4 18. " PSSC ,Indicates that RESUME sequence is completed" "Not completed,Completed" eventfld.long 0x4 17. " PESC ,Indicates that the PES bit has changed" "Not changed,Changed" eventfld.long 0x4 16. " CSC ,Indicates that the CCS bit has changed" "Not changed,Changed" textline " " bitfld.long 0x4 9. " LSDA ,Indicates the speed of the device connected to the port" "FS,LS" bitfld.long 0x4 8. " PPS ,Indicates the port power supply status" "Off,On" bitfld.long 0x4 4. " PRS ,Indicates the port reset status" "Not performed,In progress" bitfld.long 0x4 3. " POCI ,Indicates that the down-stream port is in the overcurrent status" "Normal,Overcurrent" bitfld.long 0x4 2. " PSS ,Port is in the Suspend status or in the Resume sequence" "Normal,Suspend" textline " " bitfld.long 0x4 1. " PES ,Indicates whether the port is enabled or disabled" "Disabled,Enabled" bitfld.long 0x4 0. " CCS ,Indicates the current connection state of the down-stream port" "Not connected,Connected" width 18. group.long 0x1000++0x3 "EHCI Operational Registers" line.long 0x0 "HCIVERSION,HCIVERSION register" hexmask.long.word 0x0 16.--31. 1. " INTVERNUM ,EHCI standard version supported by the host logic" hexmask.long.byte 0x0 0.--7. 1. " CAPREGSLEN ,Start address of the operational register area" rgroup.long 0x1004++0xB line.long 0x0 "HCSPARAMS,HCSPARAMS register" bitfld.long 0x0 20.--23. " DBGPNUM ,Indicates a debugging port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16. " P_INDICATOR ,Indicates whether or not the host logic supports the port indicator control function" "Not support,Support" bitfld.long 0x0 12.--15. " N_CC ,Number of OHCI host logics related to the EHCI host logic" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 8.--11. " N_PCC ,Indicates the number of ports supported by one OHCI host logic" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 7. " PROUTERULS ,Indicates how the ports are mapped by the OHCI host logic" "0,1" bitfld.long 0x0 4. " PPC ,Indicates how the port power is controlled" "0,1" bitfld.long 0x0 0.--3. " N_PORTS ,Indicates the number of down-stream ports" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "HCCPARAMS,HCCPARAMS register" hexmask.long.byte 0x4 8.--15. 1. " EECP ,Offset address for the EHCI extend capabilities registers" bitfld.long 0x4 4.--7. " IST ,The set value is 0h since the host logic does not support the cache mode for isochronous schedule data for the whole frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 2. " ASPC ,Indicates whether or not the park mode function is supported for high-speed queue heads in asynchronous schedules" "0,1" bitfld.long 0x4 1. " PFLF ,Indicates how the size of the frame list to be used by the software is set" "0,1" bitfld.long 0x4 0. " 64AC ,Indicates whether the data structure uses the 32-bit or 64-bit address memory pointer" "32," line.long 0x8 "HCSP_PORTROUTE, HCSP_PORTROUTE register" group.long 0x1020++0xF line.long 0x0 "USBCMD,USBCMD register" hexmask.long.byte 0x0 16.--23. 1. " ITC ,Specifies the maximum rate for interrupts generated by the host logic" bitfld.long 0x0 11. " ASPME ,Enables or disables park mode" "Disabled,Enabled" bitfld.long 0x0 8.--9. " ASPMC ,Specifies the number of transactions that can be executed continuously from one QH" "0,1,2,3" bitfld.long 0x0 7. " LHCR ,Indicates the execution status of the Light Host Controller Reset command" "0," bitfld.long 0x0 6. " IAAD ,This bit is used as a doorbell by the software" "0,1" textline " " bitfld.long 0x0 5. " ASE ,Specifies that the host logic executes or skips asynchronous list processing" "Skipped,ASYNCLISTADDR" bitfld.long 0x0 4. " PSE ,Specifies that the host logic executes or skips periodic list processing" "Skipped,PERIODICLISTBASE" bitfld.long 0x0 2.--3. " FLS ,Specifies the frame list size" "1024,512,256," bitfld.long 0x0 1. " HCRESET ,Resets the host logic" "0,1" bitfld.long 0x0 0. " RS ,Controls the ON/OFF action of the EHCI host logic" "Stopped,Executed" line.long 0x4 "USBSTS,USBSTS register" rbitfld.long 0x4 15. " ASS ,Indicates the current status of asynchronous schedules" "Disabled,Enabled" rbitfld.long 0x4 14. " PSS ,Indicates the current status of periodic schedules" "Disabled,Enabled" rbitfld.long 0x4 13. " REC ,This bit is used to detect empty asynchronous schedule state" "0,1" rbitfld.long 0x4 12. " HCHALTED ,This bit is cleared to 0b when the RS (bit 0) in USBCMD is 1b" "In progress,Stopped" bitfld.long 0x4 5. " ISA ,Indicates the Async Advance interrupt status" "Not generated,Detected" textline " " bitfld.long 0x4 4. " HSE ,This bit is set to 1b if a severe error" "No error,Error" bitfld.long 0x4 3. " FLR ,The host logic sets this bit to 1b if the Frame Index bit in FRINDEX rolls over from its maximum value to 0x0" "Not ocurred,Ocurred" bitfld.long 0x4 2. " PCD ,Indicates that port status has changed" "No effect,Changed" bitfld.long 0x4 1. " USBERRINT ,Indicates that a USB transaction has ended with an error" "Normal,Error" bitfld.long 0x4 0. " USBINT ,Indicates that the USB transfer has ended" "Not ended,Ended" textline "" line.long 0x8 "USBINTR,USBINTR register" bitfld.long 0x8 5. " IAAE ,Enables or disables the Interrupt on Async Advance" "Disabled,Enabled" bitfld.long 0x8 4. " HSEE ,Enables or disables the Host System Error" "Disabled,Enabled" bitfld.long 0x8 3. " FLRE ,Enables or disables the Frame List Rollover" "Disabled,Enabled" bitfld.long 0x8 2. " PCIE ,Enables or disables the Port Change Detect" "Disabled,Enabled" bitfld.long 0x8 1. " USBEIE ,Enables or disables the USBERRINT" "Disabled,Enabled" bitfld.long 0x8 0. " USBIE ,Enables or disables the USBINT" "Disabled,Enabled" line.long 0xC "FRINDEX,FRINDEX register" hexmask.long.word 0xC 0.--13. 1. " FRAMEINDEX ,This bit is used to attach an index to a periodic frame list by the host logic" rgroup.long 0x1030++0x3 line.long 0x0 "CTRLDSSEGMENT,CTRLDSSEGMENT register" group.long 0x1034++0x7 line.long 0x0 "PERIODICLISTBASE,PERIODICLISTBASE register" hexmask.long 0x0 12.--31. 1. " BASEADDRLO ,Specifies the start address of the periodic frame list placed on the system memory" line.long 0x4 "ASYNCLISTADDR,ASYNCLISTADDR register" hexmask.long 0x4 5.--31. 1. " LPL ,Specifies the asynchronous queue head for the next execution in the system memory" textline "" group.long 0x1060++0x7 line.long 0x0 "CONFIGFLAG,CONFIGFLAG register" bitfld.long 0x0 0. " CF ,Specifies whether the OHCI or EHCI is routed by the port routing control circuit by default" "OHCI,EHCI" line.long 0x4 "PORTSC1,PORTSC1 register" bitfld.long 0x4 22. " WKOC_E ,Setting this bit to 1 enables detecting overcurrent for ports as a wakeup event" "0,1" bitfld.long 0x4 21. " WKDSCNNT_E ,Setting this bit to 1 enables detecting device disconnection as a wakeup event" "0,1" bitfld.long 0x4 20. " WKCNNT_E ,Setting this bit to 1 enables detecting device connection as a wakeup event" "0,1" bitfld.long 0x4 16.--19. " PTC ,Controls test mode" "Normal,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,,,,,,,,,," bitfld.long 0x4 14.--15. " PIC ,Since the host logic does not support the port indicator control function, these bits are set to 00b" "0,,," bitfld.long 0x4 13. " PO ,Specifies whether the OHCI or EHCI has the port ownership" "EHCI,OHCI" textline " " bitfld.long 0x4 12. " PP ,Controls the port power" "Always on,On/Off" bitfld.long 0x4 10.--11. " LS ,These bits indicate the current D+/D- logic level" "SE0,K-state,J-state,Undefined" bitfld.long 0x4 8. " PR ,Controls the port resetting processing" "Reset,Not reset" bitfld.long 0x4 7. " SUSPEND ,Indicates the suspend state of the port" "0,1" bitfld.long 0x4 6. " FPR ,Indicates that the Resume operation of the port has been detected" "Not detected,Detected" bitfld.long 0x4 5. " OCC ,Indicates that the Over-Current Active" "Not changed,Changed" textline " " bitfld.long 0x4 4. " OCA ,Indicates the port overcurrent status" "Not overcurrent,Overcurrent" bitfld.long 0x4 3. " PEC ,Indicates that the port enable/disable status has changed" "Not changed,Changed" bitfld.long 0x4 2. " PED ,Indicates that the port is enabled or disabled" "Disabled,Enabled" bitfld.long 0x4 1. " CSC ,Indicates that the Current Connect Status" "Not changed,Changed" bitfld.long 0x4 0. " CCS ,Indicates the port connection status" "No device,Device" width 0x0b tree.end tree "Channel 1" base ad:0xEE0C0000 width 17. rgroup.long 0x0++0x3 "OHCI Operational Registers" line.long 0x0 "HCREV,HcRevision register" hexmask.long.byte 0x0 0.--7. 1. " REVISION ,HCI standard version implemented by the host logic" group.long 0x4++0xB line.long 0x0 "HCTTRL,HcControl register" bitfld.long 0x0 10. " RWE ,Controls PME assertion" "Not asserted,Asserted" bitfld.long 0x0 9. " RWC ,Selects whether or not the host logic supports the remote wakeup function or not" "Not supported,Supported" bitfld.long 0x0 8. " IR ,Sets the host logic interrupt output route" "INTA,SMI" bitfld.long 0x0 6.--7. " HCFS ,Sets the host logic operation state" "Reset,Resume,Operational,Suspend" bitfld.long 0x0 5. " BLE ,Sets whether to perform Bulk list processing or not" "Not performed,Performed" textline " " bitfld.long 0x0 4. " CLE ,Sets whether to perform Control list processing or not" "Not performed,Performed" bitfld.long 0x0 3. " IE ,Sets whether or not to perform Isochronous ED processing" "Not performed,Performed" bitfld.long 0x0 2. " PLE ,Sets whether or not to perform Periodic list processing" "Not performed,Performed" bitfld.long 0x0 0.--1. " CBSR ,Sets the service ratio between the Bulk transfer and Control transfer" "1:1,2:1,3:1,4:1" line.long 0x4 "HCCMDSTAT,HcCommandStatus register" rbitfld.long 0x4 16.--17. " SOC ,Indicates the number of schedule overruns" "0,1,2,3" bitfld.long 0x4 3. " OCR ,Changes the control right of the host logic" "0,1" bitfld.long 0x4 2. " BLF ,Indicates whether there are any TDs on the Bulk list or not" "Not start,Start" bitfld.long 0x4 1. " CLF ,Indicates whether there are any TDs on the Control list or not" "Not start,Start" bitfld.long 0x4 0. " HCR ,Initiates the host logic software reset" "Not initiate,Initiate" line.long 0x8 "HCINTRSTAT,HcInterruptStatus register" eventfld.long 0x8 6. " RHSC ,HcRhStatus or HcRhPortStatus register status has changed" "No interrupt,Interrupt" eventfld.long 0x8 5. " FNO ,MSB of bits 15 to 0 (FrameNumber) in HcFmNumber has changed" "No interrupt,Interrupt" eventfld.long 0x8 4. " UE ,System error not related to the USB has been detected in the PCI bus" "No interrupt,Interrupt" eventfld.long 0x8 3. " RD ,Resume has been detected" "No interrupt,Interrupt" eventfld.long 0x8 2. " SF ,HccaFrameNumber has been updated at the start of each frame" "No interrupt,Interrupt" textline " " eventfld.long 0x8 1. " WDH ,host logic has updated the HccaDoneHead contents" "No interrupt,Interrupt" eventfld.long 0x8 0. " SO ,USB schedule has overrun in the frame" "No interrupt,Interrupt" if (((per.l(ad:(0xEE0C0000+0x10))&0x80000000))==0) group.long 0x10++0x3 line.long 0x0 "HCINTREN ,HcInterruptEnable register" eventfld.long 0x0 31. " MIE ,Enables interrupt source settings of bits 6 to 0 in this register" "Ignored,Enabled" else group.long 0x10++0x3 line.long 0x0 "HCINTREN ,HcInterruptEnable register" eventfld.long 0x0 31. " MIE ,Enables interrupt source settings of bits 6 to 0 in this register" "Ignored,Enabled" eventfld.long 0x0 6. " RHSCE ,Enables interrupt generation by RHSC" "Ignored,Enabled" eventfld.long 0x0 5. " FNOE ,Enables interrupt generation by FNO" "Ignored,Enabled" eventfld.long 0x0 4. " UEE ,Enables interrupt generation by UE" "Ignored,Enabled" eventfld.long 0x0 3. " RDE ,Enables interrupt generation by RD" "Ignored,Enabled" textline " " eventfld.long 0x0 2. " SFE ,Enables interrupt generation by SF" "Ignored,Enabled" eventfld.long 0x0 1. " WDHE ,Enables interrupt generation by WDH" "Ignored,Enabled" eventfld.long 0x0 0. " SOE ,Enables interrupt generation by SOE" "Ignored,Enabled" endif if (((per.l(ad:(0xEE0C0000+0x10)+0x4)&0x80000000))==0) group.long 0x14++0x3 line.long 0x0 "HCINTRDIS,HcInterruptDisable register" eventfld.long 0x0 31. " MID ,Enables interrupt source settings of bits 6 to 0 in this register" "Ignored,Enabled" else group.long 0x14++0x3 line.long 0x0 "HCINTRDIS,HcInterruptDisable register" eventfld.long 0x0 31. " MID ,Enables interrupt source settings of bits 6 to 0 in this register" "Ignored,Enabled" eventfld.long 0x0 6. " RHSCD ,Removes RHSC from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 5. " FNOD ,Removes FNO from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 4. " UED ,Removes UE from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 3. " RDD ,Removes RD from interrupt sources" "Ignored,Enabled" textline " " eventfld.long 0x0 2. " SFD ,Removes SF from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 1. " WDHD ,Removes WDH from interrupt sources" "Ignored,Enabled" eventfld.long 0x0 0. " SOD ,Removes SO from interrupt sources" "Ignored,Enabled" endif group.long 0x18++0x3 line.long 0x0 "HCCCA,HcHCCA register" hexmask.long.tbyte 0x0 8.--31. 1. " HCHCCA ,Sets the base address of RAM allocated as the Host Controller Communication Area" textline "" rgroup.long 0x1C++0x3 line.long 0x0 "HCPERCURED,HcPeriodicCurrentED register" hexmask.long.tbyte 0x0 8.--31. 1. " PERIODICCURRENTED ,Physical address of the ED currently processed in the Periodic list" group.long 0x20++0xF line.long 0x0 "HCCTRLHEADED,HcControlHeadED register" hexmask.long 0x0 4.--31. 1. " CONTROLHEADED ,Sets the physical address of the first ED in the Control list" line.long 0x4 "HCCTRLCURED,HcControlCurrentED register" hexmask.long 0x4 4.--31. 1. " CONTROLCURRENTED ,Physical address of the ED currently processed in the Control list" line.long 0x8 "HCBULKHEADED,HcBulkHeadED register" hexmask.long 0x8 4.--31. 1. " BULKHEADED ,Sets the physical address of the first ED in the Bulk list" line.long 0xC "HCBULKCURED,HcBulkCurrentED register" hexmask.long 0xC 4.--31. 1. " BULKCURRENTED ,Physical address of the ED currently processed in the Bulk list" rgroup.long 0x30++0x3 line.long 0x0 "HCDONEHEAD,HcDoneHead register" hexmask.long 0x0 4.--31. 1. " DONEHEAD ,Physical address of HcDoneHead of the host logic" textline "" group.long 0x34++0x3 line.long 0x0 "HCFMINTERVAL,HcFmInterval register" bitfld.long 0x0 31. " FIT ,Synchronization of the frame settings between the software and host logic" "0,1" hexmask.long.word 0x0 16.--30. 1. " FSMPS ,Sets the largest amount data to be transmitted or received without causing a schedule overrun" hexmask.long.word 0x0 0.--13. 1. " FI ,Sets the frame length (bit time) used in a FS transfer" rgroup.long 0x38++0x7 line.long 0x0 "HCFMREM,HcFmRemaining register" bitfld.long 0x0 31. " FRT ,synchronization of the frame settings between the software and host logic" "0,1" hexmask.long.word 0x0 0.--13. 1. " FR ,Current frame value in the 14-bit down counter" line.long 0x4 "HCFMNUM,HcFmNumber register" hexmask.long.word 0x4 0.--15. 1. " FRAMENUMBER ,Indicates the number of frames elapsed" group.long 0x40++0xB line.long 0x0 "HCPERIODICSTART,HcPeriodicStart register" hexmask.long.word 0x0 0.--13. 1. " PERIODICSTART ,Time when the host logic should start periodic list processing in the frame" line.long 0x4 "HCLSTHR,HcLSThreshold register" hexmask.long.word 0x4 0.--11. 1. " HCLSTHRESHOLD ,Determine whether or not the transfer can be performed" textline "" line.long 0x8 "HCRHDESCA,HcRhDescriptorA register" hexmask.long.byte 0x8 24.--31. 1. " POTPGT ,Sets the wait time from power supply to the root-hub port to access by the software" bitfld.long 0x8 12. " NOCP ,Specifies whether to support the root-hub overcurrent function" "Supported,Not supported" bitfld.long 0x8 11. " OCPM ,Specifies how to notify the root-hub overcurrent status" "Collectively,Each" rbitfld.long 0x8 10. " DT ,Indicates that the root-hub is not a composite device" "0," bitfld.long 0x8 9. " NPS ,Specifies the port power supply control method" "On/Off,On" textline " " bitfld.long 0x8 8. " PSM ,Specifies how to control the power switching of each root-hub port" "All,Individually" hexmask.long.byte 0x8 0.--7. 1. " NDP ,Specifies the number of down-stream ports supported by the host logic root-hub" rgroup.long 0x4C++0x3 line.long 0x0 "HCRHDESCB,HcRhDescriptorB register" hexmask.long.word 0x0 16.--31. 1. " PPCM ,Sets the power supply control command for each port" hexmask.long.word 0x0 0.--15. 1. " DR ,Sets whether each root-hub port is removable or not" group.long 0x50++0x7 line.long 0x0 "HCRHDESCB,HcRhDescriptorA register" bitfld.long 0x0 31. " CRWE ,Clears the DRWE bit" "No effect,Clear" bitfld.long 0x0 17. " OCIC ,Indicates that the OCI bit has changed" "Not changed,Changed" bitfld.long 0x0 16. " LPSC ,This bit is always read as 0b because LocalPowerStatus is not supported" "0," bitfld.long 0x0 15. " DRWE ,Enable the CSC (bit 16) in HcRhPortStatus 1 as the RemoteWakeup event" "Disabled,Enabled" bitfld.long 0x0 1. " OCI ,Notifies the overcurrent status in global overcurrent detection mode" "Normal,Overcurrent" textline " " bitfld.long 0x0 0. " LPC ,This bit is always read as 0 because LocalPowerStatus is not supported" "0," line.long 0x4 "HCRHPORTSTATUS1,HcRhPortStatus1 register" eventfld.long 0x4 20. " PRSC ,Indicates that a port reset is completed" "Not completed,Ceompleted" eventfld.long 0x4 19. " OCIC ,This bit is set when the port overcurrent status has been detected" "Not changed,Changed" eventfld.long 0x4 18. " PSSC ,Indicates that RESUME sequence is completed" "Not completed,Completed" eventfld.long 0x4 17. " PESC ,Indicates that the PES bit has changed" "Not changed,Changed" eventfld.long 0x4 16. " CSC ,Indicates that the CCS bit has changed" "Not changed,Changed" textline " " bitfld.long 0x4 9. " LSDA ,Indicates the speed of the device connected to the port" "FS,LS" bitfld.long 0x4 8. " PPS ,Indicates the port power supply status" "Off,On" bitfld.long 0x4 4. " PRS ,Indicates the port reset status" "Not performed,In progress" bitfld.long 0x4 3. " POCI ,Indicates that the down-stream port is in the overcurrent status" "Normal,Overcurrent" bitfld.long 0x4 2. " PSS ,Port is in the Suspend status or in the Resume sequence" "Normal,Suspend" textline " " bitfld.long 0x4 1. " PES ,Indicates whether the port is enabled or disabled" "Disabled,Enabled" bitfld.long 0x4 0. " CCS ,Indicates the current connection state of the down-stream port" "Not connected,Connected" width 18. group.long 0x1000++0x3 "EHCI Operational Registers" line.long 0x0 "HCIVERSION,HCIVERSION register" hexmask.long.word 0x0 16.--31. 1. " INTVERNUM ,EHCI standard version supported by the host logic" hexmask.long.byte 0x0 0.--7. 1. " CAPREGSLEN ,Start address of the operational register area" rgroup.long 0x1004++0xB line.long 0x0 "HCSPARAMS,HCSPARAMS register" bitfld.long 0x0 20.--23. " DBGPNUM ,Indicates a debugging port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 16. " P_INDICATOR ,Indicates whether or not the host logic supports the port indicator control function" "Not support,Support" bitfld.long 0x0 12.--15. " N_CC ,Number of OHCI host logics related to the EHCI host logic" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 8.--11. " N_PCC ,Indicates the number of ports supported by one OHCI host logic" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0 7. " PROUTERULS ,Indicates how the ports are mapped by the OHCI host logic" "0,1" bitfld.long 0x0 4. " PPC ,Indicates how the port power is controlled" "0,1" bitfld.long 0x0 0.--3. " N_PORTS ,Indicates the number of down-stream ports" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" line.long 0x4 "HCCPARAMS,HCCPARAMS register" hexmask.long.byte 0x4 8.--15. 1. " EECP ,Offset address for the EHCI extend capabilities registers" bitfld.long 0x4 4.--7. " IST ,The set value is 0h since the host logic does not support the cache mode for isochronous schedule data for the whole frame" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x4 2. " ASPC ,Indicates whether or not the park mode function is supported for high-speed queue heads in asynchronous schedules" "0,1" bitfld.long 0x4 1. " PFLF ,Indicates how the size of the frame list to be used by the software is set" "0,1" bitfld.long 0x4 0. " 64AC ,Indicates whether the data structure uses the 32-bit or 64-bit address memory pointer" "32," line.long 0x8 "HCSP_PORTROUTE, HCSP_PORTROUTE register" group.long 0x1020++0xF line.long 0x0 "USBCMD,USBCMD register" hexmask.long.byte 0x0 16.--23. 1. " ITC ,Specifies the maximum rate for interrupts generated by the host logic" bitfld.long 0x0 11. " ASPME ,Enables or disables park mode" "Disabled,Enabled" bitfld.long 0x0 8.--9. " ASPMC ,Specifies the number of transactions that can be executed continuously from one QH" "0,1,2,3" bitfld.long 0x0 7. " LHCR ,Indicates the execution status of the Light Host Controller Reset command" "0," bitfld.long 0x0 6. " IAAD ,This bit is used as a doorbell by the software" "0,1" textline " " bitfld.long 0x0 5. " ASE ,Specifies that the host logic executes or skips asynchronous list processing" "Skipped,ASYNCLISTADDR" bitfld.long 0x0 4. " PSE ,Specifies that the host logic executes or skips periodic list processing" "Skipped,PERIODICLISTBASE" bitfld.long 0x0 2.--3. " FLS ,Specifies the frame list size" "1024,512,256," bitfld.long 0x0 1. " HCRESET ,Resets the host logic" "0,1" bitfld.long 0x0 0. " RS ,Controls the ON/OFF action of the EHCI host logic" "Stopped,Executed" line.long 0x4 "USBSTS,USBSTS register" rbitfld.long 0x4 15. " ASS ,Indicates the current status of asynchronous schedules" "Disabled,Enabled" rbitfld.long 0x4 14. " PSS ,Indicates the current status of periodic schedules" "Disabled,Enabled" rbitfld.long 0x4 13. " REC ,This bit is used to detect empty asynchronous schedule state" "0,1" rbitfld.long 0x4 12. " HCHALTED ,This bit is cleared to 0b when the RS (bit 0) in USBCMD is 1b" "In progress,Stopped" bitfld.long 0x4 5. " ISA ,Indicates the Async Advance interrupt status" "Not generated,Detected" textline " " bitfld.long 0x4 4. " HSE ,This bit is set to 1b if a severe error" "No error,Error" bitfld.long 0x4 3. " FLR ,The host logic sets this bit to 1b if the Frame Index bit in FRINDEX rolls over from its maximum value to 0x0" "Not ocurred,Ocurred" bitfld.long 0x4 2. " PCD ,Indicates that port status has changed" "No effect,Changed" bitfld.long 0x4 1. " USBERRINT ,Indicates that a USB transaction has ended with an error" "Normal,Error" bitfld.long 0x4 0. " USBINT ,Indicates that the USB transfer has ended" "Not ended,Ended" textline "" line.long 0x8 "USBINTR,USBINTR register" bitfld.long 0x8 5. " IAAE ,Enables or disables the Interrupt on Async Advance" "Disabled,Enabled" bitfld.long 0x8 4. " HSEE ,Enables or disables the Host System Error" "Disabled,Enabled" bitfld.long 0x8 3. " FLRE ,Enables or disables the Frame List Rollover" "Disabled,Enabled" bitfld.long 0x8 2. " PCIE ,Enables or disables the Port Change Detect" "Disabled,Enabled" bitfld.long 0x8 1. " USBEIE ,Enables or disables the USBERRINT" "Disabled,Enabled" bitfld.long 0x8 0. " USBIE ,Enables or disables the USBINT" "Disabled,Enabled" line.long 0xC "FRINDEX,FRINDEX register" hexmask.long.word 0xC 0.--13. 1. " FRAMEINDEX ,This bit is used to attach an index to a periodic frame list by the host logic" rgroup.long 0x1030++0x3 line.long 0x0 "CTRLDSSEGMENT,CTRLDSSEGMENT register" group.long 0x1034++0x7 line.long 0x0 "PERIODICLISTBASE,PERIODICLISTBASE register" hexmask.long 0x0 12.--31. 1. " BASEADDRLO ,Specifies the start address of the periodic frame list placed on the system memory" line.long 0x4 "ASYNCLISTADDR,ASYNCLISTADDR register" hexmask.long 0x4 5.--31. 1. " LPL ,Specifies the asynchronous queue head for the next execution in the system memory" textline "" group.long 0x1060++0x7 line.long 0x0 "CONFIGFLAG,CONFIGFLAG register" bitfld.long 0x0 0. " CF ,Specifies whether the OHCI or EHCI is routed by the port routing control circuit by default" "OHCI,EHCI" line.long 0x4 "PORTSC1,PORTSC1 register" bitfld.long 0x4 22. " WKOC_E ,Setting this bit to 1 enables detecting overcurrent for ports as a wakeup event" "0,1" bitfld.long 0x4 21. " WKDSCNNT_E ,Setting this bit to 1 enables detecting device disconnection as a wakeup event" "0,1" bitfld.long 0x4 20. " WKCNNT_E ,Setting this bit to 1 enables detecting device connection as a wakeup event" "0,1" bitfld.long 0x4 16.--19. " PTC ,Controls test mode" "Normal,J_STATE,K_STATE,SE0_NAK,Packet,FORCE_ENABLE,,,,,,,,,," bitfld.long 0x4 14.--15. " PIC ,Since the host logic does not support the port indicator control function, these bits are set to 00b" "0,,," bitfld.long 0x4 13. " PO ,Specifies whether the OHCI or EHCI has the port ownership" "EHCI,OHCI" textline " " bitfld.long 0x4 12. " PP ,Controls the port power" "Always on,On/Off" bitfld.long 0x4 10.--11. " LS ,These bits indicate the current D+/D- logic level" "SE0,K-state,J-state,Undefined" bitfld.long 0x4 8. " PR ,Controls the port resetting processing" "Reset,Not reset" bitfld.long 0x4 7. " SUSPEND ,Indicates the suspend state of the port" "0,1" bitfld.long 0x4 6. " FPR ,Indicates that the Resume operation of the port has been detected" "Not detected,Detected" bitfld.long 0x4 5. " OCC ,Indicates that the Over-Current Active" "Not changed,Changed" textline " " bitfld.long 0x4 4. " OCA ,Indicates the port overcurrent status" "Not overcurrent,Overcurrent" bitfld.long 0x4 3. " PEC ,Indicates that the port enable/disable status has changed" "Not changed,Changed" bitfld.long 0x4 2. " PED ,Indicates that the port is enabled or disabled" "Disabled,Enabled" bitfld.long 0x4 1. " CSC ,Indicates that the Current Connect Status" "Not changed,Changed" bitfld.long 0x4 0. " CCS ,Indicates the port connection status" "No device,Device" width 0x0b tree.end tree "OHCI" base ad:0x100FF width 17. rgroup.long 0x0++0x3 line.long 0x0 "VID_DID,Vendor ID, device ID register" hexmask.long.word 0x0 16.--31. 1. " DEVID ,Device type" hexmask.long.word 0x0 0.--15. 1. " VENID ,Vendor of the device" group.long 0x4++0x3 line.long 0x0 "CMND_STS,Command, status register" bitfld.long 0x0 31. " DPERR ,Status of parity error" "No error,Error" bitfld.long 0x0 30. " SSERR ,Status of SERR" "No error,Error" bitfld.long 0x0 29. " RMA ,Status of Master/Target abort" "Not executed,Executed" bitfld.long 0x0 28. " RTA ,Status of Master/Target abort" "Not executed,Executed" textline " " bitfld.long 0x0 27. " STA ,Status of Slave/Target abort" "Not executed,Executed" rbitfld.long 0x0 25.--26. " DEVSELTIM ,Indicate the DEVSEL response speed" ",Medium,," bitfld.long 0x0 24. " DPERRDET ,Parity error is detected in master operation" "No error,Error" rbitfld.long 0x0 23. " FBBCAP ,Fast Back to Back transactions are supported" "Not supported," textline " " rbitfld.long 0x0 20. " CAPLST ,power management mode is supported" ",Supported" rbitfld.long 0x0 9. " FBBEN ,Enables Fast Back to Back transactions" "Disabled," bitfld.long 0x0 8. " SERREN ,Enables system error response" "Not asserted,Asserted" rbitfld.long 0x0 7. " WCCTRL ,Enables wait cycle control" "Disabled," textline " " bitfld.long 0x0 6. " PERRR ,enables parity error response" "Not asserted,Asserted" rbitfld.long 0x0 5. " VGAPSN ,Enables VGA palette snooping" "Disabled," bitfld.long 0x0 4. " MEMWRIEN ,Enables the Memory Write and Invalidate command" "Disabled," rbitfld.long 0x0 3. " SCYC ,enables Special Cycle operation" "Disabled," textline " " bitfld.long 0x0 2. " BUSMA ,Enables bus master operation" "Disabled,Enabled" bitfld.long 0x0 1. " MEMSP ,Enables access to the memory space" "Disabled,Enabled" rbitfld.long 0x0 0. " IOSP ,Enables access to the I/O space" "Disabled," rgroup.long 0x8++0x3 line.long 0x0 "REVID_CC,Revision ID, Class Code register" hexmask.long.byte 0x0 24.--31. 1. " BCLASS ,Base class specified in the PCI standard" hexmask.long.byte 0x0 16.--23. 1. " SUBCLASS ,Subclass specified in the PCI standard" hexmask.long.byte 0x0 8.--15. 1. " PROGIF ,program interface specified in the PCI standard" hexmask.long.byte 0x0 0.--7. 1. " REVID ,Revision of the host logic" group.long 0xC++0x7 line.long 0x0 "CLS_LT_HT_BIST,cache line size/ latency timer/ header type/ BIST register" hexmask.long.byte 0x0 24.--31. 1. " BIST ,These bits are used for self testing" hexmask.long.byte 0x0 16.--23. 1. " HEADTYPE ,Notify the system of the header type" hexmask.long.byte 0x0 8.--15. 1. " LATTIM ,Notify the system of the latency timer" hexmask.long.byte 0x0 0.--7. 1. " CACHELINESZ ,Notify the system of the cache line size" line.long 0x4 "BASEAD,OHCI Base Address" hexmask.long 0x4 4.--31. 1. " OHCIBARR ,Specify the base address of the operational registers" rbitfld.long 0x4 3. " PREFETCHABLE ,Host logic does not support prefetching in memory read cycles" "Disabled," rbitfld.long 0x4 1.--2. " TYPE ,These bits are fixed to 0x00" "0x0,,," rbitfld.long 0x4 0. " MEMSPIND ,OHCI operational registers are mapped to the system memory space" "Yes," rgroup.long 0x2C++0xB line.long 0x0 "SSVID_SSID,Subsystem vendor ID/ subsystem ID register" hexmask.long.word 0x0 16.--31. 1. " SUBSYSID ,Indicates the device type" hexmask.long.word 0x0 0.--15. 1. " SUBVENID ,Indicates the vendor of the device" textline "" line.long 0x4 "EROM_BASEAD,Expansion ROM base address register" hexmask.long.tbyte 0x4 10.--31. 1. " EXBADDR ,As decoding of expansion ROM is prohibited, these bits are always read as 000000h" bitfld.long 0x4 0. " ROMDEN ,As decoding of expansion ROM is prohibited, this bit is always read as 0b" "0," line.long 0x8 "CAPPTR,Capability Pointer" hexmask.long.byte 0x8 0.--7. 1. " CAPPTR ,These bits hold the pointer to the capability identifier" rgroup.long 0x3C++0x7 line.long 0x0 "INTR_LINE_PIN,Interrupt line/ interrupt pin/ min gnt/ max latency register" hexmask.long.byte 0x0 24.--31. 1. " MAXLAT ,Maximum frequency of PCI bus acquisition" hexmask.long.byte 0x0 16.--23. 1. " MINGNT ,Minimum burst transfer time" hexmask.long.byte 0x0 8.--15. 1. " INTRPIN ,Pin for outputting interrupts" hexmask.long.byte 0x0 0.--7. 1. " INTRLINE ,Interrupt line" textline "" line.long 0x4 "CAPID_NIP_PMCAP,Capability identifier, next item pointer, power management capabilities register" bitfld.long 0x4 27.--31. " PMESUP ,indicates whether the D3 cold state is supported" ",,,,,,,Not supported|All,,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x4 26. " D2SUP ,PCI power state D2 is supported" ",Supported" bitfld.long 0x4 25. " D1SUP ,PCI power state D1 is supported" ",Supported" bitfld.long 0x4 22.--24. " AUXCUR ,Necessary current for 3.3-V auxiliary power supply" "0,,,,,,," bitfld.long 0x4 21. " DSI ,Special initialization is not necessary for power management" "True," textline " " bitfld.long 0x4 19. " PMECLK ,PCLK is not necessary for PME interrupt generation" "True," bitfld.long 0x4 16.--18. " VER ,Host logic conforms to 'PCI power management interface specification release 1.1'" ",,True,,,,," hexmask.long.byte 0x4 8.--15. 1. " NPTR ,These bits are fixed to 00h, which indicates that the next item does not exist" hexmask.long.byte 0x4 0.--7. 1. " CAPID ,PCI power management register ID" textline "" group.long 0x44++0x3 line.long 0x0 "PMC_STS_PMCSR,Power management control/status/ PMCSR bridge support extensions register" hexmask.long.byte 0x0 24.--31. 1. " DATA ,This is an optional field in the PCI standard, and the host logic does not support it" rbitfld.long 0x0 23. " BPCCEN ,This is a bit for the bridge, and the host logic does not support it" "0," rbitfld.long 0x0 22. " B2B3 ,This is a bit for the bridge, and the host logic does not support it" "0," bitfld.long 0x0 15. " PMESTAT ,Indicates the PME interrupt state" "Not satisfied,Satisfied" rbitfld.long 0x0 13.--14. " DATSCALE ,This is an optional field in the PCI standard, and the host logic does not support it" "0,,," textline " " rbitfld.long 0x0 9.--12. " DATSEL ,This is an optional field in the PCI standard, and the host logic does not support it" "0,,,,,,,,,,,,,,," bitfld.long 0x0 8. " PMEEN ,This bit specifies whether to use PME" "Not use,Use" bitfld.long 0x0 0.--1. " PWRSTAT ,These bits indicate the power state of the PCI" "D0,D2,D2,D3" group.long 0xE0++0x7 line.long 0x0 "EXT1,EXT1" hexmask.long.byte 0x0 24.--31. 1. " POTPGT ,specify the value for bits [31:24] (PPOTPGT) in the OHCI HcRhDescriptorA register" bitfld.long 0x0 19.--23. " HSTCTRL2 ,Do not specify any value other than 02h" ",,0x2,,,,,,,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x0 7. " IDWREN ,Write-protects the Subsystem ID, Subsystem Vendor ID, Max Latency, and Min Gnt bits" "W,R/W" bitfld.long 0x0 2. " PPCNT ,Specifies a value for bit 4 (PPC) in the EHCI HCSPARAMS register" "Clear,Set" bitfld.long 0x0 0.--1. " PORTNO ,Specify the number of valid USB downstream ports" "1,1 and 2,," line.long 0x4 "EXT2,EXT2" bitfld.long 0x4 24. " PLLURAM ,Specifies how to respond to register access in the PLL unlocked state" "Not returned,Returned" bitfld.long 0x4 18. " RAMCCR ,Indicates the result of RAM connection check" "NG,OK" bitfld.long 0x4 17. " RAMCCEND ,Indicates the end of RAM connection check" "Not done,Ended" bitfld.long 0x4 16. " RUNRAMCC ,Activates the RAM connection check circuit" "Clear,Start" bitfld.long 0x4 1. " HSTCTRL ,Specifies the hyper-speed transfer mode for asynchronous IN/OUT transfer" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " EHCIMSK ,Enables or disables the EHCI host logic" "Yes,No" width 0x0b tree.end tree "EHCI" base ad:0x102FF width 17. rgroup.long 0x0++0x3 line.long 0x0 "VID_DID,Vendor ID, device ID register" hexmask.long.word 0x0 16.--31. 1. " DEVID ,Device type" hexmask.long.word 0x0 0.--15. 1. " VENID ,Vendor of the device" group.long 0x4++0x3 line.long 0x0 "CMND_STS,Command, status register" bitfld.long 0x0 31. " DPERR ,Status of parity error" "No error,Error" bitfld.long 0x0 30. " SSERR ,Status of SERR" "No error,Error" bitfld.long 0x0 29. " RMA ,Status of Master/Target abort" "Not executed,Executed" bitfld.long 0x0 28. " RTA ,Status of Master/Target abort" "Not executed,Executed" bitfld.long 0x0 27. " STA ,Status of Slave/Target abort" "Not executed,Executed" textline " " rbitfld.long 0x0 25.--26. " DEVSELTIM ,Indicate the DEVSEL response speed" ",Medium,," bitfld.long 0x0 24. " DPERRDET ,Parity error is detected in master operation" "No error,Error" rbitfld.long 0x0 23. " FBBCAP ,Fast Back to Back transactions are supported" "Not supported," bitfld.long 0x0 21. " 66MHZC ,Indicates whether 66-MHz operation is available" "Not available," rbitfld.long 0x0 20. " CAPLST ,Power management mode is supported" ",Supported" textline " " rbitfld.long 0x0 9. " FBBEN ,Enables Fast Back to Back transactions" "Disabled," bitfld.long 0x0 8. " SERREN ,Enables system error response" "Not asserted,Asserted" rbitfld.long 0x0 7. " WCCTRL ,Enables wait cycle control" "Disabled," bitfld.long 0x0 6. " PERRR ,Enables parity error response" "Not asserted,Asserted" rbitfld.long 0x0 5. " VGAPSN ,Enables VGA palette snooping" "Disabled," textline " " bitfld.long 0x0 4. " MEMWRIEN ,Enables the Memory Write and Invalidate command" "Disabled," rbitfld.long 0x0 3. " SCYC ,Enables Special Cycle operation" "Disabled," bitfld.long 0x0 2. " BUSMA ,Enables bus master operation" "Disabled,Enabled" bitfld.long 0x0 1. " MEMSP ,Enables access to the memory space" "Disabled,Enabled" rbitfld.long 0x0 0. " IOSP ,Enables access to the I/O space" "Disabled," rgroup.long 0x8++0x3 line.long 0x0 "REVID_CC,Revision ID, Class Code register" hexmask.long.byte 0x0 24.--31. 1. " BCLASS ,Base class specified in the PCI standard" hexmask.long.byte 0x0 16.--23. 1. " SUBCLASS ,Subclass specified in the PCI standard" hexmask.long.byte 0x0 8.--15. 1. " PROGIF ,program interface specified in the PCI standard" hexmask.long.byte 0x0 0.--7. 1. " REVID ,Revision of the host logic" group.long 0xC++0x7 line.long 0x0 "CLS_LT_HT_BIST,cache line size/ latency timer/ header type/ BIST register" hexmask.long.byte 0x0 24.--31. 1. " BIST ,These bits are used for self testing" hexmask.long.byte 0x0 16.--23. 1. " HEADTYPE ,Notify the system of the header type" hexmask.long.byte 0x0 8.--15. 1. " LATTIM ,Notify the system of the latency timer" hexmask.long.byte 0x0 0.--7. 1. " CACHELINESZ ,Notify the system of the cache line size" line.long 0x4 "BASEAD,EHCI Base Address" hexmask.long 0x4 4.--31. 1. " OHCIBARR ,Specify the base address of the operational registers" rbitfld.long 0x4 3. " PREFETCHABLE ,Host logic does not support prefetching in memory read cycles" "Disabled," rbitfld.long 0x4 1.--2. " TYPE ,These bits are fixed to 0x00" "0x0,,," rbitfld.long 0x4 0. " MEMSPIND ,OHCI operational registers are mapped to the system memory space" "Yes," rgroup.long 0x2C++0xB line.long 0x0 "SSVID_SSID,Subsystem vendor ID/ subsystem ID register" hexmask.long.word 0x0 16.--31. 1. " SUBSYSID ,Indicates the device type" hexmask.long.word 0x0 0.--15. 1. " SUBVENID ,Indicates the vendor of the device" line.long 0x4 "EROM_BASEAD,Expansion ROM base address register" hexmask.long.tbyte 0x4 10.--31. 1. " EXBADDR ,As decoding of expansion ROM is prohibited, these bits are always read as 000000h" bitfld.long 0x4 0. " ROMDEN ,As decoding of expansion ROM is prohibited, this bit is always read as 0b" "0," line.long 0x8 "CAPPTR,Capability Pointer" hexmask.long.byte 0x8 0.--7. 1. " CAPPTR ,These bits hold the pointer to the capability identifier" textline "" rgroup.long 0x3C++0x7 line.long 0x0 "INTR_LINE_PIN,Interrupt line/ interrupt pin/ min gnt/ max latency register" hexmask.long.byte 0x0 24.--31. 1. " MAXLAT ,Maximum frequency of PCI bus acquisition" hexmask.long.byte 0x0 16.--23. 1. " MINGNT ,Minimum burst transfer time" hexmask.long.byte 0x0 8.--15. 1. " INTRPIN ,Pin for outputting interrupts" hexmask.long.byte 0x0 0.--7. 1. " INTRLINE ,Interrupt line" textline "" line.long 0x4 "CAPID_NIP_PMCAP,Capability identifier, next item pointer, power management capabilities register" bitfld.long 0x4 27.--31. " PMESUP ,indicates whether the D3 cold state is supported" ",,,,,,,Not supported|All,,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x4 26. " D2SUP ,PCI power state D2 is supported" ",Supported" bitfld.long 0x4 25. " D1SUP ,PCI power state D1 is supported" ",Supported" bitfld.long 0x4 22.--24. " AUXCUR ,Necessary current for 3.3-V auxiliary power supply" "0,,,,,,," bitfld.long 0x4 21. " DSI ,Special initialization is not necessary for power management" "True," textline " " bitfld.long 0x4 19. " PMECLK ,PCLK is not necessary for PME interrupt generation" "True," bitfld.long 0x4 16.--18. " VER ,Host logic conforms to 'PCI power management interface specification release 1.1'" ",,True,,,,," hexmask.long.byte 0x4 8.--15. 1. " NPTR ,These bits are fixed to 00h, which indicates that the next item does not exist" hexmask.long.byte 0x4 0.--7. 1. " CAPID ,PCI power management register ID" textline "" group.long 0x44++0x3 line.long 0x0 "PMC_STS_PMCSR,Power management control/status/ PMCSR bridge support extensions register" hexmask.long.byte 0x0 24.--31. 1. " DATA ,This is an optional field in the PCI standard, and the host logic does not support it" rbitfld.long 0x0 23. " BPCCEN ,This is a bit for the bridge, and the host logic does not support it" "0," rbitfld.long 0x0 22. " B2B3 ,This is a bit for the bridge, and the host logic does not support it" "0," bitfld.long 0x0 15. " PMESTAT ,Indicates the PME interrupt state" "Not satisfied,Satisfied" rbitfld.long 0x0 13.--14. " DATSCALE ,This is an optional field in the PCI standard, and the host logic does not support it" "0,,," textline " " rbitfld.long 0x0 9.--12. " DATSEL ,This is an optional field in the PCI standard, and the host logic does not support it" "0,,,,,,,,,,,,,,," bitfld.long 0x0 8. " PMEEN ,This bit specifies whether to use PME" "Not use,Use" bitfld.long 0x0 0.--1. " PWRSTAT ,These bits indicate the power state of the PCI" "D0,D2,D2,D3" group.long 0x60++0x3 line.long 0x0 "SRBN_FLADJ_PW,SBRN/ FLADJ/ PORTWAKECAP register" hexmask.long.word 0x0 16.--31. 1. " PORTWAKECAP ,specify a mask to select from the connected devices the port to be used for a wakeup event" hexmask.long.byte 0x0 8.--15. 1. " FLADJ ,Adjust the length of a micro-frame in 16-HS bit time units" hexmask.long.byte 0x0 0.--7. 1. " SBRN ,Indicate the serial bus release number" group.long 0xE0++0x7 line.long 0x0 "EXT1,EXT1" hexmask.long.byte 0x0 24.--31. 1. " POTPGT ,specify the value for bits [31:24] (PPOTPGT) in the OHCI HcRhDescriptorA register" bitfld.long 0x0 19.--23. " HSTCTRL2 ,Do not specify any value other than 02h" ",,0x2,,,,,,,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x0 7. " IDWREN ,Write-protects the Subsystem ID, Subsystem Vendor ID, Max Latency, and Min Gnt bits" "W,R/W" bitfld.long 0x0 2. " PPCNT ,Specifies a value for bit 4 (PPC) in the EHCI HCSPARAMS register" "Clear,Set" bitfld.long 0x0 0.--1. " PORTNO ,Specify the number of valid USB downstream ports" "1,1 and 2,," line.long 0x4 "EXT2,EXT2" bitfld.long 0x4 24. " PLLURAM ,Specifies how to respond to register access in the PLL unlocked state" "Not returned,Returned" bitfld.long 0x4 18. " RAMCCR ,Indicates the result of RAM connection check" "NG,OK" bitfld.long 0x4 17. " RAMCCEND ,Indicates the end of RAM connection check" "Not done,Ended" bitfld.long 0x4 16. " RUNRAMCC ,Activates the RAM connection check circuit" "Clear,Start" bitfld.long 0x4 1. " HSTCTRL ,Specifies the hyper-speed transfer mode for asynchronous IN/OUT transfer" "Disabled,Enabled" textline " " bitfld.long 0x4 0. " EHCIMSK ,Enables or disables the EHCI host logic" "Yes,No" width 0x0b tree.end tree "AHB" base ad:0x10BFF width 17. rgroup.long 0x0++0x3 line.long 0x0 "VID_DID,Vendor ID, device ID register" hexmask.long.word 0x0 16.--31. 1. " DEVID ,Device type" hexmask.long.word 0x0 0.--15. 1. " VENID ,Vendor of the device" group.long 0x4++0x3 line.long 0x0 "CMND_STS,Command, status register" bitfld.long 0x0 31. " DPERR ,Status of parity error" "No error,Error" bitfld.long 0x0 30. " SSERR ,Status of SERR" "No error,Error" bitfld.long 0x0 29. " RMA ,Status of Master/Target abort" "Not executed,Executed" bitfld.long 0x0 28. " RTA ,Status of Master/Target abort" "Not executed,Executed" bitfld.long 0x0 27. " STA ,Status of Slave/Target abort" "Not executed,Executed" textline " " rbitfld.long 0x0 25.--26. " DEVSELTIM ,Indicate the DEVSEL response speed" ",Medium,," bitfld.long 0x0 24. " DPERRDET ,Parity error is detected in master operation" "No error,Error" rbitfld.long 0x0 23. " FBBCAP ,Fast Back to Back transactions are supported" "Not supported," bitfld.long 0x0 21. " 66MHZC ,Indicates whether 66-MHz operation is available" "Not available," rbitfld.long 0x0 20. " CAPLST ,Power management mode is supported" ",Supported" textline " " rbitfld.long 0x0 9. " FBBEN ,Enables Fast Back to Back transactions" "Disabled," bitfld.long 0x0 8. " SERREN ,Enables system error response" "Not asserted,Asserted" rbitfld.long 0x0 7. " WCCTRL ,Enables wait cycle control" "Disabled," bitfld.long 0x0 6. " PERRR ,Enables parity error response" "Not asserted,Asserted" rbitfld.long 0x0 5. " VGAPSN ,Enables VGA palette snooping" "Disabled," textline " " bitfld.long 0x0 4. " MEMWRIEN ,Enables the Memory Write and Invalidate command" "Disabled," rbitfld.long 0x0 3. " SCYC ,Enables Special Cycle operation" "Disabled," bitfld.long 0x0 2. " BUSMA ,Enables bus master operation" "Disabled,Enabled" bitfld.long 0x0 1. " MEMSP ,Enables access to the memory space" "Disabled,Enabled" rbitfld.long 0x0 0. " IOSP ,Enables access to the I/O space" "Disabled," rgroup.long 0x8++0x3 line.long 0x0 "REVID_CC,Revision ID, Class Code register" hexmask.long.tbyte 0x0 8.--31. 1. " CLASSCODE ,The value of these bits is 060000h" hexmask.long.tbyte 0x0 0.--7. 1. " REVID ,The value of these bits is 01h" group.long 0xC++0xF line.long 0x0 "CLS_LT_HT_BIST,cache line size/ latency timer/ header type/ BIST register" hexmask.long.byte 0x0 24.--31. 1. " BIST ,These bits are used for self testing" hexmask.long.byte 0x0 16.--23. 1. " HEADTYPE ,Notify the system of the header type" hexmask.long.byte 0x0 8.--15. 1. " LATTIM ,Notify the system of the latency timer" hexmask.long.byte 0x0 0.--7. 1. " CACHELINESZ ,Notify the system of the cache line size" line.long 0x4 "BASEAD,AHB-PCI Base Address" hexmask.long 0x4 10.--31. 1. " PCICOMBASEADR ,cify the base address of the AHB-PCI bridge PCI communication register area" rbitfld.long 0x4 3. " PREFETCH ,Host logic does not support prefetching in memory read cycles" "Disabled," rbitfld.long 0x4 1.--2. " TYPE ,These bits are fixed to 0x00" "0x0,,," rbitfld.long 0x4 0. " MEM ,OHCI operational registers are mapped to the system memory space" "Yes," line.long 0x8 "WIN1_BASEAD,PCI-AHB WIN1 base address" bitfld.long 0x8 28.--31. " PCIWIN1BASEADR ,specify the base address of PCI-AHB window 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0x8 3. " PREFETCH ,Indicates whether data can be prefetched" ",Enabled" rbitfld.long 0x8 1.--2. " TYPE ,Indicate the base address type" "4Gb,,," rbitfld.long 0x8 0. " MEM ,Indicates that the field specified by the base address is in the memory space" "Yes," line.long 0xC "WIN2_BASEAD,PCI-AHB WIN2 base address" bitfld.long 0xC 28.--31. " PCIWIN1BASEADR ,specify the base address of PCI-AHB window 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rbitfld.long 0xC 3. " PREFETCH ,Indicates whether data can be prefetched" ",Enabled" rbitfld.long 0xC 1.--2. " TYPE ,Indicate the base address type" "4Gb,,," rbitfld.long 0xC 0. " MEM ,Indicates that the field specified by the base address is in the memory space" "Yes," rgroup.long 0x2C++0xB line.long 0x0 "SSVID_SSID,Subsystem vendor ID/ subsystem ID register" hexmask.long.word 0x0 16.--31. 1. " SUBSYSID ,Indicates the device type" hexmask.long.word 0x0 0.--15. 1. " SUBVENID ,Indicates the vendor of the device" textline " " rgroup.long 0x3C++0x7 line.long 0x0 "INTR_LINE_PIN,Interrupt line/ interrupt pin/ min gnt/ max latency register" hexmask.long.byte 0x0 24.--31. 1. " MAXLAT ,Maximum frequency of PCI bus acquisition" hexmask.long.byte 0x0 16.--23. 1. " MINGNT ,Minimum burst transfer time" hexmask.long.byte 0x0 8.--15. 1. " INTRPIN ,Pin for outputting interrupts" hexmask.long.byte 0x0 0.--7. 1. " INTRLINE ,Interrupt line" textline " " line.long 0x4 "CAPID_NIP_PMCAP,Capability identifier, next item pointer, power management capabilities register" bitfld.long 0x4 27.--31. " PMESUP ,indicates whether the D3 cold state is supported" ",,,,,,,Not supported|All,,,,,,,,,,,,,,,,,,,,,,,," bitfld.long 0x4 26. " D2SUP ,PCI power state D2 is supported" ",Supported" bitfld.long 0x4 25. " D1SUP ,PCI power state D1 is supported" ",Supported" bitfld.long 0x4 22.--24. " AUXCUR ,Necessary current for 3.3-V auxiliary power supply" "0,,,,,,," bitfld.long 0x4 21. " DSI ,Special initialization is not necessary for power management" "True," textline " " bitfld.long 0x4 19. " PMECLK ,PCLK is not necessary for PME interrupt generation" "True," bitfld.long 0x4 16.--18. " VER ,Host logic conforms to 'PCI power management interface specification release 1.1'" ",,True,,,,," hexmask.long.byte 0x4 8.--15. 1. " NPTR ,These bits are fixed to 00h, which indicates that the next item does not exist" hexmask.long.byte 0x4 0.--7. 1. " CAPID ,PCI power management register ID" textline " " group.long 0x44++0x3 line.long 0x0 "PMC_STS_PMCSR,Power management control/status/ PMCSR bridge support extensions register" hexmask.long.byte 0x0 24.--31. 1. " DATA ,This is an optional field in the PCI standard, and the host logic does not support it" rbitfld.long 0x0 23. " BPCCEN ,This is a bit for the bridge, and the host logic does not support it" "0," rbitfld.long 0x0 22. " B2B3 ,This is a bit for the bridge, and the host logic does not support it" "0," bitfld.long 0x0 15. " PMESTAT ,Indicates the PME interrupt state" "Not satisfied,Satisfied" rbitfld.long 0x0 13.--14. " DATSCALE ,This is an optional field in the PCI standard, and the host logic does not support it" "0,,," textline " " rbitfld.long 0x0 9.--12. " DATSEL ,This is an optional field in the PCI standard, and the host logic does not support it" "0,,,,,,,,,,,,,,," bitfld.long 0x0 8. " PMEEN ,This bit specifies whether to use PME" "Not use,Use" bitfld.long 0x0 0.--1. " PWRSTAT ,These bits indicate the power state of the PCI" "D0,D2,D2,D3" width 0x0b tree.end tree.end tree "HS-USB (High Speed USB)" base ad:0xE6590000 width 11. group.word 0x00++0x03 line.word 0x00 "SYSCFG,System Configuration Control Register" sif (cpu()!="R8A77470")&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450")&&(cpu()!="R8A77440") bitfld.word 0x00 10. " SCKE ,USB module clock enable" "Disabled,Enabled" bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled" bitfld.word 0x00 4. " DPRPU ,D+ line resistor control (Pull-up is enabled)" "Disabled,Enabled" else bitfld.word 0x00 7. " HSE ,High-speed operation enable" "Disabled,Enabled" bitfld.word 0x00 4. " DPRPU ,D+ line resistor control (Pull-up is enabled)" "Disabled,Enabled" endif textline " " bitfld.word 0x00 0. " USBE ,USB block operation enable" "Disabled,Enabled" line.word 0x02 "BUSWAIT,CPU Bus Wait Register" bitfld.word 0x02 0.--3. " BWAIT ,CPU bus wait" "0 waits,1 wait,2 waits,3 waits,4 waits,5 waits,6 waits,7 waits,8 waits,9 waits,10 waits,11 waits,12 waits,13 waits,14 waits,15 waits" rgroup.word 0x04++0x01 line.word 0x00 "SYSSTS,System Configuration Status Register" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||cpuis("R7S7210*")||cpuis("R8A77440") bitfld.word 0x00 0.--1. " LNST ,USB data line status (Full-speed|High-speed|Chirp))" "SE0|Squelch|Squelch,J-state|UnSquelch|Chirp-J,K-state|Invalid|Chirp K,SE1|Invalid|Invalid" else bitfld.word 0x00 0.--1. " LNST ,USB data line status (Full-speed|High-speed|Chirp))" "SE0|Squelch|Squelch,J-state|Squelch|Chirp-J,K-state|Invalid|Chirp K,SE1|Invalid|Invalid" endif textline " " group.word 0x08++0x01 line.word 0x00 "DVSTCTR,Device State Control Register" bitfld.word 0x00 8. " WKUP ,Wakeup output" "No signal,Wakeup" rbitfld.word 0x00 0.--2. " RHST ,Reset handshake" "Undefined,Reset handshake,Full-speed,High-speed,?..." if (((per.w(ad:0xE6590000))&0x80)==0x80) group.word 0x0C++0x01 line.word 0x00 "TESTMODE,Test Mode Register" bitfld.word 0x00 0.--3. " UTST ,Test mode" "Normal,Test_J,Test_K,Test_SE0_NAK,Test_Packet,?..." else hgroup.word 0x0C++0x01 hide.word 0x00 "TESTMODE,Test Mode Register" endif hgroup.long 0x14++0x03 hide.long 0x00 "CFIFO,FIFO Port Register" in group.word 0x20++0x03 line.word 0x00 "CFIFOSEL,FIFO Port C Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." textline " " bitfld.word 0x00 5. " ISEL ,FIFO port access direction when DCP is selected" "Read,Write" bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x02 "CFIFOCTR,FIFO Port C Control Register" bitfld.word 0x02 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x02 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x02 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x02 0.--11. 1. " DTLN ,Receive data length" group.word 0x28++0x07 line.word 0x00 "D0FIFOSEL,FIFO Port D0 Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x00 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DREQE ,DMA transfer request enable" "Disabled,Enabled" bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x00 7. " DEZPM ,Zero-length packet added mode" "Disabled,Enabled" textline " " bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x02 "D0FIFOCTR,FIFO Port D0 Control Register" bitfld.word 0x02 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x02 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x02 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x02 0.--11. 1. " DTLN ,Receive data length" line.word 0x04 "D1FIFOSEL,FIFO Port D1 Select Register" bitfld.word 0x04 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x04 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x04 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" textline " " bitfld.word 0x04 12. " DREQE ,DMA transfer request enable" "Disabled,Enabled" bitfld.word 0x04 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x04 7. " DEZPM ,Zero-length packet added mode" "Disabled,Enabled" textline " " bitfld.word 0x04 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x06 "D1FIFOCTR,FIFO Port D1 Control Register" bitfld.word 0x06 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x06 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x06 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x06 0.--11. 1. " DTLN ,Receive data length" sif ((cpu()=="R8A77940")||cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77450")||(cpu()=="R8A77430")||cpuis("R7S7210*")) group.word 0xF0++0x07 line.word 0x0 "D2FIFOSEL,FIFO Port D2 Select Register" bitfld.word 0x00 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x00 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x00 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DREQE ,DMA transfer request enable" "Disabled,Enabled" bitfld.word 0x00 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x00 7. " DEZPM ,Zero-length packet added mode" "Disabled,Enabled" textline " " bitfld.word 0x00 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x02 "D2FIFOCTR,FIFO Port D2 Control Register" bitfld.word 0x02 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x02 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x02 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x02 0.--11. 1. " DTLN ,Receive data length" line.word 0x04 "D3FIFOSEL,FIFO Port D3 Select Register" bitfld.word 0x04 15. " RCNT ,Read count mode" "Cleared,Decremented" bitfld.word 0x04 14. " REW ,Buffer pointer rewind" "Not rewound,Rewound" bitfld.word 0x04 13. " DCLRM ,Auto buffer memory clear mode accessed after specified pipe data is read" "Disabled,Enabled" textline " " bitfld.word 0x04 12. " DREQE ,DMA transfer request enable" "Disabled,Enabled" bitfld.word 0x04 10.--11. " MBW ,FIFO port access bit width" "8-bit,16-bit,32-bit,?..." bitfld.word 0x04 7. " DEZPM ,Zero-length packet added mode" "Disabled,Enabled" textline " " bitfld.word 0x04 0.--3. " CURPIPE ,FIFO port access pipe specification" "DCP,Pipe 1,Pipe 2,Pipe 3,Pipe 4,Pipe 5,Pipe 6,Pipe 7,Pipe 8,Pipe 9,Pipe A,Pipe B,Pipe C,Pipe D,Pipe E,Pipe F" line.word 0x06 "D3FIFOCTR,FIFO Port D3 Control Register" bitfld.word 0x06 15. " BVAL ,Buffer memory enable flag" "Disabled,Enabled" bitfld.word 0x06 14. " BCLR ,CPU buffer clear" ",Cleared" rbitfld.word 0x06 13. " FRDY ,FIFO port ready" "Disabled,Enabled" textline " " hexmask.word 0x06 0.--11. 1. " DTLN ,Receive data length" endif group.word 0x30++0x01 line.word 0x00 "INTENB0,Interrupts Enable Register 0" bitfld.word 0x00 15. " VBSE ,VBUS interrupts enable" "Disabled,Enabled" bitfld.word 0x00 14. " RSME ,Resume interrupts enable" "Disabled,Enabled" bitfld.word 0x00 13. " SOFE ,Frame number update interrupts enable" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " DVSE ,Device state transition interrupts enable" "Disabled,Enabled" bitfld.word 0x00 11. " CTRE ,Control transfer stage transition interrupts enable" "Disabled,Enabled" bitfld.word 0x00 10. " BEMPE ,Buffer empty interrupts enable" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " NRDYE ,Buffer not ready response interrupts enable" "Disabled,Enabled" bitfld.word 0x00 8. " BRDYE ,Buffer ready interrupts enable" "Disabled,Enabled" group.word 0x36++0x07 line.word 0x00 "BRDYENB,BRDY Interrupt Enable Register" bitfld.word 0x00 15. " PIPEFBRDYE ,BRDY interrupt enable for pipe F" "Disabled,Enabled" bitfld.word 0x00 14. " PIPEEBRDYE ,BRDY interrupt enable for pipe E" "Disabled,Enabled" bitfld.word 0x00 13. " PIPEDBRDYE ,BRDY interrupt enable for pipe D" "Disabled,Enabled" textline " " bitfld.word 0x00 12. " PIPECBRDYE ,BRDY interrupt enable for pipe C" "Disabled,Enabled" bitfld.word 0x00 11. " PIPEBBRDYE ,BRDY interrupt enable for pipe B" "Disabled,Enabled" bitfld.word 0x00 10. " PIPEABRDYE ,BRDY interrupt enable for pipe A" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " PIPE9BRDYE ,BRDY interrupt enable for pipe 9" "Disabled,Enabled" bitfld.word 0x00 8. " PIPE8BRDYE ,BRDY interrupt enable for pipe 8" "Disabled,Enabled" bitfld.word 0x00 7. " PIPE7BRDYE ,BRDY interrupt enable for pipe 7" "Disabled,Enabled" textline " " bitfld.word 0x00 6. " PIPE6BRDYE ,BRDY interrupt enable for pipe 6" "Disabled,Enabled" bitfld.word 0x00 5. " PIPE5BRDYE ,BRDY interrupt enable for pipe 5" "Disabled,Enabled" bitfld.word 0x00 4. " PIPE4BRDYE ,BRDY interrupt enable for pipe 4" "Disabled,Enabled" textline " " bitfld.word 0x00 3. " PIPE3BRDYE ,BRDY interrupt enable for pipe 3" "Disabled,Enabled" bitfld.word 0x00 2. " PIPE2BRDYE ,BRDY interrupt enable for pipe 2" "Disabled,Enabled" bitfld.word 0x00 1. " PIPE1BRDYE ,BRDY interrupt enable for pipe 1" "Disabled,Enabled" textline " " bitfld.word 0x00 0. " PIPE0BRDYE ,BRDY interrupt enable for pipe 0" "Disabled,Enabled" line.word 0x02 "NRDYENB,NRDY Interrupt Enable Register" bitfld.word 0x02 15. " PIPEFNRDYE ,NRDY interrupt enable for pipe F" "Disabled,Enabled" bitfld.word 0x02 14. " PIPEENRDYE ,NRDY interrupt enable for pipe E" "Disabled,Enabled" bitfld.word 0x02 13. " PIPEDNRDYE ,NRDY interrupt enable for pipe D" "Disabled,Enabled" textline " " bitfld.word 0x02 12. " PIPECNRDYE ,NRDY interrupt enable for pipe C" "Disabled,Enabled" bitfld.word 0x02 11. " PIPEBNRDYE ,NRDY interrupt enable for pipe B" "Disabled,Enabled" bitfld.word 0x02 10. " PIPEANRDYE ,NRDY interrupt enable for pipe A" "Disabled,Enabled" textline " " bitfld.word 0x02 9. " PIPE9NRDYE ,NRDY interrupt enable for pipe 9" "Disabled,Enabled" bitfld.word 0x02 8. " PIPE8NRDYE ,NRDY interrupt enable for pipe 8" "Disabled,Enabled" bitfld.word 0x02 7. " PIPE7NRDYE ,NRDY interrupt enable for pipe 7" "Disabled,Enabled" textline " " bitfld.word 0x02 6. " PIPE6NRDYE ,NRDY interrupt enable for pipe 6" "Disabled,Enabled" bitfld.word 0x02 5. " PIPE5NRDYE ,NRDY interrupt enable for pipe 5" "Disabled,Enabled" bitfld.word 0x02 4. " PIPE4NRDYE ,NRDY interrupt enable for pipe 4" "Disabled,Enabled" textline " " bitfld.word 0x02 3. " PIPE3NRDYE ,NRDY interrupt enable for pipe 3" "Disabled,Enabled" bitfld.word 0x02 2. " PIPE2NRDYE ,NRDY interrupt enable for pipe 2" "Disabled,Enabled" bitfld.word 0x02 1. " PIPE1NRDYE ,NRDY interrupt enable for pipe 1" "Disabled,Enabled" textline " " bitfld.word 0x02 0. " PIPE0NRDYE ,NRDY interrupt enable for pipe 0" "Disabled,Enabled" line.word 0x04 "BEMPENB,BEMP Interrupt Enable Register" bitfld.word 0x04 15. " PIPEFBEMPE ,BEMP interrupt enable for pipe F" "Disabled,Enabled" bitfld.word 0x04 14. " PIPEEBEMPE ,BEMP interrupt enable for pipe E" "Disabled,Enabled" bitfld.word 0x04 13. " PIPEDBEMPE ,BEMP interrupt enable for pipe D" "Disabled,Enabled" textline " " bitfld.word 0x04 12. " PIPECBEMPE ,BEMP interrupt enable for pipe C" "Disabled,Enabled" bitfld.word 0x04 11. " PIPEBBEMPE ,BEMP interrupt enable for pipe B" "Disabled,Enabled" bitfld.word 0x04 10. " PIPEABEMPE ,BEMP interrupt enable for pipe A" "Disabled,Enabled" textline " " bitfld.word 0x04 9. " PIPE9BEMPE ,BEMP interrupt enable for pipe 9" "Disabled,Enabled" bitfld.word 0x04 8. " PIPE8BEMPE ,BEMP interrupt enable for pipe 8" "Disabled,Enabled" bitfld.word 0x04 7. " PIPE7BEMPE ,BEMP interrupt enable for pipe 7" "Disabled,Enabled" textline " " bitfld.word 0x04 6. " PIPE6BEMPE ,BEMP interrupt enable for pipe 6" "Disabled,Enabled" bitfld.word 0x04 5. " PIPE5BEMPE ,BEMP interrupt enable for pipe 5" "Disabled,Enabled" bitfld.word 0x04 4. " PIPE4BEMPE ,BEMP interrupt enable for pipe 4" "Disabled,Enabled" textline " " bitfld.word 0x04 3. " PIPE3BEMPE ,BEMP interrupt enable for pipe 3" "Disabled,Enabled" bitfld.word 0x04 2. " PIPE2BEMPE ,BEMP interrupt enable for pipe 2" "Disabled,Enabled" bitfld.word 0x04 1. " PIPE1BEMPE ,BEMP interrupt enable for pipe 1" "Disabled,Enabled" textline " " bitfld.word 0x04 0. " PIPE0BEMPE ,BEMP interrupt enable for pipe 0" "Disabled,Enabled" line.word 0x06 "SOFCFG,SOF Output Configuration Register" bitfld.word 0x06 6. " BRDYM ,Status clear timing of each pipe BRDY interrupt" "Cleared by SW,Cleared by reading" group.word 0x40++0x01 line.word 0x00 "INTSTS0,Interrupt Status Register 0" bitfld.word 0x00 15. " VBINT ,VBUS interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 14. " RESM ,Resume interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 13. " SOFR ,Frame number refresh interrupt status" "No interrupt,Interrupt" bitfld.word 0x00 12. " DVST ,Device state transition interrupt status" "No interrupt,Interrupt" textline " " bitfld.word 0x00 11. " CTRT ,Control transfer stage transition interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 10. " BEMP ,Buffer empty interrupt status" "No interrupt,Interrupt" textline " " rbitfld.word 0x00 9. " NRDY ,Buffer not ready interrupt status" "No interrupt,Interrupt" rbitfld.word 0x00 8. " BRDY ,Buffer ready interrupt status" "No interrupt,Interrupt" textline " " rbitfld.word 0x00 7. " VBSTS ,VBUS input status" "Low,High" rbitfld.word 0x00 4.--6. " DVSQ ,Device state" "Powered,Default,Address,Configured,Suspended,Suspended,Suspended,Suspended" textline " " bitfld.word 0x00 3. " VALID ,Setup packet reception" "Not detected,Detected" rbitfld.word 0x00 0.--2. " CTSQ ,Control transfer stage" "Idle/Setup,Read data,Read status,Write Data,Write status,Write (no data) status,Sequence error,?..." group.word 0x46++0x07 line.word 0x00 "BRDYSTS,BRDY Interrupt Status Register" bitfld.word 0x00 15. " PIPEFBRDY ,BRDY interrupt status for pipe F" "No interrupt,Interrupt" bitfld.word 0x00 14. " PIPEEBRDY ,BRDY interrupt status for pipe E" "No interrupt,Interrupt" bitfld.word 0x00 13. " PIPEDBRDY ,BRDY interrupt status for pipe D" "No interrupt,Interrupt" textline " " bitfld.word 0x00 12. " PIPECBRDY ,BRDY interrupt status for pipe C" "No interrupt,Interrupt" bitfld.word 0x00 11. " PIPEBBRDY ,BRDY interrupt status for pipe B" "No interrupt,Interrupt" bitfld.word 0x00 10. " PIPEABRDY ,BRDY interrupt status for pipe A" "No interrupt,Interrupt" textline " " bitfld.word 0x00 9. " PIPE9BRDY ,BRDY interrupt status for pipe 9" "No interrupt,Interrupt" bitfld.word 0x00 8. " PIPE8BRDY ,BRDY interrupt status for pipe 8" "No interrupt,Interrupt" bitfld.word 0x00 7. " PIPE7BRDY ,BRDY interrupt status for pipe 7" "No interrupt,Interrupt" textline " " bitfld.word 0x00 6. " PIPE6BRDY ,BRDY interrupt status for pipe 6" "No interrupt,Interrupt" bitfld.word 0x00 5. " PIPE5BRDY ,BRDY interrupt status for pipe 5" "No interrupt,Interrupt" bitfld.word 0x00 4. " PIPE4BRDY ,BRDY interrupt status for pipe 4" "No interrupt,Interrupt" textline " " bitfld.word 0x00 3. " PIPE3BRDY ,BRDY interrupt status for pipe 3" "No interrupt,Interrupt" bitfld.word 0x00 2. " PIPE2BRDY ,BRDY interrupt status for pipe 2" "No interrupt,Interrupt" bitfld.word 0x00 1. " PIPE1BRDY ,BRDY interrupt status for pipe 1" "No interrupt,Interrupt" textline " " bitfld.word 0x00 0. " PIPE0BRDY ,BRDY interrupt status for pipe 0" "No interrupt,Interrupt" line.word 0x02 "NRDYSTS,NRDY Interrupt Status Register" bitfld.word 0x02 15. " PIPEFNRDY ,NRDY interrupt status for pipe F" "No interrupt,Interrupt" bitfld.word 0x02 14. " PIPEENRDY ,NRDY interrupt status for pipe E" "No interrupt,Interrupt" bitfld.word 0x02 13. " PIPEDNRDY ,NRDY interrupt status for pipe D" "No interrupt,Interrupt" textline " " bitfld.word 0x02 12. " PIPECNRDY ,NRDY interrupt status for pipe C" "No interrupt,Interrupt" bitfld.word 0x02 11. " PIPEBNRDY ,NRDY interrupt status for pipe B" "No interrupt,Interrupt" bitfld.word 0x02 10. " PIPEANRDY ,NRDY interrupt status for pipe A" "No interrupt,Interrupt" textline " " bitfld.word 0x02 9. " PIPE9NRDY ,NRDY interrupt status for pipe 9" "No interrupt,Interrupt" bitfld.word 0x02 8. " PIPE8NRDY ,NRDY interrupt status for pipe 8" "No interrupt,Interrupt" bitfld.word 0x02 7. " PIPE7NRDY ,NRDY interrupt status for pipe 7" "No interrupt,Interrupt" textline " " bitfld.word 0x02 6. " PIPE6NRDY ,NRDY interrupt status for pipe 6" "No interrupt,Interrupt" bitfld.word 0x02 5. " PIPE5NRDY ,NRDY interrupt status for pipe 5" "No interrupt,Interrupt" bitfld.word 0x02 4. " PIPE4NRDY ,NRDY interrupt status for pipe 4" "No interrupt,Interrupt" textline " " bitfld.word 0x02 3. " PIPE3NRDY ,NRDY interrupt status for pipe 3" "No interrupt,Interrupt" bitfld.word 0x02 2. " PIPE2NRDY ,NRDY interrupt status for pipe 2" "No interrupt,Interrupt" bitfld.word 0x02 1. " PIPE1NRDY ,NRDY interrupt status for pipe 1" "No interrupt,Interrupt" textline " " bitfld.word 0x02 0. " PIPE0NRDY ,NRDY interrupt status for pipe 0" "No interrupt,Interrupt" line.word 0x04 "BEMPSTS,BEMP Interrupt Status Register" bitfld.word 0x04 15. " PIPEFBEMP ,BEMP interrupt status for pipe F" "No interrupt,Interrupt" bitfld.word 0x04 14. " PIPEEBEMP ,BEMP interrupt status for pipe E" "No interrupt,Interrupt" bitfld.word 0x04 13. " PIPEDBEMP ,BEMP interrupt status for pipe D" "No interrupt,Interrupt" textline " " bitfld.word 0x04 12. " PIPECBEMP ,BEMP interrupt status for pipe C" "No interrupt,Interrupt" bitfld.word 0x04 11. " PIPEBBEMP ,BEMP interrupt status for pipe B" "No interrupt,Interrupt" bitfld.word 0x04 10. " PIPEABEMP ,BEMP interrupt status for pipe A" "No interrupt,Interrupt" textline " " bitfld.word 0x04 9. " PIPE9BEMP ,BEMP interrupt status for pipe 9" "No interrupt,Interrupt" bitfld.word 0x04 8. " PIPE8BEMP ,BEMP interrupt status for pipe 8" "No interrupt,Interrupt" bitfld.word 0x04 7. " PIPE7BEMP ,BEMP interrupt status for pipe 7" "No interrupt,Interrupt" textline " " bitfld.word 0x04 6. " PIPE6BEMP ,BEMP interrupt status for pipe 6" "No interrupt,Interrupt" bitfld.word 0x04 5. " PIPE5BEMP ,BEMP interrupt status for pipe 5" "No interrupt,Interrupt" bitfld.word 0x04 4. " PIPE4BEMP ,BEMP interrupt status for pipe 4" "No interrupt,Interrupt" textline " " bitfld.word 0x04 3. " PIPE3BEMP ,BEMP interrupt status for pipe 3" "No interrupt,Interrupt" bitfld.word 0x04 2. " PIPE2BEMP ,BEMP interrupt status for pipe 2" "No interrupt,Interrupt" bitfld.word 0x04 1. " PIPE1BEMP ,BEMP interrupt status for pipe 1" "No interrupt,Interrupt" textline " " bitfld.word 0x04 0. " PIPE0BEMP ,BEMP interrupt status for pipe 0" "No interrupt,Interrupt" line.word 0x06 "FRMNUM,Frame Number Register" bitfld.word 0x06 15. " OVRN ,Overrun/Underrun detect status" "No error,Error" bitfld.word 0x06 14. " CRCE ,Receive data error" "No error,Error" hexmask.word 0x06 0.--10. 1. " FRNM ,Frame number" rgroup.word 0x4E++0x03 line.word 0x00 "UFRMNUM,uFrame Number Register" bitfld.word 0x0 0.--2. " UFRNM ,uFrame" "0,1,2,3,4,5,6,7" line.word 0x02 "USBADDR,USB Address Register" hexmask.word.byte 0x02 0.--6. 0x01 " USBADDR ,USB address" rgroup.word 0x54++0x07 line.word 0x00 "USBREQ,USB Request Type Register" hexmask.word.byte 0x00 8.--15. 1. " BREQUEST ,Store the value of USB request bRequest" hexmask.word.byte 0x00 0.--7. 1. " BMREQUESTTYPE ,Store the value of USB request bmRequestType" line.word 0x02 "USBVAL,USB Request Value Register" line.word 0x04 "USBINDX,USB Request Index Register" line.word 0x06 "USBLENG,USB Request Length Register" group.word 0x5E++0x03 line.word 0x00 "DCPMAXP,DCP Maximum Packet Size Register" hexmask.word.byte 0x00 0.--6. 1. " MXPS ,Maximum packet size" line.word 0x02 "DCPCTR,DCP Control Register" rbitfld.word 0x02 15. " BSTS ,Buffer status" "Disabled,Enabled" bitfld.word 0x02 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x02 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x02 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x02 5. " PBUSY ,Pipe busy" "Not busy,Busy" bitfld.word 0x02 2. " CCPL ,Control transfer end enable" "Disabled,Enabled" textline " " bitfld.word 0x02 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" tree "PIPE Registers" group.word 0x64++0x01 line.word 0x00 "PIPESEL,Pipe Window Select Register" bitfld.word 0x0 0.--3. " PIPESEL ,Pipe window select" "Not selected,PIPE 1,PIPE 2,PIPE 3,PIPE 4,PIPE 5,PIPE 6,PIPE 7,PIPE 8,PIPE 9,PIPE A,PIPE B,PIPE C,PIPE D,PIPE E,PIPE F" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||cpuis("R7S7210*")||cpuis("R8A77440") if (((per.w(ad:0xE6590000+0x64))&0xF)==(0x1||0x2)) group.word 0x68++0x1 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,,Isochronous" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x3||0x4||0x5||0xB||0xC||0xD||0xE||0xF)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x9||0xA)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" sif cpu()=="R8A77420"||cpuis("R7S7210*")||cpuis("R8A77440") bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,Interrupt,?..." else bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,,Interrupt,?..." endif bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x6||0x7||0x8)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,,Interrupt,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif else if (((per.w(ad:0xE6590000+0x64))&0xF)==(0x1||0x2)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,,Isochronous" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x3||0x4||0x5||0x9||0xA||0xB||0xC||0xD||0xE||0xF)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,Bulk,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 9. " DBLB ,Double buffer mode" "Single,Double" textline " " bitfld.word 0x00 8. " CNTMD ,Continuous transfer mode" "Non-continuous,Continuous" bitfld.word 0x00 7. " SHTNAK ,Pipe disabled at end of transfer" "Continued,Disabled" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" elif (((per.w(ad:0xE6590000+0x64))&0xF)==(0x6||0x7||0x8)) group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 14.--15. " TYPE ,Transfer type" "Disabled,,Interrupt,?..." bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" textline " " bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" else group.word 0x68++0x01 line.word 0x00 "PIPECFG,Pipe Configuration Register" bitfld.word 0x00 10. " BFRE ,BRDY interrupt operation specification" "Tx/Rx,Read" bitfld.word 0x00 4. " DIR ,Transfer direction" "Receiving,Sending" bitfld.word 0x00 0.--3. " EPNUM ,Endpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" endif endif sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||cpuis("R7S7210*")||cpuis("R8A77440") if (((per.w(ad:0xE6590000+0x64))&0xF)==(0x6||0x7||0x8)) group.word 0x6A++0x01 line.word 0x00 "PIPEBUF,Pipe Buffer Setting Register" bitfld.word 0x00 10.--14. " BUFSIZE ,Buffer size" "64 bytes,?..." hexmask.word.byte 0x00 0.--7. 1. " BUFNMB ,Buffer number" else group.word 0x6A++0x01 line.word 0x00 "PIPEBUF,Pipe Buffer Setting Register" bitfld.word 0x00 10.--14. " BUFSIZE ,Buffer size" "64 bytes,128 bytes,196 bytes,256 bytes,320 bytes,384 bytes,448 bytes,512 bytes,576 bytes,640 bytes,704 bytes,768 bytes,832 bytes,896 bytes,960 bytes,1024 bytes,1088 bytes,1152 bytes,1216 bytes,1280 bytes,1344 bytes,1408 bytes,1472 bytes,1536 bytes,1600 bytes,1664 bytes,1728 bytes,1792 bytes,1856 bytes,1920 bytes,1984 bytes,2048 bytes" hexmask.word.byte 0x00 0.--7. 1. " BUFNMB ,Buffer number" endif else group.word 0x6A++0x01 line.word 0x00 "PIPEBUF,Pipe Buffer Setting Register" bitfld.word 0x00 10.--14. " BUFSIZE ,Buffer size" "64 bytes,128 bytes,196 bytes,256 bytes,320 bytes,384 bytes,448 bytes,512 bytes,576 bytes,640 bytes,704 bytes,768 bytes,832 bytes,896 bytes,960 bytes,1024 bytes,1088 bytes,1152 bytes,1216 bytes,1280 bytes,1344 bytes,1408 bytes,1472 bytes,1536 bytes,1600 bytes,1664 bytes,1728 bytes,1792 bytes,1856 bytes,1920 bytes,1984 bytes,2048 bytes" hexmask.word.byte 0x00 0.--7. 1. " BUFNMB ,Buffer number" endif group.word 0x6C++0x03 line.word 0x00 "PIPEMAXP,Pipe Maximum Packet Size Register" hexmask.word 0x00 0.--10. 1. " MXPS ,Maximum packet size" line.word 0x02 "PIPEPERI,Pipe Timing Control Register" bitfld.word 0x02 12. " IFIS ,Isochronous IN buffer flush" "Not flushed,Flushed" bitfld.word 0x02 0.--2. " IITV ,Interval error detection interval" "T,T/2,T/4,T/8,T/16,T/32,T/64,T/128" group.word 0x70++0x01 line.word 0x00 "PIPE1CTR,PIPE1 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x72++0x01 line.word 0x00 "PIPE2CTR,PIPE2 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x74++0x01 line.word 0x00 "PIPE3CTR,PIPE3 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x76++0x01 line.word 0x00 "PIPE4CTR,PIPE4 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x78++0x01 line.word 0x00 "PIPE5CTR,PIPE5 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7A++0x01 line.word 0x00 "PIPE6CTR,PIPE6 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" textline " " bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" textline " " bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7C++0x01 line.word 0x00 "PIPE7CTR,PIPE7 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" textline " " bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" textline " " bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x7E++0x01 line.word 0x00 "PIPE8CTR,PIPE8 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" textline " " bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe busy" "Not busy,Busy" textline " " bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x80++0x01 line.word 0x00 "PIPE9CTR,PIPE9 Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x82++0x01 line.word 0x00 "PIPEACTR,PIPEA Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x84++0x01 line.word 0x00 "PIPEBCTR,PIPEB Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x86++0x01 line.word 0x00 "PIPECCTR,PIPEC Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x88++0x01 line.word 0x00 "PIPEDCTR,PIPED Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x8A++0x01 line.word 0x00 "PIPEECTR,PIPEE Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x8C++0x01 line.word 0x00 "PIPEFCTR,PIPEF Control Register" rbitfld.word 0x00 15. " BSTS ,Buffer access status" "Disabled,Enabled" rbitfld.word 0x00 14. " INBUFM ,IN buffer monitor" "No data,Data" bitfld.word 0x00 10. " ATREPM ,Auto response mode" "Disabled,Enabled" textline " " bitfld.word 0x00 9. " ACLRM ,Auto buffer clear mode" "Disabled,Enabled" bitfld.word 0x00 8. " SQCLR ,Toggle bit clear" ",DATA0" bitfld.word 0x00 7. " SQSET ,Toggle bit set" ",DATA1" textline " " rbitfld.word 0x00 6. " SQMON ,Toggle bit confirmation" "DATA0,DATA1" rbitfld.word 0x00 5. " PBUSY ,Pipe Busy" "Not busy,Busy" bitfld.word 0x00 0.--1. " PID ,Response PID" "NAK,BUF,STALL,STALL" group.word 0x90++0x03 line.word 0x00 "PIP1TRE,Pipe 1 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE1TRN,Pipe 1 Transaction Counter Register" group.word 0x94++0x03 line.word 0x00 "PIP2TRE,Pipe 2 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE2TRN,Pipe 2 Transaction Counter Register" group.word 0x98++0x03 line.word 0x00 "PIP3TRE,Pipe 3 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE3TRN,Pipe 3 Transaction Counter Register" group.word 0x9C++0x03 line.word 0x00 "PIP4TRE,Pipe 4 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE4TRN,Pipe 4 Transaction Counter Register" group.word 0xA0++0x03 line.word 0x00 "PIP5TRE,Pipe 5 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE5TRN,Pipe 5 Transaction Counter Register" group.word 0xA4++0x03 line.word 0x00 "PIPBTRE,Pipe B Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEBTRN,Pipe B Transaction Counter Register" group.word 0xA8++0x03 line.word 0x00 "PIPCTRE,Pipe C Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPECTRN,Pipe C Transaction Counter Register" group.word 0xAC++0x03 line.word 0x00 "PIPDTRE,Pipe D Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEDTRN,Pipe D Transaction Counter Register" group.word 0xB0++0x03 line.word 0x00 "PIPETRE,Pipe E Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEETRN,Pipe E Transaction Counter Register" group.word 0xB4++0x03 line.word 0x00 "PIPFTRE,Pipe F Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEFTRN,Pipe F Transaction Counter Register" group.word 0xB8++0x03 line.word 0x00 "PIP9TRE,Pipe 9 Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPE9TRN,Pipe 9 Transaction Counter Register" group.word 0xBC++0x03 line.word 0x00 "PIPATRE,Pipe A Transaction Counter Enable Register" bitfld.word 0x00 9. " TRENB ,Transaction counter enable" "Disabled,Enabled" bitfld.word 0x00 8. " TRCLR ,Transaction counter clear" ",Cleared" line.word 0x02 "PIPEATRN,Pipe A Transaction Counter Register" tree.end textline " " group.word 0x102++0x01 line.word 0x00 "LPSTS,Low Power Status Register" bitfld.word 0x00 14. " SUSPM ,SuspendM control" "Suspend mode,Normal mode" sif (cpu()!="R8A77470")&&(cpu()!="R8A77420")&&(cpu()!="R8A77430")&&(cpu()!="R8A77450")&&!cpuis("R7S7210*")&&!cpuis("R8A77440") group.word 0x140++0x01 line.word 0x00 "BCCTRL,Battery Charging Control Register" sif ((cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951")||cpuis("R8A77951-*"))) rbitfld.word 0x00 9. " PRTBLDET ,PRTBLDET status" "Low,High" rbitfld.word 0x00 8. " CHGDET ,CHGDET status" "Low,High" else bitfld.word 0x00 9. " PRTBLDET ,PRTBLDET status" "Low,High" bitfld.word 0x00 8. " CHGDET ,CHGDET status" "Low,High" endif bitfld.word 0x00 5. " DCPEN ,DCPEN control" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " VDMSRCEN ,VDM_SRC control" "Disabled,Enabled" bitfld.word 0x00 3. " PRTDETBLEN ,PRTBLDET control" "Disabled,Enabled" bitfld.word 0x00 2. " VDPSRCEN ,VDP_SRC control" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " CHGDETEN ,CHGDET control" "Enabled,Disabled" bitfld.word 0x00 0. " IDPSRCEN ,IDP_SRC control" "Disabled,Enabled" endif sif (cpuis("R8J7795*")||cpuis("R8A7795*")||(cpuis("R8A77960*"))||(cpuis("R8A77965*"))) group.long 0x184++0x03 line.long 0x00 "UGCTRL2,USB General Control Register 2" bitfld.long 0x00 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,HS USB,USB OTG" elif (cpuis("R8A77995*")||cpuis("R8A77990*")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||cpuis("R7S7210*")||cpuis("R8A77440")) group.long 0x180++0x07 line.long 0x00 "UGCTRL,USB General Control Register" bitfld.long 0x00 2. " CONNECT ,USB connect control" "Disabled,Enabled" bitfld.long 0x00 0. " PLLRESET ,PLL reset" "Disabled,Enabled" line.long 0x04 "UGCTRL2,USB General Control Register 2" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77440") rbitfld.long 0x04 31. " USB2SEL ,USB2.0 Ch.2 selection" "EHCI/OHCI,USB3.0" bitfld.long 0x04 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,,HS USB" else bitfld.long 0x04 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,,HS USB" endif rgroup.long 0x188++0x03 line.long 0x00 "UGSTS,USB General Status Register" sif !cpuis("R7S7210*")&&!cpuis("R8A77440") bitfld.long 0x00 8. " LOCK ,Embedded USB PHY PLL lock status" "Completed,Halted" else bitfld.long 0x00 8. " LOCK ,Embedded USB PHY PLL lock status" "Halted,Completed" endif sif cpuis("R7S7210*") group.long 0x18C++0x03 line.long 0x00 "UPHYSET,USB PHY Setting Register" bitfld.long 0x00 4.--5. " CLKSEL ,USB reference clock selection" ",48 MHz,,24 MHz" endif elif cpu()=="R8A77470" group.long 0x180++0x07 line.long 0x00 "UGCTRL,USB General Control Register" bitfld.long 0x00 0. " PLLRESET ,PLL reset" "Disabled,Enabled" line.long 0x04 "UGCTRL2,USB General Control Register 2" bitfld.long 0x04 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,HS USB," else group.long 0x180++0x07 line.long 0x00 "UGCTRL,USB General Control Register" bitfld.long 0x00 2. " CONNECT ,USB connect control" "Disabled,Enabled" bitfld.long 0x00 0. " PLLRESET ,PLL reset" "Disabled,Enabled" line.long 0x04 "UGCTRL2,USB General Control Register 2" rbitfld.long 0x04 31. " USB2SEL ,USB2.0 Ch.2 selection" "EHCI/OHCI,USB3.0" bitfld.long 0x04 4.--5. " USB0SEL ,USB2.0 Ch.0 selection" ",EHCI/OHCI,,HS USB" group.long 0x190++0x03 line.long 0x00 "UGSTS,USB General Status Register" bitfld.long 0x00 0.--1. " LOCK ,Embedded USB PHY PLL lock status" "Halted,Halted,Halted,Completed" endif width 0x0B tree.end tree.open "USB DMAC (USB High-Speed DMAC)" tree "USB DMAC 0" base ad:0xE65A0000 width 22. group.long 0x00++0x03 line.long 0x00 "USBDMA0_VCR,DMA 0 VCR Register" bitfld.long 0x00 1. " ERR_SNT ,Send error response" "No error,Error" bitfld.long 0x00 0. " ERR_RCV ,Receive error response" "No error,Error" group.long 0x08++0x03 line.long 0x00 "USBDMA0_SWR,DMA 0 Software Reset Register" bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" rgroup.long 0x10++0x03 line.long 0x00 "USBDMA0_DMICR,DMA 0 Interrupt Source Register" bitfld.long 0x00 31. " SHBSY1 ,CH1 AXI bus busy flag monitor" "Not busy,Busy" bitfld.long 0x00 23. " SHBSY0 ,CH0 AXI bus busy flag monitor" "Not busy,Busy" bitfld.long 0x00 16. " AE ,Address error interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " TR1 ,CH1 transaction end: receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 13. " BUF1 ,CH1 buffer end detect interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 12. " RW1 ,CH1 final buffer access detect interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " NULL1 ,CH1 NULL packet receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 10. " TO1 ,CH1 timeout interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 9. " SP1 ,CH1 short packet receive interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " TE1 ,CH1 transfer end interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 6. " TR0 ,CH0 transaction end detect interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 5. " BUF0 ,CH0 buffer end detect interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " RW0 ,CH0 RWEND receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 3. " NULL0 ,CH0 NULL receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 2. " TO0 ,CH0 timeout interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " SP0 ,CH0 short packet receive interrupt Source" "No interrupt,Interrupt" bitfld.long 0x00 0. " TE0 ,CH0 transfer end interrupt source" "No interrupt,Interrupt" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951"))||(cpuis("R8A77951-*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")||(cpu()=="R8A77450")||cpuis("R7S72104*")||cpuis("R7S72106*") if (((per.l(ad:0xE65A0000)+0x20+0x14)&0xC0)==0x00) group.long 0x20++0x07 line.long 0x00 "USBDMA0_SAR_0,DMA 0 Source Address Register 0" hexmask.long.byte 0x00 0.--7. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA0_DAR_0,DMA 0 Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65A0000)+0x20+0x14)&0xC0)==0x80) group.long 0x20++0x07 line.long 0x00 "USBDMA0_SAR_0,DMA 0 Source Address Register 0" hexmask.long.word 0x00 0.--15. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA0_DAR_0,DMA 0 Destination Address Register 0" hexmask.long.word 0x04 0.--15. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65A0000)+0x20+0x14)&0xC0)==0x80) group.long 0x20++0x07 line.long 0x00 "USBDMA0_SAR_0,DMA 0 Source Address Register 0" line.long 0x04 "USBDMA0_DAR_0,DMA 0 Destination Address Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "USBDMA0_TCR_0,DMA 0 Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count" else group.long 0x20++0x0B line.long 0x00 "USBDMA0_SAR_0,DMA 0 Source Address Register 0" line.long 0x04 "USBDMA0_DAR_0,DMA 0 Destination Address Register 0" line.long 0x08 "USBDMA0_TCR_0,DMA 0 Transfer Count Register 0" hexmask.long.tbyte 0x08 0.--23. 1. " TCR ,Transfer count" endif rgroup.long (0x20+0x0C)++0x03 line.long 0x00 "USBDMA0_TOCNTR_0,DMA 0 Timeout Count Register 0" hexmask.long.tbyte 0x00 0.--21. 1. " TOCNTR ,Timeout counter value" group.long (0x20+0x10)++0x0B line.long 0x00 "USBDMA0_TOCSTR_0,DMA 0 Timeout Constant Register 0" hexmask.long.tbyte 0x00 0.--21. 1. " TOCSTR ,Timeout constant value" line.long 0x04 "USBDMA0_CHCR_0,DMA 0 Channel Control Register 0" bitfld.long 0x04 24. " FTE ,Forced TE set register" "No effect,Forced" bitfld.long 0x04 20. " SPIM ,Short packet receive interrupt mask" "Enabled,Disabled" bitfld.long 0x04 19. " TRE ,Transaction end detect interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " BUFE ,Buffer end detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 17. " RWE ,Final buffer access detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 16. " NULLE ,NULL receive interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " TR ,Transaction end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 14. " BUF ,Buffer end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 13. " RW ,Final buffer access detect interrupt flag" "Not detected,Detected" textline " " bitfld.long 0x04 12. " NULL ,NULL receive interrupt flag" "Not received,Received" bitfld.long 0x04 6.--7. " TS ,DMA transfer size" "8 bytes,16 bytes,32 bytes,?..." bitfld.long 0x04 5. " IE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TOE ,Timeout enable" "Disabled,Enabled" bitfld.long 0x04 3. " TO ,Timeout flag" "No timeout,Timeout" bitfld.long 0x04 2. " SP ,Short packet receive flag" "Not received,Received" textline " " bitfld.long 0x04 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x04 0. " DE ,DMA enable " "Disabled,Enabled" line.long 0x08 "USBDMA0_TEND_0,DMA 0 Final Transaction Valid Data Transfer Enable Register 0" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951"))||(cpuis("R8A77951-*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")||(cpu()=="R8A77450")||cpuis("R7S72104*")||cpuis("R7S72106*") if (((per.l(ad:0xE65A0000)+0x40+0x14)&0xC0)==0x00) group.long 0x40++0x07 line.long 0x00 "USBDMA0_SAR_1,DMA 0 Source Address Register 1" hexmask.long.byte 0x00 0.--7. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA0_DAR_1,DMA 0 Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65A0000)+0x40+0x14)&0xC0)==0x80) group.long 0x40++0x07 line.long 0x00 "USBDMA0_SAR_1,DMA 0 Source Address Register 1" hexmask.long.word 0x00 0.--15. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA0_DAR_1,DMA 0 Destination Address Register 1" hexmask.long.word 0x04 0.--15. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65A0000)+0x40+0x14)&0xC0)==0x80) group.long 0x40++0x07 line.long 0x00 "USBDMA0_SAR_1,DMA 0 Source Address Register 1" line.long 0x04 "USBDMA0_DAR_1,DMA 0 Destination Address Register 1" endif group.long (0x40+0x08)++0x03 line.long 0x00 "USBDMA0_TCR_1,DMA 0 Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count" else group.long 0x40++0x0B line.long 0x00 "USBDMA0_SAR_1,DMA 0 Source Address Register 1" line.long 0x04 "USBDMA0_DAR_1,DMA 0 Destination Address Register 1" line.long 0x08 "USBDMA0_TCR_1,DMA 0 Transfer Count Register 1" hexmask.long.tbyte 0x08 0.--23. 1. " TCR ,Transfer count" endif rgroup.long (0x40+0x0C)++0x03 line.long 0x00 "USBDMA0_TOCNTR_1,DMA 0 Timeout Count Register 1" hexmask.long.tbyte 0x00 0.--21. 1. " TOCNTR ,Timeout counter value" group.long (0x40+0x10)++0x0B line.long 0x00 "USBDMA0_TOCSTR_1,DMA 0 Timeout Constant Register 1" hexmask.long.tbyte 0x00 0.--21. 1. " TOCSTR ,Timeout constant value" line.long 0x04 "USBDMA0_CHCR_1,DMA 0 Channel Control Register 1" bitfld.long 0x04 24. " FTE ,Forced TE set register" "No effect,Forced" bitfld.long 0x04 20. " SPIM ,Short packet receive interrupt mask" "Enabled,Disabled" bitfld.long 0x04 19. " TRE ,Transaction end detect interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " BUFE ,Buffer end detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 17. " RWE ,Final buffer access detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 16. " NULLE ,NULL receive interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " TR ,Transaction end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 14. " BUF ,Buffer end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 13. " RW ,Final buffer access detect interrupt flag" "Not detected,Detected" textline " " bitfld.long 0x04 12. " NULL ,NULL receive interrupt flag" "Not received,Received" bitfld.long 0x04 6.--7. " TS ,DMA transfer size" "8 bytes,16 bytes,32 bytes,?..." bitfld.long 0x04 5. " IE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TOE ,Timeout enable" "Disabled,Enabled" bitfld.long 0x04 3. " TO ,Timeout flag" "No timeout,Timeout" bitfld.long 0x04 2. " SP ,Short packet receive flag" "Not received,Received" textline " " bitfld.long 0x04 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x04 0. " DE ,DMA enable " "Disabled,Enabled" line.long 0x08 "USBDMA0_TEND_1,DMA 0 Final Transaction Valid Data Transfer Enable Register 1" group.long 0x60++0x03 line.long 0x00 "USBDMA0_DMAOR,DMA 0 Operation Register" bitfld.long 0x00 6. " TID1 ,Response error channel 1 identity information" "No error,Error" bitfld.long 0x00 5. " TID0 ,Response error channel 0 identity information" "No error,Error" bitfld.long 0x00 4. " RM ,Response error mask mode" "Not masked,Masked" textline " " bitfld.long 0x00 2.--3. " PR ,Priority mode" "CH0 > CH1,CH1 > CH0,?..." bitfld.long 0x00 1. " AE ,Address error flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" width 0x0B tree.end tree "USB DMAC 1" base ad:0xE65B0000 width 22. group.long 0x00++0x03 line.long 0x00 "USBDMA1_VCR,DMA 1 VCR Register" bitfld.long 0x00 1. " ERR_SNT ,Send error response" "No error,Error" bitfld.long 0x00 0. " ERR_RCV ,Receive error response" "No error,Error" group.long 0x08++0x03 line.long 0x00 "USBDMA1_SWR,DMA 1 Software Reset Register" bitfld.long 0x00 0. " SWR ,Software reset" "No reset,Reset" rgroup.long 0x10++0x03 line.long 0x00 "USBDMA1_DMICR,DMA 1 Interrupt Source Register" bitfld.long 0x00 31. " SHBSY1 ,CH1 AXI bus busy flag monitor" "Not busy,Busy" bitfld.long 0x00 23. " SHBSY0 ,CH0 AXI bus busy flag monitor" "Not busy,Busy" bitfld.long 0x00 16. " AE ,Address error interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 14. " TR1 ,CH1 transaction end: receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 13. " BUF1 ,CH1 buffer end detect interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 12. " RW1 ,CH1 final buffer access detect interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 11. " NULL1 ,CH1 NULL packet receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 10. " TO1 ,CH1 timeout interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 9. " SP1 ,CH1 short packet receive interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 8. " TE1 ,CH1 transfer end interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 6. " TR0 ,CH0 transaction end detect interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 5. " BUF0 ,CH0 buffer end detect interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 4. " RW0 ,CH0 RWEND receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 3. " NULL0 ,CH0 NULL receive interrupt source" "No interrupt,Interrupt" bitfld.long 0x00 2. " TO0 ,CH0 timeout interrupt source" "No interrupt,Interrupt" textline " " bitfld.long 0x00 1. " SP0 ,CH0 short packet receive interrupt Source" "No interrupt,Interrupt" bitfld.long 0x00 0. " TE0 ,CH0 transfer end interrupt source" "No interrupt,Interrupt" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951"))||(cpuis("R8A77951-*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")||(cpu()=="R8A77450")||cpuis("R7S72104*")||cpuis("R7S72106*") if (((per.l(ad:0xE65B0000)+0x20+0x14)&0xC0)==0x00) group.long 0x20++0x07 line.long 0x00 "USBDMA1_SAR_0,DMA 1 Source Address Register 0" hexmask.long.byte 0x00 0.--7. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA1_DAR_0,DMA 1 Destination Address Register 0" hexmask.long.byte 0x04 0.--7. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65B0000)+0x20+0x14)&0xC0)==0x80) group.long 0x20++0x07 line.long 0x00 "USBDMA1_SAR_0,DMA 1 Source Address Register 0" hexmask.long.word 0x00 0.--15. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA1_DAR_0,DMA 1 Destination Address Register 0" hexmask.long.word 0x04 0.--15. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65B0000)+0x20+0x14)&0xC0)==0x80) group.long 0x20++0x07 line.long 0x00 "USBDMA1_SAR_0,DMA 1 Source Address Register 0" line.long 0x04 "USBDMA1_DAR_0,DMA 1 Destination Address Register 0" endif group.long (0x20+0x08)++0x03 line.long 0x00 "USBDMA1_TCR_0,DMA 1 Transfer Count Register 0" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count" else group.long 0x20++0x0B line.long 0x00 "USBDMA1_SAR_0,DMA 1 Source Address Register 0" line.long 0x04 "USBDMA1_DAR_0,DMA 1 Destination Address Register 0" line.long 0x08 "USBDMA1_TCR_0,DMA 1 Transfer Count Register 0" hexmask.long.tbyte 0x08 0.--23. 1. " TCR ,Transfer count" endif rgroup.long (0x20+0x0C)++0x03 line.long 0x00 "USBDMA1_TOCNTR_0,DMA 1 Timeout Count Register 0" hexmask.long.tbyte 0x00 0.--21. 1. " TOCNTR ,Timeout counter value" group.long (0x20+0x10)++0x0B line.long 0x00 "USBDMA1_TOCSTR_0,DMA 1 Timeout Constant Register 0" hexmask.long.tbyte 0x00 0.--21. 1. " TOCSTR ,Timeout constant value" line.long 0x04 "USBDMA1_CHCR_0,DMA 1 Channel Control Register 0" bitfld.long 0x04 24. " FTE ,Forced TE set register" "No effect,Forced" bitfld.long 0x04 20. " SPIM ,Short packet receive interrupt mask" "Enabled,Disabled" bitfld.long 0x04 19. " TRE ,Transaction end detect interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " BUFE ,Buffer end detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 17. " RWE ,Final buffer access detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 16. " NULLE ,NULL receive interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " TR ,Transaction end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 14. " BUF ,Buffer end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 13. " RW ,Final buffer access detect interrupt flag" "Not detected,Detected" textline " " bitfld.long 0x04 12. " NULL ,NULL receive interrupt flag" "Not received,Received" bitfld.long 0x04 6.--7. " TS ,DMA transfer size" "8 bytes,16 bytes,32 bytes,?..." bitfld.long 0x04 5. " IE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TOE ,Timeout enable" "Disabled,Enabled" bitfld.long 0x04 3. " TO ,Timeout flag" "No timeout,Timeout" bitfld.long 0x04 2. " SP ,Short packet receive flag" "Not received,Received" textline " " bitfld.long 0x04 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x04 0. " DE ,DMA enable " "Disabled,Enabled" line.long 0x08 "USBDMA1_TEND_0,DMA 1 Final Transaction Valid Data Transfer Enable Register 0" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||(cpuis("R8A77951"))||(cpuis("R8A77951-*"))||(cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440")||(cpu()=="R8A77450")||cpuis("R7S72104*")||cpuis("R7S72106*") if (((per.l(ad:0xE65B0000)+0x40+0x14)&0xC0)==0x00) group.long 0x40++0x07 line.long 0x00 "USBDMA1_SAR_1,DMA 1 Source Address Register 1" hexmask.long.byte 0x00 0.--7. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA1_DAR_1,DMA 1 Destination Address Register 1" hexmask.long.byte 0x04 0.--7. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65B0000)+0x40+0x14)&0xC0)==0x80) group.long 0x40++0x07 line.long 0x00 "USBDMA1_SAR_1,DMA 1 Source Address Register 1" hexmask.long.word 0x00 0.--15. 0x01 " SAR ,Source address" line.long 0x04 "USBDMA1_DAR_1,DMA 1 Destination Address Register 1" hexmask.long.word 0x04 0.--15. 0x01 " DAR ,Destination address" elif (((per.l(ad:0xE65B0000)+0x40+0x14)&0xC0)==0x80) group.long 0x40++0x07 line.long 0x00 "USBDMA1_SAR_1,DMA 1 Source Address Register 1" line.long 0x04 "USBDMA1_DAR_1,DMA 1 Destination Address Register 1" endif group.long (0x40+0x08)++0x03 line.long 0x00 "USBDMA1_TCR_1,DMA 1 Transfer Count Register 1" hexmask.long.tbyte 0x00 0.--23. 1. " TCR ,Transfer count" else group.long 0x40++0x0B line.long 0x00 "USBDMA1_SAR_1,DMA 1 Source Address Register 1" line.long 0x04 "USBDMA1_DAR_1,DMA 1 Destination Address Register 1" line.long 0x08 "USBDMA1_TCR_1,DMA 1 Transfer Count Register 1" hexmask.long.tbyte 0x08 0.--23. 1. " TCR ,Transfer count" endif rgroup.long (0x40+0x0C)++0x03 line.long 0x00 "USBDMA1_TOCNTR_1,DMA 1 Timeout Count Register 1" hexmask.long.tbyte 0x00 0.--21. 1. " TOCNTR ,Timeout counter value" group.long (0x40+0x10)++0x0B line.long 0x00 "USBDMA1_TOCSTR_1,DMA 1 Timeout Constant Register 1" hexmask.long.tbyte 0x00 0.--21. 1. " TOCSTR ,Timeout constant value" line.long 0x04 "USBDMA1_CHCR_1,DMA 1 Channel Control Register 1" bitfld.long 0x04 24. " FTE ,Forced TE set register" "No effect,Forced" bitfld.long 0x04 20. " SPIM ,Short packet receive interrupt mask" "Enabled,Disabled" bitfld.long 0x04 19. " TRE ,Transaction end detect interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 18. " BUFE ,Buffer end detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 17. " RWE ,Final buffer access detect interrupt flag enable" "Disabled,Enabled" bitfld.long 0x04 16. " NULLE ,NULL receive interrupt flag enable" "Disabled,Enabled" textline " " bitfld.long 0x04 15. " TR ,Transaction end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 14. " BUF ,Buffer end detect interrupt flag" "Not detected,Detected" bitfld.long 0x04 13. " RW ,Final buffer access detect interrupt flag" "Not detected,Detected" textline " " bitfld.long 0x04 12. " NULL ,NULL receive interrupt flag" "Not received,Received" bitfld.long 0x04 6.--7. " TS ,DMA transfer size" "8 bytes,16 bytes,32 bytes,?..." bitfld.long 0x04 5. " IE ,Interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x04 4. " TOE ,Timeout enable" "Disabled,Enabled" bitfld.long 0x04 3. " TO ,Timeout flag" "No timeout,Timeout" bitfld.long 0x04 2. " SP ,Short packet receive flag" "Not received,Received" textline " " bitfld.long 0x04 1. " TE ,Transfer end flag" "Not ended,Ended" bitfld.long 0x04 0. " DE ,DMA enable " "Disabled,Enabled" line.long 0x08 "USBDMA1_TEND_1,DMA 1 Final Transaction Valid Data Transfer Enable Register 1" group.long 0x60++0x03 line.long 0x00 "USBDMA1_DMAOR,DMA 1 Operation Register" bitfld.long 0x00 6. " TID1 ,Response error channel 1 identity information" "No error,Error" bitfld.long 0x00 5. " TID0 ,Response error channel 0 identity information" "No error,Error" bitfld.long 0x00 4. " RM ,Response error mask mode" "Not masked,Masked" textline " " bitfld.long 0x00 2.--3. " PR ,Priority mode" "CH0 > CH1,CH1 > CH0,?..." bitfld.long 0x00 1. " AE ,Address error flag" "No error,Error" bitfld.long 0x00 0. " DME ,DMA master enable" "Disabled,Enabled" width 0x0B tree.end tree "DDM (Descriptor DMAC)" base ad:0xE65C0000 width 13. group.long 0x08++0x03 line.long 0x00 "DDIREQMSK,DDM Interrupt Source Mask Register" bitfld.long 0x00 23. " CM8 ,Interrupt output by CH8 counter consistent" "Masked,Not masked" bitfld.long 0x00 22. " CM7 ,Interrupt output by CH7 counter consistent" "Masked,Not masked" bitfld.long 0x00 21. " CM6 ,Interrupt output by CH6 counter consistent" "Masked,Not masked" textline " " bitfld.long 0x00 20. " CM5 ,Interrupt output by CH5 counter consistent" "Masked,Not masked" bitfld.long 0x00 19. " CM4 ,Interrupt output by CH4 counter consistent" "Masked,Not masked" bitfld.long 0x00 18. " CM3 ,Interrupt output by CH3 counter consistent" "Masked,Not masked" textline " " bitfld.long 0x00 17. " CM2 ,Interrupt output by CH2 counter consistent" "Masked,Not masked" bitfld.long 0x00 16. " CM1 ,Interrupt output by CH1 counter consistent" "Masked,Not masked" bitfld.long 0x00 15. " ERR8 ,Interrupt output by CH8 DDM_ERR" "Masked,Not masked" textline " " bitfld.long 0x00 14. " END8 ,Interrupt output by CH8 DDM_END" "Masked,Not masked" bitfld.long 0x00 13. " ERR7 ,Interrupt output by CH7 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 12. " END7 ,Interrupt output by CH7 DDM_END" "Masked,Not masked" textline " " bitfld.long 0x00 11. " ERR6 ,Interrupt output by CH6 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 10. " END6 ,Interrupt output by CH6 DDM_END" "Masked,Not masked" bitfld.long 0x00 9. " ERR5 ,Interrupt output by CH5 DDM_ERR" "Masked,Not masked" textline " " bitfld.long 0x00 8. " END5 ,Interrupt output by CH5 DDM_END" "Masked,Not masked" bitfld.long 0x00 7. " ERR4 ,Interrupt output by CH4 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 6. " END4 ,Interrupt output by CH4 DDM_END" "Masked,Not masked" textline " " bitfld.long 0x00 5. " ERR3 ,Interrupt output by CH3 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 4. " END3 ,Interrupt output by CH3 DDM_END" "Masked,Not masked" bitfld.long 0x00 3. " ERR2 ,Interrupt output by CH2 DDM_ERR" "Masked,Not masked" textline " " bitfld.long 0x00 2. " END2 ,Interrupt output by CH2 DDM_END" "Masked,Not masked" bitfld.long 0x00 1. " ERR1 ,Interrupt output by CH1 DDM_ERR" "Masked,Not masked" bitfld.long 0x00 0. " END1 ,Interrupt output by CH1 DDM_END" "Masked,Not masked" rgroup.long 0x0C++0x03 line.long 0x00 "DDIREQSTA,DDM Interrupt Source Register" bitfld.long 0x00 23. " CM8 ,Interrupt output by CH8 counter consistent" "Not output,Output" bitfld.long 0x00 22. " CM7 ,Interrupt output by CH7 counter consistent" "Not output,Output" bitfld.long 0x00 21. " CM6 ,Interrupt output by CH6 counter consistent" "Not output,Output" textline " " bitfld.long 0x00 20. " CM5 ,Interrupt output by CH5 counter consistent" "Not output,Output" bitfld.long 0x00 19. " CM4 ,Interrupt output by CH4 counter consistent" "Not output,Output" bitfld.long 0x00 18. " CM3 ,Interrupt output by CH3 counter consistent" "Not output,Output" textline " " bitfld.long 0x00 17. " CM2 ,Interrupt output by CH2 counter consistent" "Not output,Output" bitfld.long 0x00 16. " CM1 ,Interrupt output by CH1 counter consistent" "Not output,Output" bitfld.long 0x00 15. " ERR8 ,Interrupt output by CH8 DDM_ERR" "Not output,Output" textline " " bitfld.long 0x00 14. " END8 ,Interrupt output by CH8 DDM_END" "Not output,Output" bitfld.long 0x00 13. " ERR7 ,Interrupt output by CH7 DDM_ERR" "Not output,Output" bitfld.long 0x00 12. " END7 ,Interrupt output by CH7 DDM_END" "Not output,Output" textline " " bitfld.long 0x00 11. " ERR6 ,Interrupt output by CH6 DDM_ERR" "Not output,Output" bitfld.long 0x00 10. " END6 ,Interrupt output by CH6 DDM_END" "Not output,Output" bitfld.long 0x00 9. " ERR5 ,Interrupt output by CH5 DDM_ERR" "Not output,Output" textline " " bitfld.long 0x00 8. " END5 ,Interrupt output by CH5 DDM_END" "Not output,Output" bitfld.long 0x00 7. " ERR4 ,Interrupt output by CH4 DDM_ERR" "Not output,Output" bitfld.long 0x00 6. " END4 ,Interrupt output by CH4 DDM_END" "Not output,Output" textline " " bitfld.long 0x00 5. " ERR3 ,Interrupt output by CH3 DDM_ERR" "Not output,Output" bitfld.long 0x00 4. " END3 ,Interrupt output by CH3 DDM_END" "Not output,Output" bitfld.long 0x00 3. " ERR2 ,Interrupt output by CH2 DDM_ERR" "Not output,Output" textline " " bitfld.long 0x00 2. " END2 ,Interrupt output by CH2 DDM_END" "Not output,Output" bitfld.long 0x00 1. " ERR1 ,Interrupt output by CH1 DDM_ERR" "Not output,Output" bitfld.long 0x00 0. " END1 ,Interrupt output by CH1 DDM_END" "Not output,Output" tree.open "Channel 1" group.long 0x38++0x07 line.long 0x00 "DDINTMSK11,DDM CH1 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK12,DDM CH1 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x38+0x18)++0x07 line.long 0x00 "DDPTR1,DDM CH1 Descriptor Pointer" line.long 0x04 "DDCTRL1,DDM CH1 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 2" group.long 0x68++0x07 line.long 0x00 "DDINTMSK21,DDM CH2 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK22,DDM CH2 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x68+0x18)++0x07 line.long 0x00 "DDPTR2,DDM CH2 Descriptor Pointer" line.long 0x04 "DDCTRL2,DDM CH2 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 3" group.long 0x98++0x07 line.long 0x00 "DDINTMSK31,DDM CH3 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK32,DDM CH3 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x98+0x18)++0x07 line.long 0x00 "DDPTR3,DDM CH3 Descriptor Pointer" line.long 0x04 "DDCTRL3,DDM CH3 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 4" group.long 0xC8++0x07 line.long 0x00 "DDINTMSK41,DDM CH4 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK42,DDM CH4 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0xC8+0x18)++0x07 line.long 0x00 "DDPTR4,DDM CH4 Descriptor Pointer" line.long 0x04 "DDCTRL4,DDM CH4 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 5" group.long 0xF8++0x07 line.long 0x00 "DDINTMSK51,DDM CH5 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK52,DDM CH5 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0xF8+0x18)++0x07 line.long 0x00 "DDPTR5,DDM CH5 Descriptor Pointer" line.long 0x04 "DDCTRL5,DDM CH5 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 6" group.long 0x128++0x07 line.long 0x00 "DDINTMSK61,DDM CH6 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK62,DDM CH6 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x128+0x18)++0x07 line.long 0x00 "DDPTR6,DDM CH6 Descriptor Pointer" line.long 0x04 "DDCTRL6,DDM CH6 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 7" group.long 0x158++0x07 line.long 0x00 "DDINTMSK71,DDM CH7 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK72,DDM CH7 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x158+0x18)++0x07 line.long 0x00 "DDPTR7,DDM CH7 Descriptor Pointer" line.long 0x04 "DDCTRL7,DDM CH7 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end tree.open "Channel 8" group.long 0x188++0x07 line.long 0x00 "DDINTMSK81,DDM CH8 Start Source Mask Register 1" bitfld.long 0x00 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x00 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x00 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x00 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x00 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x00 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x00 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x00 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x00 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x00 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x00 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x00 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x00 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x00 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x00 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x00 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" line.long 0x04 "DDINTMSK82,DDM CH8 Start Source Mask Register 2" bitfld.long 0x04 19. " DDINTMSK19 ,DMACHCR19 TE bit mask" "Not masked,Masked" bitfld.long 0x04 18. " DDINTMSK18 ,DMACHCR18 TE bit mask" "Not masked,Masked" bitfld.long 0x04 17. " DDINTMSK17 ,DMACHCR17 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 16. " DDINTMSK16 ,DMACHCR16 TE bit mask" "Not masked,Masked" bitfld.long 0x04 15. " DDINTMSK15 ,DMACHCR15 TE bit mask" "Not masked,Masked" bitfld.long 0x04 14. " DDINTMSK14 ,DMACHCR14 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 13. " DDINTMSK13 ,DMACHCR13 TE bit mask" "Not masked,Masked" bitfld.long 0x04 12. " DDINTMSK12 ,DMACHCR12 TE bit mask" "Not masked,Masked" bitfld.long 0x04 11. " DDINTMSK11 ,DMACHCR11 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 10. " DDINTMSK10 ,DMACHCR10 TE bit mask" "Not masked,Masked" bitfld.long 0x04 9. " DDINTMSK9 ,DMACHCR9 TE bit mask" "Not masked,Masked" bitfld.long 0x04 8. " DDINTMSK8 ,DMACHCR8 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 7. " DDINTMSK7 ,DMACHCR7 TE bit mask" "Not masked,Masked" bitfld.long 0x04 6. " DDINTMSK6 ,DMACHCR6 TE bit mask" "Not masked,Masked" bitfld.long 0x04 5. " DDINTMSK5 ,DMACHCR5 TE bit mask" "Not masked,Masked" textline " " bitfld.long 0x04 4. " DDINTMSK4 ,DMACHCR4 TE bit mask" "Not masked,Masked" sif cpuis("R8A77951")||cpuis("R8A77951-*") bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3/USBDMAC3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2/USBDMAC2 TE bit mask" "Not masked,Masked" else bitfld.long 0x04 3. " DDINTMSK3 ,DMACHCR3 TE bit mask" "Not masked,Masked" bitfld.long 0x04 2. " DDINTMSK2 ,DMACHCR2 TE bit mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 1. " DDINTMSK1 ,DMACHCR1 TE/USBDMAC1 interrupt bit mask" "Not masked,Masked" bitfld.long 0x04 0. " DDINTMSK0 ,DMACHCR0 TE/USBDMAC0 interrupt bit mask" "Not masked,Masked" group.long (0x188+0x18)++0x07 line.long 0x00 "DDPTR8,DDM CH8 Descriptor Pointer" line.long 0x04 "DDCTRL8,DDM CH8 Control Register" bitfld.long 0x04 31. " PRI3 ,PRI3 value on the AXI bus" "0,1" bitfld.long 0x04 30. " PRI2 ,PRI2 value on the AXI bus" "0,1" bitfld.long 0x04 29. " PRI1 ,PRI1 value on the AXI bus" "0,1" textline " " bitfld.long 0x04 28. " PRI0 ,PRI0 value on the AXI bus" "0,1" bitfld.long 0x04 25. " ENDCM ,Descriptor end counter consistent detection" "Not detected,Detected" bitfld.long 0x04 24. " ENDCMMSK ,Descriptor end counter consistent detection mask" "Masked,Not masked" textline " " hexmask.long.byte 0x04 16.--23. 1. " END_NUM ,Number of descriptor ends" hexmask.long.byte 0x04 8.--15. 1. " END_CNT ,Descriptor end counter" bitfld.long 0x04 4. " STOP ,Forced stop function" "Not performed,Performed" textline " " bitfld.long 0x04 3. " KICK ,Forced start function without start source" "Not performed,Performed" rbitfld.long 0x04 2. " DDM_ERR ,Error occurrence" "Not occurred,Occurred" rbitfld.long 0x04 1. " DDM_END ,DDM end" "Not ended,Ended" textline " " bitfld.long 0x04 0. " DDE ,Start enable" "Disabled,Enabled" tree.end width 0x0B tree.end tree.end tree "RWDT (RCLK Watchdog Timer)" base ad:0xE6020000 width 9. if ((per.byte(ad:0xE6020000+0x04)&0x20)==0x20) rgroup.word 0x00++0x01 line.word 0x00 "RWTCNT,RCLK Watchdog Timer Counter" else group.word 0x00++0x01 line.word 0x00 "RWTCNT,RCLK Watchdog Timer Counter" endif group.byte 0x04++0x00 line.byte 0x00 "RWTCSRA,RCLK Watchdog Timer Control/Status Register A" bitfld.byte 0x00 7. " TME ,Timer operation enable" "Disabled,Enabled" rbitfld.byte 0x00 5. " WRFLG ,Write status flag" "Write access,No write access" bitfld.byte 0x00 4. " WOVF ,RWTCNT overflow status" "No overflow,Overflow" textline " " bitfld.byte 0x00 3. " WOVFE ,Overflow interrupt enable" "Disabled,Enabled" bitfld.byte 0x00 0.--2. " CKS0 ,RTC clock select" "/1,/4,/16,/32,/64,/128,/1024,Expanded mode" wgroup.long 0x08++0x03 line.long 0x00 "RWTCSRB,RCLK Watchdog Timer Control/Status Register B (Use a word access to write to RWTCSRB, with H'A5 A5A5 in the upper byte)" sif (cpu()=="R8A77470")||(cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450") group.byte 0x08++0x00 line.byte 0x00 "RWTCSRB,RCLK Watchdog Timer Control/Status Register B" bitfld.byte 0x00 0.--5. " CKS1 ,RCLK select for RCLK select expanded mode" "33s,1.01s,2.02s,3.03s,4.04s,5.05s,6.06s,7.07s,8.08s,9.09s,10.1s,,,,,,33s,5.05s,10.1s,15.2s,20.2s,25.3s,30.3s,35.4s,40.4s,45.5s,50.5s,55.6s,60.6s,,,,33s,1.01min,2.02min,3.03min,4.04min,5.05min,6.06min,7.07min,8.08min,9.09min,10.1min,,,,,,33s,5.05min,10.1min,15.2min,20.2min,25.3min,30.3min,?..." else rgroup.byte 0x08++0x00 line.byte 0x00 "RWTCSRB,RCLK Watchdog Timer Control/Status Register B" bitfld.byte 0x00 0.--5. " CKS1 ,RCLK select for RCLK select expanded mode" "32s,1s,2s,3s,4s,5s,6s,7s,8s,9s,10s,,,,,,32s,5s,10s,15s,20s,25s,30s,35s,40s,45s,50s,55s,60s,,,,32s,1min,2min,3min,4min,5min,6min,7min,8min,9min,10min,,,,,,32s,5min,10min,15min,20min,25min,30min,?..." endif width 0xB tree.end tree.open "TPU (16-Bit Timer Pulse Unit)" tree "TPU-CPU" base ad:0xE60F0000 width 8. tree "Channel 0" group.word 0x10++0x1 line.word 0x00 "TCR0,Timer Control Register 0" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear (TCNT clearing source)" "Disabled,TGRA compare match,TGRB compare match,,Disabled,TGRC compare match,TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x10+0x04)++0x1 line.word 0x00 "TMDR0,Timer Mode Register 0" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x10+0x08)++0x1 line.word 0x00 "TIOR0,Timer I/O Control Register 0" bitfld.word 0x00 0.--2. " IOA ,I/O Control (Initial output/Output 0 on compare match with TGRA)" "Always 0,0/0,0/1,Toggle,Always 1,1/0,1/1,Toggle" group.word (0x10+0x0C)++0x1 line.word 0x00 "TIER0,Timer Interrupt Enable Register 0" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x10+0x10)++0x1 line.word 0x00 "TSR0,Timer Status Registers 0" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow Detection" "Not detected,Detected" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request Detection" "Not detected,Detected" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer Detection" "Not detected,Detected" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer Detection" "Not detected,Detected" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition Detection" "Not detected,Detected" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition Detection" "Not detected,Detected" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x10+0x14)++0x1 line.word 0x00 "TCNT0,Timer Counter 0" group.word (0x10+0x18)++0x1 line.word 0x00 "TGRA0,Timer General Register A 0" group.word (0x10+0x1C)++0x1 line.word 0x00 "TGRB0,Timer General Register B 0" group.word (0x10+0x20)++0x1 line.word 0x00 "TGRC0,Timer General Register C 0" group.word (0x10+0x24)++0x1 line.word 0x00 "TGRD0,Timer General Register D 0" tree.end tree "Channel 1" group.word 0x50++0x1 line.word 0x00 "TCR1,Timer Control Register 1" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear (TCNT clearing source)" "Disabled,TGRA compare match,TGRB compare match,,Disabled,TGRC compare match,TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x50+0x04)++0x1 line.word 0x00 "TMDR1,Timer Mode Register 1" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x50+0x08)++0x1 line.word 0x00 "TIOR1,Timer I/O Control Register 1" bitfld.word 0x00 0.--2. " IOA ,I/O Control (Initial output/Output 0 on compare match with TGRA)" "Always 0,0/0,0/1,Toggle,Always 1,1/0,1/1,Toggle" group.word (0x50+0x0C)++0x1 line.word 0x00 "TIER1,Timer Interrupt Enable Register 1" bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x50+0x10)++0x1 line.word 0x00 "TSR1,Timer Status Registers 1" bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x50+0x14)++0x1 line.word 0x00 "TCNT1,Timer Counter 1" group.word (0x50+0x18)++0x1 line.word 0x00 "TGRA1,Timer General Register A 1" group.word (0x50+0x1C)++0x1 line.word 0x00 "TGRB1,Timer General Register B 1" group.word (0x50+0x20)++0x1 line.word 0x00 "TGRC1,Timer General Register C 1" group.word (0x50+0x24)++0x1 line.word 0x00 "TGRD1,Timer General Register D 1" tree.end tree "Channel 2" group.word 0x90++0x1 line.word 0x00 "TCR2,Timer Control Register 2" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear (TCNT clearing source)" "Disabled,TGRA compare match,TGRB compare match,,Disabled,TGRC compare match,TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x90+0x04)++0x1 line.word 0x00 "TMDR2,Timer Mode Register 2" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x90+0x08)++0x1 line.word 0x00 "TIOR2,Timer I/O Control Register 2" bitfld.word 0x00 0.--2. " IOA ,I/O Control (Initial output/Output 0 on compare match with TGRA)" "Always 0,0/0,0/1,Toggle,Always 1,1/0,1/1,Toggle" group.word (0x90+0x0C)++0x1 line.word 0x00 "TIER2,Timer Interrupt Enable Register 2" bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x90+0x10)++0x1 line.word 0x00 "TSR2,Timer Status Registers 2" bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x90+0x14)++0x1 line.word 0x00 "TCNT2,Timer Counter 2" group.word (0x90+0x18)++0x1 line.word 0x00 "TGRA2,Timer General Register A 2" group.word (0x90+0x1C)++0x1 line.word 0x00 "TGRB2,Timer General Register B 2" group.word (0x90+0x20)++0x1 line.word 0x00 "TGRC2,Timer General Register C 2" group.word (0x90+0x24)++0x1 line.word 0x00 "TGRD2,Timer General Register D 2" tree.end tree "Channel 3" group.word 0xD0++0x1 line.word 0x00 "TCR3,Timer Control Register 3" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear (TCNT clearing source)" "Disabled,TGRA compare match,TGRB compare match,,Disabled,TGRC compare match,TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0xD0+0x04)++0x1 line.word 0x00 "TMDR3,Timer Mode Register 3" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0xD0+0x08)++0x1 line.word 0x00 "TIOR3,Timer I/O Control Register 3" bitfld.word 0x00 0.--2. " IOA ,I/O Control (Initial output/Output 0 on compare match with TGRA)" "Always 0,0/0,0/1,Toggle,Always 1,1/0,1/1,Toggle" group.word (0xD0+0x0C)++0x1 line.word 0x00 "TIER3,Timer Interrupt Enable Register 3" bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TGR Interrupt Enable A" "Disabled,Enabled" group.word (0xD0+0x10)++0x1 line.word 0x00 "TSR3,Timer Status Registers 3" bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0xD0+0x14)++0x1 line.word 0x00 "TCNT3,Timer Counter 3" group.word (0xD0+0x18)++0x1 line.word 0x00 "TGRA3,Timer General Register A 3" group.word (0xD0+0x1C)++0x1 line.word 0x00 "TGRB3,Timer General Register B 3" group.word (0xD0+0x20)++0x1 line.word 0x00 "TGRC3,Timer General Register C 3" group.word (0xD0+0x24)++0x1 line.word 0x00 "TGRD3,Timer General Register D 3" tree.end group.word 0x00++0x1 "Timer Start Register" line.word 0x00 "TSTR,Timer Start Register" bitfld.word 0x00 4. " TMST ,Motor Control Sequence Start" "Stopped,Started" bitfld.word 0x00 3. " CST3 ,Counter 3 Start" "Stopped,Started" bitfld.word 0x00 2. " CST2 ,Counter 2 Start" "Stopped,Started" textline " " bitfld.word 0x00 1. " CST1 ,Counter 1 Start" "Stopped,Started" bitfld.word 0x00 0. " CST0 ,Counter 0 Start" "Stopped,Started" tree "Motor Settings Registers" group.word 0x100++0x1 line.word 0x00 "TMIR,Motor Control Setting Register" bitfld.word 0x00 4. " TDMAE ,DMA used/unused Bit" "Disabled,Enabled" bitfld.word 0x00 3. " MTRPATDOWN ,Start and Stop Pattern Transition Ascending/Descending Select Bit" "Ascending,Descending" bitfld.word 0x00 1.--2. " MTRPATKIND ,Start and Stop Pattern Type Select Bit" "4 types,8 types,?..." textline " " bitfld.word 0x00 0. " MTRON ,TPU mode/Stepping Motor Control Mode Select Bit" "TPU,Stepping motor control" group.word 0x104++0x1 line.word 0x00 "TMRR,Motor Deceleration (Stop) Transition Register" bitfld.word 0x00 1. " REDUON0 ,Compulsory change from normal to deceleration" "No,Yes" bitfld.word 0x00 0. " REDUON ,Compulsory change from normal to deceleration" "No,Yes" rgroup.word 0x108++0x1 line.word 0x00 "TMSR,Motor Control Status Register" bitfld.word 0x00 3. " SITR ,Sequence state in motor control mode" "Not decelerated,Decelerated" bitfld.word 0x00 2. " SITT ,Sequence state in motor control mode" "Not normal,Normal" bitfld.word 0x00 1. " SITA ,Sequence state in motor control mode" "Not accelerated,Accelerated" textline " " bitfld.word 0x00 0. " SITS ,Sequence state in motor control mode" "Not stopped,Stopped" group.word 0x110++0x1 line.word 0x00 "TMMPR0,Motor Operation Pattern Storing Register 0" bitfld.word 0x00 15. " MP33 ,TPU0TO3 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 14. " MP32 ,TPU0TO2 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 13. " MP31 ,TPU0TO1 output value in motor operation pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " MP30 ,TPU0TO0 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 11. " MP23 ,TPU0TO3 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 10. " MP22 ,TPU0TO2 output value in motor operation pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " MP21 ,TPU0TO1 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 8. " MP20 ,TPU0TO0 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 7. " MP13 ,TPU0TO3 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " MP12 ,TPU0TO2 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 5. " MP11 ,TPU0TO1 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 4. " MP10 ,TPU0TO0 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " MP03 ,TPU0TO3 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 2. " MP02 ,TPU0TO2 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 1. " MP01 ,TPU0TO1 output value in motor operation pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " MP00 ,TPU0TO0 output value in motor operation pattern [0]" "Low,High" group.word 0x114++0x1 line.word 0x00 "TMMPR1,Motor Operation Pattern Storing Register 1" bitfld.word 0x00 15. " MP73 ,TPU0TO3 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 14. " MP72 ,TPU0TO2 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 13. " MP71 ,TPU0TO1 output value in motor operation pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " MP70 ,TPU0TO0 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 11. " MP63 ,TPU0TO3 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 10. " MP62 ,TPU0TO2 output value in motor operation pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " MP61 ,TPU0TO1 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 8. " MP60 ,TPU0TO0 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 7. " MP53 ,TPU0TO3 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " MP52 ,TPU0TO2 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 5. " MP51 ,TPU0TO1 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 4. " MP50 ,TPU0TO0 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " MP43 ,TPU0TO3 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 2. " MP42 ,TPU0TO2 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 1. " MP41 ,TPU0TO1 output value in motor operation pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " MP40 ,TPU0TO0 output value in motor operation pattern [4]" "Low,High" group.word 0x118++0x1 line.word 0x00 "TMSPR0,Motor Stop Pattern Storing Register 0" bitfld.word 0x00 15. " SP33 ,TPU0TO3 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 14. " SP32 ,TPU0TO2 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 13. " SP31 ,TPU0TO1 output value in motor stop pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " SP30 ,TPU0TO0 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 11. " SP23 ,TPU0TO3 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 10. " SP22 ,TPU0TO2 output value in motor stop pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " SP21 ,TPU0TO1 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 8. " SP20 ,TPU0TO0 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 7. " SP13 ,TPU0TO3 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " SP12 ,TPU0TO2 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 5. " SP11 ,TPU0TO1 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 4. " SP10 ,TPU0TO0 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " SP03 ,TPU0TO3 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 2. " SP02 ,TPU0TO2 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 1. " SP01 ,TPU0TO1 output value in motor stop pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " SP00 ,TPU0TO0 output value in motor stop pattern [0]" "Low,High" group.word 0x11C++0x1 line.word 0x00 "TMSPR1,Motor Stop Pattern Storing Register 1" bitfld.word 0x00 15. " SP73 ,TPU0TO3 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 14. " SP72 ,TPU0TO2 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 13. " SP71 ,TPU0TO1 output value in motor stop pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " SP70 ,TPU0TO0 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 11. " SP63 ,TPU0TO3 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 10. " SP62 ,TPU0TO2 output value in motor stop pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " SP61 ,TPU0TO1 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 8. " SP60 ,TPU0TO0 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 7. " SP53 ,TPU0TO3 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " SP52 ,TPU0TO2 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 5. " SP51 ,TPU0TO1 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 4. " SP50 ,TPU0TO0 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " SP43 ,TPU0TO3 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 2. " SP42 ,TPU0TO2 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 1. " SP41 ,TPU0TO1 output value in motor stop pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " SP40 ,TPU0TO0 output value in motor stop pattern [4]" "Low,High" group.word 0x120++0x1 line.word 0x00 "TMOPR,Motor Output Pattern Storing Register" bitfld.word 0x00 0.--2. " NOWPAT ,In Motor Control Mode" "0,1,2,3,4,5,6,7" group.word 0x130++0x1 line.word 0x00 "TMASR,Motor Acceleration the Number of Steps Register" group.word 0x134++0x1 line.word 0x00 "TMTSR,Motor Normal the Number of Steps Register" group.word 0x138++0x1 line.word 0x00 "TMRSR,Motor Deceleration the Number of Steps Register" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) if (((per.l(ad:0xE60F0000+0x108))&0x05)==0x04) group.word 0x140++0x1 line.word 0x00 "TMSCR,Motor Control Sequence Counter Register" else rgroup.word 0x140++0x1 line.word 0x00 "TMSCR,Motor Control Sequence Counter Register" endif else group.word 0x140++0x1 line.word 0x00 "TMSCR,Motor Control Sequence Counter Register" endif rgroup.word 0x144++0x1 line.word 0x00 "TMTCR,Motor Control Normal Counter Register" tree.end width 0xB tree.end tree "TPU-DMAC" base ad:0xE70F0000 width 8. tree "Channel 0" group.word 0x10++0x1 line.word 0x00 "TCR0,Timer Control Register 0" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear (TCNT clearing source)" "Disabled,TGRA compare match,TGRB compare match,,Disabled,TGRC compare match,TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x10+0x04)++0x1 line.word 0x00 "TMDR0,Timer Mode Register 0" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x10+0x08)++0x1 line.word 0x00 "TIOR0,Timer I/O Control Register 0" bitfld.word 0x00 0.--2. " IOA ,I/O Control (Initial output/Output 0 on compare match with TGRA)" "Always 0,0/0,0/1,Toggle,Always 1,1/0,1/1,Toggle" group.word (0x10+0x0C)++0x1 line.word 0x00 "TIER0,Timer Interrupt Enable Register 0" bitfld.word 0x00 13. " TMDOFE ,Motor Control Data Transfer Data Overflow Detection Enable" "Disabled,Enabled" bitfld.word 0x00 12. " TMDRFE ,Motor Control Data Transfer Request Detection Enable" "Disabled,Enabled" bitfld.word 0x00 11. " TMS1ER ,Motor Control Deceleration Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 10. " TMS1ET ,Motor Control Normal Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 9. " TMS1EA ,Motor Control Acceleration Transition Detection Enable" "Disabled,Enabled" bitfld.word 0x00 8. " TMS1ES ,Motor Control Stop Transition Detection Enable" "Disabled,Enabled" textline " " bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x10+0x10)++0x1 line.word 0x00 "TSR0,Timer Status Registers 0" bitfld.word 0x00 13. " TMDOFS ,Motor Control Data Transfer Overflow Detection" "Not detected,Detected" bitfld.word 0x00 12. " TMDRFS ,Motor Control Data Transfer Request Detection" "Not detected,Detected" bitfld.word 0x00 11. " TMCFR ,Motor Control Deceleration Transfer Detection" "Not detected,Detected" textline " " bitfld.word 0x00 10. " TMCFT ,Motor Control Normal Transfer Detection" "Not detected,Detected" bitfld.word 0x00 9. " TMCFA ,Motor Control Acceleration Transition Detection" "Not detected,Detected" bitfld.word 0x00 8. " TMCFS ,Motor Control Stop Transition Detection" "Not detected,Detected" textline " " bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x10+0x14)++0x1 line.word 0x00 "TCNT0,Timer Counter 0" group.word (0x10+0x18)++0x1 line.word 0x00 "TGRA0,Timer General Register A 0" group.word (0x10+0x1C)++0x1 line.word 0x00 "TGRB0,Timer General Register B 0" group.word (0x10+0x20)++0x1 line.word 0x00 "TGRC0,Timer General Register C 0" group.word (0x10+0x24)++0x1 line.word 0x00 "TGRD0,Timer General Register D 0" tree.end tree "Channel 1" group.word 0x50++0x1 line.word 0x00 "TCR1,Timer Control Register 1" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear (TCNT clearing source)" "Disabled,TGRA compare match,TGRB compare match,,Disabled,TGRC compare match,TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x50+0x04)++0x1 line.word 0x00 "TMDR1,Timer Mode Register 1" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x50+0x08)++0x1 line.word 0x00 "TIOR1,Timer I/O Control Register 1" bitfld.word 0x00 0.--2. " IOA ,I/O Control (Initial output/Output 0 on compare match with TGRA)" "Always 0,0/0,0/1,Toggle,Always 1,1/0,1/1,Toggle" group.word (0x50+0x0C)++0x1 line.word 0x00 "TIER1,Timer Interrupt Enable Register 1" bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x50+0x10)++0x1 line.word 0x00 "TSR1,Timer Status Registers 1" bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x50+0x14)++0x1 line.word 0x00 "TCNT1,Timer Counter 1" group.word (0x50+0x18)++0x1 line.word 0x00 "TGRA1,Timer General Register A 1" group.word (0x50+0x1C)++0x1 line.word 0x00 "TGRB1,Timer General Register B 1" group.word (0x50+0x20)++0x1 line.word 0x00 "TGRC1,Timer General Register C 1" group.word (0x50+0x24)++0x1 line.word 0x00 "TGRD1,Timer General Register D 1" tree.end tree "Channel 2" group.word 0x90++0x1 line.word 0x00 "TCR2,Timer Control Register 2" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear (TCNT clearing source)" "Disabled,TGRA compare match,TGRB compare match,,Disabled,TGRC compare match,TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0x90+0x04)++0x1 line.word 0x00 "TMDR2,Timer Mode Register 2" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0x90+0x08)++0x1 line.word 0x00 "TIOR2,Timer I/O Control Register 2" bitfld.word 0x00 0.--2. " IOA ,I/O Control (Initial output/Output 0 on compare match with TGRA)" "Always 0,0/0,0/1,Toggle,Always 1,1/0,1/1,Toggle" group.word (0x90+0x0C)++0x1 line.word 0x00 "TIER2,Timer Interrupt Enable Register 2" bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TGR Interrupt Enable A" "Disabled,Enabled" group.word (0x90+0x10)++0x1 line.word 0x00 "TSR2,Timer Status Registers 2" bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0x90+0x14)++0x1 line.word 0x00 "TCNT2,Timer Counter 2" group.word (0x90+0x18)++0x1 line.word 0x00 "TGRA2,Timer General Register A 2" group.word (0x90+0x1C)++0x1 line.word 0x00 "TGRB2,Timer General Register B 2" group.word (0x90+0x20)++0x1 line.word 0x00 "TGRC2,Timer General Register C 2" group.word (0x90+0x24)++0x1 line.word 0x00 "TGRD2,Timer General Register D 2" tree.end tree "Channel 3" group.word 0xD0++0x1 line.word 0x00 "TCR3,Timer Control Register 3" bitfld.word 0x00 5.--7. " CCLR ,Counter Clear (TCNT clearing source)" "Disabled,TGRA compare match,TGRB compare match,,Disabled,TGRC compare match,TGRD compare match,?..." bitfld.word 0x00 3.--4. " CKEG ,Clock Edge" "Rising,Falling,Both,Both" bitfld.word 0x00 0.--2. " TPSC ,Timer Prescaler" "Clk/1,Clk/4,Clk/16,Clk/64,?..." group.word (0xD0+0x04)++0x1 line.word 0x00 "TMDR3,Timer Mode Register 3" bitfld.word 0x00 6. " BFWT ,Buffer Write Timing" "At compare match,At counter clearing" bitfld.word 0x00 5. " BFB ,Buffer Operation B" "Normal,Buffer" bitfld.word 0x00 4. " BFA ,Buffer Operation A" "Normal,Buffer" textline " " bitfld.word 0x00 0.--2. " MD ,Timer Operating Mode" "Normal,,PWM,?..." group.word (0xD0+0x08)++0x1 line.word 0x00 "TIOR3,Timer I/O Control Register 3" bitfld.word 0x00 0.--2. " IOA ,I/O Control (Initial output/Output 0 on compare match with TGRA)" "Always 0,0/0,0/1,Toggle,Always 1,1/0,1/1,Toggle" group.word (0xD0+0x0C)++0x1 line.word 0x00 "TIER3,Timer Interrupt Enable Register 3" bitfld.word 0x00 4. " TC1EV ,Overflow Interrupt Enable" "Disabled,Enabled" bitfld.word 0x00 3. " TG1ED ,TGR Interrupt Enable D" "Disabled,Enabled" bitfld.word 0x00 2. " TG1EC ,TGR Interrupt Enable C" "Disabled,Enabled" textline " " bitfld.word 0x00 1. " TG1EB ,TGR Interrupt Enable B" "Disabled,Enabled" bitfld.word 0x00 0. " TG1EA ,TGR Interrupt Enable A" "Disabled,Enabled" group.word (0xD0+0x10)++0x1 line.word 0x00 "TSR3,Timer Status Registers 3" bitfld.word 0x00 4. " TCFV ,Overflow Flag" "Not occurred,Occurred" bitfld.word 0x00 3. " TGFD ,Compare Flag D" "Not occurred,Occurred" bitfld.word 0x00 2. " TGFC ,Compare Flag C" "Not occurred,Occurred" textline " " bitfld.word 0x00 1. " TGFB ,Compare Flag B" "Not occurred,Occurred" bitfld.word 0x00 0. " TGFA ,Output Compare Flag A" "Not occurred,Occurred" group.word (0xD0+0x14)++0x1 line.word 0x00 "TCNT3,Timer Counter 3" group.word (0xD0+0x18)++0x1 line.word 0x00 "TGRA3,Timer General Register A 3" group.word (0xD0+0x1C)++0x1 line.word 0x00 "TGRB3,Timer General Register B 3" group.word (0xD0+0x20)++0x1 line.word 0x00 "TGRC3,Timer General Register C 3" group.word (0xD0+0x24)++0x1 line.word 0x00 "TGRD3,Timer General Register D 3" tree.end group.word 0x00++0x1 "Timer Start Register" line.word 0x00 "TSTR,Timer Start Register" bitfld.word 0x00 4. " TMST ,Motor Control Sequence Start" "Stopped,Started" bitfld.word 0x00 3. " CST3 ,Counter 3 Start" "Stopped,Started" bitfld.word 0x00 2. " CST2 ,Counter 2 Start" "Stopped,Started" textline " " bitfld.word 0x00 1. " CST1 ,Counter 1 Start" "Stopped,Started" bitfld.word 0x00 0. " CST0 ,Counter 0 Start" "Stopped,Started" tree "Motor Settings Registers" group.word 0x100++0x1 line.word 0x00 "TMIR,Motor Control Setting Register" bitfld.word 0x00 4. " TDMAE ,DMA used/unused Bit" "Disabled,Enabled" bitfld.word 0x00 3. " MTRPATDOWN ,Start and Stop Pattern Transition Ascending/Descending Select Bit" "Ascending,Descending" bitfld.word 0x00 1.--2. " MTRPATKIND ,Start and Stop Pattern Type Select Bit" "4 types,8 types,?..." textline " " bitfld.word 0x00 0. " MTRON ,TPU mode/Stepping Motor Control Mode Select Bit" "TPU,Stepping motor control" group.word 0x104++0x1 line.word 0x00 "TMRR,Motor Deceleration (Stop) Transition Register" bitfld.word 0x00 1. " REDUON0 ,Compulsory change from normal to deceleration" "No,Yes" bitfld.word 0x00 0. " REDUON ,Compulsory change from normal to deceleration" "No,Yes" rgroup.word 0x108++0x1 line.word 0x00 "TMSR,Motor Control Status Register" bitfld.word 0x00 3. " SITR ,Sequence state in motor control mode" "Not decelerated,Decelerated" bitfld.word 0x00 2. " SITT ,Sequence state in motor control mode" "Not normal,Normal" bitfld.word 0x00 1. " SITA ,Sequence state in motor control mode" "Not accelerated,Accelerated" textline " " bitfld.word 0x00 0. " SITS ,Sequence state in motor control mode" "Not stopped,Stopped" group.word 0x110++0x1 line.word 0x00 "TMMPR0,Motor Operation Pattern Storing Register 0" bitfld.word 0x00 15. " MP33 ,TPU0TO3 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 14. " MP32 ,TPU0TO2 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 13. " MP31 ,TPU0TO1 output value in motor operation pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " MP30 ,TPU0TO0 output value in motor operation pattern [3]" "Low,High" bitfld.word 0x00 11. " MP23 ,TPU0TO3 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 10. " MP22 ,TPU0TO2 output value in motor operation pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " MP21 ,TPU0TO1 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 8. " MP20 ,TPU0TO0 output value in motor operation pattern [2] " "Low,High" bitfld.word 0x00 7. " MP13 ,TPU0TO3 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " MP12 ,TPU0TO2 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 5. " MP11 ,TPU0TO1 output value in motor operation pattern [1] " "Low,High" bitfld.word 0x00 4. " MP10 ,TPU0TO0 output value in motor operation pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " MP03 ,TPU0TO3 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 2. " MP02 ,TPU0TO2 output value in motor operation pattern [0]" "Low,High" bitfld.word 0x00 1. " MP01 ,TPU0TO1 output value in motor operation pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " MP00 ,TPU0TO0 output value in motor operation pattern [0]" "Low,High" group.word 0x114++0x1 line.word 0x00 "TMMPR1,Motor Operation Pattern Storing Register 1" bitfld.word 0x00 15. " MP73 ,TPU0TO3 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 14. " MP72 ,TPU0TO2 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 13. " MP71 ,TPU0TO1 output value in motor operation pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " MP70 ,TPU0TO0 output value in motor operation pattern [7]" "Low,High" bitfld.word 0x00 11. " MP63 ,TPU0TO3 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 10. " MP62 ,TPU0TO2 output value in motor operation pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " MP61 ,TPU0TO1 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 8. " MP60 ,TPU0TO0 output value in motor operation pattern [6] " "Low,High" bitfld.word 0x00 7. " MP53 ,TPU0TO3 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " MP52 ,TPU0TO2 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 5. " MP51 ,TPU0TO1 output value in motor operation pattern [5] " "Low,High" bitfld.word 0x00 4. " MP50 ,TPU0TO0 output value in motor operation pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " MP43 ,TPU0TO3 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 2. " MP42 ,TPU0TO2 output value in motor operation pattern [4]" "Low,High" bitfld.word 0x00 1. " MP41 ,TPU0TO1 output value in motor operation pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " MP40 ,TPU0TO0 output value in motor operation pattern [4]" "Low,High" group.word 0x118++0x1 line.word 0x00 "TMSPR0,Motor Stop Pattern Storing Register 0" bitfld.word 0x00 15. " SP33 ,TPU0TO3 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 14. " SP32 ,TPU0TO2 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 13. " SP31 ,TPU0TO1 output value in motor stop pattern [3]" "Low,High" textline " " bitfld.word 0x00 12. " SP30 ,TPU0TO0 output value in motor stop pattern [3]" "Low,High" bitfld.word 0x00 11. " SP23 ,TPU0TO3 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 10. " SP22 ,TPU0TO2 output value in motor stop pattern [2] " "Low,High" textline " " bitfld.word 0x00 9. " SP21 ,TPU0TO1 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 8. " SP20 ,TPU0TO0 output value in motor stop pattern [2] " "Low,High" bitfld.word 0x00 7. " SP13 ,TPU0TO3 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 6. " SP12 ,TPU0TO2 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 5. " SP11 ,TPU0TO1 output value in motor stop pattern [1] " "Low,High" bitfld.word 0x00 4. " SP10 ,TPU0TO0 output value in motor stop pattern [1] " "Low,High" textline " " bitfld.word 0x00 3. " SP03 ,TPU0TO3 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 2. " SP02 ,TPU0TO2 output value in motor stop pattern [0]" "Low,High" bitfld.word 0x00 1. " SP01 ,TPU0TO1 output value in motor stop pattern [0]" "Low,High" textline " " bitfld.word 0x00 0. " SP00 ,TPU0TO0 output value in motor stop pattern [0]" "Low,High" group.word 0x11C++0x1 line.word 0x00 "TMSPR1,Motor Stop Pattern Storing Register 1" bitfld.word 0x00 15. " SP73 ,TPU0TO3 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 14. " SP72 ,TPU0TO2 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 13. " SP71 ,TPU0TO1 output value in motor stop pattern [7]" "Low,High" textline " " bitfld.word 0x00 12. " SP70 ,TPU0TO0 output value in motor stop pattern [7]" "Low,High" bitfld.word 0x00 11. " SP63 ,TPU0TO3 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 10. " SP62 ,TPU0TO2 output value in motor stop pattern [6] " "Low,High" textline " " bitfld.word 0x00 9. " SP61 ,TPU0TO1 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 8. " SP60 ,TPU0TO0 output value in motor stop pattern [6] " "Low,High" bitfld.word 0x00 7. " SP53 ,TPU0TO3 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 6. " SP52 ,TPU0TO2 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 5. " SP51 ,TPU0TO1 output value in motor stop pattern [5] " "Low,High" bitfld.word 0x00 4. " SP50 ,TPU0TO0 output value in motor stop pattern [5] " "Low,High" textline " " bitfld.word 0x00 3. " SP43 ,TPU0TO3 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 2. " SP42 ,TPU0TO2 output value in motor stop pattern [4]" "Low,High" bitfld.word 0x00 1. " SP41 ,TPU0TO1 output value in motor stop pattern [4]" "Low,High" textline " " bitfld.word 0x00 0. " SP40 ,TPU0TO0 output value in motor stop pattern [4]" "Low,High" group.word 0x120++0x1 line.word 0x00 "TMOPR,Motor Output Pattern Storing Register" bitfld.word 0x00 0.--2. " NOWPAT ,In Motor Control Mode" "0,1,2,3,4,5,6,7" group.word 0x130++0x1 line.word 0x00 "TMASR,Motor Acceleration the Number of Steps Register" group.word 0x134++0x1 line.word 0x00 "TMTSR,Motor Normal the Number of Steps Register" group.word 0x138++0x1 line.word 0x00 "TMRSR,Motor Deceleration the Number of Steps Register" sif (cpuis("R8A77960*"))||(cpuis("R8A77965*"))||((cpuis("R8A77951")||cpuis("R8A77951-*")))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*")) if (((per.l(ad:0xE70F0000+0x108))&0x05)==0x04) group.word 0x140++0x1 line.word 0x00 "TMSCR,Motor Control Sequence Counter Register" else rgroup.word 0x140++0x1 line.word 0x00 "TMSCR,Motor Control Sequence Counter Register" endif else group.word 0x140++0x1 line.word 0x00 "TMSCR,Motor Control Sequence Counter Register" endif rgroup.word 0x144++0x1 line.word 0x00 "TMTCR,Motor Control Normal Counter Register" tree.end width 0xB tree.end tree.end tree.open "CMT (Compare Match Timer)" tree "CMT 0" base ad:0xFFCA0000 width 9. group.long 0x1000++0x3 line.long 0x00 "CMCLKE,CLK Enable Register" bitfld.long 0x00 6. " CH1CLKE ,Channel 1 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 5. " CH0CLKE ,Channel 0 clock supply status" "Not supplied,Supplied" group.long 0x500++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start" "Not started,Started" group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" if (((per.l(ad:0xFFCA0000+0x500+0x10))&0x200)==0x200) group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" hexmask.long.word 0x00 0.--15. 1. " CMCNT0 ,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" hexmask.long.word 0x04 0.--15. 1. " CMCOR0 ,Compare Match Timer Constant Register 0" else group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" endif group.long 0x600++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start" "Not started,Started" group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" if (((per.l(ad:0xFFCA0000+0x600+0x10))&0x200)==0x200) group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" hexmask.long.word 0x00 0.--15. 1. " CMCNT1 ,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" hexmask.long.word 0x04 0.--15. 1. " CMCOR1 ,Compare Match Timer Constant Register 1" else group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" endif width 0xB tree.end tree "CMT 1" base ad:0xE6130000 width 9. group.long 0x1000++0x3 line.long 0x00 "CMCLKE,CLK Enable Register" bitfld.long 0x00 7. " CH7CLKE ,Channel 7 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 6. " CH6CLKE ,Channel 6 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 5. " CH5CLKE ,Channel 5 clock supply status" "Not supplied,Supplied" textline " " bitfld.long 0x00 4. " CH4CLKE ,Channel 4 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 3. " CH3CLKE ,Channel 3 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 2. " CH2CLKE ,Channel 2 clock supply status" "Not supplied,Supplied" textline " " bitfld.long 0x00 1. " CH1CLKE ,Channel 1 clock supply status" "Not supplied,Supplied" bitfld.long 0x00 0. " CH0CLKE ,Channel 0 clock supply status" "Not supplied,Supplied" if (0==0.) group.long 0x0++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (0==1.||0==2.||0==4.) group.long (0x0+0x00)++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (0==3.) group.long (0x0+0x00)++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (0==5.||0==6.||0==7.) group.long (0x0+0x00)++0x3 "Channel 0" line.long 0x00 "CMSTR0,Compare Match Timer Start Register 0" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (0==0.) if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (0==1.||0==2.||0==4.) if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (0==3.) if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x0+0x20))&0x01)==0x01) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (0==5.||0==6.||0==7.) group.long (0x0+0x10)++0x3 line.long 0x00 "CMCSR0,Compare Match Timer Control/Status Register 0" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x0+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x0+0x10))&0x200)==0x200) group.long (0x0+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" hexmask.long.word 0x00 0.--15. 1. " CMCNT0 ,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" hexmask.long.word 0x04 0.--15. 1. " CMCOR0 ,Compare Match Timer Constant Register 0" else group.long (0x0+0x14)++0x7 line.long 0x00 "CMCNT0,Compare Match Timer Counter 0" line.long 0x04 "CMCOR0,Compare Match Timer Constant Register 0" endif if (0==0.||0==1.||0==2.||0==3.||0==4.) group.long (0x0+0x20)++0x03 line.long 0x00 "CMCSRH0,Compare Match Timer Control/Status Register H0" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x0+0x24)++0x07 line.long 0x00 "CMCNTH0,Compare Match Timer Counter H 0" hexmask.long.word 0x00 0.--15. 1. " CMCNTH0 ,Compare Match Timer Counter H0" line.long 0x04 "CMCORH0,Compare Match Timer Constant Register H0" hexmask.long.word 0x04 0.--15. 1. " CMCORH0 ,Compare Match Timer Constant Register H0" endif if (0==0.||0==1.||0==2.||0==4.) group.long (0x0+0x40)++0x3 line.long 0x00 "CMCSRM0,Compare Match Timer Match Control/Status Register 0" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x0+0x44)++0x3 line.long 0x00 "CMCNTM0,Compare Match Timer Match Counter 0" endif if (0==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT0BK0,Compare Match Timer Counter 0 Backup 0" line.long 0x04 "CMCNT0BK1,Compare Match Timer Counter 0 Backup 1" width 9. endif if (1==0.) group.long 0x100++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (1==1.||1==2.||1==4.) group.long (0x100+0x00)++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (1==3.) group.long (0x100+0x00)++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (1==5.||1==6.||1==7.) group.long (0x100+0x00)++0x3 "Channel 1" line.long 0x00 "CMSTR1,Compare Match Timer Start Register 1" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (1==0.) if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (1==1.||1==2.||1==4.) if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (1==3.) if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x100+0x20))&0x01)==0x01) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (1==5.||1==6.||1==7.) group.long (0x100+0x10)++0x3 line.long 0x00 "CMCSR1,Compare Match Timer Control/Status Register 1" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x100+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x100+0x10))&0x200)==0x200) group.long (0x100+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" hexmask.long.word 0x00 0.--15. 1. " CMCNT1 ,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" hexmask.long.word 0x04 0.--15. 1. " CMCOR1 ,Compare Match Timer Constant Register 1" else group.long (0x100+0x14)++0x7 line.long 0x00 "CMCNT1,Compare Match Timer Counter 1" line.long 0x04 "CMCOR1,Compare Match Timer Constant Register 1" endif if (1==0.||1==1.||1==2.||1==3.||1==4.) group.long (0x100+0x20)++0x03 line.long 0x00 "CMCSRH1,Compare Match Timer Control/Status Register H1" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x100+0x24)++0x07 line.long 0x00 "CMCNTH1,Compare Match Timer Counter H 1" hexmask.long.word 0x00 0.--15. 1. " CMCNTH1 ,Compare Match Timer Counter H1" line.long 0x04 "CMCORH1,Compare Match Timer Constant Register H1" hexmask.long.word 0x04 0.--15. 1. " CMCORH1 ,Compare Match Timer Constant Register H1" endif if (1==0.||1==1.||1==2.||1==4.) group.long (0x100+0x40)++0x3 line.long 0x00 "CMCSRM1,Compare Match Timer Match Control/Status Register 1" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x100+0x44)++0x3 line.long 0x00 "CMCNTM1,Compare Match Timer Match Counter 1" endif if (1==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT1BK0,Compare Match Timer Counter 1 Backup 0" line.long 0x04 "CMCNT1BK1,Compare Match Timer Counter 1 Backup 1" width 9. endif if (2==0.) group.long 0x200++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (2==1.||2==2.||2==4.) group.long (0x200+0x00)++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (2==3.) group.long (0x200+0x00)++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (2==5.||2==6.||2==7.) group.long (0x200+0x00)++0x3 "Channel 2" line.long 0x00 "CMSTR2,Compare Match Timer Start Register 2" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (2==0.) if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (2==1.||2==2.||2==4.) if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (2==3.) if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x200+0x20))&0x01)==0x01) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (2==5.||2==6.||2==7.) group.long (0x200+0x10)++0x3 line.long 0x00 "CMCSR2,Compare Match Timer Control/Status Register 2" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x200+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x200+0x10))&0x200)==0x200) group.long (0x200+0x14)++0x7 line.long 0x00 "CMCNT2,Compare Match Timer Counter 2" hexmask.long.word 0x00 0.--15. 1. " CMCNT2 ,Compare Match Timer Counter 2" line.long 0x04 "CMCOR2,Compare Match Timer Constant Register 2" hexmask.long.word 0x04 0.--15. 1. " CMCOR2 ,Compare Match Timer Constant Register 2" else group.long (0x200+0x14)++0x7 line.long 0x00 "CMCNT2,Compare Match Timer Counter 2" line.long 0x04 "CMCOR2,Compare Match Timer Constant Register 2" endif if (2==0.||2==1.||2==2.||2==3.||2==4.) group.long (0x200+0x20)++0x03 line.long 0x00 "CMCSRH2,Compare Match Timer Control/Status Register H2" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x200+0x24)++0x07 line.long 0x00 "CMCNTH2,Compare Match Timer Counter H 2" hexmask.long.word 0x00 0.--15. 1. " CMCNTH2 ,Compare Match Timer Counter H2" line.long 0x04 "CMCORH2,Compare Match Timer Constant Register H2" hexmask.long.word 0x04 0.--15. 1. " CMCORH2 ,Compare Match Timer Constant Register H2" endif if (2==0.||2==1.||2==2.||2==4.) group.long (0x200+0x40)++0x3 line.long 0x00 "CMCSRM2,Compare Match Timer Match Control/Status Register 2" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x200+0x44)++0x3 line.long 0x00 "CMCNTM2,Compare Match Timer Match Counter 2" endif if (2==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT2BK0,Compare Match Timer Counter 2 Backup 0" line.long 0x04 "CMCNT2BK1,Compare Match Timer Counter 2 Backup 1" width 9. endif if (3==0.) group.long 0x300++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (3==1.||3==2.||3==4.) group.long (0x300+0x00)++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (3==3.) group.long (0x300+0x00)++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (3==5.||3==6.||3==7.) group.long (0x300+0x00)++0x3 "Channel 3" line.long 0x00 "CMSTR3,Compare Match Timer Start Register 3" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (3==0.) if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (3==1.||3==2.||3==4.) if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (3==3.) if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x300+0x20))&0x01)==0x01) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (3==5.||3==6.||3==7.) group.long (0x300+0x10)++0x3 line.long 0x00 "CMCSR3,Compare Match Timer Control/Status Register 3" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x300+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x300+0x10))&0x200)==0x200) group.long (0x300+0x14)++0x7 line.long 0x00 "CMCNT3,Compare Match Timer Counter 3" hexmask.long.word 0x00 0.--15. 1. " CMCNT3 ,Compare Match Timer Counter 3" line.long 0x04 "CMCOR3,Compare Match Timer Constant Register 3" hexmask.long.word 0x04 0.--15. 1. " CMCOR3 ,Compare Match Timer Constant Register 3" else group.long (0x300+0x14)++0x7 line.long 0x00 "CMCNT3,Compare Match Timer Counter 3" line.long 0x04 "CMCOR3,Compare Match Timer Constant Register 3" endif if (3==0.||3==1.||3==2.||3==3.||3==4.) group.long (0x300+0x20)++0x03 line.long 0x00 "CMCSRH3,Compare Match Timer Control/Status Register H3" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x300+0x24)++0x07 line.long 0x00 "CMCNTH3,Compare Match Timer Counter H 3" hexmask.long.word 0x00 0.--15. 1. " CMCNTH3 ,Compare Match Timer Counter H3" line.long 0x04 "CMCORH3,Compare Match Timer Constant Register H3" hexmask.long.word 0x04 0.--15. 1. " CMCORH3 ,Compare Match Timer Constant Register H3" endif if (3==0.||3==1.||3==2.||3==4.) group.long (0x300+0x40)++0x3 line.long 0x00 "CMCSRM3,Compare Match Timer Match Control/Status Register 3" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x300+0x44)++0x3 line.long 0x00 "CMCNTM3,Compare Match Timer Match Counter 3" endif if (3==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT3BK0,Compare Match Timer Counter 3 Backup 0" line.long 0x04 "CMCNT3BK1,Compare Match Timer Counter 3 Backup 1" width 9. endif if (4==0.) group.long 0x400++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (4==1.||4==2.||4==4.) group.long (0x400+0x00)++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (4==3.) group.long (0x400+0x00)++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (4==5.||4==6.||4==7.) group.long (0x400+0x00)++0x3 "Channel 4" line.long 0x00 "CMSTR4,Compare Match Timer Start Register 4" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (4==0.) if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (4==1.||4==2.||4==4.) if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (4==3.) if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x400+0x20))&0x01)==0x01) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (4==5.||4==6.||4==7.) group.long (0x400+0x10)++0x3 line.long 0x00 "CMCSR4,Compare Match Timer Control/Status Register 4" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x400+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x400+0x10))&0x200)==0x200) group.long (0x400+0x14)++0x7 line.long 0x00 "CMCNT4,Compare Match Timer Counter 4" hexmask.long.word 0x00 0.--15. 1. " CMCNT4 ,Compare Match Timer Counter 4" line.long 0x04 "CMCOR4,Compare Match Timer Constant Register 4" hexmask.long.word 0x04 0.--15. 1. " CMCOR4 ,Compare Match Timer Constant Register 4" else group.long (0x400+0x14)++0x7 line.long 0x00 "CMCNT4,Compare Match Timer Counter 4" line.long 0x04 "CMCOR4,Compare Match Timer Constant Register 4" endif if (4==0.||4==1.||4==2.||4==3.||4==4.) group.long (0x400+0x20)++0x03 line.long 0x00 "CMCSRH4,Compare Match Timer Control/Status Register H4" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x400+0x24)++0x07 line.long 0x00 "CMCNTH4,Compare Match Timer Counter H 4" hexmask.long.word 0x00 0.--15. 1. " CMCNTH4 ,Compare Match Timer Counter H4" line.long 0x04 "CMCORH4,Compare Match Timer Constant Register H4" hexmask.long.word 0x04 0.--15. 1. " CMCORH4 ,Compare Match Timer Constant Register H4" endif if (4==0.||4==1.||4==2.||4==4.) group.long (0x400+0x40)++0x3 line.long 0x00 "CMCSRM4,Compare Match Timer Match Control/Status Register 4" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x400+0x44)++0x3 line.long 0x00 "CMCNTM4,Compare Match Timer Match Counter 4" endif if (4==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT4BK0,Compare Match Timer Counter 4 Backup 0" line.long 0x04 "CMCNT4BK1,Compare Match Timer Counter 4 Backup 1" width 9. endif if (5==0.) group.long 0x500++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (5==1.||5==2.||5==4.) group.long (0x500+0x00)++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (5==3.) group.long (0x500+0x00)++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (5==5.||5==6.||5==7.) group.long (0x500+0x00)++0x3 "Channel 5" line.long 0x00 "CMSTR5,Compare Match Timer Start Register 5" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (5==0.) if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (5==1.||5==2.||5==4.) if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (5==3.) if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x500+0x20))&0x01)==0x01) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (5==5.||5==6.||5==7.) group.long (0x500+0x10)++0x3 line.long 0x00 "CMCSR5,Compare Match Timer Control/Status Register 5" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x500+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x500+0x10))&0x200)==0x200) group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT5,Compare Match Timer Counter 5" hexmask.long.word 0x00 0.--15. 1. " CMCNT5 ,Compare Match Timer Counter 5" line.long 0x04 "CMCOR5,Compare Match Timer Constant Register 5" hexmask.long.word 0x04 0.--15. 1. " CMCOR5 ,Compare Match Timer Constant Register 5" else group.long (0x500+0x14)++0x7 line.long 0x00 "CMCNT5,Compare Match Timer Counter 5" line.long 0x04 "CMCOR5,Compare Match Timer Constant Register 5" endif if (5==0.||5==1.||5==2.||5==3.||5==4.) group.long (0x500+0x20)++0x03 line.long 0x00 "CMCSRH5,Compare Match Timer Control/Status Register H5" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x500+0x24)++0x07 line.long 0x00 "CMCNTH5,Compare Match Timer Counter H 5" hexmask.long.word 0x00 0.--15. 1. " CMCNTH5 ,Compare Match Timer Counter H5" line.long 0x04 "CMCORH5,Compare Match Timer Constant Register H5" hexmask.long.word 0x04 0.--15. 1. " CMCORH5 ,Compare Match Timer Constant Register H5" endif if (5==0.||5==1.||5==2.||5==4.) group.long (0x500+0x40)++0x3 line.long 0x00 "CMCSRM5,Compare Match Timer Match Control/Status Register 5" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x500+0x44)++0x3 line.long 0x00 "CMCNTM5,Compare Match Timer Match Counter 5" endif if (5==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT5BK0,Compare Match Timer Counter 5 Backup 0" line.long 0x04 "CMCNT5BK1,Compare Match Timer Counter 5 Backup 1" width 9. endif if (6==0.) group.long 0x600++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (6==1.||6==2.||6==4.) group.long (0x600+0x00)++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (6==3.) group.long (0x600+0x00)++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (6==5.||6==6.||6==7.) group.long (0x600+0x00)++0x3 "Channel 6" line.long 0x00 "CMSTR6,Compare Match Timer Start Register 6" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (6==0.) if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (6==1.||6==2.||6==4.) if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (6==3.) if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x600+0x20))&0x01)==0x01) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (6==5.||6==6.||6==7.) group.long (0x600+0x10)++0x3 line.long 0x00 "CMCSR6,Compare Match Timer Control/Status Register 6" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x600+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x600+0x10))&0x200)==0x200) group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT6,Compare Match Timer Counter 6" hexmask.long.word 0x00 0.--15. 1. " CMCNT6 ,Compare Match Timer Counter 6" line.long 0x04 "CMCOR6,Compare Match Timer Constant Register 6" hexmask.long.word 0x04 0.--15. 1. " CMCOR6 ,Compare Match Timer Constant Register 6" else group.long (0x600+0x14)++0x7 line.long 0x00 "CMCNT6,Compare Match Timer Counter 6" line.long 0x04 "CMCOR6,Compare Match Timer Constant Register 6" endif if (6==0.||6==1.||6==2.||6==3.||6==4.) group.long (0x600+0x20)++0x03 line.long 0x00 "CMCSRH6,Compare Match Timer Control/Status Register H6" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x600+0x24)++0x07 line.long 0x00 "CMCNTH6,Compare Match Timer Counter H 6" hexmask.long.word 0x00 0.--15. 1. " CMCNTH6 ,Compare Match Timer Counter H6" line.long 0x04 "CMCORH6,Compare Match Timer Constant Register H6" hexmask.long.word 0x04 0.--15. 1. " CMCORH6 ,Compare Match Timer Constant Register H6" endif if (6==0.||6==1.||6==2.||6==4.) group.long (0x600+0x40)++0x3 line.long 0x00 "CMCSRM6,Compare Match Timer Match Control/Status Register 6" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x600+0x44)++0x3 line.long 0x00 "CMCNTM6,Compare Match Timer Match Counter 6" endif if (6==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT6BK0,Compare Match Timer Counter 6 Backup 0" line.long 0x04 "CMCNT6BK1,Compare Match Timer Counter 6 Backup 1" width 9. endif if (7==0.) group.long 0x700++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 8. " STR0RS ,RCLK-Synchronous Counter Start/Stop Mode Select" "Normal,Counter start/stop" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (7==1.||7==2.||7==4.) group.long (0x700+0x00)++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (7==3.) group.long (0x700+0x00)++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" elif (7==5.||7==6.||7==7.) group.long (0x700+0x00)++0x3 "Channel 7" line.long 0x00 "CMSTR7,Compare Match Timer Start Register 7" bitfld.long 0x00 0. " STR0 ,Count Start 0" "Not started,Started" endif if (7==0.) if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 12. " CH0STTF ,Channel 0 Start Flag" "Not started,Started" bitfld.long 0x00 11. " CH0STPF ,Channel 0 Stop Flag" "Not stopped,Stopped" bitfld.long 0x00 10. " CH0SSIE ,Channel 0 Start/Stop Interrupt Enable" "Disabled,Enabled" textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (7==1.||7==2.||7==4.) if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (7==3.) if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x200) if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "48-bit,48-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif else if (((per.l(ad:0xE6130000+0x700+0x20))&0x01)==0x01) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,Pseudo 32kHz/8,Pseudo 32kHz/32,Pseudo 32kHz/128,Pseudo 32kHz/1" else group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" "CP/8,CP/32,CP/128,CP/1,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif endif elif (7==5.||7==6.||7==7.) group.long (0x700+0x10)++0x3 line.long 0x00 "CMCSR7,Compare Match Timer Control/Status Register 7" bitfld.long 0x00 15. " CMF ,Compare Match Flag" "Not matched,Matched" bitfld.long 0x00 14. " OVF ,Overflow Flag" "Not overflowed,Overflowed" sif (cpu()=="R8A77940")||cpuis("R8A7792X") rbitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" else bitfld.long 0x00 13. " WRFLG ,Write State Flag" "Enabled,Disabled" endif textline " " bitfld.long 0x00 9. " CMS ,Compare Match Timer Counter Size" "32-bit,16-bit" bitfld.long 0x00 8. " CMM ,Compare Match Mode" "One-shot,Free-running" bitfld.long 0x00 4.--5. " CMR ,Compare Match Request" "Disabled,,Enabled,?..." textline " " bitfld.long 0x00 3. " DBGIVD ,Debug Mode Operation Select" "Disabled,Enabled" bitfld.long 0x00 0.--2. " CKS ,Clock Select" ",,,,RCLK/8,RCLK/32,RCLK/128,RCLK/1" endif if (((per.l(ad:0xE6130000+0x700+0x20))&0x200)==0x00)&&(((per.l(ad:0xE6130000+0x700+0x10))&0x200)==0x200) group.long (0x700+0x14)++0x7 line.long 0x00 "CMCNT7,Compare Match Timer Counter 7" hexmask.long.word 0x00 0.--15. 1. " CMCNT7 ,Compare Match Timer Counter 7" line.long 0x04 "CMCOR7,Compare Match Timer Constant Register 7" hexmask.long.word 0x04 0.--15. 1. " CMCOR7 ,Compare Match Timer Constant Register 7" else group.long (0x700+0x14)++0x7 line.long 0x00 "CMCNT7,Compare Match Timer Counter 7" line.long 0x04 "CMCOR7,Compare Match Timer Constant Register 7" endif if (7==0.||7==1.||7==2.||7==3.||7==4.) group.long (0x700+0x20)++0x03 line.long 0x00 "CMCSRH7,Compare Match Timer Control/Status Register H7" bitfld.long 0x00 9. " CMSH ,Compare Match Timer Counter Size" "16/32-bit,48-bit" bitfld.long 0x00 0. " CKSH ,Clock Select" "RCLK,Pseudo 32kHz" group.long (0x700+0x24)++0x07 line.long 0x00 "CMCNTH7,Compare Match Timer Counter H 7" hexmask.long.word 0x00 0.--15. 1. " CMCNTH7 ,Compare Match Timer Counter H7" line.long 0x04 "CMCORH7,Compare Match Timer Constant Register H7" hexmask.long.word 0x04 0.--15. 1. " CMCORH7 ,Compare Match Timer Constant Register H7" endif if (7==0.||7==1.||7==2.||7==4.) group.long (0x700+0x40)++0x3 line.long 0x00 "CMCSRM7,Compare Match Timer Match Control/Status Register 7" rbitfld.long 0x00 15. " WRFLG ,Write state flag" "Enabled,Disabled" bitfld.long 0x00 1. " CMPCLR ,Counter Clear" "No effect,Cleared" bitfld.long 0x00 0. " CMPSTART ,Count Start" "Not started,Started" rgroup.long (0x700+0x44)++0x3 line.long 0x00 "CMCNTM7,Compare Match Timer Match Counter 7" endif if (7==3.) width 11. rgroup.long 0x330++0x7 line.long 0x00 "CMCNT7BK0,Compare Match Timer Counter 7 Backup 0" line.long 0x04 "CMCNT7BK1,Compare Match Timer Counter 7 Backup 1" width 9. endif width 0xB tree.end tree.end tree.open "TMU (Timer Unit)" tree "Timer 0" base ad:0xE61E0004 width 10. group.byte 0x00++0x00 line.byte 0x00 "TSTR0,Timer Start Register 0" bitfld.byte 0x00 2. " STR2 ,Counter start 2" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR1 ,Counter start 1" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR0 ,Counter start 0" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR0,Timer Constant Register 0" line.long 0x04 "TCNT0,Timer Counter 0" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x4+0x08)++0x01 line.word 0x00 "TCR0,Timer Control Register 0" bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "CP/4,CP/16,CP/64,CP/256,CP/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,?..." endif else group.word (0x4+0x08)++0x01 line.word 0x00 "TCR0,Timer Control Register 0" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) else endif group.long 0x10++0x07 line.long 0x00 "TCOR1,Timer Constant Register 1" line.long 0x04 "TCNT1,Timer Counter 1" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x10+0x08)++0x01 line.word 0x00 "TCR1,Timer Control Register 1" bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "CP/4,CP/16,CP/64,CP/256,CP/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,?..." endif else group.word (0x10+0x08)++0x01 line.word 0x00 "TCR1,Timer Control Register 1" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) else endif group.long 0x1C++0x07 line.long 0x00 "TCOR2,Timer Constant Register 2" line.long 0x04 "TCNT2,Timer Counter 2" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR2,Timer Control Register 2" bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "CP/4,CP/16,CP/64,CP/256,CP/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,?..." endif else group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR2,Timer Control Register 2" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) else endif width 0x0B tree.end tree "Timer 1" base ad:0xFFF60004 width 10. group.byte 0x00++0x00 line.byte 0x00 "TSTR1,Timer Start Register 1" bitfld.byte 0x00 2. " STR5 ,Counter start 5" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR4 ,Counter start 4" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR3 ,Counter start 3" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR3,Timer Constant Register 3" line.long 0x04 "TCNT3,Timer Counter 3" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x4+0x08)++0x01 line.word 0x00 "TCR3,Timer Control Register 3" bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "S0D6/4,S0D6/16,S0D6/64,S0D6/256,S0D6/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,,,External clock" endif else group.word (0x4+0x08)++0x01 line.word 0x00 "TCR3,Timer Control Register 3" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) else endif group.long 0x10++0x07 line.long 0x00 "TCOR4,Timer Constant Register 4" line.long 0x04 "TCNT4,Timer Counter 4" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x10+0x08)++0x01 line.word 0x00 "TCR4,Timer Control Register 4" bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "S0D6/4,S0D6/16,S0D6/64,S0D6/256,S0D6/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,,,External clock" endif else group.word (0x10+0x08)++0x01 line.word 0x00 "TCR4,Timer Control Register 4" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) else endif group.long 0x1C++0x07 line.long 0x00 "TCOR5,Timer Constant Register 5" line.long 0x04 "TCNT5,Timer Counter 5" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR5,Timer Control Register 5" bitfld.word 0x00 9. " ICPF ,Input capture interrupt flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input capture control" "Not used,,Disabled,Enabled" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "S0D6/4,S0D6/16,S0D6/64,S0D6/256,S0D6/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,,,External clock" endif else group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR5,Timer Control Register 5" bitfld.word 0x00 9. " ICPF ,Input capture interrupt flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input capture control" "Not used,,Disabled,Enabled" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) rgroup.long (0x1C+0x0C)++0x03 line.long 0x00 "TCPR5,Input Capture Register 5" else sif (cpuis("R8A77965*")||cpuis("R8A77960*")||cpuis("R8A77470*")||cpuis("R8A77420*")||cpuis("R8A77430*")||cpuis("R8A77450*")||cpuis("R8A77440*")) rgroup.long (0x1C+0x0C)++0x03 line.long 0x00 "TCPR5,Input Capture Register 5" else rgroup.long (0x1C+0x0C)++0x03 line.long 0x00 "TCPR5,Input Capture Register 5" bitfld.long 0x00 9. " ICPF ,Input capture interrupt flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 6.--7. " ICPE ,Input capture control" "Not used,,Disabled,Enabled" textline " " bitfld.long 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.long 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.long 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" endif endif width 0x0B tree.end tree "Timer 2" base ad:0xFFF70004 width 10. group.byte 0x00++0x00 line.byte 0x00 "TSTR2,Timer Start Register 2" bitfld.byte 0x00 2. " STR8 ,Counter start 8" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR7 ,Counter start 7" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR6 ,Counter start 6" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR6,Timer Constant Register 6" line.long 0x04 "TCNT6,Timer Counter 6" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x4+0x08)++0x01 line.word 0x00 "TCR6,Timer Control Register 6" bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "S0D6/4,S0D6/16,S0D6/64,S0D6/256,S0D6/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,,,External clock" endif else group.word (0x4+0x08)++0x01 line.word 0x00 "TCR6,Timer Control Register 6" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) else endif group.long 0x10++0x07 line.long 0x00 "TCOR7,Timer Constant Register 7" line.long 0x04 "TCNT7,Timer Counter 7" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x10+0x08)++0x01 line.word 0x00 "TCR7,Timer Control Register 7" bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "S0D6/4,S0D6/16,S0D6/64,S0D6/256,S0D6/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,,,External clock" endif else group.word (0x10+0x08)++0x01 line.word 0x00 "TCR7,Timer Control Register 7" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) else endif group.long 0x1C++0x07 line.long 0x00 "TCOR8,Timer Constant Register 8" line.long 0x04 "TCNT8,Timer Counter 8" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR8,Timer Control Register 8" bitfld.word 0x00 9. " ICPF ,Input capture interrupt flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input capture control" "Not used,,Disabled,Enabled" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "S0D6/4,S0D6/16,S0D6/64,S0D6/256,S0D6/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,,,External clock" endif else group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR8,Timer Control Register 8" bitfld.word 0x00 9. " ICPF ,Input capture interrupt flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input capture control" "Not used,,Disabled,Enabled" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) rgroup.long (0x1C+0x0C)++0x03 line.long 0x00 "TCPR8,Input Capture Register 8" else sif (cpuis("R8A77965*")||cpuis("R8A77960*")||cpuis("R8A77470*")||cpuis("R8A77420*")||cpuis("R8A77430*")||cpuis("R8A77450*")||cpuis("R8A77440*")) rgroup.long (0x1C+0x0C)++0x03 line.long 0x00 "TCPR8,Input Capture Register 8" else rgroup.long (0x1C+0x0C)++0x03 line.long 0x00 "TCPR8,Input Capture Register 8" bitfld.long 0x00 9. " ICPF ,Input capture interrupt flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.long 0x00 6.--7. " ICPE ,Input capture control" "Not used,,Disabled,Enabled" textline " " bitfld.long 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.long 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.long 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,,,Count on external clk" endif endif width 0x0B tree.end tree "Timer 3" base ad:0xFFF80004 width 10. group.byte 0x00++0x00 line.byte 0x00 "TSTR3,Timer Start Register 3" bitfld.byte 0x00 2. " STR11 ,Counter start 11" "Halted,Started" textline " " bitfld.byte 0x00 1. " STR10 ,Counter start 10" "Halted,Started" textline " " bitfld.byte 0x00 0. " STR9 ,Counter start 9" "Halted,Started" group.long 0x4++0x07 line.long 0x00 "TCOR9,Timer Constant Register 9" line.long 0x04 "TCNT9,Timer Counter 9" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x4+0x08)++0x01 line.word 0x00 "TCR9,Timer Control Register 9" bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "S0D6/4,S0D6/16,S0D6/64,S0D6/256,S0D6/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,?..." endif else group.word (0x4+0x08)++0x01 line.word 0x00 "TCR9,Timer Control Register 9" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) else endif group.long 0x10++0x07 line.long 0x00 "TCOR10,Timer Constant Register 10" line.long 0x04 "TCNT10,Timer Counter 10" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x10+0x08)++0x01 line.word 0x00 "TCR10,Timer Control Register 10" bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "S0D6/4,S0D6/16,S0D6/64,S0D6/256,S0D6/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,?..." endif else group.word (0x10+0x08)++0x01 line.word 0x00 "TCR10,Timer Control Register 10" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) else endif group.long 0x1C++0x07 line.long 0x00 "TCOR11,Timer Constant Register 11" line.long 0x04 "TCNT11,Timer Counter 11" sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR11,Timer Control Register 11" bitfld.word 0x00 9. " ICPF ,Input capture interrupt flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 8. " UNF ,Underflow flag" "No underflow,Underflow" textline " " bitfld.word 0x00 6.--7. " ICPE ,Input capture control" "Not used,,Disabled,Enabled" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "TUNI disabled,TUNI enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,External clock input edge" "Rising,Falling,Both edges,Both edges" textline " " sif !cpuis("R7S72104*")||!cpuis("R7S72106*") bitfld.word 0x00 0.--2. " TPSC ,Timer pre-scaler 2 to 0" "S0D6/4,S0D6/16,S0D6/64,S0D6/256,S0D6/1024,,,External clock" else bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler 2 to 0" "TMU0/4,TMU0/4,TMU0/4,TMU0/4,TMU0/4,?..." endif else group.word (0x1C+0x08)++0x01 line.word 0x00 "TCR11,Timer Control Register 11" bitfld.word 0x00 8. " UNF ,Underflow flag" "Not occurred,Occurred" textline " " bitfld.word 0x00 5. " UNIE ,Underflow interrupt control" "Disabled,Enabled" textline " " bitfld.word 0x00 3.--4. " CKEG ,Clock edge" "Rising edge,Falling edge,Both edges,Both edges" textline " " bitfld.word 0x00 0.--2. " TPSC ,Timer prescaler" "Count on clkp/4,Count on clkp/16,Count on clkp/64,Count on clkp/256,Count on clkp/1024,?..." endif sif (cpuis("R8A77980*")||cpuis("R7S72104*")||cpuis("R7S72106*")) rgroup.long (0x1C+0x0C)++0x03 line.long 0x00 "TCPR11,Input Capture Register 11" else endif width 0x0B tree.end tree.end tree.open "PWM Timer" tree "Channel 0" base ad:0xE6E30000 width 8. if (((per.l(ad:0xE6E30000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 1" base ad:0xE6E31000 width 8. if (((per.l(ad:0xE6E31000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 2" base ad:0xE6E32000 width 8. if (((per.l(ad:0xE6E32000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 3" base ad:0xE6E33000 width 8. if (((per.l(ad:0xE6E33000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 4" base ad:0xE6E34000 width 8. if (((per.l(ad:0xE6E34000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 5" base ad:0xE6E35000 width 8. if (((per.l(ad:0xE6E35000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree "Channel 6" base ad:0xE6E36000 width 8. if (((per.l(ad:0xE6E36000))&0x8000)==0x8000) group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/2,/2^3,/2^5,/2^7,/2^9,/2^11,/2^13,/2^15,/2^17,/2^19,/2^21,/2^23,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" else group.long 0x00++0x03 line.long 0x00 "PWMCR,PWM Control Register" bitfld.long 0x00 16.--19. " CC0 ,Clock control [frequency divider]" "/1,/2^2,/2^4,/2^6,/2^8,/2^10,/2^12,/2^14,/2^16,/2^18,/2^20,/2^22,/2^24,/2^24,/2^24,/2^24" bitfld.long 0x00 15. " CCMD ,CC0 frequency division mode" "Normal,Modified" textline " " bitfld.long 0x00 11. " SYNC ,PWMCNT set values reflected in timer operation mode" "Irrespective of PWMCR setting,Synchronously with PWMCR" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 5.--6. " FS ,Functional safety use only" "0,1,2,3" textline " " endif bitfld.long 0x00 4. " SS0 ,Single pulse output" "Continuous,Single cycle" textline " " sif (cpuis("R8A77965*"))||(cpuis("R8A77960*"))||(cpuis("R8A77970*"))||(cpuis("R8A77980*"))||(cpuis("R8A77995*"))||(cpuis("R8A77990*"))||((cpuis("R8A77951")||cpuis("R8A77951-*"))) bitfld.long 0x00 3. " ECEN ,Functional safety use only" "0,1" textline " " endif bitfld.long 0x00 0. " EN0 ,Channel enable" "Disabled,Enabled" endif group.long 0x04++0x03 line.long 0x00 "PWMCNT,PWM Count Register" hexmask.long.word 0x00 16.--25. 1. " CYC0 ,PWM cycle" hexmask.long.word 0x00 0.--9. 1. " PH0 ,PWM High-Level period" sif (cpuis("R8A77980*")) group.long 0x0C++0x03 line.long 0x00 "PWMEI,PWM Error Injection Register" bitfld.long 0x00 0. " PWMEI ,PWMEI" "0,1" endif width 0xB tree.end tree.end tree "IR (IR Receiver)" base ad:0xE6E50000 width 9. group.long 0x00++0x2B line.long 0x00 "IRMODE,IR Mode Register" bitfld.long 0x00 7. " RCDENDE ,Receive code end interrupt enable" "Disabled,Enabled" bitfld.long 0x00 6. " RFRENDE ,Receive frame end interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " RBUFM ,Receive register mode" "Double buffer mode,Single buffer mode" bitfld.long 0x00 4. " INVERT ,Receive signal polarity inversion" "Inverted,Not inverted" textline " " bitfld.long 0x00 1.--3. " RMODE ,Receive operating mode" "Leader code,No leader code,?..." bitfld.long 0x00 0. " RECON ,IR receiver start" "Not started,Started" line.long 0x04 "IRCOMM,IR Command Register" hexmask.long.byte 0x04 8.--15. 1. " XCM ,Specified compo code" bitfld.long 0x04 5.--7. " ARC ,Acknowledge receive code" "Any code,Lower four bits match,Upper four bits match,Compo code match,,Lower four bits not match,Upper four bits not match,Compo code not match" textline " " bitfld.long 0x04 3. " ICC ,Instruction/compo code check" "Any compo/instruction code,Compo/instruction code inverted match" bitfld.long 0x04 0. " RCDM ,Receive code buffer mode" "RCODE11/RCODE21,RCODE11-12/RCODE21-22" line.long 0x08 "IRST,IR Status Register" bitfld.long 0x08 7. " RCDEND ,Frame receive code end status" "Not completed,Completed" bitfld.long 0x08 6. " RFREND ,Frame receive end status" "Not completed,Completed" textline " " rbitfld.long 0x08 0. " RSEL12 ,Receive code buffer specification status" "RCODE11-12,RCODE21-22" line.long 0x0C "CPD,CLKP Division Ratio Register" hexmask.long.word 0x0C 0.--12. 1. " CPD ,CLKP division ratio" line.long 0x10 "LDHL,Leader High Period Register" hexmask.long.word 0x10 16.--27. 1. " LDHU ,Leader high period upper limit" hexmask.long.word 0x10 0.--11. 1. " LDHL ,Leader high period lower limit" line.long 0x14 "LDLL,Leader Low Period Register" hexmask.long.word 0x14 16.--27. 1. " LDLU ,Leader low period upper limit" hexmask.long.word 0x14 0.--11. 1. " LDLL ,Leader low period lower limit" line.long 0x18 "BS0L,0 Bit Period Register" hexmask.long.word 0x18 16.--27. 1. " BS0U ,0 bit period upper limit" hexmask.long.word 0x18 0.--11. 1. " BS0L ,0 bit period lower limit" line.long 0x1C "BS1L,1 Bit Period Register" hexmask.long.word 0x1C 16.--27. 1. " BS1U ,1 bit period upper limit" hexmask.long.word 0x1C 0.--11. 1. " BS1L ,1 bit period lower limit" line.long 0x20 "BSHL,0 Or 1 Bit High Period Register" hexmask.long.word 0x20 16.--27. 1. " BSHU ,0 or 1 bit high period upper limit" hexmask.long.word 0x20 0.--11. 1. " BSHL ,0 or 1 bit high period lower limit" line.long 0x24 "TWP,Trailer Wait Time Register" hexmask.long.word 0x24 0.--15. 1. " TWP ,Trailer wait time" line.long 0x28 "RNOFBS,Receive Frame Total Bit Number Register" bitfld.long 0x28 11.--13. " TN ,Maximum number of times the receiver should attempt to receive a low or high level signal at the reception sampling frequency during leader code reception" "3,4,5,6,7,8,9,10" bitfld.long 0x28 8.--10. " DN ,Number of times the receiver should detect a low or high level signal consecutively to determine the pulse level (low or high) during leader code reception" "3,4,5,6,7,8,9,10" textline " " hexmask.long.byte 0x28 0.--6. 1. " RNOFBS ,Sets the total number of bits in a frame" rgroup.long 0x2C++0x0F line.long 0x00 "RCODE11,Receive Code 1-1" line.long 0x04 "RCODE12,Receive Code 1-2" line.long 0x08 "RCODE21,Receive Code 2-1" line.long 0x0C "RCODE22,Receive Code 2-2" width 0x0B tree.end tree "THS/TSC (Thermal Sensor)" base ad:0xE61F0000 width 10. sif (cpu()=="R8A77420")||(cpu()=="R8A77440")||(cpu()=="R8A77450") hgroup.long 0x00++0x03 hide.long 0x00 "STR,Interrupt Status Register" in else rgroup.long 0x00++0x3 line.long 0x00 "STR,Interrupt Status Register" bitfld.long 0x00 30. " PRTFLG ,Interrupt temperature status flag" "Normal,Exceed" bitfld.long 0x00 3. " TJ03ST ,TJ03ST detection status" "Not detected,Detected" bitfld.long 0x00 2. " TJ02ST ,TJ02ST detection status" "Not detected,Detected" textline " " bitfld.long 0x00 1. " TJ01ST ,TJ01ST detection status" "Not detected,Detected" bitfld.long 0x00 0. " TJ00ST ,TJ00ST detection status" "Not detected,Detected" endif group.long 0x04++0x3 line.long 0x00 "ENR,Interrupt Enable Register" bitfld.long 0x00 3. " TJ03_EN ,Tj03 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 2. " TJ02_EN ,Tj02 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 1. " TJ01_EN ,Tj01 interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " TJ00_EN ,Tj00 interrupt enable" "Disabled,Enabled" group.long 0x0C++0x3 line.long 0x00 "INT_MSK,Interrupt Mask Register" bitfld.long 0x00 3. " TJ03INT_MSK ,Tj03 interrupt request masked" "Not masked,Masked" bitfld.long 0x00 2. " TJ02INT_MSK ,Tj02 interrupt request masked" "Not masked,Masked" bitfld.long 0x00 1. " TJ01INT_MSK ,Tj01 interrupt request masked" "Not masked,Masked" bitfld.long 0x00 0. " TJ00INT_MSK ,Tj00 interrupt request masked" "Not masked,Masked" group.long 0x120++0xF line.long 0x00 "POSNEG,Positive/Negative Logic Select Register" bitfld.long 0x00 3. " POSNEG3 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" bitfld.long 0x00 2. " POSNEG2 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" bitfld.long 0x00 1. " POSNEG1 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" bitfld.long 0x00 0. " POSNEG0 ,Selects the edge polarity of the interrupt input signal" "Rising edge,Falling edge" line.long 0x04 "EDGLEVEL,Edge/Level Sensing Select Register" bitfld.long 0x04 3. " EDGLEVEL3 ,Specifies the method to detect interrupt signal input" ",Edge" bitfld.long 0x04 2. " EDGLEVEL2 ,Specifies the method to detect interrupt signal input" ",Edge" bitfld.long 0x04 1. " EDGLEVEL1 ,Specifies the method to detect interrupt signal input" ",Edge" bitfld.long 0x04 0. " EDGLEVEL0 ,Specifies the method to detect interrupt signal input" ",Edge" line.long 0x08 "FILONOFF,Chattering Prevention ON/OFF Setting Register" bitfld.long 0x08 3. " FILONOFF3 ,Turns on or off the chattering prevention circuit" "Off,On" bitfld.long 0x08 2. " FILONOFF2 ,Turns on or off the chattering prevention circuit" "Off,On" bitfld.long 0x08 1. " FILONOFF1 ,Turns on or off the chattering prevention circuit" "Off,On" bitfld.long 0x08 0. " FILONOFF0 ,Turns on or off the chattering prevention circuit" "Off,On" line.long 0x0C "THSCR,THS Control Register" sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77440") bitfld.long 0x0C 12. " CPCTL ,Specifies the method to set the offset (CPTAP) of the comparator in the THS" ",Automatically by hardware" else bitfld.long 0x0C 12. " CPCTL ,Specifies the method to set the offset (CPTAP) of the comparator in the THS" "CPTAP3-0 bits,Automatically by hardware" endif bitfld.long 0x0C 8.--9. " THIDLE ,Selects either the normal operating state or the idle state of the THS" "Normal,,Normal/output stopped,Idle" bitfld.long 0x0C 4.--7. " RFTAP[3:0] ,Sets an offset value (RFTAP) of the op amp in the THS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" bitfld.long 0x0C 0.--3. " CPTAP[3:0] ,Sets the offset value (CPTAP) of the comparator in the THS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15" rgroup.long 0x130++0x3 line.long 0x00 "THSSR,THS Status Register" bitfld.long 0x00 0.--5. " CTEMP[5:0] ,Indicates the current temperature" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" group.long 0x134++0x3 line.long 0x00 "INTCTLR,Interrupt Control Register " bitfld.long 0x00 24.--29. " CTEMP3 ,Indicates the temperature that causes an INTDT3 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 16.--21. " CTEMP2 ,Indicates the temperature that causes an INTDT2 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 8.--13. " CTEMP1 ,Indicates the temperature that causes an INTDT1 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" bitfld.long 0x00 0.--5. " CTEMP0 ,Indicates the temperature that causes an INTDT0 interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63" width 0xB tree.end tree "SYSC (System Controller)" base ad:0xE6180000 tree "Common Registers" width 13. rgroup.long 0x00++0x07 line.long 0x00 "SYSCSR,SYSC Status Register" bitfld.long 0x00 1. " PONENB ,SYSC is ready to accept power resume requests" "Not ready,Ready" bitfld.long 0x00 0. " POFFENB ,SYSC is ready to accept power shutoff requests" "Not ready,Ready" line.long 0x04 "SYSCISR,Interrupt Status Register" bitfld.long 0x04 21. " CA7_SCU ,Completion of the CA7-SCU power shutoff or power resume processing" "Not completed,Completed" bitfld.long 0x04 20. " SGX ,Completion of the SGX power shutoff or power resume processing" "Not completed,Completed" sif cpu()!="R8A77470" bitfld.long 0x04 16. " SH-4A ,Completion of the SH-4A power shutoff or power resume processing" "Not completed,Completed" endif textline " " bitfld.long 0x04 6. " CA7_CPU1 ,Completion of the CA7-CPU1 power shutoff or power resume processing" "Not completed,Completed" bitfld.long 0x04 5. " CA7_CPU0 ,Completion of the CA7-CPU0 power shutoff or power resume processing" "Not completed,Completed" wgroup.long 0x08++0x03 line.long 0x00 "SYSCISCR,Interrupt Status Clear Register" bitfld.long 0x00 21. " CA7_SCU ,Clears the CA7-SCU bit in the interrupt status register" "No effect,Clear" bitfld.long 0x00 20. " SGX ,Clears the SGX bit in the interrupt status register" "No effect,Clear" sif cpu()!="R8A77470" bitfld.long 0x00 16. " SH-4A ,Clears the SH-4A bit in the interrupt status register" "No effect,Clear" endif textline " " bitfld.long 0x00 6. " CA7_CPU1 ,Clears the CA7-CPU1 bit in the interrupt status register" "No effect,Clear" bitfld.long 0x00 5. " CA7_CPU0 ,Clears the CA7-CPU0 bit in the interrupt status register" "No effect,Clear" group.long 0x0C++0x07 line.long 0x00 "SYSCIER,Interrupt Enable Register" bitfld.long 0x00 21. " CA7_SCU ,CA7-SCU power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 20. " SGX ,SGX power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" sif cpu()!="R8A77470" bitfld.long 0x00 16. " SH-4A ,SH-4A power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" endif textline " " bitfld.long 0x00 6. " CA7_CPU1 ,CA7-CPU1 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" bitfld.long 0x00 5. " CA7_CPU0 ,CA7-CPU0 power shutoff or power resume processing completion interrupt enable" "Disabled,Enabled" line.long 0x04 "SYSCIMR,Interrupt Mask Register" bitfld.long 0x04 21. " CA7_SCU ,CA7-SCU power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 20. " SGX ,SGX power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" sif cpu()!="R8A77470" bitfld.long 0x04 16. " SH-4A ,SH-4A power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" endif textline " " bitfld.long 0x04 6. " CA7_CPU1 ,CA7-CPU1 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" bitfld.long 0x04 5. " CA7_CPU0 ,CA7-CPU0 power shutoff or power resume processing completion interrupt mask" "Not masked,Masked" if (((per.l(ad:0xE6180000+0x04))&0x200000)==0x200000) group.long 0x18++0x03 line.long 0x00 "WUPMSKCA7,CA7 Wake Up Mask Register" sif cpu()=="R8A77470" bitfld.long 0x00 17. " CSD1 ,Wake up CA7 CPU3 + SCU area when receiving CSD1 factor enable" "Enabled,Disabled" bitfld.long 0x00 16. " CSD0 ,Wake up CA7 CPU2 + SCU area when receiving CSD0 factor enable" "Enabled,Disabled" bitfld.long 0x00 9. " FIQ1 ,Wake up CA7 CPU1 + SCU area when receiving FIQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 8. " FIQ0 ,Wake up CA7 CPU0 + SCU area when receiving FIQ0 factor enable" "Enabled,Disabled" bitfld.long 0x00 1. " IRQ1 ,Wake up CA7 CPU1 + SCU area when receiving IRQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 0. " IRQ0 ,Wake up CA7 CPU0 + SCU area when receiving IRQ0 factor enable" "Enabled,Disabled" else bitfld.long 0x00 11. " CSD3 ,Wake up CA7 CPU3 + SCU area when receiving CSD3 factor enable" "Enabled,Disabled" bitfld.long 0x00 10. " CSD2 ,Wake up CA7 CPU2 + SCU area when receiving CSD2 factor enable" "Enabled,Disabled" bitfld.long 0x00 9. " CSD1 ,Wake up CA7 CPU1 + SCU area when receiving CSD1 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 8. " CSD0 ,Wake up CA7 CPU0 + SCU area when receiving CSD0 factor enable" "Enabled,Disabled" bitfld.long 0x00 7. " FIQ3 ,Wake up CA7 CPU3 + SCU area when receiving FIQ3 factor enable" "Enabled,Disabled" bitfld.long 0x00 6. " FIQ2 ,Wake up CA7 CPU2 + SCU area when receiving FIQ2 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 5. " FIQ1 ,Wake up CA7 CPU1 + SCU area when receiving FIQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 4. " FIQ0 ,Wake up CA7 CPU0 + SCU area when receiving FIQ0 factor enable" "Enabled,Disabled" bitfld.long 0x00 3. " IRQ3 ,Wake up CA7 CPU3 + SCU area when receiving IRQ3 factor enable" "Enabled,Disabled" textline " " bitfld.long 0x00 2. " IRQ2 ,Wake up CA7 CPU2 + SCU area when receiving IRQ2 factor enable" "Enabled,Disabled" bitfld.long 0x00 1. " IRQ1 ,Wake up CA7 CPU1 + SCU area when receiving IRQ1 factor enable" "Enabled,Disabled" bitfld.long 0x00 0. " IRQ0 ,Wake up CA7 CPU0 + SCU area when receiving IRQ0 factor enable" "Enabled,Disabled" endif else hgroup.long 0x18++0x03 hide.long 0x00 "WUPMSKCA7,CA7 Wake Up Mask Register" endif rgroup.long 0x2C++0x03 line.long 0x00 "SYSCEERSR2,External Event Request Status Register 2" bitfld.long 0x00 9. " FIQ_CA7[1] ,Power resume request due to an FIQ interrupt accepted by the CA7 CPU1" "Not accepted,Accepted" bitfld.long 0x00 8. " FIQ_CA7[0] ,Power resume request due to an FIQ interrupt accepted by the CA7 CPU0" "Not accepted,Accepted" textline " " bitfld.long 0x00 5. " IRQ_CA7[1] ,Power resume request due to an IRQ interrupt accepted by the CA7 CPU1" "Not accepted,Accepted" bitfld.long 0x00 4. " IRQ_CA7[0] ,Power resume request due to an IRQ interrupt accepted by the CA7 CPU0" "Not accepted,Accepted" textline " " bitfld.long 0x00 1. " WFI_CA7[1] ,Power resume request due to an WFI instruction execution accepted by the CA7 CPU1" "Not accepted,Accepted" bitfld.long 0x00 0. " WFI_CA7[0] ,Power resume request due to an WFI instruction execution accepted by the CA7 CPU0" "Not accepted,Accepted" wgroup.long 0x30++0x03 line.long 0x00 "SYSCOFSCR2,External Event Request Status Clear Register 2" bitfld.long 0x00 9. " FIQ_CA7[1] ,Clears the FIQ_CA7[1] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 8. " FIQ_CA7[0] ,Clears the FIQ_CA7[0] bit in the external event request status register" "No effect,Clear" textline " " bitfld.long 0x00 5. " IRQ_CA7[1] ,Clears the IRQ_CA7[1] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 4. " IRQ_CA7[0] ,Clears the IRQ_CA7[0] bit in the external event request status register" "No effect,Clear" textline " " bitfld.long 0x00 1. " WFI_CA7[1] ,Clears the WFI_CA7[1] bit in the external event request status register" "No effect,Clear" bitfld.long 0x00 0. " WFI_CA7[0] ,Clears the WFI_CA7[0] bit in the external event request status register" "No effect,Clear" group.long 0x34++0x03 line.long 0x00 "SYSCEERSER2,External Event Request Status Enable Register 2" bitfld.long 0x00 9. " FIQ_CA7[1] ,CA7 CPU1 FIQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 8. " FIQ_CA7[0] ,CA7 CPU0 FIQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 5. " IRQ_CA7[1] ,CA7 CPU1 IRQ interrupt enable" "Disabled,Enabled" bitfld.long 0x00 4. " IRQ_CA7[0] ,CA7 CPU0 IRQ interrupt enable" "Disabled,Enabled" textline " " bitfld.long 0x00 1. " WFI_CA7[1] ,CA7 CPU1 WFI external event interrupt enable" "Disabled,Enabled" bitfld.long 0x00 0. " WFI_CA7[0] ,CA7 CPU0 WFI external event interrupt enable" "Disabled,Enabled" tree.end tree "Power control Registers for CA7" rgroup.long 0x1C0++0x03 line.long 0x00 "PWRSRCA7,Power Status Register CA7" bitfld.long 0x00 5. " PWRUP_CPU1 ,Indicates the non-power-shutoff state of the CPU1" "No,Yes" bitfld.long 0x00 4. " PWRUP_CPU0 ,Indicates the non-power-shutoff state of the CPU0" "No,Yes" textline " " bitfld.long 0x00 1. " PWRDWN_CPU1 ,Indicates the power-shutoff state of the CPU1" "No,Yes" bitfld.long 0x00 0. " PWRDWN_CPU0 ,Indicates the power-shutoff state of the CPU0" "No,Yes" rgroup.long 0x1C8++0x03 line.long 0x00 "PWROFFSRCA7,Power Shutoff Status Register CA7" bitfld.long 0x00 1. " CPU1 ,Indicates the power shutoff sequence execution status for the CPU1" "Not executed,Executed" bitfld.long 0x00 0. " CPU0 ,Indicates the power shutoff sequence execution status for the CPU0" "Not executed,Executed" rgroup.long 0x1D0++0x07 line.long 0x00 "PWRONSRCA7,Power Resume Status Register CA7" bitfld.long 0x00 1. " CPU1 ,Indicates the power resume sequence execution status for the CPU1" "Not executed,Executed" bitfld.long 0x00 0. " CPU0 ,Indicates the power resume sequence execution status for the CPU0" "Not executed,Executed" line.long 0x04 "PWRERCA7,Power Shutoff/Resume Error Register CA7" bitfld.long 0x04 1. " CPU1 ,Indicates whether a power shutoff or power resume request to the CPU1 was not accepted" "Accepted,Not accepted" bitfld.long 0x04 0. " CPU0 ,Indicates whether a power shutoff or power resume request to the CPU0 was not accepted" "Accepted,Not accepted" tree.end tree.open "Power control Registers for other modules" width 11. sif cpu()=="R8A77470" tree "SH-4A power control registers" rgroup.long 0x80++0x03 line.long 0x00 "PWRSR1,Power Status Register 1" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of SH-4A" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0x80+0x04)++0x03 line.long 0x00 "PWROFFCR1,Power Shutoff Control Register 1" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the SH-4A" "Not started,Started" rgroup.long (0x80+0x08)++0x03 line.long 0x00 "PWROFFSR1,Power Shutoff Status Register 1" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the SH-4A" "Not executed,Executed" wgroup.long (0x80+0x0c)++0x03 line.long 0x00 "PWRONCR1,Power Resume Control Register 1" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0x80+0x10)++0x07 line.long 0x00 "PWRONSR1,Power Resume Status Register 1" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the SH-4A" "Not executed,Executed" line.long 0x04 "PWRER1,Power Shutoff/Resume Error Register 1" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the SH-4A was not accepted" "Accepted,Not accepted" tree.end else tree "SH-4A power control registers" rgroup.long 0x80++0x03 line.long 0x00 "PWRSR1,Power Status Register 1" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of SH-4A" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0x80+0x04)++0x03 line.long 0x00 "PWROFFCR1,Power Shutoff Control Register 1" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the SH-4A" "Not started,Started" rgroup.long (0x80+0x08)++0x03 line.long 0x00 "PWROFFSR1,Power Shutoff Status Register 1" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the SH-4A" "Not executed,Executed" wgroup.long (0x80+0x0c)++0x03 line.long 0x00 "PWRONCR1,Power Resume Control Register 1" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0x80+0x10)++0x07 line.long 0x00 "PWRONSR1,Power Resume Status Register 1" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the SH-4A" "Not executed,Executed" line.long 0x04 "PWRER1,Power Shutoff/Resume Error Register 1" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the SH-4A was not accepted" "Accepted,Not accepted" tree.end endif sif cpu()=="R8A77470" tree "SGX power control registers" rgroup.long 0xC0++0x03 line.long 0x00 "PWRSR2,Power Status Register 2" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of SGX" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0xC0+0x04)++0x03 line.long 0x00 "PWROFFCR2,Power Shutoff Control Register 2" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the SGX" "Not started,Started" rgroup.long (0xC0+0x08)++0x03 line.long 0x00 "PWROFFSR2,Power Shutoff Status Register 2" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the SGX" "Not executed,Executed" wgroup.long (0xC0+0x0c)++0x03 line.long 0x00 "PWRONCR2,Power Resume Control Register 2" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0xC0+0x10)++0x07 line.long 0x00 "PWRONSR2,Power Resume Status Register 2" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the SGX" "Not executed,Executed" line.long 0x04 "PWRER2,Power Shutoff/Resume Error Register 2" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the SGX was not accepted" "Accepted,Not accepted" tree.end else tree "SGX power control registers" rgroup.long 0xC0++0x03 line.long 0x00 "PWRSR2,Power Status Register 2" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of SGX" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0xC0+0x04)++0x03 line.long 0x00 "PWROFFCR2,Power Shutoff Control Register 2" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the SGX" "Not started,Started" rgroup.long (0xC0+0x08)++0x03 line.long 0x00 "PWROFFSR2,Power Shutoff Status Register 2" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the SGX" "Not executed,Executed" wgroup.long (0xC0+0x0c)++0x03 line.long 0x00 "PWRONCR2,Power Resume Control Register 2" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0xC0+0x10)++0x07 line.long 0x00 "PWRONSR2,Power Resume Status Register 2" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the SGX" "Not executed,Executed" line.long 0x04 "PWRER2,Power Shutoff/Resume Error Register 2" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the SGX was not accepted" "Accepted,Not accepted" tree.end endif sif cpu()=="R8A77470" tree "CA7-SCU power control registers" rgroup.long 0x100++0x03 line.long 0x00 "PWRSR3,Power Status Register 3" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of CA7-SCU" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0x100+0x04)++0x03 line.long 0x00 "PWROFFCR3,Power Shutoff Control Register 3" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the CA7-SCU" "Not started,Started" rgroup.long (0x100+0x08)++0x03 line.long 0x00 "PWROFFSR3,Power Shutoff Status Register 3" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the CA7-SCU" "Not executed,Executed" wgroup.long (0x100+0x0c)++0x03 line.long 0x00 "PWRONCR3,Power Resume Control Register 3" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0x100+0x10)++0x07 line.long 0x00 "PWRONSR3,Power Resume Status Register 3" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the CA7-SCU" "Not executed,Executed" line.long 0x04 "PWRER3,Power Shutoff/Resume Error Register 3" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the CA7-SCU was not accepted" "Accepted,Not accepted" tree.end else tree "CA7-SCU power control registers" rgroup.long 0x100++0x03 line.long 0x00 "PWRSR3,Power Status Register 3" bitfld.long 0x00 4. " PWRUP ,Indicates the power non-shutoff status of CA7-SCU" "No,Yes" bitfld.long 0x00 0. " PWRDWN ,Indicates the power shutoff status of a given module" "No,Yes" wgroup.long (0x100+0x04)++0x03 line.long 0x00 "PWROFFCR3,Power Shutoff Control Register 3" bitfld.long 0x00 0. " PWRDWN ,Starts the power shutoff sequence for the CA7-SCU" "Not started,Started" rgroup.long (0x100+0x08)++0x03 line.long 0x00 "PWROFFSR3,Power Shutoff Status Register 3" bitfld.long 0x00 0. " DWNSTATE ,Indicates the power shutoff sequence execution status for the CA7-SCU" "Not executed,Executed" wgroup.long (0x100+0x0c)++0x03 line.long 0x00 "PWRONCR3,Power Resume Control Register 3" bitfld.long 0x00 0. " PWRUP ,Starts the power resume sequence for the module" "Not started,Started" rgroup.long (0x100+0x10)++0x07 line.long 0x00 "PWRONSR3,Power Resume Status Register 3" bitfld.long 0x00 0. " UPSTATE ,Indicates the power resume sequence execution status for the CA7-SCU" "Not executed,Executed" line.long 0x04 "PWRER3,Power Shutoff/Resume Error Register 3" bitfld.long 0x04 0. " ERR ,Indicates whether a power shutoff or power resume request to the CA7-SCU was not accepted" "Accepted,Not accepted" tree.end endif tree.end width 0xb tree.end tree "H-UDI (User Debugging Interface)" base ad:0xFC110000 width 7. rgroup.word 0x00++0x1 line.word 0x00 "SDIR,Instruction Register" hexmask.word.byte 0x00 8.--15. 1. " TI ,Test instruction" group.word 0x18++0x1 line.word 0x00 "SDINT,Interrupt Source Register" bitfld.word 0x00 0. " INTREQ ,Interrupt Request" "Not requested,Requested" width 0xB tree.end tree "PRR (Product Register)" base ad:0xFF000044 width 5. rgroup.long 0x00++0x03 line.long 0x00 "PRR,Product Register" sif cpu()=="R8A77420" bitfld.long 0x00 31. " CA15EN[4] ,All CA15 CPUs state" "Enabled,Disabled" bitfld.long 0x00 30. " [3] ,CA15 CPU3 state" "Enabled,Disabled" bitfld.long 0x00 29. " [2] ,CA15 CPU2 state" "Enabled,Disabled" bitfld.long 0x00 28. " [1] ,CA15 CPU1 state" "Enabled,Disabled" textline " " bitfld.long 0x00 27. " [0] ,CA15 CPU0 state" "Enabled,Disabled" bitfld.long 0x00 26. " CA7EN[4] ,All CA7 CPUs state" "Enabled,Disabled" bitfld.long 0x00 25. " [3] ,CA7 CPU3 state" "Enabled,Disabled" bitfld.long 0x00 24. " [2] ,CA7 CPU2 state" "Enabled,Disabled" textline " " bitfld.long 0x00 23. " [1] ,CA7 CPU1 state" "Enabled,Disabled" bitfld.long 0x00 22. " [0] ,CA7 CPU0 state" "Enabled,Disabled" elif cpu()=="R8A77430" bitfld.long 0x00 31. " CA15EN[4] ,All CA15 CPUs state" "Enabled,Disabled" bitfld.long 0x00 28. " [1] ,CA15 CPU1 state" "Enabled,Disabled" bitfld.long 0x00 27. " [0] ,CA15 CPU0 state" "Enabled,Disabled" else bitfld.long 0x00 26. " CA7EN[4] ,All CA7 CPUs state" "Enabled,Disabled" bitfld.long 0x00 23. " [1] ,CA7 CPU1 state" "Enabled,Disabled" bitfld.long 0x00 22. " [0] ,CA7 CPU0 state" "Enabled,Disabled" endif sif (cpu()=="R8A77420")||(cpu()=="R8A77430")||(cpu()=="R8A77450")||(cpu()=="R8A77470") hexmask.long.byte 0x00 8.--14. 1. " PRODUCT ,Product ID number" hexmask.long.byte 0x00 0.--7. 1. " CUT ,Cut number" else bitfld.long 0x00 8.--14. " PRODUCT ,Product ID number" ",,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,R-Car E2,?..." bitfld.long 0x00 0.--7. " CUT ,Cut number" "ES1.0,,,,,,,,,,,,,,,,ES2.0,?..." endif width 0x0B tree.end textline ""